Fix bug in sh_elf_reloc_loop
[deliverable/binutils-gdb.git] / gdb / remote-vxmips.c
CommitLineData
c906108c
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1/* MIPS-dependent portions of the RPC protocol
2 used with a VxWorks target
3
c5aa993b 4 Contributed by Wind River Systems.
c906108c 5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
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8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
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13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
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18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
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22
23#include <stdio.h>
24#include "defs.h"
25
c5aa993b 26#include "vx-share/regPacket.h"
c906108c
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27#include "frame.h"
28#include "inferior.h"
03f2053f 29#include "gdb_wait.h"
c906108c
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30#include "target.h"
31#include "gdbcore.h"
32#include "command.h"
33#include "symtab.h"
34#include "symfile.h" /* for struct complaint */
35
36#include "gdb_string.h"
37#include <errno.h>
38#include <signal.h>
39#include <fcntl.h>
40#include <sys/types.h>
41#include <sys/time.h>
42#include <sys/socket.h>
43#include <rpc/rpc.h>
44#include <sys/time.h> /* UTek's <rpc/rpc.h> doesn't #incl this */
45#include <netdb.h>
46#include "vx-share/ptrace.h"
47#include "vx-share/xdr_ptrace.h"
48#include "vx-share/xdr_ld.h"
49#include "vx-share/xdr_rdb.h"
50#include "vx-share/dbgRpcLib.h"
51
52/* get rid of value.h if possible */
53#include <value.h>
54#include <symtab.h>
55
56/* Flag set if target has fpu */
57
58extern int target_has_fp;
59
60/* Generic register read/write routines in remote-vx.c. */
61
62extern void net_read_registers ();
63extern void net_write_registers ();
64
65/* Read a register or registers from the VxWorks target.
66 REGNO is the register to read, or -1 for all; currently,
67 it is ignored. FIXME look at regno to improve efficiency. */
68
69void
fba45db2 70vx_read_register (int regno)
c906108c
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71{
72 char mips_greg_packet[MIPS_GREG_PLEN];
73 char mips_fpreg_packet[MIPS_FPREG_PLEN];
74
75 /* Get general-purpose registers. */
76
77 net_read_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_GETREGS);
78
79 /* this code copies the registers obtained by RPC
80 stored in a structure(s) like this :
c5aa993b
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81
82 Register(s) Offset(s)
83 gp 0-31 0x00
84 hi 0x80
85 lo 0x84
86 sr 0x88
87 pc 0x8c
88
c906108c 89 into a stucture like this:
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90
91 0x00 GP 0-31
92 0x80 SR
93 0x84 LO
94 0x88 HI
95 0x8C BAD --- Not available currently
96 0x90 CAUSE --- Not available currently
97 0x94 PC
98 0x98 FP 0-31
99 0x118 FCSR
100 0x11C FIR --- Not available currently
101 0x120 FP --- Not available currently
102
c906108c 103 structure is 0x124 (292) bytes in length */
c5aa993b 104
c906108c 105 /* Copy the general registers. */
c5aa993b 106
c906108c 107 bcopy (&mips_greg_packet[MIPS_R_GP0], &registers[0], 32 * MIPS_GREG_SIZE);
c5aa993b 108
c906108c 109 /* Copy SR, LO, HI, and PC. */
c5aa993b 110
c906108c 111 bcopy (&mips_greg_packet[MIPS_R_SR],
c5aa993b 112 &registers[REGISTER_BYTE (PS_REGNUM)], MIPS_GREG_SIZE);
c906108c 113 bcopy (&mips_greg_packet[MIPS_R_LO],
c5aa993b 114 &registers[REGISTER_BYTE (LO_REGNUM)], MIPS_GREG_SIZE);
c906108c 115 bcopy (&mips_greg_packet[MIPS_R_HI],
c5aa993b 116 &registers[REGISTER_BYTE (HI_REGNUM)], MIPS_GREG_SIZE);
c906108c 117 bcopy (&mips_greg_packet[MIPS_R_PC],
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118 &registers[REGISTER_BYTE (PC_REGNUM)], MIPS_GREG_SIZE);
119
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120 /* If the target has floating point registers, fetch them.
121 Otherwise, zero the floating point register values in
122 registers[] for good measure, even though we might not
123 need to. */
c5aa993b 124
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125 if (target_has_fp)
126 {
127 net_read_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
128 PTRACE_GETFPREGS);
129
130 /* Copy the floating point registers. */
131
c5aa993b 132 bcopy (&mips_fpreg_packet[MIPS_R_FP0],
c906108c
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133 &registers[REGISTER_BYTE (FP0_REGNUM)],
134 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
135
136 /* Copy the floating point control/status register (fpcsr). */
137
c5aa993b 138 bcopy (&mips_fpreg_packet[MIPS_R_FPCSR],
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139 &registers[REGISTER_BYTE (FCRCS_REGNUM)],
140 REGISTER_RAW_SIZE (FCRCS_REGNUM));
c5aa993b 141 }
c906108c 142 else
c5aa993b 143 {
c906108c
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144 bzero ((char *) &registers[REGISTER_BYTE (FP0_REGNUM)],
145 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
146 bzero ((char *) &registers[REGISTER_BYTE (FCRCS_REGNUM)],
147 REGISTER_RAW_SIZE (FCRCS_REGNUM));
c5aa993b 148 }
c906108c
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149
150 /* Mark the register cache valid. */
151
152 registers_fetched ();
153}
154
155/* Store a register or registers into the VxWorks target.
156 REGNO is the register to store, or -1 for all; currently,
157 it is ignored. FIXME look at regno to improve efficiency. */
158
fba45db2 159vx_write_register (int regno)
c906108c
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160{
161 char mips_greg_packet[MIPS_GREG_PLEN];
162 char mips_fpreg_packet[MIPS_FPREG_PLEN];
163
164 /* Store general registers. */
165
166 bcopy (&registers[0], &mips_greg_packet[MIPS_R_GP0], 32 * MIPS_GREG_SIZE);
c5aa993b 167
c906108c 168 /* Copy SR, LO, HI, and PC. */
c5aa993b 169
c906108c 170 bcopy (&registers[REGISTER_BYTE (PS_REGNUM)],
c5aa993b 171 &mips_greg_packet[MIPS_R_SR], MIPS_GREG_SIZE);
c906108c 172 bcopy (&registers[REGISTER_BYTE (LO_REGNUM)],
c5aa993b 173 &mips_greg_packet[MIPS_R_LO], MIPS_GREG_SIZE);
c906108c 174 bcopy (&registers[REGISTER_BYTE (HI_REGNUM)],
c5aa993b 175 &mips_greg_packet[MIPS_R_HI], MIPS_GREG_SIZE);
c906108c 176 bcopy (&registers[REGISTER_BYTE (PC_REGNUM)],
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177 &mips_greg_packet[MIPS_R_PC], MIPS_GREG_SIZE);
178
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179 net_write_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_SETREGS);
180
181 /* Store floating point registers if the target has them. */
182
183 if (target_has_fp)
184 {
185 /* Copy the floating point data registers. */
186
187 bcopy (&registers[REGISTER_BYTE (FP0_REGNUM)],
c5aa993b 188 &mips_fpreg_packet[MIPS_R_FP0],
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189 REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
190
191 /* Copy the floating point control/status register (fpcsr). */
192
193 bcopy (&registers[REGISTER_BYTE (FCRCS_REGNUM)],
c5aa993b 194 &mips_fpreg_packet[MIPS_R_FPCSR],
c906108c
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195 REGISTER_RAW_SIZE (FCRCS_REGNUM));
196
197 net_write_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
198 PTRACE_SETFPREGS);
199 }
200}
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