(Register and Memory Data): Break sections
[deliverable/binutils-gdb.git] / gdb / rs6000-aix-tdep.c
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1/* Native support code for PPC AIX, for GDB the GNU debugger.
2
6aba47ca 3 Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24#include "defs.h"
7a61a01c 25#include "gdb_string.h"
1f82754b 26#include "osabi.h"
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27#include "regcache.h"
28#include "regset.h"
1f82754b 29#include "rs6000-tdep.h"
6f7f3f0d 30#include "ppc-tdep.h"
1f82754b 31
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32
33/* Core file support. */
34
35static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
36{
37 /* General-purpose registers. */
38 208, /* r0_offset */
39 24, /* pc_offset */
40 28, /* ps_offset */
41 32, /* cr_offset */
42 36, /* lr_offset */
43 40, /* ctr_offset */
44 44, /* xer_offset */
45 48, /* mq_offset */
46
47 /* Floating-point registers. */
48 336, /* f0_offset */
49 56, /* fpscr_offset */
50
51 /* AltiVec registers. */
52 -1, /* vr0_offset */
53 -1, /* vscr_offset */
54 -1 /* vrsave_offset */
55};
56
57static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
58{
59 /* General-purpose registers. */
60 0, /* r0_offset */
61 264, /* pc_offset */
62 256, /* ps_offset */
63 288, /* cr_offset */
64 272, /* lr_offset */
65 280, /* ctr_offset */
66 292, /* xer_offset */
67 -1, /* mq_offset */
68
69 /* Floating-point registers. */
70 312, /* f0_offset */
71 296, /* fpscr_offset */
72
73 /* AltiVec registers. */
74 -1, /* vr0_offset */
75 -1, /* vscr_offset */
76 -1 /* vrsave_offset */
77};
78
79
80/* Supply register REGNUM in the general-purpose register set REGSET
81 from the buffer specified by GREGS and LEN to register cache
82 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
83
84static void
85rs6000_aix_supply_regset (const struct regset *regset,
86 struct regcache *regcache, int regnum,
87 const void *gregs, size_t len)
88{
89 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
90
91 if (ppc_floating_point_unit_p (get_regcache_arch (regcache)))
92 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
93}
94
95/* Collect register REGNUM in the general-purpose register set
96 REGSET. from register cache REGCACHE into the buffer specified by
97 GREGS and LEN. If REGNUM is -1, do this for all registers in
98 REGSET. */
99
100static void
101rs6000_aix_collect_regset (const struct regset *regset,
102 const struct regcache *regcache, int regnum,
103 void *gregs, size_t len)
104{
105 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
106
107 if (ppc_floating_point_unit_p (get_regcache_arch (regcache)))
108 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
109}
110
111/* AIX register set. */
112
113static struct regset rs6000_aix32_regset =
114{
115 &rs6000_aix32_reg_offsets,
116 rs6000_aix_supply_regset,
117 rs6000_aix_collect_regset,
118};
119
120static struct regset rs6000_aix64_regset =
121{
122 &rs6000_aix64_reg_offsets,
123 rs6000_aix_supply_regset,
124 rs6000_aix_collect_regset,
125};
126
127/* Return the appropriate register set for the core section identified
128 by SECT_NAME and SECT_SIZE. */
129
130static const struct regset *
131rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
132 const char *sect_name, size_t sect_size)
133{
134 if (gdbarch_tdep (gdbarch)->wordsize == 4)
135 {
136 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
137 return &rs6000_aix32_regset;
138 }
139 else
140 {
141 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
142 return &rs6000_aix64_regset;
143 }
144
145 return NULL;
146}
147
148
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149static enum gdb_osabi
150rs6000_aix_osabi_sniffer (bfd *abfd)
151{
152
153 if (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
154 return GDB_OSABI_AIX;
155
156 return GDB_OSABI_UNKNOWN;
157}
158
159static void
160rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
161{
162 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
163 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
6f7f3f0d 164
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165 /* Core file support. */
166 set_gdbarch_regset_from_core_section
167 (gdbarch, rs6000_aix_regset_from_core_section);
168
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169 /* Minimum possible text address in AIX. */
170 gdbarch_tdep (gdbarch)->text_segment_base = 0x10000000;
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171}
172
173void
174_initialize_rs6000_aix_tdep (void)
175{
176 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
177 bfd_target_xcoff_flavour,
178 rs6000_aix_osabi_sniffer);
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179 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
180 bfd_target_xcoff_flavour,
181 rs6000_aix_osabi_sniffer);
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182
183 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
184 rs6000_aix_init_osabi);
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185 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
186 rs6000_aix_init_osabi);
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187}
188
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