* mdebugread.c (parse_symbol): Use new variable
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
18b46e7c 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
58 struct aix_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
81 if (absolute)
82 dest = immediate;
83 else
84 dest = pc + immediate;
85 break;
41abdfbd
JG
86
87 case 16 :
dc59e982 88 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
89 if (absolute)
90 dest = immediate;
91 else
92 dest = pc + immediate;
93 break;
94
95 case 19 :
96 ext_op = (instr>>1) & 0x3ff;
97
98 if (ext_op == 16) /* br conditional register */
99 dest = read_register (LR_REGNUM) & ~3;
100
101 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
102 {
103 dest = read_register (CTR_REGNUM) & ~3;
104
105 /* If we are about to execute a system call, dest is something
106 like 0x22fc or 0x3b00. Upon completion the system call
107 will return to the address in the link register. */
108 if (dest < TEXT_SEGMENT_BASE)
109 dest = read_register (LR_REGNUM) & ~3;
110 }
41abdfbd
JG
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
129 static char breakp[] = BREAKPOINT;
030fb5cb
JK
130 int ii, insn;
131 CORE_ADDR loc;
132 CORE_ADDR breaks[2];
133 int opcode;
41abdfbd
JG
134
135 if (!one_stepped) {
41abdfbd
JG
136 loc = read_pc ();
137
b112f2ae 138 insn = read_memory_integer (loc, 4);
41abdfbd
JG
139
140 breaks[0] = loc + INSNLEN(insn);
141 opcode = insn >> 26;
142 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
143
818de002
PB
144 /* Don't put two breakpoints on the same address. */
145 if (breaks[1] == breaks[0])
146 breaks[1] = -1;
147
030fb5cb 148 stepBreaks[1].address = 0;
41abdfbd
JG
149
150 for (ii=0; ii < 2; ++ii) {
151
152 /* ignore invalid breakpoint. */
153 if ( breaks[ii] == -1)
154 continue;
155
030fb5cb 156 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 157
030fb5cb 158 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
159 stepBreaks[ii].address = breaks[ii];
160 }
161
162 one_stepped = 1;
997cc2c0 163 } else {
41abdfbd
JG
164
165 /* remove step breakpoints. */
166 for (ii=0; ii < 2; ++ii)
030fb5cb 167 if (stepBreaks[ii].address != 0)
41abdfbd 168 write_memory
030fb5cb 169 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
170
171 one_stepped = 0;
172 }
997cc2c0 173 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 174 /* What errors? {read,write}_memory call error(). */
41abdfbd 175}
41abdfbd
JG
176
177
178/* return pc value after skipping a function prologue. */
179
180skip_prologue (pc)
ecf4059f 181CORE_ADDR pc;
41abdfbd 182{
34df79fc 183 char buf[4];
41abdfbd 184 unsigned int tmp;
34df79fc 185 unsigned long op;
41abdfbd 186
34df79fc 187 if (target_read_memory (pc, buf, 4))
41abdfbd 188 return pc; /* Can't access it -- assume no prologue. */
34df79fc 189 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
190
191 /* Assume that subsequent fetches can fail with low probability. */
192
193 if (op == 0x7c0802a6) { /* mflr r0 */
194 pc += 4;
195 op = read_memory_integer (pc, 4);
196 }
41abdfbd
JG
197
198 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
199 pc += 4;
200 op = read_memory_integer (pc, 4);
201 }
202
203 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
204 pc += 4;
205 op = read_memory_integer (pc, 4);
1eeba686
PB
206
207 /* At this point, make sure this is not a trampoline function
208 (a function that simply calls another functions, and nothing else).
209 If the next is not a nop, this branch was part of the function
210 prologue. */
211
629b6214 212 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
1eeba686 213 op == 0x0)
629b6214 214 return pc - 4; /* don't skip over this branch */
41abdfbd
JG
215 }
216
629b6214
MM
217 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
218 pc += 4; /* store floating register double */
cdb1cc92
ILT
219 op = read_memory_integer (pc, 4);
220 }
221
629b6214 222 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
41abdfbd
JG
223 pc += 4;
224 op = read_memory_integer (pc, 4);
225 }
226
e137e850 227 while ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */
629b6214
MM
228 (op & 0x03e00000) >= 0x01a00000) {
229 pc += 4;
230 op = read_memory_integer (pc, 4);
231 }
e137e850
PS
232
233 if (op == 0x90010008) { /* st r0,8(r1) */
234 pc += 4;
235 op = read_memory_integer (pc, 4);
236 }
237
238 if (op == 0x91810004) { /* st r12,4(r1) */
239 pc += 4;
240 op = read_memory_integer (pc, 4);
241 }
629b6214 242
e137e850 243 if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
41abdfbd
JG
244 pc += 4;
245 op = read_memory_integer (pc, 4);
246 }
247
248 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
249 pc += 4; /* l r30, ... */
250 op = read_memory_integer (pc, 4);
251 }
252
507e4004 253 /* store parameters into stack */
818de002
PB
254 while(
255 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
256 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
257 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
258 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
259 {
260 pc += 4; /* store fpr double */
261 op = read_memory_integer (pc, 4);
262 }
41abdfbd 263
d2985684
PS
264 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
265 || op == 0x7c3f0b78) { /* mr r31, r1 */
41abdfbd
JG
266 pc += 4; /* this happens if r31 is used as */
267 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
268
818de002
PB
269 tmp = 0;
270 while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
271 pc += 4; /* st r4, NUM(r31), ... */
41abdfbd 272 op = read_memory_integer (pc, 4);
818de002 273 tmp += 0x20;
41abdfbd
JG
274 }
275 }
507e4004
PB
276#if 0
277/* I have problems with skipping over __main() that I need to address
278 * sometime. Previously, I used to use misc_function_vector which
279 * didn't work as well as I wanted to be. -MGO */
280
281 /* If the first thing after skipping a prolog is a branch to a function,
282 this might be a call to an initializer in main(), introduced by gcc2.
283 We'd like to skip over it as well. Fortunately, xlc does some extra
284 work before calling a function right after a prologue, thus we can
285 single out such gcc2 behaviour. */
286
287
288 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
289 op = read_memory_integer (pc+4, 4);
290
291 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
292
293 /* check and see if we are in main. If so, skip over this initializer
294 function as well. */
295
296 tmp = find_pc_misc_function (pc);
2e4964ad 297 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
298 return pc + 8;
299 }
300 }
301#endif /* 0 */
302
41abdfbd
JG
303 return pc;
304}
305
818de002 306
41abdfbd
JG
307/*************************************************************************
308 Support for creating pushind a dummy frame into the stack, and popping
309 frames, etc.
310*************************************************************************/
311
818de002
PB
312/* The total size of dummy frame is 436, which is;
313
314 32 gpr's - 128 bytes
315 32 fpr's - 256 "
316 7 the rest - 28 "
317 and 24 extra bytes for the callee's link area. The last 24 bytes
318 for the link area might not be necessary, since it will be taken
319 care of by push_arguments(). */
320
321#define DUMMY_FRAME_SIZE 436
322
41abdfbd
JG
323#define DUMMY_FRAME_ADDR_SIZE 10
324
325/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 326 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
327
328static int dummy_frame_count = 0;
329static int dummy_frame_size = 0;
330static CORE_ADDR *dummy_frame_addr = 0;
331
332extern int stop_stack_dummy;
333
334/* push a dummy frame into stack, save all register. Currently we are saving
335 only gpr's and fpr's, which is not good enough! FIXMEmgo */
336
ecf4059f 337void
41abdfbd
JG
338push_dummy_frame ()
339{
359a097f
JK
340 /* stack pointer. */
341 CORE_ADDR sp;
b112f2ae
JK
342 /* Same thing, target byte order. */
343 char sp_targ[4];
359a097f
JK
344
345 /* link register. */
346 CORE_ADDR pc;
347 /* Same thing, target byte order. */
348 char pc_targ[4];
349
41abdfbd
JG
350 int ii;
351
5f1c39ef 352 target_fetch_registers (-1);
6c6afbb9 353
41abdfbd
JG
354 if (dummy_frame_count >= dummy_frame_size) {
355 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
356 if (dummy_frame_addr)
357 dummy_frame_addr = (CORE_ADDR*) xrealloc
358 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
359 else
360 dummy_frame_addr = (CORE_ADDR*)
361 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
362 }
363
364 sp = read_register(SP_REGNUM);
359a097f 365 pc = read_register(PC_REGNUM);
5816555b 366 store_address (pc_targ, 4, pc);
41abdfbd
JG
367
368 dummy_frame_addr [dummy_frame_count++] = sp;
369
370 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 371 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
372 uses that area for IPC purposes when executing ptrace(2) calls. So
373 before writing register values into the new frame, decrement and update
374 %sp first in order to secure your frame. */
375
818de002 376 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 377
41abdfbd
JG
378 /* gdb relies on the state of current_frame. We'd better update it,
379 otherwise things like do_registers_info() wouldn't work properly! */
380
381 flush_cached_frames ();
41abdfbd
JG
382
383 /* save program counter in link register's space. */
359a097f 384 write_memory (sp+8, pc_targ, 4);
41abdfbd 385
6c6afbb9 386 /* save all floating point and general purpose registers here. */
41abdfbd
JG
387
388 /* fpr's, f0..f31 */
389 for (ii = 0; ii < 32; ++ii)
390 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
391
392 /* gpr's r0..r31 */
393 for (ii=1; ii <=32; ++ii)
394 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
395
818de002
PB
396 /* so far, 32*2 + 32 words = 384 bytes have been written.
397 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
398
399 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
400 write_memory (sp-384-(ii*4),
401 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
402 }
403
404 /* Save sp or so called back chain right here. */
b112f2ae
JK
405 store_address (sp_targ, 4, sp);
406 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 407 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
408
409 /* And finally, this is the back chain. */
359a097f 410 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
411}
412
413
414/* Pop a dummy frame.
415
416 In rs6000 when we push a dummy frame, we save all of the registers. This
417 is usually done before user calls a function explicitly.
418
818de002
PB
419 After a dummy frame is pushed, some instructions are copied into stack,
420 and stack pointer is decremented even more. Since we don't have a frame
421 pointer to get back to the parent frame of the dummy, we start having
422 trouble poping it. Therefore, we keep a dummy frame stack, keeping
423 addresses of dummy frames as such. When poping happens and when we
424 detect that was a dummy frame, we pop it back to its parent by using
425 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
426
427FIXME: This whole concept is broken. You should be able to detect
428a dummy stack frame *on the user's stack itself*. When you do,
429then you know the format of that stack frame -- including its
430saved SP register! There should *not* be a separate stack in the
d6434f39 431GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
432 */
433
434pop_dummy_frame ()
435{
436 CORE_ADDR sp, pc;
437 int ii;
438 sp = dummy_frame_addr [--dummy_frame_count];
439
440 /* restore all fpr's. */
441 for (ii = 1; ii <= 32; ++ii)
442 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
443
444 /* restore all gpr's */
445 for (ii=1; ii <= 32; ++ii) {
446 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
447 }
448
818de002
PB
449 /* restore the rest of the registers. */
450 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
451 read_memory (sp-384-(ii*4),
452 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
453
454 read_memory (sp-(DUMMY_FRAME_SIZE-8),
455 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
456
457 /* when a dummy frame was being pushed, we had to decrement %sp first, in
458 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
459 one we should restore. Change it with the one we need. */
460
461 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
462
463 /* Now we can restore all registers. */
464
5f1c39ef 465 target_store_registers (-1);
41abdfbd
JG
466 pc = read_pc ();
467 flush_cached_frames ();
41abdfbd
JG
468}
469
470
471/* pop the innermost frame, go back to the caller. */
472
ecf4059f 473void
41abdfbd
JG
474pop_frame ()
475{
359a097f 476 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
6c6afbb9 477 struct aix_framedata fdata;
669caa9c 478 struct frame_info *frame = get_current_frame ();
41abdfbd 479 int addr, ii;
41abdfbd
JG
480
481 pc = read_pc ();
669caa9c 482 sp = FRAME_FP (frame);
41abdfbd
JG
483
484 if (stop_stack_dummy && dummy_frame_count) {
485 pop_dummy_frame ();
486 return;
487 }
488
07aa9fdc
PS
489 /* Make sure that all registers are valid. */
490 read_register_bytes (0, NULL, REGISTER_BYTES);
491
41abdfbd
JG
492 /* figure out previous %pc value. If the function is frameless, it is
493 still in the link register, otherwise walk the frames and retrieve the
494 saved %pc value in the previous frame. */
495
34a1a3bf 496 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
6c6afbb9 497 function_frame_info (addr, &fdata);
41abdfbd 498
6c6afbb9 499 if (fdata.frameless)
07aa9fdc
PS
500 prev_sp = sp;
501 else
502 prev_sp = read_memory_integer (sp, 4);
503 if (fdata.nosavedpc)
41abdfbd
JG
504 lr = read_register (LR_REGNUM);
505 else
359a097f 506 lr = read_memory_integer (prev_sp+8, 4);
41abdfbd
JG
507
508 /* reset %pc value. */
509 write_register (PC_REGNUM, lr);
510
511 /* reset register values if any was saved earlier. */
6c6afbb9 512 addr = prev_sp - fdata.offset;
41abdfbd 513
6c6afbb9 514 if (fdata.saved_gpr != -1)
669caa9c 515 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 516 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 517 addr += 4;
41abdfbd
JG
518 }
519
6c6afbb9 520 if (fdata.saved_fpr != -1)
669caa9c 521 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
522 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
523 addr += 8;
524 }
525
526 write_register (SP_REGNUM, prev_sp);
5f1c39ef 527 target_store_registers (-1);
41abdfbd 528 flush_cached_frames ();
41abdfbd
JG
529}
530
41abdfbd
JG
531/* fixup the call sequence of a dummy function, with the real function address.
532 its argumets will be passed by gdb. */
533
ecf4059f 534void
41abdfbd
JG
535fix_call_dummy(dummyname, pc, fun, nargs, type)
536 char *dummyname;
ecf4059f
JG
537 CORE_ADDR pc;
538 CORE_ADDR fun;
41abdfbd
JG
539 int nargs; /* not used */
540 int type; /* not used */
41abdfbd
JG
541{
542#define TOC_ADDR_OFFSET 20
543#define TARGET_ADDR_OFFSET 28
544
545 int ii;
ecf4059f
JG
546 CORE_ADDR target_addr;
547 CORE_ADDR tocvalue;
41abdfbd
JG
548
549 target_addr = fun;
550 tocvalue = find_toc_address (target_addr);
551
552 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
553 ii = (ii & 0xffff0000) | (tocvalue >> 16);
554 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
555
556 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
557 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
558 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
559
560 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
561 ii = (ii & 0xffff0000) | (target_addr >> 16);
562 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
563
564 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
565 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
566 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
567}
568
569
41abdfbd 570/* return information about a function frame.
6c6afbb9 571 in struct aix_frameinfo fdata:
cdb1cc92
ILT
572 - frameless is TRUE, if function does not have a frame.
573 - nosavedpc is TRUE, if function does not save %pc value in its frame.
41abdfbd
JG
574 - offset is the number of bytes used in the frame to save registers.
575 - saved_gpr is the number of the first saved gpr.
576 - saved_fpr is the number of the first saved fpr.
6c6afbb9
PB
577 - alloca_reg is the number of the register used for alloca() handling.
578 Otherwise -1.
41abdfbd 579 */
ecf4059f 580void
6c6afbb9 581function_frame_info (pc, fdata)
d6434f39 582 CORE_ADDR pc;
6c6afbb9 583 struct aix_framedata *fdata;
41abdfbd
JG
584{
585 unsigned int tmp;
586 register unsigned int op;
9ed8604f 587 char buf[4];
41abdfbd 588
6c6afbb9
PB
589 fdata->offset = 0;
590 fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
cdb1cc92 591 fdata->frameless = 1;
41abdfbd 592
9ed8604f
PS
593 /* Do not error out if we can't access the instructions. */
594 if (target_read_memory (pc, buf, 4))
595 return;
596 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
597 if (op == 0x7c0802a6) { /* mflr r0 */
598 pc += 4;
599 op = read_memory_integer (pc, 4);
cdb1cc92 600 fdata->nosavedpc = 0;
6c6afbb9 601 fdata->frameless = 0;
41abdfbd 602 }
cdb1cc92
ILT
603 else /* else, pc is not saved */
604 fdata->nosavedpc = 1;
41abdfbd
JG
605
606 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
607 pc += 4;
608 op = read_memory_integer (pc, 4);
cdb1cc92 609 fdata->frameless = 0;
41abdfbd
JG
610 }
611
612 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
613 pc += 4;
614 op = read_memory_integer (pc, 4);
1eeba686
PB
615 /* At this point, make sure this is not a trampoline function
616 (a function that simply calls another functions, and nothing else).
617 If the next is not a nop, this branch was part of the function
618 prologue. */
619
620 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
621 op == 0x0)
622 return; /* prologue is over */
cdb1cc92 623 fdata->frameless = 0;
41abdfbd
JG
624 }
625
626 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
627 pc += 4; /* store floating register double */
628 op = read_memory_integer (pc, 4);
cdb1cc92 629 fdata->frameless = 0;
41abdfbd
JG
630 }
631
632 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
633 int tmp2;
6c6afbb9 634 fdata->saved_gpr = (op >> 21) & 0x1f;
41abdfbd
JG
635 tmp2 = op & 0xffff;
636 if (tmp2 > 0x7fff)
cdb1cc92 637 tmp2 = (~0 &~ 0xffff) | tmp2;
41abdfbd
JG
638
639 if (tmp2 < 0) {
640 tmp2 = tmp2 * -1;
6c6afbb9
PB
641 fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
642 if ( fdata->saved_fpr > 0)
643 fdata->saved_fpr = 32 - fdata->saved_fpr;
41abdfbd 644 else
6c6afbb9 645 fdata->saved_fpr = -1;
41abdfbd 646 }
6c6afbb9
PB
647 fdata->offset = tmp2;
648 pc += 4;
649 op = read_memory_integer (pc, 4);
cdb1cc92 650 fdata->frameless = 0;
41abdfbd 651 }
6c6afbb9
PB
652
653 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
654 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 655 (tmp == 0x93e1)) /* st r31, NUM(r1) */
6c6afbb9 656 {
cdb1cc92
ILT
657 int tmp2;
658
6c6afbb9
PB
659 /* gcc takes a short cut and uses this instruction to save r31 only. */
660
cdb1cc92 661 if (tmp == 0x93e1) {
6c6afbb9
PB
662 if (fdata->offset)
663/* fatal ("Unrecognized prolog."); */
199b2450 664 printf_unfiltered ("Unrecognized prolog!\n");
6c6afbb9
PB
665
666 fdata->saved_gpr = 31;
cdb1cc92
ILT
667 tmp2 = op & 0xffff;
668 if (tmp2 > 0x7fff) {
669 tmp2 = - ((~0 &~ 0xffff) | tmp2);
670 fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
671 if ( fdata->saved_fpr > 0)
672 fdata->saved_fpr = 32 - fdata->saved_fpr;
673 else
674 fdata->saved_fpr = -1;
675 }
676 fdata->offset = tmp2;
6c6afbb9
PB
677 }
678 pc += 4;
679 op = read_memory_integer (pc, 4);
cdb1cc92 680 fdata->frameless = 0;
6c6afbb9
PB
681 }
682
683 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
684 pc += 4; /* l r30, ... */
685 op = read_memory_integer (pc, 4);
cdb1cc92 686 fdata->frameless = 0;
6c6afbb9
PB
687 }
688
689 /* store parameters into stack */
690 while(
691 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
692 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
693 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
694 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
695 {
696 pc += 4; /* store fpr double */
697 op = read_memory_integer (pc, 4);
cdb1cc92 698 fdata->frameless = 0;
6c6afbb9
PB
699 }
700
07aa9fdc
PS
701 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
702 || op == 0x7c3f0b78) /* mr r31, r1 */
703 {
704 fdata->alloca_reg = 31;
705 fdata->frameless = 0;
706 }
41abdfbd
JG
707}
708
709
710/* Pass the arguments in either registers, or in the stack. In RS6000, the first
711 eight words of the argument list (that might be less than eight parameters if
712 some parameters occupy more than one word) are passed in r3..r11 registers.
713 float and double parameters are passed in fpr's, in addition to that. Rest of
714 the parameters if any are passed in user stack. There might be cases in which
715 half of the parameter is copied into registers, the other half is pushed into
716 stack.
717
718 If the function is returning a structure, then the return address is passed
719 in r3, then the first 7 words of the parametes can be passed in registers,
720 starting from r4. */
721
722CORE_ADDR
723push_arguments (nargs, args, sp, struct_return, struct_addr)
724 int nargs;
17221e41 725 value_ptr *args;
41abdfbd
JG
726 CORE_ADDR sp;
727 int struct_return;
728 CORE_ADDR struct_addr;
729{
730 int ii, len;
731 int argno; /* current argument number */
732 int argbytes; /* current argument byte */
733 char tmp_buffer [50];
17221e41 734 value_ptr arg;
41abdfbd
JG
735 int f_argno = 0; /* current floating point argno */
736
737 CORE_ADDR saved_sp, pc;
738
739 if ( dummy_frame_count <= 0)
199b2450 740 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
741
742 /* The first eight words of ther arguments are passed in registers. Copy
743 them appropriately.
744
745 If the function is returning a `struct', then the first word (which
746 will be passed in r3) is used for struct return address. In that
747 case we should advance one word and start from r4 register to copy
748 parameters. */
749
750 ii = struct_return ? 1 : 0;
751
752 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
753
5222ca60 754 arg = args[argno];
41abdfbd
JG
755 len = TYPE_LENGTH (VALUE_TYPE (arg));
756
757 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
758
759 /* floating point arguments are passed in fpr's, as well as gpr's.
760 There are 13 fpr's reserved for passing parameters. At this point
761 there is no way we would run out of them. */
762
763 if (len > 8)
199b2450 764 printf_unfiltered (
41abdfbd
JG
765"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
766
ade40d31
RP
767 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
768 len);
41abdfbd
JG
769 ++f_argno;
770 }
771
772 if (len > 4) {
773
774 /* Argument takes more than one register. */
775 while (argbytes < len) {
776
777 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
778 memcpy (&registers[REGISTER_BYTE(ii+3)],
779 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
780 (len - argbytes) > 4 ? 4 : len - argbytes);
781 ++ii, argbytes += 4;
782
783 if (ii >= 8)
784 goto ran_out_of_registers_for_arguments;
785 }
786 argbytes = 0;
787 --ii;
788 }
789 else { /* Argument can fit in one register. No problem. */
790 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 791 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
792 }
793 ++argno;
794 }
795
796ran_out_of_registers_for_arguments:
797
798 /* location for 8 parameters are always reserved. */
799 sp -= 4 * 8;
800
801 /* another six words for back chain, TOC register, link register, etc. */
802 sp -= 24;
803
804 /* if there are more arguments, allocate space for them in
805 the stack, then push them starting from the ninth one. */
806
807 if ((argno < nargs) || argbytes) {
808 int space = 0, jj;
17221e41 809 value_ptr val;
41abdfbd
JG
810
811 if (argbytes) {
812 space += ((len - argbytes + 3) & -4);
813 jj = argno + 1;
814 }
815 else
816 jj = argno;
817
818 for (; jj < nargs; ++jj) {
5222ca60 819 val = args[jj];
41abdfbd
JG
820 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
821 }
822
823 /* add location required for the rest of the parameters */
824 space = (space + 7) & -8;
825 sp -= space;
826
827 /* This is another instance we need to be concerned about securing our
828 stack space. If we write anything underneath %sp (r1), we might conflict
829 with the kernel who thinks he is free to use this area. So, update %sp
830 first before doing anything else. */
831
832 write_register (SP_REGNUM, sp);
833
41abdfbd
JG
834 /* if the last argument copied into the registers didn't fit there
835 completely, push the rest of it into stack. */
836
837 if (argbytes) {
838 write_memory (
839 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
840 ++argno;
841 ii += ((len - argbytes + 3) & -4) / 4;
842 }
843
844 /* push the rest of the arguments into stack. */
845 for (; argno < nargs; ++argno) {
846
5222ca60 847 arg = args[argno];
41abdfbd
JG
848 len = TYPE_LENGTH (VALUE_TYPE (arg));
849
850
851 /* float types should be passed in fpr's, as well as in the stack. */
852 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
853
854 if (len > 8)
199b2450 855 printf_unfiltered (
41abdfbd
JG
856"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
857
ade40d31
RP
858 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
859 len);
41abdfbd
JG
860 ++f_argno;
861 }
862
359a097f 863 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
864 ii += ((len + 3) & -4) / 4;
865 }
866 }
6c6afbb9 867 else
41abdfbd
JG
868 /* Secure stack areas first, before doing anything else. */
869 write_register (SP_REGNUM, sp);
870
41abdfbd
JG
871 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
872 read_memory (saved_sp, tmp_buffer, 24);
873 write_memory (sp, tmp_buffer, 24);
874
b112f2ae
JK
875 /* set back chain properly */
876 store_address (tmp_buffer, 4, saved_sp);
877 write_memory (sp, tmp_buffer, 4);
41abdfbd 878
5f1c39ef 879 target_store_registers (-1);
41abdfbd
JG
880 return sp;
881}
882
883/* a given return value in `regbuf' with a type `valtype', extract and copy its
884 value into `valbuf' */
885
ecf4059f 886void
41abdfbd
JG
887extract_return_value (valtype, regbuf, valbuf)
888 struct type *valtype;
889 char regbuf[REGISTER_BYTES];
890 char *valbuf;
891{
892
893 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
894
895 double dd; float ff;
896 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
897 We need to truncate the return value into float size (4 byte) if
898 necessary. */
899
900 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 901 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
902 TYPE_LENGTH (valtype));
903 else { /* float */
ade40d31 904 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 905 ff = (float)dd;
ade40d31 906 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
907 }
908 }
909 else
910 /* return value is copied starting from r3. */
ade40d31 911 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
912}
913
914
ecf4059f
JG
915/* keep structure return address in this variable.
916 FIXME: This is a horrid kludge which should not be allowed to continue
917 living. This only allows a single nested call to a structure-returning
918 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
919
920CORE_ADDR rs6000_struct_return_address;
921
922
c2e4669f
JG
923/* Indirect function calls use a piece of trampoline code to do context
924 switching, i.e. to set the new TOC table. Skip such code if we are on
925 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
926 Also skip shared library trampoline code (which is different from
927 indirect function call trampolines).
c2e4669f
JG
928 Result is desired PC to step until, or NULL if we are not in
929 trampoline code. */
41abdfbd 930
ecf4059f 931CORE_ADDR
41abdfbd 932skip_trampoline_code (pc)
ecf4059f 933CORE_ADDR pc;
41abdfbd
JG
934{
935 register unsigned int ii, op;
07aa9fdc 936 CORE_ADDR solib_target_pc;
41abdfbd
JG
937
938 static unsigned trampoline_code[] = {
939 0x800b0000, /* l r0,0x0(r11) */
940 0x90410014, /* st r2,0x14(r1) */
941 0x7c0903a6, /* mtctr r0 */
942 0x804b0004, /* l r2,0x4(r11) */
943 0x816b0008, /* l r11,0x8(r11) */
944 0x4e800420, /* bctr */
945 0x4e800020, /* br */
946 0
947 };
948
07aa9fdc
PS
949 /* If pc is in a shared library trampoline, return its target. */
950 solib_target_pc = find_solib_trampoline_target (pc);
951 if (solib_target_pc)
952 return solib_target_pc;
953
41abdfbd
JG
954 for (ii=0; trampoline_code[ii]; ++ii) {
955 op = read_memory_integer (pc + (ii*4), 4);
956 if (op != trampoline_code [ii])
359a097f 957 return 0;
41abdfbd
JG
958 }
959 ii = read_register (11); /* r11 holds destination addr */
960 pc = read_memory_integer (ii, 4); /* (r11) value */
961 return pc;
962}
963
ecf4059f
JG
964
965/* Determines whether the function FI has a frame on the stack or not.
cdb1cc92
ILT
966 Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
967 second argument of 0, and from the FRAME_SAVED_PC macro with a
968 second argument of 1. */
ecf4059f
JG
969
970int
cdb1cc92 971frameless_function_invocation (fi, pcsaved)
ecf4059f 972struct frame_info *fi;
cdb1cc92 973int pcsaved;
ecf4059f
JG
974{
975 CORE_ADDR func_start;
976 struct aix_framedata fdata;
977
b0e932ad
JK
978 if (fi->next != NULL)
979 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
980 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
981 a signal happens while executing in a frameless function). */
b0e932ad
JK
982 return 0;
983
ecf4059f
JG
984 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
985
986 /* If we failed to find the start of the function, it is a mistake
987 to inspect the instructions. */
988
989 if (!func_start)
990 return 0;
991
992 function_frame_info (func_start, &fdata);
cdb1cc92 993 return pcsaved ? fdata.nosavedpc : fdata.frameless;
ecf4059f
JG
994}
995
996
997/* If saved registers of frame FI are not known yet, read and cache them.
998 &FDATAP contains aix_framedata; TDATAP can be NULL,
999 in which case the framedata are read. */
1000
1001static void
1002frame_get_cache_fsr (fi, fdatap)
1003 struct frame_info *fi;
1004 struct aix_framedata *fdatap;
1005{
1006 int ii;
1007 CORE_ADDR frame_addr;
1008 struct aix_framedata work_fdata;
1009
1010 if (fi->cache_fsr)
1011 return;
1012
1013 if (fdatap == NULL) {
1014 fdatap = &work_fdata;
1015 function_frame_info (get_pc_function_start (fi->pc), fdatap);
1016 }
1017
1018 fi->cache_fsr = (struct frame_saved_regs *)
1019 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1020 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1021
1022 if (fi->prev && fi->prev->frame)
1023 frame_addr = fi->prev->frame;
1024 else
1025 frame_addr = read_memory_integer (fi->frame, 4);
1026
1027 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1028 All fpr's from saved_fpr to fp31 are saved right underneath caller
1029 stack pointer, starting from fp31 first. */
1030
1031 if (fdatap->saved_fpr >= 0) {
1032 for (ii=31; ii >= fdatap->saved_fpr; --ii)
1033 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
1034 frame_addr -= (32 - fdatap->saved_fpr) * 8;
1035 }
1036
1037 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1038 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
1039 starting from r31 first. */
1040
1041 if (fdatap->saved_gpr >= 0)
1042 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1043 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1044}
1045
1046/* Return the address of a frame. This is the inital %sp value when the frame
1047 was first allocated. For functions calling alloca(), it might be saved in
1048 an alloca register. */
1049
1050CORE_ADDR
1051frame_initial_stack_address (fi)
1052 struct frame_info *fi;
1053{
1054 CORE_ADDR tmpaddr;
1055 struct aix_framedata fdata;
1056 struct frame_info *callee_fi;
1057
1058 /* if the initial stack pointer (frame address) of this frame is known,
1059 just return it. */
1060
1061 if (fi->initial_sp)
1062 return fi->initial_sp;
1063
1064 /* find out if this function is using an alloca register.. */
1065
1066 function_frame_info (get_pc_function_start (fi->pc), &fdata);
1067
1068 /* if saved registers of this frame are not known yet, read and cache them. */
1069
1070 if (!fi->cache_fsr)
1071 frame_get_cache_fsr (fi, &fdata);
1072
1073 /* If no alloca register used, then fi->frame is the value of the %sp for
1074 this frame, and it is good enough. */
1075
1076 if (fdata.alloca_reg < 0) {
1077 fi->initial_sp = fi->frame;
1078 return fi->initial_sp;
1079 }
1080
1081 /* This function has an alloca register. If this is the top-most frame
1082 (with the lowest address), the value in alloca register is good. */
1083
1084 if (!fi->next)
1085 return fi->initial_sp = read_register (fdata.alloca_reg);
1086
1087 /* Otherwise, this is a caller frame. Callee has usually already saved
1088 registers, but there are exceptions (such as when the callee
1089 has no parameters). Find the address in which caller's alloca
1090 register is saved. */
1091
1092 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1093
1094 if (!callee_fi->cache_fsr)
cdb1cc92 1095 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1096
1097 /* this is the address in which alloca register is saved. */
1098
1099 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1100 if (tmpaddr) {
1101 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1102 return fi->initial_sp;
1103 }
1104
1105 /* Go look into deeper levels of the frame chain to see if any one of
1106 the callees has saved alloca register. */
1107 }
1108
1109 /* If alloca register was not saved, by the callee (or any of its callees)
1110 then the value in the register is still good. */
1111
1112 return fi->initial_sp = read_register (fdata.alloca_reg);
1113}
1114
669caa9c 1115CORE_ADDR
f3649227
JK
1116rs6000_frame_chain (thisframe)
1117 struct frame_info *thisframe;
1118{
669caa9c 1119 CORE_ADDR fp;
f3649227
JK
1120 if (inside_entry_file ((thisframe)->pc))
1121 return 0;
cee86be3 1122 if (thisframe->signal_handler_caller)
9ed8604f 1123 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
cee86be3
JK
1124 else
1125 fp = read_memory_integer ((thisframe)->frame, 4);
1126
f3649227
JK
1127 return fp;
1128}
ecf4059f
JG
1129\f
1130/* Keep an array of load segment information and their TOC table addresses.
1131 This info will be useful when calling a shared library function by hand. */
1132
1133struct loadinfo {
1134 CORE_ADDR textorg, dataorg;
1135 unsigned long toc_offset;
1136};
1137
1138#define LOADINFOLEN 10
1139
ecf4059f
JG
1140static struct loadinfo *loadinfo = NULL;
1141static int loadinfolen = 0;
1142static int loadinfotocindex = 0;
3c02636b 1143static int loadinfotextindex = 0;
ecf4059f
JG
1144
1145
1146void
1147xcoff_init_loadinfo ()
1148{
1149 loadinfotocindex = 0;
1150 loadinfotextindex = 0;
1151
1152 if (loadinfolen == 0) {
1153 loadinfo = (struct loadinfo *)
1154 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1155 loadinfolen = LOADINFOLEN;
1156 }
1157}
1158
1159
1160/* FIXME -- this is never called! */
1161void
1162free_loadinfo ()
1163{
1164 if (loadinfo)
1165 free (loadinfo);
1166 loadinfo = NULL;
1167 loadinfolen = 0;
1168 loadinfotocindex = 0;
1169 loadinfotextindex = 0;
1170}
1171
1172/* this is called from xcoffread.c */
1173
1174void
1175xcoff_add_toc_to_loadinfo (unsigned long tocoff)
1176{
1177 while (loadinfotocindex >= loadinfolen) {
1178 loadinfolen += LOADINFOLEN;
1179 loadinfo = (struct loadinfo *)
1180 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1181 }
1182 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1183}
1184
2aefe6e4 1185void
ecf4059f
JG
1186add_text_to_loadinfo (textaddr, dataaddr)
1187 CORE_ADDR textaddr;
1188 CORE_ADDR dataaddr;
1189{
1190 while (loadinfotextindex >= loadinfolen) {
1191 loadinfolen += LOADINFOLEN;
1192 loadinfo = (struct loadinfo *)
1193 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1194 }
1195 loadinfo [loadinfotextindex].textorg = textaddr;
1196 loadinfo [loadinfotextindex].dataorg = dataaddr;
1197 ++loadinfotextindex;
1198}
1199
1200
1201/* FIXME: This assumes that the "textorg" and "dataorg" elements
1202 of a member of this array are correlated with the "toc_offset"
1203 element of the same member. But they are sequentially assigned in wildly
1204 different places, and probably there is no correlation. FIXME! */
1205
1206static CORE_ADDR
1207find_toc_address (pc)
1208 CORE_ADDR pc;
1209{
1210 int ii, toc_entry, tocbase = 0;
1211
1212 for (ii=0; ii < loadinfotextindex; ++ii)
1213 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1214 toc_entry = ii;
1215 tocbase = loadinfo[ii].textorg;
1216 }
1217
1218 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1219}
18b46e7c
SS
1220
1221void
1222_initialize_rs6000_tdep ()
1223{
1224 /* FIXME, this should not be decided via ifdef. */
1225#ifdef GDB_TARGET_POWERPC
1226 tm_print_insn = print_insn_big_powerpc;
1227#else
1228 tm_print_insn = print_insn_rs6000;
1229#endif
1230}
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