Add alignment option.
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
211b564e 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
6c9638b4 19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
41abdfbd 20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
65eaea27
JL
27#include "symfile.h"
28#include "objfiles.h"
2aefe6e4
JK
29#include "xcoffsolib.h"
30
d6434f39
JG
31extern struct obstack frame_cache_obstack;
32
41abdfbd 33extern int errno;
41abdfbd
JG
34
35/* Nonzero if we just simulated a single step break. */
36int one_stepped;
37
41abdfbd
JG
38/* Breakpoint shadows for the single step instructions will be kept here. */
39
40static struct sstep_breaks {
030fb5cb
JK
41 /* Address, or 0 if this is not in use. */
42 CORE_ADDR address;
43 /* Shadow contents. */
44 char data[4];
41abdfbd
JG
45} stepBreaks[2];
46
05d52ace
PS
47/* Hook for determining the TOC address when calling functions in the
48 inferior under AIX. The initialization code in rs6000-nat.c sets
49 this hook to point to find_toc_address. */
50
51CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL;
ecf4059f 52
05d52ace 53/* Static function prototypes */
ecf4059f 54
cd8a3d84
SS
55static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
56 CORE_ADDR safety));
ecf4059f 57
cd8a3d84
SS
58static void frame_get_cache_fsr PARAMS ((struct frame_info *fi,
59 struct rs6000_framedata *fdatap));
60
368f1e77
FF
61static void pop_dummy_frame PARAMS ((void));
62
cd8a3d84 63/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
41abdfbd 64
ecf4059f 65static CORE_ADDR
41abdfbd 66branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
67 int opcode;
68 int instr;
69 CORE_ADDR pc;
70 CORE_ADDR safety;
41abdfbd 71{
ecf4059f 72 CORE_ADDR dest;
41abdfbd
JG
73 int immediate;
74 int absolute;
75 int ext_op;
76
77 absolute = (int) ((instr >> 1) & 1);
78
79 switch (opcode) {
80 case 18 :
ecf4059f 81 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
82 if (absolute)
83 dest = immediate;
84 else
85 dest = pc + immediate;
86 break;
41abdfbd
JG
87
88 case 16 :
dc59e982 89 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
90 if (absolute)
91 dest = immediate;
92 else
93 dest = pc + immediate;
94 break;
95
96 case 19 :
97 ext_op = (instr>>1) & 0x3ff;
98
99 if (ext_op == 16) /* br conditional register */
100 dest = read_register (LR_REGNUM) & ~3;
101
102 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
103 {
104 dest = read_register (CTR_REGNUM) & ~3;
105
106 /* If we are about to execute a system call, dest is something
107 like 0x22fc or 0x3b00. Upon completion the system call
108 will return to the address in the link register. */
109 if (dest < TEXT_SEGMENT_BASE)
110 dest = read_register (LR_REGNUM) & ~3;
111 }
41abdfbd
JG
112 else return -1;
113 break;
114
115 default: return -1;
116 }
818de002 117 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
118}
119
120
121
122/* AIX does not support PT_STEP. Simulate it. */
123
997cc2c0 124void
41abdfbd 125single_step (signal)
b607efe7 126 enum target_signal signal;
41abdfbd
JG
127{
128#define INSNLEN(OPCODE) 4
129
5c172b4b
MM
130 static char le_breakp[] = LITTLE_BREAKPOINT;
131 static char be_breakp[] = BIG_BREAKPOINT;
132 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
030fb5cb
JK
133 int ii, insn;
134 CORE_ADDR loc;
135 CORE_ADDR breaks[2];
136 int opcode;
41abdfbd
JG
137
138 if (!one_stepped) {
41abdfbd
JG
139 loc = read_pc ();
140
b112f2ae 141 insn = read_memory_integer (loc, 4);
41abdfbd
JG
142
143 breaks[0] = loc + INSNLEN(insn);
144 opcode = insn >> 26;
145 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
146
818de002
PB
147 /* Don't put two breakpoints on the same address. */
148 if (breaks[1] == breaks[0])
149 breaks[1] = -1;
150
030fb5cb 151 stepBreaks[1].address = 0;
41abdfbd
JG
152
153 for (ii=0; ii < 2; ++ii) {
154
155 /* ignore invalid breakpoint. */
156 if ( breaks[ii] == -1)
157 continue;
158
030fb5cb 159 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 160
030fb5cb 161 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
162 stepBreaks[ii].address = breaks[ii];
163 }
164
165 one_stepped = 1;
997cc2c0 166 } else {
41abdfbd
JG
167
168 /* remove step breakpoints. */
169 for (ii=0; ii < 2; ++ii)
030fb5cb 170 if (stepBreaks[ii].address != 0)
41abdfbd 171 write_memory
030fb5cb 172 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
173
174 one_stepped = 0;
175 }
997cc2c0 176 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 177 /* What errors? {read,write}_memory call error(). */
41abdfbd 178}
41abdfbd
JG
179
180
068c9fd6
MM
181/* return pc value after skipping a function prologue and also return
182 information about a function frame.
41abdfbd 183
068c9fd6
MM
184 in struct rs6000_frameinfo fdata:
185 - frameless is TRUE, if function does not have a frame.
186 - nosavedpc is TRUE, if function does not save %pc value in its frame.
187 - offset is the number of bytes used in the frame to save registers.
188 - saved_gpr is the number of the first saved gpr.
189 - saved_fpr is the number of the first saved fpr.
190 - alloca_reg is the number of the register used for alloca() handling.
191 Otherwise -1.
192 - gpr_offset is the offset of the saved gprs
193 - fpr_offset is the offset of the saved fprs
194 - lr_offset is the offset of the saved lr
195 - cr_offset is the offset of the saved cr
196 */
197
198#define SIGNED_SHORT(x) \
199 ((sizeof (short) == 2) \
200 ? ((int)(short)(x)) \
201 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
202
203#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
204
205CORE_ADDR
206skip_prologue (pc, fdata)
207 CORE_ADDR pc;
208 struct rs6000_framedata *fdata;
41abdfbd 209{
068c9fd6 210 CORE_ADDR orig_pc = pc;
34df79fc 211 char buf[4];
34df79fc 212 unsigned long op;
4b4c6c96 213 long offset = 0;
068c9fd6
MM
214 int lr_reg = 0;
215 int cr_reg = 0;
216 int reg;
4b4c6c96 217 int framep = 0;
65eaea27 218 int minimal_toc_loaded = 0;
068c9fd6
MM
219 static struct rs6000_framedata zero_frame;
220
221 *fdata = zero_frame;
222 fdata->saved_gpr = -1;
223 fdata->saved_fpr = -1;
224 fdata->alloca_reg = -1;
225 fdata->frameless = 1;
226 fdata->nosavedpc = 1;
41abdfbd 227
34df79fc 228 if (target_read_memory (pc, buf, 4))
41abdfbd 229 return pc; /* Can't access it -- assume no prologue. */
41abdfbd
JG
230
231 /* Assume that subsequent fetches can fail with low probability. */
068c9fd6
MM
232 pc -= 4;
233 for (;;)
234 {
235 pc += 4;
236 op = read_memory_integer (pc, 4);
41abdfbd 237
068c9fd6
MM
238 if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */
239 lr_reg = (op & 0x03e00000) | 0x90010000;
240 continue;
241
242 } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */
243 cr_reg = (op & 0x03e00000) | 0x90010000;
244 continue;
245
246 } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
247 reg = GET_SRC_REG (op);
248 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) {
249 fdata->saved_fpr = reg;
4b4c6c96 250 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
251 }
252 continue;
253
254 } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
255 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */
256 (op & 0x03e00000) >= 0x01a00000)) {
257
258 reg = GET_SRC_REG (op);
259 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) {
260 fdata->saved_gpr = reg;
4b4c6c96 261 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
262 }
263 continue;
264
265 } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */
266 fdata->offset = (op & 0x0000ffff) << 16;
65eaea27 267 fdata->frameless = 0;
068c9fd6
MM
268 continue;
269
270 } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */
271 fdata->offset |= (op & 0x0000ffff);
65eaea27 272 fdata->frameless = 0;
068c9fd6
MM
273 continue;
274
275 } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */
4b4c6c96 276 fdata->lr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
277 fdata->nosavedpc = 0;
278 lr_reg = 0;
279 continue;
280
281 } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */
4b4c6c96 282 fdata->cr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
283 cr_reg = 0;
284 continue;
285
4b4c6c96
MM
286 } else if (op == 0x48000005) { /* bl .+4 used in -mrelocatable */
287 continue;
288
65eaea27
JL
289 } else if (op == 0x48000004) { /* b .+4 (xlc) */
290 break;
291
4b4c6c96
MM
292 } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used in V.4 -mrelocatable */
293 op == 0x7fc0f214) && /* add r30,r0,r30, used in V.4 -mrelocatable */
294 lr_reg == 0x901e0000) {
295 continue;
296
297 } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used in V.4 -mminimal-toc */
298 (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */
299 continue;
300
068c9fd6 301 } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
965dde97 302
65eaea27 303 fdata->frameless = 0;
965dde97
PS
304 /* Don't skip over the subroutine call if it is not within the first
305 three instructions of the prologue. */
306 if ((pc - orig_pc) > 8)
307 break;
308
068c9fd6
MM
309 op = read_memory_integer (pc+4, 4);
310
311 /* At this point, make sure this is not a trampoline function
312 (a function that simply calls another functions, and nothing else).
313 If the next is not a nop, this branch was part of the function
314 prologue. */
315
316 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
965dde97 317 break; /* don't skip over this branch */
068c9fd6
MM
318
319 continue;
320
4b4c6c96 321 /* update stack pointer */
068c9fd6 322 } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
65eaea27 323 fdata->frameless = 0;
4b4c6c96
MM
324 fdata->offset = SIGNED_SHORT (op);
325 offset = fdata->offset;
326 continue;
1eeba686 327
068c9fd6 328 } else if (op == 0x7c21016e) { /* stwux 1,1,0 */
65eaea27 329 fdata->frameless = 0;
4b4c6c96
MM
330 offset = fdata->offset;
331 continue;
41abdfbd 332
4b4c6c96 333 /* Load up minimal toc pointer */
65eaea27
JL
334 } else if ((op >> 22) == 0x20f
335 && ! minimal_toc_loaded) { /* l r31,... or l r30,... */
336 minimal_toc_loaded = 1;
4b4c6c96 337 continue;
cdb1cc92 338
4b4c6c96
MM
339 /* store parameters in stack */
340 } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
341 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
342 (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */
343 continue;
e137e850 344
4b4c6c96
MM
345 /* store parameters in stack via frame pointer */
346 } else if (framep &&
58b4fad2 347 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
4b4c6c96 348 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
58b4fad2 349 (op & 0xfc1f0000) == 0xfc1f0000)) { /* frsp, fp?,NUM(r1) */
4b4c6c96 350 continue;
e137e850 351
4b4c6c96
MM
352 /* Set up frame pointer */
353 } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
354 || op == 0x7c3f0b78) { /* mr r31, r1 */
65eaea27 355 fdata->frameless = 0;
4b4c6c96 356 framep = 1;
965dde97 357 fdata->alloca_reg = 31;
4b4c6c96 358 continue;
41abdfbd 359
65eaea27
JL
360 /* Another way to set up the frame pointer. */
361 } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */
362 fdata->frameless = 0;
363 framep = 1;
364 fdata->alloca_reg = (op & ~0x38010000) >> 21;
365 continue;
366
4b4c6c96
MM
367 } else {
368 break;
369 }
41abdfbd 370 }
068c9fd6 371
507e4004
PB
372#if 0
373/* I have problems with skipping over __main() that I need to address
374 * sometime. Previously, I used to use misc_function_vector which
375 * didn't work as well as I wanted to be. -MGO */
376
377 /* If the first thing after skipping a prolog is a branch to a function,
378 this might be a call to an initializer in main(), introduced by gcc2.
379 We'd like to skip over it as well. Fortunately, xlc does some extra
380 work before calling a function right after a prologue, thus we can
381 single out such gcc2 behaviour. */
382
383
384 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
385 op = read_memory_integer (pc+4, 4);
386
387 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
388
389 /* check and see if we are in main. If so, skip over this initializer
390 function as well. */
391
392 tmp = find_pc_misc_function (pc);
2e4964ad 393 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
394 return pc + 8;
395 }
396 }
397#endif /* 0 */
398
4b4c6c96 399 fdata->offset = - fdata->offset;
41abdfbd
JG
400 return pc;
401}
402
818de002 403
41abdfbd
JG
404/*************************************************************************
405 Support for creating pushind a dummy frame into the stack, and popping
406 frames, etc.
407*************************************************************************/
408
818de002
PB
409/* The total size of dummy frame is 436, which is;
410
411 32 gpr's - 128 bytes
412 32 fpr's - 256 "
413 7 the rest - 28 "
414 and 24 extra bytes for the callee's link area. The last 24 bytes
415 for the link area might not be necessary, since it will be taken
416 care of by push_arguments(). */
417
418#define DUMMY_FRAME_SIZE 436
419
41abdfbd
JG
420#define DUMMY_FRAME_ADDR_SIZE 10
421
422/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 423 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
424
425static int dummy_frame_count = 0;
426static int dummy_frame_size = 0;
427static CORE_ADDR *dummy_frame_addr = 0;
428
429extern int stop_stack_dummy;
430
431/* push a dummy frame into stack, save all register. Currently we are saving
432 only gpr's and fpr's, which is not good enough! FIXMEmgo */
433
ecf4059f 434void
41abdfbd
JG
435push_dummy_frame ()
436{
359a097f
JK
437 /* stack pointer. */
438 CORE_ADDR sp;
b112f2ae
JK
439 /* Same thing, target byte order. */
440 char sp_targ[4];
359a097f
JK
441
442 /* link register. */
443 CORE_ADDR pc;
444 /* Same thing, target byte order. */
445 char pc_targ[4];
446
3a4f9786
MT
447 /* Needed to figure out where to save the dummy link area.
448 FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */
449 struct rs6000_framedata fdata;
450
41abdfbd
JG
451 int ii;
452
5f1c39ef 453 target_fetch_registers (-1);
6c6afbb9 454
41abdfbd
JG
455 if (dummy_frame_count >= dummy_frame_size) {
456 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
457 if (dummy_frame_addr)
458 dummy_frame_addr = (CORE_ADDR*) xrealloc
459 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
460 else
461 dummy_frame_addr = (CORE_ADDR*)
462 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
463 }
464
465 sp = read_register(SP_REGNUM);
359a097f 466 pc = read_register(PC_REGNUM);
5816555b 467 store_address (pc_targ, 4, pc);
41abdfbd 468
3a4f9786
MT
469 (void) skip_prologue (get_pc_function_start (pc) + FUNCTION_START_OFFSET, &fdata);
470
41abdfbd
JG
471 dummy_frame_addr [dummy_frame_count++] = sp;
472
473 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 474 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
475 uses that area for IPC purposes when executing ptrace(2) calls. So
476 before writing register values into the new frame, decrement and update
477 %sp first in order to secure your frame. */
478
3a4f9786
MT
479 /* FIXME: We don't check if the stack really has this much space.
480 This is a problem on the ppc simulator (which only grants one page
481 (4096 bytes) by default. */
482
818de002 483 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 484
41abdfbd
JG
485 /* gdb relies on the state of current_frame. We'd better update it,
486 otherwise things like do_registers_info() wouldn't work properly! */
487
488 flush_cached_frames ();
41abdfbd
JG
489
490 /* save program counter in link register's space. */
4f8710e6
PS
491 write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE),
492 pc_targ, 4);
41abdfbd 493
6c6afbb9 494 /* save all floating point and general purpose registers here. */
41abdfbd
JG
495
496 /* fpr's, f0..f31 */
497 for (ii = 0; ii < 32; ++ii)
498 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
499
500 /* gpr's r0..r31 */
501 for (ii=1; ii <=32; ++ii)
502 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
503
818de002
PB
504 /* so far, 32*2 + 32 words = 384 bytes have been written.
505 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
506
507 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
508 write_memory (sp-384-(ii*4),
509 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
510 }
511
512 /* Save sp or so called back chain right here. */
b112f2ae
JK
513 store_address (sp_targ, 4, sp);
514 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 515 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
516
517 /* And finally, this is the back chain. */
359a097f 518 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
519}
520
521
522/* Pop a dummy frame.
523
524 In rs6000 when we push a dummy frame, we save all of the registers. This
525 is usually done before user calls a function explicitly.
526
818de002
PB
527 After a dummy frame is pushed, some instructions are copied into stack,
528 and stack pointer is decremented even more. Since we don't have a frame
529 pointer to get back to the parent frame of the dummy, we start having
530 trouble poping it. Therefore, we keep a dummy frame stack, keeping
531 addresses of dummy frames as such. When poping happens and when we
532 detect that was a dummy frame, we pop it back to its parent by using
533 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
534
535FIXME: This whole concept is broken. You should be able to detect
536a dummy stack frame *on the user's stack itself*. When you do,
537then you know the format of that stack frame -- including its
538saved SP register! There should *not* be a separate stack in the
d6434f39 539GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
540 */
541
368f1e77 542static void
41abdfbd
JG
543pop_dummy_frame ()
544{
545 CORE_ADDR sp, pc;
546 int ii;
547 sp = dummy_frame_addr [--dummy_frame_count];
548
549 /* restore all fpr's. */
550 for (ii = 1; ii <= 32; ++ii)
551 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
552
553 /* restore all gpr's */
554 for (ii=1; ii <= 32; ++ii) {
555 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
556 }
557
818de002
PB
558 /* restore the rest of the registers. */
559 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
560 read_memory (sp-384-(ii*4),
561 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
562
563 read_memory (sp-(DUMMY_FRAME_SIZE-8),
3a4f9786 564 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
565
566 /* when a dummy frame was being pushed, we had to decrement %sp first, in
567 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
568 one we should restore. Change it with the one we need. */
569
570 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
571
572 /* Now we can restore all registers. */
573
5f1c39ef 574 target_store_registers (-1);
41abdfbd
JG
575 pc = read_pc ();
576 flush_cached_frames ();
41abdfbd
JG
577}
578
579
580/* pop the innermost frame, go back to the caller. */
581
ecf4059f 582void
41abdfbd
JG
583pop_frame ()
584{
359a097f 585 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
63641491 586 struct rs6000_framedata fdata;
669caa9c 587 struct frame_info *frame = get_current_frame ();
41abdfbd 588 int addr, ii;
41abdfbd
JG
589
590 pc = read_pc ();
669caa9c 591 sp = FRAME_FP (frame);
41abdfbd
JG
592
593 if (stop_stack_dummy && dummy_frame_count) {
594 pop_dummy_frame ();
595 return;
596 }
597
07aa9fdc
PS
598 /* Make sure that all registers are valid. */
599 read_register_bytes (0, NULL, REGISTER_BYTES);
600
41abdfbd
JG
601 /* figure out previous %pc value. If the function is frameless, it is
602 still in the link register, otherwise walk the frames and retrieve the
603 saved %pc value in the previous frame. */
604
34a1a3bf 605 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
068c9fd6 606 (void) skip_prologue (addr, &fdata);
41abdfbd 607
6c6afbb9 608 if (fdata.frameless)
07aa9fdc
PS
609 prev_sp = sp;
610 else
611 prev_sp = read_memory_integer (sp, 4);
068c9fd6 612 if (fdata.lr_offset == 0)
41abdfbd
JG
613 lr = read_register (LR_REGNUM);
614 else
068c9fd6 615 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
41abdfbd
JG
616
617 /* reset %pc value. */
618 write_register (PC_REGNUM, lr);
619
620 /* reset register values if any was saved earlier. */
6c6afbb9 621 addr = prev_sp - fdata.offset;
41abdfbd 622
6c6afbb9 623 if (fdata.saved_gpr != -1)
669caa9c 624 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 625 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 626 addr += 4;
41abdfbd
JG
627 }
628
6c6afbb9 629 if (fdata.saved_fpr != -1)
669caa9c 630 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
631 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
632 addr += 8;
633 }
634
635 write_register (SP_REGNUM, prev_sp);
5f1c39ef 636 target_store_registers (-1);
41abdfbd 637 flush_cached_frames ();
41abdfbd
JG
638}
639
41abdfbd
JG
640/* fixup the call sequence of a dummy function, with the real function address.
641 its argumets will be passed by gdb. */
642
ecf4059f 643void
2f163bc3 644rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
cd8a3d84
SS
645 char *dummyname;
646 CORE_ADDR pc;
647 CORE_ADDR fun;
2f163bc3
SS
648 int nargs;
649 value_ptr *args;
650 struct type *type;
651 int gcc_p;
41abdfbd
JG
652{
653#define TOC_ADDR_OFFSET 20
654#define TARGET_ADDR_OFFSET 28
655
656 int ii;
ecf4059f 657 CORE_ADDR target_addr;
41abdfbd 658
05d52ace
PS
659 if (find_toc_address_hook != NULL)
660 {
661 CORE_ADDR tocvalue;
41abdfbd 662
05d52ace
PS
663 tocvalue = (*find_toc_address_hook) (fun);
664 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
665 ii = (ii & 0xffff0000) | (tocvalue >> 16);
666 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
41abdfbd 667
05d52ace
PS
668 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
669 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
670 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
671 }
41abdfbd 672
05d52ace 673 target_addr = fun;
41abdfbd
JG
674 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
675 ii = (ii & 0xffff0000) | (target_addr >> 16);
676 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
677
678 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
679 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
680 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
681}
682
cd8a3d84
SS
683/* Pass the arguments in either registers, or in the stack. In RS6000,
684 the first eight words of the argument list (that might be less than
685 eight parameters if some parameters occupy more than one word) are
686 passed in r3..r11 registers. float and double parameters are
687 passed in fpr's, in addition to that. Rest of the parameters if any
688 are passed in user stack. There might be cases in which half of the
689 parameter is copied into registers, the other half is pushed into
41abdfbd
JG
690 stack.
691
692 If the function is returning a structure, then the return address is passed
94b4f756 693 in r3, then the first 7 words of the parameters can be passed in registers,
41abdfbd
JG
694 starting from r4. */
695
696CORE_ADDR
697push_arguments (nargs, args, sp, struct_return, struct_addr)
cd8a3d84
SS
698 int nargs;
699 value_ptr *args;
700 CORE_ADDR sp;
701 int struct_return;
702 CORE_ADDR struct_addr;
41abdfbd 703{
368f1e77
FF
704 int ii;
705 int len = 0;
41abdfbd
JG
706 int argno; /* current argument number */
707 int argbytes; /* current argument byte */
708 char tmp_buffer [50];
41abdfbd 709 int f_argno = 0; /* current floating point argno */
368f1e77 710 value_ptr arg = 0;
940d5967 711 struct type *type;
41abdfbd 712
368f1e77 713 CORE_ADDR saved_sp;
41abdfbd
JG
714
715 if ( dummy_frame_count <= 0)
199b2450 716 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
717
718 /* The first eight words of ther arguments are passed in registers. Copy
719 them appropriately.
720
721 If the function is returning a `struct', then the first word (which
722 will be passed in r3) is used for struct return address. In that
723 case we should advance one word and start from r4 register to copy
724 parameters. */
725
726 ii = struct_return ? 1 : 0;
727
728 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
729
5222ca60 730 arg = args[argno];
59c84318 731 type = check_typedef (VALUE_TYPE (arg));
940d5967 732 len = TYPE_LENGTH (type);
41abdfbd 733
940d5967 734 if (TYPE_CODE (type) == TYPE_CODE_FLT) {
41abdfbd
JG
735
736 /* floating point arguments are passed in fpr's, as well as gpr's.
737 There are 13 fpr's reserved for passing parameters. At this point
738 there is no way we would run out of them. */
739
740 if (len > 8)
199b2450 741 printf_unfiltered (
41abdfbd
JG
742"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
743
ade40d31
RP
744 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
745 len);
41abdfbd
JG
746 ++f_argno;
747 }
748
749 if (len > 4) {
750
751 /* Argument takes more than one register. */
752 while (argbytes < len) {
753
754 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
755 memcpy (&registers[REGISTER_BYTE(ii+3)],
756 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
757 (len - argbytes) > 4 ? 4 : len - argbytes);
758 ++ii, argbytes += 4;
759
760 if (ii >= 8)
761 goto ran_out_of_registers_for_arguments;
762 }
763 argbytes = 0;
764 --ii;
765 }
766 else { /* Argument can fit in one register. No problem. */
767 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 768 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
769 }
770 ++argno;
771 }
772
773ran_out_of_registers_for_arguments:
774
775 /* location for 8 parameters are always reserved. */
776 sp -= 4 * 8;
777
778 /* another six words for back chain, TOC register, link register, etc. */
779 sp -= 24;
780
781 /* if there are more arguments, allocate space for them in
782 the stack, then push them starting from the ninth one. */
783
784 if ((argno < nargs) || argbytes) {
785 int space = 0, jj;
41abdfbd
JG
786
787 if (argbytes) {
788 space += ((len - argbytes + 3) & -4);
789 jj = argno + 1;
790 }
791 else
792 jj = argno;
793
794 for (; jj < nargs; ++jj) {
940d5967 795 value_ptr val = args[jj];
41abdfbd
JG
796 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
797 }
798
799 /* add location required for the rest of the parameters */
800 space = (space + 7) & -8;
801 sp -= space;
802
803 /* This is another instance we need to be concerned about securing our
804 stack space. If we write anything underneath %sp (r1), we might conflict
805 with the kernel who thinks he is free to use this area. So, update %sp
806 first before doing anything else. */
807
808 write_register (SP_REGNUM, sp);
809
41abdfbd
JG
810 /* if the last argument copied into the registers didn't fit there
811 completely, push the rest of it into stack. */
812
813 if (argbytes) {
814 write_memory (
815 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
816 ++argno;
817 ii += ((len - argbytes + 3) & -4) / 4;
818 }
819
820 /* push the rest of the arguments into stack. */
821 for (; argno < nargs; ++argno) {
822
5222ca60 823 arg = args[argno];
940d5967
PB
824 type = check_typedef (VALUE_TYPE (arg));
825 len = TYPE_LENGTH (type);
41abdfbd
JG
826
827
828 /* float types should be passed in fpr's, as well as in the stack. */
940d5967 829 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) {
41abdfbd
JG
830
831 if (len > 8)
199b2450 832 printf_unfiltered (
41abdfbd
JG
833"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
834
ade40d31
RP
835 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
836 len);
41abdfbd
JG
837 ++f_argno;
838 }
839
359a097f 840 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
841 ii += ((len + 3) & -4) / 4;
842 }
843 }
6c6afbb9 844 else
41abdfbd
JG
845 /* Secure stack areas first, before doing anything else. */
846 write_register (SP_REGNUM, sp);
847
41abdfbd
JG
848 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
849 read_memory (saved_sp, tmp_buffer, 24);
850 write_memory (sp, tmp_buffer, 24);
851
b112f2ae
JK
852 /* set back chain properly */
853 store_address (tmp_buffer, 4, saved_sp);
854 write_memory (sp, tmp_buffer, 4);
41abdfbd 855
5f1c39ef 856 target_store_registers (-1);
41abdfbd
JG
857 return sp;
858}
859
860/* a given return value in `regbuf' with a type `valtype', extract and copy its
861 value into `valbuf' */
862
ecf4059f 863void
41abdfbd 864extract_return_value (valtype, regbuf, valbuf)
cd8a3d84
SS
865 struct type *valtype;
866 char regbuf[REGISTER_BYTES];
867 char *valbuf;
41abdfbd 868{
07781ac0 869 int offset = 0;
41abdfbd
JG
870
871 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
872
873 double dd; float ff;
874 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
875 We need to truncate the return value into float size (4 byte) if
876 necessary. */
877
878 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 879 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
880 TYPE_LENGTH (valtype));
881 else { /* float */
ade40d31 882 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 883 ff = (float)dd;
ade40d31 884 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
885 }
886 }
07781ac0 887 else {
41abdfbd 888 /* return value is copied starting from r3. */
07781ac0
PS
889 if (TARGET_BYTE_ORDER == BIG_ENDIAN
890 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
891 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
892
893 memcpy (valbuf, regbuf + REGISTER_BYTE (3) + offset,
894 TYPE_LENGTH (valtype));
895 }
41abdfbd
JG
896}
897
898
ecf4059f
JG
899/* keep structure return address in this variable.
900 FIXME: This is a horrid kludge which should not be allowed to continue
901 living. This only allows a single nested call to a structure-returning
902 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
903
904CORE_ADDR rs6000_struct_return_address;
905
906
c2e4669f
JG
907/* Indirect function calls use a piece of trampoline code to do context
908 switching, i.e. to set the new TOC table. Skip such code if we are on
909 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
910 Also skip shared library trampoline code (which is different from
911 indirect function call trampolines).
c2e4669f
JG
912 Result is desired PC to step until, or NULL if we are not in
913 trampoline code. */
41abdfbd 914
ecf4059f 915CORE_ADDR
41abdfbd 916skip_trampoline_code (pc)
cd8a3d84 917 CORE_ADDR pc;
41abdfbd
JG
918{
919 register unsigned int ii, op;
07aa9fdc 920 CORE_ADDR solib_target_pc;
41abdfbd
JG
921
922 static unsigned trampoline_code[] = {
923 0x800b0000, /* l r0,0x0(r11) */
924 0x90410014, /* st r2,0x14(r1) */
925 0x7c0903a6, /* mtctr r0 */
926 0x804b0004, /* l r2,0x4(r11) */
927 0x816b0008, /* l r11,0x8(r11) */
928 0x4e800420, /* bctr */
929 0x4e800020, /* br */
930 0
931 };
932
07aa9fdc
PS
933 /* If pc is in a shared library trampoline, return its target. */
934 solib_target_pc = find_solib_trampoline_target (pc);
935 if (solib_target_pc)
936 return solib_target_pc;
937
41abdfbd
JG
938 for (ii=0; trampoline_code[ii]; ++ii) {
939 op = read_memory_integer (pc + (ii*4), 4);
940 if (op != trampoline_code [ii])
359a097f 941 return 0;
41abdfbd
JG
942 }
943 ii = read_register (11); /* r11 holds destination addr */
944 pc = read_memory_integer (ii, 4); /* (r11) value */
945 return pc;
946}
947
068c9fd6 948/* Determines whether the function FI has a frame on the stack or not. */
cd8a3d84 949
ecf4059f 950int
068c9fd6
MM
951frameless_function_invocation (fi)
952 struct frame_info *fi;
ecf4059f
JG
953{
954 CORE_ADDR func_start;
63641491 955 struct rs6000_framedata fdata;
ecf4059f 956
4cc56716
PS
957 /* Don't even think about framelessness except on the innermost frame
958 or if the function was interrupted by a signal. */
959 if (fi->next != NULL && !fi->next->signal_handler_caller)
b0e932ad
JK
960 return 0;
961
4cc56716 962 func_start = get_pc_function_start (fi->pc);
ecf4059f
JG
963
964 /* If we failed to find the start of the function, it is a mistake
965 to inspect the instructions. */
966
967 if (!func_start)
4cc56716
PS
968 {
969 /* A frame with a zero PC is usually created by dereferencing a NULL
970 function pointer, normally causing an immediate core dump of the
971 inferior. Mark function as frameless, as the inferior has no chance
972 of setting up a stack frame. */
973 if (fi->pc == 0)
974 return 1;
975 else
976 return 0;
977 }
ecf4059f 978
4cc56716 979 func_start += FUNCTION_START_OFFSET;
068c9fd6
MM
980 (void) skip_prologue (func_start, &fdata);
981 return fdata.frameless;
ecf4059f
JG
982}
983
068c9fd6 984/* Return the PC saved in a frame */
cd8a3d84 985
068c9fd6
MM
986unsigned long
987frame_saved_pc (fi)
988 struct frame_info *fi;
989{
990 CORE_ADDR func_start;
991 struct rs6000_framedata fdata;
068c9fd6 992
965dde97
PS
993 if (fi->signal_handler_caller)
994 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
995
068c9fd6
MM
996 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
997
998 /* If we failed to find the start of the function, it is a mistake
999 to inspect the instructions. */
1000 if (!func_start)
1001 return 0;
1002
1003 (void) skip_prologue (func_start, &fdata);
068c9fd6 1004
4b4c6c96 1005 if (fdata.lr_offset == 0 && fi->next != NULL)
4cc56716
PS
1006 {
1007 if (fi->next->signal_handler_caller)
1008 return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
1009 else
1010 return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE,
1011 4);
1012 }
4b4c6c96
MM
1013
1014 if (fdata.lr_offset == 0)
1015 return read_register (LR_REGNUM);
1016
068c9fd6
MM
1017 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
1018}
ecf4059f
JG
1019
1020/* If saved registers of frame FI are not known yet, read and cache them.
63641491 1021 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
ecf4059f
JG
1022 in which case the framedata are read. */
1023
1024static void
1025frame_get_cache_fsr (fi, fdatap)
1026 struct frame_info *fi;
63641491 1027 struct rs6000_framedata *fdatap;
ecf4059f
JG
1028{
1029 int ii;
1030 CORE_ADDR frame_addr;
63641491 1031 struct rs6000_framedata work_fdata;
ecf4059f
JG
1032
1033 if (fi->cache_fsr)
1034 return;
1035
1036 if (fdatap == NULL) {
1037 fdatap = &work_fdata;
068c9fd6 1038 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
ecf4059f
JG
1039 }
1040
1041 fi->cache_fsr = (struct frame_saved_regs *)
1042 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1043 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1044
1045 if (fi->prev && fi->prev->frame)
1046 frame_addr = fi->prev->frame;
1047 else
1048 frame_addr = read_memory_integer (fi->frame, 4);
1049
1050 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
965dde97 1051 All fpr's from saved_fpr to fp31 are saved. */
ecf4059f
JG
1052
1053 if (fdatap->saved_fpr >= 0) {
965dde97
PS
1054 int fpr_offset = frame_addr + fdatap->fpr_offset;
1055 for (ii = fdatap->saved_fpr; ii < 32; ii++) {
1056 fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset;
1057 fpr_offset += 8;
1058 }
ecf4059f
JG
1059 }
1060
1061 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
965dde97 1062 All gpr's from saved_gpr to gpr31 are saved. */
ecf4059f 1063
965dde97
PS
1064 if (fdatap->saved_gpr >= 0) {
1065 int gpr_offset = frame_addr + fdatap->gpr_offset;
1066 for (ii = fdatap->saved_gpr; ii < 32; ii++) {
1067 fi->cache_fsr->regs [ii] = gpr_offset;
1068 gpr_offset += 4;
1069 }
1070 }
1071
1072 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1073 the CR. */
1074 if (fdatap->cr_offset != 0)
1075 fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset;
1076
1077 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1078 the LR. */
1079 if (fdatap->lr_offset != 0)
1080 fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset;
ecf4059f
JG
1081}
1082
1083/* Return the address of a frame. This is the inital %sp value when the frame
1084 was first allocated. For functions calling alloca(), it might be saved in
1085 an alloca register. */
1086
1087CORE_ADDR
1088frame_initial_stack_address (fi)
1089 struct frame_info *fi;
1090{
1091 CORE_ADDR tmpaddr;
63641491 1092 struct rs6000_framedata fdata;
ecf4059f
JG
1093 struct frame_info *callee_fi;
1094
1095 /* if the initial stack pointer (frame address) of this frame is known,
1096 just return it. */
1097
1098 if (fi->initial_sp)
1099 return fi->initial_sp;
1100
1101 /* find out if this function is using an alloca register.. */
1102
068c9fd6 1103 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
ecf4059f
JG
1104
1105 /* if saved registers of this frame are not known yet, read and cache them. */
1106
1107 if (!fi->cache_fsr)
1108 frame_get_cache_fsr (fi, &fdata);
1109
1110 /* If no alloca register used, then fi->frame is the value of the %sp for
1111 this frame, and it is good enough. */
1112
1113 if (fdata.alloca_reg < 0) {
1114 fi->initial_sp = fi->frame;
1115 return fi->initial_sp;
1116 }
1117
1118 /* This function has an alloca register. If this is the top-most frame
1119 (with the lowest address), the value in alloca register is good. */
1120
1121 if (!fi->next)
1122 return fi->initial_sp = read_register (fdata.alloca_reg);
1123
1124 /* Otherwise, this is a caller frame. Callee has usually already saved
1125 registers, but there are exceptions (such as when the callee
1126 has no parameters). Find the address in which caller's alloca
1127 register is saved. */
1128
1129 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1130
1131 if (!callee_fi->cache_fsr)
cdb1cc92 1132 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1133
1134 /* this is the address in which alloca register is saved. */
1135
1136 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1137 if (tmpaddr) {
1138 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1139 return fi->initial_sp;
1140 }
1141
1142 /* Go look into deeper levels of the frame chain to see if any one of
1143 the callees has saved alloca register. */
1144 }
1145
1146 /* If alloca register was not saved, by the callee (or any of its callees)
1147 then the value in the register is still good. */
1148
1149 return fi->initial_sp = read_register (fdata.alloca_reg);
1150}
1151
669caa9c 1152CORE_ADDR
f3649227
JK
1153rs6000_frame_chain (thisframe)
1154 struct frame_info *thisframe;
1155{
669caa9c 1156 CORE_ADDR fp;
f3649227
JK
1157 if (inside_entry_file ((thisframe)->pc))
1158 return 0;
cee86be3 1159 if (thisframe->signal_handler_caller)
9ed8604f 1160 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
4cc56716
PS
1161 else if (thisframe->next != NULL
1162 && thisframe->next->signal_handler_caller
1163 && frameless_function_invocation (thisframe))
1164 /* A frameless function interrupted by a signal did not change the
1165 frame pointer. */
1166 fp = FRAME_FP (thisframe);
cee86be3
JK
1167 else
1168 fp = read_memory_integer ((thisframe)->frame, 4);
1169
f3649227
JK
1170 return fp;
1171}
ecf4059f 1172\f
65eaea27
JL
1173/* Return nonzero if ADDR (a function pointer) is in the data space and
1174 is therefore a special function pointer. */
1175
1176int
1177is_magic_function_pointer (addr)
1178 CORE_ADDR addr;
1179{
1180 struct obj_section *s;
1181
1182 s = find_pc_section (addr);
1183 if (s && s->the_bfd_section->flags & SEC_CODE)
1184 return 0;
1185 else
1186 return 1;
1187}
1188
5c172b4b
MM
1189#ifdef GDB_TARGET_POWERPC
1190int
1191gdb_print_insn_powerpc (memaddr, info)
1192 bfd_vma memaddr;
1193 disassemble_info *info;
1194{
1195 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1196 return print_insn_big_powerpc (memaddr, info);
1197 else
1198 return print_insn_little_powerpc (memaddr, info);
1199}
1200#endif
1201
18b46e7c
SS
1202void
1203_initialize_rs6000_tdep ()
1204{
1205 /* FIXME, this should not be decided via ifdef. */
1206#ifdef GDB_TARGET_POWERPC
5c172b4b 1207 tm_print_insn = gdb_print_insn_powerpc;
18b46e7c
SS
1208#else
1209 tm_print_insn = print_insn_rs6000;
1210#endif
1211}
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