* lib/gdb.exp: Close connection to remote host if gdb doesn't
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
211b564e 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
6c9638b4 19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
41abdfbd 20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
65eaea27
JL
27#include "symfile.h"
28#include "objfiles.h"
2aefe6e4
JK
29#include "xcoffsolib.h"
30
d6434f39
JG
31extern struct obstack frame_cache_obstack;
32
41abdfbd 33extern int errno;
41abdfbd
JG
34
35/* Nonzero if we just simulated a single step break. */
36int one_stepped;
37
41abdfbd
JG
38/* Breakpoint shadows for the single step instructions will be kept here. */
39
40static struct sstep_breaks {
030fb5cb
JK
41 /* Address, or 0 if this is not in use. */
42 CORE_ADDR address;
43 /* Shadow contents. */
44 char data[4];
41abdfbd
JG
45} stepBreaks[2];
46
ecf4059f
JG
47/* Static function prototypes */
48
cd8a3d84 49static CORE_ADDR find_toc_address PARAMS ((CORE_ADDR pc));
ecf4059f 50
cd8a3d84
SS
51static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
52 CORE_ADDR safety));
ecf4059f 53
cd8a3d84
SS
54static void frame_get_cache_fsr PARAMS ((struct frame_info *fi,
55 struct rs6000_framedata *fdatap));
56
368f1e77
FF
57static void pop_dummy_frame PARAMS ((void));
58
cd8a3d84 59/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
41abdfbd 60
ecf4059f 61static CORE_ADDR
41abdfbd 62branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
63 int opcode;
64 int instr;
65 CORE_ADDR pc;
66 CORE_ADDR safety;
41abdfbd 67{
ecf4059f 68 CORE_ADDR dest;
41abdfbd
JG
69 int immediate;
70 int absolute;
71 int ext_op;
72
73 absolute = (int) ((instr >> 1) & 1);
74
75 switch (opcode) {
76 case 18 :
ecf4059f 77 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
78 if (absolute)
79 dest = immediate;
80 else
81 dest = pc + immediate;
82 break;
41abdfbd
JG
83
84 case 16 :
dc59e982 85 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
86 if (absolute)
87 dest = immediate;
88 else
89 dest = pc + immediate;
90 break;
91
92 case 19 :
93 ext_op = (instr>>1) & 0x3ff;
94
95 if (ext_op == 16) /* br conditional register */
96 dest = read_register (LR_REGNUM) & ~3;
97
98 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
99 {
100 dest = read_register (CTR_REGNUM) & ~3;
101
102 /* If we are about to execute a system call, dest is something
103 like 0x22fc or 0x3b00. Upon completion the system call
104 will return to the address in the link register. */
105 if (dest < TEXT_SEGMENT_BASE)
106 dest = read_register (LR_REGNUM) & ~3;
107 }
41abdfbd
JG
108 else return -1;
109 break;
110
111 default: return -1;
112 }
818de002 113 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
114}
115
116
117
118/* AIX does not support PT_STEP. Simulate it. */
119
997cc2c0 120void
41abdfbd 121single_step (signal)
b607efe7 122 enum target_signal signal;
41abdfbd
JG
123{
124#define INSNLEN(OPCODE) 4
125
5c172b4b
MM
126 static char le_breakp[] = LITTLE_BREAKPOINT;
127 static char be_breakp[] = BIG_BREAKPOINT;
128 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
030fb5cb
JK
129 int ii, insn;
130 CORE_ADDR loc;
131 CORE_ADDR breaks[2];
132 int opcode;
41abdfbd
JG
133
134 if (!one_stepped) {
41abdfbd
JG
135 loc = read_pc ();
136
b112f2ae 137 insn = read_memory_integer (loc, 4);
41abdfbd
JG
138
139 breaks[0] = loc + INSNLEN(insn);
140 opcode = insn >> 26;
141 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
142
818de002
PB
143 /* Don't put two breakpoints on the same address. */
144 if (breaks[1] == breaks[0])
145 breaks[1] = -1;
146
030fb5cb 147 stepBreaks[1].address = 0;
41abdfbd
JG
148
149 for (ii=0; ii < 2; ++ii) {
150
151 /* ignore invalid breakpoint. */
152 if ( breaks[ii] == -1)
153 continue;
154
030fb5cb 155 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 156
030fb5cb 157 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
158 stepBreaks[ii].address = breaks[ii];
159 }
160
161 one_stepped = 1;
997cc2c0 162 } else {
41abdfbd
JG
163
164 /* remove step breakpoints. */
165 for (ii=0; ii < 2; ++ii)
030fb5cb 166 if (stepBreaks[ii].address != 0)
41abdfbd 167 write_memory
030fb5cb 168 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
169
170 one_stepped = 0;
171 }
997cc2c0 172 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 173 /* What errors? {read,write}_memory call error(). */
41abdfbd 174}
41abdfbd
JG
175
176
068c9fd6
MM
177/* return pc value after skipping a function prologue and also return
178 information about a function frame.
41abdfbd 179
068c9fd6
MM
180 in struct rs6000_frameinfo fdata:
181 - frameless is TRUE, if function does not have a frame.
182 - nosavedpc is TRUE, if function does not save %pc value in its frame.
183 - offset is the number of bytes used in the frame to save registers.
184 - saved_gpr is the number of the first saved gpr.
185 - saved_fpr is the number of the first saved fpr.
186 - alloca_reg is the number of the register used for alloca() handling.
187 Otherwise -1.
188 - gpr_offset is the offset of the saved gprs
189 - fpr_offset is the offset of the saved fprs
190 - lr_offset is the offset of the saved lr
191 - cr_offset is the offset of the saved cr
192 */
193
194#define SIGNED_SHORT(x) \
195 ((sizeof (short) == 2) \
196 ? ((int)(short)(x)) \
197 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
198
199#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
200
201CORE_ADDR
202skip_prologue (pc, fdata)
203 CORE_ADDR pc;
204 struct rs6000_framedata *fdata;
41abdfbd 205{
068c9fd6 206 CORE_ADDR orig_pc = pc;
34df79fc 207 char buf[4];
34df79fc 208 unsigned long op;
4b4c6c96 209 long offset = 0;
068c9fd6
MM
210 int lr_reg = 0;
211 int cr_reg = 0;
212 int reg;
4b4c6c96 213 int framep = 0;
65eaea27 214 int minimal_toc_loaded = 0;
068c9fd6
MM
215 static struct rs6000_framedata zero_frame;
216
217 *fdata = zero_frame;
218 fdata->saved_gpr = -1;
219 fdata->saved_fpr = -1;
220 fdata->alloca_reg = -1;
221 fdata->frameless = 1;
222 fdata->nosavedpc = 1;
41abdfbd 223
34df79fc 224 if (target_read_memory (pc, buf, 4))
41abdfbd 225 return pc; /* Can't access it -- assume no prologue. */
41abdfbd
JG
226
227 /* Assume that subsequent fetches can fail with low probability. */
068c9fd6
MM
228 pc -= 4;
229 for (;;)
230 {
231 pc += 4;
232 op = read_memory_integer (pc, 4);
41abdfbd 233
068c9fd6
MM
234 if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */
235 lr_reg = (op & 0x03e00000) | 0x90010000;
236 continue;
237
238 } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */
239 cr_reg = (op & 0x03e00000) | 0x90010000;
240 continue;
241
242 } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
243 reg = GET_SRC_REG (op);
244 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) {
245 fdata->saved_fpr = reg;
4b4c6c96 246 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
247 }
248 continue;
249
250 } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
251 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */
252 (op & 0x03e00000) >= 0x01a00000)) {
253
254 reg = GET_SRC_REG (op);
255 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) {
256 fdata->saved_gpr = reg;
4b4c6c96 257 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
258 }
259 continue;
260
261 } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */
262 fdata->offset = (op & 0x0000ffff) << 16;
65eaea27 263 fdata->frameless = 0;
068c9fd6
MM
264 continue;
265
266 } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */
267 fdata->offset |= (op & 0x0000ffff);
65eaea27 268 fdata->frameless = 0;
068c9fd6
MM
269 continue;
270
271 } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */
4b4c6c96 272 fdata->lr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
273 fdata->nosavedpc = 0;
274 lr_reg = 0;
275 continue;
276
277 } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */
4b4c6c96 278 fdata->cr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
279 cr_reg = 0;
280 continue;
281
4b4c6c96
MM
282 } else if (op == 0x48000005) { /* bl .+4 used in -mrelocatable */
283 continue;
284
65eaea27
JL
285 } else if (op == 0x48000004) { /* b .+4 (xlc) */
286 break;
287
4b4c6c96
MM
288 } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used in V.4 -mrelocatable */
289 op == 0x7fc0f214) && /* add r30,r0,r30, used in V.4 -mrelocatable */
290 lr_reg == 0x901e0000) {
291 continue;
292
293 } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used in V.4 -mminimal-toc */
294 (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */
295 continue;
296
068c9fd6 297 } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
965dde97 298
65eaea27 299 fdata->frameless = 0;
965dde97
PS
300 /* Don't skip over the subroutine call if it is not within the first
301 three instructions of the prologue. */
302 if ((pc - orig_pc) > 8)
303 break;
304
068c9fd6
MM
305 op = read_memory_integer (pc+4, 4);
306
307 /* At this point, make sure this is not a trampoline function
308 (a function that simply calls another functions, and nothing else).
309 If the next is not a nop, this branch was part of the function
310 prologue. */
311
312 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
965dde97 313 break; /* don't skip over this branch */
068c9fd6
MM
314
315 continue;
316
4b4c6c96 317 /* update stack pointer */
068c9fd6 318 } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
65eaea27 319 fdata->frameless = 0;
4b4c6c96
MM
320 fdata->offset = SIGNED_SHORT (op);
321 offset = fdata->offset;
322 continue;
1eeba686 323
068c9fd6 324 } else if (op == 0x7c21016e) { /* stwux 1,1,0 */
65eaea27 325 fdata->frameless = 0;
4b4c6c96
MM
326 offset = fdata->offset;
327 continue;
41abdfbd 328
4b4c6c96 329 /* Load up minimal toc pointer */
65eaea27
JL
330 } else if ((op >> 22) == 0x20f
331 && ! minimal_toc_loaded) { /* l r31,... or l r30,... */
332 minimal_toc_loaded = 1;
4b4c6c96 333 continue;
cdb1cc92 334
4b4c6c96
MM
335 /* store parameters in stack */
336 } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
337 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
338 (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */
339 continue;
e137e850 340
4b4c6c96
MM
341 /* store parameters in stack via frame pointer */
342 } else if (framep &&
58b4fad2 343 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
4b4c6c96 344 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
58b4fad2 345 (op & 0xfc1f0000) == 0xfc1f0000)) { /* frsp, fp?,NUM(r1) */
4b4c6c96 346 continue;
e137e850 347
4b4c6c96
MM
348 /* Set up frame pointer */
349 } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
350 || op == 0x7c3f0b78) { /* mr r31, r1 */
65eaea27 351 fdata->frameless = 0;
4b4c6c96 352 framep = 1;
965dde97 353 fdata->alloca_reg = 31;
4b4c6c96 354 continue;
41abdfbd 355
65eaea27
JL
356 /* Another way to set up the frame pointer. */
357 } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */
358 fdata->frameless = 0;
359 framep = 1;
360 fdata->alloca_reg = (op & ~0x38010000) >> 21;
361 continue;
362
4b4c6c96
MM
363 } else {
364 break;
365 }
41abdfbd 366 }
068c9fd6 367
507e4004
PB
368#if 0
369/* I have problems with skipping over __main() that I need to address
370 * sometime. Previously, I used to use misc_function_vector which
371 * didn't work as well as I wanted to be. -MGO */
372
373 /* If the first thing after skipping a prolog is a branch to a function,
374 this might be a call to an initializer in main(), introduced by gcc2.
375 We'd like to skip over it as well. Fortunately, xlc does some extra
376 work before calling a function right after a prologue, thus we can
377 single out such gcc2 behaviour. */
378
379
380 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
381 op = read_memory_integer (pc+4, 4);
382
383 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
384
385 /* check and see if we are in main. If so, skip over this initializer
386 function as well. */
387
388 tmp = find_pc_misc_function (pc);
2e4964ad 389 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
390 return pc + 8;
391 }
392 }
393#endif /* 0 */
394
4b4c6c96 395 fdata->offset = - fdata->offset;
41abdfbd
JG
396 return pc;
397}
398
818de002 399
41abdfbd
JG
400/*************************************************************************
401 Support for creating pushind a dummy frame into the stack, and popping
402 frames, etc.
403*************************************************************************/
404
818de002
PB
405/* The total size of dummy frame is 436, which is;
406
407 32 gpr's - 128 bytes
408 32 fpr's - 256 "
409 7 the rest - 28 "
410 and 24 extra bytes for the callee's link area. The last 24 bytes
411 for the link area might not be necessary, since it will be taken
412 care of by push_arguments(). */
413
414#define DUMMY_FRAME_SIZE 436
415
41abdfbd
JG
416#define DUMMY_FRAME_ADDR_SIZE 10
417
418/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 419 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
420
421static int dummy_frame_count = 0;
422static int dummy_frame_size = 0;
423static CORE_ADDR *dummy_frame_addr = 0;
424
425extern int stop_stack_dummy;
426
427/* push a dummy frame into stack, save all register. Currently we are saving
428 only gpr's and fpr's, which is not good enough! FIXMEmgo */
429
ecf4059f 430void
41abdfbd
JG
431push_dummy_frame ()
432{
359a097f
JK
433 /* stack pointer. */
434 CORE_ADDR sp;
b112f2ae
JK
435 /* Same thing, target byte order. */
436 char sp_targ[4];
359a097f
JK
437
438 /* link register. */
439 CORE_ADDR pc;
440 /* Same thing, target byte order. */
441 char pc_targ[4];
442
3a4f9786
MT
443 /* Needed to figure out where to save the dummy link area.
444 FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */
445 struct rs6000_framedata fdata;
446
41abdfbd
JG
447 int ii;
448
5f1c39ef 449 target_fetch_registers (-1);
6c6afbb9 450
41abdfbd
JG
451 if (dummy_frame_count >= dummy_frame_size) {
452 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
453 if (dummy_frame_addr)
454 dummy_frame_addr = (CORE_ADDR*) xrealloc
455 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
456 else
457 dummy_frame_addr = (CORE_ADDR*)
458 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
459 }
460
461 sp = read_register(SP_REGNUM);
359a097f 462 pc = read_register(PC_REGNUM);
5816555b 463 store_address (pc_targ, 4, pc);
41abdfbd 464
3a4f9786
MT
465 (void) skip_prologue (get_pc_function_start (pc) + FUNCTION_START_OFFSET, &fdata);
466
41abdfbd
JG
467 dummy_frame_addr [dummy_frame_count++] = sp;
468
469 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 470 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
471 uses that area for IPC purposes when executing ptrace(2) calls. So
472 before writing register values into the new frame, decrement and update
473 %sp first in order to secure your frame. */
474
3a4f9786
MT
475 /* FIXME: We don't check if the stack really has this much space.
476 This is a problem on the ppc simulator (which only grants one page
477 (4096 bytes) by default. */
478
818de002 479 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 480
41abdfbd
JG
481 /* gdb relies on the state of current_frame. We'd better update it,
482 otherwise things like do_registers_info() wouldn't work properly! */
483
484 flush_cached_frames ();
41abdfbd
JG
485
486 /* save program counter in link register's space. */
4f8710e6
PS
487 write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE),
488 pc_targ, 4);
41abdfbd 489
6c6afbb9 490 /* save all floating point and general purpose registers here. */
41abdfbd
JG
491
492 /* fpr's, f0..f31 */
493 for (ii = 0; ii < 32; ++ii)
494 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
495
496 /* gpr's r0..r31 */
497 for (ii=1; ii <=32; ++ii)
498 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
499
818de002
PB
500 /* so far, 32*2 + 32 words = 384 bytes have been written.
501 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
502
503 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
504 write_memory (sp-384-(ii*4),
505 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
506 }
507
508 /* Save sp or so called back chain right here. */
b112f2ae
JK
509 store_address (sp_targ, 4, sp);
510 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 511 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
512
513 /* And finally, this is the back chain. */
359a097f 514 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
515}
516
517
518/* Pop a dummy frame.
519
520 In rs6000 when we push a dummy frame, we save all of the registers. This
521 is usually done before user calls a function explicitly.
522
818de002
PB
523 After a dummy frame is pushed, some instructions are copied into stack,
524 and stack pointer is decremented even more. Since we don't have a frame
525 pointer to get back to the parent frame of the dummy, we start having
526 trouble poping it. Therefore, we keep a dummy frame stack, keeping
527 addresses of dummy frames as such. When poping happens and when we
528 detect that was a dummy frame, we pop it back to its parent by using
529 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
530
531FIXME: This whole concept is broken. You should be able to detect
532a dummy stack frame *on the user's stack itself*. When you do,
533then you know the format of that stack frame -- including its
534saved SP register! There should *not* be a separate stack in the
d6434f39 535GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
536 */
537
368f1e77 538static void
41abdfbd
JG
539pop_dummy_frame ()
540{
541 CORE_ADDR sp, pc;
542 int ii;
543 sp = dummy_frame_addr [--dummy_frame_count];
544
545 /* restore all fpr's. */
546 for (ii = 1; ii <= 32; ++ii)
547 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
548
549 /* restore all gpr's */
550 for (ii=1; ii <= 32; ++ii) {
551 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
552 }
553
818de002
PB
554 /* restore the rest of the registers. */
555 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
556 read_memory (sp-384-(ii*4),
557 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
558
559 read_memory (sp-(DUMMY_FRAME_SIZE-8),
3a4f9786 560 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
561
562 /* when a dummy frame was being pushed, we had to decrement %sp first, in
563 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
564 one we should restore. Change it with the one we need. */
565
566 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
567
568 /* Now we can restore all registers. */
569
5f1c39ef 570 target_store_registers (-1);
41abdfbd
JG
571 pc = read_pc ();
572 flush_cached_frames ();
41abdfbd
JG
573}
574
575
576/* pop the innermost frame, go back to the caller. */
577
ecf4059f 578void
41abdfbd
JG
579pop_frame ()
580{
359a097f 581 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
63641491 582 struct rs6000_framedata fdata;
669caa9c 583 struct frame_info *frame = get_current_frame ();
41abdfbd 584 int addr, ii;
41abdfbd
JG
585
586 pc = read_pc ();
669caa9c 587 sp = FRAME_FP (frame);
41abdfbd
JG
588
589 if (stop_stack_dummy && dummy_frame_count) {
590 pop_dummy_frame ();
591 return;
592 }
593
07aa9fdc
PS
594 /* Make sure that all registers are valid. */
595 read_register_bytes (0, NULL, REGISTER_BYTES);
596
41abdfbd
JG
597 /* figure out previous %pc value. If the function is frameless, it is
598 still in the link register, otherwise walk the frames and retrieve the
599 saved %pc value in the previous frame. */
600
34a1a3bf 601 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
068c9fd6 602 (void) skip_prologue (addr, &fdata);
41abdfbd 603
6c6afbb9 604 if (fdata.frameless)
07aa9fdc
PS
605 prev_sp = sp;
606 else
607 prev_sp = read_memory_integer (sp, 4);
068c9fd6 608 if (fdata.lr_offset == 0)
41abdfbd
JG
609 lr = read_register (LR_REGNUM);
610 else
068c9fd6 611 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
41abdfbd
JG
612
613 /* reset %pc value. */
614 write_register (PC_REGNUM, lr);
615
616 /* reset register values if any was saved earlier. */
6c6afbb9 617 addr = prev_sp - fdata.offset;
41abdfbd 618
6c6afbb9 619 if (fdata.saved_gpr != -1)
669caa9c 620 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 621 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 622 addr += 4;
41abdfbd
JG
623 }
624
6c6afbb9 625 if (fdata.saved_fpr != -1)
669caa9c 626 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
627 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
628 addr += 8;
629 }
630
631 write_register (SP_REGNUM, prev_sp);
5f1c39ef 632 target_store_registers (-1);
41abdfbd 633 flush_cached_frames ();
41abdfbd
JG
634}
635
41abdfbd
JG
636/* fixup the call sequence of a dummy function, with the real function address.
637 its argumets will be passed by gdb. */
638
ecf4059f 639void
2f163bc3 640rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
cd8a3d84
SS
641 char *dummyname;
642 CORE_ADDR pc;
643 CORE_ADDR fun;
2f163bc3
SS
644 int nargs;
645 value_ptr *args;
646 struct type *type;
647 int gcc_p;
41abdfbd
JG
648{
649#define TOC_ADDR_OFFSET 20
650#define TARGET_ADDR_OFFSET 28
651
652 int ii;
ecf4059f
JG
653 CORE_ADDR target_addr;
654 CORE_ADDR tocvalue;
41abdfbd
JG
655
656 target_addr = fun;
657 tocvalue = find_toc_address (target_addr);
658
659 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
660 ii = (ii & 0xffff0000) | (tocvalue >> 16);
661 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
662
663 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
664 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
665 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
666
667 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
668 ii = (ii & 0xffff0000) | (target_addr >> 16);
669 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
670
671 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
672 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
673 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
674}
675
cd8a3d84
SS
676/* Pass the arguments in either registers, or in the stack. In RS6000,
677 the first eight words of the argument list (that might be less than
678 eight parameters if some parameters occupy more than one word) are
679 passed in r3..r11 registers. float and double parameters are
680 passed in fpr's, in addition to that. Rest of the parameters if any
681 are passed in user stack. There might be cases in which half of the
682 parameter is copied into registers, the other half is pushed into
41abdfbd
JG
683 stack.
684
685 If the function is returning a structure, then the return address is passed
94b4f756 686 in r3, then the first 7 words of the parameters can be passed in registers,
41abdfbd
JG
687 starting from r4. */
688
689CORE_ADDR
690push_arguments (nargs, args, sp, struct_return, struct_addr)
cd8a3d84
SS
691 int nargs;
692 value_ptr *args;
693 CORE_ADDR sp;
694 int struct_return;
695 CORE_ADDR struct_addr;
41abdfbd 696{
368f1e77
FF
697 int ii;
698 int len = 0;
41abdfbd
JG
699 int argno; /* current argument number */
700 int argbytes; /* current argument byte */
701 char tmp_buffer [50];
41abdfbd 702 int f_argno = 0; /* current floating point argno */
368f1e77 703 value_ptr arg = 0;
940d5967 704 struct type *type;
41abdfbd 705
368f1e77 706 CORE_ADDR saved_sp;
41abdfbd
JG
707
708 if ( dummy_frame_count <= 0)
199b2450 709 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
710
711 /* The first eight words of ther arguments are passed in registers. Copy
712 them appropriately.
713
714 If the function is returning a `struct', then the first word (which
715 will be passed in r3) is used for struct return address. In that
716 case we should advance one word and start from r4 register to copy
717 parameters. */
718
719 ii = struct_return ? 1 : 0;
720
721 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
722
5222ca60 723 arg = args[argno];
59c84318 724 type = check_typedef (VALUE_TYPE (arg));
940d5967 725 len = TYPE_LENGTH (type);
41abdfbd 726
940d5967 727 if (TYPE_CODE (type) == TYPE_CODE_FLT) {
41abdfbd
JG
728
729 /* floating point arguments are passed in fpr's, as well as gpr's.
730 There are 13 fpr's reserved for passing parameters. At this point
731 there is no way we would run out of them. */
732
733 if (len > 8)
199b2450 734 printf_unfiltered (
41abdfbd
JG
735"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
736
ade40d31
RP
737 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
738 len);
41abdfbd
JG
739 ++f_argno;
740 }
741
742 if (len > 4) {
743
744 /* Argument takes more than one register. */
745 while (argbytes < len) {
746
747 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
748 memcpy (&registers[REGISTER_BYTE(ii+3)],
749 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
750 (len - argbytes) > 4 ? 4 : len - argbytes);
751 ++ii, argbytes += 4;
752
753 if (ii >= 8)
754 goto ran_out_of_registers_for_arguments;
755 }
756 argbytes = 0;
757 --ii;
758 }
759 else { /* Argument can fit in one register. No problem. */
760 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 761 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
762 }
763 ++argno;
764 }
765
766ran_out_of_registers_for_arguments:
767
768 /* location for 8 parameters are always reserved. */
769 sp -= 4 * 8;
770
771 /* another six words for back chain, TOC register, link register, etc. */
772 sp -= 24;
773
774 /* if there are more arguments, allocate space for them in
775 the stack, then push them starting from the ninth one. */
776
777 if ((argno < nargs) || argbytes) {
778 int space = 0, jj;
41abdfbd
JG
779
780 if (argbytes) {
781 space += ((len - argbytes + 3) & -4);
782 jj = argno + 1;
783 }
784 else
785 jj = argno;
786
787 for (; jj < nargs; ++jj) {
940d5967 788 value_ptr val = args[jj];
41abdfbd
JG
789 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
790 }
791
792 /* add location required for the rest of the parameters */
793 space = (space + 7) & -8;
794 sp -= space;
795
796 /* This is another instance we need to be concerned about securing our
797 stack space. If we write anything underneath %sp (r1), we might conflict
798 with the kernel who thinks he is free to use this area. So, update %sp
799 first before doing anything else. */
800
801 write_register (SP_REGNUM, sp);
802
41abdfbd
JG
803 /* if the last argument copied into the registers didn't fit there
804 completely, push the rest of it into stack. */
805
806 if (argbytes) {
807 write_memory (
808 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
809 ++argno;
810 ii += ((len - argbytes + 3) & -4) / 4;
811 }
812
813 /* push the rest of the arguments into stack. */
814 for (; argno < nargs; ++argno) {
815
5222ca60 816 arg = args[argno];
940d5967
PB
817 type = check_typedef (VALUE_TYPE (arg));
818 len = TYPE_LENGTH (type);
41abdfbd
JG
819
820
821 /* float types should be passed in fpr's, as well as in the stack. */
940d5967 822 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) {
41abdfbd
JG
823
824 if (len > 8)
199b2450 825 printf_unfiltered (
41abdfbd
JG
826"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
827
ade40d31
RP
828 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
829 len);
41abdfbd
JG
830 ++f_argno;
831 }
832
359a097f 833 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
834 ii += ((len + 3) & -4) / 4;
835 }
836 }
6c6afbb9 837 else
41abdfbd
JG
838 /* Secure stack areas first, before doing anything else. */
839 write_register (SP_REGNUM, sp);
840
41abdfbd
JG
841 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
842 read_memory (saved_sp, tmp_buffer, 24);
843 write_memory (sp, tmp_buffer, 24);
844
b112f2ae
JK
845 /* set back chain properly */
846 store_address (tmp_buffer, 4, saved_sp);
847 write_memory (sp, tmp_buffer, 4);
41abdfbd 848
5f1c39ef 849 target_store_registers (-1);
41abdfbd
JG
850 return sp;
851}
852
853/* a given return value in `regbuf' with a type `valtype', extract and copy its
854 value into `valbuf' */
855
ecf4059f 856void
41abdfbd 857extract_return_value (valtype, regbuf, valbuf)
cd8a3d84
SS
858 struct type *valtype;
859 char regbuf[REGISTER_BYTES];
860 char *valbuf;
41abdfbd 861{
07781ac0 862 int offset = 0;
41abdfbd
JG
863
864 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
865
866 double dd; float ff;
867 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
868 We need to truncate the return value into float size (4 byte) if
869 necessary. */
870
871 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 872 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
873 TYPE_LENGTH (valtype));
874 else { /* float */
ade40d31 875 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 876 ff = (float)dd;
ade40d31 877 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
878 }
879 }
07781ac0 880 else {
41abdfbd 881 /* return value is copied starting from r3. */
07781ac0
PS
882 if (TARGET_BYTE_ORDER == BIG_ENDIAN
883 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
884 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
885
886 memcpy (valbuf, regbuf + REGISTER_BYTE (3) + offset,
887 TYPE_LENGTH (valtype));
888 }
41abdfbd
JG
889}
890
891
ecf4059f
JG
892/* keep structure return address in this variable.
893 FIXME: This is a horrid kludge which should not be allowed to continue
894 living. This only allows a single nested call to a structure-returning
895 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
896
897CORE_ADDR rs6000_struct_return_address;
898
899
c2e4669f
JG
900/* Indirect function calls use a piece of trampoline code to do context
901 switching, i.e. to set the new TOC table. Skip such code if we are on
902 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
903 Also skip shared library trampoline code (which is different from
904 indirect function call trampolines).
c2e4669f
JG
905 Result is desired PC to step until, or NULL if we are not in
906 trampoline code. */
41abdfbd 907
ecf4059f 908CORE_ADDR
41abdfbd 909skip_trampoline_code (pc)
cd8a3d84 910 CORE_ADDR pc;
41abdfbd
JG
911{
912 register unsigned int ii, op;
07aa9fdc 913 CORE_ADDR solib_target_pc;
41abdfbd
JG
914
915 static unsigned trampoline_code[] = {
916 0x800b0000, /* l r0,0x0(r11) */
917 0x90410014, /* st r2,0x14(r1) */
918 0x7c0903a6, /* mtctr r0 */
919 0x804b0004, /* l r2,0x4(r11) */
920 0x816b0008, /* l r11,0x8(r11) */
921 0x4e800420, /* bctr */
922 0x4e800020, /* br */
923 0
924 };
925
07aa9fdc
PS
926 /* If pc is in a shared library trampoline, return its target. */
927 solib_target_pc = find_solib_trampoline_target (pc);
928 if (solib_target_pc)
929 return solib_target_pc;
930
41abdfbd
JG
931 for (ii=0; trampoline_code[ii]; ++ii) {
932 op = read_memory_integer (pc + (ii*4), 4);
933 if (op != trampoline_code [ii])
359a097f 934 return 0;
41abdfbd
JG
935 }
936 ii = read_register (11); /* r11 holds destination addr */
937 pc = read_memory_integer (ii, 4); /* (r11) value */
938 return pc;
939}
940
068c9fd6 941/* Determines whether the function FI has a frame on the stack or not. */
cd8a3d84 942
ecf4059f 943int
068c9fd6
MM
944frameless_function_invocation (fi)
945 struct frame_info *fi;
ecf4059f
JG
946{
947 CORE_ADDR func_start;
63641491 948 struct rs6000_framedata fdata;
ecf4059f 949
4cc56716
PS
950 /* Don't even think about framelessness except on the innermost frame
951 or if the function was interrupted by a signal. */
952 if (fi->next != NULL && !fi->next->signal_handler_caller)
b0e932ad
JK
953 return 0;
954
4cc56716 955 func_start = get_pc_function_start (fi->pc);
ecf4059f
JG
956
957 /* If we failed to find the start of the function, it is a mistake
958 to inspect the instructions. */
959
960 if (!func_start)
4cc56716
PS
961 {
962 /* A frame with a zero PC is usually created by dereferencing a NULL
963 function pointer, normally causing an immediate core dump of the
964 inferior. Mark function as frameless, as the inferior has no chance
965 of setting up a stack frame. */
966 if (fi->pc == 0)
967 return 1;
968 else
969 return 0;
970 }
ecf4059f 971
4cc56716 972 func_start += FUNCTION_START_OFFSET;
068c9fd6
MM
973 (void) skip_prologue (func_start, &fdata);
974 return fdata.frameless;
ecf4059f
JG
975}
976
068c9fd6 977/* Return the PC saved in a frame */
cd8a3d84 978
068c9fd6
MM
979unsigned long
980frame_saved_pc (fi)
981 struct frame_info *fi;
982{
983 CORE_ADDR func_start;
984 struct rs6000_framedata fdata;
068c9fd6 985
965dde97
PS
986 if (fi->signal_handler_caller)
987 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
988
068c9fd6
MM
989 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
990
991 /* If we failed to find the start of the function, it is a mistake
992 to inspect the instructions. */
993 if (!func_start)
994 return 0;
995
996 (void) skip_prologue (func_start, &fdata);
068c9fd6 997
4b4c6c96 998 if (fdata.lr_offset == 0 && fi->next != NULL)
4cc56716
PS
999 {
1000 if (fi->next->signal_handler_caller)
1001 return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
1002 else
1003 return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE,
1004 4);
1005 }
4b4c6c96
MM
1006
1007 if (fdata.lr_offset == 0)
1008 return read_register (LR_REGNUM);
1009
068c9fd6
MM
1010 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
1011}
ecf4059f
JG
1012
1013/* If saved registers of frame FI are not known yet, read and cache them.
63641491 1014 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
ecf4059f
JG
1015 in which case the framedata are read. */
1016
1017static void
1018frame_get_cache_fsr (fi, fdatap)
1019 struct frame_info *fi;
63641491 1020 struct rs6000_framedata *fdatap;
ecf4059f
JG
1021{
1022 int ii;
1023 CORE_ADDR frame_addr;
63641491 1024 struct rs6000_framedata work_fdata;
ecf4059f
JG
1025
1026 if (fi->cache_fsr)
1027 return;
1028
1029 if (fdatap == NULL) {
1030 fdatap = &work_fdata;
068c9fd6 1031 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
ecf4059f
JG
1032 }
1033
1034 fi->cache_fsr = (struct frame_saved_regs *)
1035 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1036 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1037
1038 if (fi->prev && fi->prev->frame)
1039 frame_addr = fi->prev->frame;
1040 else
1041 frame_addr = read_memory_integer (fi->frame, 4);
1042
1043 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
965dde97 1044 All fpr's from saved_fpr to fp31 are saved. */
ecf4059f
JG
1045
1046 if (fdatap->saved_fpr >= 0) {
965dde97
PS
1047 int fpr_offset = frame_addr + fdatap->fpr_offset;
1048 for (ii = fdatap->saved_fpr; ii < 32; ii++) {
1049 fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset;
1050 fpr_offset += 8;
1051 }
ecf4059f
JG
1052 }
1053
1054 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
965dde97 1055 All gpr's from saved_gpr to gpr31 are saved. */
ecf4059f 1056
965dde97
PS
1057 if (fdatap->saved_gpr >= 0) {
1058 int gpr_offset = frame_addr + fdatap->gpr_offset;
1059 for (ii = fdatap->saved_gpr; ii < 32; ii++) {
1060 fi->cache_fsr->regs [ii] = gpr_offset;
1061 gpr_offset += 4;
1062 }
1063 }
1064
1065 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1066 the CR. */
1067 if (fdatap->cr_offset != 0)
1068 fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset;
1069
1070 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1071 the LR. */
1072 if (fdatap->lr_offset != 0)
1073 fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset;
ecf4059f
JG
1074}
1075
1076/* Return the address of a frame. This is the inital %sp value when the frame
1077 was first allocated. For functions calling alloca(), it might be saved in
1078 an alloca register. */
1079
1080CORE_ADDR
1081frame_initial_stack_address (fi)
1082 struct frame_info *fi;
1083{
1084 CORE_ADDR tmpaddr;
63641491 1085 struct rs6000_framedata fdata;
ecf4059f
JG
1086 struct frame_info *callee_fi;
1087
1088 /* if the initial stack pointer (frame address) of this frame is known,
1089 just return it. */
1090
1091 if (fi->initial_sp)
1092 return fi->initial_sp;
1093
1094 /* find out if this function is using an alloca register.. */
1095
068c9fd6 1096 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
ecf4059f
JG
1097
1098 /* if saved registers of this frame are not known yet, read and cache them. */
1099
1100 if (!fi->cache_fsr)
1101 frame_get_cache_fsr (fi, &fdata);
1102
1103 /* If no alloca register used, then fi->frame is the value of the %sp for
1104 this frame, and it is good enough. */
1105
1106 if (fdata.alloca_reg < 0) {
1107 fi->initial_sp = fi->frame;
1108 return fi->initial_sp;
1109 }
1110
1111 /* This function has an alloca register. If this is the top-most frame
1112 (with the lowest address), the value in alloca register is good. */
1113
1114 if (!fi->next)
1115 return fi->initial_sp = read_register (fdata.alloca_reg);
1116
1117 /* Otherwise, this is a caller frame. Callee has usually already saved
1118 registers, but there are exceptions (such as when the callee
1119 has no parameters). Find the address in which caller's alloca
1120 register is saved. */
1121
1122 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1123
1124 if (!callee_fi->cache_fsr)
cdb1cc92 1125 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1126
1127 /* this is the address in which alloca register is saved. */
1128
1129 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1130 if (tmpaddr) {
1131 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1132 return fi->initial_sp;
1133 }
1134
1135 /* Go look into deeper levels of the frame chain to see if any one of
1136 the callees has saved alloca register. */
1137 }
1138
1139 /* If alloca register was not saved, by the callee (or any of its callees)
1140 then the value in the register is still good. */
1141
1142 return fi->initial_sp = read_register (fdata.alloca_reg);
1143}
1144
669caa9c 1145CORE_ADDR
f3649227
JK
1146rs6000_frame_chain (thisframe)
1147 struct frame_info *thisframe;
1148{
669caa9c 1149 CORE_ADDR fp;
f3649227
JK
1150 if (inside_entry_file ((thisframe)->pc))
1151 return 0;
cee86be3 1152 if (thisframe->signal_handler_caller)
9ed8604f 1153 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
4cc56716
PS
1154 else if (thisframe->next != NULL
1155 && thisframe->next->signal_handler_caller
1156 && frameless_function_invocation (thisframe))
1157 /* A frameless function interrupted by a signal did not change the
1158 frame pointer. */
1159 fp = FRAME_FP (thisframe);
cee86be3
JK
1160 else
1161 fp = read_memory_integer ((thisframe)->frame, 4);
1162
f3649227
JK
1163 return fp;
1164}
ecf4059f
JG
1165\f
1166/* Keep an array of load segment information and their TOC table addresses.
1167 This info will be useful when calling a shared library function by hand. */
1168
1169struct loadinfo {
1170 CORE_ADDR textorg, dataorg;
1171 unsigned long toc_offset;
1172};
1173
1174#define LOADINFOLEN 10
1175
ecf4059f
JG
1176static struct loadinfo *loadinfo = NULL;
1177static int loadinfolen = 0;
1178static int loadinfotocindex = 0;
3c02636b 1179static int loadinfotextindex = 0;
ecf4059f
JG
1180
1181
1182void
1183xcoff_init_loadinfo ()
1184{
1185 loadinfotocindex = 0;
1186 loadinfotextindex = 0;
1187
1188 if (loadinfolen == 0) {
1189 loadinfo = (struct loadinfo *)
1190 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1191 loadinfolen = LOADINFOLEN;
1192 }
1193}
1194
1195
1196/* FIXME -- this is never called! */
368f1e77 1197#if 0
ecf4059f
JG
1198void
1199free_loadinfo ()
1200{
1201 if (loadinfo)
1202 free (loadinfo);
1203 loadinfo = NULL;
1204 loadinfolen = 0;
1205 loadinfotocindex = 0;
1206 loadinfotextindex = 0;
1207}
368f1e77 1208#endif
ecf4059f
JG
1209
1210/* this is called from xcoffread.c */
1211
1212void
07dc1e42
MM
1213xcoff_add_toc_to_loadinfo (tocoff)
1214 unsigned long tocoff;
ecf4059f
JG
1215{
1216 while (loadinfotocindex >= loadinfolen) {
1217 loadinfolen += LOADINFOLEN;
1218 loadinfo = (struct loadinfo *)
1219 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1220 }
1221 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1222}
1223
2aefe6e4 1224void
ecf4059f
JG
1225add_text_to_loadinfo (textaddr, dataaddr)
1226 CORE_ADDR textaddr;
1227 CORE_ADDR dataaddr;
1228{
1229 while (loadinfotextindex >= loadinfolen) {
1230 loadinfolen += LOADINFOLEN;
1231 loadinfo = (struct loadinfo *)
1232 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1233 }
1234 loadinfo [loadinfotextindex].textorg = textaddr;
1235 loadinfo [loadinfotextindex].dataorg = dataaddr;
1236 ++loadinfotextindex;
1237}
1238
1239
cd8a3d84
SS
1240/* Note that this assumes that the "textorg" and "dataorg" elements of
1241 a member of this array are correlated with the "toc_offset" element
1242 of the same member. This is taken care of because the loops which
1243 assign the former (in xcoff_relocate_symtab or xcoff_relocate_core)
1244 and the latter (in scan_xcoff_symtab, via vmap_symtab, in
1245 vmap_ldinfo or xcoff_relocate_core) traverse the same objfiles in
1246 the same order. */
ecf4059f
JG
1247
1248static CORE_ADDR
1249find_toc_address (pc)
1250 CORE_ADDR pc;
1251{
211b564e
PS
1252 int ii, toc_entry;
1253 CORE_ADDR tocbase = 0;
ecf4059f 1254
65eaea27 1255 toc_entry = -1;
ecf4059f
JG
1256 for (ii=0; ii < loadinfotextindex; ++ii)
1257 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1258 toc_entry = ii;
1259 tocbase = loadinfo[ii].textorg;
1260 }
1261
65eaea27
JL
1262 if (toc_entry == -1)
1263 error ("Unable to find TOC entry for pc 0x%x\n", pc);
ecf4059f
JG
1264 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1265}
18b46e7c 1266
65eaea27
JL
1267/* Return nonzero if ADDR (a function pointer) is in the data space and
1268 is therefore a special function pointer. */
1269
1270int
1271is_magic_function_pointer (addr)
1272 CORE_ADDR addr;
1273{
1274 struct obj_section *s;
1275
1276 s = find_pc_section (addr);
1277 if (s && s->the_bfd_section->flags & SEC_CODE)
1278 return 0;
1279 else
1280 return 1;
1281}
1282
5c172b4b
MM
1283#ifdef GDB_TARGET_POWERPC
1284int
1285gdb_print_insn_powerpc (memaddr, info)
1286 bfd_vma memaddr;
1287 disassemble_info *info;
1288{
1289 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1290 return print_insn_big_powerpc (memaddr, info);
1291 else
1292 return print_insn_little_powerpc (memaddr, info);
1293}
1294#endif
1295
18b46e7c
SS
1296void
1297_initialize_rs6000_tdep ()
1298{
8678180e 1299#ifndef ELF_OBJECT_FORMAT
062cb0d3
FF
1300 {
1301 extern void (*xcoff_add_toc_to_loadinfo_hook) PARAMS ((unsigned long));
8678180e
MM
1302 extern void (*xcoff_init_loadinfo_hook) PARAMS ((void));
1303
1304 /* Initialize hook in xcoffread for recording the toc offset value
1305 of a symbol table into the ldinfo structure, for native rs6000
1306 config. */
062cb0d3 1307 xcoff_add_toc_to_loadinfo_hook = &xcoff_add_toc_to_loadinfo;
062cb0d3 1308
8678180e
MM
1309 /* Initialize hook in xcoffread for calling xcoff_init_loadinfo in
1310 a native rs6000 config. */
062cb0d3
FF
1311 xcoff_init_loadinfo_hook = &xcoff_init_loadinfo;
1312 }
8678180e 1313#endif /* ELF_OBJECT_FORMAT */
062cb0d3 1314
18b46e7c
SS
1315 /* FIXME, this should not be decided via ifdef. */
1316#ifdef GDB_TARGET_POWERPC
5c172b4b 1317 tm_print_insn = gdb_print_insn_powerpc;
18b46e7c
SS
1318#else
1319 tm_print_insn = print_insn_rs6000;
1320#endif
1321}
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