import gdb-19990422 snapshot
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
c906108c
SS
1/* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
3 Free Software Foundation, Inc.
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
26#include "gdbcore.h"
27#include "gdbcmd.h"
28#include "symfile.h"
29#include "objfiles.h"
30#include "xcoffsolib.h"
31
32extern int errno;
33
34/* Breakpoint shadows for the single step instructions will be kept here. */
35
36static struct sstep_breaks {
37 /* Address, or 0 if this is not in use. */
38 CORE_ADDR address;
39 /* Shadow contents. */
40 char data[4];
41} stepBreaks[2];
42
43/* Hook for determining the TOC address when calling functions in the
44 inferior under AIX. The initialization code in rs6000-nat.c sets
45 this hook to point to find_toc_address. */
46
47CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL;
48
49/* Static function prototypes */
50
51static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
52 CORE_ADDR safety));
53
54static void frame_get_saved_regs PARAMS ((struct frame_info *fi,
55 struct rs6000_framedata *fdatap));
56
57static void pop_dummy_frame PARAMS ((void));
58
59static CORE_ADDR frame_initial_stack_address PARAMS ((struct frame_info *));
60
61/* Fill in fi->saved_regs */
62
63struct frame_extra_info
64{
65 /* Functions calling alloca() change the value of the stack
66 pointer. We need to use initial stack pointer (which is saved in
67 r31 by gcc) in such cases. If a compiler emits traceback table,
68 then we should use the alloca register specified in traceback
69 table. FIXME. */
70 CORE_ADDR initial_sp; /* initial stack pointer. */
71};
72
73void
74rs6000_init_extra_frame_info (fromleaf, fi)
75 int fromleaf;
76 struct frame_info *fi;
77{
78 fi->extra_info = (struct frame_extra_info*)
79 frame_obstack_alloc (sizeof (struct frame_extra_info));
80 fi->extra_info->initial_sp = 0;
81 if (fi->next != (CORE_ADDR) 0
82 && fi->pc < TEXT_SEGMENT_BASE)
7a292a7a 83 /* We're in get_prev_frame */
c906108c
SS
84 /* and this is a special signal frame. */
85 /* (fi->pc will be some low address in the kernel, */
86 /* to which the signal handler returns). */
87 fi->signal_handler_caller = 1;
88}
89
90
91void
92rs6000_frame_init_saved_regs (fi)
93 struct frame_info *fi;
94{
95 frame_get_saved_regs (fi, NULL);
96}
97
98CORE_ADDR
99rs6000_frame_args_address (fi)
100 struct frame_info *fi;
101{
102 if (fi->extra_info->initial_sp != 0)
103 return fi->extra_info->initial_sp;
104 else
105 return frame_initial_stack_address (fi);
106}
107
108
109/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
110
111static CORE_ADDR
112branch_dest (opcode, instr, pc, safety)
113 int opcode;
114 int instr;
115 CORE_ADDR pc;
116 CORE_ADDR safety;
117{
118 CORE_ADDR dest;
119 int immediate;
120 int absolute;
121 int ext_op;
122
123 absolute = (int) ((instr >> 1) & 1);
124
125 switch (opcode) {
126 case 18 :
127 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
128 if (absolute)
129 dest = immediate;
130 else
131 dest = pc + immediate;
132 break;
133
134 case 16 :
135 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
136 if (absolute)
137 dest = immediate;
138 else
139 dest = pc + immediate;
140 break;
141
142 case 19 :
143 ext_op = (instr>>1) & 0x3ff;
144
145 if (ext_op == 16) /* br conditional register */
146 {
147 dest = read_register (LR_REGNUM) & ~3;
148
149 /* If we are about to return from a signal handler, dest is
150 something like 0x3c90. The current frame is a signal handler
151 caller frame, upon completion of the sigreturn system call
152 execution will return to the saved PC in the frame. */
153 if (dest < TEXT_SEGMENT_BASE)
154 {
155 struct frame_info *fi;
156
157 fi = get_current_frame ();
158 if (fi != NULL)
159 dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET,
160 4);
161 }
162 }
163
164 else if (ext_op == 528) /* br cond to count reg */
165 {
166 dest = read_register (CTR_REGNUM) & ~3;
167
168 /* If we are about to execute a system call, dest is something
169 like 0x22fc or 0x3b00. Upon completion the system call
170 will return to the address in the link register. */
171 if (dest < TEXT_SEGMENT_BASE)
172 dest = read_register (LR_REGNUM) & ~3;
173 }
174 else return -1;
175 break;
176
177 default: return -1;
178 }
179 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
180}
181
182
183/* Sequence of bytes for breakpoint instruction. */
184
185#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
186#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
187
188unsigned char *
189rs6000_breakpoint_from_pc (bp_addr, bp_size)
190 CORE_ADDR *bp_addr;
191 int *bp_size;
192{
193 static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
194 static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
195 *bp_size = 4;
196 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
197 return big_breakpoint;
198 else
199 return little_breakpoint;
200}
201
202
203/* AIX does not support PT_STEP. Simulate it. */
204
205void
206rs6000_software_single_step (signal, insert_breakpoints_p)
207 unsigned int signal;
208 int insert_breakpoints_p;
209{
210#define INSNLEN(OPCODE) 4
211
212 static char le_breakp[] = LITTLE_BREAKPOINT;
213 static char be_breakp[] = BIG_BREAKPOINT;
214 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
215 int ii, insn;
216 CORE_ADDR loc;
217 CORE_ADDR breaks[2];
218 int opcode;
219
220 if (insert_breakpoints_p) {
221
222 loc = read_pc ();
223
224 insn = read_memory_integer (loc, 4);
225
226 breaks[0] = loc + INSNLEN(insn);
227 opcode = insn >> 26;
228 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
229
230 /* Don't put two breakpoints on the same address. */
231 if (breaks[1] == breaks[0])
232 breaks[1] = -1;
233
234 stepBreaks[1].address = 0;
235
236 for (ii=0; ii < 2; ++ii) {
237
238 /* ignore invalid breakpoint. */
239 if ( breaks[ii] == -1)
240 continue;
241
242 read_memory (breaks[ii], stepBreaks[ii].data, 4);
243
244 write_memory (breaks[ii], breakp, 4);
245 stepBreaks[ii].address = breaks[ii];
246 }
247
248 } else {
249
250 /* remove step breakpoints. */
251 for (ii=0; ii < 2; ++ii)
252 if (stepBreaks[ii].address != 0)
253 write_memory
254 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
255
256 }
257 errno = 0; /* FIXME, don't ignore errors! */
258 /* What errors? {read,write}_memory call error(). */
259}
260
261
262/* return pc value after skipping a function prologue and also return
263 information about a function frame.
264
265 in struct rs6000_framedata fdata:
266 - frameless is TRUE, if function does not have a frame.
267 - nosavedpc is TRUE, if function does not save %pc value in its frame.
268 - offset is the initial size of this stack frame --- the amount by
269 which we decrement the sp to allocate the frame.
270 - saved_gpr is the number of the first saved gpr.
271 - saved_fpr is the number of the first saved fpr.
272 - alloca_reg is the number of the register used for alloca() handling.
273 Otherwise -1.
274 - gpr_offset is the offset of the first saved gpr from the previous frame.
275 - fpr_offset is the offset of the first saved fpr from the previous frame.
276 - lr_offset is the offset of the saved lr
277 - cr_offset is the offset of the saved cr
278*/
279
280#define SIGNED_SHORT(x) \
281 ((sizeof (short) == 2) \
282 ? ((int)(short)(x)) \
283 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
284
285#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
286
287CORE_ADDR
288skip_prologue (pc, fdata)
289 CORE_ADDR pc;
290 struct rs6000_framedata *fdata;
291{
292 CORE_ADDR orig_pc = pc;
293 char buf[4];
294 unsigned long op;
295 long offset = 0;
296 int lr_reg = 0;
297 int cr_reg = 0;
298 int reg;
299 int framep = 0;
300 int minimal_toc_loaded = 0;
301 static struct rs6000_framedata zero_frame;
302
303 *fdata = zero_frame;
304 fdata->saved_gpr = -1;
305 fdata->saved_fpr = -1;
306 fdata->alloca_reg = -1;
307 fdata->frameless = 1;
308 fdata->nosavedpc = 1;
309
310 if (target_read_memory (pc, buf, 4))
311 return pc; /* Can't access it -- assume no prologue. */
312
313 /* Assume that subsequent fetches can fail with low probability. */
314 pc -= 4;
315 for (;;)
316 {
317 pc += 4;
318 op = read_memory_integer (pc, 4);
319
320 if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */
321 lr_reg = (op & 0x03e00000) | 0x90010000;
322 continue;
323
324 } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */
325 cr_reg = (op & 0x03e00000) | 0x90010000;
326 continue;
327
328 } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
329 reg = GET_SRC_REG (op);
330 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) {
331 fdata->saved_fpr = reg;
332 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
333 }
334 continue;
335
336 } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
337 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1),
338 rx >= r13 */
339 (op & 0x03e00000) >= 0x01a00000)) {
340
341 reg = GET_SRC_REG (op);
342 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) {
343 fdata->saved_gpr = reg;
344 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
345 }
346 continue;
347
348 } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used
349 for >= 32k frames */
350 fdata->offset = (op & 0x0000ffff) << 16;
351 fdata->frameless = 0;
352 continue;
353
354 } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd ha
355 lf of >= 32k frames */
356 fdata->offset |= (op & 0x0000ffff);
357 fdata->frameless = 0;
358 continue;
359
360 } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1)
361 where Rx == lr */
362 fdata->lr_offset = SIGNED_SHORT (op) + offset;
363 fdata->nosavedpc = 0;
364 lr_reg = 0;
365 continue;
366
367 } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1)
368 where Rx == cr */
369 fdata->cr_offset = SIGNED_SHORT (op) + offset;
370 cr_reg = 0;
371 continue;
372
373 } else if (op == 0x48000005) { /* bl .+4 used in
374 -mrelocatable */
375 continue;
376
377 } else if (op == 0x48000004) { /* b .+4 (xlc) */
378 break;
379
380 } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
381 in V.4 -mrelocatable */
382 op == 0x7fc0f214) && /* add r30,r0,r30, used
383 in V.4 -mrelocatable */
384 lr_reg == 0x901e0000) {
385 continue;
386
387 } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
388 in V.4 -mminimal-toc */
389 (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */
390 continue;
391
392 } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo,
393 to save fprs??? */
394
395 fdata->frameless = 0;
396 /* Don't skip over the subroutine call if it is not within the first
397 three instructions of the prologue. */
398 if ((pc - orig_pc) > 8)
399 break;
400
401 op = read_memory_integer (pc+4, 4);
402
403 /* At this point, make sure this is not a trampoline function
404 (a function that simply calls another functions, and nothing else).
405 If the next is not a nop, this branch was part of the function
406 prologue. */
407
408 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
409 break; /* don't skip over
410 this branch */
411 continue;
412
413 /* update stack pointer */
414 } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
415 fdata->frameless = 0;
416 fdata->offset = SIGNED_SHORT (op);
417 offset = fdata->offset;
418 continue;
419
420 } else if (op == 0x7c21016e) { /* stwux 1,1,0 */
421 fdata->frameless = 0;
422 offset = fdata->offset;
423 continue;
424
425 /* Load up minimal toc pointer */
426 } else if ((op >> 22) == 0x20f
427 && ! minimal_toc_loaded) { /* l r31,... or l r30,... */
428 minimal_toc_loaded = 1;
429 continue;
430
431 /* store parameters in stack */
432 } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
433 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
434 (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */
435 continue;
436
437 /* store parameters in stack via frame pointer */
438 } else if (framep &&
439 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
440 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
441 (op & 0xfc1f0000) == 0xfc1f0000)) { /* frsp, fp?,NUM(r1) */
442 continue;
443
444 /* Set up frame pointer */
445 } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
446 || op == 0x7c3f0b78) { /* mr r31, r1 */
447 fdata->frameless = 0;
448 framep = 1;
449 fdata->alloca_reg = 31;
450 continue;
451
452 /* Another way to set up the frame pointer. */
453 } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */
454 fdata->frameless = 0;
455 framep = 1;
456 fdata->alloca_reg = (op & ~0x38010000) >> 21;
457 continue;
458
459 } else {
460 break;
461 }
462 }
463
464#if 0
465/* I have problems with skipping over __main() that I need to address
466 * sometime. Previously, I used to use misc_function_vector which
467 * didn't work as well as I wanted to be. -MGO */
468
469 /* If the first thing after skipping a prolog is a branch to a function,
470 this might be a call to an initializer in main(), introduced by gcc2.
471 We'd like to skip over it as well. Fortunately, xlc does some extra
472 work before calling a function right after a prologue, thus we can
473 single out such gcc2 behaviour. */
474
475
476 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
477 op = read_memory_integer (pc+4, 4);
478
479 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
480
481 /* check and see if we are in main. If so, skip over this initializer
482 function as well. */
483
484 tmp = find_pc_misc_function (pc);
485 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
486 return pc + 8;
487 }
488 }
489#endif /* 0 */
490
491 fdata->offset = - fdata->offset;
492 return pc;
493}
494
495
496/*************************************************************************
497 Support for creating pushind a dummy frame into the stack, and popping
498 frames, etc.
499*************************************************************************/
500
501/* The total size of dummy frame is 436, which is;
502
503 32 gpr's - 128 bytes
504 32 fpr's - 256 "
505 7 the rest - 28 "
506 and 24 extra bytes for the callee's link area. The last 24 bytes
507 for the link area might not be necessary, since it will be taken
508 care of by push_arguments(). */
509
510#define DUMMY_FRAME_SIZE 436
511
512#define DUMMY_FRAME_ADDR_SIZE 10
513
514/* Make sure you initialize these in somewhere, in case gdb gives up what it
515 was debugging and starts debugging something else. FIXMEibm */
516
517static int dummy_frame_count = 0;
518static int dummy_frame_size = 0;
519static CORE_ADDR *dummy_frame_addr = 0;
520
521extern int stop_stack_dummy;
522
523/* push a dummy frame into stack, save all register. Currently we are saving
524 only gpr's and fpr's, which is not good enough! FIXMEmgo */
525
526void
527push_dummy_frame ()
528{
529 /* stack pointer. */
530 CORE_ADDR sp;
531 /* Same thing, target byte order. */
532 char sp_targ[4];
533
534 /* link register. */
535 CORE_ADDR pc;
536 /* Same thing, target byte order. */
537 char pc_targ[4];
538
539 /* Needed to figure out where to save the dummy link area.
540 FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */
541 struct rs6000_framedata fdata;
542
543 int ii;
544
545 target_fetch_registers (-1);
546
547 if (dummy_frame_count >= dummy_frame_size) {
548 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
549 if (dummy_frame_addr)
550 dummy_frame_addr = (CORE_ADDR*) xrealloc
551 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
552 else
553 dummy_frame_addr = (CORE_ADDR*)
554 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
555 }
556
557 sp = read_register(SP_REGNUM);
558 pc = read_register(PC_REGNUM);
559 store_address (pc_targ, 4, pc);
560
561 skip_prologue (get_pc_function_start (pc), &fdata);
562
563 dummy_frame_addr [dummy_frame_count++] = sp;
564
565 /* Be careful! If the stack pointer is not decremented first, then kernel
566 thinks he is free to use the space underneath it. And kernel actually
567 uses that area for IPC purposes when executing ptrace(2) calls. So
568 before writing register values into the new frame, decrement and update
569 %sp first in order to secure your frame. */
570
571 /* FIXME: We don't check if the stack really has this much space.
572 This is a problem on the ppc simulator (which only grants one page
573 (4096 bytes) by default. */
574
575 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
576
577 /* gdb relies on the state of current_frame. We'd better update it,
578 otherwise things like do_registers_info() wouldn't work properly! */
579
580 flush_cached_frames ();
581
582 /* save program counter in link register's space. */
583 write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE),
584 pc_targ, 4);
585
586 /* save all floating point and general purpose registers here. */
587
588 /* fpr's, f0..f31 */
589 for (ii = 0; ii < 32; ++ii)
590 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
591
592 /* gpr's r0..r31 */
593 for (ii=1; ii <=32; ++ii)
594 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
595
596 /* so far, 32*2 + 32 words = 384 bytes have been written.
597 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
598
599 for (ii=1; ii <= (LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii) {
600 write_memory (sp-384-(ii*4),
601 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
602 }
603
604 /* Save sp or so called back chain right here. */
605 store_address (sp_targ, 4, sp);
606 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
607 sp -= DUMMY_FRAME_SIZE;
608
609 /* And finally, this is the back chain. */
610 write_memory (sp+8, pc_targ, 4);
611}
612
613
614/* Pop a dummy frame.
615
616 In rs6000 when we push a dummy frame, we save all of the registers. This
617 is usually done before user calls a function explicitly.
618
619 After a dummy frame is pushed, some instructions are copied into stack,
620 and stack pointer is decremented even more. Since we don't have a frame
621 pointer to get back to the parent frame of the dummy, we start having
622 trouble poping it. Therefore, we keep a dummy frame stack, keeping
623 addresses of dummy frames as such. When poping happens and when we
624 detect that was a dummy frame, we pop it back to its parent by using
625 dummy frame stack (`dummy_frame_addr' array).
626
627FIXME: This whole concept is broken. You should be able to detect
628a dummy stack frame *on the user's stack itself*. When you do,
629then you know the format of that stack frame -- including its
630saved SP register! There should *not* be a separate stack in the
631GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
632 */
633
634static void
635pop_dummy_frame ()
636{
637 CORE_ADDR sp, pc;
638 int ii;
639 sp = dummy_frame_addr [--dummy_frame_count];
640
641 /* restore all fpr's. */
642 for (ii = 1; ii <= 32; ++ii)
643 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
644
645 /* restore all gpr's */
646 for (ii=1; ii <= 32; ++ii) {
647 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
648 }
649
650 /* restore the rest of the registers. */
651 for (ii=1; ii <=(LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii)
652 read_memory (sp-384-(ii*4),
653 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
654
655 read_memory (sp-(DUMMY_FRAME_SIZE-8),
656 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
657
658 /* when a dummy frame was being pushed, we had to decrement %sp first, in
659 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
660 one we should restore. Change it with the one we need. */
661
662 memcpy (&registers [REGISTER_BYTE(FP_REGNUM)], (char *) &sp, sizeof (int));
663
664 /* Now we can restore all registers. */
665
666 target_store_registers (-1);
667 pc = read_pc ();
668 flush_cached_frames ();
669}
670
671
672/* pop the innermost frame, go back to the caller. */
673
674void
675pop_frame ()
676{
677 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
678 struct rs6000_framedata fdata;
679 struct frame_info *frame = get_current_frame ();
680 int addr, ii;
681
682 pc = read_pc ();
683 sp = FRAME_FP (frame);
684
685 if (stop_stack_dummy)
686 {
7a292a7a
SS
687 if (USE_GENERIC_DUMMY_FRAMES)
688 {
689 generic_pop_dummy_frame ();
690 flush_cached_frames ();
691 return;
692 }
693 else
694 {
695 if (dummy_frame_count)
696 pop_dummy_frame ();
697 return;
698 }
c906108c
SS
699 }
700
701 /* Make sure that all registers are valid. */
702 read_register_bytes (0, NULL, REGISTER_BYTES);
703
704 /* figure out previous %pc value. If the function is frameless, it is
705 still in the link register, otherwise walk the frames and retrieve the
706 saved %pc value in the previous frame. */
707
708 addr = get_pc_function_start (frame->pc);
709 (void) skip_prologue (addr, &fdata);
710
711 if (fdata.frameless)
712 prev_sp = sp;
713 else
714 prev_sp = read_memory_integer (sp, 4);
715 if (fdata.lr_offset == 0)
716 lr = read_register (LR_REGNUM);
717 else
718 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
719
720 /* reset %pc value. */
721 write_register (PC_REGNUM, lr);
722
723 /* reset register values if any was saved earlier. */
724
725 if (fdata.saved_gpr != -1)
726 {
727 addr = prev_sp + fdata.gpr_offset;
728 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
729 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
730 addr += 4;
731 }
732 }
733
734 if (fdata.saved_fpr != -1)
735 {
736 addr = prev_sp + fdata.fpr_offset;
737 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
738 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
739 addr += 8;
740 }
741 }
742
743 write_register (SP_REGNUM, prev_sp);
744 target_store_registers (-1);
745 flush_cached_frames ();
746}
747
748/* fixup the call sequence of a dummy function, with the real function address.
749 its argumets will be passed by gdb. */
750
751void
752rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
753 char *dummyname;
754 CORE_ADDR pc;
755 CORE_ADDR fun;
756 int nargs;
757 value_ptr *args;
758 struct type *type;
759 int gcc_p;
760{
761#define TOC_ADDR_OFFSET 20
762#define TARGET_ADDR_OFFSET 28
763
764 int ii;
765 CORE_ADDR target_addr;
766
767 if (find_toc_address_hook != NULL)
768 {
769 CORE_ADDR tocvalue;
770
771 tocvalue = (*find_toc_address_hook) (fun);
772 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
773 ii = (ii & 0xffff0000) | (tocvalue >> 16);
774 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
775
776 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
777 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
778 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
779 }
780
781 target_addr = fun;
782 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
783 ii = (ii & 0xffff0000) | (target_addr >> 16);
784 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
785
786 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
787 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
788 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
789}
790
791/* Pass the arguments in either registers, or in the stack. In RS6000,
792 the first eight words of the argument list (that might be less than
793 eight parameters if some parameters occupy more than one word) are
794 passed in r3..r11 registers. float and double parameters are
795 passed in fpr's, in addition to that. Rest of the parameters if any
796 are passed in user stack. There might be cases in which half of the
797 parameter is copied into registers, the other half is pushed into
798 stack.
799
800 If the function is returning a structure, then the return address is passed
801 in r3, then the first 7 words of the parameters can be passed in registers,
802 starting from r4. */
803
804CORE_ADDR
805push_arguments (nargs, args, sp, struct_return, struct_addr)
806 int nargs;
807 value_ptr *args;
808 CORE_ADDR sp;
809 int struct_return;
810 CORE_ADDR struct_addr;
811{
812 int ii;
813 int len = 0;
814 int argno; /* current argument number */
815 int argbytes; /* current argument byte */
816 char tmp_buffer [50];
817 int f_argno = 0; /* current floating point argno */
818
819 value_ptr arg = 0;
820 struct type *type;
821
822 CORE_ADDR saved_sp;
823
7a292a7a
SS
824 if (!USE_GENERIC_DUMMY_FRAMES)
825 {
826 if (dummy_frame_count <= 0)
827 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
828 }
c906108c
SS
829
830 /* The first eight words of ther arguments are passed in registers. Copy
831 them appropriately.
832
833 If the function is returning a `struct', then the first word (which
834 will be passed in r3) is used for struct return address. In that
835 case we should advance one word and start from r4 register to copy
836 parameters. */
837
838 ii = struct_return ? 1 : 0;
839
840/*
841effectively indirect call... gcc does...
842
843return_val example( float, int);
844
845eabi:
846 float in fp0, int in r3
847 offset of stack on overflow 8/16
848 for varargs, must go by type.
849power open:
850 float in r3&r4, int in r5
851 offset of stack on overflow different
852both:
853 return in r3 or f0. If no float, must study how gcc emulates floats;
854 pay attention to arg promotion.
855 User may have to cast\args to handle promotion correctly
856 since gdb won't know if prototype supplied or not.
857*/
858
859 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
860
861 arg = args[argno];
862 type = check_typedef (VALUE_TYPE (arg));
863 len = TYPE_LENGTH (type);
864
865 if (TYPE_CODE (type) == TYPE_CODE_FLT) {
866
867 /* floating point arguments are passed in fpr's, as well as gpr's.
868 There are 13 fpr's reserved for passing parameters. At this point
869 there is no way we would run out of them. */
870
871 if (len > 8)
872 printf_unfiltered (
873"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
874
875 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)],
876 VALUE_CONTENTS (arg),
877 len);
878 ++f_argno;
879 }
880
881 if (len > 4) {
882
883 /* Argument takes more than one register. */
884 while (argbytes < len) {
885 memset (&registers[REGISTER_BYTE(ii+3)], 0, sizeof(int));
886 memcpy (&registers[REGISTER_BYTE(ii+3)],
887 ((char*)VALUE_CONTENTS (arg))+argbytes,
888 (len - argbytes) > 4 ? 4 : len - argbytes);
889 ++ii, argbytes += 4;
890
891 if (ii >= 8)
892 goto ran_out_of_registers_for_arguments;
893 }
894 argbytes = 0;
895 --ii;
896 }
897 else { /* Argument can fit in one register. No problem. */
898 memset (&registers[REGISTER_BYTE(ii+3)], 0, sizeof(int));
899 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
900 }
901 ++argno;
902 }
903
904ran_out_of_registers_for_arguments:
905
7a292a7a
SS
906 if (USE_GENERIC_DUMMY_FRAMES)
907 {
908 saved_sp = read_sp ();
909 }
910 else
911 {
912 /* location for 8 parameters are always reserved. */
913 sp -= 4 * 8;
914
915 /* another six words for back chain, TOC register, link register, etc. */
916 sp -= 24;
917 }
c906108c 918
c906108c
SS
919 /* if there are more arguments, allocate space for them in
920 the stack, then push them starting from the ninth one. */
921
922 if ((argno < nargs) || argbytes) {
923 int space = 0, jj;
924
925 if (argbytes) {
926 space += ((len - argbytes + 3) & -4);
927 jj = argno + 1;
928 }
929 else
930 jj = argno;
931
932 for (; jj < nargs; ++jj) {
933 value_ptr val = args[jj];
934 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
935 }
936
937 /* add location required for the rest of the parameters */
938 space = (space + 7) & -8;
939 sp -= space;
940
941 /* This is another instance we need to be concerned about securing our
942 stack space. If we write anything underneath %sp (r1), we might conflict
943 with the kernel who thinks he is free to use this area. So, update %sp
944 first before doing anything else. */
945
946 write_register (SP_REGNUM, sp);
947
948 /* if the last argument copied into the registers didn't fit there
949 completely, push the rest of it into stack. */
950
951 if (argbytes) {
952 write_memory (sp+24+(ii*4),
953 ((char*)VALUE_CONTENTS (arg))+argbytes,
954 len - argbytes);
955 ++argno;
956 ii += ((len - argbytes + 3) & -4) / 4;
957 }
958
959 /* push the rest of the arguments into stack. */
960 for (; argno < nargs; ++argno) {
961
962 arg = args[argno];
963 type = check_typedef (VALUE_TYPE (arg));
964 len = TYPE_LENGTH (type);
965
966
967 /* float types should be passed in fpr's, as well as in the stack. */
968 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) {
969
970 if (len > 8)
971 printf_unfiltered (
972"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
973
974 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)],
975 VALUE_CONTENTS (arg),
976 len);
977 ++f_argno;
978 }
979
980 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
981 ii += ((len + 3) & -4) / 4;
982 }
983 }
984 else
985 /* Secure stack areas first, before doing anything else. */
986 write_register (SP_REGNUM, sp);
987
7a292a7a
SS
988 if (!USE_GENERIC_DUMMY_FRAMES)
989 {
990 /* we want to copy 24 bytes of target's frame to dummy's frame,
991 then set back chain to point to new frame. */
992
993 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
994 read_memory (saved_sp, tmp_buffer, 24);
995 write_memory (sp, tmp_buffer, 24);
996 }
c906108c
SS
997
998 /* set back chain properly */
999 store_address (tmp_buffer, 4, saved_sp);
1000 write_memory (sp, tmp_buffer, 4);
1001
1002 target_store_registers (-1);
1003 return sp;
1004}
1005#ifdef ELF_OBJECT_FORMAT
1006
1007/* Function: ppc_push_return_address (pc, sp)
1008 Set up the return address for the inferior function call. */
1009
1010CORE_ADDR
1011ppc_push_return_address (pc, sp)
1012 CORE_ADDR pc;
1013 CORE_ADDR sp;
1014{
1015 write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ());
1016 return sp;
1017}
1018
1019#endif
1020
1021/* a given return value in `regbuf' with a type `valtype', extract and copy its
1022 value into `valbuf' */
1023
1024void
1025extract_return_value (valtype, regbuf, valbuf)
1026 struct type *valtype;
1027 char regbuf[REGISTER_BYTES];
1028 char *valbuf;
1029{
1030 int offset = 0;
1031
1032 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
1033
1034 double dd; float ff;
1035 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1036 We need to truncate the return value into float size (4 byte) if
1037 necessary. */
1038
1039 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1040 memcpy (valbuf,
1041 &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
1042 TYPE_LENGTH (valtype));
1043 else { /* float */
1044 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1045 ff = (float)dd;
1046 memcpy (valbuf, &ff, sizeof(float));
1047 }
1048 }
1049 else {
1050 /* return value is copied starting from r3. */
1051 if (TARGET_BYTE_ORDER == BIG_ENDIAN
1052 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1053 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1054
1055 memcpy (valbuf,
1056 regbuf + REGISTER_BYTE (3) + offset,
1057 TYPE_LENGTH (valtype));
1058 }
1059}
1060
1061
1062/* keep structure return address in this variable.
1063 FIXME: This is a horrid kludge which should not be allowed to continue
1064 living. This only allows a single nested call to a structure-returning
1065 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1066
1067CORE_ADDR rs6000_struct_return_address;
1068
1069
1070/* Indirect function calls use a piece of trampoline code to do context
1071 switching, i.e. to set the new TOC table. Skip such code if we are on
1072 its first instruction (as when we have single-stepped to here).
1073 Also skip shared library trampoline code (which is different from
1074 indirect function call trampolines).
1075 Result is desired PC to step until, or NULL if we are not in
1076 trampoline code. */
1077
1078CORE_ADDR
1079skip_trampoline_code (pc)
1080 CORE_ADDR pc;
1081{
1082 register unsigned int ii, op;
1083 CORE_ADDR solib_target_pc;
1084
1085 static unsigned trampoline_code[] = {
1086 0x800b0000, /* l r0,0x0(r11) */
1087 0x90410014, /* st r2,0x14(r1) */
1088 0x7c0903a6, /* mtctr r0 */
1089 0x804b0004, /* l r2,0x4(r11) */
1090 0x816b0008, /* l r11,0x8(r11) */
1091 0x4e800420, /* bctr */
1092 0x4e800020, /* br */
1093 0
1094 };
1095
1096 /* If pc is in a shared library trampoline, return its target. */
1097 solib_target_pc = find_solib_trampoline_target (pc);
1098 if (solib_target_pc)
1099 return solib_target_pc;
1100
1101 for (ii=0; trampoline_code[ii]; ++ii) {
1102 op = read_memory_integer (pc + (ii*4), 4);
1103 if (op != trampoline_code [ii])
1104 return 0;
1105 }
1106 ii = read_register (11); /* r11 holds destination addr */
1107 pc = read_memory_integer (ii, 4); /* (r11) value */
1108 return pc;
1109}
1110
1111/* Determines whether the function FI has a frame on the stack or not. */
1112
1113int
1114frameless_function_invocation (fi)
1115 struct frame_info *fi;
1116{
1117 CORE_ADDR func_start;
1118 struct rs6000_framedata fdata;
1119
1120 /* Don't even think about framelessness except on the innermost frame
1121 or if the function was interrupted by a signal. */
1122 if (fi->next != NULL && !fi->next->signal_handler_caller)
1123 return 0;
1124
1125 func_start = get_pc_function_start (fi->pc);
1126
1127 /* If we failed to find the start of the function, it is a mistake
1128 to inspect the instructions. */
1129
1130 if (!func_start)
1131 {
1132 /* A frame with a zero PC is usually created by dereferencing a NULL
1133 function pointer, normally causing an immediate core dump of the
1134 inferior. Mark function as frameless, as the inferior has no chance
1135 of setting up a stack frame. */
1136 if (fi->pc == 0)
1137 return 1;
1138 else
1139 return 0;
1140 }
1141
1142 (void) skip_prologue (func_start, &fdata);
1143 return fdata.frameless;
1144}
1145
1146/* Return the PC saved in a frame */
1147
1148unsigned long
1149frame_saved_pc (fi)
1150 struct frame_info *fi;
1151{
1152 CORE_ADDR func_start;
1153 struct rs6000_framedata fdata;
1154
1155 if (fi->signal_handler_caller)
1156 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
1157
7a292a7a
SS
1158 if (USE_GENERIC_DUMMY_FRAMES)
1159 {
1160 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1161 return generic_read_register_dummy(fi->pc, fi->frame, PC_REGNUM);
1162 }
c906108c
SS
1163
1164 func_start = get_pc_function_start (fi->pc);
1165
1166 /* If we failed to find the start of the function, it is a mistake
1167 to inspect the instructions. */
1168 if (!func_start)
1169 return 0;
1170
1171 (void) skip_prologue (func_start, &fdata);
1172
1173 if (fdata.lr_offset == 0 && fi->next != NULL)
1174 {
1175 if (fi->next->signal_handler_caller)
1176 return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
1177 else
1178 return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE,
1179 4);
1180 }
1181
1182 if (fdata.lr_offset == 0)
1183 return read_register (LR_REGNUM);
1184
1185 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
1186}
1187
1188/* If saved registers of frame FI are not known yet, read and cache them.
1189 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1190 in which case the framedata are read. */
1191
1192static void
1193frame_get_saved_regs (fi, fdatap)
1194 struct frame_info *fi;
1195 struct rs6000_framedata *fdatap;
1196{
1197 int ii;
1198 CORE_ADDR frame_addr;
1199 struct rs6000_framedata work_fdata;
1200
1201 if (fi->saved_regs)
1202 return;
1203
1204 if (fdatap == NULL)
1205 {
1206 fdatap = &work_fdata;
1207 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
1208 }
1209
1210 frame_saved_regs_zalloc (fi);
1211
1212 /* If there were any saved registers, figure out parent's stack
1213 pointer. */
1214 /* The following is true only if the frame doesn't have a call to
1215 alloca(), FIXME. */
1216
1217 if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
1218 && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
1219 frame_addr = 0;
1220 else if (fi->prev && fi->prev->frame)
1221 frame_addr = fi->prev->frame;
1222 else
1223 frame_addr = read_memory_integer (fi->frame, 4);
1224
1225 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1226 All fpr's from saved_fpr to fp31 are saved. */
1227
1228 if (fdatap->saved_fpr >= 0)
1229 {
1230 int i;
1231 int fpr_offset = frame_addr + fdatap->fpr_offset;
1232 for (i = fdatap->saved_fpr; i < 32; i++)
1233 {
1234 fi->saved_regs [FP0_REGNUM + i] = fpr_offset;
1235 fpr_offset += 8;
1236 }
1237 }
1238
1239 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1240 All gpr's from saved_gpr to gpr31 are saved. */
1241
1242 if (fdatap->saved_gpr >= 0)
1243 {
1244 int i;
1245 int gpr_offset = frame_addr + fdatap->gpr_offset;
1246 for (i = fdatap->saved_gpr; i < 32; i++)
1247 {
1248 fi->saved_regs [i] = gpr_offset;
1249 gpr_offset += 4;
1250 }
1251 }
1252
1253 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1254 the CR. */
1255 if (fdatap->cr_offset != 0)
1256 fi->saved_regs [CR_REGNUM] = frame_addr + fdatap->cr_offset;
1257
1258 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1259 the LR. */
1260 if (fdatap->lr_offset != 0)
1261 fi->saved_regs [LR_REGNUM] = frame_addr + fdatap->lr_offset;
1262}
1263
1264/* Return the address of a frame. This is the inital %sp value when the frame
1265 was first allocated. For functions calling alloca(), it might be saved in
1266 an alloca register. */
1267
1268static CORE_ADDR
1269frame_initial_stack_address (fi)
1270 struct frame_info *fi;
1271{
1272 CORE_ADDR tmpaddr;
1273 struct rs6000_framedata fdata;
1274 struct frame_info *callee_fi;
1275
1276 /* if the initial stack pointer (frame address) of this frame is known,
1277 just return it. */
1278
1279 if (fi->extra_info->initial_sp)
1280 return fi->extra_info->initial_sp;
1281
1282 /* find out if this function is using an alloca register.. */
1283
1284 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
1285
1286 /* if saved registers of this frame are not known yet, read and cache them. */
1287
1288 if (!fi->saved_regs)
1289 frame_get_saved_regs (fi, &fdata);
1290
1291 /* If no alloca register used, then fi->frame is the value of the %sp for
1292 this frame, and it is good enough. */
1293
1294 if (fdata.alloca_reg < 0)
1295 {
1296 fi->extra_info->initial_sp = fi->frame;
1297 return fi->extra_info->initial_sp;
1298 }
1299
1300 /* This function has an alloca register. If this is the top-most frame
1301 (with the lowest address), the value in alloca register is good. */
1302
1303 if (!fi->next)
1304 return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1305
1306 /* Otherwise, this is a caller frame. Callee has usually already saved
1307 registers, but there are exceptions (such as when the callee
1308 has no parameters). Find the address in which caller's alloca
1309 register is saved. */
1310
1311 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1312
1313 if (!callee_fi->saved_regs)
1314 frame_get_saved_regs (callee_fi, NULL);
1315
1316 /* this is the address in which alloca register is saved. */
1317
1318 tmpaddr = callee_fi->saved_regs [fdata.alloca_reg];
1319 if (tmpaddr) {
1320 fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4);
1321 return fi->extra_info->initial_sp;
1322 }
1323
1324 /* Go look into deeper levels of the frame chain to see if any one of
1325 the callees has saved alloca register. */
1326 }
1327
1328 /* If alloca register was not saved, by the callee (or any of its callees)
1329 then the value in the register is still good. */
1330
1331 fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1332 return fi->extra_info->initial_sp;
1333}
1334
1335CORE_ADDR
1336rs6000_frame_chain (thisframe)
1337 struct frame_info *thisframe;
1338{
1339 CORE_ADDR fp;
1340
7a292a7a
SS
1341 if (USE_GENERIC_DUMMY_FRAMES)
1342 {
1343 if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
1344 return thisframe->frame; /* dummy frame same as caller's frame */
1345 }
c906108c
SS
1346
1347 if (inside_entry_file (thisframe->pc) ||
1348 thisframe->pc == entry_point_address ())
1349 return 0;
1350
1351 if (thisframe->signal_handler_caller)
1352 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
1353 else if (thisframe->next != NULL
1354 && thisframe->next->signal_handler_caller
1355 && frameless_function_invocation (thisframe))
1356 /* A frameless function interrupted by a signal did not change the
1357 frame pointer. */
1358 fp = FRAME_FP (thisframe);
1359 else
1360 fp = read_memory_integer ((thisframe)->frame, 4);
1361
7a292a7a
SS
1362 if (USE_GENERIC_DUMMY_FRAMES)
1363 {
1364 CORE_ADDR fpp, lr;
1365
1366 lr = read_register (LR_REGNUM);
1367 if (lr == entry_point_address ())
1368 if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
1369 if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
1370 return fpp;
1371 }
c906108c 1372
c906108c
SS
1373 return fp;
1374}
1375\f
1376/* Return nonzero if ADDR (a function pointer) is in the data space and
1377 is therefore a special function pointer. */
1378
1379int
1380is_magic_function_pointer (addr)
1381 CORE_ADDR addr;
1382{
1383 struct obj_section *s;
1384
1385 s = find_pc_section (addr);
1386 if (s && s->the_bfd_section->flags & SEC_CODE)
1387 return 0;
1388 else
1389 return 1;
1390}
1391
1392#ifdef GDB_TARGET_POWERPC
1393int
1394gdb_print_insn_powerpc (memaddr, info)
1395 bfd_vma memaddr;
1396 disassemble_info *info;
1397{
1398 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1399 return print_insn_big_powerpc (memaddr, info);
1400 else
1401 return print_insn_little_powerpc (memaddr, info);
1402}
1403#endif
1404
c906108c
SS
1405\f
1406/* Handling the various PowerPC/RS6000 variants. */
1407
1408
1409/* The arrays here called register_names_MUMBLE hold names that
1410 the rs6000_register_name function returns.
1411
1412 For each family of PPC variants, I've tried to isolate out the
1413 common registers and put them up front, so that as long as you get
1414 the general family right, GDB will correctly identify the registers
1415 common to that family. The common register sets are:
1416
1417 For the 60x family: hid0 hid1 iabr dabr pir
1418
1419 For the 505 and 860 family: eie eid nri
1420
1421 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1422 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1423 pbu1 pbl2 pbu2
1424
1425 Most of these register groups aren't anything formal. I arrived at
1426 them by looking at the registers that occurred in more than one
1427 processor. */
1428
1429/* UISA register names common across all architectures, including POWER. */
1430
1431#define COMMON_UISA_REG_NAMES \
1432 /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1433 /* 8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \
1434 /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \
1435 /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \
1436 /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1437 /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \
1438 /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \
1439 /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \
1440 /* 64 */ "pc", "ps"
1441
1442/* UISA-level SPR names for PowerPC. */
1443#define PPC_UISA_SPR_NAMES \
1444 /* 66 */ "cr", "lr", "ctr", "xer", ""
1445
1446/* Segment register names, for PowerPC. */
1447#define PPC_SEGMENT_REG_NAMES \
1448 /* 71 */ "sr0", "sr1", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", \
1449 /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15"
1450
1451/* OEA SPR names for 32-bit PowerPC implementations.
1452 The blank space is for "asr", which is only present on 64-bit
1453 implementations. */
1454#define PPC_32_OEA_SPR_NAMES \
1455 /* 87 */ "pvr", \
1456 /* 88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \
1457 /* 92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \
1458 /* 96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \
1459 /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \
1460 /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\
1461 /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear"
1462
1463/* For the RS6000, we only cover user-level SPR's. */
1464char *register_names_rs6000[] =
1465{
1466 COMMON_UISA_REG_NAMES,
1467 /* 66 */ "cnd", "lr", "cnt", "xer", "mq"
1468};
1469
1470/* a UISA-only view of the PowerPC. */
1471char *register_names_uisa[] =
1472{
1473 COMMON_UISA_REG_NAMES,
1474 PPC_UISA_SPR_NAMES
1475};
1476
1477char *register_names_403[] =
1478{
1479 COMMON_UISA_REG_NAMES,
1480 PPC_UISA_SPR_NAMES,
1481 PPC_SEGMENT_REG_NAMES,
1482 PPC_32_OEA_SPR_NAMES,
1483 /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
1484 /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
1485 /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2"
1486};
1487
1488char *register_names_403GC[] =
1489{
1490 COMMON_UISA_REG_NAMES,
1491 PPC_UISA_SPR_NAMES,
1492 PPC_SEGMENT_REG_NAMES,
1493 PPC_32_OEA_SPR_NAMES,
1494 /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
1495 /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
1496 /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2",
1497 /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu"
1498};
1499
1500char *register_names_505[] =
1501{
1502 COMMON_UISA_REG_NAMES,
1503 PPC_UISA_SPR_NAMES,
1504 PPC_SEGMENT_REG_NAMES,
1505 PPC_32_OEA_SPR_NAMES,
1506 /* 119 */ "eie", "eid", "nri"
1507};
1508
1509char *register_names_860[] =
1510{
1511 COMMON_UISA_REG_NAMES,
1512 PPC_UISA_SPR_NAMES,
1513 PPC_SEGMENT_REG_NAMES,
1514 PPC_32_OEA_SPR_NAMES,
1515 /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr",
1516 /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph",
1517 /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat",
1518 /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr",
1519 /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid",
1520 /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw",
1521 /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0",
1522 /* 165 */ "md_dbram1"
1523};
1524
1525/* Note that the 601 has different register numbers for reading and
1526 writing RTCU and RTCL. However, how one reads and writes a
1527 register is the stub's problem. */
1528char *register_names_601[] =
1529{
1530 COMMON_UISA_REG_NAMES,
1531 PPC_UISA_SPR_NAMES,
1532 PPC_SEGMENT_REG_NAMES,
1533 PPC_32_OEA_SPR_NAMES,
1534 /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu",
1535 /* 126 */ "rtcl"
1536};
1537
1538char *register_names_602[] =
1539{
1540 COMMON_UISA_REG_NAMES,
1541 PPC_UISA_SPR_NAMES,
1542 PPC_SEGMENT_REG_NAMES,
1543 PPC_32_OEA_SPR_NAMES,
1544 /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr",
1545 /* 128 */ "ser", "sp", "lt"
1546};
1547
1548char *register_names_603[] =
1549{
1550 COMMON_UISA_REG_NAMES,
1551 PPC_UISA_SPR_NAMES,
1552 PPC_SEGMENT_REG_NAMES,
1553 PPC_32_OEA_SPR_NAMES,
1554 /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1",
1555 /* 127 */ "hash2", "imiss", "icmp", "rpa"
1556};
1557
1558char *register_names_604[] =
1559{
1560 COMMON_UISA_REG_NAMES,
1561 PPC_UISA_SPR_NAMES,
1562 PPC_SEGMENT_REG_NAMES,
1563 PPC_32_OEA_SPR_NAMES,
1564 /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2",
1565 /* 127 */ "sia", "sda"
1566};
1567
1568char *register_names_750[] =
1569{
1570 COMMON_UISA_REG_NAMES,
1571 PPC_UISA_SPR_NAMES,
1572 PPC_SEGMENT_REG_NAMES,
1573 PPC_32_OEA_SPR_NAMES,
1574 /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2",
1575 /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2",
1576 /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2",
1577 /* 142 */ "thrm3"
1578};
1579
1580
1581/* Information about a particular processor variant. */
1582struct variant
1583{
1584 /* Name of this variant. */
1585 char *name;
1586
1587 /* English description of the variant. */
1588 char *description;
1589
1590 /* Table of register names; registers[R] is the name of the register
1591 number R. */
1592 int num_registers;
1593 char **registers;
1594};
1595
1596#define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1597
1598
1599/* Information in this table comes from the following web sites:
1600 IBM: http://www.chips.ibm.com:80/products/embedded/
1601 Motorola: http://www.mot.com/SPS/PowerPC/
1602
1603 I'm sure I've got some of the variant descriptions not quite right.
1604 Please report any inaccuracies you find to GDB's maintainer.
1605
1606 If you add entries to this table, please be sure to allow the new
1607 value as an argument to the --with-cpu flag, in configure.in. */
1608
1609static struct variant
1610variants[] =
1611{
1612 { "ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code",
1613 num_registers (register_names_uisa), register_names_uisa },
1614 { "rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view",
1615 num_registers (register_names_rs6000), register_names_rs6000 },
1616 { "403", "IBM PowerPC 403",
1617 num_registers (register_names_403), register_names_403 },
1618 { "403GC", "IBM PowerPC 403GC",
1619 num_registers (register_names_403GC), register_names_403GC },
1620 { "505", "Motorola PowerPC 505",
1621 num_registers (register_names_505), register_names_505 },
1622 { "860", "Motorola PowerPC 860 or 850",
1623 num_registers (register_names_860), register_names_860 },
1624 { "601", "Motorola PowerPC 601",
1625 num_registers (register_names_601), register_names_601 },
1626 { "602", "Motorola PowerPC 602",
1627 num_registers (register_names_602), register_names_602 },
1628 { "603", "Motorola/IBM PowerPC 603 or 603e",
1629 num_registers (register_names_603), register_names_603 },
1630 { "604", "Motorola PowerPC 604 or 604e",
1631 num_registers (register_names_604), register_names_604 },
1632 { "750", "Motorola/IBM PowerPC 750 or 750",
1633 num_registers (register_names_750), register_names_750 },
1634 { 0, 0, 0, 0 }
1635};
1636
1637
1638static struct variant *current_variant;
1639
1640char *
1641rs6000_register_name (int i)
1642{
1643 if (i < 0 || i >= NUM_REGS)
1644 error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number");
1645
1646 return ((i < current_variant->num_registers)
1647 ? current_variant->registers[i]
1648 : "");
1649}
1650
1651
1652static void
1653install_variant (struct variant *v)
1654{
1655 current_variant = v;
1656}
1657
1658
1659/* Look up the variant named NAME in the `variants' table. Return a
1660 pointer to the struct variant, or null if we couldn't find it. */
1661static struct variant *
1662find_variant_by_name (char *name)
1663{
1664 int i;
1665
1666 for (i = 0; variants[i].name; i++)
1667 if (! strcmp (name, variants[i].name))
1668 return &variants[i];
1669
1670 return 0;
1671}
1672
1673
1674/* Install the PPC/RS6000 variant named NAME in the `variants' table.
1675 Return zero if we installed it successfully, or a non-zero value if
1676 we couldn't do it.
1677
1678 This might be useful to code outside this file, which doesn't want
1679 to depend on the exact indices of the entries in the `variants'
1680 table. Just make it non-static if you want that. */
1681static int
1682install_variant_by_name (char *name)
1683{
1684 struct variant *v = find_variant_by_name (name);
1685
1686 if (v)
1687 {
1688 install_variant (v);
1689 return 0;
1690 }
1691 else
1692 return 1;
1693}
1694
1695
1696static void
1697list_variants ()
1698{
1699 int i;
1700
1701 printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n");
1702
1703 for (i = 0; variants[i].name; i++)
1704 printf_filtered (" %-8s %s\n",
1705 variants[i].name, variants[i].description);
1706}
1707
1708
1709static void
1710show_current_variant ()
1711{
1712 printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n",
1713 current_variant->name);
1714}
1715
1716
1717static void
1718set_processor (char *arg, int from_tty)
1719{
1720 int i;
1721
1722 if (! arg || arg[0] == '\0')
1723 {
1724 list_variants ();
1725 return;
1726 }
1727
1728 if (install_variant_by_name (arg))
1729 {
1730 error_begin ();
1731 fprintf_filtered (gdb_stderr,
1732 "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg);
1733 list_variants ();
1734 return_to_top_level (RETURN_ERROR);
1735 }
1736
1737 show_current_variant ();
1738}
1739
1740static void
1741show_processor (char *arg, int from_tty)
1742{
1743 show_current_variant ();
1744}
1745
1746
1747\f
1748/* Initialization code. */
1749
1750void
1751_initialize_rs6000_tdep ()
1752{
1753 /* FIXME, this should not be decided via ifdef. */
1754#ifdef GDB_TARGET_POWERPC
1755 tm_print_insn = gdb_print_insn_powerpc;
1756#else
1757 tm_print_insn = print_insn_rs6000;
1758#endif
1759
1760 /* I don't think we should use the set/show command arrangement
1761 here, because the way that's implemented makes it hard to do the
1762 error checking we want in a reasonable way. So we just add them
1763 as two separate commands. */
1764 add_cmd ("processor", class_support, set_processor,
1765 "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\
1766If you set this, GDB will know about the special-purpose registers that are\n\
1767available on the given variant.\n\
1768Type `set processor' alone for a list of recognized variant names.",
1769 &setlist);
1770 add_cmd ("processor", class_support, show_processor,
1771 "Show the variant of the PowerPC or RS6000 processor in use.\n\
1772Use `set processor' to change this.",
1773 &showlist);
1774
1775 /* Set the current PPC processor variant. */
1776 {
1777 int status = 1;
1778
1779#ifdef TARGET_CPU_DEFAULT
1780 status = install_variant_by_name (TARGET_CPU_DEFAULT);
1781#endif
1782
1783 if (status)
1784 {
1785#ifdef GDB_TARGET_POWERPC
1786 install_variant_by_name ("ppc-uisa");
1787#else
1788 install_variant_by_name ("rs6000");
1789#endif
1790 }
1791 }
1792}
This page took 0.128385 seconds and 4 git commands to generate.