* arch-utils.c, arch-utils.h (default_convert_from_func_ptr_addr):
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for GDB, the GNU debugger.
c877c8e6 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
c906108c
SS
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "target.h"
27#include "gdbcore.h"
28#include "gdbcmd.h"
29#include "symfile.h"
30#include "objfiles.h"
31#include "xcoffsolib.h"
7a78ae4e
ND
32#include "arch-utils.h"
33
34#include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */
35#include "coff/internal.h" /* for libcoff.h */
36#include "bfd/libcoff.h" /* for xcoff_data */
37
9aa1e687 38#include "elf-bfd.h"
7a78ae4e 39
9aa1e687 40#include "ppc-tdep.h"
7a78ae4e
ND
41
42/* If the kernel has to deliver a signal, it pushes a sigcontext
43 structure on the stack and then calls the signal handler, passing
44 the address of the sigcontext in an argument register. Usually
45 the signal handler doesn't save this register, so we have to
46 access the sigcontext structure via an offset from the signal handler
47 frame.
48 The following constants were determined by experimentation on AIX 3.2. */
49#define SIG_FRAME_PC_OFFSET 96
50#define SIG_FRAME_LR_OFFSET 108
51#define SIG_FRAME_FP_OFFSET 284
52
7a78ae4e
ND
53/* To be used by skip_prologue. */
54
55struct rs6000_framedata
56 {
57 int offset; /* total size of frame --- the distance
58 by which we decrement sp to allocate
59 the frame */
60 int saved_gpr; /* smallest # of saved gpr */
61 int saved_fpr; /* smallest # of saved fpr */
62 int alloca_reg; /* alloca register number (frame ptr) */
63 char frameless; /* true if frameless functions. */
64 char nosavedpc; /* true if pc not saved. */
65 int gpr_offset; /* offset of saved gprs from prev sp */
66 int fpr_offset; /* offset of saved fprs from prev sp */
67 int lr_offset; /* offset of saved lr */
68 int cr_offset; /* offset of saved cr */
69 };
70
71/* Description of a single register. */
72
73struct reg
74 {
75 char *name; /* name of register */
76 unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */
77 unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */
78 unsigned char fpr; /* whether register is floating-point */
79 };
80
81/* Private data that this module attaches to struct gdbarch. */
82
83struct gdbarch_tdep
84 {
85 int wordsize; /* size in bytes of fixed-point word */
9aa1e687 86 int osabi; /* OS / ABI from ELF header */
7a78ae4e
ND
87 int *regoff; /* byte offsets in register arrays */
88 const struct reg *regs; /* from current variant */
89 };
c906108c 90
7a78ae4e
ND
91/* Return the current architecture's gdbarch_tdep structure. */
92
93#define TDEP gdbarch_tdep (current_gdbarch)
c906108c
SS
94
95/* Breakpoint shadows for the single step instructions will be kept here. */
96
c5aa993b
JM
97static struct sstep_breaks
98 {
99 /* Address, or 0 if this is not in use. */
100 CORE_ADDR address;
101 /* Shadow contents. */
102 char data[4];
103 }
104stepBreaks[2];
c906108c
SS
105
106/* Hook for determining the TOC address when calling functions in the
107 inferior under AIX. The initialization code in rs6000-nat.c sets
108 this hook to point to find_toc_address. */
109
7a78ae4e
ND
110CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
111
112/* Hook to set the current architecture when starting a child process.
113 rs6000-nat.c sets this. */
114
115void (*rs6000_set_host_arch_hook) (int) = NULL;
c906108c
SS
116
117/* Static function prototypes */
118
a14ed312
KB
119static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
120 CORE_ADDR safety);
077276e8
KB
121static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
122 struct rs6000_framedata *);
7a78ae4e
ND
123static void frame_get_saved_regs (struct frame_info * fi,
124 struct rs6000_framedata * fdatap);
125static CORE_ADDR frame_initial_stack_address (struct frame_info *);
c906108c 126
7a78ae4e 127/* Read a LEN-byte address from debugged memory address MEMADDR. */
c906108c 128
7a78ae4e
ND
129static CORE_ADDR
130read_memory_addr (CORE_ADDR memaddr, int len)
131{
132 return read_memory_unsigned_integer (memaddr, len);
133}
c906108c 134
7a78ae4e
ND
135static CORE_ADDR
136rs6000_skip_prologue (CORE_ADDR pc)
b83266a0
SS
137{
138 struct rs6000_framedata frame;
077276e8 139 pc = skip_prologue (pc, 0, &frame);
b83266a0
SS
140 return pc;
141}
142
143
c906108c
SS
144/* Fill in fi->saved_regs */
145
146struct frame_extra_info
147{
148 /* Functions calling alloca() change the value of the stack
149 pointer. We need to use initial stack pointer (which is saved in
150 r31 by gcc) in such cases. If a compiler emits traceback table,
151 then we should use the alloca register specified in traceback
152 table. FIXME. */
c5aa993b 153 CORE_ADDR initial_sp; /* initial stack pointer. */
c906108c
SS
154};
155
9aa1e687 156void
7a78ae4e 157rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi)
c906108c 158{
c5aa993b 159 fi->extra_info = (struct frame_extra_info *)
c906108c
SS
160 frame_obstack_alloc (sizeof (struct frame_extra_info));
161 fi->extra_info->initial_sp = 0;
162 if (fi->next != (CORE_ADDR) 0
163 && fi->pc < TEXT_SEGMENT_BASE)
7a292a7a 164 /* We're in get_prev_frame */
c906108c
SS
165 /* and this is a special signal frame. */
166 /* (fi->pc will be some low address in the kernel, */
167 /* to which the signal handler returns). */
168 fi->signal_handler_caller = 1;
169}
170
7a78ae4e
ND
171/* Put here the code to store, into a struct frame_saved_regs,
172 the addresses of the saved registers of frame described by FRAME_INFO.
173 This includes special registers such as pc and fp saved in special
174 ways in the stack frame. sp is even more special:
175 the address we return for it IS the sp for the next frame. */
c906108c 176
7a78ae4e
ND
177/* In this implementation for RS/6000, we do *not* save sp. I am
178 not sure if it will be needed. The following function takes care of gpr's
179 and fpr's only. */
180
9aa1e687 181void
7a78ae4e 182rs6000_frame_init_saved_regs (struct frame_info *fi)
c906108c
SS
183{
184 frame_get_saved_regs (fi, NULL);
185}
186
7a78ae4e
ND
187static CORE_ADDR
188rs6000_frame_args_address (struct frame_info *fi)
c906108c
SS
189{
190 if (fi->extra_info->initial_sp != 0)
191 return fi->extra_info->initial_sp;
192 else
193 return frame_initial_stack_address (fi);
194}
195
7a78ae4e
ND
196/* Immediately after a function call, return the saved pc.
197 Can't go through the frames for this because on some machines
198 the new frame is not set up until the new function executes
199 some instructions. */
200
201static CORE_ADDR
202rs6000_saved_pc_after_call (struct frame_info *fi)
203{
9aa1e687 204 return read_register (PPC_LR_REGNUM);
7a78ae4e 205}
c906108c
SS
206
207/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
208
209static CORE_ADDR
7a78ae4e 210branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
c906108c
SS
211{
212 CORE_ADDR dest;
213 int immediate;
214 int absolute;
215 int ext_op;
216
217 absolute = (int) ((instr >> 1) & 1);
218
c5aa993b
JM
219 switch (opcode)
220 {
221 case 18:
222 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
223 if (absolute)
224 dest = immediate;
225 else
226 dest = pc + immediate;
227 break;
228
229 case 16:
230 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
231 if (absolute)
232 dest = immediate;
233 else
234 dest = pc + immediate;
235 break;
236
237 case 19:
238 ext_op = (instr >> 1) & 0x3ff;
239
240 if (ext_op == 16) /* br conditional register */
241 {
9aa1e687 242 dest = read_register (PPC_LR_REGNUM) & ~3;
c5aa993b
JM
243
244 /* If we are about to return from a signal handler, dest is
245 something like 0x3c90. The current frame is a signal handler
246 caller frame, upon completion of the sigreturn system call
247 execution will return to the saved PC in the frame. */
248 if (dest < TEXT_SEGMENT_BASE)
249 {
250 struct frame_info *fi;
251
252 fi = get_current_frame ();
253 if (fi != NULL)
7a78ae4e
ND
254 dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET,
255 TDEP->wordsize);
c5aa993b
JM
256 }
257 }
258
259 else if (ext_op == 528) /* br cond to count reg */
260 {
9aa1e687 261 dest = read_register (PPC_CTR_REGNUM) & ~3;
c5aa993b
JM
262
263 /* If we are about to execute a system call, dest is something
264 like 0x22fc or 0x3b00. Upon completion the system call
265 will return to the address in the link register. */
266 if (dest < TEXT_SEGMENT_BASE)
9aa1e687 267 dest = read_register (PPC_LR_REGNUM) & ~3;
c5aa993b
JM
268 }
269 else
270 return -1;
271 break;
c906108c 272
c5aa993b
JM
273 default:
274 return -1;
275 }
c906108c
SS
276 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
277}
278
279
280/* Sequence of bytes for breakpoint instruction. */
281
282#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
283#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
284
7a78ae4e
ND
285static unsigned char *
286rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
c906108c
SS
287{
288 static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
289 static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
290 *bp_size = 4;
291 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
292 return big_breakpoint;
293 else
294 return little_breakpoint;
295}
296
297
298/* AIX does not support PT_STEP. Simulate it. */
299
300void
7a78ae4e 301rs6000_software_single_step (unsigned int signal, int insert_breakpoints_p)
c906108c
SS
302{
303#define INSNLEN(OPCODE) 4
304
305 static char le_breakp[] = LITTLE_BREAKPOINT;
306 static char be_breakp[] = BIG_BREAKPOINT;
307 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
308 int ii, insn;
309 CORE_ADDR loc;
310 CORE_ADDR breaks[2];
311 int opcode;
312
c5aa993b
JM
313 if (insert_breakpoints_p)
314 {
c906108c 315
c5aa993b 316 loc = read_pc ();
c906108c 317
c5aa993b 318 insn = read_memory_integer (loc, 4);
c906108c 319
c5aa993b
JM
320 breaks[0] = loc + INSNLEN (insn);
321 opcode = insn >> 26;
322 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
c906108c 323
c5aa993b
JM
324 /* Don't put two breakpoints on the same address. */
325 if (breaks[1] == breaks[0])
326 breaks[1] = -1;
c906108c 327
c5aa993b 328 stepBreaks[1].address = 0;
c906108c 329
c5aa993b
JM
330 for (ii = 0; ii < 2; ++ii)
331 {
c906108c 332
c5aa993b
JM
333 /* ignore invalid breakpoint. */
334 if (breaks[ii] == -1)
335 continue;
c906108c 336
c5aa993b 337 read_memory (breaks[ii], stepBreaks[ii].data, 4);
c906108c 338
c5aa993b
JM
339 write_memory (breaks[ii], breakp, 4);
340 stepBreaks[ii].address = breaks[ii];
341 }
c906108c 342
c5aa993b
JM
343 }
344 else
345 {
c906108c 346
c5aa993b
JM
347 /* remove step breakpoints. */
348 for (ii = 0; ii < 2; ++ii)
349 if (stepBreaks[ii].address != 0)
350 write_memory
351 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
c906108c 352
c5aa993b 353 }
c906108c 354 errno = 0; /* FIXME, don't ignore errors! */
c5aa993b 355 /* What errors? {read,write}_memory call error(). */
c906108c
SS
356}
357
358
359/* return pc value after skipping a function prologue and also return
360 information about a function frame.
361
362 in struct rs6000_framedata fdata:
c5aa993b
JM
363 - frameless is TRUE, if function does not have a frame.
364 - nosavedpc is TRUE, if function does not save %pc value in its frame.
365 - offset is the initial size of this stack frame --- the amount by
366 which we decrement the sp to allocate the frame.
367 - saved_gpr is the number of the first saved gpr.
368 - saved_fpr is the number of the first saved fpr.
369 - alloca_reg is the number of the register used for alloca() handling.
370 Otherwise -1.
371 - gpr_offset is the offset of the first saved gpr from the previous frame.
372 - fpr_offset is the offset of the first saved fpr from the previous frame.
373 - lr_offset is the offset of the saved lr
374 - cr_offset is the offset of the saved cr
375 */
c906108c
SS
376
377#define SIGNED_SHORT(x) \
378 ((sizeof (short) == 2) \
379 ? ((int)(short)(x)) \
380 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
381
382#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
383
7a78ae4e 384static CORE_ADDR
077276e8 385skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
c906108c
SS
386{
387 CORE_ADDR orig_pc = pc;
ddb20c56 388 CORE_ADDR last_prologue_pc;
c906108c
SS
389 char buf[4];
390 unsigned long op;
391 long offset = 0;
482ca3f5
KB
392 int lr_reg = -1;
393 int cr_reg = -1;
c906108c
SS
394 int reg;
395 int framep = 0;
396 int minimal_toc_loaded = 0;
ddb20c56 397 int prev_insn_was_prologue_insn = 1;
c906108c 398
ddb20c56 399 memset (fdata, 0, sizeof (struct rs6000_framedata));
c906108c
SS
400 fdata->saved_gpr = -1;
401 fdata->saved_fpr = -1;
402 fdata->alloca_reg = -1;
403 fdata->frameless = 1;
404 fdata->nosavedpc = 1;
405
c906108c 406 pc -= 4;
077276e8 407 while (lim_pc == 0 || pc < lim_pc - 4)
c906108c
SS
408 {
409 pc += 4;
ddb20c56
KB
410
411 /* Sometimes it isn't clear if an instruction is a prologue
412 instruction or not. When we encounter one of these ambiguous
413 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
414 Otherwise, we'll assume that it really is a prologue instruction. */
415 if (prev_insn_was_prologue_insn)
416 last_prologue_pc = pc;
417 prev_insn_was_prologue_insn = 1;
418
419 if (target_read_memory (pc, buf, 4))
420 break;
421 op = extract_signed_integer (buf, 4);
c906108c 422
c5aa993b
JM
423 if ((op & 0xfc1fffff) == 0x7c0802a6)
424 { /* mflr Rx */
425 lr_reg = (op & 0x03e00000) | 0x90010000;
426 continue;
c906108c 427
c5aa993b
JM
428 }
429 else if ((op & 0xfc1fffff) == 0x7c000026)
430 { /* mfcr Rx */
431 cr_reg = (op & 0x03e00000) | 0x90010000;
432 continue;
c906108c 433
c906108c 434 }
c5aa993b
JM
435 else if ((op & 0xfc1f0000) == 0xd8010000)
436 { /* stfd Rx,NUM(r1) */
437 reg = GET_SRC_REG (op);
438 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
439 {
440 fdata->saved_fpr = reg;
441 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
442 }
443 continue;
c906108c 444
c5aa993b
JM
445 }
446 else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
7a78ae4e
ND
447 (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
448 (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
449 (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
c5aa993b
JM
450 {
451
452 reg = GET_SRC_REG (op);
453 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
454 {
455 fdata->saved_gpr = reg;
7a78ae4e
ND
456 if ((op & 0xfc1f0003) == 0xf8010000)
457 op = (op >> 1) << 1;
c5aa993b
JM
458 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
459 }
460 continue;
c906108c 461
ddb20c56
KB
462 }
463 else if ((op & 0xffff0000) == 0x60000000)
464 {
465 /* nop */
466 /* Allow nops in the prologue, but do not consider them to
467 be part of the prologue unless followed by other prologue
468 instructions. */
469 prev_insn_was_prologue_insn = 0;
470 continue;
471
c906108c 472 }
c5aa993b
JM
473 else if ((op & 0xffff0000) == 0x3c000000)
474 { /* addis 0,0,NUM, used
475 for >= 32k frames */
476 fdata->offset = (op & 0x0000ffff) << 16;
477 fdata->frameless = 0;
478 continue;
479
480 }
481 else if ((op & 0xffff0000) == 0x60000000)
482 { /* ori 0,0,NUM, 2nd ha
483 lf of >= 32k frames */
484 fdata->offset |= (op & 0x0000ffff);
485 fdata->frameless = 0;
486 continue;
487
488 }
482ca3f5 489 else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg)
c5aa993b
JM
490 { /* st Rx,NUM(r1)
491 where Rx == lr */
492 fdata->lr_offset = SIGNED_SHORT (op) + offset;
493 fdata->nosavedpc = 0;
494 lr_reg = 0;
495 continue;
496
497 }
482ca3f5 498 else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg)
c5aa993b
JM
499 { /* st Rx,NUM(r1)
500 where Rx == cr */
501 fdata->cr_offset = SIGNED_SHORT (op) + offset;
502 cr_reg = 0;
503 continue;
504
505 }
506 else if (op == 0x48000005)
507 { /* bl .+4 used in
508 -mrelocatable */
509 continue;
510
511 }
512 else if (op == 0x48000004)
513 { /* b .+4 (xlc) */
514 break;
515
516 }
517 else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
c906108c 518 in V.4 -mrelocatable */
c5aa993b
JM
519 op == 0x7fc0f214) && /* add r30,r0,r30, used
520 in V.4 -mrelocatable */
521 lr_reg == 0x901e0000)
522 {
523 continue;
c906108c 524
c5aa993b
JM
525 }
526 else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
c906108c 527 in V.4 -mminimal-toc */
c5aa993b
JM
528 (op & 0xffff0000) == 0x3bde0000)
529 { /* addi 30,30,foo@l */
530 continue;
c906108c 531
c5aa993b
JM
532 }
533 else if ((op & 0xfc000001) == 0x48000001)
534 { /* bl foo,
535 to save fprs??? */
c906108c 536
c5aa993b
JM
537 fdata->frameless = 0;
538 /* Don't skip over the subroutine call if it is not within the first
539 three instructions of the prologue. */
540 if ((pc - orig_pc) > 8)
541 break;
542
543 op = read_memory_integer (pc + 4, 4);
544
545 /* At this point, make sure this is not a trampoline function
546 (a function that simply calls another functions, and nothing else).
547 If the next is not a nop, this branch was part of the function
548 prologue. */
549
550 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
551 break; /* don't skip over
552 this branch */
553 continue;
554
555 /* update stack pointer */
556 }
7a78ae4e
ND
557 else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
558 (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
559 {
c5aa993b 560 fdata->frameless = 0;
7a78ae4e
ND
561 if ((op & 0xffff0003) == 0xf8210001)
562 op = (op >> 1) << 1;
c5aa993b
JM
563 fdata->offset = SIGNED_SHORT (op);
564 offset = fdata->offset;
565 continue;
566
567 }
568 else if (op == 0x7c21016e)
569 { /* stwux 1,1,0 */
570 fdata->frameless = 0;
571 offset = fdata->offset;
572 continue;
573
574 /* Load up minimal toc pointer */
575 }
576 else if ((op >> 22) == 0x20f
577 && !minimal_toc_loaded)
578 { /* l r31,... or l r30,... */
579 minimal_toc_loaded = 1;
580 continue;
581
f6077098
KB
582 /* move parameters from argument registers to local variable
583 registers */
584 }
585 else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
586 (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
587 (((op >> 21) & 31) <= 10) &&
588 (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */
589 {
590 continue;
591
c5aa993b
JM
592 /* store parameters in stack */
593 }
594 else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
7a78ae4e 595 (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
c5aa993b 596 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
7a78ae4e
ND
597 (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
598 {
c5aa993b 599 continue;
c906108c 600
c5aa993b
JM
601 /* store parameters in stack via frame pointer */
602 }
603 else if (framep &&
604 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
605 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
606 (op & 0xfc1f0000) == 0xfc1f0000))
607 { /* frsp, fp?,NUM(r1) */
608 continue;
609
610 /* Set up frame pointer */
611 }
612 else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
613 || op == 0x7c3f0b78)
614 { /* mr r31, r1 */
615 fdata->frameless = 0;
616 framep = 1;
617 fdata->alloca_reg = 31;
618 continue;
619
620 /* Another way to set up the frame pointer. */
621 }
622 else if ((op & 0xfc1fffff) == 0x38010000)
623 { /* addi rX, r1, 0x0 */
624 fdata->frameless = 0;
625 framep = 1;
626 fdata->alloca_reg = (op & ~0x38010000) >> 21;
627 continue;
628
629 }
630 else
631 {
632 break;
633 }
c906108c
SS
634 }
635
636#if 0
637/* I have problems with skipping over __main() that I need to address
638 * sometime. Previously, I used to use misc_function_vector which
639 * didn't work as well as I wanted to be. -MGO */
640
641 /* If the first thing after skipping a prolog is a branch to a function,
642 this might be a call to an initializer in main(), introduced by gcc2.
643 We'd like to skip over it as well. Fortunately, xlc does some extra
644 work before calling a function right after a prologue, thus we can
645 single out such gcc2 behaviour. */
c906108c 646
c906108c 647
c5aa993b
JM
648 if ((op & 0xfc000001) == 0x48000001)
649 { /* bl foo, an initializer function? */
650 op = read_memory_integer (pc + 4, 4);
651
652 if (op == 0x4def7b82)
653 { /* cror 0xf, 0xf, 0xf (nop) */
c906108c 654
c5aa993b
JM
655 /* check and see if we are in main. If so, skip over this initializer
656 function as well. */
c906108c 657
c5aa993b
JM
658 tmp = find_pc_misc_function (pc);
659 if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main"))
660 return pc + 8;
661 }
c906108c 662 }
c906108c 663#endif /* 0 */
c5aa993b
JM
664
665 fdata->offset = -fdata->offset;
ddb20c56 666 return last_prologue_pc;
c906108c
SS
667}
668
669
670/*************************************************************************
f6077098 671 Support for creating pushing a dummy frame into the stack, and popping
c906108c
SS
672 frames, etc.
673*************************************************************************/
674
c906108c 675
7a78ae4e 676/* Pop the innermost frame, go back to the caller. */
c5aa993b 677
c906108c 678static void
7a78ae4e 679rs6000_pop_frame (void)
c906108c 680{
470d5666 681 CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */
c906108c
SS
682 struct rs6000_framedata fdata;
683 struct frame_info *frame = get_current_frame ();
470d5666 684 int ii, wordsize;
c906108c
SS
685
686 pc = read_pc ();
687 sp = FRAME_FP (frame);
688
58223630 689 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
c906108c 690 {
7a78ae4e
ND
691 generic_pop_dummy_frame ();
692 flush_cached_frames ();
693 return;
c906108c
SS
694 }
695
696 /* Make sure that all registers are valid. */
697 read_register_bytes (0, NULL, REGISTER_BYTES);
698
699 /* figure out previous %pc value. If the function is frameless, it is
700 still in the link register, otherwise walk the frames and retrieve the
701 saved %pc value in the previous frame. */
702
703 addr = get_pc_function_start (frame->pc);
077276e8 704 (void) skip_prologue (addr, frame->pc, &fdata);
c906108c 705
7a78ae4e 706 wordsize = TDEP->wordsize;
c906108c
SS
707 if (fdata.frameless)
708 prev_sp = sp;
709 else
7a78ae4e 710 prev_sp = read_memory_addr (sp, wordsize);
c906108c 711 if (fdata.lr_offset == 0)
9aa1e687 712 lr = read_register (PPC_LR_REGNUM);
c906108c 713 else
7a78ae4e 714 lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
c906108c
SS
715
716 /* reset %pc value. */
717 write_register (PC_REGNUM, lr);
718
719 /* reset register values if any was saved earlier. */
720
721 if (fdata.saved_gpr != -1)
722 {
723 addr = prev_sp + fdata.gpr_offset;
c5aa993b
JM
724 for (ii = fdata.saved_gpr; ii <= 31; ++ii)
725 {
7a78ae4e
ND
726 read_memory (addr, &registers[REGISTER_BYTE (ii)], wordsize);
727 addr += wordsize;
c5aa993b 728 }
c906108c
SS
729 }
730
731 if (fdata.saved_fpr != -1)
732 {
733 addr = prev_sp + fdata.fpr_offset;
c5aa993b
JM
734 for (ii = fdata.saved_fpr; ii <= 31; ++ii)
735 {
736 read_memory (addr, &registers[REGISTER_BYTE (ii + FP0_REGNUM)], 8);
737 addr += 8;
738 }
c906108c
SS
739 }
740
741 write_register (SP_REGNUM, prev_sp);
742 target_store_registers (-1);
743 flush_cached_frames ();
744}
745
7a78ae4e
ND
746/* Fixup the call sequence of a dummy function, with the real function
747 address. Its arguments will be passed by gdb. */
c906108c 748
7a78ae4e
ND
749static void
750rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun,
751 int nargs, value_ptr *args, struct type *type,
752 int gcc_p)
c906108c
SS
753{
754#define TOC_ADDR_OFFSET 20
755#define TARGET_ADDR_OFFSET 28
756
757 int ii;
758 CORE_ADDR target_addr;
759
7a78ae4e 760 if (rs6000_find_toc_address_hook != NULL)
f6077098 761 {
7a78ae4e 762 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun);
9aa1e687 763 write_register (PPC_TOC_REGNUM, tocvalue);
f6077098 764 }
c906108c
SS
765}
766
7a78ae4e 767/* Pass the arguments in either registers, or in the stack. In RS/6000,
c906108c
SS
768 the first eight words of the argument list (that might be less than
769 eight parameters if some parameters occupy more than one word) are
7a78ae4e 770 passed in r3..r10 registers. float and double parameters are
c906108c
SS
771 passed in fpr's, in addition to that. Rest of the parameters if any
772 are passed in user stack. There might be cases in which half of the
773 parameter is copied into registers, the other half is pushed into
774 stack.
775
7a78ae4e
ND
776 Stack must be aligned on 64-bit boundaries when synthesizing
777 function calls.
778
c906108c
SS
779 If the function is returning a structure, then the return address is passed
780 in r3, then the first 7 words of the parameters can be passed in registers,
781 starting from r4. */
782
7a78ae4e
ND
783static CORE_ADDR
784rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
785 int struct_return, CORE_ADDR struct_addr)
c906108c
SS
786{
787 int ii;
788 int len = 0;
c5aa993b
JM
789 int argno; /* current argument number */
790 int argbytes; /* current argument byte */
791 char tmp_buffer[50];
792 int f_argno = 0; /* current floating point argno */
7a78ae4e 793 int wordsize = TDEP->wordsize;
c906108c
SS
794
795 value_ptr arg = 0;
796 struct type *type;
797
798 CORE_ADDR saved_sp;
799
c906108c
SS
800 /* The first eight words of ther arguments are passed in registers. Copy
801 them appropriately.
802
803 If the function is returning a `struct', then the first word (which
804 will be passed in r3) is used for struct return address. In that
805 case we should advance one word and start from r4 register to copy
806 parameters. */
807
c5aa993b 808 ii = struct_return ? 1 : 0;
c906108c
SS
809
810/*
c5aa993b
JM
811 effectively indirect call... gcc does...
812
813 return_val example( float, int);
814
815 eabi:
816 float in fp0, int in r3
817 offset of stack on overflow 8/16
818 for varargs, must go by type.
819 power open:
820 float in r3&r4, int in r5
821 offset of stack on overflow different
822 both:
823 return in r3 or f0. If no float, must study how gcc emulates floats;
824 pay attention to arg promotion.
825 User may have to cast\args to handle promotion correctly
826 since gdb won't know if prototype supplied or not.
827 */
c906108c 828
c5aa993b
JM
829 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
830 {
f6077098 831 int reg_size = REGISTER_RAW_SIZE (ii + 3);
c5aa993b
JM
832
833 arg = args[argno];
834 type = check_typedef (VALUE_TYPE (arg));
835 len = TYPE_LENGTH (type);
836
837 if (TYPE_CODE (type) == TYPE_CODE_FLT)
838 {
839
840 /* floating point arguments are passed in fpr's, as well as gpr's.
841 There are 13 fpr's reserved for passing parameters. At this point
842 there is no way we would run out of them. */
843
844 if (len > 8)
845 printf_unfiltered (
846 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
847
848 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
849 VALUE_CONTENTS (arg),
850 len);
851 ++f_argno;
852 }
853
f6077098 854 if (len > reg_size)
c5aa993b
JM
855 {
856
857 /* Argument takes more than one register. */
858 while (argbytes < len)
859 {
f6077098 860 memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
c5aa993b
JM
861 memcpy (&registers[REGISTER_BYTE (ii + 3)],
862 ((char *) VALUE_CONTENTS (arg)) + argbytes,
f6077098
KB
863 (len - argbytes) > reg_size
864 ? reg_size : len - argbytes);
865 ++ii, argbytes += reg_size;
c5aa993b
JM
866
867 if (ii >= 8)
868 goto ran_out_of_registers_for_arguments;
869 }
870 argbytes = 0;
871 --ii;
872 }
873 else
874 { /* Argument can fit in one register. No problem. */
f6077098
KB
875 int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0;
876 memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
877 memcpy ((char *)&registers[REGISTER_BYTE (ii + 3)] + adj,
878 VALUE_CONTENTS (arg), len);
c5aa993b
JM
879 }
880 ++argno;
c906108c 881 }
c906108c
SS
882
883ran_out_of_registers_for_arguments:
884
7a78ae4e 885 saved_sp = read_sp ();
f6077098 886#ifndef ELF_OBJECT_FORMAT
7a78ae4e
ND
887 /* location for 8 parameters are always reserved. */
888 sp -= wordsize * 8;
f6077098 889
7a78ae4e
ND
890 /* another six words for back chain, TOC register, link register, etc. */
891 sp -= wordsize * 6;
f6077098 892
7a78ae4e
ND
893 /* stack pointer must be quadword aligned */
894 sp &= -16;
f6077098 895#endif
c906108c 896
c906108c
SS
897 /* if there are more arguments, allocate space for them in
898 the stack, then push them starting from the ninth one. */
899
c5aa993b
JM
900 if ((argno < nargs) || argbytes)
901 {
902 int space = 0, jj;
c906108c 903
c5aa993b
JM
904 if (argbytes)
905 {
906 space += ((len - argbytes + 3) & -4);
907 jj = argno + 1;
908 }
909 else
910 jj = argno;
c906108c 911
c5aa993b
JM
912 for (; jj < nargs; ++jj)
913 {
914 value_ptr val = args[jj];
915 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
916 }
c906108c 917
c5aa993b 918 /* add location required for the rest of the parameters */
f6077098 919 space = (space + 15) & -16;
c5aa993b 920 sp -= space;
c906108c 921
c5aa993b
JM
922 /* This is another instance we need to be concerned about securing our
923 stack space. If we write anything underneath %sp (r1), we might conflict
924 with the kernel who thinks he is free to use this area. So, update %sp
925 first before doing anything else. */
c906108c 926
c5aa993b 927 write_register (SP_REGNUM, sp);
c906108c 928
c5aa993b
JM
929 /* if the last argument copied into the registers didn't fit there
930 completely, push the rest of it into stack. */
c906108c 931
c5aa993b
JM
932 if (argbytes)
933 {
934 write_memory (sp + 24 + (ii * 4),
935 ((char *) VALUE_CONTENTS (arg)) + argbytes,
936 len - argbytes);
937 ++argno;
938 ii += ((len - argbytes + 3) & -4) / 4;
939 }
c906108c 940
c5aa993b
JM
941 /* push the rest of the arguments into stack. */
942 for (; argno < nargs; ++argno)
943 {
c906108c 944
c5aa993b
JM
945 arg = args[argno];
946 type = check_typedef (VALUE_TYPE (arg));
947 len = TYPE_LENGTH (type);
c906108c
SS
948
949
c5aa993b
JM
950 /* float types should be passed in fpr's, as well as in the stack. */
951 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
952 {
c906108c 953
c5aa993b
JM
954 if (len > 8)
955 printf_unfiltered (
956 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
c906108c 957
c5aa993b
JM
958 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
959 VALUE_CONTENTS (arg),
960 len);
961 ++f_argno;
962 }
c906108c 963
c5aa993b
JM
964 write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
965 ii += ((len + 3) & -4) / 4;
966 }
c906108c 967 }
c906108c
SS
968 else
969 /* Secure stack areas first, before doing anything else. */
970 write_register (SP_REGNUM, sp);
971
c906108c
SS
972 /* set back chain properly */
973 store_address (tmp_buffer, 4, saved_sp);
974 write_memory (sp, tmp_buffer, 4);
975
976 target_store_registers (-1);
977 return sp;
978}
c906108c
SS
979
980/* Function: ppc_push_return_address (pc, sp)
981 Set up the return address for the inferior function call. */
982
7a78ae4e
ND
983static CORE_ADDR
984ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c 985{
9aa1e687 986 write_register (PPC_LR_REGNUM, CALL_DUMMY_ADDRESS ());
c906108c
SS
987 return sp;
988}
989
7a78ae4e
ND
990/* Extract a function return value of type TYPE from raw register array
991 REGBUF, and copy that return value into VALBUF in virtual format. */
c906108c 992
7a78ae4e
ND
993static void
994rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
c906108c
SS
995{
996 int offset = 0;
997
c5aa993b
JM
998 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
999 {
c906108c 1000
c5aa993b
JM
1001 double dd;
1002 float ff;
1003 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1004 We need to truncate the return value into float size (4 byte) if
1005 necessary. */
c906108c 1006
c5aa993b
JM
1007 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1008 memcpy (valbuf,
1009 &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
1010 TYPE_LENGTH (valtype));
1011 else
1012 { /* float */
1013 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1014 ff = (float) dd;
1015 memcpy (valbuf, &ff, sizeof (float));
1016 }
1017 }
1018 else
1019 {
1020 /* return value is copied starting from r3. */
1021 if (TARGET_BYTE_ORDER == BIG_ENDIAN
1022 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1023 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1024
1025 memcpy (valbuf,
1026 regbuf + REGISTER_BYTE (3) + offset,
c906108c 1027 TYPE_LENGTH (valtype));
c906108c 1028 }
c906108c
SS
1029}
1030
7a78ae4e 1031/* Keep structure return address in this variable.
c906108c
SS
1032 FIXME: This is a horrid kludge which should not be allowed to continue
1033 living. This only allows a single nested call to a structure-returning
1034 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1035
7a78ae4e 1036static CORE_ADDR rs6000_struct_return_address;
c906108c
SS
1037
1038/* Indirect function calls use a piece of trampoline code to do context
1039 switching, i.e. to set the new TOC table. Skip such code if we are on
1040 its first instruction (as when we have single-stepped to here).
1041 Also skip shared library trampoline code (which is different from
1042 indirect function call trampolines).
1043 Result is desired PC to step until, or NULL if we are not in
1044 trampoline code. */
1045
1046CORE_ADDR
7a78ae4e 1047rs6000_skip_trampoline_code (CORE_ADDR pc)
c906108c
SS
1048{
1049 register unsigned int ii, op;
1050 CORE_ADDR solib_target_pc;
1051
c5aa993b
JM
1052 static unsigned trampoline_code[] =
1053 {
1054 0x800b0000, /* l r0,0x0(r11) */
1055 0x90410014, /* st r2,0x14(r1) */
1056 0x7c0903a6, /* mtctr r0 */
1057 0x804b0004, /* l r2,0x4(r11) */
1058 0x816b0008, /* l r11,0x8(r11) */
1059 0x4e800420, /* bctr */
1060 0x4e800020, /* br */
1061 0
c906108c
SS
1062 };
1063
1064 /* If pc is in a shared library trampoline, return its target. */
1065 solib_target_pc = find_solib_trampoline_target (pc);
1066 if (solib_target_pc)
1067 return solib_target_pc;
1068
c5aa993b
JM
1069 for (ii = 0; trampoline_code[ii]; ++ii)
1070 {
1071 op = read_memory_integer (pc + (ii * 4), 4);
1072 if (op != trampoline_code[ii])
1073 return 0;
1074 }
1075 ii = read_register (11); /* r11 holds destination addr */
7a78ae4e 1076 pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */
c906108c
SS
1077 return pc;
1078}
1079
1080/* Determines whether the function FI has a frame on the stack or not. */
1081
9aa1e687 1082int
c877c8e6 1083rs6000_frameless_function_invocation (struct frame_info *fi)
c906108c
SS
1084{
1085 CORE_ADDR func_start;
1086 struct rs6000_framedata fdata;
1087
1088 /* Don't even think about framelessness except on the innermost frame
1089 or if the function was interrupted by a signal. */
1090 if (fi->next != NULL && !fi->next->signal_handler_caller)
1091 return 0;
c5aa993b 1092
c906108c
SS
1093 func_start = get_pc_function_start (fi->pc);
1094
1095 /* If we failed to find the start of the function, it is a mistake
1096 to inspect the instructions. */
1097
1098 if (!func_start)
1099 {
1100 /* A frame with a zero PC is usually created by dereferencing a NULL
c5aa993b
JM
1101 function pointer, normally causing an immediate core dump of the
1102 inferior. Mark function as frameless, as the inferior has no chance
1103 of setting up a stack frame. */
c906108c
SS
1104 if (fi->pc == 0)
1105 return 1;
1106 else
1107 return 0;
1108 }
1109
077276e8 1110 (void) skip_prologue (func_start, fi->pc, &fdata);
c906108c
SS
1111 return fdata.frameless;
1112}
1113
1114/* Return the PC saved in a frame */
1115
9aa1e687 1116CORE_ADDR
c877c8e6 1117rs6000_frame_saved_pc (struct frame_info *fi)
c906108c
SS
1118{
1119 CORE_ADDR func_start;
1120 struct rs6000_framedata fdata;
7a78ae4e 1121 int wordsize = TDEP->wordsize;
c906108c
SS
1122
1123 if (fi->signal_handler_caller)
7a78ae4e 1124 return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize);
c906108c 1125
7a78ae4e
ND
1126 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1127 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
1128
1129 func_start = get_pc_function_start (fi->pc);
1130
1131 /* If we failed to find the start of the function, it is a mistake
1132 to inspect the instructions. */
1133 if (!func_start)
1134 return 0;
1135
077276e8 1136 (void) skip_prologue (func_start, fi->pc, &fdata);
c906108c
SS
1137
1138 if (fdata.lr_offset == 0 && fi->next != NULL)
1139 {
1140 if (fi->next->signal_handler_caller)
7a78ae4e
ND
1141 return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET,
1142 wordsize);
c906108c 1143 else
7a78ae4e
ND
1144 return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE,
1145 wordsize);
c906108c
SS
1146 }
1147
1148 if (fdata.lr_offset == 0)
9aa1e687 1149 return read_register (PPC_LR_REGNUM);
c906108c 1150
7a78ae4e 1151 return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize);
c906108c
SS
1152}
1153
1154/* If saved registers of frame FI are not known yet, read and cache them.
1155 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1156 in which case the framedata are read. */
1157
1158static void
7a78ae4e 1159frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap)
c906108c 1160{
c5aa993b 1161 CORE_ADDR frame_addr;
c906108c 1162 struct rs6000_framedata work_fdata;
7a78ae4e 1163 int wordsize = TDEP->wordsize;
c906108c
SS
1164
1165 if (fi->saved_regs)
1166 return;
c5aa993b 1167
c906108c
SS
1168 if (fdatap == NULL)
1169 {
1170 fdatap = &work_fdata;
077276e8 1171 (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, fdatap);
c906108c
SS
1172 }
1173
1174 frame_saved_regs_zalloc (fi);
1175
1176 /* If there were any saved registers, figure out parent's stack
1177 pointer. */
1178 /* The following is true only if the frame doesn't have a call to
1179 alloca(), FIXME. */
1180
1181 if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
1182 && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
1183 frame_addr = 0;
1184 else if (fi->prev && fi->prev->frame)
1185 frame_addr = fi->prev->frame;
1186 else
7a78ae4e 1187 frame_addr = read_memory_addr (fi->frame, wordsize);
c5aa993b 1188
c906108c
SS
1189 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1190 All fpr's from saved_fpr to fp31 are saved. */
1191
1192 if (fdatap->saved_fpr >= 0)
1193 {
1194 int i;
7a78ae4e 1195 CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset;
c906108c
SS
1196 for (i = fdatap->saved_fpr; i < 32; i++)
1197 {
7a78ae4e
ND
1198 fi->saved_regs[FP0_REGNUM + i] = fpr_addr;
1199 fpr_addr += 8;
c906108c
SS
1200 }
1201 }
1202
1203 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1204 All gpr's from saved_gpr to gpr31 are saved. */
1205
1206 if (fdatap->saved_gpr >= 0)
1207 {
1208 int i;
7a78ae4e 1209 CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset;
c906108c
SS
1210 for (i = fdatap->saved_gpr; i < 32; i++)
1211 {
7a78ae4e
ND
1212 fi->saved_regs[i] = gpr_addr;
1213 gpr_addr += wordsize;
c906108c
SS
1214 }
1215 }
1216
1217 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1218 the CR. */
1219 if (fdatap->cr_offset != 0)
9aa1e687 1220 fi->saved_regs[PPC_CR_REGNUM] = frame_addr + fdatap->cr_offset;
c906108c
SS
1221
1222 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1223 the LR. */
1224 if (fdatap->lr_offset != 0)
9aa1e687 1225 fi->saved_regs[PPC_LR_REGNUM] = frame_addr + fdatap->lr_offset;
c906108c
SS
1226}
1227
1228/* Return the address of a frame. This is the inital %sp value when the frame
1229 was first allocated. For functions calling alloca(), it might be saved in
1230 an alloca register. */
1231
1232static CORE_ADDR
7a78ae4e 1233frame_initial_stack_address (struct frame_info *fi)
c906108c
SS
1234{
1235 CORE_ADDR tmpaddr;
1236 struct rs6000_framedata fdata;
1237 struct frame_info *callee_fi;
1238
1239 /* if the initial stack pointer (frame address) of this frame is known,
1240 just return it. */
1241
1242 if (fi->extra_info->initial_sp)
1243 return fi->extra_info->initial_sp;
1244
1245 /* find out if this function is using an alloca register.. */
1246
077276e8 1247 (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, &fdata);
c906108c
SS
1248
1249 /* if saved registers of this frame are not known yet, read and cache them. */
1250
1251 if (!fi->saved_regs)
1252 frame_get_saved_regs (fi, &fdata);
1253
1254 /* If no alloca register used, then fi->frame is the value of the %sp for
1255 this frame, and it is good enough. */
1256
1257 if (fdata.alloca_reg < 0)
1258 {
1259 fi->extra_info->initial_sp = fi->frame;
1260 return fi->extra_info->initial_sp;
1261 }
1262
1263 /* This function has an alloca register. If this is the top-most frame
1264 (with the lowest address), the value in alloca register is good. */
1265
1266 if (!fi->next)
c5aa993b 1267 return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
c906108c
SS
1268
1269 /* Otherwise, this is a caller frame. Callee has usually already saved
1270 registers, but there are exceptions (such as when the callee
1271 has no parameters). Find the address in which caller's alloca
1272 register is saved. */
1273
c5aa993b
JM
1274 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next)
1275 {
c906108c 1276
c5aa993b
JM
1277 if (!callee_fi->saved_regs)
1278 frame_get_saved_regs (callee_fi, NULL);
c906108c 1279
c5aa993b 1280 /* this is the address in which alloca register is saved. */
c906108c 1281
c5aa993b
JM
1282 tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
1283 if (tmpaddr)
1284 {
7a78ae4e
ND
1285 fi->extra_info->initial_sp =
1286 read_memory_addr (tmpaddr, TDEP->wordsize);
c5aa993b
JM
1287 return fi->extra_info->initial_sp;
1288 }
c906108c 1289
c5aa993b
JM
1290 /* Go look into deeper levels of the frame chain to see if any one of
1291 the callees has saved alloca register. */
1292 }
c906108c
SS
1293
1294 /* If alloca register was not saved, by the callee (or any of its callees)
1295 then the value in the register is still good. */
1296
1297 fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1298 return fi->extra_info->initial_sp;
1299}
1300
7a78ae4e
ND
1301/* Describe the pointer in each stack frame to the previous stack frame
1302 (its caller). */
1303
1304/* FRAME_CHAIN takes a frame's nominal address
1305 and produces the frame's chain-pointer. */
1306
1307/* In the case of the RS/6000, the frame's nominal address
1308 is the address of a 4-byte word containing the calling frame's address. */
1309
9aa1e687 1310CORE_ADDR
7a78ae4e 1311rs6000_frame_chain (struct frame_info *thisframe)
c906108c 1312{
7a78ae4e
ND
1313 CORE_ADDR fp, fpp, lr;
1314 int wordsize = TDEP->wordsize;
c906108c 1315
7a78ae4e
ND
1316 if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
1317 return thisframe->frame; /* dummy frame same as caller's frame */
c906108c 1318
c5aa993b 1319 if (inside_entry_file (thisframe->pc) ||
c906108c
SS
1320 thisframe->pc == entry_point_address ())
1321 return 0;
1322
1323 if (thisframe->signal_handler_caller)
7a78ae4e
ND
1324 fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET,
1325 wordsize);
c906108c
SS
1326 else if (thisframe->next != NULL
1327 && thisframe->next->signal_handler_caller
c877c8e6 1328 && FRAMELESS_FUNCTION_INVOCATION (thisframe))
c906108c
SS
1329 /* A frameless function interrupted by a signal did not change the
1330 frame pointer. */
1331 fp = FRAME_FP (thisframe);
1332 else
7a78ae4e 1333 fp = read_memory_addr ((thisframe)->frame, wordsize);
c906108c 1334
9aa1e687 1335 lr = read_register (PPC_LR_REGNUM);
7a78ae4e
ND
1336 if (lr == entry_point_address ())
1337 if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0)
1338 if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
1339 return fpp;
1340
1341 return fp;
1342}
1343
1344/* Return the size of register REG when words are WORDSIZE bytes long. If REG
1345 isn't available with that word size, return 0. */
1346
1347static int
1348regsize (const struct reg *reg, int wordsize)
1349{
1350 return wordsize == 8 ? reg->sz64 : reg->sz32;
1351}
1352
1353/* Return the name of register number N, or null if no such register exists
1354 in the current architecture. */
1355
1356static char *
1357rs6000_register_name (int n)
1358{
1359 struct gdbarch_tdep *tdep = TDEP;
1360 const struct reg *reg = tdep->regs + n;
1361
1362 if (!regsize (reg, tdep->wordsize))
1363 return NULL;
1364 return reg->name;
1365}
1366
1367/* Index within `registers' of the first byte of the space for
1368 register N. */
1369
1370static int
1371rs6000_register_byte (int n)
1372{
1373 return TDEP->regoff[n];
1374}
1375
1376/* Return the number of bytes of storage in the actual machine representation
1377 for register N if that register is available, else return 0. */
1378
1379static int
1380rs6000_register_raw_size (int n)
1381{
1382 struct gdbarch_tdep *tdep = TDEP;
1383 const struct reg *reg = tdep->regs + n;
1384 return regsize (reg, tdep->wordsize);
1385}
1386
1387/* Number of bytes of storage in the program's representation
1388 for register N. */
1389
1390static int
1391rs6000_register_virtual_size (int n)
1392{
1393 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n));
1394}
1395
1396/* Return the GDB type object for the "standard" data type
1397 of data in register N. */
1398
1399static struct type *
fba45db2 1400rs6000_register_virtual_type (int n)
7a78ae4e
ND
1401{
1402 struct gdbarch_tdep *tdep = TDEP;
1403 const struct reg *reg = tdep->regs + n;
1404
1405 return reg->fpr ? builtin_type_double :
1406 regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 :
1407 builtin_type_int32;
1408}
1409
1410/* For the PowerPC, it appears that the debug info marks float parameters as
1411 floats regardless of whether the function is prototyped, but the actual
1412 values are always passed in as doubles. Tell gdb to always assume that
1413 floats are passed as doubles and then converted in the callee. */
1414
1415static int
1416rs6000_coerce_float_to_double (struct type *formal, struct type *actual)
1417{
1418 return 1;
1419}
1420
1421/* Return whether register N requires conversion when moving from raw format
1422 to virtual format.
1423
1424 The register format for RS/6000 floating point registers is always
1425 double, we need a conversion if the memory format is float. */
1426
1427static int
1428rs6000_register_convertible (int n)
1429{
1430 const struct reg *reg = TDEP->regs + n;
1431 return reg->fpr;
1432}
1433
1434/* Convert data from raw format for register N in buffer FROM
1435 to virtual format with type TYPE in buffer TO. */
1436
1437static void
1438rs6000_register_convert_to_virtual (int n, struct type *type,
1439 char *from, char *to)
1440{
1441 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
7a292a7a 1442 {
7a78ae4e
ND
1443 double val = extract_floating (from, REGISTER_RAW_SIZE (n));
1444 store_floating (to, TYPE_LENGTH (type), val);
1445 }
1446 else
1447 memcpy (to, from, REGISTER_RAW_SIZE (n));
1448}
1449
1450/* Convert data from virtual format with type TYPE in buffer FROM
1451 to raw format for register N in buffer TO. */
7a292a7a 1452
7a78ae4e
ND
1453static void
1454rs6000_register_convert_to_raw (struct type *type, int n,
1455 char *from, char *to)
1456{
1457 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
1458 {
1459 double val = extract_floating (from, TYPE_LENGTH (type));
1460 store_floating (to, REGISTER_RAW_SIZE (n), val);
7a292a7a 1461 }
7a78ae4e
ND
1462 else
1463 memcpy (to, from, REGISTER_RAW_SIZE (n));
1464}
c906108c 1465
7a78ae4e
ND
1466/* Store the address of the place in which to copy the structure the
1467 subroutine will return. This is called from call_function.
1468
1469 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1470 In function return, callee is not responsible of returning this address
1471 back. Since gdb needs to find it, we will store in a designated variable
1472 `rs6000_struct_return_address'. */
1473
1474static void
1475rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1476{
1477 write_register (3, addr);
1478 rs6000_struct_return_address = addr;
1479}
1480
1481/* Write into appropriate registers a function return value
1482 of type TYPE, given in virtual format. */
1483
1484static void
1485rs6000_store_return_value (struct type *type, char *valbuf)
1486{
1487 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1488
1489 /* Floating point values are returned starting from FPR1 and up.
1490 Say a double_double_double type could be returned in
1491 FPR1/FPR2/FPR3 triple. */
1492
1493 write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
1494 TYPE_LENGTH (type));
1495 else
1496 /* Everything else is returned in GPR3 and up. */
9aa1e687 1497 write_register_bytes (REGISTER_BYTE (PPC_GP0_REGNUM + 3), valbuf,
7a78ae4e
ND
1498 TYPE_LENGTH (type));
1499}
1500
1501/* Extract from an array REGBUF containing the (raw) register state
1502 the address in which a function should return its structure value,
1503 as a CORE_ADDR (or an expression that can be used as one). */
1504
1505static CORE_ADDR
1506rs6000_extract_struct_value_address (char *regbuf)
1507{
1508 return rs6000_struct_return_address;
1509}
1510
1511/* Return whether PC is in a dummy function call.
1512
1513 FIXME: This just checks for the end of the stack, which is broken
1514 for things like stepping through gcc nested function stubs. */
1515
1516static int
1517rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp)
1518{
1519 return sp < pc && pc < fp;
1520}
1521
1522/* Hook called when a new child process is started. */
1523
1524void
1525rs6000_create_inferior (int pid)
1526{
1527 if (rs6000_set_host_arch_hook)
1528 rs6000_set_host_arch_hook (pid);
c906108c
SS
1529}
1530\f
7a78ae4e
ND
1531/* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
1532
1533 Usually a function pointer's representation is simply the address
1534 of the function. On the RS/6000 however, a function pointer is
1535 represented by a pointer to a TOC entry. This TOC entry contains
1536 three words, the first word is the address of the function, the
1537 second word is the TOC pointer (r2), and the third word is the
1538 static chain value. Throughout GDB it is currently assumed that a
1539 function pointer contains the address of the function, which is not
1540 easy to fix. In addition, the conversion of a function address to
1541 a function pointer would require allocation of a TOC entry in the
1542 inferior's memory space, with all its drawbacks. To be able to
1543 call C++ virtual methods in the inferior (which are called via
f517ea4e 1544 function pointers), find_function_addr uses this function to get the
7a78ae4e
ND
1545 function address from a function pointer. */
1546
f517ea4e
PS
1547/* Return real function address if ADDR (a function pointer) is in the data
1548 space and is therefore a special function pointer. */
c906108c 1549
7a78ae4e
ND
1550CORE_ADDR
1551rs6000_convert_from_func_ptr_addr (CORE_ADDR addr)
c906108c
SS
1552{
1553 struct obj_section *s;
1554
1555 s = find_pc_section (addr);
1556 if (s && s->the_bfd_section->flags & SEC_CODE)
7a78ae4e 1557 return addr;
c906108c 1558
7a78ae4e
ND
1559 /* ADDR is in the data space, so it's a special function pointer. */
1560 return read_memory_addr (addr, TDEP->wordsize);
c906108c 1561}
c906108c 1562\f
c5aa993b 1563
7a78ae4e 1564/* Handling the various POWER/PowerPC variants. */
c906108c
SS
1565
1566
7a78ae4e
ND
1567/* The arrays here called registers_MUMBLE hold information about available
1568 registers.
c906108c
SS
1569
1570 For each family of PPC variants, I've tried to isolate out the
1571 common registers and put them up front, so that as long as you get
1572 the general family right, GDB will correctly identify the registers
1573 common to that family. The common register sets are:
1574
1575 For the 60x family: hid0 hid1 iabr dabr pir
1576
1577 For the 505 and 860 family: eie eid nri
1578
1579 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
c5aa993b
JM
1580 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1581 pbu1 pbl2 pbu2
c906108c
SS
1582
1583 Most of these register groups aren't anything formal. I arrived at
1584 them by looking at the registers that occurred in more than one
7a78ae4e
ND
1585 processor. */
1586
1587/* Convenience macros for populating register arrays. */
1588
1589/* Within another macro, convert S to a string. */
1590
1591#define STR(s) #s
1592
1593/* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1594 and 64 bits on 64-bit systems. */
1595#define R(name) { STR(name), 4, 8, 0 }
1596
1597/* Return a struct reg defining register NAME that's 32 bits on all
1598 systems. */
1599#define R4(name) { STR(name), 4, 4, 0 }
1600
1601/* Return a struct reg defining register NAME that's 64 bits on all
1602 systems. */
1603#define R8(name) { STR(name), 8, 8, 0 }
1604
1605/* Return a struct reg defining floating-point register NAME. */
1606#define F(name) { STR(name), 8, 8, 1 }
1607
1608/* Return a struct reg defining register NAME that's 32 bits on 32-bit
1609 systems and that doesn't exist on 64-bit systems. */
1610#define R32(name) { STR(name), 4, 0, 0 }
1611
1612/* Return a struct reg defining register NAME that's 64 bits on 64-bit
1613 systems and that doesn't exist on 32-bit systems. */
1614#define R64(name) { STR(name), 0, 8, 0 }
1615
1616/* Return a struct reg placeholder for a register that doesn't exist. */
1617#define R0 { 0, 0, 0, 0 }
1618
1619/* UISA registers common across all architectures, including POWER. */
1620
1621#define COMMON_UISA_REGS \
1622 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1623 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1624 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1625 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1626 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1627 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1628 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1629 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1630 /* 64 */ R(pc), R(ps)
1631
1632/* UISA-level SPRs for PowerPC. */
1633#define PPC_UISA_SPRS \
1634 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
1635
1636/* Segment registers, for PowerPC. */
1637#define PPC_SEGMENT_REGS \
1638 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
1639 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
1640 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
1641 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
1642
1643/* OEA SPRs for PowerPC. */
1644#define PPC_OEA_SPRS \
1645 /* 87 */ R4(pvr), \
1646 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
1647 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
1648 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
1649 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
1650 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
1651 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
1652 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
1653 /* 116 */ R4(dec), R(dabr), R4(ear)
1654
1655/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
1656 user-level SPR's. */
1657static const struct reg registers_power[] =
c906108c 1658{
7a78ae4e
ND
1659 COMMON_UISA_REGS,
1660 /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq)
c906108c
SS
1661};
1662
7a78ae4e
ND
1663/* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
1664 view of the PowerPC. */
1665static const struct reg registers_powerpc[] =
c906108c 1666{
7a78ae4e
ND
1667 COMMON_UISA_REGS,
1668 PPC_UISA_SPRS
c906108c
SS
1669};
1670
7a78ae4e
ND
1671/* IBM PowerPC 403. */
1672static const struct reg registers_403[] =
c5aa993b 1673{
7a78ae4e
ND
1674 COMMON_UISA_REGS,
1675 PPC_UISA_SPRS,
1676 PPC_SEGMENT_REGS,
1677 PPC_OEA_SPRS,
1678 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
1679 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
1680 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
1681 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
1682 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
1683 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2)
c906108c
SS
1684};
1685
7a78ae4e
ND
1686/* IBM PowerPC 403GC. */
1687static const struct reg registers_403GC[] =
c5aa993b 1688{
7a78ae4e
ND
1689 COMMON_UISA_REGS,
1690 PPC_UISA_SPRS,
1691 PPC_SEGMENT_REGS,
1692 PPC_OEA_SPRS,
1693 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
1694 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
1695 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
1696 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
1697 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
1698 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2),
1699 /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr),
1700 /* 147 */ R(tbhu), R(tblu)
c906108c
SS
1701};
1702
7a78ae4e
ND
1703/* Motorola PowerPC 505. */
1704static const struct reg registers_505[] =
c5aa993b 1705{
7a78ae4e
ND
1706 COMMON_UISA_REGS,
1707 PPC_UISA_SPRS,
1708 PPC_SEGMENT_REGS,
1709 PPC_OEA_SPRS,
1710 /* 119 */ R(eie), R(eid), R(nri)
c906108c
SS
1711};
1712
7a78ae4e
ND
1713/* Motorola PowerPC 860 or 850. */
1714static const struct reg registers_860[] =
c5aa993b 1715{
7a78ae4e
ND
1716 COMMON_UISA_REGS,
1717 PPC_UISA_SPRS,
1718 PPC_SEGMENT_REGS,
1719 PPC_OEA_SPRS,
1720 /* 119 */ R(eie), R(eid), R(nri), R(cmpa),
1721 /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr),
1722 /* 127 */ R(der), R(counta), R(countb), R(cmpe),
1723 /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1),
1724 /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst),
1725 /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr),
1726 /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr),
1727 /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc),
1728 /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap),
1729 /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn),
1730 /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1),
1731 /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1)
c906108c
SS
1732};
1733
7a78ae4e
ND
1734/* Motorola PowerPC 601. Note that the 601 has different register numbers
1735 for reading and writing RTCU and RTCL. However, how one reads and writes a
c906108c 1736 register is the stub's problem. */
7a78ae4e 1737static const struct reg registers_601[] =
c5aa993b 1738{
7a78ae4e
ND
1739 COMMON_UISA_REGS,
1740 PPC_UISA_SPRS,
1741 PPC_SEGMENT_REGS,
1742 PPC_OEA_SPRS,
1743 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1744 /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl)
c906108c
SS
1745};
1746
7a78ae4e
ND
1747/* Motorola PowerPC 602. */
1748static const struct reg registers_602[] =
c5aa993b 1749{
7a78ae4e
ND
1750 COMMON_UISA_REGS,
1751 PPC_UISA_SPRS,
1752 PPC_SEGMENT_REGS,
1753 PPC_OEA_SPRS,
1754 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
1755 /* 123 */ R0, R(tcr), R(ibr), R(esassr),
1756 /* 127 */ R(sebr), R(ser), R(sp), R(lt)
c906108c
SS
1757};
1758
7a78ae4e
ND
1759/* Motorola/IBM PowerPC 603 or 603e. */
1760static const struct reg registers_603[] =
c5aa993b 1761{
7a78ae4e
ND
1762 COMMON_UISA_REGS,
1763 PPC_UISA_SPRS,
1764 PPC_SEGMENT_REGS,
1765 PPC_OEA_SPRS,
1766 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
1767 /* 123 */ R0, R(dmiss), R(dcmp), R(hash1),
1768 /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa)
c906108c
SS
1769};
1770
7a78ae4e
ND
1771/* Motorola PowerPC 604 or 604e. */
1772static const struct reg registers_604[] =
c5aa993b 1773{
7a78ae4e
ND
1774 COMMON_UISA_REGS,
1775 PPC_UISA_SPRS,
1776 PPC_SEGMENT_REGS,
1777 PPC_OEA_SPRS,
1778 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1779 /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2),
1780 /* 127 */ R(sia), R(sda)
c906108c
SS
1781};
1782
7a78ae4e
ND
1783/* Motorola/IBM PowerPC 750 or 740. */
1784static const struct reg registers_750[] =
c5aa993b 1785{
7a78ae4e
ND
1786 COMMON_UISA_REGS,
1787 PPC_UISA_SPRS,
1788 PPC_SEGMENT_REGS,
1789 PPC_OEA_SPRS,
1790 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1791 /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2),
1792 /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4),
1793 /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia),
1794 /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr),
1795 /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3)
c906108c
SS
1796};
1797
1798
1799/* Information about a particular processor variant. */
7a78ae4e 1800
c906108c 1801struct variant
c5aa993b
JM
1802 {
1803 /* Name of this variant. */
1804 char *name;
c906108c 1805
c5aa993b
JM
1806 /* English description of the variant. */
1807 char *description;
c906108c 1808
7a78ae4e
ND
1809 /* bfd_arch_info.arch corresponding to variant. */
1810 enum bfd_architecture arch;
1811
1812 /* bfd_arch_info.mach corresponding to variant. */
1813 unsigned long mach;
1814
c5aa993b
JM
1815 /* Table of register names; registers[R] is the name of the register
1816 number R. */
7a78ae4e
ND
1817 int nregs;
1818 const struct reg *regs;
c5aa993b 1819 };
c906108c
SS
1820
1821#define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1822
1823
1824/* Information in this table comes from the following web sites:
1825 IBM: http://www.chips.ibm.com:80/products/embedded/
1826 Motorola: http://www.mot.com/SPS/PowerPC/
1827
1828 I'm sure I've got some of the variant descriptions not quite right.
1829 Please report any inaccuracies you find to GDB's maintainer.
1830
1831 If you add entries to this table, please be sure to allow the new
1832 value as an argument to the --with-cpu flag, in configure.in. */
1833
7a78ae4e 1834static const struct variant variants[] =
c906108c 1835{
7a78ae4e
ND
1836 {"powerpc", "PowerPC user-level", bfd_arch_powerpc,
1837 bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc},
1838 {"power", "POWER user-level", bfd_arch_rs6000,
1839 bfd_mach_rs6k, num_registers (registers_power), registers_power},
1840 {"403", "IBM PowerPC 403", bfd_arch_powerpc,
1841 bfd_mach_ppc_403, num_registers (registers_403), registers_403},
1842 {"601", "Motorola PowerPC 601", bfd_arch_powerpc,
1843 bfd_mach_ppc_601, num_registers (registers_601), registers_601},
1844 {"602", "Motorola PowerPC 602", bfd_arch_powerpc,
1845 bfd_mach_ppc_602, num_registers (registers_602), registers_602},
1846 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
1847 bfd_mach_ppc_603, num_registers (registers_603), registers_603},
1848 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
1849 604, num_registers (registers_604), registers_604},
1850 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc,
1851 bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC},
1852 {"505", "Motorola PowerPC 505", bfd_arch_powerpc,
1853 bfd_mach_ppc_505, num_registers (registers_505), registers_505},
1854 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc,
1855 bfd_mach_ppc_860, num_registers (registers_860), registers_860},
1856 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
1857 bfd_mach_ppc_750, num_registers (registers_750), registers_750},
1858
1859 /* FIXME: I haven't checked the register sets of the following. */
1860 {"620", "Motorola PowerPC 620", bfd_arch_powerpc,
1861 bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc},
1862 {"a35", "PowerPC A35", bfd_arch_powerpc,
1863 bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc},
1864 {"rs1", "IBM POWER RS1", bfd_arch_rs6000,
1865 bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power},
1866 {"rsc", "IBM POWER RSC", bfd_arch_rs6000,
1867 bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power},
1868 {"rs2", "IBM POWER RS2", bfd_arch_rs6000,
1869 bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power},
1870
c5aa993b 1871 {0, 0, 0, 0}
c906108c
SS
1872};
1873
7a78ae4e 1874#undef num_registers
c906108c 1875
7a78ae4e
ND
1876/* Look up the variant named NAME in the `variants' table. Return a
1877 pointer to the struct variant, or null if we couldn't find it. */
c906108c 1878
7a78ae4e
ND
1879static const struct variant *
1880find_variant_by_name (char *name)
c906108c 1881{
7a78ae4e 1882 const struct variant *v;
c906108c 1883
7a78ae4e
ND
1884 for (v = variants; v->name; v++)
1885 if (!strcmp (name, v->name))
1886 return v;
c906108c 1887
7a78ae4e 1888 return NULL;
c906108c
SS
1889}
1890
7a78ae4e
ND
1891/* Return the variant corresponding to architecture ARCH and machine number
1892 MACH. If no such variant exists, return null. */
c906108c 1893
7a78ae4e
ND
1894static const struct variant *
1895find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
c906108c 1896{
7a78ae4e 1897 const struct variant *v;
c5aa993b 1898
7a78ae4e
ND
1899 for (v = variants; v->name; v++)
1900 if (arch == v->arch && mach == v->mach)
1901 return v;
c906108c 1902
7a78ae4e 1903 return NULL;
c906108c
SS
1904}
1905
9aa1e687
KB
1906
1907
1908\f
1909static void
1910process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1911{
1912 int *os_ident_ptr = obj;
1913 const char *name;
1914 unsigned int sectsize;
1915
1916 name = bfd_get_section_name (abfd, sect);
1917 sectsize = bfd_section_size (abfd, sect);
1918 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1919 {
1920 unsigned int name_length, data_length, note_type;
1921 char *note = alloca (sectsize);
1922
1923 bfd_get_section_contents (abfd, sect, note,
1924 (file_ptr) 0, (bfd_size_type) sectsize);
1925
1926 name_length = bfd_h_get_32 (abfd, note);
1927 data_length = bfd_h_get_32 (abfd, note + 4);
1928 note_type = bfd_h_get_32 (abfd, note + 8);
1929
1930 if (name_length == 4 && data_length == 16 && note_type == 1
1931 && strcmp (note + 12, "GNU") == 0)
1932 {
1933 int os_number = bfd_h_get_32 (abfd, note + 16);
1934
1935 /* The case numbers are from abi-tags in glibc */
1936 switch (os_number)
1937 {
1938 case 0 :
1939 *os_ident_ptr = ELFOSABI_LINUX;
1940 break;
1941 case 1 :
1942 *os_ident_ptr = ELFOSABI_HURD;
1943 break;
1944 case 2 :
1945 *os_ident_ptr = ELFOSABI_SOLARIS;
1946 break;
1947 default :
1948 internal_error (
1949 "process_note_abi_sections: unknown OS number %d", os_number);
1950 break;
1951 }
1952 }
1953 }
1954}
1955
1956/* Return one of the ELFOSABI_ constants for BFDs representing ELF
1957 executables. If it's not an ELF executable or if the OS/ABI couldn't
1958 be determined, simply return -1. */
1959
1960static int
1961get_elfosabi (bfd *abfd)
1962{
1963 int elfosabi = -1;
1964
1965 if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
1966 {
1967 elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
1968
1969 /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
1970 that we're on a SYSV system. However, GNU/Linux uses a note section
1971 to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we
1972 have to check the note sections too. */
1973 if (elfosabi == 0)
1974 {
1975 bfd_map_over_sections (abfd,
1976 process_note_abi_tag_sections,
1977 &elfosabi);
1978 }
1979 }
1980
1981 return elfosabi;
1982}
1983
7a78ae4e 1984\f
c906108c 1985
7a78ae4e
ND
1986/* Initialize the current architecture based on INFO. If possible, re-use an
1987 architecture from ARCHES, which is a list of architectures already created
1988 during this debugging session.
c906108c 1989
7a78ae4e
ND
1990 Called e.g. at program startup, when reading a core file, and when reading
1991 a binary file. */
c906108c 1992
7a78ae4e
ND
1993static struct gdbarch *
1994rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1995{
1996 struct gdbarch *gdbarch;
1997 struct gdbarch_tdep *tdep;
9aa1e687 1998 int wordsize, from_xcoff_exec, from_elf_exec, power, i, off;
7a78ae4e
ND
1999 struct reg *regs;
2000 const struct variant *v;
2001 enum bfd_architecture arch;
2002 unsigned long mach;
2003 bfd abfd;
9aa1e687 2004 int osabi, sysv_abi;
7a78ae4e 2005
9aa1e687 2006 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
7a78ae4e
ND
2007 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
2008
9aa1e687
KB
2009 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
2010 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2011
2012 sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2013
2014 osabi = get_elfosabi (info.abfd);
2015
7a78ae4e
ND
2016 /* Check word size. If INFO is from a binary file, infer it from that,
2017 else use the previously-inferred size. */
9aa1e687 2018 if (from_xcoff_exec)
c906108c 2019 {
7a78ae4e
ND
2020 if (xcoff_data (info.abfd)->xcoff64)
2021 wordsize = 8;
2022 else
2023 wordsize = 4;
c906108c 2024 }
9aa1e687
KB
2025 else if (from_elf_exec)
2026 {
2027 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
2028 wordsize = 8;
2029 else
2030 wordsize = 4;
2031 }
c906108c 2032 else
7a78ae4e
ND
2033 {
2034 tdep = TDEP;
2035 if (tdep)
2036 wordsize = tdep->wordsize;
2037 else
2038 wordsize = 4;
2039 }
c906108c 2040
7a78ae4e
ND
2041 /* Find a candidate among extant architectures. */
2042 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2043 arches != NULL;
2044 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2045 {
2046 /* Word size in the various PowerPC bfd_arch_info structs isn't
2047 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2048 separate word size check. */
2049 tdep = gdbarch_tdep (arches->gdbarch);
9aa1e687 2050 if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi)
7a78ae4e
ND
2051 return arches->gdbarch;
2052 }
c906108c 2053
7a78ae4e
ND
2054 /* None found, create a new architecture from INFO, whose bfd_arch_info
2055 validity depends on the source:
2056 - executable useless
2057 - rs6000_host_arch() good
2058 - core file good
2059 - "set arch" trust blindly
2060 - GDB startup useless but harmless */
c906108c 2061
9aa1e687 2062 if (!from_xcoff_exec)
c906108c 2063 {
7a78ae4e
ND
2064 arch = info.bfd_architecture;
2065 mach = info.bfd_arch_info->mach;
c906108c 2066 }
7a78ae4e 2067 else
c906108c 2068 {
7a78ae4e
ND
2069 arch = bfd_arch_powerpc;
2070 mach = 0;
2071 bfd_default_set_arch_mach (&abfd, arch, mach);
2072 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2073 }
2074 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2075 tdep->wordsize = wordsize;
9aa1e687 2076 tdep->osabi = osabi;
7a78ae4e
ND
2077 gdbarch = gdbarch_alloc (&info, tdep);
2078 power = arch == bfd_arch_rs6000;
2079
2080 /* Select instruction printer. */
2081 tm_print_insn = arch == power ? print_insn_rs6000 :
2082 info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc :
2083 print_insn_little_powerpc;
2084
2085 /* Choose variant. */
2086 v = find_variant_by_arch (arch, mach);
2087 if (!v)
2088 v = find_variant_by_name (power ? "power" : "powerpc");
2089 tdep->regs = v->regs;
2090
2091 /* Calculate byte offsets in raw register array. */
2092 tdep->regoff = xmalloc (v->nregs * sizeof (int));
2093 for (i = off = 0; i < v->nregs; i++)
2094 {
2095 tdep->regoff[i] = off;
2096 off += regsize (v->regs + i, wordsize);
c906108c
SS
2097 }
2098
7a78ae4e
ND
2099 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2100 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2101 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2102 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2103 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2104 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2105
2106 set_gdbarch_num_regs (gdbarch, v->nregs);
2107 set_gdbarch_sp_regnum (gdbarch, 1);
2108 set_gdbarch_fp_regnum (gdbarch, 1);
2109 set_gdbarch_pc_regnum (gdbarch, 64);
2110 set_gdbarch_register_name (gdbarch, rs6000_register_name);
2111 set_gdbarch_register_size (gdbarch, wordsize);
2112 set_gdbarch_register_bytes (gdbarch, off);
2113 set_gdbarch_register_byte (gdbarch, rs6000_register_byte);
2114 set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size);
2115 set_gdbarch_max_register_raw_size (gdbarch, 8);
2116 set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size);
2117 set_gdbarch_max_register_virtual_size (gdbarch, 8);
2118 set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type);
2119
2120 set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2121 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2122 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2123 set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2124 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2125 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2126 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2127 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2128
2129 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2130 set_gdbarch_call_dummy_length (gdbarch, 0);
2131 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2132 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2133 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2134 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2135 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
fe794dc6 2136 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
7a78ae4e
ND
2137 set_gdbarch_call_dummy_p (gdbarch, 1);
2138 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2139 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2140 set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy);
2141 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
58223630 2142 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
7a78ae4e
ND
2143 set_gdbarch_push_return_address (gdbarch, ppc_push_return_address);
2144 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2145 set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double);
2146
2147 set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible);
2148 set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
2149 set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
2150
2151 set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value);
9aa1e687
KB
2152
2153 if (sysv_abi)
2154 set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments);
2155 else
2156 set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments);
7a78ae4e
ND
2157
2158 set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return);
2159 set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value);
2160 set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
2161 set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention);
2162
7a78ae4e
ND
2163 set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame);
2164
2165 set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
2166 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2167 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2168 set_gdbarch_function_start_offset (gdbarch, 0);
2169 set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc);
2170
2171 /* Not sure on this. FIXMEmgo */
2172 set_gdbarch_frame_args_skip (gdbarch, 8);
2173
7a78ae4e 2174 set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
9aa1e687
KB
2175 if (osabi == ELFOSABI_LINUX)
2176 {
2177 set_gdbarch_frameless_function_invocation (gdbarch,
2178 ppc_linux_frameless_function_invocation);
2179 set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain);
2180 set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc);
2181
2182 set_gdbarch_frame_init_saved_regs (gdbarch,
2183 ppc_linux_frame_init_saved_regs);
2184 set_gdbarch_init_extra_frame_info (gdbarch,
2185 ppc_linux_init_extra_frame_info);
2186
2187 set_gdbarch_memory_remove_breakpoint (gdbarch,
2188 ppc_linux_memory_remove_breakpoint);
2189 }
2190 else
2191 {
2192 set_gdbarch_frameless_function_invocation (gdbarch,
2193 rs6000_frameless_function_invocation);
2194 set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
2195 set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
2196
2197 set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
2198 set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
f517ea4e
PS
2199
2200 /* Handle RS/6000 function pointers. */
2201 set_gdbarch_convert_from_func_ptr_addr (gdbarch,
2202 rs6000_convert_from_func_ptr_addr);
9aa1e687 2203 }
7a78ae4e
ND
2204 set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address);
2205 set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address);
2206 set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call);
2207
2208 /* We can't tell how many args there are
2209 now that the C compiler delays popping them. */
2210 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2211
2212 return gdbarch;
c906108c
SS
2213}
2214
c906108c
SS
2215/* Initialization code. */
2216
2217void
fba45db2 2218_initialize_rs6000_tdep (void)
c906108c 2219{
7a78ae4e
ND
2220 register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init);
2221 register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init);
c906108c 2222}
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