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1 | /* Target-dependent code for the Renesas RX for GDB, the GNU debugger. |
2 | ||
61baf725 | 3 | Copyright (C) 2008-2017 Free Software Foundation, Inc. |
baa835b4 KB |
4 | |
5 | Contributed by Red Hat, Inc. | |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "arch-utils.h" | |
24 | #include "prologue-value.h" | |
25 | #include "target.h" | |
26 | #include "regcache.h" | |
27 | #include "opcode/rx.h" | |
28 | #include "dis-asm.h" | |
29 | #include "gdbtypes.h" | |
30 | #include "frame.h" | |
31 | #include "frame-unwind.h" | |
32 | #include "frame-base.h" | |
33 | #include "value.h" | |
34 | #include "gdbcore.h" | |
35 | #include "dwarf2-frame.h" | |
36 | ||
37 | #include "elf/rx.h" | |
38 | #include "elf-bfd.h" | |
325fac50 | 39 | #include <algorithm> |
baa835b4 KB |
40 | |
41 | /* Certain important register numbers. */ | |
42 | enum | |
43 | { | |
44 | RX_SP_REGNUM = 0, | |
45 | RX_R1_REGNUM = 1, | |
46 | RX_R4_REGNUM = 4, | |
47 | RX_FP_REGNUM = 6, | |
48 | RX_R15_REGNUM = 15, | |
1b485e67 | 49 | RX_USP_REGNUM = 16, |
fd6e021d | 50 | RX_PSW_REGNUM = 18, |
baa835b4 | 51 | RX_PC_REGNUM = 19, |
0561fea4 | 52 | RX_BPSW_REGNUM = 21, |
1b485e67 | 53 | RX_BPC_REGNUM = 22, |
0561fea4 | 54 | RX_FPSW_REGNUM = 24, |
fd60dc69 KB |
55 | RX_ACC_REGNUM = 25, |
56 | RX_NUM_REGS = 26 | |
baa835b4 KB |
57 | }; |
58 | ||
1b485e67 KB |
59 | /* RX frame types. */ |
60 | enum rx_frame_type { | |
61 | RX_FRAME_TYPE_NORMAL, | |
62 | RX_FRAME_TYPE_EXCEPTION, | |
63 | RX_FRAME_TYPE_FAST_INTERRUPT | |
64 | }; | |
65 | ||
baa835b4 KB |
66 | /* Architecture specific data. */ |
67 | struct gdbarch_tdep | |
68 | { | |
69 | /* The ELF header flags specify the multilib used. */ | |
70 | int elf_flags; | |
0561fea4 KB |
71 | |
72 | /* Type of PSW and BPSW. */ | |
73 | struct type *rx_psw_type; | |
74 | ||
75 | /* Type of FPSW. */ | |
76 | struct type *rx_fpsw_type; | |
baa835b4 KB |
77 | }; |
78 | ||
79 | /* This structure holds the results of a prologue analysis. */ | |
80 | struct rx_prologue | |
81 | { | |
1b485e67 KB |
82 | /* Frame type, either a normal frame or one of two types of exception |
83 | frames. */ | |
84 | enum rx_frame_type frame_type; | |
85 | ||
baa835b4 KB |
86 | /* The offset from the frame base to the stack pointer --- always |
87 | zero or negative. | |
88 | ||
89 | Calling this a "size" is a bit misleading, but given that the | |
90 | stack grows downwards, using offsets for everything keeps one | |
91 | from going completely sign-crazy: you never change anything's | |
92 | sign for an ADD instruction; always change the second operand's | |
93 | sign for a SUB instruction; and everything takes care of | |
94 | itself. */ | |
95 | int frame_size; | |
96 | ||
97 | /* Non-zero if this function has initialized the frame pointer from | |
98 | the stack pointer, zero otherwise. */ | |
99 | int has_frame_ptr; | |
100 | ||
101 | /* If has_frame_ptr is non-zero, this is the offset from the frame | |
102 | base to where the frame pointer points. This is always zero or | |
103 | negative. */ | |
104 | int frame_ptr_offset; | |
105 | ||
106 | /* The address of the first instruction at which the frame has been | |
107 | set up and the arguments are where the debug info says they are | |
108 | --- as best as we can tell. */ | |
109 | CORE_ADDR prologue_end; | |
110 | ||
111 | /* reg_offset[R] is the offset from the CFA at which register R is | |
112 | saved, or 1 if register R has not been saved. (Real values are | |
113 | always zero or negative.) */ | |
114 | int reg_offset[RX_NUM_REGS]; | |
115 | }; | |
116 | ||
117 | /* Implement the "register_name" gdbarch method. */ | |
118 | static const char * | |
119 | rx_register_name (struct gdbarch *gdbarch, int regnr) | |
120 | { | |
121 | static const char *const reg_names[] = { | |
122 | "r0", | |
123 | "r1", | |
124 | "r2", | |
125 | "r3", | |
126 | "r4", | |
127 | "r5", | |
128 | "r6", | |
129 | "r7", | |
130 | "r8", | |
131 | "r9", | |
132 | "r10", | |
133 | "r11", | |
134 | "r12", | |
135 | "r13", | |
136 | "r14", | |
137 | "r15", | |
baa835b4 | 138 | "usp", |
fd60dc69 | 139 | "isp", |
baa835b4 | 140 | "psw", |
fd60dc69 KB |
141 | "pc", |
142 | "intb", | |
baa835b4 | 143 | "bpsw", |
fd60dc69 KB |
144 | "bpc", |
145 | "fintv", | |
146 | "fpsw", | |
147 | "acc" | |
baa835b4 KB |
148 | }; |
149 | ||
150 | return reg_names[regnr]; | |
151 | } | |
152 | ||
a28aa6ed YQ |
153 | /* Construct the flags type for PSW and BPSW. */ |
154 | ||
155 | static struct type * | |
156 | rx_psw_type (struct gdbarch *gdbarch) | |
157 | { | |
158 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
159 | ||
160 | if (tdep->rx_psw_type == NULL) | |
161 | { | |
77b7c781 | 162 | tdep->rx_psw_type = arch_flags_type (gdbarch, "rx_psw_type", 32); |
a28aa6ed YQ |
163 | append_flags_type_flag (tdep->rx_psw_type, 0, "C"); |
164 | append_flags_type_flag (tdep->rx_psw_type, 1, "Z"); | |
165 | append_flags_type_flag (tdep->rx_psw_type, 2, "S"); | |
166 | append_flags_type_flag (tdep->rx_psw_type, 3, "O"); | |
167 | append_flags_type_flag (tdep->rx_psw_type, 16, "I"); | |
168 | append_flags_type_flag (tdep->rx_psw_type, 17, "U"); | |
169 | append_flags_type_flag (tdep->rx_psw_type, 20, "PM"); | |
170 | append_flags_type_flag (tdep->rx_psw_type, 24, "IPL0"); | |
171 | append_flags_type_flag (tdep->rx_psw_type, 25, "IPL1"); | |
172 | append_flags_type_flag (tdep->rx_psw_type, 26, "IPL2"); | |
173 | append_flags_type_flag (tdep->rx_psw_type, 27, "IPL3"); | |
174 | } | |
175 | return tdep->rx_psw_type; | |
176 | } | |
177 | ||
178 | /* Construct flags type for FPSW. */ | |
179 | ||
180 | static struct type * | |
181 | rx_fpsw_type (struct gdbarch *gdbarch) | |
182 | { | |
183 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
184 | ||
ad3d022a | 185 | if (tdep->rx_fpsw_type == NULL) |
a28aa6ed | 186 | { |
77b7c781 | 187 | tdep->rx_fpsw_type = arch_flags_type (gdbarch, "rx_fpsw_type", 32); |
a28aa6ed YQ |
188 | append_flags_type_flag (tdep->rx_fpsw_type, 0, "RM0"); |
189 | append_flags_type_flag (tdep->rx_fpsw_type, 1, "RM1"); | |
190 | append_flags_type_flag (tdep->rx_fpsw_type, 2, "CV"); | |
191 | append_flags_type_flag (tdep->rx_fpsw_type, 3, "CO"); | |
192 | append_flags_type_flag (tdep->rx_fpsw_type, 4, "CZ"); | |
193 | append_flags_type_flag (tdep->rx_fpsw_type, 5, "CU"); | |
194 | append_flags_type_flag (tdep->rx_fpsw_type, 6, "CX"); | |
195 | append_flags_type_flag (tdep->rx_fpsw_type, 7, "CE"); | |
196 | append_flags_type_flag (tdep->rx_fpsw_type, 8, "DN"); | |
197 | append_flags_type_flag (tdep->rx_fpsw_type, 10, "EV"); | |
198 | append_flags_type_flag (tdep->rx_fpsw_type, 11, "EO"); | |
199 | append_flags_type_flag (tdep->rx_fpsw_type, 12, "EZ"); | |
200 | append_flags_type_flag (tdep->rx_fpsw_type, 13, "EU"); | |
201 | append_flags_type_flag (tdep->rx_fpsw_type, 14, "EX"); | |
202 | append_flags_type_flag (tdep->rx_fpsw_type, 26, "FV"); | |
203 | append_flags_type_flag (tdep->rx_fpsw_type, 27, "FO"); | |
204 | append_flags_type_flag (tdep->rx_fpsw_type, 28, "FZ"); | |
205 | append_flags_type_flag (tdep->rx_fpsw_type, 29, "FU"); | |
206 | append_flags_type_flag (tdep->rx_fpsw_type, 30, "FX"); | |
207 | append_flags_type_flag (tdep->rx_fpsw_type, 31, "FS"); | |
208 | } | |
209 | ||
210 | return tdep->rx_fpsw_type; | |
211 | } | |
212 | ||
baa835b4 KB |
213 | /* Implement the "register_type" gdbarch method. */ |
214 | static struct type * | |
215 | rx_register_type (struct gdbarch *gdbarch, int reg_nr) | |
216 | { | |
217 | if (reg_nr == RX_PC_REGNUM) | |
218 | return builtin_type (gdbarch)->builtin_func_ptr; | |
0561fea4 | 219 | else if (reg_nr == RX_PSW_REGNUM || reg_nr == RX_BPSW_REGNUM) |
a28aa6ed | 220 | return rx_psw_type (gdbarch); |
0561fea4 | 221 | else if (reg_nr == RX_FPSW_REGNUM) |
a28aa6ed | 222 | return rx_fpsw_type (gdbarch); |
fd60dc69 KB |
223 | else if (reg_nr == RX_ACC_REGNUM) |
224 | return builtin_type (gdbarch)->builtin_unsigned_long_long; | |
baa835b4 KB |
225 | else |
226 | return builtin_type (gdbarch)->builtin_unsigned_long; | |
227 | } | |
228 | ||
229 | ||
230 | /* Function for finding saved registers in a 'struct pv_area'; this | |
f7b7ed97 | 231 | function is passed to pv_area::scan. |
baa835b4 KB |
232 | |
233 | If VALUE is a saved register, ADDR says it was saved at a constant | |
234 | offset from the frame base, and SIZE indicates that the whole | |
235 | register was saved, record its offset. */ | |
236 | static void | |
237 | check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) | |
238 | { | |
239 | struct rx_prologue *result = (struct rx_prologue *) result_untyped; | |
240 | ||
241 | if (value.kind == pvk_register | |
242 | && value.k == 0 | |
243 | && pv_is_register (addr, RX_SP_REGNUM) | |
f5656ead | 244 | && size == register_size (target_gdbarch (), value.reg)) |
baa835b4 KB |
245 | result->reg_offset[value.reg] = addr.k; |
246 | } | |
247 | ||
248 | /* Define a "handle" struct for fetching the next opcode. */ | |
249 | struct rx_get_opcode_byte_handle | |
250 | { | |
251 | CORE_ADDR pc; | |
252 | }; | |
253 | ||
254 | /* Fetch a byte on behalf of the opcode decoder. HANDLE contains | |
255 | the memory address of the next byte to fetch. If successful, | |
256 | the address in the handle is updated and the byte fetched is | |
257 | returned as the value of the function. If not successful, -1 | |
258 | is returned. */ | |
259 | static int | |
260 | rx_get_opcode_byte (void *handle) | |
261 | { | |
19ba03f4 SM |
262 | struct rx_get_opcode_byte_handle *opcdata |
263 | = (struct rx_get_opcode_byte_handle *) handle; | |
baa835b4 KB |
264 | int status; |
265 | gdb_byte byte; | |
266 | ||
a0e28e54 | 267 | status = target_read_code (opcdata->pc, &byte, 1); |
baa835b4 KB |
268 | if (status == 0) |
269 | { | |
270 | opcdata->pc += 1; | |
271 | return byte; | |
272 | } | |
273 | else | |
274 | return -1; | |
275 | } | |
276 | ||
277 | /* Analyze a prologue starting at START_PC, going no further than | |
278 | LIMIT_PC. Fill in RESULT as appropriate. */ | |
1b485e67 | 279 | |
baa835b4 | 280 | static void |
1b485e67 KB |
281 | rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc, |
282 | enum rx_frame_type frame_type, | |
283 | struct rx_prologue *result) | |
baa835b4 KB |
284 | { |
285 | CORE_ADDR pc, next_pc; | |
286 | int rn; | |
287 | pv_t reg[RX_NUM_REGS]; | |
baa835b4 KB |
288 | CORE_ADDR after_last_frame_setup_insn = start_pc; |
289 | ||
290 | memset (result, 0, sizeof (*result)); | |
291 | ||
1b485e67 KB |
292 | result->frame_type = frame_type; |
293 | ||
baa835b4 KB |
294 | for (rn = 0; rn < RX_NUM_REGS; rn++) |
295 | { | |
296 | reg[rn] = pv_register (rn, 0); | |
297 | result->reg_offset[rn] = 1; | |
298 | } | |
299 | ||
f7b7ed97 | 300 | pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ())); |
baa835b4 | 301 | |
1b485e67 KB |
302 | if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT) |
303 | { | |
304 | /* This code won't do anything useful at present, but this is | |
305 | what happens for fast interrupts. */ | |
306 | reg[RX_BPSW_REGNUM] = reg[RX_PSW_REGNUM]; | |
307 | reg[RX_BPC_REGNUM] = reg[RX_PC_REGNUM]; | |
308 | } | |
309 | else | |
310 | { | |
311 | /* When an exception occurs, the PSW is saved to the interrupt stack | |
312 | first. */ | |
313 | if (frame_type == RX_FRAME_TYPE_EXCEPTION) | |
314 | { | |
315 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 316 | stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PSW_REGNUM]); |
1b485e67 KB |
317 | } |
318 | ||
319 | /* The call instruction (or an exception/interrupt) has saved the return | |
320 | address on the stack. */ | |
321 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 322 | stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PC_REGNUM]); |
1b485e67 KB |
323 | |
324 | } | |
325 | ||
baa835b4 KB |
326 | |
327 | pc = start_pc; | |
328 | while (pc < limit_pc) | |
329 | { | |
330 | int bytes_read; | |
331 | struct rx_get_opcode_byte_handle opcode_handle; | |
332 | RX_Opcode_Decoded opc; | |
333 | ||
334 | opcode_handle.pc = pc; | |
335 | bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte, | |
336 | &opcode_handle); | |
337 | next_pc = pc + bytes_read; | |
338 | ||
339 | if (opc.id == RXO_pushm /* pushm r1, r2 */ | |
340 | && opc.op[1].type == RX_Operand_Register | |
341 | && opc.op[2].type == RX_Operand_Register) | |
342 | { | |
343 | int r1, r2; | |
344 | int r; | |
345 | ||
346 | r1 = opc.op[1].reg; | |
347 | r2 = opc.op[2].reg; | |
348 | for (r = r2; r >= r1; r--) | |
349 | { | |
350 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 351 | stack.store (reg[RX_SP_REGNUM], 4, reg[r]); |
baa835b4 KB |
352 | } |
353 | after_last_frame_setup_insn = next_pc; | |
354 | } | |
355 | else if (opc.id == RXO_mov /* mov.l rdst, rsrc */ | |
356 | && opc.op[0].type == RX_Operand_Register | |
357 | && opc.op[1].type == RX_Operand_Register | |
358 | && opc.size == RX_Long) | |
359 | { | |
360 | int rdst, rsrc; | |
361 | ||
362 | rdst = opc.op[0].reg; | |
363 | rsrc = opc.op[1].reg; | |
364 | reg[rdst] = reg[rsrc]; | |
365 | if (rdst == RX_FP_REGNUM && rsrc == RX_SP_REGNUM) | |
366 | after_last_frame_setup_insn = next_pc; | |
367 | } | |
368 | else if (opc.id == RXO_mov /* mov.l rsrc, [-SP] */ | |
369 | && opc.op[0].type == RX_Operand_Predec | |
370 | && opc.op[0].reg == RX_SP_REGNUM | |
371 | && opc.op[1].type == RX_Operand_Register | |
372 | && opc.size == RX_Long) | |
373 | { | |
374 | int rsrc; | |
375 | ||
376 | rsrc = opc.op[1].reg; | |
377 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 378 | stack.store (reg[RX_SP_REGNUM], 4, reg[rsrc]); |
baa835b4 KB |
379 | after_last_frame_setup_insn = next_pc; |
380 | } | |
381 | else if (opc.id == RXO_add /* add #const, rsrc, rdst */ | |
382 | && opc.op[0].type == RX_Operand_Register | |
383 | && opc.op[1].type == RX_Operand_Immediate | |
384 | && opc.op[2].type == RX_Operand_Register) | |
385 | { | |
386 | int rdst = opc.op[0].reg; | |
387 | int addend = opc.op[1].addend; | |
388 | int rsrc = opc.op[2].reg; | |
389 | reg[rdst] = pv_add_constant (reg[rsrc], addend); | |
390 | /* Negative adjustments to the stack pointer or frame pointer | |
391 | are (most likely) part of the prologue. */ | |
392 | if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0) | |
393 | after_last_frame_setup_insn = next_pc; | |
394 | } | |
395 | else if (opc.id == RXO_mov | |
396 | && opc.op[0].type == RX_Operand_Indirect | |
397 | && opc.op[1].type == RX_Operand_Register | |
398 | && opc.size == RX_Long | |
399 | && (opc.op[0].reg == RX_SP_REGNUM | |
400 | || opc.op[0].reg == RX_FP_REGNUM) | |
401 | && (RX_R1_REGNUM <= opc.op[1].reg | |
402 | && opc.op[1].reg <= RX_R4_REGNUM)) | |
403 | { | |
404 | /* This moves an argument register to the stack. Don't | |
405 | record it, but allow it to be a part of the prologue. */ | |
406 | } | |
407 | else if (opc.id == RXO_branch | |
408 | && opc.op[0].type == RX_Operand_Immediate | |
baa835b4 KB |
409 | && next_pc < opc.op[0].addend) |
410 | { | |
411 | /* When a loop appears as the first statement of a function | |
412 | body, gcc 4.x will use a BRA instruction to branch to the | |
413 | loop condition checking code. This BRA instruction is | |
414 | marked as part of the prologue. We therefore set next_pc | |
415 | to this branch target and also stop the prologue scan. | |
416 | The instructions at and beyond the branch target should | |
417 | no longer be associated with the prologue. | |
418 | ||
419 | Note that we only consider forward branches here. We | |
420 | presume that a forward branch is being used to skip over | |
421 | a loop body. | |
422 | ||
423 | A backwards branch is covered by the default case below. | |
424 | If we were to encounter a backwards branch, that would | |
425 | most likely mean that we've scanned through a loop body. | |
426 | We definitely want to stop the prologue scan when this | |
427 | happens and that is precisely what is done by the default | |
428 | case below. */ | |
429 | ||
430 | after_last_frame_setup_insn = opc.op[0].addend; | |
431 | break; /* Scan no further if we hit this case. */ | |
432 | } | |
433 | else | |
434 | { | |
435 | /* Terminate the prologue scan. */ | |
436 | break; | |
437 | } | |
438 | ||
439 | pc = next_pc; | |
440 | } | |
441 | ||
442 | /* Is the frame size (offset, really) a known constant? */ | |
443 | if (pv_is_register (reg[RX_SP_REGNUM], RX_SP_REGNUM)) | |
444 | result->frame_size = reg[RX_SP_REGNUM].k; | |
445 | ||
446 | /* Was the frame pointer initialized? */ | |
447 | if (pv_is_register (reg[RX_FP_REGNUM], RX_SP_REGNUM)) | |
448 | { | |
449 | result->has_frame_ptr = 1; | |
450 | result->frame_ptr_offset = reg[RX_FP_REGNUM].k; | |
451 | } | |
452 | ||
453 | /* Record where all the registers were saved. */ | |
f7b7ed97 | 454 | stack.scan (check_for_saved, (void *) result); |
baa835b4 KB |
455 | |
456 | result->prologue_end = after_last_frame_setup_insn; | |
baa835b4 KB |
457 | } |
458 | ||
459 | ||
460 | /* Implement the "skip_prologue" gdbarch method. */ | |
461 | static CORE_ADDR | |
462 | rx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
463 | { | |
2c02bd72 | 464 | const char *name; |
baa835b4 KB |
465 | CORE_ADDR func_addr, func_end; |
466 | struct rx_prologue p; | |
467 | ||
468 | /* Try to find the extent of the function that contains PC. */ | |
469 | if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) | |
470 | return pc; | |
471 | ||
1b485e67 KB |
472 | /* The frame type doesn't matter here, since we only care about |
473 | where the prologue ends. We'll use RX_FRAME_TYPE_NORMAL. */ | |
474 | rx_analyze_prologue (pc, func_end, RX_FRAME_TYPE_NORMAL, &p); | |
baa835b4 KB |
475 | return p.prologue_end; |
476 | } | |
477 | ||
478 | /* Given a frame described by THIS_FRAME, decode the prologue of its | |
479 | associated function if there is not cache entry as specified by | |
480 | THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and | |
481 | return that struct as the value of this function. */ | |
1b485e67 | 482 | |
baa835b4 KB |
483 | static struct rx_prologue * |
484 | rx_analyze_frame_prologue (struct frame_info *this_frame, | |
1b485e67 | 485 | enum rx_frame_type frame_type, |
baa835b4 KB |
486 | void **this_prologue_cache) |
487 | { | |
488 | if (!*this_prologue_cache) | |
489 | { | |
490 | CORE_ADDR func_start, stop_addr; | |
491 | ||
492 | *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rx_prologue); | |
493 | ||
494 | func_start = get_frame_func (this_frame); | |
495 | stop_addr = get_frame_pc (this_frame); | |
496 | ||
497 | /* If we couldn't find any function containing the PC, then | |
498 | just initialize the prologue cache, but don't do anything. */ | |
499 | if (!func_start) | |
500 | stop_addr = func_start; | |
501 | ||
1b485e67 | 502 | rx_analyze_prologue (func_start, stop_addr, frame_type, |
19ba03f4 | 503 | (struct rx_prologue *) *this_prologue_cache); |
baa835b4 KB |
504 | } |
505 | ||
19ba03f4 | 506 | return (struct rx_prologue *) *this_prologue_cache; |
baa835b4 KB |
507 | } |
508 | ||
1b485e67 KB |
509 | /* Determine type of frame by scanning the function for a return |
510 | instruction. */ | |
511 | ||
512 | static enum rx_frame_type | |
513 | rx_frame_type (struct frame_info *this_frame, void **this_cache) | |
514 | { | |
515 | const char *name; | |
516 | CORE_ADDR pc, start_pc, lim_pc; | |
517 | int bytes_read; | |
518 | struct rx_get_opcode_byte_handle opcode_handle; | |
519 | RX_Opcode_Decoded opc; | |
520 | ||
521 | gdb_assert (this_cache != NULL); | |
522 | ||
523 | /* If we have a cached value, return it. */ | |
524 | ||
525 | if (*this_cache != NULL) | |
526 | { | |
19ba03f4 | 527 | struct rx_prologue *p = (struct rx_prologue *) *this_cache; |
1b485e67 KB |
528 | |
529 | return p->frame_type; | |
530 | } | |
531 | ||
532 | /* No cached value; scan the function. The frame type is cached in | |
533 | rx_analyze_prologue / rx_analyze_frame_prologue. */ | |
534 | ||
535 | pc = get_frame_pc (this_frame); | |
536 | ||
537 | /* Attempt to find the last address in the function. If it cannot | |
538 | be determined, set the limit to be a short ways past the frame's | |
539 | pc. */ | |
540 | if (!find_pc_partial_function (pc, &name, &start_pc, &lim_pc)) | |
541 | lim_pc = pc + 20; | |
542 | ||
543 | while (pc < lim_pc) | |
544 | { | |
545 | opcode_handle.pc = pc; | |
546 | bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte, | |
547 | &opcode_handle); | |
548 | ||
549 | if (bytes_read <= 0 || opc.id == RXO_rts) | |
550 | return RX_FRAME_TYPE_NORMAL; | |
551 | else if (opc.id == RXO_rtfi) | |
552 | return RX_FRAME_TYPE_FAST_INTERRUPT; | |
553 | else if (opc.id == RXO_rte) | |
554 | return RX_FRAME_TYPE_EXCEPTION; | |
555 | ||
556 | pc += bytes_read; | |
557 | } | |
558 | ||
559 | return RX_FRAME_TYPE_NORMAL; | |
560 | } | |
561 | ||
562 | ||
baa835b4 KB |
563 | /* Given the next frame and a prologue cache, return this frame's |
564 | base. */ | |
1b485e67 | 565 | |
baa835b4 | 566 | static CORE_ADDR |
1b485e67 | 567 | rx_frame_base (struct frame_info *this_frame, void **this_cache) |
baa835b4 | 568 | { |
1b485e67 | 569 | enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); |
baa835b4 | 570 | struct rx_prologue *p |
1b485e67 | 571 | = rx_analyze_frame_prologue (this_frame, frame_type, this_cache); |
baa835b4 KB |
572 | |
573 | /* In functions that use alloca, the distance between the stack | |
574 | pointer and the frame base varies dynamically, so we can't use | |
575 | the SP plus static information like prologue analysis to find the | |
576 | frame base. However, such functions must have a frame pointer, | |
577 | to be able to restore the SP on exit. So whenever we do have a | |
578 | frame pointer, use that to find the base. */ | |
579 | if (p->has_frame_ptr) | |
580 | { | |
581 | CORE_ADDR fp = get_frame_register_unsigned (this_frame, RX_FP_REGNUM); | |
582 | return fp - p->frame_ptr_offset; | |
583 | } | |
584 | else | |
585 | { | |
586 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, RX_SP_REGNUM); | |
587 | return sp - p->frame_size; | |
588 | } | |
589 | } | |
590 | ||
591 | /* Implement the "frame_this_id" method for unwinding frames. */ | |
1b485e67 | 592 | |
baa835b4 | 593 | static void |
1b485e67 KB |
594 | rx_frame_this_id (struct frame_info *this_frame, void **this_cache, |
595 | struct frame_id *this_id) | |
baa835b4 | 596 | { |
1b485e67 | 597 | *this_id = frame_id_build (rx_frame_base (this_frame, this_cache), |
baa835b4 KB |
598 | get_frame_func (this_frame)); |
599 | } | |
600 | ||
601 | /* Implement the "frame_prev_register" method for unwinding frames. */ | |
1b485e67 | 602 | |
baa835b4 | 603 | static struct value * |
1b485e67 KB |
604 | rx_frame_prev_register (struct frame_info *this_frame, void **this_cache, |
605 | int regnum) | |
baa835b4 | 606 | { |
1b485e67 | 607 | enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); |
baa835b4 | 608 | struct rx_prologue *p |
1b485e67 KB |
609 | = rx_analyze_frame_prologue (this_frame, frame_type, this_cache); |
610 | CORE_ADDR frame_base = rx_frame_base (this_frame, this_cache); | |
baa835b4 KB |
611 | |
612 | if (regnum == RX_SP_REGNUM) | |
1b485e67 KB |
613 | { |
614 | if (frame_type == RX_FRAME_TYPE_EXCEPTION) | |
615 | { | |
616 | struct value *psw_val; | |
617 | CORE_ADDR psw; | |
618 | ||
619 | psw_val = rx_frame_prev_register (this_frame, this_cache, | |
620 | RX_PSW_REGNUM); | |
621 | psw = extract_unsigned_integer (value_contents_all (psw_val), 4, | |
622 | gdbarch_byte_order ( | |
623 | get_frame_arch (this_frame))); | |
624 | ||
625 | if ((psw & 0x20000 /* U bit */) != 0) | |
626 | return rx_frame_prev_register (this_frame, this_cache, | |
627 | RX_USP_REGNUM); | |
628 | ||
629 | /* Fall through for the case where U bit is zero. */ | |
630 | } | |
631 | ||
632 | return frame_unwind_got_constant (this_frame, regnum, frame_base); | |
633 | } | |
634 | ||
635 | if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT) | |
636 | { | |
637 | if (regnum == RX_PC_REGNUM) | |
638 | return rx_frame_prev_register (this_frame, this_cache, | |
639 | RX_BPC_REGNUM); | |
640 | if (regnum == RX_PSW_REGNUM) | |
641 | return rx_frame_prev_register (this_frame, this_cache, | |
642 | RX_BPSW_REGNUM); | |
643 | } | |
baa835b4 KB |
644 | |
645 | /* If prologue analysis says we saved this register somewhere, | |
646 | return a description of the stack slot holding it. */ | |
1b485e67 | 647 | if (p->reg_offset[regnum] != 1) |
baa835b4 KB |
648 | return frame_unwind_got_memory (this_frame, regnum, |
649 | frame_base + p->reg_offset[regnum]); | |
650 | ||
651 | /* Otherwise, presume we haven't changed the value of this | |
652 | register, and get it from the next frame. */ | |
1b485e67 KB |
653 | return frame_unwind_got_register (this_frame, regnum, regnum); |
654 | } | |
655 | ||
656 | /* Return TRUE if the frame indicated by FRAME_TYPE is a normal frame. */ | |
657 | ||
658 | static int | |
659 | normal_frame_p (enum rx_frame_type frame_type) | |
660 | { | |
661 | return (frame_type == RX_FRAME_TYPE_NORMAL); | |
662 | } | |
663 | ||
664 | /* Return TRUE if the frame indicated by FRAME_TYPE is an exception | |
665 | frame. */ | |
666 | ||
667 | static int | |
668 | exception_frame_p (enum rx_frame_type frame_type) | |
669 | { | |
670 | return (frame_type == RX_FRAME_TYPE_EXCEPTION | |
671 | || frame_type == RX_FRAME_TYPE_FAST_INTERRUPT); | |
672 | } | |
673 | ||
674 | /* Common code used by both normal and exception frame sniffers. */ | |
675 | ||
676 | static int | |
677 | rx_frame_sniffer_common (const struct frame_unwind *self, | |
678 | struct frame_info *this_frame, | |
679 | void **this_cache, | |
680 | int (*sniff_p)(enum rx_frame_type) ) | |
681 | { | |
682 | gdb_assert (this_cache != NULL); | |
683 | ||
684 | if (*this_cache == NULL) | |
685 | { | |
686 | enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); | |
687 | ||
688 | if (sniff_p (frame_type)) | |
689 | { | |
690 | /* The call below will fill in the cache, including the frame | |
691 | type. */ | |
692 | (void) rx_analyze_frame_prologue (this_frame, frame_type, this_cache); | |
693 | ||
694 | return 1; | |
695 | } | |
696 | else | |
697 | return 0; | |
698 | } | |
baa835b4 | 699 | else |
1b485e67 | 700 | { |
19ba03f4 | 701 | struct rx_prologue *p = (struct rx_prologue *) *this_cache; |
1b485e67 KB |
702 | |
703 | return sniff_p (p->frame_type); | |
704 | } | |
705 | } | |
706 | ||
707 | /* Frame sniffer for normal (non-exception) frames. */ | |
708 | ||
709 | static int | |
710 | rx_frame_sniffer (const struct frame_unwind *self, | |
711 | struct frame_info *this_frame, | |
712 | void **this_cache) | |
713 | { | |
714 | return rx_frame_sniffer_common (self, this_frame, this_cache, | |
715 | normal_frame_p); | |
716 | } | |
717 | ||
718 | /* Frame sniffer for exception frames. */ | |
719 | ||
720 | static int | |
721 | rx_exception_sniffer (const struct frame_unwind *self, | |
722 | struct frame_info *this_frame, | |
723 | void **this_cache) | |
724 | { | |
725 | return rx_frame_sniffer_common (self, this_frame, this_cache, | |
726 | exception_frame_p); | |
baa835b4 KB |
727 | } |
728 | ||
1b485e67 KB |
729 | /* Data structure for normal code using instruction-based prologue |
730 | analyzer. */ | |
731 | ||
baa835b4 KB |
732 | static const struct frame_unwind rx_frame_unwind = { |
733 | NORMAL_FRAME, | |
e0f68161 | 734 | default_frame_unwind_stop_reason, |
baa835b4 KB |
735 | rx_frame_this_id, |
736 | rx_frame_prev_register, | |
737 | NULL, | |
1b485e67 KB |
738 | rx_frame_sniffer |
739 | }; | |
740 | ||
741 | /* Data structure for exception code using instruction-based prologue | |
742 | analyzer. */ | |
743 | ||
744 | static const struct frame_unwind rx_exception_unwind = { | |
745 | /* SIGTRAMP_FRAME could be used here, but backtraces are less informative. */ | |
746 | NORMAL_FRAME, | |
747 | default_frame_unwind_stop_reason, | |
748 | rx_frame_this_id, | |
749 | rx_frame_prev_register, | |
750 | NULL, | |
751 | rx_exception_sniffer | |
baa835b4 KB |
752 | }; |
753 | ||
754 | /* Implement the "unwind_pc" gdbarch method. */ | |
755 | static CORE_ADDR | |
756 | rx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
757 | { | |
758 | ULONGEST pc; | |
759 | ||
760 | pc = frame_unwind_register_unsigned (this_frame, RX_PC_REGNUM); | |
761 | return pc; | |
762 | } | |
763 | ||
764 | /* Implement the "unwind_sp" gdbarch method. */ | |
765 | static CORE_ADDR | |
766 | rx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
767 | { | |
768 | ULONGEST sp; | |
769 | ||
770 | sp = frame_unwind_register_unsigned (this_frame, RX_SP_REGNUM); | |
771 | return sp; | |
772 | } | |
773 | ||
774 | /* Implement the "dummy_id" gdbarch method. */ | |
775 | static struct frame_id | |
776 | rx_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
777 | { | |
778 | return | |
779 | frame_id_build (get_frame_register_unsigned (this_frame, RX_SP_REGNUM), | |
780 | get_frame_pc (this_frame)); | |
781 | } | |
782 | ||
783 | /* Implement the "push_dummy_call" gdbarch method. */ | |
784 | static CORE_ADDR | |
785 | rx_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
786 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
787 | struct value **args, CORE_ADDR sp, int struct_return, | |
788 | CORE_ADDR struct_addr) | |
789 | { | |
790 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
791 | int write_pass; | |
792 | int sp_off = 0; | |
793 | CORE_ADDR cfa; | |
794 | int num_register_candidate_args; | |
795 | ||
796 | struct type *func_type = value_type (function); | |
797 | ||
798 | /* Dereference function pointer types. */ | |
799 | while (TYPE_CODE (func_type) == TYPE_CODE_PTR) | |
800 | func_type = TYPE_TARGET_TYPE (func_type); | |
801 | ||
802 | /* The end result had better be a function or a method. */ | |
803 | gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC | |
804 | || TYPE_CODE (func_type) == TYPE_CODE_METHOD); | |
805 | ||
806 | /* Functions with a variable number of arguments have all of their | |
807 | variable arguments and the last non-variable argument passed | |
808 | on the stack. | |
809 | ||
810 | Otherwise, we can pass up to four arguments on the stack. | |
811 | ||
812 | Once computed, we leave this value alone. I.e. we don't update | |
813 | it in case of a struct return going in a register or an argument | |
814 | requiring multiple registers, etc. We rely instead on the value | |
815 | of the ``arg_reg'' variable to get these other details correct. */ | |
816 | ||
817 | if (TYPE_VARARGS (func_type)) | |
818 | num_register_candidate_args = TYPE_NFIELDS (func_type) - 1; | |
819 | else | |
820 | num_register_candidate_args = 4; | |
821 | ||
822 | /* We make two passes; the first does the stack allocation, | |
823 | the second actually stores the arguments. */ | |
824 | for (write_pass = 0; write_pass <= 1; write_pass++) | |
825 | { | |
826 | int i; | |
827 | int arg_reg = RX_R1_REGNUM; | |
828 | ||
829 | if (write_pass) | |
830 | sp = align_down (sp - sp_off, 4); | |
831 | sp_off = 0; | |
832 | ||
833 | if (struct_return) | |
834 | { | |
835 | struct type *return_type = TYPE_TARGET_TYPE (func_type); | |
836 | ||
837 | gdb_assert (TYPE_CODE (return_type) == TYPE_CODE_STRUCT | |
838 | || TYPE_CODE (func_type) == TYPE_CODE_UNION); | |
839 | ||
840 | if (TYPE_LENGTH (return_type) > 16 | |
841 | || TYPE_LENGTH (return_type) % 4 != 0) | |
842 | { | |
843 | if (write_pass) | |
844 | regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM, | |
845 | struct_addr); | |
846 | } | |
847 | } | |
848 | ||
849 | /* Push the arguments. */ | |
850 | for (i = 0; i < nargs; i++) | |
851 | { | |
852 | struct value *arg = args[i]; | |
853 | const gdb_byte *arg_bits = value_contents_all (arg); | |
854 | struct type *arg_type = check_typedef (value_type (arg)); | |
855 | ULONGEST arg_size = TYPE_LENGTH (arg_type); | |
856 | ||
857 | if (i == 0 && struct_addr != 0 && !struct_return | |
858 | && TYPE_CODE (arg_type) == TYPE_CODE_PTR | |
859 | && extract_unsigned_integer (arg_bits, 4, | |
860 | byte_order) == struct_addr) | |
861 | { | |
862 | /* This argument represents the address at which C++ (and | |
863 | possibly other languages) store their return value. | |
864 | Put this value in R15. */ | |
865 | if (write_pass) | |
866 | regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM, | |
867 | struct_addr); | |
868 | } | |
869 | else if (TYPE_CODE (arg_type) != TYPE_CODE_STRUCT | |
94715c17 KB |
870 | && TYPE_CODE (arg_type) != TYPE_CODE_UNION |
871 | && arg_size <= 8) | |
baa835b4 KB |
872 | { |
873 | /* Argument is a scalar. */ | |
874 | if (arg_size == 8) | |
875 | { | |
876 | if (i < num_register_candidate_args | |
877 | && arg_reg <= RX_R4_REGNUM - 1) | |
878 | { | |
879 | /* If argument registers are going to be used to pass | |
880 | an 8 byte scalar, the ABI specifies that two registers | |
881 | must be available. */ | |
882 | if (write_pass) | |
883 | { | |
884 | regcache_cooked_write_unsigned (regcache, arg_reg, | |
885 | extract_unsigned_integer | |
886 | (arg_bits, 4, | |
887 | byte_order)); | |
888 | regcache_cooked_write_unsigned (regcache, | |
889 | arg_reg + 1, | |
890 | extract_unsigned_integer | |
891 | (arg_bits + 4, 4, | |
892 | byte_order)); | |
893 | } | |
894 | arg_reg += 2; | |
895 | } | |
896 | else | |
897 | { | |
898 | sp_off = align_up (sp_off, 4); | |
899 | /* Otherwise, pass the 8 byte scalar on the stack. */ | |
900 | if (write_pass) | |
901 | write_memory (sp + sp_off, arg_bits, 8); | |
902 | sp_off += 8; | |
903 | } | |
904 | } | |
905 | else | |
906 | { | |
907 | ULONGEST u; | |
908 | ||
909 | gdb_assert (arg_size <= 4); | |
910 | ||
911 | u = | |
912 | extract_unsigned_integer (arg_bits, arg_size, byte_order); | |
913 | ||
914 | if (i < num_register_candidate_args | |
915 | && arg_reg <= RX_R4_REGNUM) | |
916 | { | |
917 | if (write_pass) | |
918 | regcache_cooked_write_unsigned (regcache, arg_reg, u); | |
919 | arg_reg += 1; | |
920 | } | |
921 | else | |
922 | { | |
923 | int p_arg_size = 4; | |
924 | ||
925 | if (TYPE_PROTOTYPED (func_type) | |
926 | && i < TYPE_NFIELDS (func_type)) | |
927 | { | |
928 | struct type *p_arg_type = | |
929 | TYPE_FIELD_TYPE (func_type, i); | |
930 | p_arg_size = TYPE_LENGTH (p_arg_type); | |
931 | } | |
932 | ||
933 | sp_off = align_up (sp_off, p_arg_size); | |
934 | ||
935 | if (write_pass) | |
936 | write_memory_unsigned_integer (sp + sp_off, | |
937 | p_arg_size, byte_order, | |
938 | u); | |
939 | sp_off += p_arg_size; | |
940 | } | |
941 | } | |
942 | } | |
943 | else | |
944 | { | |
945 | /* Argument is a struct or union. Pass as much of the struct | |
946 | in registers, if possible. Pass the rest on the stack. */ | |
947 | while (arg_size > 0) | |
948 | { | |
949 | if (i < num_register_candidate_args | |
950 | && arg_reg <= RX_R4_REGNUM | |
951 | && arg_size <= 4 * (RX_R4_REGNUM - arg_reg + 1) | |
952 | && arg_size % 4 == 0) | |
953 | { | |
325fac50 | 954 | int len = std::min (arg_size, (ULONGEST) 4); |
baa835b4 KB |
955 | |
956 | if (write_pass) | |
957 | regcache_cooked_write_unsigned (regcache, arg_reg, | |
958 | extract_unsigned_integer | |
959 | (arg_bits, len, | |
960 | byte_order)); | |
961 | arg_bits += len; | |
962 | arg_size -= len; | |
963 | arg_reg++; | |
964 | } | |
965 | else | |
966 | { | |
967 | sp_off = align_up (sp_off, 4); | |
968 | if (write_pass) | |
969 | write_memory (sp + sp_off, arg_bits, arg_size); | |
970 | sp_off += align_up (arg_size, 4); | |
971 | arg_size = 0; | |
972 | } | |
973 | } | |
974 | } | |
975 | } | |
976 | } | |
977 | ||
978 | /* Keep track of the stack address prior to pushing the return address. | |
979 | This is the value that we'll return. */ | |
980 | cfa = sp; | |
981 | ||
982 | /* Push the return address. */ | |
983 | sp = sp - 4; | |
984 | write_memory_unsigned_integer (sp, 4, byte_order, bp_addr); | |
985 | ||
986 | /* Update the stack pointer. */ | |
987 | regcache_cooked_write_unsigned (regcache, RX_SP_REGNUM, sp); | |
988 | ||
989 | return cfa; | |
990 | } | |
991 | ||
992 | /* Implement the "return_value" gdbarch method. */ | |
993 | static enum return_value_convention | |
994 | rx_return_value (struct gdbarch *gdbarch, | |
6a3a010b | 995 | struct value *function, |
baa835b4 KB |
996 | struct type *valtype, |
997 | struct regcache *regcache, | |
998 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
999 | { | |
1000 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1001 | ULONGEST valtype_len = TYPE_LENGTH (valtype); | |
1002 | ||
1003 | if (TYPE_LENGTH (valtype) > 16 | |
1004 | || ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT | |
1005 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) | |
1006 | && TYPE_LENGTH (valtype) % 4 != 0)) | |
1007 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1008 | ||
1009 | if (readbuf) | |
1010 | { | |
1011 | ULONGEST u; | |
1012 | int argreg = RX_R1_REGNUM; | |
1013 | int offset = 0; | |
1014 | ||
1015 | while (valtype_len > 0) | |
1016 | { | |
325fac50 | 1017 | int len = std::min (valtype_len, (ULONGEST) 4); |
baa835b4 KB |
1018 | |
1019 | regcache_cooked_read_unsigned (regcache, argreg, &u); | |
1020 | store_unsigned_integer (readbuf + offset, len, byte_order, u); | |
1021 | valtype_len -= len; | |
1022 | offset += len; | |
1023 | argreg++; | |
1024 | } | |
1025 | } | |
1026 | ||
1027 | if (writebuf) | |
1028 | { | |
1029 | ULONGEST u; | |
1030 | int argreg = RX_R1_REGNUM; | |
1031 | int offset = 0; | |
1032 | ||
1033 | while (valtype_len > 0) | |
1034 | { | |
325fac50 | 1035 | int len = std::min (valtype_len, (ULONGEST) 4); |
baa835b4 KB |
1036 | |
1037 | u = extract_unsigned_integer (writebuf + offset, len, byte_order); | |
1038 | regcache_cooked_write_unsigned (regcache, argreg, u); | |
1039 | valtype_len -= len; | |
1040 | offset += len; | |
1041 | argreg++; | |
1042 | } | |
1043 | } | |
1044 | ||
1045 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1046 | } | |
1047 | ||
04180708 | 1048 | constexpr gdb_byte rx_break_insn[] = { 0x00 }; |
598cc9dc | 1049 | |
04180708 | 1050 | typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint; |
baa835b4 | 1051 | |
fd6e021d KB |
1052 | /* Implement the dwarf_reg_to_regnum" gdbarch method. */ |
1053 | ||
1054 | static int | |
1055 | rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) | |
1056 | { | |
1057 | if (0 <= reg && reg <= 15) | |
1058 | return reg; | |
1059 | else if (reg == 16) | |
1060 | return RX_PSW_REGNUM; | |
1061 | else if (reg == 17) | |
1062 | return RX_PC_REGNUM; | |
1063 | else | |
0fde2c53 | 1064 | return -1; |
fd6e021d KB |
1065 | } |
1066 | ||
baa835b4 KB |
1067 | /* Allocate and initialize a gdbarch object. */ |
1068 | static struct gdbarch * | |
1069 | rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1070 | { | |
1071 | struct gdbarch *gdbarch; | |
1072 | struct gdbarch_tdep *tdep; | |
1073 | int elf_flags; | |
1074 | ||
1075 | /* Extract the elf_flags if available. */ | |
1076 | if (info.abfd != NULL | |
1077 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) | |
1078 | elf_flags = elf_elfheader (info.abfd)->e_flags; | |
1079 | else | |
1080 | elf_flags = 0; | |
1081 | ||
1082 | ||
1083 | /* Try to find the architecture in the list of already defined | |
1084 | architectures. */ | |
1085 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1086 | arches != NULL; | |
1087 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1088 | { | |
1089 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) | |
1090 | continue; | |
1091 | ||
1092 | return arches->gdbarch; | |
1093 | } | |
1094 | ||
1095 | /* None found, create a new architecture from the information | |
1096 | provided. */ | |
e6ddc3bf | 1097 | tdep = XCNEW (struct gdbarch_tdep); |
baa835b4 KB |
1098 | gdbarch = gdbarch_alloc (&info, tdep); |
1099 | tdep->elf_flags = elf_flags; | |
1100 | ||
1101 | set_gdbarch_num_regs (gdbarch, RX_NUM_REGS); | |
1102 | set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
1103 | set_gdbarch_register_name (gdbarch, rx_register_name); | |
1104 | set_gdbarch_register_type (gdbarch, rx_register_type); | |
1105 | set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM); | |
1106 | set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM); | |
1107 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1108 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
04180708 YQ |
1109 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc); |
1110 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind); | |
baa835b4 KB |
1111 | set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue); |
1112 | ||
baa835b4 KB |
1113 | set_gdbarch_unwind_pc (gdbarch, rx_unwind_pc); |
1114 | set_gdbarch_unwind_sp (gdbarch, rx_unwind_sp); | |
1115 | ||
1116 | /* Target builtin data types. */ | |
1117 | set_gdbarch_char_signed (gdbarch, 0); | |
1118 | set_gdbarch_short_bit (gdbarch, 16); | |
1119 | set_gdbarch_int_bit (gdbarch, 32); | |
1120 | set_gdbarch_long_bit (gdbarch, 32); | |
1121 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1122 | set_gdbarch_ptr_bit (gdbarch, 32); | |
1123 | set_gdbarch_float_bit (gdbarch, 32); | |
1124 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); | |
1125 | if (elf_flags & E_FLAG_RX_64BIT_DOUBLES) | |
1126 | { | |
1127 | set_gdbarch_double_bit (gdbarch, 64); | |
1128 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1129 | set_gdbarch_double_format (gdbarch, floatformats_ieee_double); | |
1130 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); | |
1131 | } | |
1132 | else | |
1133 | { | |
1134 | set_gdbarch_double_bit (gdbarch, 32); | |
1135 | set_gdbarch_long_double_bit (gdbarch, 32); | |
1136 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
1137 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); | |
1138 | } | |
1139 | ||
fd6e021d KB |
1140 | /* DWARF register mapping. */ |
1141 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum); | |
1142 | ||
baa835b4 | 1143 | /* Frame unwinding. */ |
1b485e67 | 1144 | frame_unwind_append_unwinder (gdbarch, &rx_exception_unwind); |
baa835b4 | 1145 | dwarf2_append_unwinders (gdbarch); |
baa835b4 KB |
1146 | frame_unwind_append_unwinder (gdbarch, &rx_frame_unwind); |
1147 | ||
1148 | /* Methods for saving / extracting a dummy frame's ID. | |
1149 | The ID's stack address must match the SP value returned by | |
1150 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ | |
1151 | set_gdbarch_dummy_id (gdbarch, rx_dummy_id); | |
1152 | set_gdbarch_push_dummy_call (gdbarch, rx_push_dummy_call); | |
1153 | set_gdbarch_return_value (gdbarch, rx_return_value); | |
1154 | ||
1155 | /* Virtual tables. */ | |
1156 | set_gdbarch_vbit_in_delta (gdbarch, 1); | |
1157 | ||
1158 | return gdbarch; | |
1159 | } | |
1160 | ||
1161 | /* Register the above initialization routine. */ | |
693be288 | 1162 | |
baa835b4 KB |
1163 | void |
1164 | _initialize_rx_tdep (void) | |
1165 | { | |
1166 | register_gdbarch_init (bfd_arch_rx, rx_gdbarch_init); | |
1167 | } |