[ARM][gas] Add support for Cortex-A32
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
618f726f 3 Copyright (C) 2001-2016 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
566c56c9
MK
47#include "linux-record.h"
48#include "record-full.h"
4ac33720 49#include "auxv.h"
237b092b 50#include "xml-syscall.h"
5769d3cd 51
55aa24fb
SDJ
52#include "stap-probe.h"
53#include "ax.h"
54#include "ax-gdb.h"
55#include "user-regs.h"
56#include "cli/cli-utils.h"
57#include <ctype.h>
04a83fee 58#include "elf/common.h"
417c80f9
AA
59#include "elf/s390.h"
60#include "elf-bfd.h"
55aa24fb 61
7803799a 62#include "features/s390-linux32.c"
c642a434
UW
63#include "features/s390-linux32v1.c"
64#include "features/s390-linux32v2.c"
7803799a 65#include "features/s390-linux64.c"
c642a434
UW
66#include "features/s390-linux64v1.c"
67#include "features/s390-linux64v2.c"
4ac33720 68#include "features/s390-te-linux64.c"
550bdf96
AA
69#include "features/s390-vx-linux64.c"
70#include "features/s390-tevx-linux64.c"
7803799a 71#include "features/s390x-linux64.c"
c642a434
UW
72#include "features/s390x-linux64v1.c"
73#include "features/s390x-linux64v2.c"
4ac33720 74#include "features/s390x-te-linux64.c"
550bdf96
AA
75#include "features/s390x-vx-linux64.c"
76#include "features/s390x-tevx-linux64.c"
7803799a 77
237b092b
AA
78#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
79#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
80
52059ffd
TT
81enum s390_abi_kind
82{
83 ABI_LINUX_S390,
84 ABI_LINUX_ZSERIES
85};
86
417c80f9
AA
87enum s390_vector_abi_kind
88{
89 S390_VECTOR_ABI_NONE,
90 S390_VECTOR_ABI_128
91};
92
d0f54f9d
JB
93/* The tdep structure. */
94
95struct gdbarch_tdep
5769d3cd 96{
b0cf273e 97 /* ABI version. */
52059ffd 98 enum s390_abi_kind abi;
b0cf273e 99
417c80f9
AA
100 /* Vector ABI. */
101 enum s390_vector_abi_kind vector_abi;
102
7803799a
UW
103 /* Pseudo register numbers. */
104 int gpr_full_regnum;
105 int pc_regnum;
106 int cc_regnum;
550bdf96 107 int v0_full_regnum;
7803799a 108
5aa82d05
AA
109 int have_linux_v1;
110 int have_linux_v2;
111 int have_tdb;
d0f54f9d
JB
112};
113
114
7803799a
UW
115/* ABI call-saved register information. */
116
117static int
118s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 119{
7803799a
UW
120 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
121
122 switch (tdep->abi)
6707b003 123 {
7803799a
UW
124 case ABI_LINUX_S390:
125 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
126 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
127 || regnum == S390_A0_REGNUM)
128 return 1;
6707b003 129
7803799a
UW
130 break;
131
132 case ABI_LINUX_ZSERIES:
133 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
134 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
135 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
136 return 1;
137
138 break;
139 }
140
141 return 0;
5769d3cd
AC
142}
143
c642a434
UW
144static int
145s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
146{
147 /* The last-break address is read-only. */
148 return regnum == S390_LAST_BREAK_REGNUM;
149}
150
151static void
152s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
153{
154 struct gdbarch *gdbarch = get_regcache_arch (regcache);
155 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
156
157 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
158
159 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
160 messing with the PC we just installed, if we happen to be within
161 an interrupted system call that the kernel wants to restart.
162
163 Note that after we return from the dummy call, the SYSTEM_CALL and
164 ORIG_R2 registers will be automatically restored, and the kernel
165 continues to restart the system call at this point. */
166 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
167 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
168}
169
f79a3bae
MK
170/* The "guess_tracepoint_registers" gdbarch method. */
171
172static void
173s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
174 struct regcache *regcache,
175 CORE_ADDR addr)
176{
177 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
178 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
179 gdb_byte *reg = (gdb_byte *) alloca (sz);
180 ULONGEST pswm, pswa;
181
182 /* Set PSWA from the location and a default PSWM (the only part we're
183 unlikely to get right is the CC). */
184 if (tdep->abi == ABI_LINUX_S390)
185 {
186 /* 31-bit PSWA needs high bit set (it's very unlikely the target
187 was in 24-bit mode). */
188 pswa = addr | 0x80000000UL;
189 pswm = 0x070d0000UL;
190 }
191 else
192 {
193 pswa = addr;
194 pswm = 0x0705000180000000ULL;
195 }
196
197 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
198 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
199
200 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
201 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
202}
203
7803799a 204
d0f54f9d
JB
205/* DWARF Register Mapping. */
206
2ccd1468 207static const short s390_dwarf_regmap[] =
d0f54f9d 208{
550bdf96 209 /* 0-15: General Purpose Registers. */
d0f54f9d
JB
210 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
211 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
212 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
213 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
214
550bdf96 215 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
d0f54f9d
JB
216 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
217 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
218 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
219 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
220
550bdf96 221 /* 32-47: Control Registers (not mapped). */
34201ae3
UW
222 -1, -1, -1, -1, -1, -1, -1, -1,
223 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d 224
550bdf96 225 /* 48-63: Access Registers. */
d0f54f9d
JB
226 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
227 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
228 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
229 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
230
550bdf96 231 /* 64-65: Program Status Word. */
d0f54f9d 232 S390_PSWM_REGNUM,
7803799a
UW
233 S390_PSWA_REGNUM,
234
550bdf96
AA
235 /* 66-67: Reserved. */
236 -1, -1,
237
238 /* 68-83: Vector Registers 16-31. */
239 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
240 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
241 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
242 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
243
244 /* End of "official" DWARF registers. The remainder of the map is
245 for GDB internal use only. */
246
7803799a
UW
247 /* GPR Lower Half Access. */
248 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
249 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
250 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
251 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
d0f54f9d
JB
252};
253
550bdf96
AA
254enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
255
d0f54f9d
JB
256/* Convert DWARF register number REG to the appropriate register
257 number used by GDB. */
a78f21af 258static int
d3f73121 259s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 260{
7803799a 261 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
550bdf96 262 int gdb_reg = -1;
7803799a 263
550bdf96
AA
264 /* In a 32-on-64 debug scenario, debug info refers to the full
265 64-bit GPRs. Note that call frame information still refers to
266 the 32-bit lower halves, because s390_adjust_frame_regnum uses
267 special register numbers to access GPRs. */
7803799a
UW
268 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
269 return tdep->gpr_full_regnum + reg;
d0f54f9d 270
16aff9a6 271 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
550bdf96
AA
272 gdb_reg = s390_dwarf_regmap[reg];
273
274 if (tdep->v0_full_regnum == -1)
275 {
276 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
277 gdb_reg = -1;
278 }
279 else
280 {
281 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
282 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
283 }
d0f54f9d 284
550bdf96 285 return gdb_reg;
7803799a 286}
d0f54f9d 287
7803799a
UW
288/* Translate a .eh_frame register to DWARF register, or adjust a
289 .debug_frame register. */
290static int
291s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
292{
293 /* See s390_dwarf_reg_to_regnum for comments. */
550bdf96 294 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
d0f54f9d
JB
295}
296
d0f54f9d 297
7803799a
UW
298/* Pseudo registers. */
299
2ccd1468
UW
300static int
301regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
302{
303 return (tdep->gpr_full_regnum != -1
304 && regnum >= tdep->gpr_full_regnum
305 && regnum <= tdep->gpr_full_regnum + 15);
306}
307
550bdf96
AA
308/* Check whether REGNUM indicates a full vector register (v0-v15).
309 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
310
311static int
312regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
313{
314 return (tdep->v0_full_regnum != -1
315 && regnum >= tdep->v0_full_regnum
316 && regnum <= tdep->v0_full_regnum + 15);
317}
318
87de11c0
AA
319/* Return the name of register REGNO. Return the empty string for
320 registers that shouldn't be visible. */
550bdf96
AA
321
322static const char *
323s390_register_name (struct gdbarch *gdbarch, int regnum)
324{
325 if (regnum >= S390_V0_LOWER_REGNUM
326 && regnum <= S390_V15_LOWER_REGNUM)
87de11c0 327 return "";
550bdf96
AA
328 return tdesc_register_name (gdbarch, regnum);
329}
330
7803799a
UW
331static const char *
332s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 333{
7803799a 334 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 335
7803799a
UW
336 if (regnum == tdep->pc_regnum)
337 return "pc";
d0f54f9d 338
7803799a
UW
339 if (regnum == tdep->cc_regnum)
340 return "cc";
d0f54f9d 341
2ccd1468 342 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
343 {
344 static const char *full_name[] = {
345 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
346 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
347 };
348 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 349 }
7803799a 350
550bdf96
AA
351 if (regnum_is_vxr_full (tdep, regnum))
352 {
353 static const char *full_name[] = {
354 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
355 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
356 };
357 return full_name[regnum - tdep->v0_full_regnum];
358 }
359
7803799a 360 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
361}
362
7803799a
UW
363static struct type *
364s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 365{
7803799a 366 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 367
7803799a
UW
368 if (regnum == tdep->pc_regnum)
369 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 370
7803799a
UW
371 if (regnum == tdep->cc_regnum)
372 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 373
2ccd1468 374 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
375 return builtin_type (gdbarch)->builtin_uint64;
376
550bdf96
AA
377 if (regnum_is_vxr_full (tdep, regnum))
378 return tdesc_find_type (gdbarch, "vec128");
379
7803799a 380 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
381}
382
05d1431c 383static enum register_status
7803799a
UW
384s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
385 int regnum, gdb_byte *buf)
d0f54f9d 386{
7803799a 387 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 388 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 389 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
390 ULONGEST val;
391
7803799a 392 if (regnum == tdep->pc_regnum)
d0f54f9d 393 {
05d1431c
PA
394 enum register_status status;
395
396 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
397 if (status == REG_VALID)
398 {
399 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
400 val &= 0x7fffffff;
401 store_unsigned_integer (buf, regsize, byte_order, val);
402 }
403 return status;
7803799a 404 }
d0f54f9d 405
7803799a
UW
406 if (regnum == tdep->cc_regnum)
407 {
05d1431c
PA
408 enum register_status status;
409
410 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
411 if (status == REG_VALID)
412 {
413 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
414 val = (val >> 12) & 3;
415 else
416 val = (val >> 44) & 3;
417 store_unsigned_integer (buf, regsize, byte_order, val);
418 }
419 return status;
7803799a 420 }
d0f54f9d 421
2ccd1468 422 if (regnum_is_gpr_full (tdep, regnum))
7803799a 423 {
05d1431c 424 enum register_status status;
7803799a 425 ULONGEST val_upper;
05d1431c 426
7803799a
UW
427 regnum -= tdep->gpr_full_regnum;
428
05d1431c
PA
429 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
430 if (status == REG_VALID)
431 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
432 &val_upper);
433 if (status == REG_VALID)
434 {
435 val |= val_upper << 32;
436 store_unsigned_integer (buf, regsize, byte_order, val);
437 }
438 return status;
d0f54f9d 439 }
7803799a 440
550bdf96
AA
441 if (regnum_is_vxr_full (tdep, regnum))
442 {
443 enum register_status status;
444
445 regnum -= tdep->v0_full_regnum;
446
447 status = regcache_raw_read (regcache, S390_F0_REGNUM + regnum, buf);
448 if (status == REG_VALID)
449 status = regcache_raw_read (regcache,
450 S390_V0_LOWER_REGNUM + regnum, buf + 8);
451 return status;
452 }
453
7803799a 454 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
455}
456
457static void
7803799a
UW
458s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
459 int regnum, const gdb_byte *buf)
d0f54f9d 460{
7803799a 461 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 462 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 463 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
464 ULONGEST val, psw;
465
7803799a 466 if (regnum == tdep->pc_regnum)
d0f54f9d 467 {
7803799a
UW
468 val = extract_unsigned_integer (buf, regsize, byte_order);
469 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
470 {
471 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
472 val = (psw & 0x80000000) | (val & 0x7fffffff);
473 }
474 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
475 return;
476 }
d0f54f9d 477
7803799a
UW
478 if (regnum == tdep->cc_regnum)
479 {
480 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 481 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
482 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
483 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
484 else
485 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
486 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
487 return;
488 }
d0f54f9d 489
2ccd1468 490 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
491 {
492 regnum -= tdep->gpr_full_regnum;
493 val = extract_unsigned_integer (buf, regsize, byte_order);
494 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
495 val & 0xffffffff);
496 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
497 val >> 32);
498 return;
d0f54f9d 499 }
7803799a 500
550bdf96
AA
501 if (regnum_is_vxr_full (tdep, regnum))
502 {
503 regnum -= tdep->v0_full_regnum;
504 regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf);
505 regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8);
506 return;
507 }
508
7803799a 509 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
510}
511
512/* 'float' values are stored in the upper half of floating-point
550bdf96
AA
513 registers, even though we are otherwise a big-endian platform. The
514 same applies to a 'float' value within a vector. */
d0f54f9d 515
9acbedc0 516static struct value *
2ed3c037
UW
517s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
518 int regnum, struct frame_id frame_id)
d0f54f9d 519{
550bdf96 520 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2ed3c037
UW
521 struct value *value = default_value_from_register (gdbarch, type,
522 regnum, frame_id);
744a8059
SP
523 check_typedef (type);
524
550bdf96
AA
525 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
526 && TYPE_LENGTH (type) < 8)
527 || regnum_is_vxr_full (tdep, regnum)
528 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
9acbedc0 529 set_value_offset (value, 0);
d0f54f9d 530
9acbedc0 531 return value;
d0f54f9d
JB
532}
533
534/* Register groups. */
535
a78f21af 536static int
7803799a
UW
537s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
538 struct reggroup *group)
d0f54f9d
JB
539{
540 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
541
d6db1fab
UW
542 /* We usually save/restore the whole PSW, which includes PC and CC.
543 However, some older gdbservers may not support saving/restoring
544 the whole PSW yet, and will return an XML register description
545 excluding those from the save/restore register groups. In those
546 cases, we still need to explicitly save/restore PC and CC in order
547 to push or pop frames. Since this doesn't hurt anything if we
548 already save/restore the whole PSW (it's just redundant), we add
549 PC and CC at this point unconditionally. */
d0f54f9d 550 if (group == save_reggroup || group == restore_reggroup)
7803799a 551 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d 552
550bdf96
AA
553 if (group == vector_reggroup)
554 return regnum_is_vxr_full (tdep, regnum);
555
556 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
557 return 0;
558
d0f54f9d
JB
559 return default_register_reggroup_p (gdbarch, regnum, group);
560}
561
562
6df55226
MK
563/* A helper for s390_software_single_step, decides if an instruction
564 is a partial-execution instruction that needs to be executed until
565 completion when in record mode. If it is, returns 1 and writes
566 instruction length to a pointer. */
567
568static int
569s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
570{
571 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
572 uint16_t insn;
573
574 insn = read_memory_integer (loc, 2, byte_order);
575
576 switch (insn >> 8)
577 {
578 case 0xa8: /* MVCLE */
579 *len = 4;
580 return 1;
581
582 case 0xeb:
583 {
584 insn = read_memory_integer (loc + 4, 2, byte_order);
585 if ((insn & 0xff) == 0x8e)
586 {
587 /* MVCLU */
588 *len = 6;
589 return 1;
590 }
591 }
592 break;
593 }
594
595 switch (insn)
596 {
597 case 0xb255: /* MVST */
598 case 0xb263: /* CMPSC */
599 case 0xb2a5: /* TRE */
600 case 0xb2a6: /* CU21 */
601 case 0xb2a7: /* CU12 */
602 case 0xb9b0: /* CU14 */
603 case 0xb9b1: /* CU24 */
604 case 0xb9b2: /* CU41 */
605 case 0xb9b3: /* CU42 */
606 case 0xb92a: /* KMF */
607 case 0xb92b: /* KMO */
608 case 0xb92f: /* KMC */
609 case 0xb92d: /* KMCTR */
610 case 0xb92e: /* KM */
611 case 0xb93c: /* PPNO */
612 case 0xb990: /* TRTT */
613 case 0xb991: /* TRTO */
614 case 0xb992: /* TROT */
615 case 0xb993: /* TROO */
616 *len = 4;
617 return 1;
618 }
619
620 return 0;
621}
622
623/* Implement the "software_single_step" gdbarch method, needed to single step
624 through instructions like MVCLE in record mode, to make sure they are
625 executed to completion. Without that, record will save the full length
626 of destination buffer on every iteration, even though the CPU will only
627 process about 4kiB of it each time, leading to O(n**2) memory and time
628 complexity. */
629
630static int
631s390_software_single_step (struct frame_info *frame)
632{
633 struct gdbarch *gdbarch = get_frame_arch (frame);
634 struct address_space *aspace = get_frame_address_space (frame);
635 CORE_ADDR loc = get_frame_pc (frame);
636 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
637 int len;
638 uint16_t insn;
639
640 /* Special handling only if recording. */
641 if (!record_full_is_used ())
642 return 0;
643
644 /* First, match a partial instruction. */
645 if (!s390_is_partial_instruction (gdbarch, loc, &len))
646 return 0;
647
648 loc += len;
649
650 /* Second, look for a branch back to it. */
651 insn = read_memory_integer (loc, 2, byte_order);
652 if (insn != 0xa714) /* BRC with mask 1 */
653 return 0;
654
655 insn = read_memory_integer (loc + 2, 2, byte_order);
656 if (insn != (uint16_t) -(len / 2))
657 return 0;
658
659 loc += 4;
660
661 /* Found it, step past the whole thing. */
662
663 insert_single_step_breakpoint (gdbarch, aspace, loc);
664
665 return 1;
666}
667
668static int
669s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
670 struct displaced_step_closure *closure)
671{
672 return 1;
673}
674
675
2ccd1468 676/* Maps for register sets. */
d0f54f9d 677
99b7da5d 678static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 679 {
99b7da5d
AA
680 { 1, S390_PSWM_REGNUM },
681 { 1, S390_PSWA_REGNUM },
682 { 16, S390_R0_REGNUM },
683 { 16, S390_A0_REGNUM },
684 { 1, S390_ORIG_R2_REGNUM },
685 { 0 }
2ccd1468 686 };
d0f54f9d 687
99b7da5d 688static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 689 {
99b7da5d
AA
690 { 1, S390_FPC_REGNUM, 8 },
691 { 16, S390_F0_REGNUM, 8 },
692 { 0 }
2ccd1468 693 };
d0f54f9d 694
99b7da5d 695static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 696 {
99b7da5d
AA
697 { 16, S390_R0_UPPER_REGNUM, 4 },
698 { 0 }
2ccd1468 699 };
7803799a 700
99b7da5d 701static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 702 {
99b7da5d
AA
703 { 1, REGCACHE_MAP_SKIP, 4 },
704 { 1, S390_LAST_BREAK_REGNUM, 4 },
705 { 0 }
2ccd1468 706 };
c642a434 707
99b7da5d 708static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 709 {
99b7da5d
AA
710 { 1, S390_LAST_BREAK_REGNUM, 8 },
711 { 0 }
2ccd1468
UW
712 };
713
99b7da5d 714static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 715 {
99b7da5d
AA
716 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
717 { 0 }
2ccd1468
UW
718 };
719
99b7da5d 720static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 721 {
99b7da5d
AA
722 { 1, S390_TDB_DWORD0_REGNUM, 8 },
723 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
724 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
725 { 1, S390_TDB_ATIA_REGNUM, 8 },
726 { 12, REGCACHE_MAP_SKIP, 8 },
727 { 16, S390_TDB_R0_REGNUM, 8 },
728 { 0 }
2ccd1468 729 };
c642a434 730
550bdf96
AA
731static const struct regcache_map_entry s390_regmap_vxrs_low[] =
732 {
733 { 16, S390_V0_LOWER_REGNUM, 8 },
734 { 0 }
735 };
736
737static const struct regcache_map_entry s390_regmap_vxrs_high[] =
738 {
739 { 16, S390_V16_REGNUM, 16 },
740 { 0 }
741 };
742
4ac33720 743
99b7da5d
AA
744/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
745 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
746
747static void
748s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
749 int regnum, const void *regs, size_t len)
750{
751 ULONGEST tdw;
752 enum register_status ret;
753 int i;
754
99b7da5d 755 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
756 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
757 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 758 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
759}
760
99b7da5d
AA
761const struct regset s390_gregset = {
762 s390_gregmap,
763 regcache_supply_regset,
764 regcache_collect_regset
d0f54f9d
JB
765};
766
99b7da5d
AA
767const struct regset s390_fpregset = {
768 s390_fpregmap,
769 regcache_supply_regset,
770 regcache_collect_regset
d0f54f9d
JB
771};
772
7803799a 773static const struct regset s390_upper_regset = {
34201ae3 774 s390_regmap_upper,
99b7da5d
AA
775 regcache_supply_regset,
776 regcache_collect_regset
7803799a
UW
777};
778
99b7da5d 779const struct regset s390_last_break_regset = {
c642a434 780 s390_regmap_last_break,
99b7da5d
AA
781 regcache_supply_regset,
782 regcache_collect_regset
c642a434
UW
783};
784
99b7da5d 785const struct regset s390x_last_break_regset = {
c642a434 786 s390x_regmap_last_break,
99b7da5d
AA
787 regcache_supply_regset,
788 regcache_collect_regset
c642a434
UW
789};
790
99b7da5d 791const struct regset s390_system_call_regset = {
c642a434 792 s390_regmap_system_call,
99b7da5d
AA
793 regcache_supply_regset,
794 regcache_collect_regset
c642a434
UW
795};
796
99b7da5d 797const struct regset s390_tdb_regset = {
4ac33720
UW
798 s390_regmap_tdb,
799 s390_supply_tdb_regset,
99b7da5d 800 regcache_collect_regset
4ac33720
UW
801};
802
550bdf96
AA
803const struct regset s390_vxrs_low_regset = {
804 s390_regmap_vxrs_low,
805 regcache_supply_regset,
806 regcache_collect_regset
807};
808
809const struct regset s390_vxrs_high_regset = {
810 s390_regmap_vxrs_high,
811 regcache_supply_regset,
812 regcache_collect_regset
813};
814
5aa82d05
AA
815/* Iterate over supported core file register note sections. */
816
817static void
818s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
819 iterate_over_regset_sections_cb *cb,
820 void *cb_data,
821 const struct regcache *regcache)
822{
823 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8f0435f7
AA
824 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
825 s390_sizeof_gregset : s390x_sizeof_gregset);
5aa82d05 826
8f0435f7
AA
827 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
828 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
5aa82d05
AA
829
830 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
8f0435f7
AA
831 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
832 "s390 GPR upper halves", cb_data);
5aa82d05
AA
833
834 if (tdep->have_linux_v1)
8f0435f7
AA
835 cb (".reg-s390-last-break", 8,
836 (gdbarch_ptr_bit (gdbarch) == 32
837 ? &s390_last_break_regset : &s390x_last_break_regset),
838 "s930 last-break address", cb_data);
5aa82d05
AA
839
840 if (tdep->have_linux_v2)
8f0435f7
AA
841 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
842 "s390 system-call", cb_data);
5aa82d05
AA
843
844 /* If regcache is set, we are in "write" (gcore) mode. In this
845 case, don't iterate over the TDB unless its registers are
846 available. */
847 if (tdep->have_tdb
848 && (regcache == NULL
849 || REG_VALID == regcache_register_status (regcache,
850 S390_TDB_DWORD0_REGNUM)))
8f0435f7
AA
851 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
852 "s390 TDB", cb_data);
550bdf96
AA
853
854 if (tdep->v0_full_regnum != -1)
855 {
856 cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset,
857 "s390 vector registers 0-15 lower half", cb_data);
858 cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset,
859 "s390 vector registers 16-31", cb_data);
860 }
5aa82d05
AA
861}
862
7803799a
UW
863static const struct target_desc *
864s390_core_read_description (struct gdbarch *gdbarch,
865 struct target_ops *target, bfd *abfd)
866{
7803799a 867 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 868 CORE_ADDR hwcap = 0;
550bdf96 869 int high_gprs, v1, v2, te, vx;
4ac33720
UW
870
871 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
872 if (!section)
873 return NULL;
874
550bdf96
AA
875 high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs")
876 != NULL);
877 v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL);
878 v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL);
879 vx = (hwcap & HWCAP_S390_VX);
880 te = (hwcap & HWCAP_S390_TE);
881
7803799a
UW
882 switch (bfd_section_size (abfd, section))
883 {
884 case s390_sizeof_gregset:
c642a434 885 if (high_gprs)
550bdf96
AA
886 return (te && vx ? tdesc_s390_tevx_linux64 :
887 vx ? tdesc_s390_vx_linux64 :
888 te ? tdesc_s390_te_linux64 :
889 v2 ? tdesc_s390_linux64v2 :
890 v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64);
c642a434 891 else
550bdf96
AA
892 return (v2 ? tdesc_s390_linux32v2 :
893 v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
894
895 case s390x_sizeof_gregset:
550bdf96
AA
896 return (te && vx ? tdesc_s390x_tevx_linux64 :
897 vx ? tdesc_s390x_vx_linux64 :
898 te ? tdesc_s390x_te_linux64 :
899 v2 ? tdesc_s390x_linux64v2 :
900 v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
901
902 default:
903 return NULL;
904 }
905}
906
d0f54f9d 907
4bc8c588
JB
908/* Decoding S/390 instructions. */
909
910/* Named opcode values for the S/390 instructions we recognize. Some
911 instructions have their opcode split across two fields; those are the
912 op1_* and op2_* enums. */
913enum
914 {
a8c99f38
JB
915 op1_lhi = 0xa7, op2_lhi = 0x08,
916 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 917 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 918 op_lr = 0x18,
a8c99f38
JB
919 op_lgr = 0xb904,
920 op_l = 0x58,
921 op1_ly = 0xe3, op2_ly = 0x58,
922 op1_lg = 0xe3, op2_lg = 0x04,
923 op_lm = 0x98,
924 op1_lmy = 0xeb, op2_lmy = 0x98,
925 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 926 op_st = 0x50,
a8c99f38 927 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 928 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 929 op_std = 0x60,
4bc8c588 930 op_stm = 0x90,
a8c99f38 931 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 932 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
933 op1_aghi = 0xa7, op2_aghi = 0x0b,
934 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
935 op1_agfi = 0xc2, op2_agfi = 0x08,
936 op1_afi = 0xc2, op2_afi = 0x09,
937 op1_algfi= 0xc2, op2_algfi= 0x0a,
938 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
939 op_ar = 0x1a,
940 op_agr = 0xb908,
941 op_a = 0x5a,
942 op1_ay = 0xe3, op2_ay = 0x5a,
943 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
944 op1_slgfi= 0xc2, op2_slgfi= 0x04,
945 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
946 op_sr = 0x1b,
947 op_sgr = 0xb909,
948 op_s = 0x5b,
949 op1_sy = 0xe3, op2_sy = 0x5b,
950 op1_sg = 0xe3, op2_sg = 0x09,
951 op_nr = 0x14,
952 op_ngr = 0xb980,
953 op_la = 0x41,
954 op1_lay = 0xe3, op2_lay = 0x71,
955 op1_larl = 0xc0, op2_larl = 0x00,
956 op_basr = 0x0d,
957 op_bas = 0x4d,
958 op_bcr = 0x07,
959 op_bc = 0x0d,
1db4e8a0
UW
960 op_bctr = 0x06,
961 op_bctgr = 0xb946,
962 op_bct = 0x46,
963 op1_bctg = 0xe3, op2_bctg = 0x46,
964 op_bxh = 0x86,
965 op1_bxhg = 0xeb, op2_bxhg = 0x44,
966 op_bxle = 0x87,
967 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
968 op1_bras = 0xa7, op2_bras = 0x05,
969 op1_brasl= 0xc0, op2_brasl= 0x05,
970 op1_brc = 0xa7, op2_brc = 0x04,
971 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
972 op1_brct = 0xa7, op2_brct = 0x06,
973 op1_brctg= 0xa7, op2_brctg= 0x07,
974 op_brxh = 0x84,
975 op1_brxhg= 0xec, op2_brxhg= 0x44,
976 op_brxle = 0x85,
977 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 978 op_svc = 0x0a,
4bc8c588
JB
979 };
980
981
a8c99f38
JB
982/* Read a single instruction from address AT. */
983
984#define S390_MAX_INSTR_SIZE 6
985static int
986s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
987{
988 static int s390_instrlen[] = { 2, 4, 4, 6 };
989 int instrlen;
990
8defab1a 991 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
992 return -1;
993 instrlen = s390_instrlen[instr[0] >> 6];
994 if (instrlen > 2)
995 {
8defab1a 996 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 997 return -1;
a8c99f38
JB
998 }
999 return instrlen;
1000}
1001
1002
4bc8c588
JB
1003/* The functions below are for recognizing and decoding S/390
1004 instructions of various formats. Each of them checks whether INSN
1005 is an instruction of the given format, with the specified opcodes.
1006 If it is, it sets the remaining arguments to the values of the
1007 instruction's fields, and returns a non-zero value; otherwise, it
1008 returns zero.
1009
1010 These functions' arguments appear in the order they appear in the
1011 instruction, not in the machine-language form. So, opcodes always
1012 come first, even though they're sometimes scattered around the
1013 instructions. And displacements appear before base and extension
1014 registers, as they do in the assembly syntax, not at the end, as
1015 they do in the machine language. */
a78f21af 1016static int
4bc8c588
JB
1017is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
1018{
1019 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1020 {
1021 *r1 = (insn[1] >> 4) & 0xf;
1022 /* i2 is a 16-bit signed quantity. */
1023 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1024 return 1;
1025 }
1026 else
1027 return 0;
1028}
8ac0e65a 1029
5769d3cd 1030
4bc8c588
JB
1031static int
1032is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 1033 unsigned int *r1, int *i2)
4bc8c588
JB
1034{
1035 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1036 {
1037 *r1 = (insn[1] >> 4) & 0xf;
1038 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
1039 no sign extension is necessary, but we don't want to assume
1040 that. */
4bc8c588 1041 *i2 = (((insn[2] << 24)
34201ae3
UW
1042 | (insn[3] << 16)
1043 | (insn[4] << 8)
1044 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
1045 return 1;
1046 }
1047 else
1048 return 0;
1049}
1050
1051
1052static int
1053is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1054{
1055 if (insn[0] == op)
1056 {
1057 *r1 = (insn[1] >> 4) & 0xf;
1058 *r2 = insn[1] & 0xf;
1059 return 1;
1060 }
1061 else
1062 return 0;
1063}
1064
1065
1066static int
1067is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1068{
1069 if (((insn[0] << 8) | insn[1]) == op)
1070 {
1071 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1072 *r1 = (insn[3] >> 4) & 0xf;
1073 *r2 = insn[3] & 0xf;
1074 return 1;
1075 }
1076 else
1077 return 0;
1078}
1079
1080
1081static int
1082is_rs (bfd_byte *insn, int op,
eb1bd1fb 1083 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1084{
1085 if (insn[0] == op)
1086 {
1087 *r1 = (insn[1] >> 4) & 0xf;
1088 *r3 = insn[1] & 0xf;
1089 *b2 = (insn[2] >> 4) & 0xf;
1090 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1091 return 1;
1092 }
1093 else
1094 return 0;
1095}
1096
1097
1098static int
a8c99f38 1099is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 1100 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1101{
1102 if (insn[0] == op1
4bc8c588
JB
1103 && insn[5] == op2)
1104 {
1105 *r1 = (insn[1] >> 4) & 0xf;
1106 *r3 = insn[1] & 0xf;
1107 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1108 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1109 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1110 ^ 0x80000) - 0x80000;
4bc8c588
JB
1111 return 1;
1112 }
1113 else
1114 return 0;
1115}
1116
1117
1db4e8a0
UW
1118static int
1119is_rsi (bfd_byte *insn, int op,
34201ae3 1120 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1121{
1122 if (insn[0] == op)
1123 {
1124 *r1 = (insn[1] >> 4) & 0xf;
1125 *r3 = insn[1] & 0xf;
1126 /* i2 is a 16-bit signed quantity. */
1127 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1128 return 1;
1129 }
1130 else
1131 return 0;
1132}
1133
1134
1135static int
1136is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 1137 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1138{
1139 if (insn[0] == op1
1140 && insn[5] == op2)
1141 {
1142 *r1 = (insn[1] >> 4) & 0xf;
1143 *r3 = insn[1] & 0xf;
1144 /* i2 is a 16-bit signed quantity. */
1145 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1146 return 1;
1147 }
1148 else
1149 return 0;
1150}
1151
1152
4bc8c588
JB
1153static int
1154is_rx (bfd_byte *insn, int op,
eb1bd1fb 1155 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1156{
1157 if (insn[0] == op)
1158 {
1159 *r1 = (insn[1] >> 4) & 0xf;
1160 *x2 = insn[1] & 0xf;
1161 *b2 = (insn[2] >> 4) & 0xf;
1162 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1163 return 1;
1164 }
1165 else
1166 return 0;
1167}
1168
1169
1170static int
a8c99f38 1171is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1172 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1173{
1174 if (insn[0] == op1
4bc8c588
JB
1175 && insn[5] == op2)
1176 {
1177 *r1 = (insn[1] >> 4) & 0xf;
1178 *x2 = insn[1] & 0xf;
1179 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1180 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1181 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1182 ^ 0x80000) - 0x80000;
4bc8c588
JB
1183 return 1;
1184 }
1185 else
1186 return 0;
1187}
1188
1189
3fc46200 1190/* Prologue analysis. */
4bc8c588 1191
d0f54f9d
JB
1192#define S390_NUM_GPRS 16
1193#define S390_NUM_FPRS 16
4bc8c588 1194
a8c99f38
JB
1195struct s390_prologue_data {
1196
ee1b3323
UW
1197 /* The stack. */
1198 struct pv_area *stack;
1199
e17a4113 1200 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1201 int gpr_size;
1202 int fpr_size;
e17a4113 1203 enum bfd_endian byte_order;
a8c99f38
JB
1204
1205 /* The general-purpose registers. */
3fc46200 1206 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1207
1208 /* The floating-point registers. */
3fc46200 1209 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1210
121d8485
UW
1211 /* The offset relative to the CFA where the incoming GPR N was saved
1212 by the function prologue. 0 if not saved or unknown. */
1213 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1214
121d8485
UW
1215 /* Likewise for FPRs. */
1216 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1217
121d8485
UW
1218 /* Nonzero if the backchain was saved. This is assumed to be the
1219 case when the incoming SP is saved at the current SP location. */
1220 int back_chain_saved_p;
1221};
4bc8c588 1222
3fc46200
UW
1223/* Return the effective address for an X-style instruction, like:
1224
34201ae3 1225 L R1, D2(X2, B2)
3fc46200
UW
1226
1227 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1228 constant; the effective address is the sum of all three. If either
1229 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1230 means that r0 can't be used as either X2 or B2. */
1231static pv_t
1232s390_addr (struct s390_prologue_data *data,
1233 int d2, unsigned int x2, unsigned int b2)
1234{
1235 pv_t result;
1236
1237 result = pv_constant (d2);
1238 if (x2)
1239 result = pv_add (result, data->gpr[x2]);
1240 if (b2)
1241 result = pv_add (result, data->gpr[b2]);
1242
1243 return result;
1244}
1245
1246/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1247static void
3fc46200
UW
1248s390_store (struct s390_prologue_data *data,
1249 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1250 pv_t value)
4bc8c588 1251{
3fc46200 1252 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1253 pv_t offset;
121d8485
UW
1254
1255 /* Check whether we are storing the backchain. */
3fc46200 1256 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1257
3fc46200 1258 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1259 if (size == data->gpr_size
3fc46200 1260 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1261 {
1262 data->back_chain_saved_p = 1;
1263 return;
1264 }
1265
1266
1267 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1268 if (!pv_area_store_would_trash (data->stack, addr))
1269 pv_area_store (data->stack, addr, size, value);
4bc8c588 1270
a8c99f38 1271
121d8485
UW
1272 /* Note: If this is some store we cannot identify, you might think we
1273 should forget our cached values, as any of those might have been hit.
1274
1275 However, we make the assumption that the register save areas are only
1276 ever stored to once in any given function, and we do recognize these
1277 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1278}
4bc8c588 1279
3fc46200
UW
1280/* Do a SIZE-byte load from D2(X2,B2). */
1281static pv_t
1282s390_load (struct s390_prologue_data *data,
1283 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1284
4bc8c588 1285{
3fc46200 1286 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1287
a8c99f38
JB
1288 /* If it's a load from an in-line constant pool, then we can
1289 simulate that, under the assumption that the code isn't
1290 going to change between the time the processor actually
1291 executed it creating the current frame, and the time when
1292 we're analyzing the code to unwind past that frame. */
3fc46200 1293 if (pv_is_constant (addr))
4bc8c588 1294 {
0542c86d 1295 struct target_section *secp;
3fc46200 1296 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1297 if (secp != NULL
34201ae3 1298 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1299 secp->the_bfd_section)
34201ae3
UW
1300 & SEC_READONLY))
1301 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1302 data->byte_order));
a8c99f38 1303 }
7666f43c 1304
121d8485 1305 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1306 return pv_area_fetch (data->stack, addr, size);
1307}
121d8485 1308
ee1b3323
UW
1309/* Function for finding saved registers in a 'struct pv_area'; we pass
1310 this to pv_area_scan.
121d8485 1311
ee1b3323
UW
1312 If VALUE is a saved register, ADDR says it was saved at a constant
1313 offset from the frame base, and SIZE indicates that the whole
1314 register was saved, record its offset in the reg_offset table in
1315 PROLOGUE_UNTYPED. */
1316static void
c378eb4e
MS
1317s390_check_for_saved (void *data_untyped, pv_t addr,
1318 CORE_ADDR size, pv_t value)
ee1b3323 1319{
19ba03f4 1320 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
ee1b3323
UW
1321 int i, offset;
1322
1323 if (!pv_is_register (addr, S390_SP_REGNUM))
1324 return;
1325
1326 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1327
ee1b3323
UW
1328 /* If we are storing the original value of a register, we want to
1329 record the CFA offset. If the same register is stored multiple
1330 times, the stack slot with the highest address counts. */
34201ae3 1331
ee1b3323
UW
1332 for (i = 0; i < S390_NUM_GPRS; i++)
1333 if (size == data->gpr_size
1334 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1335 if (data->gpr_slot[i] == 0
1336 || data->gpr_slot[i] > offset)
1337 {
1338 data->gpr_slot[i] = offset;
1339 return;
1340 }
1341
1342 for (i = 0; i < S390_NUM_FPRS; i++)
1343 if (size == data->fpr_size
1344 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1345 if (data->fpr_slot[i] == 0
1346 || data->fpr_slot[i] > offset)
1347 {
1348 data->fpr_slot[i] = offset;
1349 return;
1350 }
a8c99f38 1351}
4bc8c588 1352
a8c99f38
JB
1353/* Analyze the prologue of the function starting at START_PC,
1354 continuing at most until CURRENT_PC. Initialize DATA to
1355 hold all information we find out about the state of the registers
1356 and stack slots. Return the address of the instruction after
1357 the last one that changed the SP, FP, or back chain; or zero
1358 on error. */
1359static CORE_ADDR
1360s390_analyze_prologue (struct gdbarch *gdbarch,
1361 CORE_ADDR start_pc,
1362 CORE_ADDR current_pc,
1363 struct s390_prologue_data *data)
4bc8c588 1364{
a8c99f38
JB
1365 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1366
4bc8c588 1367 /* Our return value:
a8c99f38 1368 The address of the instruction after the last one that changed
34201ae3 1369 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1370 read memory. */
1371 CORE_ADDR result = start_pc;
4bc8c588 1372
4bc8c588
JB
1373 /* The current PC for our abstract interpretation. */
1374 CORE_ADDR pc;
1375
1376 /* The address of the next instruction after that. */
1377 CORE_ADDR next_pc;
34201ae3 1378
4bc8c588
JB
1379 /* Set up everything's initial value. */
1380 {
1381 int i;
1382
55f960e1 1383 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1384
a8c99f38
JB
1385 /* For the purpose of prologue tracking, we consider the GPR size to
1386 be equal to the ABI word size, even if it is actually larger
1387 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1388 data->gpr_size = word_size;
1389 data->fpr_size = 8;
e17a4113 1390 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1391
4bc8c588 1392 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1393 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1394
1395 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1396 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1397
121d8485
UW
1398 for (i = 0; i < S390_NUM_GPRS; i++)
1399 data->gpr_slot[i] = 0;
1400
1401 for (i = 0; i < S390_NUM_FPRS; i++)
1402 data->fpr_slot[i] = 0;
4bc8c588 1403
121d8485 1404 data->back_chain_saved_p = 0;
4bc8c588
JB
1405 }
1406
a8c99f38
JB
1407 /* Start interpreting instructions, until we hit the frame's
1408 current PC or the first branch instruction. */
1409 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1410 {
4bc8c588 1411 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1412 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1413
3fc46200
UW
1414 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1415 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1416 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1417
4bc8c588 1418 /* Fields for various kinds of instructions. */
a8c99f38
JB
1419 unsigned int b2, r1, r2, x2, r3;
1420 int i2, d2;
4bc8c588 1421
121d8485 1422 /* The values of SP and FP before this instruction,
34201ae3 1423 for detecting instructions that change them. */
3fc46200 1424 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1425 /* Likewise for the flag whether the back chain was saved. */
1426 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1427
1428 /* If we got an error trying to read the instruction, report it. */
1429 if (insn_len < 0)
34201ae3
UW
1430 {
1431 result = 0;
1432 break;
1433 }
4bc8c588
JB
1434
1435 next_pc = pc + insn_len;
1436
a8c99f38
JB
1437 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1438 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1439 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1440
4bc8c588 1441
3fc46200
UW
1442 /* LHI r1, i2 --- load halfword immediate. */
1443 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1444 /* LGFI r1, i2 --- load fullword immediate. */
1445 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1446 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1447 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1448 data->gpr[r1] = pv_constant (i2);
1449
1450 /* LR r1, r2 --- load from register. */
1451 /* LGR r1, r2 --- load from register (64-bit version). */
1452 else if (is_rr (insn32, op_lr, &r1, &r2)
1453 || is_rre (insn64, op_lgr, &r1, &r2))
1454 data->gpr[r1] = data->gpr[r2];
1455
1456 /* L r1, d2(x2, b2) --- load. */
1457 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1458 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1459 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1460 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1461 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1462 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1463
1464 /* ST r1, d2(x2, b2) --- store. */
1465 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1466 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1467 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1468 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1469 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1470 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1471
1472 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1473 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1474 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1475
1476 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1477 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1478 version). */
3fc46200
UW
1479 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1480 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1481 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1482 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1483 {
1484 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1485 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1486 }
4bc8c588 1487
3fc46200
UW
1488 /* AHI r1, i2 --- add halfword immediate. */
1489 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1490 /* AFI r1, i2 --- add fullword immediate. */
1491 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1492 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1493 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1494 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1495 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1496 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1497
1498 /* ALFI r1, i2 --- add logical immediate. */
1499 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1500 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1501 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1502 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1503 (CORE_ADDR)i2 & 0xffffffff);
1504
1505 /* AR r1, r2 -- add register. */
1506 /* AGR r1, r2 -- add register (64-bit version). */
1507 else if (is_rr (insn32, op_ar, &r1, &r2)
1508 || is_rre (insn64, op_agr, &r1, &r2))
1509 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1510
1511 /* A r1, d2(x2, b2) -- add. */
1512 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1513 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1514 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1515 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1516 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1517 data->gpr[r1] = pv_add (data->gpr[r1],
1518 s390_load (data, d2, x2, b2, data->gpr_size));
1519
1520 /* SLFI r1, i2 --- subtract logical immediate. */
1521 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1522 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1523 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1524 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1525 -((CORE_ADDR)i2 & 0xffffffff));
1526
1527 /* SR r1, r2 -- subtract register. */
1528 /* SGR r1, r2 -- subtract register (64-bit version). */
1529 else if (is_rr (insn32, op_sr, &r1, &r2)
1530 || is_rre (insn64, op_sgr, &r1, &r2))
1531 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1532
1533 /* S r1, d2(x2, b2) -- subtract. */
1534 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1535 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1536 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1537 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1538 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1539 data->gpr[r1] = pv_subtract (data->gpr[r1],
1540 s390_load (data, d2, x2, b2, data->gpr_size));
1541
1542 /* LA r1, d2(x2, b2) --- load address. */
1543 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1544 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1545 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1546 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1547
1548 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1549 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1550 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1551
3fc46200 1552 /* BASR r1, 0 --- branch and save.
34201ae3 1553 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1554 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1555 && r2 == 0)
3fc46200 1556 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1557
3fc46200 1558 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1559 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1560 {
1561 data->gpr[r1] = pv_constant (next_pc);
1562 next_pc = pc + i2 * 2;
4bc8c588 1563
34201ae3
UW
1564 /* We'd better not interpret any backward branches. We'll
1565 never terminate. */
1566 if (next_pc <= pc)
1567 break;
1568 }
4bc8c588 1569
a8c99f38
JB
1570 /* Terminate search when hitting any other branch instruction. */
1571 else if (is_rr (insn, op_basr, &r1, &r2)
1572 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1573 || is_rr (insn, op_bcr, &r1, &r2)
1574 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1575 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1576 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1577 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1578 break;
1579
4bc8c588 1580 else
d4fb63e1
TT
1581 {
1582 /* An instruction we don't know how to simulate. The only
1583 safe thing to do would be to set every value we're tracking
1584 to 'unknown'. Instead, we'll be optimistic: we assume that
1585 we *can* interpret every instruction that the compiler uses
1586 to manipulate any of the data we're interested in here --
1587 then we can just ignore anything else. */
1588 }
4bc8c588
JB
1589
1590 /* Record the address after the last instruction that changed
34201ae3
UW
1591 the FP, SP, or backlink. Ignore instructions that changed
1592 them back to their original values --- those are probably
1593 restore instructions. (The back chain is never restored,
1594 just popped.) */
4bc8c588 1595 {
34201ae3
UW
1596 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1597 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1598
1599 if ((! pv_is_identical (pre_insn_sp, sp)
1600 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1601 && sp.kind != pvk_unknown)
34201ae3
UW
1602 || (! pv_is_identical (pre_insn_fp, fp)
1603 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1604 && fp.kind != pvk_unknown)
34201ae3
UW
1605 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1606 result = next_pc;
4bc8c588 1607 }
5769d3cd 1608 }
4bc8c588 1609
ee1b3323
UW
1610 /* Record where all the registers were saved. */
1611 pv_area_scan (data->stack, s390_check_for_saved, data);
1612
1613 free_pv_area (data->stack);
1614 data->stack = NULL;
1615
4bc8c588 1616 return result;
5769d3cd
AC
1617}
1618
34201ae3 1619/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1620 some "real" code. */
1621static CORE_ADDR
6093d2eb 1622s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1623{
1624 struct s390_prologue_data data;
f054145e
AA
1625 CORE_ADDR skip_pc, func_addr;
1626
1627 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1628 {
1629 CORE_ADDR post_prologue_pc
1630 = skip_prologue_using_sal (gdbarch, func_addr);
1631 if (post_prologue_pc != 0)
1632 return max (pc, post_prologue_pc);
1633 }
1634
6093d2eb 1635 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1636 return skip_pc ? skip_pc : pc;
1637}
1638
c9cf6e20 1639/* Implmement the stack_frame_destroyed_p gdbarch method. */
d0f54f9d 1640static int
c9cf6e20 1641s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
d0f54f9d
JB
1642{
1643 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1644
1645 /* In frameless functions, there's not frame to destroy and thus
1646 we don't care about the epilogue.
1647
1648 In functions with frame, the epilogue sequence is a pair of
1649 a LM-type instruction that restores (amongst others) the
1650 return register %r14 and the stack pointer %r15, followed
1651 by a branch 'br %r14' --or equivalent-- that effects the
1652 actual return.
1653
1654 In that situation, this function needs to return 'true' in
1655 exactly one case: when pc points to that branch instruction.
1656
1657 Thus we try to disassemble the one instructions immediately
177b42fe 1658 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1659 modifying the stack pointer.
1660
1661 Note that disassembling backwards is not reliable, so there
1662 is a slight chance of false positives here ... */
1663
1664 bfd_byte insn[6];
1665 unsigned int r1, r3, b2;
1666 int d2;
1667
1668 if (word_size == 4
8defab1a 1669 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1670 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1671 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1672 return 1;
1673
a8c99f38 1674 if (word_size == 4
8defab1a 1675 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1676 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1677 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1678 return 1;
1679
d0f54f9d 1680 if (word_size == 8
8defab1a 1681 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1682 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1683 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1684 return 1;
1685
1686 return 0;
1687}
5769d3cd 1688
1db4e8a0
UW
1689/* Displaced stepping. */
1690
5ac21343
PA
1691/* Return true if INSN is a non-branch RIL-b or RIL-c format
1692 instruction. */
1693
1694static int
1695is_non_branch_ril (gdb_byte *insn)
1696{
1697 gdb_byte op1 = insn[0];
1698
1699 if (op1 == 0xc4)
1700 {
1701 gdb_byte op2 = insn[1] & 0x0f;
1702
1703 switch (op2)
1704 {
1705 case 0x02: /* llhrl */
1706 case 0x04: /* lghrl */
1707 case 0x05: /* lhrl */
1708 case 0x06: /* llghrl */
1709 case 0x07: /* sthrl */
1710 case 0x08: /* lgrl */
1711 case 0x0b: /* stgrl */
1712 case 0x0c: /* lgfrl */
1713 case 0x0d: /* lrl */
1714 case 0x0e: /* llgfrl */
1715 case 0x0f: /* strl */
1716 return 1;
1717 }
1718 }
1719 else if (op1 == 0xc6)
1720 {
1721 gdb_byte op2 = insn[1] & 0x0f;
1722
1723 switch (op2)
1724 {
1725 case 0x00: /* exrl */
1726 case 0x02: /* pfdrl */
1727 case 0x04: /* cghrl */
1728 case 0x05: /* chrl */
1729 case 0x06: /* clghrl */
1730 case 0x07: /* clhrl */
1731 case 0x08: /* cgrl */
1732 case 0x0a: /* clgrl */
1733 case 0x0c: /* cgfrl */
1734 case 0x0d: /* crl */
1735 case 0x0e: /* clgfrl */
1736 case 0x0f: /* clrl */
1737 return 1;
1738 }
1739 }
1740
1741 return 0;
1742}
1743
1744/* Implementation of gdbarch_displaced_step_copy_insn. */
1745
1746static struct displaced_step_closure *
1747s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
1748 CORE_ADDR from, CORE_ADDR to,
1749 struct regcache *regs)
1750{
1751 size_t len = gdbarch_max_insn_length (gdbarch);
224c3ddb 1752 gdb_byte *buf = (gdb_byte *) xmalloc (len);
5ac21343
PA
1753 struct cleanup *old_chain = make_cleanup (xfree, buf);
1754
1755 read_memory (from, buf, len);
1756
1757 /* Adjust the displacement field of PC-relative RIL instructions,
1758 except branches. The latter are handled in the fixup hook. */
1759 if (is_non_branch_ril (buf))
1760 {
1761 LONGEST offset;
1762
1763 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
1764 offset = (from - to + offset * 2) / 2;
1765
1766 /* If the instruction is too far from the jump pad, punt. This
1767 will usually happen with instructions in shared libraries.
1768 We could probably support these by rewriting them to be
1769 absolute or fully emulating them. */
1770 if (offset < INT32_MIN || offset > INT32_MAX)
1771 {
1772 /* Let the core fall back to stepping over the breakpoint
1773 in-line. */
1774 if (debug_displaced)
1775 {
1776 fprintf_unfiltered (gdb_stdlog,
1777 "displaced: can't displaced step "
1778 "RIL instruction: offset %s out of range\n",
1779 plongest (offset));
1780 }
1781 do_cleanups (old_chain);
1782 return NULL;
1783 }
1784
1785 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
1786 }
1787
1788 write_memory (to, buf, len);
1789
1790 if (debug_displaced)
1791 {
1792 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
1793 paddress (gdbarch, from), paddress (gdbarch, to));
1794 displaced_step_dump_bytes (gdb_stdlog, buf, len);
1795 }
1796
1797 discard_cleanups (old_chain);
1798 return (struct displaced_step_closure *) buf;
1799}
1800
1db4e8a0
UW
1801/* Fix up the state of registers and memory after having single-stepped
1802 a displaced instruction. */
1803static void
1804s390_displaced_step_fixup (struct gdbarch *gdbarch,
1805 struct displaced_step_closure *closure,
1806 CORE_ADDR from, CORE_ADDR to,
1807 struct regcache *regs)
1808{
5ac21343 1809 /* Our closure is a copy of the instruction. */
1db4e8a0
UW
1810 gdb_byte *insn = (gdb_byte *) closure;
1811 static int s390_instrlen[] = { 2, 4, 4, 6 };
1812 int insnlen = s390_instrlen[insn[0] >> 6];
1813
1814 /* Fields for various kinds of instructions. */
1815 unsigned int b2, r1, r2, x2, r3;
1816 int i2, d2;
1817
1818 /* Get current PC and addressing mode bit. */
1819 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1820 ULONGEST amode = 0;
1db4e8a0
UW
1821
1822 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1823 {
1824 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1825 amode &= 0x80000000;
1826 }
1827
1828 if (debug_displaced)
1829 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1830 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1831 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1832 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1833
1834 /* Handle absolute branch and save instructions. */
1835 if (is_rr (insn, op_basr, &r1, &r2)
1836 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1837 {
1838 /* Recompute saved return address in R1. */
1839 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1840 amode | (from + insnlen));
1841 }
1842
1843 /* Handle absolute branch instructions. */
1844 else if (is_rr (insn, op_bcr, &r1, &r2)
1845 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1846 || is_rr (insn, op_bctr, &r1, &r2)
1847 || is_rre (insn, op_bctgr, &r1, &r2)
1848 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1849 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1850 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1851 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1852 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1853 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1854 {
1855 /* Update PC iff branch was *not* taken. */
1856 if (pc == to + insnlen)
1857 regcache_write_pc (regs, from + insnlen);
1858 }
1859
1860 /* Handle PC-relative branch and save instructions. */
1861 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1862 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1863 {
1864 /* Update PC. */
1865 regcache_write_pc (regs, pc - to + from);
1866 /* Recompute saved return address in R1. */
1867 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1868 amode | (from + insnlen));
1869 }
1870
1871 /* Handle PC-relative branch instructions. */
1872 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1873 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1874 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1875 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1876 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1877 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1878 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1879 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1880 {
1881 /* Update PC. */
1882 regcache_write_pc (regs, pc - to + from);
1883 }
1884
1885 /* Handle LOAD ADDRESS RELATIVE LONG. */
1886 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1887 {
0161e4b9
UW
1888 /* Update PC. */
1889 regcache_write_pc (regs, from + insnlen);
34201ae3 1890 /* Recompute output address in R1. */
1db4e8a0 1891 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1892 amode | (from + i2 * 2));
1db4e8a0
UW
1893 }
1894
1895 /* If we executed a breakpoint instruction, point PC right back at it. */
1896 else if (insn[0] == 0x0 && insn[1] == 0x1)
1897 regcache_write_pc (regs, from);
1898
1899 /* For any other insn, PC points right after the original instruction. */
1900 else
1901 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1902
1903 if (debug_displaced)
1904 fprintf_unfiltered (gdb_stdlog,
1905 "displaced: (s390) pc is now %s\n",
1906 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1907}
a8c99f38 1908
d6db1fab
UW
1909
1910/* Helper routine to unwind pseudo registers. */
1911
1912static struct value *
1913s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1914{
1915 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1916 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1917 struct type *type = register_type (gdbarch, regnum);
1918
1919 /* Unwind PC via PSW address. */
1920 if (regnum == tdep->pc_regnum)
1921 {
1922 struct value *val;
1923
1924 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1925 if (!value_optimized_out (val))
1926 {
1927 LONGEST pswa = value_as_long (val);
1928
1929 if (TYPE_LENGTH (type) == 4)
1930 return value_from_pointer (type, pswa & 0x7fffffff);
1931 else
1932 return value_from_pointer (type, pswa);
1933 }
1934 }
1935
1936 /* Unwind CC via PSW mask. */
1937 if (regnum == tdep->cc_regnum)
1938 {
1939 struct value *val;
1940
1941 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1942 if (!value_optimized_out (val))
1943 {
1944 LONGEST pswm = value_as_long (val);
1945
1946 if (TYPE_LENGTH (type) == 4)
1947 return value_from_longest (type, (pswm >> 12) & 3);
1948 else
1949 return value_from_longest (type, (pswm >> 44) & 3);
1950 }
1951 }
1952
1953 /* Unwind full GPRs to show at least the lower halves (as the
1954 upper halves are undefined). */
2ccd1468 1955 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1956 {
1957 int reg = regnum - tdep->gpr_full_regnum;
1958 struct value *val;
1959
1960 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1961 if (!value_optimized_out (val))
1962 return value_cast (type, val);
1963 }
1964
1965 return allocate_optimized_out_value (type);
1966}
1967
1968static struct value *
1969s390_trad_frame_prev_register (struct frame_info *this_frame,
1970 struct trad_frame_saved_reg saved_regs[],
1971 int regnum)
1972{
1973 if (regnum < S390_NUM_REGS)
1974 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1975 else
1976 return s390_unwind_pseudo_register (this_frame, regnum);
1977}
1978
1979
a8c99f38
JB
1980/* Normal stack frames. */
1981
1982struct s390_unwind_cache {
1983
1984 CORE_ADDR func;
1985 CORE_ADDR frame_base;
1986 CORE_ADDR local_base;
1987
1988 struct trad_frame_saved_reg *saved_regs;
1989};
1990
a78f21af 1991static int
f089c433 1992s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1993 struct s390_unwind_cache *info)
5769d3cd 1994{
f089c433 1995 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1996 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1997 struct s390_prologue_data data;
3fc46200
UW
1998 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1999 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
2000 int i;
2001 CORE_ADDR cfa;
a8c99f38
JB
2002 CORE_ADDR func;
2003 CORE_ADDR result;
2004 ULONGEST reg;
2005 CORE_ADDR prev_sp;
2006 int frame_pointer;
2007 int size;
edb3359d 2008 struct frame_info *next_frame;
a8c99f38
JB
2009
2010 /* Try to find the function start address. If we can't find it, we don't
2011 bother searching for it -- with modern compilers this would be mostly
2012 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2013 or else a valid backchain ... */
f089c433 2014 func = get_frame_func (this_frame);
a8c99f38
JB
2015 if (!func)
2016 return 0;
5769d3cd 2017
a8c99f38
JB
2018 /* Try to analyze the prologue. */
2019 result = s390_analyze_prologue (gdbarch, func,
f089c433 2020 get_frame_pc (this_frame), &data);
a8c99f38 2021 if (!result)
5769d3cd 2022 return 0;
5769d3cd 2023
a8c99f38 2024 /* If this was successful, we should have found the instruction that
34201ae3 2025 sets the stack pointer register to the previous value of the stack
a8c99f38 2026 pointer minus the frame size. */
3fc46200 2027 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 2028 return 0;
a8c99f38 2029
34201ae3 2030 /* A frame size of zero at this point can mean either a real
a8c99f38 2031 frameless function, or else a failure to find the prologue.
34201ae3 2032 Perform some sanity checks to verify we really have a
a8c99f38
JB
2033 frameless function. */
2034 if (sp->k == 0)
5769d3cd 2035 {
34201ae3
UW
2036 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2037 size zero. This is only possible if the next frame is a sentinel
a8c99f38 2038 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
2039 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2040 needed, instead the code should simpliy rely on its
2041 analysis. */
edb3359d
DJ
2042 next_frame = get_next_frame (this_frame);
2043 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2044 next_frame = get_next_frame (next_frame);
2045 if (next_frame
f089c433 2046 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 2047 return 0;
5769d3cd 2048
a8c99f38
JB
2049 /* If we really have a frameless function, %r14 must be valid
2050 -- in particular, it must point to a different function. */
f089c433 2051 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
2052 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2053 if (get_pc_function_start (reg) == func)
5769d3cd 2054 {
a8c99f38
JB
2055 /* However, there is one case where it *is* valid for %r14
2056 to point to the same function -- if this is a recursive
2057 call, and we have stopped in the prologue *before* the
2058 stack frame was allocated.
2059
2060 Recognize this case by looking ahead a bit ... */
5769d3cd 2061
a8c99f38 2062 struct s390_prologue_data data2;
3fc46200 2063 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
2064
2065 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
2066 && pv_is_register (*sp, S390_SP_REGNUM)
2067 && sp->k != 0))
a8c99f38 2068 return 0;
5769d3cd 2069 }
5769d3cd 2070 }
5769d3cd
AC
2071
2072
a8c99f38
JB
2073 /* OK, we've found valid prologue data. */
2074 size = -sp->k;
5769d3cd 2075
a8c99f38
JB
2076 /* If the frame pointer originally also holds the same value
2077 as the stack pointer, we're probably using it. If it holds
2078 some other value -- even a constant offset -- it is most
2079 likely used as temp register. */
3fc46200 2080 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
2081 frame_pointer = S390_FRAME_REGNUM;
2082 else
2083 frame_pointer = S390_SP_REGNUM;
2084
34201ae3
UW
2085 /* If we've detected a function with stack frame, we'll still have to
2086 treat it as frameless if we're currently within the function epilog
c378eb4e 2087 code at a point where the frame pointer has already been restored.
a8c99f38 2088 This can only happen in an innermost frame. */
0e100dab
AC
2089 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2090 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
2091 next_frame = get_next_frame (this_frame);
2092 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2093 next_frame = get_next_frame (next_frame);
f089c433 2094 if (size > 0
edb3359d 2095 && (next_frame == NULL
f089c433 2096 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 2097 {
c9cf6e20 2098 /* See the comment in s390_stack_frame_destroyed_p on why this is
a8c99f38 2099 not completely reliable ... */
c9cf6e20 2100 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 2101 {
a8c99f38
JB
2102 memset (&data, 0, sizeof (data));
2103 size = 0;
2104 frame_pointer = S390_SP_REGNUM;
5769d3cd 2105 }
5769d3cd 2106 }
5769d3cd 2107
a8c99f38
JB
2108 /* Once we know the frame register and the frame size, we can unwind
2109 the current value of the frame register from the next frame, and
34201ae3 2110 add back the frame size to arrive that the previous frame's
a8c99f38 2111 stack pointer value. */
f089c433 2112 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 2113 cfa = prev_sp + 16*word_size + 32;
5769d3cd 2114
7803799a
UW
2115 /* Set up ABI call-saved/call-clobbered registers. */
2116 for (i = 0; i < S390_NUM_REGS; i++)
2117 if (!s390_register_call_saved (gdbarch, i))
2118 trad_frame_set_unknown (info->saved_regs, i);
2119
2120 /* CC is always call-clobbered. */
d6db1fab 2121 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 2122
121d8485
UW
2123 /* Record the addresses of all register spill slots the prologue parser
2124 has recognized. Consider only registers defined as call-saved by the
2125 ABI; for call-clobbered registers the parser may have recognized
2126 spurious stores. */
5769d3cd 2127
7803799a
UW
2128 for (i = 0; i < 16; i++)
2129 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2130 && data.gpr_slot[i] != 0)
121d8485 2131 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 2132
7803799a
UW
2133 for (i = 0; i < 16; i++)
2134 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2135 && data.fpr_slot[i] != 0)
2136 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
2137
2138 /* Function return will set PC to %r14. */
d6db1fab 2139 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2140
2141 /* In frameless functions, we unwind simply by moving the return
2142 address to the PC. However, if we actually stored to the
2143 save area, use that -- we might only think the function frameless
2144 because we're in the middle of the prologue ... */
2145 if (size == 0
d6db1fab 2146 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2147 {
d6db1fab 2148 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 2149 }
a8c99f38
JB
2150
2151 /* Another sanity check: unless this is a frameless function,
2152 we should have found spill slots for SP and PC.
2153 If not, we cannot unwind further -- this happens e.g. in
2154 libc's thread_start routine. */
2155 if (size > 0)
5769d3cd 2156 {
a8c99f38 2157 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 2158 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2159 prev_sp = -1;
5769d3cd 2160 }
a8c99f38
JB
2161
2162 /* We use the current value of the frame register as local_base,
2163 and the top of the register save area as frame_base. */
2164 if (prev_sp != -1)
2165 {
2166 info->frame_base = prev_sp + 16*word_size + 32;
2167 info->local_base = prev_sp - size;
2168 }
2169
2170 info->func = func;
2171 return 1;
5769d3cd
AC
2172}
2173
a78f21af 2174static void
f089c433 2175s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2176 struct s390_unwind_cache *info)
5769d3cd 2177{
f089c433 2178 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2179 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2180 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2181 CORE_ADDR backchain;
2182 ULONGEST reg;
2183 LONGEST sp;
7803799a
UW
2184 int i;
2185
2186 /* Set up ABI call-saved/call-clobbered registers. */
2187 for (i = 0; i < S390_NUM_REGS; i++)
2188 if (!s390_register_call_saved (gdbarch, i))
2189 trad_frame_set_unknown (info->saved_regs, i);
2190
2191 /* CC is always call-clobbered. */
d6db1fab 2192 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2193
2194 /* Get the backchain. */
f089c433 2195 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 2196 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
2197
2198 /* A zero backchain terminates the frame chain. As additional
2199 sanity check, let's verify that the spill slot for SP in the
2200 save area pointed to by the backchain in fact links back to
2201 the save area. */
2202 if (backchain != 0
e17a4113
UW
2203 && safe_read_memory_integer (backchain + 15*word_size,
2204 word_size, byte_order, &sp)
a8c99f38
JB
2205 && (CORE_ADDR)sp == backchain)
2206 {
2207 /* We don't know which registers were saved, but it will have
34201ae3
UW
2208 to be at least %r14 and %r15. This will allow us to continue
2209 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
2210 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2211 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2212
2213 /* Function return will set PC to %r14. */
d6db1fab 2214 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2215 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2216
2217 /* We use the current value of the frame register as local_base,
34201ae3 2218 and the top of the register save area as frame_base. */
a8c99f38
JB
2219 info->frame_base = backchain + 16*word_size + 32;
2220 info->local_base = reg;
2221 }
2222
f089c433 2223 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2224}
2225
a8c99f38 2226static struct s390_unwind_cache *
f089c433 2227s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2228 void **this_prologue_cache)
2229{
2230 struct s390_unwind_cache *info;
62261490 2231
a8c99f38 2232 if (*this_prologue_cache)
19ba03f4 2233 return (struct s390_unwind_cache *) *this_prologue_cache;
a8c99f38
JB
2234
2235 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2236 *this_prologue_cache = info;
f089c433 2237 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2238 info->func = -1;
2239 info->frame_base = -1;
2240 info->local_base = -1;
2241
492d29ea 2242 TRY
62261490
PA
2243 {
2244 /* Try to use prologue analysis to fill the unwind cache.
2245 If this fails, fall back to reading the stack backchain. */
2246 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2247 s390_backchain_frame_unwind_cache (this_frame, info);
2248 }
492d29ea 2249 CATCH (ex, RETURN_MASK_ERROR)
7556d4a4
PA
2250 {
2251 if (ex.error != NOT_AVAILABLE_ERROR)
2252 throw_exception (ex);
2253 }
492d29ea 2254 END_CATCH
a8c99f38
JB
2255
2256 return info;
2257}
5769d3cd 2258
a78f21af 2259static void
f089c433 2260s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2261 void **this_prologue_cache,
2262 struct frame_id *this_id)
5769d3cd 2263{
a8c99f38 2264 struct s390_unwind_cache *info
f089c433 2265 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2266
a8c99f38
JB
2267 if (info->frame_base == -1)
2268 return;
5769d3cd 2269
a8c99f38 2270 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2271}
2272
f089c433
UW
2273static struct value *
2274s390_frame_prev_register (struct frame_info *this_frame,
2275 void **this_prologue_cache, int regnum)
a8c99f38 2276{
7803799a 2277 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2278 struct s390_unwind_cache *info
f089c433 2279 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2280
d6db1fab 2281 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2282}
2283
2284static const struct frame_unwind s390_frame_unwind = {
2285 NORMAL_FRAME,
8fbca658 2286 default_frame_unwind_stop_reason,
a8c99f38 2287 s390_frame_this_id,
f089c433
UW
2288 s390_frame_prev_register,
2289 NULL,
2290 default_frame_sniffer
a8c99f38
JB
2291};
2292
5769d3cd 2293
8e645ae7
AC
2294/* Code stubs and their stack frames. For things like PLTs and NULL
2295 function calls (where there is no true frame and the return address
2296 is in the RETADDR register). */
a8c99f38 2297
8e645ae7
AC
2298struct s390_stub_unwind_cache
2299{
a8c99f38
JB
2300 CORE_ADDR frame_base;
2301 struct trad_frame_saved_reg *saved_regs;
2302};
2303
8e645ae7 2304static struct s390_stub_unwind_cache *
f089c433 2305s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2306 void **this_prologue_cache)
5769d3cd 2307{
f089c433 2308 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2309 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2310 struct s390_stub_unwind_cache *info;
a8c99f38 2311 ULONGEST reg;
5c3cf190 2312
a8c99f38 2313 if (*this_prologue_cache)
19ba03f4 2314 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
5c3cf190 2315
8e645ae7 2316 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2317 *this_prologue_cache = info;
f089c433 2318 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2319
2320 /* The return address is in register %r14. */
d6db1fab 2321 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2322
2323 /* Retrieve stack pointer and determine our frame base. */
f089c433 2324 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2325 info->frame_base = reg + 16*word_size + 32;
2326
2327 return info;
5769d3cd
AC
2328}
2329
a8c99f38 2330static void
f089c433 2331s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2332 void **this_prologue_cache,
2333 struct frame_id *this_id)
5769d3cd 2334{
8e645ae7 2335 struct s390_stub_unwind_cache *info
f089c433
UW
2336 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2337 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2338}
5769d3cd 2339
f089c433
UW
2340static struct value *
2341s390_stub_frame_prev_register (struct frame_info *this_frame,
2342 void **this_prologue_cache, int regnum)
8e645ae7
AC
2343{
2344 struct s390_stub_unwind_cache *info
f089c433 2345 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2346 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2347}
2348
f089c433
UW
2349static int
2350s390_stub_frame_sniffer (const struct frame_unwind *self,
2351 struct frame_info *this_frame,
2352 void **this_prologue_cache)
a8c99f38 2353{
93d42b30 2354 CORE_ADDR addr_in_block;
8e645ae7
AC
2355 bfd_byte insn[S390_MAX_INSTR_SIZE];
2356
2357 /* If the current PC points to non-readable memory, we assume we
2358 have trapped due to an invalid function pointer call. We handle
2359 the non-existing current function like a PLT stub. */
f089c433 2360 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2361 if (in_plt_section (addr_in_block)
f089c433
UW
2362 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2363 return 1;
2364 return 0;
a8c99f38 2365}
5769d3cd 2366
f089c433
UW
2367static const struct frame_unwind s390_stub_frame_unwind = {
2368 NORMAL_FRAME,
8fbca658 2369 default_frame_unwind_stop_reason,
f089c433
UW
2370 s390_stub_frame_this_id,
2371 s390_stub_frame_prev_register,
2372 NULL,
2373 s390_stub_frame_sniffer
2374};
2375
5769d3cd 2376
a8c99f38 2377/* Signal trampoline stack frames. */
5769d3cd 2378
a8c99f38
JB
2379struct s390_sigtramp_unwind_cache {
2380 CORE_ADDR frame_base;
2381 struct trad_frame_saved_reg *saved_regs;
2382};
5769d3cd 2383
a8c99f38 2384static struct s390_sigtramp_unwind_cache *
f089c433 2385s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2386 void **this_prologue_cache)
5769d3cd 2387{
f089c433 2388 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2389 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2390 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2391 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2392 struct s390_sigtramp_unwind_cache *info;
2393 ULONGEST this_sp, prev_sp;
7803799a 2394 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2395 int i;
2396
2397 if (*this_prologue_cache)
19ba03f4 2398 return (struct s390_sigtramp_unwind_cache *) *this_prologue_cache;
5769d3cd 2399
a8c99f38
JB
2400 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2401 *this_prologue_cache = info;
f089c433 2402 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2403
f089c433
UW
2404 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2405 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2406 next_cfa = this_sp + 16*word_size + 32;
2407
2408 /* New-style RT frame:
2409 retcode + alignment (8 bytes)
2410 siginfo (128 bytes)
c378eb4e 2411 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2412 if (next_ra == next_cfa)
2413 {
f0f63663 2414 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2415 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2416 upper GPR halves if present. */
2417 sigreg_high_off = 8;
a8c99f38
JB
2418 }
2419
2420 /* Old-style RT frame and all non-RT frames:
2421 old signal mask (8 bytes)
c378eb4e 2422 pointer to sigregs. */
5769d3cd
AC
2423 else
2424 {
e17a4113
UW
2425 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2426 word_size, byte_order);
7803799a
UW
2427 /* sigregs are followed by signo (4 bytes), then by the
2428 upper GPR halves if present. */
2429 sigreg_high_off = 4;
a8c99f38 2430 }
5769d3cd 2431
a8c99f38 2432 /* The sigregs structure looks like this:
34201ae3
UW
2433 long psw_mask;
2434 long psw_addr;
2435 long gprs[16];
2436 int acrs[16];
2437 int fpc;
2438 int __pad;
2439 double fprs[16]; */
5769d3cd 2440
7803799a
UW
2441 /* PSW mask and address. */
2442 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2443 sigreg_ptr += word_size;
7803799a 2444 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2445 sigreg_ptr += word_size;
2446
2447 /* Then the GPRs. */
2448 for (i = 0; i < 16; i++)
2449 {
2450 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2451 sigreg_ptr += word_size;
2452 }
2453
2454 /* Then the ACRs. */
2455 for (i = 0; i < 16; i++)
2456 {
2457 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2458 sigreg_ptr += 4;
5769d3cd 2459 }
5769d3cd 2460
a8c99f38
JB
2461 /* The floating-point control word. */
2462 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2463 sigreg_ptr += 8;
5769d3cd 2464
a8c99f38
JB
2465 /* And finally the FPRs. */
2466 for (i = 0; i < 16; i++)
2467 {
2468 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2469 sigreg_ptr += 8;
2470 }
2471
7803799a
UW
2472 /* If we have them, the GPR upper halves are appended at the end. */
2473 sigreg_ptr += sigreg_high_off;
2474 if (tdep->gpr_full_regnum != -1)
2475 for (i = 0; i < 16; i++)
2476 {
34201ae3 2477 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2478 sigreg_ptr += 4;
2479 }
2480
a8c99f38
JB
2481 /* Restore the previous frame's SP. */
2482 prev_sp = read_memory_unsigned_integer (
2483 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2484 word_size, byte_order);
5769d3cd 2485
a8c99f38
JB
2486 /* Determine our frame base. */
2487 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2488
a8c99f38 2489 return info;
5769d3cd
AC
2490}
2491
a8c99f38 2492static void
f089c433 2493s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2494 void **this_prologue_cache,
2495 struct frame_id *this_id)
5769d3cd 2496{
a8c99f38 2497 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2498 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2499 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2500}
2501
f089c433
UW
2502static struct value *
2503s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2504 void **this_prologue_cache, int regnum)
a8c99f38
JB
2505{
2506 struct s390_sigtramp_unwind_cache *info
f089c433 2507 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2508 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2509}
2510
f089c433
UW
2511static int
2512s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2513 struct frame_info *this_frame,
2514 void **this_prologue_cache)
5769d3cd 2515{
f089c433 2516 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2517 bfd_byte sigreturn[2];
4c8287ac 2518
8defab1a 2519 if (target_read_memory (pc, sigreturn, 2))
f089c433 2520 return 0;
4c8287ac 2521
237b092b 2522 if (sigreturn[0] != op_svc)
f089c433 2523 return 0;
5769d3cd 2524
a8c99f38
JB
2525 if (sigreturn[1] != 119 /* sigreturn */
2526 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2527 return 0;
34201ae3 2528
f089c433 2529 return 1;
5769d3cd
AC
2530}
2531
f089c433
UW
2532static const struct frame_unwind s390_sigtramp_frame_unwind = {
2533 SIGTRAMP_FRAME,
8fbca658 2534 default_frame_unwind_stop_reason,
f089c433
UW
2535 s390_sigtramp_frame_this_id,
2536 s390_sigtramp_frame_prev_register,
2537 NULL,
2538 s390_sigtramp_frame_sniffer
2539};
2540
237b092b
AA
2541/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2542 upon error. */
2543
2544static LONGEST
2545s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2546 ptid_t ptid)
2547{
2548 struct regcache *regs = get_thread_regcache (ptid);
2549 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2550 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2551 ULONGEST pc;
2552 ULONGEST svc_number = -1;
2553 unsigned opcode;
2554
2555 /* Assume that the PC points after the 2-byte SVC instruction. We
2556 don't currently support SVC via EXECUTE. */
2557 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2558 pc -= 2;
2559 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2560 if (opcode != op_svc)
2561 return -1;
2562
2563 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2564 byte_order);
2565 if (svc_number == 0)
2566 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2567
2568 return svc_number;
2569}
2570
566c56c9
MK
2571/* Process record-replay */
2572
2573static struct linux_record_tdep s390_linux_record_tdep;
2574static struct linux_record_tdep s390x_linux_record_tdep;
2575
2576/* Record all registers but PC register for process-record. */
2577
2578static int
2579s390_all_but_pc_registers_record (struct regcache *regcache)
2580{
2581 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2582 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2583 int i;
2584
2585 for (i = 0; i < 16; i++)
2586 {
2587 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2588 return -1;
2589 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
2590 return -1;
2591 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2592 return -1;
2593 if (tdep->gpr_full_regnum != -1)
2594 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2595 return -1;
2596 if (tdep->v0_full_regnum != -1)
2597 {
2598 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2599 return -1;
2600 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i))
2601 return -1;
2602 }
2603 }
2604 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2605 return -1;
2606 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2607 return -1;
2608
2609 return 0;
2610}
2611
2612static enum gdb_syscall
2613s390_canonicalize_syscall (int syscall, enum s390_abi_kind abi)
2614{
2615 switch (syscall)
2616 {
2617 /* s390 syscall numbers < 222 are mostly the same as x86, so just list
2618 the exceptions. */
2619 case 0:
2620 return gdb_sys_no_syscall;
2621 case 7:
2622 return gdb_sys_restart_syscall;
2623 /* These syscalls work only on 31-bit. */
2624 case 13: /* time */
2625 case 16: /* lchown[16] */
2626 case 23: /* setuid[16] */
2627 case 24: /* getuid[16] */
2628 case 25: /* stime */
2629 case 46: /* setgid[16] */
2630 case 47: /* getgid[16] */
2631 case 49: /* seteuid[16] */
2632 case 50: /* getegid[16] */
2633 case 70: /* setreuid[16] */
2634 case 71: /* setregid[16] */
2635 case 76: /* [old_]getrlimit */
2636 case 80: /* getgroups[16] */
2637 case 81: /* setgroups[16] */
2638 case 95: /* fchown[16] */
2639 case 101: /* ioperm */
2640 case 138: /* setfsuid[16] */
2641 case 139: /* setfsgid[16] */
2642 case 140: /* _llseek */
2643 case 164: /* setresuid[16] */
2644 case 165: /* getresuid[16] */
2645 case 170: /* setresgid[16] */
2646 case 171: /* getresgid[16] */
2647 case 182: /* chown[16] */
2648 case 192: /* mmap2 */
2649 case 193: /* truncate64 */
2650 case 194: /* ftruncate64 */
2651 case 195: /* stat64 */
2652 case 196: /* lstat64 */
2653 case 197: /* fstat64 */
2654 case 221: /* fcntl64 */
2655 if (abi == ABI_LINUX_S390)
4d193179 2656 return (enum gdb_syscall) syscall;
566c56c9
MK
2657 return gdb_sys_no_syscall;
2658 /* These syscalls don't exist on s390. */
2659 case 17: /* break */
2660 case 18: /* oldstat */
2661 case 28: /* oldfstat */
2662 case 31: /* stty */
2663 case 32: /* gtty */
2664 case 35: /* ftime */
2665 case 44: /* prof */
2666 case 53: /* lock */
2667 case 56: /* mpx */
2668 case 58: /* ulimit */
2669 case 59: /* oldolduname */
2670 case 68: /* sgetmask */
2671 case 69: /* ssetmask */
2672 case 82: /* [old_]select */
2673 case 84: /* oldlstat */
2674 case 98: /* profil */
2675 case 109: /* olduname */
2676 case 113: /* vm86old */
2677 case 123: /* modify_ldt */
2678 case 166: /* vm86 */
2679 return gdb_sys_no_syscall;
2680 case 110:
2681 return gdb_sys_lookup_dcookie;
2682 /* Here come the differences. */
2683 case 222:
2684 return gdb_sys_readahead;
2685 case 223:
2686 if (abi == ABI_LINUX_S390)
2687 return gdb_sys_sendfile64;
2688 return gdb_sys_no_syscall;
2689 /* 224-235 handled below */
2690 case 236:
2691 return gdb_sys_gettid;
2692 case 237:
2693 return gdb_sys_tkill;
2694 case 238:
2695 return gdb_sys_futex;
2696 case 239:
2697 return gdb_sys_sched_setaffinity;
2698 case 240:
2699 return gdb_sys_sched_getaffinity;
2700 case 241:
2701 return gdb_sys_tgkill;
2702 /* 242 reserved */
2703 case 243:
2704 return gdb_sys_io_setup;
2705 case 244:
2706 return gdb_sys_io_destroy;
2707 case 245:
2708 return gdb_sys_io_getevents;
2709 case 246:
2710 return gdb_sys_io_submit;
2711 case 247:
2712 return gdb_sys_io_cancel;
2713 case 248:
2714 return gdb_sys_exit_group;
2715 case 249:
2716 return gdb_sys_epoll_create;
2717 case 250:
2718 return gdb_sys_epoll_ctl;
2719 case 251:
2720 return gdb_sys_epoll_wait;
2721 case 252:
2722 return gdb_sys_set_tid_address;
2723 case 253:
2724 return gdb_sys_fadvise64;
2725 /* 254-262 handled below */
2726 /* 263 reserved */
2727 case 264:
2728 if (abi == ABI_LINUX_S390)
2729 return gdb_sys_fadvise64_64;
2730 return gdb_sys_no_syscall;
2731 case 265:
2732 return gdb_sys_statfs64;
2733 case 266:
2734 return gdb_sys_fstatfs64;
2735 case 267:
2736 return gdb_sys_remap_file_pages;
2737 /* 268-270 reserved */
2738 /* 271-277 handled below */
2739 case 278:
2740 return gdb_sys_add_key;
2741 case 279:
2742 return gdb_sys_request_key;
2743 case 280:
2744 return gdb_sys_keyctl;
2745 case 281:
2746 return gdb_sys_waitid;
2747 /* 282-312 handled below */
2748 case 293:
2749 if (abi == ABI_LINUX_S390)
2750 return gdb_sys_fstatat64;
2751 return gdb_sys_newfstatat;
2752 /* 313+ not yet supported */
2753 default:
4d193179
SM
2754 {
2755 int ret;
2756
2757 /* Most "old" syscalls copied from i386. */
2758 if (syscall <= 221)
2759 ret = syscall;
2760 /* xattr syscalls. */
2761 else if (syscall >= 224 && syscall <= 235)
2762 ret = syscall + 2;
2763 /* timer syscalls. */
2764 else if (syscall >= 254 && syscall <= 262)
2765 ret = syscall + 5;
2766 /* mq_* and kexec_load */
2767 else if (syscall >= 271 && syscall <= 277)
2768 ret = syscall + 6;
2769 /* ioprio_set .. epoll_pwait */
2770 else if (syscall >= 282 && syscall <= 312)
2771 ret = syscall + 7;
2772 else
2773 ret = gdb_sys_no_syscall;
2774
2775 return (enum gdb_syscall) ret;
2776 }
566c56c9
MK
2777 }
2778}
2779
2780static int
2781s390_linux_syscall_record (struct regcache *regcache, LONGEST syscall_native)
2782{
2783 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2784 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2785 int ret;
2786 enum gdb_syscall syscall_gdb;
2787
2788 /* On s390, syscall number can be passed either as immediate field of svc
2789 instruction, or in %r1 (with svc 0). */
2790 if (syscall_native == 0)
2791 regcache_raw_read_signed (regcache, S390_R1_REGNUM, &syscall_native);
2792
2793 syscall_gdb = s390_canonicalize_syscall (syscall_native, tdep->abi);
2794
2795 if (syscall_gdb < 0)
2796 {
2797 printf_unfiltered (_("Process record and replay target doesn't "
2798 "support syscall number %s\n"),
2799 plongest (syscall_native));
2800 return -1;
2801 }
2802
2803 if (syscall_gdb == gdb_sys_sigreturn
2804 || syscall_gdb == gdb_sys_rt_sigreturn)
2805 {
2806 if (s390_all_but_pc_registers_record (regcache))
2807 return -1;
2808 return 0;
2809 }
2810
2811 if (tdep->abi == ABI_LINUX_ZSERIES)
2812 ret = record_linux_system_call (syscall_gdb, regcache,
2813 &s390x_linux_record_tdep);
2814 else
2815 ret = record_linux_system_call (syscall_gdb, regcache,
2816 &s390_linux_record_tdep);
2817
2818 if (ret)
2819 return ret;
2820
2821 /* Record the return value of the system call. */
2822 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
2823 return -1;
2824
2825 return 0;
2826}
2827
2828static int
2829s390_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache,
2830 enum gdb_signal signal)
2831{
2832 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2833 /* There are two kinds of signal frames on s390. rt_sigframe is always
2834 the larger one, so don't even bother with sigframe. */
2835 const int sizeof_rt_sigframe = (tdep->abi == ABI_LINUX_ZSERIES ?
2836 160 + 8 + 128 + 1024 : 96 + 8 + 128 + 1000);
2837 ULONGEST sp;
2838 int i;
2839
2840 for (i = 0; i < 16; i++)
2841 {
2842 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2843 return -1;
2844 if (tdep->gpr_full_regnum != -1)
2845 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2846 return -1;
2847 }
2848 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
2849 return -1;
2850 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2851 return -1;
2852
2853 /* Record the change in the stack.
2854 frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */
2855 regcache_raw_read_unsigned (regcache, S390_SP_REGNUM, &sp);
2856 sp -= sizeof_rt_sigframe;
2857
2858 if (record_full_arch_list_add_mem (sp, sizeof_rt_sigframe))
2859 return -1;
2860
2861 if (record_full_arch_list_add_end ())
2862 return -1;
2863
2864 return 0;
2865}
4c8287ac 2866
a8c99f38
JB
2867/* Frame base handling. */
2868
2869static CORE_ADDR
f089c433 2870s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2871{
a8c99f38 2872 struct s390_unwind_cache *info
f089c433 2873 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2874 return info->frame_base;
2875}
2876
2877static CORE_ADDR
f089c433 2878s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2879{
2880 struct s390_unwind_cache *info
f089c433 2881 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2882 return info->local_base;
2883}
2884
2885static const struct frame_base s390_frame_base = {
2886 &s390_frame_unwind,
2887 s390_frame_base_address,
2888 s390_local_base_address,
2889 s390_local_base_address
2890};
2891
2892static CORE_ADDR
2893s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2894{
7803799a 2895 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2896 ULONGEST pc;
7803799a 2897 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2898 return gdbarch_addr_bits_remove (gdbarch, pc);
2899}
2900
2901static CORE_ADDR
2902s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2903{
2904 ULONGEST sp;
2905 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2906 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2907}
2908
2909
a431654a
AC
2910/* DWARF-2 frame support. */
2911
7803799a
UW
2912static struct value *
2913s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2914 int regnum)
2915{
d6db1fab 2916 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2917}
2918
a431654a
AC
2919static void
2920s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2921 struct dwarf2_frame_state_reg *reg,
4a4e5149 2922 struct frame_info *this_frame)
a431654a
AC
2923{
2924 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2925
d6db1fab
UW
2926 /* The condition code (and thus PSW mask) is call-clobbered. */
2927 if (regnum == S390_PSWM_REGNUM)
2928 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2929
2930 /* The PSW address unwinds to the return address. */
2931 else if (regnum == S390_PSWA_REGNUM)
2932 reg->how = DWARF2_FRAME_REG_RA;
2933
7803799a
UW
2934 /* Fixed registers are call-saved or call-clobbered
2935 depending on the ABI in use. */
d6db1fab 2936 else if (regnum < S390_NUM_REGS)
a431654a 2937 {
7803799a 2938 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2939 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2940 else
a431654a 2941 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2942 }
a431654a 2943
d6db1fab
UW
2944 /* We install a special function to unwind pseudos. */
2945 else
7803799a
UW
2946 {
2947 reg->how = DWARF2_FRAME_REG_FN;
2948 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2949 }
2950}
2951
2952
b0cf273e
JB
2953/* Dummy function calls. */
2954
80f75320
AA
2955/* Unwrap any single-field structs in TYPE and return the effective
2956 "inner" type. E.g., yield "float" for all these cases:
20a940cc 2957
80f75320
AA
2958 float x;
2959 struct { float x };
2960 struct { struct { float x; } x; };
417c80f9
AA
2961 struct { struct { struct { float x; } x; } x; };
2962
2963 However, if an inner type is smaller than MIN_SIZE, abort the
2964 unwrapping. */
20a940cc 2965
80f75320 2966static struct type *
417c80f9 2967s390_effective_inner_type (struct type *type, unsigned int min_size)
20a940cc 2968{
80f75320
AA
2969 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
2970 && TYPE_NFIELDS (type) == 1)
417c80f9
AA
2971 {
2972 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
2973
2974 if (TYPE_LENGTH (inner) < min_size)
2975 break;
2976 type = inner;
2977 }
2978
80f75320 2979 return type;
20a940cc
JB
2980}
2981
80f75320
AA
2982/* Return non-zero if TYPE should be passed like "float" or
2983 "double". */
20a940cc 2984
20a940cc 2985static int
80f75320 2986s390_function_arg_float (struct type *type)
20a940cc 2987{
80f75320
AA
2988 /* Note that long double as well as complex types are intentionally
2989 excluded. */
2990 if (TYPE_LENGTH (type) > 8)
2991 return 0;
20a940cc 2992
80f75320
AA
2993 /* A struct containing just a float or double is passed like a float
2994 or double. */
417c80f9 2995 type = s390_effective_inner_type (type, 0);
20a940cc 2996
20a940cc 2997 return (TYPE_CODE (type) == TYPE_CODE_FLT
80f75320 2998 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
20a940cc
JB
2999}
3000
417c80f9
AA
3001/* Return non-zero if TYPE should be passed like a vector. */
3002
3003static int
3004s390_function_arg_vector (struct type *type)
3005{
3006 if (TYPE_LENGTH (type) > 16)
3007 return 0;
3008
3009 /* Structs containing just a vector are passed like a vector. */
3010 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
3011
3012 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
3013}
3014
6dbc9c04 3015/* Determine whether N is a power of two. */
20a940cc 3016
78f8b424 3017static int
b0cf273e 3018is_power_of_two (unsigned int n)
78f8b424 3019{
6dbc9c04 3020 return n && ((n & (n - 1)) == 0);
78f8b424
JB
3021}
3022
80f75320 3023/* For an argument whose type is TYPE and which is not passed like a
417c80f9
AA
3024 float or vector, return non-zero if it should be passed like "int"
3025 or "long long". */
4d819d0e 3026
78f8b424 3027static int
b0cf273e 3028s390_function_arg_integer (struct type *type)
78f8b424 3029{
80f75320
AA
3030 enum type_code code = TYPE_CODE (type);
3031
354ecfd5 3032 if (TYPE_LENGTH (type) > 8)
b0cf273e 3033 return 0;
78f8b424 3034
80f75320
AA
3035 if (code == TYPE_CODE_INT
3036 || code == TYPE_CODE_ENUM
3037 || code == TYPE_CODE_RANGE
3038 || code == TYPE_CODE_CHAR
3039 || code == TYPE_CODE_BOOL
3040 || code == TYPE_CODE_PTR
3041 || code == TYPE_CODE_REF)
3042 return 1;
3043
3044 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
3045 && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
3046}
3047
80f75320
AA
3048/* Argument passing state: Internal data structure passed to helper
3049 routines of s390_push_dummy_call. */
78f8b424 3050
80f75320
AA
3051struct s390_arg_state
3052 {
3053 /* Register cache, or NULL, if we are in "preparation mode". */
3054 struct regcache *regcache;
417c80f9
AA
3055 /* Next available general/floating-point/vector register for
3056 argument passing. */
3057 int gr, fr, vr;
80f75320
AA
3058 /* Current pointer to copy area (grows downwards). */
3059 CORE_ADDR copy;
3060 /* Current pointer to parameter area (grows upwards). */
3061 CORE_ADDR argp;
3062 };
78f8b424 3063
80f75320
AA
3064/* Prepare one argument ARG for a dummy call and update the argument
3065 passing state AS accordingly. If the regcache field in AS is set,
3066 operate in "write mode" and write ARG into the inferior. Otherwise
3067 run "preparation mode" and skip all updates to the inferior. */
78f8b424 3068
80f75320
AA
3069static void
3070s390_handle_arg (struct s390_arg_state *as, struct value *arg,
3071 struct gdbarch_tdep *tdep, int word_size,
417c80f9 3072 enum bfd_endian byte_order, int is_unnamed)
78f8b424 3073{
80f75320
AA
3074 struct type *type = check_typedef (value_type (arg));
3075 unsigned int length = TYPE_LENGTH (type);
3076 int write_mode = as->regcache != NULL;
78f8b424 3077
80f75320
AA
3078 if (s390_function_arg_float (type))
3079 {
3080 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
3081 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
3082 6. */
3083 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
3084 {
3085 /* When we store a single-precision value in an FP register,
3086 it occupies the leftmost bits. */
3087 if (write_mode)
3088 regcache_cooked_write_part (as->regcache,
3089 S390_F0_REGNUM + as->fr,
3090 0, length,
3091 value_contents (arg));
3092 as->fr += 2;
3093 }
3094 else
3095 {
3096 /* When we store a single-precision value in a stack slot,
3097 it occupies the rightmost bits. */
3098 as->argp = align_up (as->argp + length, word_size);
3099 if (write_mode)
3100 write_memory (as->argp - length, value_contents (arg),
3101 length);
3102 }
3103 }
417c80f9
AA
3104 else if (tdep->vector_abi == S390_VECTOR_ABI_128
3105 && s390_function_arg_vector (type))
3106 {
3107 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
3108
3109 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
3110 {
3111 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
3112
3113 if (write_mode)
3114 regcache_cooked_write_part (as->regcache, regnum,
3115 0, length,
3116 value_contents (arg));
3117 as->vr++;
3118 }
3119 else
3120 {
3121 if (write_mode)
3122 write_memory (as->argp, value_contents (arg), length);
3123 as->argp = align_up (as->argp + length, word_size);
3124 }
3125 }
80f75320 3126 else if (s390_function_arg_integer (type) && length <= word_size)
78f8b424 3127 {
decf8d9a
JK
3128 /* Initialize it just to avoid a GCC false warning. */
3129 ULONGEST val = 0;
78f8b424 3130
80f75320 3131 if (write_mode)
34201ae3 3132 {
80f75320
AA
3133 /* Place value in least significant bits of the register or
3134 memory word and sign- or zero-extend to full word size.
3135 This also applies to a struct or union. */
3136 val = TYPE_UNSIGNED (type)
3137 ? extract_unsigned_integer (value_contents (arg),
3138 length, byte_order)
3139 : extract_signed_integer (value_contents (arg),
3140 length, byte_order);
3141 }
78f8b424 3142
80f75320
AA
3143 if (as->gr <= 6)
3144 {
3145 if (write_mode)
3146 regcache_cooked_write_unsigned (as->regcache,
3147 S390_R0_REGNUM + as->gr,
3148 val);
3149 as->gr++;
3150 }
3151 else
3152 {
3153 if (write_mode)
3154 write_memory_unsigned_integer (as->argp, word_size,
3155 byte_order, val);
3156 as->argp += word_size;
34201ae3 3157 }
78f8b424 3158 }
80f75320
AA
3159 else if (s390_function_arg_integer (type) && length == 8)
3160 {
3161 if (as->gr <= 5)
3162 {
3163 if (write_mode)
3164 {
3165 regcache_cooked_write (as->regcache,
3166 S390_R0_REGNUM + as->gr,
3167 value_contents (arg));
3168 regcache_cooked_write (as->regcache,
3169 S390_R0_REGNUM + as->gr + 1,
3170 value_contents (arg) + word_size);
3171 }
3172 as->gr += 2;
3173 }
3174 else
3175 {
3176 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
3177 in it, then don't go back and use it again later. */
3178 as->gr = 7;
78f8b424 3179
80f75320
AA
3180 if (write_mode)
3181 write_memory (as->argp, value_contents (arg), length);
3182 as->argp += length;
3183 }
3184 }
3185 else
3186 {
3187 /* This argument type is never passed in registers. Place the
3188 value in the copy area and pass a pointer to it. Use 8-byte
3189 alignment as a conservative assumption. */
3190 as->copy = align_down (as->copy - length, 8);
3191 if (write_mode)
3192 write_memory (as->copy, value_contents (arg), length);
3193
3194 if (as->gr <= 6)
3195 {
3196 if (write_mode)
3197 regcache_cooked_write_unsigned (as->regcache,
3198 S390_R0_REGNUM + as->gr,
3199 as->copy);
3200 as->gr++;
3201 }
3202 else
3203 {
3204 if (write_mode)
3205 write_memory_unsigned_integer (as->argp, word_size,
3206 byte_order, as->copy);
3207 as->argp += word_size;
3208 }
3209 }
78f8b424
JB
3210}
3211
78f8b424 3212/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
3213 place to be passed to a function, as specified by the "GNU/Linux
3214 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
3215
3216 SP is the current stack pointer. We must put arguments, links,
3217 padding, etc. whereever they belong, and return the new stack
3218 pointer value.
34201ae3 3219
78f8b424
JB
3220 If STRUCT_RETURN is non-zero, then the function we're calling is
3221 going to return a structure by value; STRUCT_ADDR is the address of
3222 a block we've allocated for it on the stack.
3223
3224 Our caller has taken care of any type promotions needed to satisfy
3225 prototypes or the old K&R argument-passing rules. */
80f75320 3226
a78f21af 3227static CORE_ADDR
7d9b040b 3228s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
3229 struct regcache *regcache, CORE_ADDR bp_addr,
3230 int nargs, struct value **args, CORE_ADDR sp,
3231 int struct_return, CORE_ADDR struct_addr)
5769d3cd 3232{
b0cf273e
JB
3233 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3234 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 3235 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 3236 int i;
80f75320
AA
3237 struct s390_arg_state arg_state, arg_prep;
3238 CORE_ADDR param_area_start, new_sp;
417c80f9
AA
3239 struct type *ftype = check_typedef (value_type (function));
3240
3241 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
3242 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
5769d3cd 3243
80f75320
AA
3244 arg_prep.copy = sp;
3245 arg_prep.gr = struct_return ? 3 : 2;
3246 arg_prep.fr = 0;
417c80f9 3247 arg_prep.vr = 0;
80f75320
AA
3248 arg_prep.argp = 0;
3249 arg_prep.regcache = NULL;
5769d3cd 3250
80f75320
AA
3251 /* Initialize arg_state for "preparation mode". */
3252 arg_state = arg_prep;
5769d3cd 3253
80f75320
AA
3254 /* Update arg_state.copy with the start of the reference-to-copy area
3255 and arg_state.argp with the size of the parameter area. */
3256 for (i = 0; i < nargs; i++)
417c80f9
AA
3257 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3258 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3259
80f75320 3260 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
78f8b424 3261
c0cc4c83 3262 /* Allocate the standard frame areas: the register save area, the
80f75320
AA
3263 word reserved for the compiler, and the back chain pointer. */
3264 new_sp = param_area_start - (16 * word_size + 32);
3265
3266 /* Now we have the final stack pointer. Make sure we didn't
3267 underflow; on 31-bit, this would result in addresses with the
3268 high bit set, which causes confusion elsewhere. Note that if we
3269 error out here, stack and registers remain untouched. */
3270 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
c0cc4c83
UW
3271 error (_("Stack overflow"));
3272
80f75320
AA
3273 /* Pass the structure return address in general register 2. */
3274 if (struct_return)
3275 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
c0cc4c83 3276
80f75320
AA
3277 /* Initialize arg_state for "write mode". */
3278 arg_state = arg_prep;
3279 arg_state.argp = param_area_start;
3280 arg_state.regcache = regcache;
78f8b424 3281
80f75320
AA
3282 /* Write all parameters. */
3283 for (i = 0; i < nargs; i++)
417c80f9
AA
3284 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3285 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3286
8de7d199
UW
3287 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
3288 if (word_size == 4)
3289 {
3290 ULONGEST pswa;
3291 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3292 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
3293 }
b0cf273e 3294 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 3295
b0cf273e 3296 /* Store updated stack pointer. */
80f75320 3297 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
78f8b424 3298
a8c99f38 3299 /* We need to return the 'stack part' of the frame ID,
121d8485 3300 which is actually the top of the register save area. */
80f75320 3301 return param_area_start;
5769d3cd
AC
3302}
3303
f089c433 3304/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
3305 dummy frame. The frame ID's base needs to match the TOS value
3306 returned by push_dummy_call, and the PC match the dummy frame's
3307 breakpoint. */
3308static struct frame_id
f089c433 3309s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 3310{
a8c99f38 3311 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
3312 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
3313 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 3314
121d8485 3315 return frame_id_build (sp + 16*word_size + 32,
34201ae3 3316 get_frame_pc (this_frame));
b0cf273e 3317}
c8f9d51c 3318
4074e13c
JB
3319static CORE_ADDR
3320s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
3321{
3322 /* Both the 32- and 64-bit ABI's say that the stack pointer should
3323 always be aligned on an eight-byte boundary. */
3324 return (addr & -8);
3325}
3326
3327
4e65a17e
AA
3328/* Helper for s390_return_value: Set or retrieve a function return
3329 value if it resides in a register. */
b0cf273e 3330
4e65a17e
AA
3331static void
3332s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
3333 struct regcache *regcache,
3334 gdb_byte *out, const gdb_byte *in)
c8f9d51c 3335{
4e65a17e
AA
3336 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3337 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
3338 int length = TYPE_LENGTH (type);
3339 int code = TYPE_CODE (type);
b0cf273e 3340
4e65a17e 3341 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
b0cf273e 3342 {
4e65a17e
AA
3343 /* Float-like value: left-aligned in f0. */
3344 if (in != NULL)
3345 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
3346 0, length, in);
3347 else
3348 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
3349 0, length, out);
3350 }
417c80f9
AA
3351 else if (code == TYPE_CODE_ARRAY)
3352 {
3353 /* Vector: left-aligned in v24. */
3354 if (in != NULL)
3355 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
3356 0, length, in);
3357 else
3358 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
3359 0, length, out);
3360 }
4e65a17e
AA
3361 else if (length <= word_size)
3362 {
3363 /* Integer: zero- or sign-extended in r2. */
3364 if (out != NULL)
3365 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
3366 word_size - length, length, out);
3367 else if (TYPE_UNSIGNED (type))
3368 regcache_cooked_write_unsigned
3369 (regcache, S390_R2_REGNUM,
3370 extract_unsigned_integer (in, length, byte_order));
3371 else
3372 regcache_cooked_write_signed
3373 (regcache, S390_R2_REGNUM,
3374 extract_signed_integer (in, length, byte_order));
b0cf273e 3375 }
4e65a17e
AA
3376 else if (length == 2 * word_size)
3377 {
3378 /* Double word: in r2 and r3. */
3379 if (in != NULL)
3380 {
3381 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
3382 regcache_cooked_write (regcache, S390_R3_REGNUM,
3383 in + word_size);
3384 }
3385 else
3386 {
3387 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
3388 regcache_cooked_read (regcache, S390_R3_REGNUM,
3389 out + word_size);
3390 }
3391 }
3392 else
3393 internal_error (__FILE__, __LINE__, _("invalid return type"));
c8f9d51c
JB
3394}
3395
4e65a17e
AA
3396
3397/* Implement the 'return_value' gdbarch method. */
3398
b0cf273e 3399static enum return_value_convention
6a3a010b 3400s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
3401 struct type *type, struct regcache *regcache,
3402 gdb_byte *out, const gdb_byte *in)
5769d3cd 3403{
56b9d9ac 3404 enum return_value_convention rvc;
56b9d9ac
UW
3405
3406 type = check_typedef (type);
56b9d9ac 3407
4e65a17e 3408 switch (TYPE_CODE (type))
b0cf273e 3409 {
4e65a17e
AA
3410 case TYPE_CODE_STRUCT:
3411 case TYPE_CODE_UNION:
4e65a17e
AA
3412 case TYPE_CODE_COMPLEX:
3413 rvc = RETURN_VALUE_STRUCT_CONVENTION;
3414 break;
417c80f9
AA
3415 case TYPE_CODE_ARRAY:
3416 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
3417 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
3418 ? RETURN_VALUE_REGISTER_CONVENTION
3419 : RETURN_VALUE_STRUCT_CONVENTION;
3420 break;
4e65a17e
AA
3421 default:
3422 rvc = TYPE_LENGTH (type) <= 8
3423 ? RETURN_VALUE_REGISTER_CONVENTION
3424 : RETURN_VALUE_STRUCT_CONVENTION;
b0cf273e 3425 }
5769d3cd 3426
4e65a17e
AA
3427 if (in != NULL || out != NULL)
3428 {
3429 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
3430 s390_register_return_value (gdbarch, type, regcache, out, in);
3431 else if (in != NULL)
3432 error (_("Cannot set function return value."));
3433 else
3434 error (_("Function return value unknown."));
b0cf273e
JB
3435 }
3436
3437 return rvc;
3438}
5769d3cd
AC
3439
3440
a8c99f38
JB
3441/* Breakpoints. */
3442
43af2100 3443static const gdb_byte *
c378eb4e
MS
3444s390_breakpoint_from_pc (struct gdbarch *gdbarch,
3445 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 3446{
43af2100 3447 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
3448
3449 *lenptr = sizeof (breakpoint);
3450 return breakpoint;
3451}
3452
5769d3cd 3453
a8c99f38 3454/* Address handling. */
5769d3cd
AC
3455
3456static CORE_ADDR
24568a2c 3457s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 3458{
a8c99f38 3459 return addr & 0x7fffffff;
5769d3cd
AC
3460}
3461
ffc65945
KB
3462static int
3463s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
3464{
3465 if (byte_size == 4)
119ac181 3466 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3467 else
3468 return 0;
3469}
3470
3471static const char *
3472s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
3473{
119ac181 3474 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
3475 return "mode32";
3476 else
3477 return NULL;
3478}
3479
a78f21af 3480static int
c378eb4e
MS
3481s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
3482 const char *name,
ffc65945
KB
3483 int *type_flags_ptr)
3484{
3485 if (strcmp (name, "mode32") == 0)
3486 {
119ac181 3487 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3488 return 1;
3489 }
3490 else
3491 return 0;
3492}
3493
60abeae4
AA
3494/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
3495 "-mcmodel=large". */
a2658feb
JK
3496
3497static char *
3498s390_gcc_target_options (struct gdbarch *gdbarch)
3499{
60abeae4
AA
3500 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
3501}
3502
3503/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
3504 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
3505 always "s390". Note that an s390x compiler supports "-m31" as
3506 well. */
3507
3508static const char *
3509s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
3510{
3511 return "s390x?";
a2658feb
JK
3512}
3513
55aa24fb
SDJ
3514/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3515 gdbarch.h. */
3516
3517static int
3518s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3519{
3520 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3521 or indirection. */
3522 || *s == '%' /* Register access. */
3523 || isdigit (*s)); /* Literal number. */
3524}
3525
566c56c9
MK
3526/* Process record and replay helpers. */
3527
3528/* Takes the intermediate sum of address calculations and masks off upper
3529 bits according to current addressing mode. */
3530
3531static CORE_ADDR
3532s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
3533 CORE_ADDR val) {
3534 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3535 ULONGEST pswm, pswa;
3536 int am;
3537 if (tdep->abi == ABI_LINUX_S390)
3538 {
3539 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3540 am = pswa >> 31 & 1;
3541 }
3542 else
3543 {
3544 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
3545 am = pswm >> 31 & 3;
3546 }
3547 switch (am)
3548 {
3549 case 0:
3550 return val & 0xffffff;
3551 case 1:
3552 return val & 0x7fffffff;
3553 case 3:
3554 return val;
3555 default:
3556 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
3557 return 0;
3558 }
3559}
3560
3561/* Calculates memory address using pre-calculated index, raw instruction word
3562 with b and d/dl fields, and raw instruction byte with dh field. Index and
3563 dh should be set to 0 if unused. */
3564
3565static CORE_ADDR
3566s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
3567 ULONGEST x, uint16_t bd, int8_t dh)
3568{
3569 uint8_t rb = bd >> 12 & 0xf;
3570 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
3571 ULONGEST b;
3572 CORE_ADDR res = d + x;
3573 if (rb)
3574 {
3575 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
3576 res += b;
3577 }
3578 return s390_record_address_mask (gdbarch, regcache, res);
3579}
3580
3581/* Calculates memory address using raw x, b + d/dl, dh fields from
3582 instruction. rx and dh should be set to 0 if unused. */
3583
3584static CORE_ADDR
3585s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
3586 uint8_t rx, uint16_t bd, int8_t dh)
3587{
3588 ULONGEST x = 0;
3589 if (rx)
3590 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
3591 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3592}
3593
3594/* Calculates memory address for VSCE[GF] instructions. */
3595
3596static int
3597s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
3598 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
3599 int8_t dh, CORE_ADDR *res)
3600{
3601 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3602 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3603 ULONGEST x;
3604 gdb_byte buf[16];
3605 if (tdep->v0_full_regnum == -1 || el * es >= 16)
3606 return -1;
3607 if (vx < 16)
3608 regcache_cooked_read (regcache, tdep->v0_full_regnum + vx, buf);
3609 else
3610 regcache_raw_read (regcache, S390_V16_REGNUM + vx - 16, buf);
3611 x = extract_unsigned_integer (buf + el * es, es, byte_order);
3612 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3613 return 0;
3614}
3615
3616/* Calculates memory address for instructions with relative long addressing. */
3617
3618static CORE_ADDR
3619s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
3620 CORE_ADDR addr, uint16_t i1, uint16_t i2)
3621{
3622 int32_t ri = i1 << 16 | i2;
3623 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
3624}
3625
3626/* Population count helper. */
3627
3628static int s390_popcnt (unsigned int x) {
3629 int res = 0;
3630 while (x)
3631 {
3632 if (x & 1)
3633 res++;
3634 x >>= 1;
3635 }
3636 return res;
3637}
3638
3639/* Record 64-bit register. */
3640
3641static int
3642s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3643{
3644 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3645 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3646 return -1;
3647 if (tdep->abi == ABI_LINUX_S390)
3648 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3649 return -1;
3650 return 0;
3651}
3652
3653/* Record high 32 bits of a register. */
3654
3655static int
3656s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3657{
3658 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3659 if (tdep->abi == ABI_LINUX_S390)
3660 {
3661 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3662 return -1;
3663 }
3664 else
3665 {
3666 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3667 return -1;
3668 }
3669 return 0;
3670}
3671
3672/* Record vector register. */
3673
3674static int
3675s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3676{
3677 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3678 if (i < 16)
3679 {
3680 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
3681 return -1;
3682 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
3683 return -1;
3684 }
3685 else
3686 {
3687 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
3688 return -1;
3689 }
3690 return 0;
3691}
3692
3693static int
3694s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
3695 CORE_ADDR addr)
3696{
3697 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3698 uint16_t insn[3] = {0};
3699 /* Instruction as bytes. */
3700 uint8_t ibyte[6];
3701 /* Instruction as nibbles. */
3702 uint8_t inib[12];
3703 /* Instruction vector registers. */
3704 uint8_t ivec[4];
3705 CORE_ADDR oaddr, oaddr2, oaddr3;
3706 ULONGEST tmp;
3707 int i, n;
3708 /* if EX/EXRL instruction used, here's the reg parameter */
3709 int ex = -1;
3710 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3711
3712 /* Attempting to use EX or EXRL jumps back here */
3713ex:
3714
3715 /* Read instruction. */
3716 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
3717 /* If execute was involved, do the adjustment. */
3718 if (ex != -1)
3719 insn[0] |= ex & 0xff;
3720 /* Two highest bits determine instruction size. */
3721 if (insn[0] >= 0x4000)
3722 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
3723 else
3724 /* Not necessary, but avoids uninitialized variable warnings. */
3725 insn[1] = 0;
3726 if (insn[0] >= 0xc000)
3727 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
3728 else
3729 insn[2] = 0;
3730 /* Split instruction into bytes and nibbles. */
3731 for (i = 0; i < 3; i++)
3732 {
3733 ibyte[i*2] = insn[i] >> 8 & 0xff;
3734 ibyte[i*2+1] = insn[i] & 0xff;
3735 }
3736 for (i = 0; i < 6; i++)
3737 {
3738 inib[i*2] = ibyte[i] >> 4 & 0xf;
3739 inib[i*2+1] = ibyte[i] & 0xf;
3740 }
3741 /* Compute vector registers, if applicable. */
3742 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
3743 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
3744 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
3745 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
3746
3747 switch (ibyte[0])
3748 {
3749 /* 0x00 undefined */
3750
3751 case 0x01:
3752 /* E-format instruction */
3753 switch (ibyte[1])
3754 {
3755 /* 0x00 undefined */
3756 /* 0x01 unsupported: PR - program return */
3757 /* 0x02 unsupported: UPT */
3758 /* 0x03 undefined */
3759 /* 0x04 privileged: PTFF - perform timing facility function */
3760 /* 0x05-0x06 undefined */
3761 /* 0x07 privileged: SCKPF - set clock programmable field */
3762 /* 0x08-0x09 undefined */
3763
3764 case 0x0a: /* PFPO - perform floating point operation */
3765 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3766 if (!(tmp & 0x80000000u))
3767 {
3768 uint8_t ofc = tmp >> 16 & 0xff;
3769 switch (ofc)
3770 {
3771 case 0x00: /* HFP32 */
3772 case 0x01: /* HFP64 */
3773 case 0x05: /* BFP32 */
3774 case 0x06: /* BFP64 */
3775 case 0x08: /* DFP32 */
3776 case 0x09: /* DFP64 */
3777 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3778 return -1;
3779 break;
3780 case 0x02: /* HFP128 */
3781 case 0x07: /* BFP128 */
3782 case 0x0a: /* DFP128 */
3783 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3784 return -1;
3785 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3786 return -1;
3787 break;
3788 default:
3789 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3790 ofc, paddress (gdbarch, addr));
3791 return -1;
3792 }
3793
3794 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3795 return -1;
3796 }
3797 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3798 return -1;
3799 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3800 return -1;
3801 break;
3802
3803 case 0x0b: /* TAM - test address mode */
3804 case 0x0c: /* SAM24 - set address mode 24 */
3805 case 0x0d: /* SAM31 - set address mode 31 */
3806 case 0x0e: /* SAM64 - set address mode 64 */
3807 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3808 return -1;
3809 break;
3810
3811 /* 0x0f-0xfe undefined */
3812
3813 /* 0xff unsupported: TRAP */
3814
3815 default:
3816 goto UNKNOWN_OP;
3817 }
3818 break;
3819
3820 /* 0x02 undefined */
3821 /* 0x03 undefined */
3822
3823 case 0x04: /* SPM - set program mask */
3824 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3825 return -1;
3826 break;
3827
3828 case 0x05: /* BALR - branch and link */
3829 case 0x45: /* BAL - branch and link */
3830 case 0x06: /* BCTR - branch on count */
3831 case 0x46: /* BCT - branch on count */
3832 case 0x0d: /* BASR - branch and save */
3833 case 0x4d: /* BAS - branch and save */
3834 case 0x84: /* BRXH - branch relative on index high */
3835 case 0x85: /* BRXLE - branch relative on index low or equal */
3836 case 0x86: /* BXH - branch on index high */
3837 case 0x87: /* BXLE - branch on index low or equal */
3838 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3839 use 32-bit destination as counter. */
3840 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3841 return -1;
3842 break;
3843
3844 case 0x07: /* BCR - branch on condition */
3845 case 0x47: /* BC - branch on condition */
3846 /* No effect other than PC transfer. */
3847 break;
3848
3849 /* 0x08 undefined */
3850 /* 0x09 undefined */
3851
3852 case 0x0a:
3853 /* SVC - supervisor call */
3854 if (s390_linux_syscall_record (regcache, ibyte[1]))
3855 return -1;
3856 break;
3857
3858 case 0x0b: /* BSM - branch and set mode */
3859 if (inib[2])
3860 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3861 return -1;
3862 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3863 return -1;
3864 break;
3865
3866 case 0x0c: /* BASSM - branch and save and set mode */
3867 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3868 return -1;
3869 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3870 return -1;
3871 break;
3872
3873 case 0x0e: /* MVCL - move long [interruptible] */
3874 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3875 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3876 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3877 tmp &= 0xffffff;
3878 if (record_full_arch_list_add_mem (oaddr, tmp))
3879 return -1;
3880 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3881 return -1;
3882 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3883 return -1;
3884 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3885 return -1;
3886 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3887 return -1;
3888 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3889 return -1;
3890 break;
3891
3892 case 0x0f: /* CLCL - compare logical long [interruptible] */
3893 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3894 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3895 return -1;
3896 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3897 return -1;
3898 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3899 return -1;
3900 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3901 return -1;
3902 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3903 return -1;
3904 break;
3905
3906 case 0x10: /* LPR - load positive */
3907 case 0x11: /* LNR - load negative */
3908 case 0x12: /* LTR - load and test */
3909 case 0x13: /* LCR - load complement */
3910 case 0x14: /* NR - and */
3911 case 0x16: /* OR - or */
3912 case 0x17: /* XR - xor */
3913 case 0x1a: /* AR - add */
3914 case 0x1b: /* SR - subtract */
3915 case 0x1e: /* ALR - add logical */
3916 case 0x1f: /* SLR - subtract logical */
3917 case 0x54: /* N - and */
3918 case 0x56: /* O - or */
3919 case 0x57: /* X - xor */
3920 case 0x5a: /* A - add */
3921 case 0x5b: /* S - subtract */
3922 case 0x5e: /* AL - add logical */
3923 case 0x5f: /* SL - subtract logical */
3924 case 0x4a: /* AH - add halfword */
3925 case 0x4b: /* SH - subtract halfword */
3926 case 0x8a: /* SRA - shift right single */
3927 case 0x8b: /* SLA - shift left single */
3928 case 0xbf: /* ICM - insert characters under mask */
3929 /* 32-bit destination + flags */
3930 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3931 return -1;
3932 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3933 return -1;
3934 break;
3935
3936 case 0x15: /* CLR - compare logical */
3937 case 0x55: /* CL - compare logical */
3938 case 0x19: /* CR - compare */
3939 case 0x29: /* CDR - compare */
3940 case 0x39: /* CER - compare */
3941 case 0x49: /* CH - compare halfword */
3942 case 0x59: /* C - compare */
3943 case 0x69: /* CD - compare */
3944 case 0x79: /* CE - compare */
3945 case 0x91: /* TM - test under mask */
3946 case 0x95: /* CLI - compare logical */
3947 case 0xbd: /* CLM - compare logical under mask */
3948 case 0xd5: /* CLC - compare logical */
3949 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3950 return -1;
3951 break;
3952
3953 case 0x18: /* LR - load */
3954 case 0x48: /* LH - load halfword */
3955 case 0x58: /* L - load */
3956 case 0x41: /* LA - load address */
3957 case 0x43: /* IC - insert character */
3958 case 0x4c: /* MH - multiply halfword */
3959 case 0x71: /* MS - multiply single */
3960 case 0x88: /* SRL - shift right single logical */
3961 case 0x89: /* SLL - shift left single logical */
3962 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3963 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3964 return -1;
3965 break;
3966
3967 case 0x1c: /* MR - multiply */
3968 case 0x5c: /* M - multiply */
3969 case 0x1d: /* DR - divide */
3970 case 0x5d: /* D - divide */
3971 case 0x8c: /* SRDL - shift right double logical */
3972 case 0x8d: /* SLDL - shift left double logical */
3973 /* 32-bit pair destination, no flags */
3974 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3975 return -1;
3976 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3977 return -1;
3978 break;
3979
3980 case 0x20: /* LPDR - load positive */
3981 case 0x30: /* LPER - load positive */
3982 case 0x21: /* LNDR - load negative */
3983 case 0x31: /* LNER - load negative */
3984 case 0x22: /* LTDR - load and test */
3985 case 0x32: /* LTER - load and test */
3986 case 0x23: /* LCDR - load complement */
3987 case 0x33: /* LCER - load complement */
3988 case 0x2a: /* ADR - add */
3989 case 0x3a: /* AER - add */
3990 case 0x6a: /* AD - add */
3991 case 0x7a: /* AE - add */
3992 case 0x2b: /* SDR - subtract */
3993 case 0x3b: /* SER - subtract */
3994 case 0x6b: /* SD - subtract */
3995 case 0x7b: /* SE - subtract */
3996 case 0x2e: /* AWR - add unnormalized */
3997 case 0x3e: /* AUR - add unnormalized */
3998 case 0x6e: /* AW - add unnormalized */
3999 case 0x7e: /* AU - add unnormalized */
4000 case 0x2f: /* SWR - subtract unnormalized */
4001 case 0x3f: /* SUR - subtract unnormalized */
4002 case 0x6f: /* SW - subtract unnormalized */
4003 case 0x7f: /* SU - subtract unnormalized */
4004 /* float destination + flags */
4005 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4006 return -1;
4007 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4008 return -1;
4009 break;
4010
4011 case 0x24: /* HDR - halve */
4012 case 0x34: /* HER - halve */
4013 case 0x25: /* LDXR - load rounded */
4014 case 0x35: /* LEDR - load rounded */
4015 case 0x28: /* LDR - load */
4016 case 0x38: /* LER - load */
4017 case 0x68: /* LD - load */
4018 case 0x78: /* LE - load */
4019 case 0x2c: /* MDR - multiply */
4020 case 0x3c: /* MDER - multiply */
4021 case 0x6c: /* MD - multiply */
4022 case 0x7c: /* MDE - multiply */
4023 case 0x2d: /* DDR - divide */
4024 case 0x3d: /* DER - divide */
4025 case 0x6d: /* DD - divide */
4026 case 0x7d: /* DE - divide */
4027 /* float destination, no flags */
4028 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4029 return -1;
4030 break;
4031
4032 case 0x26: /* MXR - multiply */
4033 case 0x27: /* MXDR - multiply */
4034 case 0x67: /* MXD - multiply */
4035 /* float pair destination, no flags */
4036 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4037 return -1;
4038 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4039 return -1;
4040 break;
4041
4042 case 0x36: /* AXR - add */
4043 case 0x37: /* SXR - subtract */
4044 /* float pair destination + flags */
4045 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4046 return -1;
4047 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4048 return -1;
4049 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4050 return -1;
4051 break;
4052
4053 case 0x40: /* STH - store halfword */
4054 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4055 if (record_full_arch_list_add_mem (oaddr, 2))
4056 return -1;
4057 break;
4058
4059 case 0x42: /* STC - store character */
4060 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4061 if (record_full_arch_list_add_mem (oaddr, 1))
4062 return -1;
4063 break;
4064
4065 case 0x44: /* EX - execute */
4066 if (ex != -1)
4067 {
4068 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4069 paddress (gdbarch, addr));
4070 return -1;
4071 }
4072 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4073 if (inib[2])
4074 {
4075 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4076 ex = tmp & 0xff;
4077 }
4078 else
4079 {
4080 ex = 0;
4081 }
4082 goto ex;
4083
4084 case 0x4e: /* CVD - convert to decimal */
4085 case 0x60: /* STD - store */
4086 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4087 if (record_full_arch_list_add_mem (oaddr, 8))
4088 return -1;
4089 break;
4090
4091 case 0x4f: /* CVB - convert to binary */
4092 /* 32-bit gpr destination + FPC (DXC write) */
4093 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4094 return -1;
4095 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4096 return -1;
4097 break;
4098
4099 case 0x50: /* ST - store */
4100 case 0x70: /* STE - store */
4101 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4102 if (record_full_arch_list_add_mem (oaddr, 4))
4103 return -1;
4104 break;
4105
4106 case 0x51: /* LAE - load address extended */
4107 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4108 return -1;
4109 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
4110 return -1;
4111 break;
4112
4113 /* 0x52 undefined */
4114 /* 0x53 undefined */
4115
4116 /* 0x61-0x66 undefined */
4117
4118 /* 0x72-0x77 undefined */
4119
4120 /* 0x80 privileged: SSM - set system mask */
4121 /* 0x81 undefined */
4122 /* 0x82 privileged: LPSW - load PSW */
4123 /* 0x83 privileged: diagnose */
4124
4125 case 0x8e: /* SRDA - shift right double */
4126 case 0x8f: /* SLDA - shift left double */
4127 /* 32-bit pair destination + flags */
4128 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4129 return -1;
4130 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4131 return -1;
4132 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4133 return -1;
4134 break;
4135
4136 case 0x90: /* STM - store multiple */
4137 case 0x9b: /* STAM - store access multiple */
4138 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4139 if (inib[2] <= inib[3])
4140 n = inib[3] - inib[2] + 1;
4141 else
4142 n = inib[3] + 0x10 - inib[2] + 1;
4143 if (record_full_arch_list_add_mem (oaddr, n * 4))
4144 return -1;
4145 break;
4146
4147 case 0x92: /* MVI - move */
4148 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4149 if (record_full_arch_list_add_mem (oaddr, 1))
4150 return -1;
4151 break;
4152
4153 case 0x93: /* TS - test and set */
4154 case 0x94: /* NI - and */
4155 case 0x96: /* OI - or */
4156 case 0x97: /* XI - xor */
4157 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4158 if (record_full_arch_list_add_mem (oaddr, 1))
4159 return -1;
4160 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4161 return -1;
4162 break;
4163
4164 case 0x98: /* LM - load multiple */
4165 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4166 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
4167 return -1;
4168 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4169 return -1;
4170 break;
4171
4172 /* 0x99 privileged: TRACE */
4173
4174 case 0x9a: /* LAM - load access multiple */
4175 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4176 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
4177 return -1;
4178 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
4179 return -1;
4180 break;
4181
4182 /* 0x9c-0x9f privileged and obsolete (old I/O) */
4183 /* 0xa0-0xa4 undefined */
4184
4185 case 0xa5:
4186 case 0xa7:
4187 /* RI-format instruction */
4188 switch (ibyte[0] << 4 | inib[3])
4189 {
4190 case 0xa50: /* IIHH - insert immediate */
4191 case 0xa51: /* IIHL - insert immediate */
4192 /* high 32-bit destination */
4193 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4194 return -1;
4195 break;
4196
4197 case 0xa52: /* IILH - insert immediate */
4198 case 0xa53: /* IILL - insert immediate */
4199 case 0xa75: /* BRAS - branch relative and save */
4200 case 0xa76: /* BRCT - branch relative on count */
4201 case 0xa78: /* LHI - load halfword immediate */
4202 case 0xa7c: /* MHI - multiply halfword immediate */
4203 /* 32-bit or native destination */
4204 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4205 return -1;
4206 break;
4207
4208 case 0xa54: /* NIHH - and immediate */
4209 case 0xa55: /* NIHL - and immediate */
4210 case 0xa58: /* OIHH - or immediate */
4211 case 0xa59: /* OIHL - or immediate */
4212 /* high 32-bit destination + flags */
4213 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4214 return -1;
4215 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4216 return -1;
4217 break;
4218
4219 case 0xa56: /* NILH - and immediate */
4220 case 0xa57: /* NILL - and immediate */
4221 case 0xa5a: /* OILH - or immediate */
4222 case 0xa5b: /* OILL - or immediate */
4223 case 0xa7a: /* AHI - add halfword immediate */
4224 /* 32-bit destination + flags */
4225 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4226 return -1;
4227 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4228 return -1;
4229 break;
4230
4231 case 0xa5c: /* LLIHH - load logical immediate */
4232 case 0xa5d: /* LLIHL - load logical immediate */
4233 case 0xa5e: /* LLILH - load logical immediate */
4234 case 0xa5f: /* LLILL - load logical immediate */
4235 case 0xa77: /* BRCTG - branch relative on count */
4236 case 0xa79: /* LGHI - load halfword immediate */
4237 case 0xa7d: /* MGHI - multiply halfword immediate */
4238 /* 64-bit destination */
4239 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4240 return -1;
4241 break;
4242
4243 case 0xa70: /* TMLH - test under mask */
4244 case 0xa71: /* TMLL - test under mask */
4245 case 0xa72: /* TMHH - test under mask */
4246 case 0xa73: /* TMHL - test under mask */
4247 case 0xa7e: /* CHI - compare halfword immediate */
4248 case 0xa7f: /* CGHI - compare halfword immediate */
4249 /* flags only */
4250 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4251 return -1;
4252 break;
4253
4254 case 0xa74: /* BRC - branch relative on condition */
4255 /* no register change */
4256 break;
4257
4258 case 0xa7b: /* AGHI - add halfword immediate */
4259 /* 64-bit destination + flags */
4260 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4261 return -1;
4262 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4263 return -1;
4264 break;
4265
4266 default:
4267 goto UNKNOWN_OP;
4268 }
4269 break;
4270
4271 /* 0xa6 undefined */
4272
4273 case 0xa8: /* MVCLE - move long extended [partial] */
4274 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4275 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4276 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
4277 if (record_full_arch_list_add_mem (oaddr, tmp))
4278 return -1;
4279 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4280 return -1;
4281 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4282 return -1;
4283 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4284 return -1;
4285 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4286 return -1;
4287 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4288 return -1;
4289 break;
4290
4291 /* 0xaa-0xab undefined */
4292 /* 0xac privileged: STNSM - store then and system mask */
4293 /* 0xad privileged: STOSM - store then or system mask */
4294 /* 0xae privileged: SIGP - signal processor */
4295 /* 0xaf unsupported: MC - monitor call */
4296 /* 0xb0 undefined */
4297 /* 0xb1 privileged: LRA - load real address */
4298
4299 case 0xb2:
4300 case 0xb3:
4301 case 0xb9:
4302 /* S/RRD/RRE/RRF/IE-format instruction */
4303 switch (insn[0])
4304 {
4305 /* 0xb200-0xb204 undefined or privileged */
4306
4307 case 0xb205: /* STCK - store clock */
4308 case 0xb27c: /* STCKF - store clock fast */
4309 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4310 if (record_full_arch_list_add_mem (oaddr, 8))
4311 return -1;
4312 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4313 return -1;
4314 break;
4315
4316 /* 0xb206-0xb219 undefined, privileged, or unsupported */
4317 /* 0xb21a unsupported: CFC */
4318 /* 0xb21b-0xb221 undefined or privileged */
4319
4320 case 0xb222: /* IPM - insert program mask */
4321 case 0xb24f: /* EAR - extract access */
4322 case 0xb252: /* MSR - multiply single */
4323 case 0xb2ec: /* ETND - extract transaction nesting depth */
4324 case 0xb38c: /* EFPC - extract fpc */
4325 case 0xb91f: /* LRVR - load reversed */
4326 case 0xb926: /* LBR - load byte */
4327 case 0xb927: /* LHR - load halfword */
4328 case 0xb994: /* LLCR - load logical character */
4329 case 0xb995: /* LLHR - load logical halfword */
4330 case 0xb9f2: /* LOCR - load on condition */
4331 /* 32-bit gpr destination */
4332 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4333 return -1;
4334 break;
4335
4336 /* 0xb223-0xb22c privileged or unsupported */
4337
4338 case 0xb22d: /* DXR - divide */
4339 case 0xb325: /* LXDR - load lengthened */
4340 case 0xb326: /* LXER - load lengthened */
4341 case 0xb336: /* SQXR - square root */
4342 case 0xb365: /* LXR - load */
4343 case 0xb367: /* FIXR - load fp integer */
4344 case 0xb376: /* LZXR - load zero */
4345 case 0xb3b6: /* CXFR - convert from fixed */
4346 case 0xb3c6: /* CXGR - convert from fixed */
4347 case 0xb3fe: /* IEXTR - insert biased exponent */
4348 /* float pair destination */
4349 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4350 return -1;
4351 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4352 return -1;
4353 break;
4354
4355 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
4356
4357 case 0xb241: /* CKSM - checksum [partial] */
4358 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4359 return -1;
4360 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4361 return -1;
4362 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4363 return -1;
4364 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4365 return -1;
4366 break;
4367
4368 /* 0xb242-0xb243 undefined */
4369
4370 case 0xb244: /* SQDR - square root */
4371 case 0xb245: /* SQER - square root */
4372 case 0xb324: /* LDER - load lengthened */
4373 case 0xb337: /* MEER - multiply */
4374 case 0xb366: /* LEXR - load rounded */
4375 case 0xb370: /* LPDFR - load positive */
4376 case 0xb371: /* LNDFR - load negative */
4377 case 0xb372: /* CSDFR - copy sign */
4378 case 0xb373: /* LCDFR - load complement */
4379 case 0xb374: /* LZER - load zero */
4380 case 0xb375: /* LZDR - load zero */
4381 case 0xb377: /* FIER - load fp integer */
4382 case 0xb37f: /* FIDR - load fp integer */
4383 case 0xb3b4: /* CEFR - convert from fixed */
4384 case 0xb3b5: /* CDFR - convert from fixed */
4385 case 0xb3c1: /* LDGR - load fpr from gr */
4386 case 0xb3c4: /* CEGR - convert from fixed */
4387 case 0xb3c5: /* CDGR - convert from fixed */
4388 case 0xb3f6: /* IEDTR - insert biased exponent */
4389 /* float destination */
4390 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4391 return -1;
4392 break;
4393
4394 /* 0xb246-0xb24c: privileged or unsupported */
4395
4396 case 0xb24d: /* CPYA - copy access */
4397 case 0xb24e: /* SAR - set access */
4398 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
4399 return -1;
4400 break;
4401
4402 /* 0xb250-0xb251 undefined or privileged */
4403 /* 0xb253-0xb254 undefined or privileged */
4404
4405 case 0xb255: /* MVST - move string [partial] */
4406 {
4407 uint8_t end;
4408 gdb_byte cur;
4409 ULONGEST num = 0;
4410 /* Read ending byte. */
4411 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4412 end = tmp & 0xff;
4413 /* Get address of second operand. */
4414 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
4415 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4416 /* Search for ending byte and compute length. */
4417 do {
4418 num++;
4419 if (target_read_memory (oaddr, &cur, 1))
4420 return -1;
4421 oaddr++;
4422 } while (cur != end);
4423 /* Get address of first operand and record it. */
4424 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4425 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4426 if (record_full_arch_list_add_mem (oaddr, num))
4427 return -1;
4428 /* Record the registers. */
4429 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4430 return -1;
4431 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4432 return -1;
4433 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4434 return -1;
4435 }
4436 break;
4437
4438 /* 0xb256 undefined */
4439
4440 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
4441 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4442 return -1;
4443 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4444 return -1;
4445 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4446 return -1;
4447 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4448 return -1;
4449 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4450 return -1;
4451 break;
4452
4453 /* 0xb258-0xb25c undefined, privileged, or unsupported */
4454
4455 case 0xb25d: /* CLST - compare logical string [partial] */
4456 case 0xb25e: /* SRST - search string [partial] */
4457 case 0xb9be: /* SRSTU - search string unicode [partial] */
4458 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4459 return -1;
4460 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4461 return -1;
4462 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4463 return -1;
4464 break;
4465
4466 /* 0xb25f-0xb262 undefined */
4467
4468 case 0xb263: /* CMPSC - compression call [interruptible] */
4469 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4470 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4471 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4472 if (record_full_arch_list_add_mem (oaddr, tmp))
4473 return -1;
4474 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4475 return -1;
4476 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4477 return -1;
4478 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4479 return -1;
4480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4481 return -1;
4482 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
4483 return -1;
4484 /* DXC may be written */
4485 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4486 return -1;
4487 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4488 return -1;
4489 break;
4490
4491 /* 0xb264-0xb277 undefined, privileged, or unsupported */
4492
4493 case 0xb278: /* STCKE - store clock extended */
4494 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4495 if (record_full_arch_list_add_mem (oaddr, 16))
4496 return -1;
4497 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4498 return -1;
4499 break;
4500
4501 /* 0xb279-0xb27b undefined or unsupported */
4502 /* 0xb27d-0xb298 undefined or privileged */
4503
4504 case 0xb299: /* SRNM - set rounding mode */
4505 case 0xb2b8: /* SRNMB - set bfp rounding mode */
4506 case 0xb2b9: /* SRNMT - set dfp rounding mode */
4507 case 0xb29d: /* LFPC - load fpc */
4508 case 0xb2bd: /* LFAS - load fpc and signal */
4509 case 0xb384: /* SFPC - set fpc */
4510 case 0xb385: /* SFASR - set fpc and signal */
4511 case 0xb960: /* CGRT - compare and trap */
4512 case 0xb961: /* CLGRT - compare logical and trap */
4513 case 0xb972: /* CRT - compare and trap */
4514 case 0xb973: /* CLRT - compare logical and trap */
4515 /* fpc only - including possible DXC write for trapping insns */
4516 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4517 return -1;
4518 break;
4519
4520 /* 0xb29a-0xb29b undefined */
4521
4522 case 0xb29c: /* STFPC - store fpc */
4523 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4524 if (record_full_arch_list_add_mem (oaddr, 4))
4525 return -1;
4526 break;
4527
4528 /* 0xb29e-0xb2a4 undefined */
4529
4530 case 0xb2a5: /* TRE - translate extended [partial] */
4531 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4532 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4533 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4534 if (record_full_arch_list_add_mem (oaddr, tmp))
4535 return -1;
4536 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4537 return -1;
4538 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4539 return -1;
4540 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4541 return -1;
4542 break;
4543
4544 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
4545 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
4546 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
4547 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
4548 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
4549 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
4550 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4551 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4552 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4553 if (record_full_arch_list_add_mem (oaddr, tmp))
4554 return -1;
4555 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4556 return -1;
4557 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4558 return -1;
4559 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4560 return -1;
4561 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4562 return -1;
4563 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4564 return -1;
4565 break;
4566
4567 /* 0xb2a8-0xb2af undefined */
4568
4569 case 0xb2b0: /* STFLE - store facility list extended */
4570 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4571 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4572 tmp &= 0xff;
4573 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
4574 return -1;
4575 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
4576 return -1;
4577 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4578 return -1;
4579 break;
4580
4581 /* 0xb2b1-0xb2b7 undefined or privileged */
4582 /* 0xb2ba-0xb2bc undefined */
4583 /* 0xb2be-0xb2e7 undefined */
4584 /* 0xb2e9-0xb2eb undefined */
4585 /* 0xb2ed-0xb2f7 undefined */
4586 /* 0xb2f8 unsupported: TEND */
4587 /* 0xb2f9 undefined */
4588
4589 case 0xb2e8: /* PPA - perform processor assist */
4590 case 0xb2fa: /* NIAI - next instruction access intent */
4591 /* no visible effects */
4592 break;
4593
4594 /* 0xb2fb undefined */
4595 /* 0xb2fc unsupported: TABORT */
4596 /* 0xb2fd-0xb2fe undefined */
4597 /* 0xb2ff unsupported: TRAP */
4598
4599 case 0xb300: /* LPEBR - load positive */
4600 case 0xb301: /* LNEBR - load negative */
4601 case 0xb303: /* LCEBR - load complement */
4602 case 0xb310: /* LPDBR - load positive */
4603 case 0xb311: /* LNDBR - load negative */
4604 case 0xb313: /* LCDBR - load complement */
4605 case 0xb350: /* TBEDR - convert hfp to bfp */
4606 case 0xb351: /* TBDR - convert hfp to bfp */
4607 case 0xb358: /* THDER - convert bfp to hfp */
4608 case 0xb359: /* THDR - convert bfp to hfp */
4609 /* float destination + flags */
4610 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4611 return -1;
4612 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4613 return -1;
4614 break;
4615
4616 case 0xb304: /* LDEBR - load lengthened */
4617 case 0xb30c: /* MDEBR - multiply */
4618 case 0xb30d: /* DEBR - divide */
4619 case 0xb314: /* SQEBR - square root */
4620 case 0xb315: /* SQDBR - square root */
4621 case 0xb317: /* MEEBR - multiply */
4622 case 0xb31c: /* MDBR - multiply */
4623 case 0xb31d: /* DDBR - divide */
4624 case 0xb344: /* LEDBRA - load rounded */
4625 case 0xb345: /* LDXBRA - load rounded */
4626 case 0xb346: /* LEXBRA - load rounded */
4627 case 0xb357: /* FIEBRA - load fp integer */
4628 case 0xb35f: /* FIDBRA - load fp integer */
4629 case 0xb390: /* CELFBR - convert from logical */
4630 case 0xb391: /* CDLFBR - convert from logical */
4631 case 0xb394: /* CEFBR - convert from fixed */
4632 case 0xb395: /* CDFBR - convert from fixed */
4633 case 0xb3a0: /* CELGBR - convert from logical */
4634 case 0xb3a1: /* CDLGBR - convert from logical */
4635 case 0xb3a4: /* CEGBR - convert from fixed */
4636 case 0xb3a5: /* CDGBR - convert from fixed */
4637 case 0xb3d0: /* MDTR - multiply */
4638 case 0xb3d1: /* DDTR - divide */
4639 case 0xb3d4: /* LDETR - load lengthened */
4640 case 0xb3d5: /* LEDTR - load lengthened */
4641 case 0xb3d7: /* FIDTR - load fp integer */
4642 case 0xb3dd: /* LDXTR - load lengthened */
4643 case 0xb3f1: /* CDGTR - convert from fixed */
4644 case 0xb3f2: /* CDUTR - convert from unsigned packed */
4645 case 0xb3f3: /* CDSTR - convert from signed packed */
4646 case 0xb3f5: /* QADTR - quantize */
4647 case 0xb3f7: /* RRDTR - reround */
4648 case 0xb951: /* CDFTR - convert from fixed */
4649 case 0xb952: /* CDLGTR - convert from logical */
4650 case 0xb953: /* CDLFTR - convert from logical */
4651 /* float destination + fpc */
4652 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4653 return -1;
4654 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4655 return -1;
4656 break;
4657
4658 case 0xb305: /* LXDBR - load lengthened */
4659 case 0xb306: /* LXEBR - load lengthened */
4660 case 0xb307: /* MXDBR - multiply */
4661 case 0xb316: /* SQXBR - square root */
4662 case 0xb34c: /* MXBR - multiply */
4663 case 0xb34d: /* DXBR - divide */
4664 case 0xb347: /* FIXBRA - load fp integer */
4665 case 0xb392: /* CXLFBR - convert from logical */
4666 case 0xb396: /* CXFBR - convert from fixed */
4667 case 0xb3a2: /* CXLGBR - convert from logical */
4668 case 0xb3a6: /* CXGBR - convert from fixed */
4669 case 0xb3d8: /* MXTR - multiply */
4670 case 0xb3d9: /* DXTR - divide */
4671 case 0xb3dc: /* LXDTR - load lengthened */
4672 case 0xb3df: /* FIXTR - load fp integer */
4673 case 0xb3f9: /* CXGTR - convert from fixed */
4674 case 0xb3fa: /* CXUTR - convert from unsigned packed */
4675 case 0xb3fb: /* CXSTR - convert from signed packed */
4676 case 0xb3fd: /* QAXTR - quantize */
4677 case 0xb3ff: /* RRXTR - reround */
4678 case 0xb959: /* CXFTR - convert from fixed */
4679 case 0xb95a: /* CXLGTR - convert from logical */
4680 case 0xb95b: /* CXLFTR - convert from logical */
4681 /* float pair destination + fpc */
4682 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4683 return -1;
4684 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4685 return -1;
4686 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4687 return -1;
4688 break;
4689
4690 case 0xb308: /* KEBR - compare and signal */
4691 case 0xb309: /* CEBR - compare */
4692 case 0xb318: /* KDBR - compare and signal */
4693 case 0xb319: /* CDBR - compare */
4694 case 0xb348: /* KXBR - compare and signal */
4695 case 0xb349: /* CXBR - compare */
4696 case 0xb3e0: /* KDTR - compare and signal */
4697 case 0xb3e4: /* CDTR - compare */
4698 case 0xb3e8: /* KXTR - compare and signal */
4699 case 0xb3ec: /* CXTR - compare */
4700 /* flags + fpc only */
4701 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4702 return -1;
4703 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4704 return -1;
4705 break;
4706
4707 case 0xb302: /* LTEBR - load and test */
4708 case 0xb312: /* LTDBR - load and test */
4709 case 0xb30a: /* AEBR - add */
4710 case 0xb30b: /* SEBR - subtract */
4711 case 0xb31a: /* ADBR - add */
4712 case 0xb31b: /* SDBR - subtract */
4713 case 0xb3d2: /* ADTR - add */
4714 case 0xb3d3: /* SDTR - subtract */
4715 case 0xb3d6: /* LTDTR - load and test */
4716 /* float destination + flags + fpc */
4717 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4718 return -1;
4719 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4720 return -1;
4721 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4722 return -1;
4723 break;
4724
4725 case 0xb30e: /* MAEBR - multiply and add */
4726 case 0xb30f: /* MSEBR - multiply and subtract */
4727 case 0xb31e: /* MADBR - multiply and add */
4728 case 0xb31f: /* MSDBR - multiply and subtract */
4729 /* float destination [RRD] + fpc */
4730 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4731 return -1;
4732 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4733 return -1;
4734 break;
4735
4736 /* 0xb320-0xb323 undefined */
4737 /* 0xb327-0xb32d undefined */
4738
4739 case 0xb32e: /* MAER - multiply and add */
4740 case 0xb32f: /* MSER - multiply and subtract */
4741 case 0xb338: /* MAYLR - multiply and add unnormalized */
4742 case 0xb339: /* MYLR - multiply unnormalized */
4743 case 0xb33c: /* MAYHR - multiply and add unnormalized */
4744 case 0xb33d: /* MYHR - multiply unnormalized */
4745 case 0xb33e: /* MADR - multiply and add */
4746 case 0xb33f: /* MSDR - multiply and subtract */
4747 /* float destination [RRD] */
4748 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4749 return -1;
4750 break;
4751
4752 /* 0xb330-0xb335 undefined */
4753
4754 case 0xb33a: /* MAYR - multiply and add unnormalized */
4755 case 0xb33b: /* MYR - multiply unnormalized */
4756 /* float pair destination [RRD] */
4757 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4758 return -1;
4759 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4760 return -1;
4761 break;
4762
4763 case 0xb340: /* LPXBR - load positive */
4764 case 0xb341: /* LNXBR - load negative */
4765 case 0xb343: /* LCXBR - load complement */
4766 case 0xb360: /* LPXR - load positive */
4767 case 0xb361: /* LNXR - load negative */
4768 case 0xb362: /* LTXR - load and test */
4769 case 0xb363: /* LCXR - load complement */
4770 /* float pair destination + flags */
4771 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4772 return -1;
4773 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4774 return -1;
4775 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4776 return -1;
4777 break;
4778
4779 case 0xb342: /* LTXBR - load and test */
4780 case 0xb34a: /* AXBR - add */
4781 case 0xb34b: /* SXBR - subtract */
4782 case 0xb3da: /* AXTR - add */
4783 case 0xb3db: /* SXTR - subtract */
4784 case 0xb3de: /* LTXTR - load and test */
4785 /* float pair destination + flags + fpc */
4786 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4787 return -1;
4788 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4789 return -1;
4790 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4791 return -1;
4792 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4793 return -1;
4794 break;
4795
4796 /* 0xb34e-0xb34f undefined */
4797 /* 0xb352 undefined */
4798
4799 case 0xb353: /* DIEBR - divide to integer */
4800 case 0xb35b: /* DIDBR - divide to integer */
4801 /* two float destinations + flags + fpc */
4802 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4803 return -1;
4804 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4805 return -1;
4806 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4807 return -1;
4808 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4809 return -1;
4810 break;
4811
4812 /* 0xb354-0xb356 undefined */
4813 /* 0xb35a undefined */
4814
4815 /* 0xb35c-0xb35e undefined */
4816 /* 0xb364 undefined */
4817 /* 0xb368 undefined */
4818
4819 case 0xb369: /* CXR - compare */
4820 case 0xb3f4: /* CEDTR - compare biased exponent */
4821 case 0xb3fc: /* CEXTR - compare biased exponent */
4822 case 0xb920: /* CGR - compare */
4823 case 0xb921: /* CLGR - compare logical */
4824 case 0xb930: /* CGFR - compare */
4825 case 0xb931: /* CLGFR - compare logical */
4826 case 0xb9cd: /* CHHR - compare high */
4827 case 0xb9cf: /* CLHHR - compare logical high */
4828 case 0xb9dd: /* CHLR - compare high */
4829 case 0xb9df: /* CLHLR - compare logical high */
4830 /* flags only */
4831 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4832 return -1;
4833 break;
4834
4835 /* 0xb36a-0xb36f undefined */
4836 /* 0xb377-0xb37e undefined */
4837 /* 0xb380-0xb383 undefined */
4838 /* 0xb386-0xb38b undefined */
4839 /* 0xb38d-0xb38f undefined */
4840 /* 0xb393 undefined */
4841 /* 0xb397 undefined */
4842
4843 case 0xb398: /* CFEBR - convert to fixed */
4844 case 0xb399: /* CFDBR - convert to fixed */
4845 case 0xb39a: /* CFXBR - convert to fixed */
4846 case 0xb39c: /* CLFEBR - convert to logical */
4847 case 0xb39d: /* CLFDBR - convert to logical */
4848 case 0xb39e: /* CLFXBR - convert to logical */
4849 case 0xb941: /* CFDTR - convert to fixed */
4850 case 0xb949: /* CFXTR - convert to fixed */
4851 case 0xb943: /* CLFDTR - convert to logical */
4852 case 0xb94b: /* CLFXTR - convert to logical */
4853 /* 32-bit gpr destination + flags + fpc */
4854 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4855 return -1;
4856 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4857 return -1;
4858 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4859 return -1;
4860 break;
4861
4862 /* 0xb39b undefined */
4863 /* 0xb39f undefined */
4864
4865 /* 0xb3a3 undefined */
4866 /* 0xb3a7 undefined */
4867
4868 case 0xb3a8: /* CGEBR - convert to fixed */
4869 case 0xb3a9: /* CGDBR - convert to fixed */
4870 case 0xb3aa: /* CGXBR - convert to fixed */
4871 case 0xb3ac: /* CLGEBR - convert to logical */
4872 case 0xb3ad: /* CLGDBR - convert to logical */
4873 case 0xb3ae: /* CLGXBR - convert to logical */
4874 case 0xb3e1: /* CGDTR - convert to fixed */
4875 case 0xb3e9: /* CGXTR - convert to fixed */
4876 case 0xb942: /* CLGDTR - convert to logical */
4877 case 0xb94a: /* CLGXTR - convert to logical */
4878 /* 64-bit gpr destination + flags + fpc */
4879 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4880 return -1;
4881 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4882 return -1;
4883 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4884 return -1;
4885 break;
4886
4887 /* 0xb3ab undefined */
4888 /* 0xb3af-0xb3b3 undefined */
4889 /* 0xb3b7 undefined */
4890
4891 case 0xb3b8: /* CFER - convert to fixed */
4892 case 0xb3b9: /* CFDR - convert to fixed */
4893 case 0xb3ba: /* CFXR - convert to fixed */
4894 case 0xb998: /* ALCR - add logical with carry */
4895 case 0xb999: /* SLBR - subtract logical with borrow */
4896 case 0xb9f4: /* NRK - and */
4897 case 0xb9f6: /* ORK - or */
4898 case 0xb9f7: /* XRK - xor */
4899 case 0xb9f8: /* ARK - add */
4900 case 0xb9f9: /* SRK - subtract */
4901 case 0xb9fa: /* ALRK - add logical */
4902 case 0xb9fb: /* SLRK - subtract logical */
4903 /* 32-bit gpr destination + flags */
4904 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4905 return -1;
4906 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4907 return -1;
4908 break;
4909
4910 case 0xb3c8: /* CGER - convert to fixed */
4911 case 0xb3c9: /* CGDR - convert to fixed */
4912 case 0xb3ca: /* CGXR - convert to fixed */
4913 case 0xb900: /* LPGR - load positive */
4914 case 0xb901: /* LNGR - load negative */
4915 case 0xb902: /* LTGR - load and test */
4916 case 0xb903: /* LCGR - load complement */
4917 case 0xb908: /* AGR - add */
4918 case 0xb909: /* SGR - subtract */
4919 case 0xb90a: /* ALGR - add logical */
4920 case 0xb90b: /* SLGR - subtract logical */
4921 case 0xb910: /* LPGFR - load positive */
4922 case 0xb911: /* LNGFR - load negative */
4923 case 0xb912: /* LTGFR - load and test */
4924 case 0xb913: /* LCGFR - load complement */
4925 case 0xb918: /* AGFR - add */
4926 case 0xb919: /* SGFR - subtract */
4927 case 0xb91a: /* ALGFR - add logical */
4928 case 0xb91b: /* SLGFR - subtract logical */
4929 case 0xb980: /* NGR - and */
4930 case 0xb981: /* OGR - or */
4931 case 0xb982: /* XGR - xor */
4932 case 0xb988: /* ALCGR - add logical with carry */
4933 case 0xb989: /* SLBGR - subtract logical with borrow */
4934 case 0xb9e1: /* POPCNT - population count */
4935 case 0xb9e4: /* NGRK - and */
4936 case 0xb9e6: /* OGRK - or */
4937 case 0xb9e7: /* XGRK - xor */
4938 case 0xb9e8: /* AGRK - add */
4939 case 0xb9e9: /* SGRK - subtract */
4940 case 0xb9ea: /* ALGRK - add logical */
4941 case 0xb9eb: /* SLGRK - subtract logical */
4942 /* 64-bit gpr destination + flags */
4943 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4944 return -1;
4945 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4946 return -1;
4947 break;
4948
4949 /* 0xb3bb-0xb3c0 undefined */
4950 /* 0xb3c2-0xb3c3 undefined */
4951 /* 0xb3c7 undefined */
4952 /* 0xb3cb-0xb3cc undefined */
4953
4954 case 0xb3cd: /* LGDR - load gr from fpr */
4955 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4956 case 0xb3e3: /* CSDTR - convert to signed packed */
4957 case 0xb3e5: /* EEDTR - extract biased exponent */
4958 case 0xb3e7: /* ESDTR - extract significance */
4959 case 0xb3ed: /* EEXTR - extract biased exponent */
4960 case 0xb3ef: /* ESXTR - extract significance */
4961 case 0xb904: /* LGR - load */
4962 case 0xb906: /* LGBR - load byte */
4963 case 0xb907: /* LGHR - load halfword */
4964 case 0xb90c: /* MSGR - multiply single */
4965 case 0xb90f: /* LRVGR - load reversed */
4966 case 0xb914: /* LGFR - load */
4967 case 0xb916: /* LLGFR - load logical */
4968 case 0xb917: /* LLGTR - load logical thirty one bits */
4969 case 0xb91c: /* MSGFR - load */
4970 case 0xb946: /* BCTGR - branch on count */
4971 case 0xb984: /* LLGCR - load logical character */
4972 case 0xb985: /* LLGHR - load logical halfword */
4973 case 0xb9e2: /* LOCGR - load on condition */
4974 /* 64-bit gpr destination */
4975 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4976 return -1;
4977 break;
4978
4979 /* 0xb3ce-0xb3cf undefined */
4980 /* 0xb3e6 undefined */
4981
4982 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4983 case 0xb3eb: /* CSXTR - convert to signed packed */
4984 case 0xb90d: /* DSGR - divide single */
4985 case 0xb91d: /* DSGFR - divide single */
4986 case 0xb986: /* MLGR - multiply logical */
4987 case 0xb987: /* DLGR - divide logical */
4988 /* 64-bit gpr pair destination */
4989 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4990 return -1;
4991 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4992 return -1;
4993 break;
4994
4995 /* 0xb3ee undefined */
4996 /* 0xb3f0 undefined */
4997 /* 0xb3f8 undefined */
4998
4999 /* 0xb905 privileged */
5000
5001 /* 0xb90e unsupported: EREGG */
5002
5003 /* 0xb915 undefined */
5004
5005 case 0xb91e: /* KMAC - compute message authentication code [partial] */
5006 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5007 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5008 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5009 tmp &= 0xff;
5010 switch (tmp)
5011 {
5012 case 0x00: /* KMAC-Query */
5013 if (record_full_arch_list_add_mem (oaddr, 16))
5014 return -1;
5015 break;
5016
5017 case 0x01: /* KMAC-DEA */
5018 case 0x02: /* KMAC-TDEA-128 */
5019 case 0x03: /* KMAC-TDEA-192 */
5020 case 0x09: /* KMAC-Encrypted-DEA */
5021 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
5022 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
5023 if (record_full_arch_list_add_mem (oaddr, 8))
5024 return -1;
5025 break;
5026
5027 case 0x12: /* KMAC-AES-128 */
5028 case 0x13: /* KMAC-AES-192 */
5029 case 0x14: /* KMAC-AES-256 */
5030 case 0x1a: /* KMAC-Encrypted-AES-128 */
5031 case 0x1b: /* KMAC-Encrypted-AES-192 */
5032 case 0x1c: /* KMAC-Encrypted-AES-256 */
5033 if (record_full_arch_list_add_mem (oaddr, 16))
5034 return -1;
5035 break;
5036
5037 default:
5038 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5039 (int)tmp, paddress (gdbarch, addr));
5040 return -1;
5041 }
5042 if (tmp != 0)
5043 {
5044 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5045 return -1;
5046 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5047 return -1;
5048 }
5049 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5050 return -1;
5051 break;
5052
5053 /* 0xb922-0xb924 undefined */
5054 /* 0xb925 privileged */
5055 /* 0xb928 privileged */
5056 /* 0xb929 undefined */
5057
5058 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
5059 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
5060 case 0xb92f: /* KMC - cipher message with chaining [partial] */
5061 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5062 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5063 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5064 tmp &= 0x7f;
5065 switch (tmp)
5066 {
5067 case 0x00: /* KM*-Query */
5068 if (record_full_arch_list_add_mem (oaddr, 16))
5069 return -1;
5070 break;
5071
5072 case 0x01: /* KM*-DEA */
5073 case 0x02: /* KM*-TDEA-128 */
5074 case 0x03: /* KM*-TDEA-192 */
5075 case 0x09: /* KM*-Encrypted-DEA */
5076 case 0x0a: /* KM*-Encrypted-TDEA-128 */
5077 case 0x0b: /* KM*-Encrypted-TDEA-192 */
5078 if (record_full_arch_list_add_mem (oaddr, 8))
5079 return -1;
5080 break;
5081
5082 case 0x12: /* KM*-AES-128 */
5083 case 0x13: /* KM*-AES-192 */
5084 case 0x14: /* KM*-AES-256 */
5085 case 0x1a: /* KM*-Encrypted-AES-128 */
5086 case 0x1b: /* KM*-Encrypted-AES-192 */
5087 case 0x1c: /* KM*-Encrypted-AES-256 */
5088 if (record_full_arch_list_add_mem (oaddr, 16))
5089 return -1;
5090 break;
5091
5092 case 0x43: /* KMC-PRNG */
5093 /* Only valid for KMC. */
5094 if (insn[0] == 0xb92f)
5095 {
5096 if (record_full_arch_list_add_mem (oaddr, 8))
5097 return -1;
5098 break;
5099 }
5100 /* For other instructions, fallthru. */
5101 default:
5102 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
5103 (int)tmp, paddress (gdbarch, addr));
5104 return -1;
5105 }
5106 if (tmp != 0)
5107 {
5108 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5109 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5110 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5111 if (record_full_arch_list_add_mem (oaddr2, tmp))
5112 return -1;
5113 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5114 return -1;
5115 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5116 return -1;
5117 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5118 return -1;
5119 }
5120 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5121 return -1;
5122 break;
5123
5124 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
5125 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5126 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5127 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5128 tmp &= 0x7f;
5129 switch (tmp)
5130 {
5131 case 0x00: /* PCC-Query */
5132 if (record_full_arch_list_add_mem (oaddr, 16))
5133 return -1;
5134 break;
5135
5136 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
5137 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
5138 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
5139 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
5140 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
5141 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
5142 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
5143 return -1;
5144 break;
5145
5146 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
5147 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
5148 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
5149 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
5150 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
5151 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
5152 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
5153 return -1;
5154 break;
5155
5156 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
5157 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
5158 return -1;
5159 break;
5160
5161 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
5162 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
5163 return -1;
5164 break;
5165
5166 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
5167 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
5168 return -1;
5169 break;
5170
5171 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
5172 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
5173 return -1;
5174 break;
5175
5176 default:
5177 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
5178 (int)tmp, paddress (gdbarch, addr));
5179 return -1;
5180 }
5181 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5182 return -1;
5183 break;
5184
5185 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
5186 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5187 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5188 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5189 tmp &= 0x7f;
5190 switch (tmp)
5191 {
5192 case 0x00: /* KMCTR-Query */
5193 if (record_full_arch_list_add_mem (oaddr, 16))
5194 return -1;
5195 break;
5196
5197 case 0x01: /* KMCTR-DEA */
5198 case 0x02: /* KMCTR-TDEA-128 */
5199 case 0x03: /* KMCTR-TDEA-192 */
5200 case 0x09: /* KMCTR-Encrypted-DEA */
5201 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
5202 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
5203 case 0x12: /* KMCTR-AES-128 */
5204 case 0x13: /* KMCTR-AES-192 */
5205 case 0x14: /* KMCTR-AES-256 */
5206 case 0x1a: /* KMCTR-Encrypted-AES-128 */
5207 case 0x1b: /* KMCTR-Encrypted-AES-192 */
5208 case 0x1c: /* KMCTR-Encrypted-AES-256 */
5209 break;
5210
5211 default:
5212 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
5213 (int)tmp, paddress (gdbarch, addr));
5214 return -1;
5215 }
5216 if (tmp != 0)
5217 {
5218 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5219 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5220 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5221 if (record_full_arch_list_add_mem (oaddr2, tmp))
5222 return -1;
5223 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5224 return -1;
5225 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5226 return -1;
5227 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5228 return -1;
5229 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
5230 return -1;
5231 }
5232 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5233 return -1;
5234 break;
5235
5236 case 0xb92e: /* KM - cipher message [partial] */
5237 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5238 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5239 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5240 tmp &= 0x7f;
5241 switch (tmp)
5242 {
5243 case 0x00: /* KM-Query */
5244 if (record_full_arch_list_add_mem (oaddr, 16))
5245 return -1;
5246 break;
5247
5248 case 0x01: /* KM-DEA */
5249 case 0x02: /* KM-TDEA-128 */
5250 case 0x03: /* KM-TDEA-192 */
5251 case 0x09: /* KM-Encrypted-DEA */
5252 case 0x0a: /* KM-Encrypted-TDEA-128 */
5253 case 0x0b: /* KM-Encrypted-TDEA-192 */
5254 case 0x12: /* KM-AES-128 */
5255 case 0x13: /* KM-AES-192 */
5256 case 0x14: /* KM-AES-256 */
5257 case 0x1a: /* KM-Encrypted-AES-128 */
5258 case 0x1b: /* KM-Encrypted-AES-192 */
5259 case 0x1c: /* KM-Encrypted-AES-256 */
5260 break;
5261
5262 case 0x32: /* KM-XTS-AES-128 */
5263 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
5264 return -1;
5265 break;
5266
5267 case 0x34: /* KM-XTS-AES-256 */
5268 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
5269 return -1;
5270 break;
5271
5272 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
5273 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
5274 return -1;
5275 break;
5276
5277 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
5278 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
5279 return -1;
5280 break;
5281
5282 default:
5283 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
5284 (int)tmp, paddress (gdbarch, addr));
5285 return -1;
5286 }
5287 if (tmp != 0)
5288 {
5289 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5290 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5291 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5292 if (record_full_arch_list_add_mem (oaddr2, tmp))
5293 return -1;
5294 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5295 return -1;
5296 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5297 return -1;
5298 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5299 return -1;
5300 }
5301 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5302 return -1;
5303 break;
5304
5305 /* 0xb932-0xb93b undefined */
5306
5307 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
5308 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5309 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5310 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5311 tmp &= 0xff;
5312 switch (tmp)
5313 {
5314 case 0x00: /* PPNO-Query */
5315 case 0x80: /* PPNO-Query */
5316 if (record_full_arch_list_add_mem (oaddr, 16))
5317 return -1;
5318 break;
5319
5320 case 0x03: /* PPNO-SHA-512-DRNG - generate */
5321 if (record_full_arch_list_add_mem (oaddr, 240))
5322 return -1;
5323 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5324 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5325 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5326 if (record_full_arch_list_add_mem (oaddr2, tmp))
5327 return -1;
5328 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5329 return -1;
5330 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5331 return -1;
5332 break;
5333
5334 case 0x83: /* PPNO-SHA-512-DRNG - seed */
5335 if (record_full_arch_list_add_mem (oaddr, 240))
5336 return -1;
5337 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5338 return -1;
5339 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5340 return -1;
5341 break;
5342
5343 default:
5344 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
5345 (int)tmp, paddress (gdbarch, addr));
5346 return -1;
5347 }
5348 /* DXC may be written */
5349 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5350 return -1;
5351 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5352 return -1;
5353 break;
5354
5355 /* 0xb93d undefined */
5356
5357 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
5358 case 0xb93f: /* KLMD - compute last message digest [partial] */
5359 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5360 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5361 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5362 tmp &= 0xff;
5363 switch (tmp)
5364 {
5365 case 0x00: /* K*MD-Query */
5366 if (record_full_arch_list_add_mem (oaddr, 16))
5367 return -1;
5368 break;
5369
5370 case 0x01: /* K*MD-SHA-1 */
5371 if (record_full_arch_list_add_mem (oaddr, 20))
5372 return -1;
5373 break;
5374
5375 case 0x02: /* K*MD-SHA-256 */
5376 if (record_full_arch_list_add_mem (oaddr, 32))
5377 return -1;
5378 break;
5379
5380 case 0x03: /* K*MD-SHA-512 */
5381 if (record_full_arch_list_add_mem (oaddr, 64))
5382 return -1;
5383 break;
5384
5385 case 0x41: /* KIMD-GHASH */
5386 /* Only valid for KIMD. */
5387 if (insn[0] == 0xb93e)
5388 {
5389 if (record_full_arch_list_add_mem (oaddr, 16))
5390 return -1;
5391 break;
5392 }
5393 /* For KLMD, fallthru. */
5394 default:
5395 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5396 (int)tmp, paddress (gdbarch, addr));
5397 return -1;
5398 }
5399 if (tmp != 0)
5400 {
5401 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5402 return -1;
5403 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5404 return -1;
5405 }
5406 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5407 return -1;
5408 break;
5409
5410 /* 0xb940 undefined */
5411 /* 0xb944-0xb945 undefined */
5412 /* 0xb947-0xb948 undefined */
5413 /* 0xb94c-0xb950 undefined */
5414 /* 0xb954-0xb958 undefined */
5415 /* 0xb95c-0xb95f undefined */
5416 /* 0xb962-0xb971 undefined */
5417 /* 0xb974-0xb97f undefined */
5418
5419 case 0xb983: /* FLOGR - find leftmost one */
5420 /* 64-bit gpr pair destination + flags */
5421 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5422 return -1;
5423 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5424 return -1;
5425 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5426 return -1;
5427 break;
5428
5429 /* 0xb98a privileged */
5430 /* 0xb98b-0xb98c undefined */
5431
5432 case 0xb98d: /* EPSW - extract psw */
5433 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5434 return -1;
5435 if (inib[7])
5436 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5437 return -1;
5438 break;
5439
5440 /* 0xb98e-0xb98f privileged */
5441
5442 case 0xb990: /* TRTT - translate two to two [partial] */
5443 case 0xb991: /* TRTO - translate two to one [partial] */
5444 case 0xb992: /* TROT - translate one to two [partial] */
5445 case 0xb993: /* TROO - translate one to one [partial] */
5446 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5447 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5448 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5449 /* tmp is source length, we want destination length. Adjust. */
5450 if (insn[0] == 0xb991)
5451 tmp >>= 1;
5452 if (insn[0] == 0xb992)
5453 tmp <<= 1;
5454 if (record_full_arch_list_add_mem (oaddr, tmp))
5455 return -1;
5456 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5457 return -1;
5458 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5459 return -1;
5460 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5461 return -1;
5462 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5463 return -1;
5464 break;
5465
5466 case 0xb996: /* MLR - multiply logical */
5467 case 0xb997: /* DLR - divide logical */
5468 /* 32-bit gpr pair destination */
5469 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5470 return -1;
5471 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5472 return -1;
5473 break;
5474
5475 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
5476 /* 0xb9b4-0xb9bc undefined */
5477
5478 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
5479 case 0xb9bf: /* TRTE - translate and test extended [partial] */
5480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5481 return -1;
5482 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5483 return -1;
5484 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5485 return -1;
5486 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5487 return -1;
5488 break;
5489
5490 /* 0xb9c0-0xb9c7 undefined */
5491
5492 case 0xb9c8: /* AHHHR - add high */
5493 case 0xb9c9: /* SHHHR - subtract high */
5494 case 0xb9ca: /* ALHHHR - add logical high */
5495 case 0xb9cb: /* SLHHHR - subtract logical high */
5496 case 0xb9d8: /* AHHLR - add high */
5497 case 0xb9d9: /* SHHLR - subtract high */
5498 case 0xb9da: /* ALHHLR - add logical high */
5499 case 0xb9db: /* SLHHLR - subtract logical high */
5500 /* 32-bit high gpr destination + flags */
5501 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5502 return -1;
5503 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5504 return -1;
5505 break;
5506
5507 /* 0xb9cc undefined */
5508 /* 0xb9ce undefined */
5509 /* 0xb9d0-0xb9d7 undefined */
5510 /* 0xb9dc undefined */
5511 /* 0xb9de undefined */
5512
5513 case 0xb9e0: /* LOCFHR - load high on condition */
5514 /* 32-bit high gpr destination */
5515 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5516 return -1;
5517 break;
5518
5519 /* 0xb9e3 undefined */
5520 /* 0xb9e5 undefined */
5521 /* 0xb9ec-0xb9f1 undefined */
5522 /* 0xb9f3 undefined */
5523 /* 0xb9f5 undefined */
5524 /* 0xb9fc-0xb9ff undefined */
5525
5526 default:
5527 goto UNKNOWN_OP;
5528 }
5529 break;
5530
5531 /* 0xb4-0xb5 undefined */
5532 /* 0xb6 privileged: STCTL - store control */
5533 /* 0xb7 privileged: LCTL - load control */
5534 /* 0xb8 undefined */
5535
5536 case 0xba: /* CS - compare and swap */
5537 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5538 if (record_full_arch_list_add_mem (oaddr, 4))
5539 return -1;
5540 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5541 return -1;
5542 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5543 return -1;
5544 break;
5545
5546 case 0xbb: /* CDS - compare double and swap */
5547 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5548 if (record_full_arch_list_add_mem (oaddr, 8))
5549 return -1;
5550 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5551 return -1;
5552 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5553 return -1;
5554 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5555 return -1;
5556 break;
5557
5558 /* 0xbc undefined */
5559
5560 case 0xbe: /* STCM - store characters under mask */
5561 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5562 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5563 return -1;
5564 break;
5565
5566 case 0xc0:
5567 case 0xc2:
5568 case 0xc4:
5569 case 0xc6:
5570 case 0xcc:
5571 /* RIL-format instruction */
5572 switch (ibyte[0] << 4 | inib[3])
5573 {
5574 case 0xc00: /* LARL - load address relative long */
5575 case 0xc05: /* BRASL - branch relative and save long */
5576 case 0xc09: /* IILF - insert immediate */
5577 case 0xc21: /* MSFI - multiply single immediate */
5578 case 0xc42: /* LLHRL - load logical halfword relative long */
5579 case 0xc45: /* LHRL - load halfword relative long */
5580 case 0xc4d: /* LRL - load relative long */
5581 /* 32-bit or native gpr destination */
5582 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5583 return -1;
5584 break;
5585
5586 case 0xc01: /* LGFI - load immediate */
5587 case 0xc0e: /* LLIHF - load logical immediate */
5588 case 0xc0f: /* LLILF - load logical immediate */
5589 case 0xc20: /* MSGFI - multiply single immediate */
5590 case 0xc44: /* LGHRL - load halfword relative long */
5591 case 0xc46: /* LLGHRL - load logical halfword relative long */
5592 case 0xc48: /* LGRL - load relative long */
5593 case 0xc4c: /* LGFRL - load relative long */
5594 case 0xc4e: /* LLGFRL - load logical relative long */
5595 /* 64-bit gpr destination */
5596 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5597 return -1;
5598 break;
5599
5600 /* 0xc02-0xc03 undefined */
5601
5602 case 0xc04: /* BRCL - branch relative on condition long */
5603 case 0xc62: /* PFDRL - prefetch data relative long */
5604 break;
5605
5606 case 0xc06: /* XIHF - xor immediate */
5607 case 0xc0a: /* NIHF - and immediate */
5608 case 0xc0c: /* OIHF - or immediate */
5609 case 0xcc8: /* AIH - add immediate high */
5610 case 0xcca: /* ALSIH - add logical with signed immediate high */
5611 /* 32-bit high gpr destination + flags */
5612 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5613 return -1;
5614 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5615 return -1;
5616 break;
5617
5618 case 0xc07: /* XILF - xor immediate */
5619 case 0xc0b: /* NILF - and immediate */
5620 case 0xc0d: /* OILF - or immediate */
5621 case 0xc25: /* SLFI - subtract logical immediate */
5622 case 0xc29: /* AFI - add immediate */
5623 case 0xc2b: /* ALFI - add logical immediate */
5624 /* 32-bit gpr destination + flags */
5625 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5626 return -1;
5627 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5628 return -1;
5629 break;
5630
5631 case 0xc08: /* IIHF - insert immediate */
5632 case 0xcc6: /* BRCTH - branch relative on count high */
5633 case 0xccb: /* ALSIHN - add logical with signed immediate high */
5634 /* 32-bit high gpr destination */
5635 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5636 return -1;
5637 break;
5638
5639 /* 0xc22-0xc23 undefined */
5640
5641 case 0xc24: /* SLGFI - subtract logical immediate */
5642 case 0xc28: /* AGFI - add immediate */
5643 case 0xc2a: /* ALGFI - add logical immediate */
5644 /* 64-bit gpr destination + flags */
5645 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5646 return -1;
5647 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5648 return -1;
5649 break;
5650
5651 /* 0xc26-0xc27 undefined */
5652
5653 case 0xc2c: /* CGFI - compare immediate */
5654 case 0xc2d: /* CFI - compare immediate */
5655 case 0xc2e: /* CLGFI - compare logical immediate */
5656 case 0xc2f: /* CLFI - compare logical immediate */
5657 case 0xc64: /* CGHRL - compare halfword relative long */
5658 case 0xc65: /* CHRL - compare halfword relative long */
5659 case 0xc66: /* CLGHRL - compare logical halfword relative long */
5660 case 0xc67: /* CLHRL - compare logical halfword relative long */
5661 case 0xc68: /* CGRL - compare relative long */
5662 case 0xc6a: /* CLGRL - compare logical relative long */
5663 case 0xc6c: /* CGFRL - compare relative long */
5664 case 0xc6d: /* CRL - compare relative long */
5665 case 0xc6e: /* CLGFRL - compare logical relative long */
5666 case 0xc6f: /* CLRL - compare logical relative long */
5667 case 0xccd: /* CIH - compare immediate high */
5668 case 0xccf: /* CLIH - compare logical immediate high */
5669 /* flags only */
5670 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5671 return -1;
5672 break;
5673
5674 /* 0xc40-0xc41 undefined */
5675 /* 0xc43 undefined */
5676
5677 case 0xc47: /* STHRL - store halfword relative long */
5678 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5679 if (record_full_arch_list_add_mem (oaddr, 2))
5680 return -1;
5681 break;
5682
5683 /* 0xc49-0xc4a undefined */
5684
5685 case 0xc4b: /* STGRL - store relative long */
5686 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5687 if (record_full_arch_list_add_mem (oaddr, 8))
5688 return -1;
5689 break;
5690
5691 case 0xc4f: /* STRL - store relative long */
5692 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5693 if (record_full_arch_list_add_mem (oaddr, 4))
5694 return -1;
5695 break;
5696
5697 case 0xc60: /* EXRL - execute relative long */
5698 if (ex != -1)
5699 {
5700 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
5701 paddress (gdbarch, addr));
5702 return -1;
5703 }
5704 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5705 if (inib[2])
5706 {
5707 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5708 ex = tmp & 0xff;
5709 }
5710 else
5711 {
5712 ex = 0;
5713 }
5714 goto ex;
5715
5716 /* 0xc61 undefined */
5717 /* 0xc63 undefined */
5718 /* 0xc69 undefined */
5719 /* 0xc6b undefined */
5720 /* 0xcc0-0xcc5 undefined */
5721 /* 0xcc7 undefined */
5722 /* 0xcc9 undefined */
5723 /* 0xccc undefined */
5724 /* 0xcce undefined */
5725
5726 default:
5727 goto UNKNOWN_OP;
5728 }
5729 break;
5730
5731 /* 0xc1 undefined */
5732 /* 0xc3 undefined */
5733
5734 case 0xc5: /* BPRP - branch prediction relative preload */
5735 case 0xc7: /* BPP - branch prediction preload */
5736 /* no visible effect */
5737 break;
5738
5739 case 0xc8:
5740 /* SSF-format instruction */
5741 switch (ibyte[0] << 4 | inib[3])
5742 {
5743 /* 0xc80 unsupported */
5744
5745 case 0xc81: /* ECTG - extract cpu time */
5746 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5747 return -1;
5748 if (s390_record_gpr_g (gdbarch, regcache, 0))
5749 return -1;
5750 if (s390_record_gpr_g (gdbarch, regcache, 1))
5751 return -1;
5752 break;
5753
5754 case 0xc82: /* CSST - compare and swap and store */
5755 {
5756 uint8_t fc, sc;
5757 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5758 fc = tmp & 0xff;
5759 sc = tmp >> 8 & 0xff;
5760
5761 /* First and third operands. */
5762 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5763 switch (fc)
5764 {
5765 case 0x00: /* 32-bit */
5766 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5767 return -1;
5768 if (record_full_arch_list_add_mem (oaddr, 4))
5769 return -1;
5770 break;
5771
5772 case 0x01: /* 64-bit */
5773 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5774 return -1;
5775 if (record_full_arch_list_add_mem (oaddr, 8))
5776 return -1;
5777 break;
5778
5779 case 0x02: /* 128-bit */
5780 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5781 return -1;
5782 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5783 return -1;
5784 if (record_full_arch_list_add_mem (oaddr, 16))
5785 return -1;
5786 break;
5787
5788 default:
5789 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5790 fc, paddress (gdbarch, addr));
5791 return -1;
5792 }
5793
5794 /* Second operand. */
5795 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5796 if (sc > 4)
5797 {
5798 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5799 sc, paddress (gdbarch, addr));
5800 return -1;
5801 }
5802
5803 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5804 return -1;
5805
5806 /* Flags. */
5807 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5808 return -1;
5809 }
5810 break;
5811
5812 /* 0xc83 undefined */
5813
5814 case 0xc84: /* LPD - load pair disjoint */
5815 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5816 return -1;
5817 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5818 return -1;
5819 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5820 return -1;
5821 break;
5822
5823 case 0xc85: /* LPDG - load pair disjoint */
5824 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5825 return -1;
5826 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5827 return -1;
5828 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5829 return -1;
5830 break;
5831
5832 /* 0xc86-0xc8f undefined */
5833
5834 default:
5835 goto UNKNOWN_OP;
5836 }
5837 break;
5838
5839 /* 0xc9-0xcb undefined */
5840 /* 0xcd-0xcf undefined */
5841
5842 case 0xd0: /* TRTR - translate and test reversed */
5843 case 0xdd: /* TRT - translate and test */
5844 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5845 return -1;
5846 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5847 return -1;
5848 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5849 return -1;
5850 break;
5851
5852 case 0xd1: /* MVN - move numbers */
5853 case 0xd2: /* MVC - move */
5854 case 0xd3: /* MVZ - move zones */
5855 case 0xdc: /* TR - translate */
5856 case 0xe8: /* MVCIN - move inverse */
5857 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5858 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5859 return -1;
5860 break;
5861
5862 case 0xd4: /* NC - and */
5863 case 0xd6: /* OC - or*/
5864 case 0xd7: /* XC - xor */
5865 case 0xe2: /* UNPKU - unpack unicode */
5866 case 0xea: /* UNPKA - unpack ASCII */
5867 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5868 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5869 return -1;
5870 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5871 return -1;
5872 break;
5873
5874 case 0xde: /* ED - edit */
5875 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5876 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5877 return -1;
5878 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5879 return -1;
5880 /* DXC may be written */
5881 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5882 return -1;
5883 break;
5884
5885 case 0xdf: /* EDMK - edit and mark */
5886 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5887 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5888 return -1;
5889 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5890 return -1;
5891 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5892 return -1;
5893 /* DXC may be written */
5894 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5895 return -1;
5896 break;
5897
5898 /* 0xd8 undefined */
5899 /* 0xd9 unsupported: MVCK - move with key */
5900 /* 0xda unsupported: MVCP - move to primary */
5901 /* 0xdb unsupported: MVCS - move to secondary */
5902 /* 0xe0 undefined */
5903
5904 case 0xe1: /* PKU - pack unicode */
5905 case 0xe9: /* PKA - pack ASCII */
5906 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5907 if (record_full_arch_list_add_mem (oaddr, 16))
5908 return -1;
5909 break;
5910
5911 case 0xe3:
5912 case 0xe7:
5913 case 0xeb:
5914 case 0xed:
5915 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5916 switch (ibyte[0] << 8 | ibyte[5])
5917 {
5918 /* 0xe300-0xe301 undefined */
5919
5920 case 0xe302: /* LTG - load and test */
5921 case 0xe308: /* AG - add */
5922 case 0xe309: /* SG - subtract */
5923 case 0xe30a: /* ALG - add logical */
5924 case 0xe30b: /* SLG - subtract logical */
5925 case 0xe318: /* AGF - add */
5926 case 0xe319: /* SGF - subtract */
5927 case 0xe31a: /* ALGF - add logical */
5928 case 0xe31b: /* SLGF - subtract logical */
5929 case 0xe332: /* LTGF - load and test */
5930 case 0xe380: /* NG - and */
5931 case 0xe381: /* OG - or */
5932 case 0xe382: /* XG - xor */
5933 case 0xe388: /* ALCG - add logical with carry */
5934 case 0xe389: /* SLBG - subtract logical with borrow */
5935 case 0xeb0a: /* SRAG - shift right single */
5936 case 0xeb0b: /* SLAG - shift left single */
5937 /* 64-bit gpr destination + flags */
5938 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5939 return -1;
5940 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5941 return -1;
5942 break;
5943
5944 /* 0xe303 privileged */
5945
5946 case 0xe304: /* LG - load */
5947 case 0xe30c: /* MSG - multiply single */
5948 case 0xe30f: /* LRVG - load reversed */
5949 case 0xe314: /* LGF - load */
5950 case 0xe315: /* LGH - load halfword */
5951 case 0xe316: /* LLGF - load logical */
5952 case 0xe317: /* LLGT - load logical thirty one bits */
5953 case 0xe31c: /* MSGF - multiply single */
5954 case 0xe32a: /* LZRG - load and zero rightmost byte */
5955 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5956 case 0xe346: /* BCTG - branch on count */
5957 case 0xe377: /* LGB - load byte */
5958 case 0xe390: /* LLGC - load logical character */
5959 case 0xe391: /* LLGH - load logical halfword */
5960 case 0xeb0c: /* SRLG - shift right single logical */
5961 case 0xeb0d: /* SLLG - shift left single logical */
5962 case 0xeb1c: /* RLLG - rotate left single logical */
5963 case 0xeb44: /* BXHG - branch on index high */
5964 case 0xeb45: /* BXLEG - branch on index low or equal */
5965 case 0xeb4c: /* ECAG - extract cpu attribute */
5966 case 0xebe2: /* LOCG - load on condition */
5967 /* 64-bit gpr destination */
5968 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5969 return -1;
5970 break;
5971
5972 /* 0xe305 undefined */
5973
5974 case 0xe306: /* CVBY - convert to binary */
5975 /* 32-bit or native gpr destination + FPC (DXC write) */
5976 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5977 return -1;
5978 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5979 return -1;
5980 break;
5981
5982 /* 0xe307 undefined */
5983
5984 case 0xe30d: /* DSG - divide single */
5985 case 0xe31d: /* DSGF - divide single */
5986 case 0xe386: /* MLG - multiply logical */
5987 case 0xe387: /* DLG - divide logical */
5988 case 0xe38f: /* LPQ - load pair from quadword */
5989 /* 64-bit gpr pair destination */
5990 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5991 return -1;
5992 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5993 return -1;
5994 break;
5995
5996 case 0xe30e: /* CVBG - convert to binary */
5997 /* 64-bit gpr destination + FPC (DXC write) */
5998 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5999 return -1;
6000 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6001 return -1;
6002 break;
6003
6004 /* 0xe310-0xe311 undefined */
6005
6006 case 0xe312: /* LT - load and test */
6007 case 0xe354: /* NY - and */
6008 case 0xe356: /* OY - or */
6009 case 0xe357: /* XY - xor */
6010 case 0xe35a: /* AY - add */
6011 case 0xe35b: /* SY - subtract */
6012 case 0xe35e: /* ALY - add logical */
6013 case 0xe35f: /* SLY - subtract logical */
6014 case 0xe37a: /* AHY - add halfword */
6015 case 0xe37b: /* SHY - subtract halfword */
6016 case 0xe398: /* ALC - add logical with carry */
6017 case 0xe399: /* SLB - subtract logical with borrow */
6018 case 0xe727: /* LCBB - load count to block bounduary */
6019 case 0xeb81: /* ICMY - insert characters under mask */
6020 case 0xebdc: /* SRAK - shift left single */
6021 case 0xebdd: /* SLAK - shift left single */
6022 /* 32-bit gpr destination + flags */
6023 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6024 return -1;
6025 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6026 return -1;
6027 break;
6028
6029 /* 0xe313 privileged */
6030
6031 case 0xe31e: /* LRV - load reversed */
6032 case 0xe31f: /* LRVH - load reversed */
6033 case 0xe33b: /* LZRF - load and zero rightmost byte */
6034 case 0xe351: /* MSY - multiply single */
6035 case 0xe358: /* LY - load */
6036 case 0xe371: /* LAY - load address */
6037 case 0xe373: /* ICY - insert character */
6038 case 0xe376: /* LB - load byte */
6039 case 0xe378: /* LHY - load */
6040 case 0xe37c: /* MHY - multiply halfword */
6041 case 0xe394: /* LLC - load logical character */
6042 case 0xe395: /* LLH - load logical halfword */
6043 case 0xeb1d: /* RLL - rotate left single logical */
6044 case 0xebde: /* SRLK - shift left single logical */
6045 case 0xebdf: /* SLLK - shift left single logical */
6046 case 0xebf2: /* LOC - load on condition */
6047 /* 32-bit or native gpr destination */
6048 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6049 return -1;
6050 break;
6051
6052 case 0xe320: /* CG - compare */
6053 case 0xe321: /* CLG - compare logical */
6054 case 0xe330: /* CGF - compare */
6055 case 0xe331: /* CLGF - compare logical */
6056 case 0xe334: /* CGH - compare halfword */
6057 case 0xe355: /* CLY - compare logical */
6058 case 0xe359: /* CY - compare */
6059 case 0xe379: /* CHY - compare halfword */
6060 case 0xe3cd: /* CHF - compare high */
6061 case 0xe3cf: /* CLHF - compare logical high */
6062 case 0xeb20: /* CLMH - compare logical under mask high */
6063 case 0xeb21: /* CLMY - compare logical under mask */
6064 case 0xeb51: /* TMY - test under mask */
6065 case 0xeb55: /* CLIY - compare logical */
6066 case 0xebc0: /* TP - test decimal */
6067 case 0xed10: /* TCEB - test data class */
6068 case 0xed11: /* TCDB - test data class */
6069 case 0xed12: /* TCXB - test data class */
6070 case 0xed50: /* TDCET - test data class */
6071 case 0xed51: /* TDGET - test data group */
6072 case 0xed54: /* TDCDT - test data class */
6073 case 0xed55: /* TDGDT - test data group */
6074 case 0xed58: /* TDCXT - test data class */
6075 case 0xed59: /* TDGXT - test data group */
6076 /* flags only */
6077 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6078 return -1;
6079 break;
6080
6081 /* 0xe322-0xe323 undefined */
6082
6083 case 0xe324: /* STG - store */
6084 case 0xe325: /* NTSTG - nontransactional store */
6085 case 0xe326: /* CVDY - convert to decimal */
6086 case 0xe32f: /* STRVG - store reversed */
6087 case 0xebe3: /* STOCG - store on condition */
6088 case 0xed67: /* STDY - store */
6089 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6090 if (record_full_arch_list_add_mem (oaddr, 8))
6091 return -1;
6092 break;
6093
6094 /* 0xe327-0xe329 undefined */
6095 /* 0xe32b-0xe32d undefined */
6096
6097 case 0xe32e: /* CVDG - convert to decimal */
6098 case 0xe38e: /* STPQ - store pair to quadword */
6099 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6100 if (record_full_arch_list_add_mem (oaddr, 16))
6101 return -1;
6102 break;
6103
6104 /* 0xe333 undefined */
6105 /* 0xe335 undefined */
6106
6107 case 0xe336: /* PFD - prefetch data */
6108 break;
6109
6110 /* 0xe337-0xe339 undefined */
6111 /* 0xe33c-0xe33d undefined */
6112
6113 case 0xe33e: /* STRV - store reversed */
6114 case 0xe350: /* STY - store */
6115 case 0xe3cb: /* STFH - store high */
6116 case 0xebe1: /* STOCFH - store high on condition */
6117 case 0xebf3: /* STOC - store on condition */
6118 case 0xed66: /* STEY - store */
6119 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6120 if (record_full_arch_list_add_mem (oaddr, 4))
6121 return -1;
6122 break;
6123
6124 case 0xe33f: /* STRVH - store reversed */
6125 case 0xe370: /* STHY - store halfword */
6126 case 0xe3c7: /* STHH - store halfword high */
6127 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6128 if (record_full_arch_list_add_mem (oaddr, 2))
6129 return -1;
6130 break;
6131
6132 /* 0xe340-0xe345 undefined */
6133 /* 0xe347-0xe34f undefined */
6134 /* 0xe352-0xe353 undefined */
6135
6136 case 0xe35c: /* MFY - multiply */
6137 case 0xe396: /* ML - multiply logical */
6138 case 0xe397: /* DL - divide logical */
6139 /* 32-bit gpr pair destination */
6140 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6141 return -1;
6142 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6143 return -1;
6144 break;
6145
6146 /* 0xe35d undefined */
6147 /* 0xe360-0xe36f undefined */
6148
6149 case 0xe372: /* STCY - store character */
6150 case 0xe3c3: /* STCH - store character high */
6151 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6152 if (record_full_arch_list_add_mem (oaddr, 1))
6153 return -1;
6154 break;
6155
6156 /* 0xe374 undefined */
6157
6158 case 0xe375: /* LAEY - load address extended */
6159 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6160 return -1;
6161 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
6162 return -1;
6163 break;
6164
6165 /* 0xe37d-0xe37f undefined */
6166 /* 0xe383-0xe384 undefined */
6167
6168 case 0xe385: /* LGAT - load and trap */
6169 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
6170 case 0xe39d: /* LLGFAT - load logical and trap */
6171 case 0xe721: /* VLGV - vector load gr from vr element */
6172 /* 64-bit gpr destination + fpc for possible DXC write */
6173 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6174 return -1;
6175 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6176 return -1;
6177 break;
6178
6179 /* 0xe38a-0xe38d undefined */
6180 /* 0xe392-0xe393 undefined */
6181 /* 0xe39a-0xe39b undefined */
6182 /* 0xe39e undefined */
6183
6184 case 0xe39f: /* LAT - load and trap */
6185 /* 32-bit gpr destination + fpc for possible DXC write */
6186 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6187 return -1;
6188 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6189 return -1;
6190 break;
6191
6192 /* 0xe3a0-0xe3bf undefined */
6193
6194 case 0xe3c0: /* LBH - load byte high */
6195 case 0xe3c2: /* LLCH - load logical character high */
6196 case 0xe3c4: /* LHH - load halfword high */
6197 case 0xe3c6: /* LLHH - load logical halfword high */
6198 case 0xe3ca: /* LFH - load high */
6199 case 0xebe0: /* LOCFH - load high on condition */
6200 /* 32-bit high gpr destination */
6201 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6202 return -1;
6203 break;
6204
6205 /* 0xe3c1 undefined */
6206 /* 0xe3c5 undefined */
6207
6208 case 0xe3c8: /* LFHAT - load high and trap */
6209 /* 32-bit high gpr destination + fpc for possible DXC write */
6210 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6211 return -1;
6212 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6213 return -1;
6214 break;
6215
6216 /* 0xe3c9 undefined */
6217 /* 0xe3cc undefined */
6218 /* 0xe3ce undefined */
6219 /* 0xe3d0-0xe3ff undefined */
6220
6221 case 0xe700: /* VLEB - vector load element */
6222 case 0xe701: /* VLEH - vector load element */
6223 case 0xe702: /* VLEG - vector load element */
6224 case 0xe703: /* VLEF - vector load element */
6225 case 0xe704: /* VLLEZ - vector load logical element and zero */
6226 case 0xe705: /* VLREP - vector load and replicate */
6227 case 0xe706: /* VL - vector load */
6228 case 0xe707: /* VLBB - vector load to block bounduary */
6229 case 0xe712: /* VGEG - vector gather element */
6230 case 0xe713: /* VGEF - vector gather element */
6231 case 0xe722: /* VLVG - vector load vr element from gr */
6232 case 0xe730: /* VESL - vector element shift left */
6233 case 0xe733: /* VERLL - vector element rotate left logical */
6234 case 0xe737: /* VLL - vector load with length */
6235 case 0xe738: /* VESRL - vector element shift right logical */
6236 case 0xe73a: /* VESRA - vector element shift right arithmetic */
6237 case 0xe740: /* VLEIB - vector load element immediate */
6238 case 0xe741: /* VLEIH - vector load element immediate */
6239 case 0xe742: /* VLEIG - vector load element immediate */
6240 case 0xe743: /* VLEIF - vector load element immediate */
6241 case 0xe744: /* VGBM - vector generate byte mask */
6242 case 0xe745: /* VREPI - vector replicate immediate */
6243 case 0xe746: /* VGM - vector generate mask */
6244 case 0xe74d: /* VREP - vector replicate */
6245 case 0xe750: /* VPOPCT - vector population count */
6246 case 0xe752: /* VCTZ - vector count trailing zeros */
6247 case 0xe753: /* VCLZ - vector count leading zeros */
6248 case 0xe756: /* VLR - vector load */
6249 case 0xe75f: /* VSEG -vector sign extend to doubleword */
6250 case 0xe760: /* VMRL - vector merge low */
6251 case 0xe761: /* VMRH - vector merge high */
6252 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
6253 case 0xe764: /* VSUM - vector sum across word */
6254 case 0xe765: /* VSUMG - vector sum across doubleword */
6255 case 0xe766: /* VCKSM - vector checksum */
6256 case 0xe767: /* VSUMQ - vector sum across quadword */
6257 case 0xe768: /* VN - vector and */
6258 case 0xe769: /* VNC - vector and with complement */
6259 case 0xe76a: /* VO - vector or */
6260 case 0xe76b: /* VNO - vector nor */
6261 case 0xe76d: /* VX - vector xor */
6262 case 0xe770: /* VESLV - vector element shift left */
6263 case 0xe772: /* VERIM - vector element rotate and insert under mask */
6264 case 0xe773: /* VERLLV - vector element rotate left logical */
6265 case 0xe774: /* VSL - vector shift left */
6266 case 0xe775: /* VSLB - vector shift left by byte */
6267 case 0xe777: /* VSLDB - vector shift left double by byte */
6268 case 0xe778: /* VESRLV - vector element shift right logical */
6269 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
6270 case 0xe77c: /* VSRL - vector shift right logical */
6271 case 0xe77d: /* VSRLB - vector shift right logical by byte */
6272 case 0xe77e: /* VSRA - vector shift right arithmetic */
6273 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
6274 case 0xe784: /* VPDI - vector permute doubleword immediate */
6275 case 0xe78c: /* VPERM - vector permute */
6276 case 0xe78d: /* VSEL - vector select */
6277 case 0xe78e: /* VFMS - vector fp multiply and subtract */
6278 case 0xe78f: /* VFMA - vector fp multiply and add */
6279 case 0xe794: /* VPK - vector pack */
6280 case 0xe7a1: /* VMLH - vector multiply logical high */
6281 case 0xe7a2: /* VML - vector multiply low */
6282 case 0xe7a3: /* VMH - vector multiply high */
6283 case 0xe7a4: /* VMLE - vector multiply logical even */
6284 case 0xe7a5: /* VMLO - vector multiply logical odd */
6285 case 0xe7a6: /* VME - vector multiply even */
6286 case 0xe7a7: /* VMO - vector multiply odd */
6287 case 0xe7a9: /* VMALH - vector multiply and add logical high */
6288 case 0xe7aa: /* VMAL - vector multiply and add low */
6289 case 0xe7ab: /* VMAH - vector multiply and add high */
6290 case 0xe7ac: /* VMALE - vector multiply and add logical even */
6291 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
6292 case 0xe7ae: /* VMAE - vector multiply and add even */
6293 case 0xe7af: /* VMAO - vector multiply and add odd */
6294 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
6295 case 0xe7b9: /* VACCC - vector add with carry compute carry */
6296 case 0xe7bb: /* VAC - vector add with carry */
6297 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
6298 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
6299 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
6300 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
6301 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
6302 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
6303 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
6304 case 0xe7c4: /* VLDE - vector fp load lengthened */
6305 case 0xe7c5: /* VLED - vector fp load rounded */
6306 case 0xe7c7: /* VFI - vector load fp integer */
6307 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
6308 case 0xe7ce: /* VFSQ - vector fp square root */
6309 case 0xe7d4: /* VUPLL - vector unpack logical low */
6310 case 0xe7d6: /* VUPL - vector unpack low */
6311 case 0xe7d5: /* VUPLH - vector unpack logical high */
6312 case 0xe7d7: /* VUPH - vector unpack high */
6313 case 0xe7de: /* VLC - vector load complement */
6314 case 0xe7df: /* VLP - vector load positive */
6315 case 0xe7e2: /* VFA - vector fp subtract */
6316 case 0xe7e3: /* VFA - vector fp add */
6317 case 0xe7e5: /* VFD - vector fp divide */
6318 case 0xe7e7: /* VFM - vector fp multiply */
6319 case 0xe7f0: /* VAVGL - vector average logical */
6320 case 0xe7f1: /* VACC - vector add and compute carry */
6321 case 0xe7f2: /* VAVG - vector average */
6322 case 0xe7f3: /* VA - vector add */
6323 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
6324 case 0xe7f7: /* VS - vector subtract */
6325 case 0xe7fc: /* VMNL - vector minimum logical */
6326 case 0xe7fd: /* VMXL - vector maximum logical */
6327 case 0xe7fe: /* VMN - vector minimum */
6328 case 0xe7ff: /* VMX - vector maximum */
6329 /* vector destination + FPC */
6330 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6331 return -1;
6332 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6333 return -1;
6334 break;
6335
6336 case 0xe708: /* VSTEB - vector store element */
6337 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6338 if (record_full_arch_list_add_mem (oaddr, 1))
6339 return -1;
6340 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6341 return -1;
6342 break;
6343
6344 case 0xe709: /* VSTEH - vector store element */
6345 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6346 if (record_full_arch_list_add_mem (oaddr, 2))
6347 return -1;
6348 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6349 return -1;
6350 break;
6351
6352 case 0xe70a: /* VSTEG - vector store element */
6353 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6354 if (record_full_arch_list_add_mem (oaddr, 8))
6355 return -1;
6356 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6357 return -1;
6358 break;
6359
6360 case 0xe70b: /* VSTEF - vector store element */
6361 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6362 if (record_full_arch_list_add_mem (oaddr, 4))
6363 return -1;
6364 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6365 return -1;
6366 break;
6367
6368 /* 0xe70c-0xe70d undefined */
6369
6370 case 0xe70e: /* VST - vector store */
6371 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6372 if (record_full_arch_list_add_mem (oaddr, 16))
6373 return -1;
6374 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6375 return -1;
6376 break;
6377
6378 /* 0xe70f-0xe711 undefined */
6379 /* 0xe714-0xe719 undefined */
6380
6381 case 0xe71a: /* VSCEG - vector scatter element */
6382 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
6383 return -1;
6384 if (record_full_arch_list_add_mem (oaddr, 8))
6385 return -1;
6386 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6387 return -1;
6388 break;
6389
6390 case 0xe71b: /* VSCEF - vector scatter element */
6391 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
6392 return -1;
6393 if (record_full_arch_list_add_mem (oaddr, 4))
6394 return -1;
6395 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6396 return -1;
6397 break;
6398
6399 /* 0xe71c-0xe720 undefined */
6400 /* 0xe723-0xe726 undefined */
6401 /* 0xe728-0xe72f undefined */
6402 /* 0xe731-0xe732 undefined */
6403 /* 0xe734-0xe735 undefined */
6404
6405 case 0xe736: /* VLM - vector load multiple */
6406 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
6407 if (s390_record_vr (gdbarch, regcache, i))
6408 return -1;
6409 if (s390_record_vr (gdbarch, regcache, ivec[1]))
6410 return -1;
6411 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6412 return -1;
6413 break;
6414
6415 /* 0xe739 undefined */
6416 /* 0xe73b-0xe73d undefined */
6417
6418 case 0xe73e: /* VSTM - vector store multiple */
6419 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6420 if (ivec[0] <= ivec[1])
6421 n = ivec[1] - ivec[0] + 1;
6422 else
6423 n = ivec[1] + 0x20 - ivec[0] + 1;
6424 if (record_full_arch_list_add_mem (oaddr, n * 16))
6425 return -1;
6426 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6427 return -1;
6428 break;
6429
6430 case 0xe73f: /* VSTL - vector store with length */
6431 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6432 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
6433 tmp &= 0xffffffffu;
6434 if (tmp > 16)
6435 tmp = 16;
6436 if (record_full_arch_list_add_mem (oaddr, tmp))
6437 return -1;
6438 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6439 return -1;
6440 break;
6441
6442 /* 0xe747-0xe749 undefined */
6443
6444 case 0xe74a: /* VFTCI - vector fp test data class immediate */
6445 case 0xe75c: /* VISTR - vector isolate string */
6446 case 0xe780: /* VFEE - vector find element equal */
6447 case 0xe781: /* VFENE - vector find element not equal */
6448 case 0xe782: /* VFA - vector find any element equal */
6449 case 0xe78a: /* VSTRC - vector string range compare */
6450 case 0xe795: /* VPKLS - vector pack logical saturate */
6451 case 0xe797: /* VPKS - vector pack saturate */
6452 case 0xe7e8: /* VFCE - vector fp compare equal */
6453 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
6454 case 0xe7eb: /* VFCE - vector fp compare high */
6455 case 0xe7f8: /* VCEQ - vector compare equal */
6456 case 0xe7f9: /* VCHL - vector compare high logical */
6457 case 0xe7fb: /* VCH - vector compare high */
6458 /* vector destination + flags + FPC */
6459 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6460 return -1;
6461 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6462 return -1;
6463 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6464 return -1;
6465 break;
6466
6467 /* 0xe74b-0xe74c undefined */
6468 /* 0xe74e-0xe74f undefined */
6469 /* 0xe751 undefined */
6470 /* 0xe754-0xe755 undefined */
6471 /* 0xe757-0xe75b undefined */
6472 /* 0xe75d-0xe75e undefined */
6473 /* 0xe763 undefined */
6474 /* 0xe76c undefined */
6475 /* 0xe76e-0xe76f undefined */
6476 /* 0xe771 undefined */
6477 /* 0xe776 undefined */
6478 /* 0xe779 undefined */
6479 /* 0xe77b undefined */
6480 /* 0xe783 undefined */
6481 /* 0xe785-0xe789 undefined */
6482 /* 0xe78b undefined */
6483 /* 0xe790-0xe793 undefined */
6484 /* 0xe796 undefined */
6485 /* 0xe798-0xe7a0 undefined */
6486 /* 0xe7a8 undefined */
6487 /* 0xe7b0-0xe7b3 undefined */
6488 /* 0xe7b5-0xe7b8 undefined */
6489 /* 0xe7ba undefined */
6490 /* 0xe7be undefined */
6491 /* 0xe7c6 undefined */
6492 /* 0xe7c8-0xe7c9 undefined */
6493
6494 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
6495 case 0xe7cb: /* WFC - vector fp compare scalar */
6496 case 0xe7d8: /* VTM - vector test under mask */
6497 case 0xe7d9: /* VECL - vector element compare logical */
6498 case 0xe7db: /* VEC - vector element compare */
6499 case 0xed08: /* KEB - compare and signal */
6500 case 0xed09: /* CEB - compare */
6501 case 0xed18: /* KDB - compare and signal */
6502 case 0xed19: /* CDB - compare */
6503 /* flags + fpc only */
6504 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6505 return -1;
6506 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6507 return -1;
6508 break;
6509
6510 /* 0xe7cd undefined */
6511 /* 0xe7cf-0xe7d3 undefined */
6512 /* 0xe7da undefined */
6513 /* 0xe7dc-0xe7dd undefined */
6514 /* 0xe7e0-0xe7e1 undefined */
6515 /* 0xe7e4 undefined */
6516 /* 0xe7e6 undefined */
6517 /* 0xe7e9 undefined */
6518 /* 0xe7ec-0xe7ef undefined */
6519 /* 0xe7f4 undefined */
6520 /* 0xe7f6 undefined */
6521 /* 0xe7fa undefined */
6522
6523 /* 0xeb00-0xeb03 undefined */
6524
6525 case 0xeb04: /* LMG - load multiple */
6526 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6527 if (s390_record_gpr_g (gdbarch, regcache, i))
6528 return -1;
6529 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6530 return -1;
6531 break;
6532
6533 /* 0xeb05-0xeb09 undefined */
6534 /* 0xeb0e undefined */
6535 /* 0xeb0f privileged: TRACG */
6536 /* 0xeb10-0xeb13 undefined */
6537
6538 case 0xeb14: /* CSY - compare and swap */
6539 case 0xebf4: /* LAN - load and and */
6540 case 0xebf6: /* LAO - load and or */
6541 case 0xebf7: /* LAX - load and xor */
6542 case 0xebf8: /* LAA - load and add */
6543 case 0xebfa: /* LAAL - load and add logical */
6544 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6545 if (record_full_arch_list_add_mem (oaddr, 4))
6546 return -1;
6547 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6548 return -1;
6549 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6550 return -1;
6551 break;
6552
6553 /* 0xeb15-0xeb1b undefined */
6554 /* 0xeb1e-0xeb1f undefined */
6555 /* 0xeb22 undefined */
6556
6557 case 0xeb23: /* CLT - compare logical and trap */
6558 case 0xeb2b: /* CLGT - compare logical and trap */
6559 /* fpc only - including possible DXC write for trapping insns */
6560 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6561 return -1;
6562 break;
6563
6564 case 0xeb24: /* STMG - store multiple */
6565 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6566 if (inib[2] <= inib[3])
6567 n = inib[3] - inib[2] + 1;
6568 else
6569 n = inib[3] + 0x10 - inib[2] + 1;
6570 if (record_full_arch_list_add_mem (oaddr, n * 8))
6571 return -1;
6572 break;
6573
6574 /* 0xeb25 privileged */
6575
6576 case 0xeb26: /* STMH - store multiple high */
6577 case 0xeb90: /* STMY - store multiple */
6578 case 0xeb9b: /* STAMY - store access multiple */
6579 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6580 if (inib[2] <= inib[3])
6581 n = inib[3] - inib[2] + 1;
6582 else
6583 n = inib[3] + 0x10 - inib[2] + 1;
6584 if (record_full_arch_list_add_mem (oaddr, n * 4))
6585 return -1;
6586 break;
6587
6588 /* 0xeb27-0xeb2a undefined */
6589
6590 case 0xeb2c: /* STCMH - store characters under mask */
6591 case 0xeb2d: /* STCMY - store characters under mask */
6592 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6593 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
6594 return -1;
6595 break;
6596
6597 /* 0xeb2e undefined */
6598 /* 0xeb2f privileged */
6599
6600 case 0xeb30: /* CSG - compare and swap */
6601 case 0xebe4: /* LANG - load and and */
6602 case 0xebe6: /* LAOG - load and or */
6603 case 0xebe7: /* LAXG - load and xor */
6604 case 0xebe8: /* LAAG - load and add */
6605 case 0xebea: /* LAALG - load and add logical */
6606 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6607 if (record_full_arch_list_add_mem (oaddr, 8))
6608 return -1;
6609 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6610 return -1;
6611 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6612 return -1;
6613 break;
6614
6615 case 0xeb31: /* CDSY - compare double and swap */
6616 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6617 if (record_full_arch_list_add_mem (oaddr, 8))
6618 return -1;
6619 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6620 return -1;
6621 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6622 return -1;
6623 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6624 return -1;
6625 break;
6626
6627 /* 0xeb32-0xeb3d undefined */
6628
6629 case 0xeb3e: /* CDSG - compare double and swap */
6630 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6631 if (record_full_arch_list_add_mem (oaddr, 16))
6632 return -1;
6633 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6634 return -1;
6635 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6636 return -1;
6637 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6638 return -1;
6639 break;
6640
6641 /* 0xeb3f-0xeb43 undefined */
6642 /* 0xeb46-0xeb4b undefined */
6643 /* 0xeb4d-0xeb50 undefined */
6644
6645 case 0xeb52: /* MVIY - move */
6646 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6647 if (record_full_arch_list_add_mem (oaddr, 1))
6648 return -1;
6649 break;
6650
6651 case 0xeb54: /* NIY - and */
6652 case 0xeb56: /* OIY - or */
6653 case 0xeb57: /* XIY - xor */
6654 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6655 if (record_full_arch_list_add_mem (oaddr, 1))
6656 return -1;
6657 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6658 return -1;
6659 break;
6660
6661 /* 0xeb53 undefined */
6662 /* 0xeb58-0xeb69 undefined */
6663
6664 case 0xeb6a: /* ASI - add immediate */
6665 case 0xeb6e: /* ALSI - add immediate */
6666 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6667 if (record_full_arch_list_add_mem (oaddr, 4))
6668 return -1;
6669 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6670 return -1;
6671 break;
6672
6673 /* 0xeb6b-0xeb6d undefined */
6674 /* 0xeb6f-0xeb79 undefined */
6675
6676 case 0xeb7a: /* AGSI - add immediate */
6677 case 0xeb7e: /* ALGSI - add immediate */
6678 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6679 if (record_full_arch_list_add_mem (oaddr, 8))
6680 return -1;
6681 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6682 return -1;
6683 break;
6684
6685 /* 0xeb7b-0xeb7d undefined */
6686 /* 0xeb7f undefined */
6687
6688 case 0xeb80: /* ICMH - insert characters under mask */
6689 /* 32-bit high gpr destination + flags */
6690 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6691 return -1;
6692 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6693 return -1;
6694 break;
6695
6696 /* 0xeb82-0xeb8d undefined */
6697
6698 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6699 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6700 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6701 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6702 if (record_full_arch_list_add_mem (oaddr, tmp))
6703 return -1;
6704 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6705 return -1;
6706 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6707 return -1;
6708 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6709 return -1;
6710 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6711 return -1;
6712 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6713 return -1;
6714 break;
6715
6716 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6717 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6718 return -1;
6719 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6720 return -1;
6721 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6722 return -1;
6723 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6724 return -1;
6725 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6726 return -1;
6727 break;
6728
6729 /* 0xeb91-0xeb95 undefined */
6730
6731 case 0xeb96: /* LMH - load multiple high */
6732 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6733 if (s390_record_gpr_h (gdbarch, regcache, i))
6734 return -1;
6735 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6736 return -1;
6737 break;
6738
6739 /* 0xeb97 undefined */
6740
6741 case 0xeb98: /* LMY - load multiple */
6742 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6743 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6744 return -1;
6745 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6746 return -1;
6747 break;
6748
6749 /* 0xeb99 undefined */
6750
6751 case 0xeb9a: /* LAMY - load access multiple */
6752 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6753 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6754 return -1;
6755 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6756 return -1;
6757 break;
6758
6759 /* 0xeb9c-0xebbf undefined */
6760 /* 0xebc1-0xebdb undefined */
6761 /* 0xebe5 undefined */
6762 /* 0xebe9 undefined */
6763 /* 0xebeb-0xebf1 undefined */
6764 /* 0xebf5 undefined */
6765 /* 0xebf9 undefined */
6766 /* 0xebfb-0xebff undefined */
6767
6768 /* 0xed00-0xed03 undefined */
6769
6770 case 0xed04: /* LDEB - load lengthened */
6771 case 0xed0c: /* MDEB - multiply */
6772 case 0xed0d: /* DEB - divide */
6773 case 0xed14: /* SQEB - square root */
6774 case 0xed15: /* SQDB - square root */
6775 case 0xed17: /* MEEB - multiply */
6776 case 0xed1c: /* MDB - multiply */
6777 case 0xed1d: /* DDB - divide */
6778 /* float destination + fpc */
6779 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6780 return -1;
6781 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6782 return -1;
6783 break;
6784
6785 case 0xed05: /* LXDB - load lengthened */
6786 case 0xed06: /* LXEB - load lengthened */
6787 case 0xed07: /* MXDB - multiply */
6788 /* float pair destination + fpc */
6789 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6790 return -1;
6791 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6792 return -1;
6793 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6794 return -1;
6795 break;
6796
6797 case 0xed0a: /* AEB - add */
6798 case 0xed0b: /* SEB - subtract */
6799 case 0xed1a: /* ADB - add */
6800 case 0xed1b: /* SDB - subtract */
6801 /* float destination + flags + fpc */
6802 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6803 return -1;
6804 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6805 return -1;
6806 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6807 return -1;
6808 break;
6809
6810 case 0xed0e: /* MAEB - multiply and add */
6811 case 0xed0f: /* MSEB - multiply and subtract */
6812 case 0xed1e: /* MADB - multiply and add */
6813 case 0xed1f: /* MSDB - multiply and subtract */
6814 case 0xed40: /* SLDT - shift significand left */
6815 case 0xed41: /* SRDT - shift significand right */
6816 case 0xedaa: /* CDZT - convert from zoned */
6817 case 0xedae: /* CDPT - convert from packed */
6818 /* float destination [RXF] + fpc */
6819 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6820 return -1;
6821 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6822 return -1;
6823 break;
6824
6825 /* 0xed13 undefined */
6826 /* 0xed16 undefined */
6827 /* 0xed20-0xed23 undefined */
6828
6829 case 0xed24: /* LDE - load lengthened */
6830 case 0xed34: /* SQE - square root */
6831 case 0xed35: /* SQD - square root */
6832 case 0xed37: /* MEE - multiply */
6833 case 0xed64: /* LEY - load */
6834 case 0xed65: /* LDY - load */
6835 /* float destination */
6836 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6837 return -1;
6838 break;
6839
6840 case 0xed25: /* LXD - load lengthened */
6841 case 0xed26: /* LXE - load lengthened */
6842 /* float pair destination */
6843 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6844 return -1;
6845 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6846 return -1;
6847 break;
6848
6849 /* 0xed27-0xed2d undefined */
6850
6851 case 0xed2e: /* MAE - multiply and add */
6852 case 0xed2f: /* MSE - multiply and subtract */
6853 case 0xed38: /* MAYL - multiply and add unnormalized */
6854 case 0xed39: /* MYL - multiply unnormalized */
6855 case 0xed3c: /* MAYH - multiply and add unnormalized */
6856 case 0xed3d: /* MYH - multiply unnormalized */
6857 case 0xed3e: /* MAD - multiply and add */
6858 case 0xed3f: /* MSD - multiply and subtract */
6859 /* float destination [RXF] */
6860 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6861 return -1;
6862 break;
6863
6864 /* 0xed30-0xed33 undefined */
6865 /* 0xed36 undefined */
6866
6867 case 0xed3a: /* MAY - multiply and add unnormalized */
6868 case 0xed3b: /* MY - multiply unnormalized */
6869 /* float pair destination [RXF] */
6870 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6871 return -1;
6872 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6873 return -1;
6874 break;
6875
6876 /* 0xed42-0xed47 undefind */
6877
6878 case 0xed48: /* SLXT - shift significand left */
6879 case 0xed49: /* SRXT - shift significand right */
6880 case 0xedab: /* CXZT - convert from zoned */
6881 case 0xedaf: /* CXPT - convert from packed */
6882 /* float pair destination [RXF] + fpc */
6883 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6884 return -1;
6885 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6886 return -1;
6887 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6888 return -1;
6889 break;
6890
6891 /* 0xed4a-0xed4f undefind */
6892 /* 0xed52-0xed53 undefind */
6893 /* 0xed56-0xed57 undefind */
6894 /* 0xed5a-0xed63 undefind */
6895 /* 0xed68-0xeda7 undefined */
6896
6897 case 0xeda8: /* CZDT - convert to zoned */
6898 case 0xeda9: /* CZXT - convert to zoned */
6899 case 0xedac: /* CPDT - convert to packed */
6900 case 0xedad: /* CPXT - convert to packed */
6901 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6902 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6903 return -1;
6904 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6905 return -1;
6906 break;
6907
6908 /* 0xedb0-0xedff undefined */
6909
6910 default:
6911 goto UNKNOWN_OP;
6912 }
6913 break;
6914
6915 /* 0xe4 undefined */
6916
6917 case 0xe5:
6918 /* SSE/SIL-format instruction */
6919 switch (insn[0])
6920 {
6921 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6922
6923 case 0xe544: /* MVHHI - move */
6924 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6925 if (record_full_arch_list_add_mem (oaddr, 2))
6926 return -1;
6927 break;
6928
6929 /* 0xe545-0xe547 undefined */
6930
6931 case 0xe548: /* MVGHI - move */
6932 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6933 if (record_full_arch_list_add_mem (oaddr, 8))
6934 return -1;
6935 break;
6936
6937 /* 0xe549-0xe54b undefined */
6938
6939 case 0xe54c: /* MVHI - move */
6940 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6941 if (record_full_arch_list_add_mem (oaddr, 4))
6942 return -1;
6943 break;
6944
6945 /* 0xe54d-0xe553 undefined */
6946
6947 case 0xe554: /* CHHSI - compare halfword immediate */
6948 case 0xe555: /* CLHHSI - compare logical immediate */
6949 case 0xe558: /* CGHSI - compare halfword immediate */
6950 case 0xe559: /* CLGHSI - compare logical immediate */
6951 case 0xe55c: /* CHSI - compare halfword immediate */
6952 case 0xe55d: /* CLFHSI - compare logical immediate */
6953 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6954 return -1;
6955 break;
6956
6957 /* 0xe556-0xe557 undefined */
6958 /* 0xe55a-0xe55b undefined */
6959 /* 0xe55e-0xe55f undefined */
6960
6961 case 0xe560: /* TBEGIN - transaction begin */
6962 /* The transaction will be immediately aborted after this
6963 instruction, due to single-stepping. This instruction is
6964 only supported so that the program can fail a few times
6965 and go to the non-transactional fallback. */
6966 if (inib[4])
6967 {
6968 /* Transaction diagnostic block - user. */
6969 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6970 if (record_full_arch_list_add_mem (oaddr, 256))
6971 return -1;
6972 }
6973 /* Transaction diagnostic block - supervisor. */
6974 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6975 return -1;
6976 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6977 return -1;
6978 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6979 return -1;
6980 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6981 return -1;
6982 for (i = 0; i < 16; i++)
6983 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6984 return -1;
6985 /* And flags. */
6986 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6987 return -1;
6988 break;
6989
6990 /* 0xe561 unsupported: TBEGINC */
6991 /* 0xe562-0xe5ff undefined */
6992
6993 default:
6994 goto UNKNOWN_OP;
6995 }
6996 break;
6997
6998 /* 0xe6 undefined */
6999
7000 case 0xec:
7001 /* RIE/RIS/RRS-format instruction */
7002 switch (ibyte[0] << 8 | ibyte[5])
7003 {
7004 /* 0xec00-0xec41 undefined */
7005
7006 case 0xec42: /* LOCHI - load halfword immediate on condition */
7007 case 0xec51: /* RISBLG - rotate then insert selected bits low */
7008 /* 32-bit or native gpr destination */
7009 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7010 return -1;
7011 break;
7012
7013 /* 0xec43 undefined */
7014
7015 case 0xec44: /* BRXHG - branch relative on index high */
7016 case 0xec45: /* BRXLG - branch relative on index low or equal */
7017 case 0xec46: /* LOCGHI - load halfword immediate on condition */
7018 case 0xec59: /* RISBGN - rotate then insert selected bits */
7019 /* 64-bit gpr destination */
7020 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7021 return -1;
7022 break;
7023
7024 /* 0xec47-0xec4d undefined */
7025
7026 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
7027 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
7028 /* 32-bit high gpr destination */
7029 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
7030 return -1;
7031 break;
7032
7033 /* 0xec4f-0xec50 undefined */
7034 /* 0xec52-0xec53 undefined */
7035
7036 case 0xec54: /* RNSBG - rotate then and selected bits */
7037 case 0xec55: /* RISBG - rotate then insert selected bits */
7038 case 0xec56: /* ROSBG - rotate then or selected bits */
7039 case 0xec57: /* RXSBG - rotate then xor selected bits */
7040 case 0xecd9: /* AGHIK - add immediate */
7041 case 0xecdb: /* ALGHSIK - add logical immediate */
7042 /* 64-bit gpr destination + flags */
7043 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7044 return -1;
7045 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7046 return -1;
7047 break;
7048
7049 /* 0xec58 undefined */
7050 /* 0xec5a-0xec5c undefined */
7051 /* 0xec5e-0xec63 undefined */
7052
7053 case 0xec64: /* CGRJ - compare and branch relative */
7054 case 0xec65: /* CLGRJ - compare logical and branch relative */
7055 case 0xec76: /* CRJ - compare and branch relative */
7056 case 0xec77: /* CLRJ - compare logical and branch relative */
7057 case 0xec7c: /* CGIJ - compare immediate and branch relative */
7058 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
7059 case 0xec7e: /* CIJ - compare immediate and branch relative */
7060 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
7061 case 0xece4: /* CGRB - compare and branch */
7062 case 0xece5: /* CLGRB - compare logical and branch */
7063 case 0xecf6: /* CRB - compare and branch */
7064 case 0xecf7: /* CLRB - compare logical and branch */
7065 case 0xecfc: /* CGIB - compare immediate and branch */
7066 case 0xecfd: /* CLGIB - compare logical immediate and branch */
7067 case 0xecfe: /* CIB - compare immediate and branch */
7068 case 0xecff: /* CLIB - compare logical immediate and branch */
7069 break;
7070
7071 /* 0xec66-0xec6f undefined */
7072
7073 case 0xec70: /* CGIT - compare immediate and trap */
7074 case 0xec71: /* CLGIT - compare logical immediate and trap */
7075 case 0xec72: /* CIT - compare immediate and trap */
7076 case 0xec73: /* CLFIT - compare logical immediate and trap */
7077 /* fpc only - including possible DXC write for trapping insns */
7078 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7079 return -1;
7080 break;
7081
7082 /* 0xec74-0xec75 undefined */
7083 /* 0xec78-0xec7b undefined */
7084
7085 /* 0xec80-0xecd7 undefined */
7086
7087 case 0xecd8: /* AHIK - add immediate */
7088 case 0xecda: /* ALHSIK - add logical immediate */
7089 /* 32-bit gpr destination + flags */
7090 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7091 return -1;
7092 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7093 return -1;
7094 break;
7095
7096 /* 0xecdc-0xece3 undefined */
7097 /* 0xece6-0xecf5 undefined */
7098 /* 0xecf8-0xecfb undefined */
7099
7100 default:
7101 goto UNKNOWN_OP;
7102 }
7103 break;
7104
7105 case 0xee: /* PLO - perform locked operation */
7106 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
7107 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7108 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
7109 if (!(tmp & 0x100))
7110 {
7111 uint8_t fc = tmp & 0xff;
7112 gdb_byte buf[8];
7113 switch (fc)
7114 {
7115 case 0x00: /* CL */
7116 /* op1c */
7117 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7118 return -1;
7119 /* op3 */
7120 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7121 return -1;
7122 break;
7123
7124 case 0x01: /* CLG */
7125 /* op1c */
7126 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7127 return -1;
7128 /* op3 */
7129 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7130 return -1;
7131 break;
7132
7133 case 0x02: /* CLGR */
7134 /* op1c */
7135 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7136 return -1;
7137 /* op3 */
7138 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7139 return -1;
7140 break;
7141
7142 case 0x03: /* CLX */
7143 /* op1c */
7144 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7145 return -1;
7146 /* op3 */
7147 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7148 return -1;
7149 break;
7150
7151 case 0x08: /* DCS */
7152 /* op3c */
7153 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7154 return -1;
7155 /* fallthru */
7156 case 0x0c: /* CSST */
7157 /* op4 */
7158 if (record_full_arch_list_add_mem (oaddr2, 4))
7159 return -1;
7160 goto CS;
7161
7162 case 0x14: /* CSTST */
7163 /* op8 */
7164 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7165 return -1;
7166 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7167 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7168 if (record_full_arch_list_add_mem (oaddr3, 4))
7169 return -1;
7170 /* fallthru */
7171 case 0x10: /* CSDST */
7172 /* op6 */
7173 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7174 return -1;
7175 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7176 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7177 if (record_full_arch_list_add_mem (oaddr3, 4))
7178 return -1;
7179 /* op4 */
7180 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7181 return -1;
7182 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7183 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7184 if (record_full_arch_list_add_mem (oaddr3, 4))
7185 return -1;
7186 /* fallthru */
7187 case 0x04: /* CS */
7188CS:
7189 /* op1c */
7190 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7191 return -1;
7192 /* op2 */
7193 if (record_full_arch_list_add_mem (oaddr, 4))
7194 return -1;
7195 break;
7196
7197 case 0x09: /* DCSG */
7198 /* op3c */
7199 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7200 return -1;
7201 goto CSSTG;
7202
7203 case 0x15: /* CSTSTG */
7204 /* op8 */
7205 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7206 return -1;
7207 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7208 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7209 if (record_full_arch_list_add_mem (oaddr3, 8))
7210 return -1;
7211 /* fallthru */
7212 case 0x11: /* CSDSTG */
7213 /* op6 */
7214 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7215 return -1;
7216 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7217 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7218 if (record_full_arch_list_add_mem (oaddr3, 8))
7219 return -1;
7220 /* fallthru */
7221 case 0x0d: /* CSSTG */
7222CSSTG:
7223 /* op4 */
7224 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7225 return -1;
7226 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7227 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7228 if (record_full_arch_list_add_mem (oaddr3, 8))
7229 return -1;
7230 /* fallthru */
7231 case 0x05: /* CSG */
7232 /* op1c */
7233 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7234 return -1;
7235 /* op2 */
7236 if (record_full_arch_list_add_mem (oaddr, 8))
7237 return -1;
7238 break;
7239
7240 case 0x0a: /* DCSGR */
7241 /* op3c */
7242 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7243 return -1;
7244 /* fallthru */
7245 case 0x0e: /* CSSTGR */
7246 /* op4 */
7247 if (record_full_arch_list_add_mem (oaddr2, 8))
7248 return -1;
7249 goto CSGR;
7250
7251 case 0x16: /* CSTSTGR */
7252 /* op8 */
7253 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7254 return -1;
7255 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7256 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7257 if (record_full_arch_list_add_mem (oaddr3, 8))
7258 return -1;
7259 /* fallthru */
7260 case 0x12: /* CSDSTGR */
7261 /* op6 */
7262 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7263 return -1;
7264 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7265 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7266 if (record_full_arch_list_add_mem (oaddr3, 8))
7267 return -1;
7268 /* op4 */
7269 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7270 return -1;
7271 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7272 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7273 if (record_full_arch_list_add_mem (oaddr3, 8))
7274 return -1;
7275 /* fallthru */
7276 case 0x06: /* CSGR */
7277CSGR:
7278 /* op1c */
7279 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7280 return -1;
7281 /* op2 */
7282 if (record_full_arch_list_add_mem (oaddr, 8))
7283 return -1;
7284 break;
7285
7286 case 0x0b: /* DCSX */
7287 /* op3c */
7288 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7289 return -1;
7290 goto CSSTX;
7291
7292 case 0x17: /* CSTSTX */
7293 /* op8 */
7294 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7295 return -1;
7296 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7297 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7298 if (record_full_arch_list_add_mem (oaddr3, 16))
7299 return -1;
7300 /* fallthru */
7301 case 0x13: /* CSDSTX */
7302 /* op6 */
7303 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7304 return -1;
7305 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7306 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7307 if (record_full_arch_list_add_mem (oaddr3, 16))
7308 return -1;
7309 /* fallthru */
7310 case 0x0f: /* CSSTX */
7311CSSTX:
7312 /* op4 */
7313 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7314 return -1;
7315 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7316 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7317 if (record_full_arch_list_add_mem (oaddr3, 16))
7318 return -1;
7319 /* fallthru */
7320 case 0x07: /* CSX */
7321 /* op1c */
7322 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7323 return -1;
7324 /* op2 */
7325 if (record_full_arch_list_add_mem (oaddr, 16))
7326 return -1;
7327 break;
7328
7329 default:
7330 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
7331 fc, paddress (gdbarch, addr));
7332 return -1;
7333 }
7334 }
7335 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7336 return -1;
7337 break;
7338
7339 case 0xef: /* LMD - load multiple disjoint */
7340 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
7341 if (s390_record_gpr_g (gdbarch, regcache, i))
7342 return -1;
7343 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7344 return -1;
7345 break;
7346
7347 case 0xf0: /* SRP - shift and round decimal */
7348 case 0xf8: /* ZAP - zero and add */
7349 case 0xfa: /* AP - add decimal */
7350 case 0xfb: /* SP - subtract decimal */
7351 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7352 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7353 return -1;
7354 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7355 return -1;
7356 /* DXC may be written */
7357 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7358 return -1;
7359 break;
7360
7361 case 0xf1: /* MVO - move with offset */
7362 case 0xf2: /* PACK - pack */
7363 case 0xf3: /* UNPK - unpack */
7364 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7365 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7366 return -1;
7367 break;
7368
7369 /* 0xf4-0xf7 undefined */
7370
7371 case 0xf9: /* CP - compare decimal */
7372 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7373 return -1;
7374 /* DXC may be written */
7375 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7376 return -1;
7377 break;
7378
7379 case 0xfc: /* MP - multiply decimal */
7380 case 0xfd: /* DP - divide decimal */
7381 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7382 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7383 return -1;
7384 /* DXC may be written */
7385 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7386 return -1;
7387 break;
7388
7389 /* 0xfe-0xff undefined */
7390
7391 default:
7392UNKNOWN_OP:
7393 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
7394 "at %s.\n", insn[0], paddress (gdbarch, addr));
7395 return -1;
7396 }
7397
7398 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
7399 return -1;
7400 if (record_full_arch_list_add_end ())
7401 return -1;
7402 return 0;
7403}
7404
7405/* Initialize linux_record_tdep if not initialized yet. */
7406
7407static void
7408s390_init_linux_record_tdep (struct linux_record_tdep *record_tdep,
7409 enum s390_abi_kind abi)
7410{
7411 /* These values are the size of the type that will be used in a system
7412 call. They are obtained from Linux Kernel source. */
7413
7414 if (abi == ABI_LINUX_ZSERIES)
7415 {
7416 record_tdep->size_pointer = 8;
7417 /* no _old_kernel_stat */
7418 record_tdep->size_tms = 32;
7419 record_tdep->size_loff_t = 8;
7420 record_tdep->size_flock = 32;
7421 record_tdep->size_ustat = 32;
7422 record_tdep->size_old_sigaction = 32;
7423 record_tdep->size_old_sigset_t = 8;
7424 record_tdep->size_rlimit = 16;
7425 record_tdep->size_rusage = 144;
7426 record_tdep->size_timeval = 16;
7427 record_tdep->size_timezone = 8;
7428 /* old_[ug]id_t never used */
7429 record_tdep->size_fd_set = 128;
7430 record_tdep->size_old_dirent = 280;
7431 record_tdep->size_statfs = 88;
7432 record_tdep->size_statfs64 = 88;
7433 record_tdep->size_sockaddr = 16;
7434 record_tdep->size_int = 4;
7435 record_tdep->size_long = 8;
7436 record_tdep->size_ulong = 8;
7437 record_tdep->size_msghdr = 56;
7438 record_tdep->size_itimerval = 32;
7439 record_tdep->size_stat = 144;
7440 /* old_utsname unused */
7441 record_tdep->size_sysinfo = 112;
7442 record_tdep->size_msqid_ds = 120;
7443 record_tdep->size_shmid_ds = 112;
7444 record_tdep->size_new_utsname = 390;
7445 record_tdep->size_timex = 208;
7446 record_tdep->size_mem_dqinfo = 24;
7447 record_tdep->size_if_dqblk = 72;
7448 record_tdep->size_fs_quota_stat = 80;
7449 record_tdep->size_timespec = 16;
7450 record_tdep->size_pollfd = 8;
7451 record_tdep->size_NFS_FHSIZE = 32;
7452 record_tdep->size_knfsd_fh = 132;
7453 record_tdep->size_TASK_COMM_LEN = 16;
7454 record_tdep->size_sigaction = 32;
7455 record_tdep->size_sigset_t = 8;
7456 record_tdep->size_siginfo_t = 128;
7457 record_tdep->size_cap_user_data_t = 12;
7458 record_tdep->size_stack_t = 24;
7459 record_tdep->size_off_t = 8;
7460 /* stat64 unused */
7461 record_tdep->size_gid_t = 4;
7462 record_tdep->size_uid_t = 4;
7463 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7464 record_tdep->size_flock64 = 32;
7465 record_tdep->size_io_event = 32;
7466 record_tdep->size_iocb = 64;
7467 record_tdep->size_epoll_event = 16;
7468 record_tdep->size_itimerspec = 32;
7469 record_tdep->size_mq_attr = 64;
7470 record_tdep->size_termios = 36;
7471 record_tdep->size_termios2 = 44;
7472 record_tdep->size_pid_t = 4;
7473 record_tdep->size_winsize = 8;
7474 record_tdep->size_serial_struct = 72;
7475 record_tdep->size_serial_icounter_struct = 80;
7476 record_tdep->size_size_t = 8;
7477 record_tdep->size_iovec = 16;
7478 record_tdep->size_time_t = 8;
7479 }
7480 else if (abi == ABI_LINUX_S390)
7481 {
7482 record_tdep->size_pointer = 4;
7483 record_tdep->size__old_kernel_stat = 32;
7484 record_tdep->size_tms = 16;
7485 record_tdep->size_loff_t = 8;
7486 record_tdep->size_flock = 16;
7487 record_tdep->size_ustat = 20;
7488 record_tdep->size_old_sigaction = 16;
7489 record_tdep->size_old_sigset_t = 4;
7490 record_tdep->size_rlimit = 8;
7491 record_tdep->size_rusage = 72;
7492 record_tdep->size_timeval = 8;
7493 record_tdep->size_timezone = 8;
7494 record_tdep->size_old_gid_t = 2;
7495 record_tdep->size_old_uid_t = 2;
7496 record_tdep->size_fd_set = 128;
7497 record_tdep->size_old_dirent = 268;
7498 record_tdep->size_statfs = 64;
7499 record_tdep->size_statfs64 = 88;
7500 record_tdep->size_sockaddr = 16;
7501 record_tdep->size_int = 4;
7502 record_tdep->size_long = 4;
7503 record_tdep->size_ulong = 4;
7504 record_tdep->size_msghdr = 28;
7505 record_tdep->size_itimerval = 16;
7506 record_tdep->size_stat = 64;
7507 /* old_utsname unused */
7508 record_tdep->size_sysinfo = 64;
7509 record_tdep->size_msqid_ds = 88;
7510 record_tdep->size_shmid_ds = 84;
7511 record_tdep->size_new_utsname = 390;
7512 record_tdep->size_timex = 128;
7513 record_tdep->size_mem_dqinfo = 24;
7514 record_tdep->size_if_dqblk = 72;
7515 record_tdep->size_fs_quota_stat = 80;
7516 record_tdep->size_timespec = 8;
7517 record_tdep->size_pollfd = 8;
7518 record_tdep->size_NFS_FHSIZE = 32;
7519 record_tdep->size_knfsd_fh = 132;
7520 record_tdep->size_TASK_COMM_LEN = 16;
7521 record_tdep->size_sigaction = 20;
7522 record_tdep->size_sigset_t = 8;
7523 record_tdep->size_siginfo_t = 128;
7524 record_tdep->size_cap_user_data_t = 12;
7525 record_tdep->size_stack_t = 12;
7526 record_tdep->size_off_t = 4;
7527 record_tdep->size_stat64 = 104;
7528 record_tdep->size_gid_t = 4;
7529 record_tdep->size_uid_t = 4;
7530 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7531 record_tdep->size_flock64 = 32;
7532 record_tdep->size_io_event = 32;
7533 record_tdep->size_iocb = 64;
7534 record_tdep->size_epoll_event = 16;
7535 record_tdep->size_itimerspec = 16;
7536 record_tdep->size_mq_attr = 32;
7537 record_tdep->size_termios = 36;
7538 record_tdep->size_termios2 = 44;
7539 record_tdep->size_pid_t = 4;
7540 record_tdep->size_winsize = 8;
7541 record_tdep->size_serial_struct = 60;
7542 record_tdep->size_serial_icounter_struct = 80;
7543 record_tdep->size_size_t = 4;
7544 record_tdep->size_iovec = 8;
7545 record_tdep->size_time_t = 4;
7546 }
7547
7548 /* These values are the second argument of system call "sys_fcntl"
7549 and "sys_fcntl64". They are obtained from Linux Kernel source. */
7550 record_tdep->fcntl_F_GETLK = 5;
7551 record_tdep->fcntl_F_GETLK64 = 12;
7552 record_tdep->fcntl_F_SETLK64 = 13;
7553 record_tdep->fcntl_F_SETLKW64 = 14;
7554
7555 record_tdep->arg1 = S390_R2_REGNUM;
7556 record_tdep->arg2 = S390_R3_REGNUM;
7557 record_tdep->arg3 = S390_R4_REGNUM;
7558 record_tdep->arg4 = S390_R5_REGNUM;
7559 record_tdep->arg5 = S390_R6_REGNUM;
7560
7561 /* These values are the second argument of system call "sys_ioctl".
7562 They are obtained from Linux Kernel source.
7563 See arch/s390/include/uapi/asm/ioctls.h. */
7564
7565 record_tdep->ioctl_TCGETS = 0x5401;
7566 record_tdep->ioctl_TCSETS = 0x5402;
7567 record_tdep->ioctl_TCSETSW = 0x5403;
7568 record_tdep->ioctl_TCSETSF = 0x5404;
7569 record_tdep->ioctl_TCGETA = 0x5405;
7570 record_tdep->ioctl_TCSETA = 0x5406;
7571 record_tdep->ioctl_TCSETAW = 0x5407;
7572 record_tdep->ioctl_TCSETAF = 0x5408;
7573 record_tdep->ioctl_TCSBRK = 0x5409;
7574 record_tdep->ioctl_TCXONC = 0x540a;
7575 record_tdep->ioctl_TCFLSH = 0x540b;
7576 record_tdep->ioctl_TIOCEXCL = 0x540c;
7577 record_tdep->ioctl_TIOCNXCL = 0x540d;
7578 record_tdep->ioctl_TIOCSCTTY = 0x540e;
7579 record_tdep->ioctl_TIOCGPGRP = 0x540f;
7580 record_tdep->ioctl_TIOCSPGRP = 0x5410;
7581 record_tdep->ioctl_TIOCOUTQ = 0x5411;
7582 record_tdep->ioctl_TIOCSTI = 0x5412;
7583 record_tdep->ioctl_TIOCGWINSZ = 0x5413;
7584 record_tdep->ioctl_TIOCSWINSZ = 0x5414;
7585 record_tdep->ioctl_TIOCMGET = 0x5415;
7586 record_tdep->ioctl_TIOCMBIS = 0x5416;
7587 record_tdep->ioctl_TIOCMBIC = 0x5417;
7588 record_tdep->ioctl_TIOCMSET = 0x5418;
7589 record_tdep->ioctl_TIOCGSOFTCAR = 0x5419;
7590 record_tdep->ioctl_TIOCSSOFTCAR = 0x541a;
7591 record_tdep->ioctl_FIONREAD = 0x541b;
7592 record_tdep->ioctl_TIOCINQ = 0x541b; /* alias */
7593 record_tdep->ioctl_TIOCLINUX = 0x541c;
7594 record_tdep->ioctl_TIOCCONS = 0x541d;
7595 record_tdep->ioctl_TIOCGSERIAL = 0x541e;
7596 record_tdep->ioctl_TIOCSSERIAL = 0x541f;
7597 record_tdep->ioctl_TIOCPKT = 0x5420;
7598 record_tdep->ioctl_FIONBIO = 0x5421;
7599 record_tdep->ioctl_TIOCNOTTY = 0x5422;
7600 record_tdep->ioctl_TIOCSETD = 0x5423;
7601 record_tdep->ioctl_TIOCGETD = 0x5424;
7602 record_tdep->ioctl_TCSBRKP = 0x5425;
7603 record_tdep->ioctl_TIOCSBRK = 0x5427;
7604 record_tdep->ioctl_TIOCCBRK = 0x5428;
7605 record_tdep->ioctl_TIOCGSID = 0x5429;
7606 record_tdep->ioctl_TCGETS2 = 0x802c542a;
7607 record_tdep->ioctl_TCSETS2 = 0x402c542b;
7608 record_tdep->ioctl_TCSETSW2 = 0x402c542c;
7609 record_tdep->ioctl_TCSETSF2 = 0x402c542d;
7610 record_tdep->ioctl_TIOCGPTN = 0x80045430;
7611 record_tdep->ioctl_TIOCSPTLCK = 0x40045431;
7612 record_tdep->ioctl_FIONCLEX = 0x5450;
7613 record_tdep->ioctl_FIOCLEX = 0x5451;
7614 record_tdep->ioctl_FIOASYNC = 0x5452;
7615 record_tdep->ioctl_TIOCSERCONFIG = 0x5453;
7616 record_tdep->ioctl_TIOCSERGWILD = 0x5454;
7617 record_tdep->ioctl_TIOCSERSWILD = 0x5455;
7618 record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456;
7619 record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457;
7620 record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458;
7621 record_tdep->ioctl_TIOCSERGETLSR = 0x5459;
7622 record_tdep->ioctl_TIOCSERGETMULTI = 0x545a;
7623 record_tdep->ioctl_TIOCSERSETMULTI = 0x545b;
7624 record_tdep->ioctl_TIOCMIWAIT = 0x545c;
7625 record_tdep->ioctl_TIOCGICOUNT = 0x545d;
7626 record_tdep->ioctl_FIOQSIZE = 0x545e;
7627}
7628
a8c99f38
JB
7629/* Set up gdbarch struct. */
7630
a78f21af 7631static struct gdbarch *
5769d3cd
AC
7632s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
7633{
7803799a
UW
7634 const struct target_desc *tdesc = info.target_desc;
7635 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
7636 struct gdbarch *gdbarch;
7637 struct gdbarch_tdep *tdep;
f486487f 7638 enum s390_abi_kind tdep_abi;
417c80f9 7639 enum s390_vector_abi_kind vector_abi;
7803799a 7640 int have_upper = 0;
c642a434
UW
7641 int have_linux_v1 = 0;
7642 int have_linux_v2 = 0;
5aa82d05 7643 int have_tdb = 0;
550bdf96 7644 int have_vx = 0;
7803799a 7645 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
7646 static const char *const stap_register_prefixes[] = { "%", NULL };
7647 static const char *const stap_register_indirection_prefixes[] = { "(",
7648 NULL };
7649 static const char *const stap_register_indirection_suffixes[] = { ")",
7650 NULL };
7803799a
UW
7651
7652 /* Default ABI and register size. */
7653 switch (info.bfd_arch_info->mach)
7654 {
7655 case bfd_mach_s390_31:
7656 tdep_abi = ABI_LINUX_S390;
7657 break;
7658
7659 case bfd_mach_s390_64:
7660 tdep_abi = ABI_LINUX_ZSERIES;
7661 break;
7662
7663 default:
7664 return NULL;
7665 }
7666
7667 /* Use default target description if none provided by the target. */
7668 if (!tdesc_has_registers (tdesc))
7669 {
7670 if (tdep_abi == ABI_LINUX_S390)
7671 tdesc = tdesc_s390_linux32;
7672 else
7673 tdesc = tdesc_s390x_linux64;
7674 }
7675
7676 /* Check any target description for validity. */
7677 if (tdesc_has_registers (tdesc))
7678 {
7679 static const char *const gprs[] = {
7680 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
7681 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
7682 };
7683 static const char *const fprs[] = {
7684 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
7685 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
7686 };
7687 static const char *const acrs[] = {
7688 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
7689 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
7690 };
7691 static const char *const gprs_lower[] = {
7692 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
7693 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
7694 };
7695 static const char *const gprs_upper[] = {
7696 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
7697 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
7698 };
4ac33720
UW
7699 static const char *const tdb_regs[] = {
7700 "tdb0", "tac", "tct", "atia",
7701 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
7702 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
7703 };
550bdf96
AA
7704 static const char *const vxrs_low[] = {
7705 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
7706 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
7707 };
7708 static const char *const vxrs_high[] = {
7709 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
7710 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
7711 };
7803799a
UW
7712 const struct tdesc_feature *feature;
7713 int i, valid_p = 1;
7714
7715 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
7716 if (feature == NULL)
7717 return NULL;
7718
7719 tdesc_data = tdesc_data_alloc ();
7720
7721 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7722 S390_PSWM_REGNUM, "pswm");
7723 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7724 S390_PSWA_REGNUM, "pswa");
7725
7726 if (tdesc_unnumbered_register (feature, "r0"))
7727 {
7728 for (i = 0; i < 16; i++)
7729 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7730 S390_R0_REGNUM + i, gprs[i]);
7731 }
7732 else
7733 {
7734 have_upper = 1;
7735
7736 for (i = 0; i < 16; i++)
7737 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7738 S390_R0_REGNUM + i,
7739 gprs_lower[i]);
7740 for (i = 0; i < 16; i++)
7741 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7742 S390_R0_UPPER_REGNUM + i,
7743 gprs_upper[i]);
7744 }
7745
7746 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
7747 if (feature == NULL)
7748 {
7749 tdesc_data_cleanup (tdesc_data);
7750 return NULL;
7751 }
7752
7753 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7754 S390_FPC_REGNUM, "fpc");
7755 for (i = 0; i < 16; i++)
7756 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7757 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 7758
7803799a
UW
7759 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
7760 if (feature == NULL)
7761 {
7762 tdesc_data_cleanup (tdesc_data);
7763 return NULL;
7764 }
7765
7766 for (i = 0; i < 16; i++)
7767 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7768 S390_A0_REGNUM + i, acrs[i]);
7769
94eae614 7770 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
7771 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
7772 if (feature)
7773 {
7774 tdesc_numbered_register (feature, tdesc_data,
7775 S390_ORIG_R2_REGNUM, "orig_r2");
7776
7777 if (tdesc_numbered_register (feature, tdesc_data,
7778 S390_LAST_BREAK_REGNUM, "last_break"))
7779 have_linux_v1 = 1;
7780
7781 if (tdesc_numbered_register (feature, tdesc_data,
7782 S390_SYSTEM_CALL_REGNUM, "system_call"))
7783 have_linux_v2 = 1;
7784
7785 if (have_linux_v2 > have_linux_v1)
7786 valid_p = 0;
7787 }
7788
4ac33720
UW
7789 /* Transaction diagnostic block. */
7790 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
7791 if (feature)
7792 {
7793 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
7794 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7795 S390_TDB_DWORD0_REGNUM + i,
7796 tdb_regs[i]);
5aa82d05 7797 have_tdb = 1;
4ac33720
UW
7798 }
7799
550bdf96
AA
7800 /* Vector registers. */
7801 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
7802 if (feature)
7803 {
7804 for (i = 0; i < 16; i++)
7805 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7806 S390_V0_LOWER_REGNUM + i,
7807 vxrs_low[i]);
7808 for (i = 0; i < 16; i++)
7809 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7810 S390_V16_REGNUM + i,
7811 vxrs_high[i]);
7812 have_vx = 1;
7813 }
7814
7803799a
UW
7815 if (!valid_p)
7816 {
7817 tdesc_data_cleanup (tdesc_data);
7818 return NULL;
7819 }
7820 }
5769d3cd 7821
417c80f9
AA
7822 /* Determine vector ABI. */
7823 vector_abi = S390_VECTOR_ABI_NONE;
7824#ifdef HAVE_ELF
7825 if (have_vx
7826 && info.abfd != NULL
7827 && info.abfd->format == bfd_object
7828 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7829 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7830 Tag_GNU_S390_ABI_Vector) == 2)
7831 vector_abi = S390_VECTOR_ABI_128;
7832#endif
7833
7803799a
UW
7834 /* Find a candidate among extant architectures. */
7835 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7836 arches != NULL;
7837 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7838 {
7839 tdep = gdbarch_tdep (arches->gdbarch);
7840 if (!tdep)
7841 continue;
7842 if (tdep->abi != tdep_abi)
7843 continue;
417c80f9
AA
7844 if (tdep->vector_abi != vector_abi)
7845 continue;
7803799a
UW
7846 if ((tdep->gpr_full_regnum != -1) != have_upper)
7847 continue;
7848 if (tdesc_data != NULL)
7849 tdesc_data_cleanup (tdesc_data);
7850 return arches->gdbarch;
7851 }
5769d3cd 7852
7803799a 7853 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 7854 tdep = XCNEW (struct gdbarch_tdep);
7803799a 7855 tdep->abi = tdep_abi;
417c80f9 7856 tdep->vector_abi = vector_abi;
5aa82d05
AA
7857 tdep->have_linux_v1 = have_linux_v1;
7858 tdep->have_linux_v2 = have_linux_v2;
7859 tdep->have_tdb = have_tdb;
d0f54f9d 7860 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
7861
7862 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 7863 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 7864
1de90795
UW
7865 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7866 We can safely let them default to 128-bit, since the debug info
7867 will give the size of type actually used in each case. */
7868 set_gdbarch_long_double_bit (gdbarch, 128);
7869 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
7870
aaab4dba 7871 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 7872 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 7873 always. */
5769d3cd 7874 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
7875 /* Stack grows downward. */
7876 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd 7877 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
6df55226
MK
7878 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
7879 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
5769d3cd 7880 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
c9cf6e20 7881 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
a8c99f38 7882
7803799a 7883 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 7884 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 7885 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 7886 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 7887 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 7888 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7803799a 7889 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
5aa82d05
AA
7890 set_gdbarch_iterate_over_regset_sections (gdbarch,
7891 s390_iterate_over_regset_sections);
c642a434
UW
7892 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
7893 set_gdbarch_write_pc (gdbarch, s390_write_pc);
f79a3bae 7894 set_gdbarch_guess_tracepoint_registers (gdbarch, s390_guess_tracepoint_registers);
7803799a
UW
7895 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7896 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7897 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7898 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7899 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 7900 s390_pseudo_register_reggroup_p);
7803799a 7901 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
550bdf96 7902 set_gdbarch_register_name (gdbarch, s390_register_name);
7803799a
UW
7903
7904 /* Assign pseudo register numbers. */
7905 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7906 last_pseudo_reg = first_pseudo_reg;
7907 tdep->gpr_full_regnum = -1;
7908 if (have_upper)
7909 {
7910 tdep->gpr_full_regnum = last_pseudo_reg;
7911 last_pseudo_reg += 16;
7912 }
550bdf96
AA
7913 tdep->v0_full_regnum = -1;
7914 if (have_vx)
7915 {
7916 tdep->v0_full_regnum = last_pseudo_reg;
7917 last_pseudo_reg += 16;
7918 }
7803799a
UW
7919 tdep->pc_regnum = last_pseudo_reg++;
7920 tdep->cc_regnum = last_pseudo_reg++;
7921 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7922 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 7923
b0cf273e
JB
7924 /* Inferior function calls. */
7925 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 7926 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 7927 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 7928 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 7929
237b092b
AA
7930 /* Syscall handling. */
7931 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
7932
a8c99f38 7933 /* Frame handling. */
a431654a 7934 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 7935 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 7936 dwarf2_append_unwinders (gdbarch);
a431654a 7937 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
7938 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7939 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
7940 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
7941 frame_base_set_default (gdbarch, &s390_frame_base);
7942 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7943 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7944
1db4e8a0
UW
7945 /* Displaced stepping. */
7946 set_gdbarch_displaced_step_copy_insn (gdbarch,
5ac21343 7947 s390_displaced_step_copy_insn);
1db4e8a0
UW
7948 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
7949 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 7950 simple_displaced_step_free_closure);
906d60cf 7951 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
1db4e8a0
UW
7952 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
7953
70728992
PA
7954 /* Note that GNU/Linux is the only OS supported on this
7955 platform. */
7956 linux_init_abi (info, gdbarch);
7957
7803799a 7958 switch (tdep->abi)
5769d3cd 7959 {
7803799a 7960 case ABI_LINUX_S390:
5769d3cd 7961 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
7962 set_solib_svr4_fetch_link_map_offsets
7963 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 7964
458c8db8 7965 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
5769d3cd 7966 break;
b0cf273e 7967
7803799a 7968 case ABI_LINUX_ZSERIES:
5769d3cd
AC
7969 set_gdbarch_long_bit (gdbarch, 64);
7970 set_gdbarch_long_long_bit (gdbarch, 64);
7971 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
7972 set_solib_svr4_fetch_link_map_offsets
7973 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 7974 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 7975 s390_address_class_type_flags);
ffc65945 7976 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 7977 s390_address_class_type_flags_to_name);
ffc65945 7978 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 7979 s390_address_class_name_to_type_flags);
d851a69a 7980 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X);
5769d3cd
AC
7981 break;
7982 }
7983
36482093
AC
7984 set_gdbarch_print_insn (gdbarch, print_insn_s390);
7985
982e9687
UW
7986 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
7987
b2756930
KB
7988 /* Enable TLS support. */
7989 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 7990 svr4_fetch_objfile_link_map);
b2756930 7991
55aa24fb 7992 /* SystemTap functions. */
05c0465e
SDJ
7993 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7994 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7995 stap_register_indirection_prefixes);
7996 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7997 stap_register_indirection_suffixes);
55aa24fb 7998 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
60abeae4
AA
7999 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
8000 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
55aa24fb 8001
566c56c9
MK
8002 /* Support reverse debugging. */
8003
8004 set_gdbarch_process_record (gdbarch, s390_process_record);
8005 set_gdbarch_process_record_signal (gdbarch, s390_linux_record_signal);
8006
8007 s390_init_linux_record_tdep (&s390_linux_record_tdep, ABI_LINUX_S390);
8008 s390_init_linux_record_tdep (&s390x_linux_record_tdep, ABI_LINUX_ZSERIES);
8009
5769d3cd
AC
8010 return gdbarch;
8011}
8012
8013
a78f21af
AC
8014extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
8015
5769d3cd 8016void
5ae5f592 8017_initialize_s390_tdep (void)
5769d3cd 8018{
5769d3cd
AC
8019 /* Hook us into the gdbarch mechanism. */
8020 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 8021
94eae614 8022 /* Initialize the GNU/Linux target descriptions. */
7803799a 8023 initialize_tdesc_s390_linux32 ();
c642a434
UW
8024 initialize_tdesc_s390_linux32v1 ();
8025 initialize_tdesc_s390_linux32v2 ();
7803799a 8026 initialize_tdesc_s390_linux64 ();
c642a434
UW
8027 initialize_tdesc_s390_linux64v1 ();
8028 initialize_tdesc_s390_linux64v2 ();
4ac33720 8029 initialize_tdesc_s390_te_linux64 ();
550bdf96
AA
8030 initialize_tdesc_s390_vx_linux64 ();
8031 initialize_tdesc_s390_tevx_linux64 ();
7803799a 8032 initialize_tdesc_s390x_linux64 ();
c642a434
UW
8033 initialize_tdesc_s390x_linux64v1 ();
8034 initialize_tdesc_s390x_linux64v2 ();
4ac33720 8035 initialize_tdesc_s390x_te_linux64 ();
550bdf96
AA
8036 initialize_tdesc_s390x_vx_linux64 ();
8037 initialize_tdesc_s390x_tevx_linux64 ();
5769d3cd 8038}
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