Support fusion for ELFv2 stubs
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
ecd75fc8 3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
78f8b424 42#include "gdb_assert.h"
a89aa300 43#include "dis-asm.h"
76a9d10f 44#include "solib-svr4.h"
3fc46200 45#include "prologue-value.h"
70728992 46#include "linux-tdep.h"
0e5fae36 47#include "s390-linux-tdep.h"
4ac33720 48#include "auxv.h"
237b092b 49#include "xml-syscall.h"
5769d3cd 50
55aa24fb
SDJ
51#include "stap-probe.h"
52#include "ax.h"
53#include "ax-gdb.h"
54#include "user-regs.h"
55#include "cli/cli-utils.h"
56#include <ctype.h>
04a83fee 57#include "elf/common.h"
55aa24fb 58
7803799a 59#include "features/s390-linux32.c"
c642a434
UW
60#include "features/s390-linux32v1.c"
61#include "features/s390-linux32v2.c"
7803799a 62#include "features/s390-linux64.c"
c642a434
UW
63#include "features/s390-linux64v1.c"
64#include "features/s390-linux64v2.c"
4ac33720 65#include "features/s390-te-linux64.c"
7803799a 66#include "features/s390x-linux64.c"
c642a434
UW
67#include "features/s390x-linux64v1.c"
68#include "features/s390x-linux64v2.c"
4ac33720 69#include "features/s390x-te-linux64.c"
7803799a 70
237b092b
AA
71#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
72#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
73
d0f54f9d
JB
74/* The tdep structure. */
75
76struct gdbarch_tdep
5769d3cd 77{
b0cf273e
JB
78 /* ABI version. */
79 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
80
7803799a
UW
81 /* Pseudo register numbers. */
82 int gpr_full_regnum;
83 int pc_regnum;
84 int cc_regnum;
85
d0f54f9d
JB
86 /* Core file register sets. */
87 const struct regset *gregset;
88 int sizeof_gregset;
89
90 const struct regset *fpregset;
91 int sizeof_fpregset;
92};
93
94
7803799a
UW
95/* ABI call-saved register information. */
96
97static int
98s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 99{
7803799a
UW
100 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
101
102 switch (tdep->abi)
6707b003 103 {
7803799a
UW
104 case ABI_LINUX_S390:
105 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
106 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
107 || regnum == S390_A0_REGNUM)
108 return 1;
6707b003 109
7803799a
UW
110 break;
111
112 case ABI_LINUX_ZSERIES:
113 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
114 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
115 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
116 return 1;
117
118 break;
119 }
120
121 return 0;
5769d3cd
AC
122}
123
c642a434
UW
124static int
125s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
126{
127 /* The last-break address is read-only. */
128 return regnum == S390_LAST_BREAK_REGNUM;
129}
130
131static void
132s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
133{
134 struct gdbarch *gdbarch = get_regcache_arch (regcache);
135 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
136
137 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
138
139 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
140 messing with the PC we just installed, if we happen to be within
141 an interrupted system call that the kernel wants to restart.
142
143 Note that after we return from the dummy call, the SYSTEM_CALL and
144 ORIG_R2 registers will be automatically restored, and the kernel
145 continues to restart the system call at this point. */
146 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
147 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
148}
149
7803799a 150
d0f54f9d
JB
151/* DWARF Register Mapping. */
152
2ccd1468 153static const short s390_dwarf_regmap[] =
d0f54f9d
JB
154{
155 /* General Purpose Registers. */
156 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
157 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
158 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
159 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
160
161 /* Floating Point Registers. */
162 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
163 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
164 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
165 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
166
167 /* Control Registers (not mapped). */
34201ae3
UW
168 -1, -1, -1, -1, -1, -1, -1, -1,
169 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d
JB
170
171 /* Access Registers. */
172 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
173 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
174 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
175 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
176
177 /* Program Status Word. */
178 S390_PSWM_REGNUM,
7803799a
UW
179 S390_PSWA_REGNUM,
180
181 /* GPR Lower Half Access. */
182 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
183 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
184 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
185 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 186
94eae614 187 /* GNU/Linux-specific registers (not mapped). */
c642a434 188 -1, -1, -1,
d0f54f9d
JB
189};
190
191/* Convert DWARF register number REG to the appropriate register
192 number used by GDB. */
a78f21af 193static int
d3f73121 194s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 195{
7803799a
UW
196 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
197
198 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
199 GPRs. Note that call frame information still refers to the 32-bit
200 lower halves, because s390_adjust_frame_regnum uses register numbers
201 66 .. 81 to access GPRs. */
202 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
203 return tdep->gpr_full_regnum + reg;
d0f54f9d 204
16aff9a6 205 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 206 return s390_dwarf_regmap[reg];
d0f54f9d 207
7803799a
UW
208 warning (_("Unmapped DWARF Register #%d encountered."), reg);
209 return -1;
210}
d0f54f9d 211
7803799a
UW
212/* Translate a .eh_frame register to DWARF register, or adjust a
213 .debug_frame register. */
214static int
215s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
216{
217 /* See s390_dwarf_reg_to_regnum for comments. */
218 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
219}
220
d0f54f9d 221
7803799a
UW
222/* Pseudo registers. */
223
2ccd1468
UW
224static int
225regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
226{
227 return (tdep->gpr_full_regnum != -1
228 && regnum >= tdep->gpr_full_regnum
229 && regnum <= tdep->gpr_full_regnum + 15);
230}
231
7803799a
UW
232static const char *
233s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 234{
7803799a 235 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 236
7803799a
UW
237 if (regnum == tdep->pc_regnum)
238 return "pc";
d0f54f9d 239
7803799a
UW
240 if (regnum == tdep->cc_regnum)
241 return "cc";
d0f54f9d 242
2ccd1468 243 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
244 {
245 static const char *full_name[] = {
246 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
247 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
248 };
249 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 250 }
7803799a
UW
251
252 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
253}
254
7803799a
UW
255static struct type *
256s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 257{
7803799a 258 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 259
7803799a
UW
260 if (regnum == tdep->pc_regnum)
261 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 262
7803799a
UW
263 if (regnum == tdep->cc_regnum)
264 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 265
2ccd1468 266 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
267 return builtin_type (gdbarch)->builtin_uint64;
268
269 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
270}
271
05d1431c 272static enum register_status
7803799a
UW
273s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
274 int regnum, gdb_byte *buf)
d0f54f9d 275{
7803799a 276 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 277 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 278 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
279 ULONGEST val;
280
7803799a 281 if (regnum == tdep->pc_regnum)
d0f54f9d 282 {
05d1431c
PA
283 enum register_status status;
284
285 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
286 if (status == REG_VALID)
287 {
288 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
289 val &= 0x7fffffff;
290 store_unsigned_integer (buf, regsize, byte_order, val);
291 }
292 return status;
7803799a 293 }
d0f54f9d 294
7803799a
UW
295 if (regnum == tdep->cc_regnum)
296 {
05d1431c
PA
297 enum register_status status;
298
299 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
300 if (status == REG_VALID)
301 {
302 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
303 val = (val >> 12) & 3;
304 else
305 val = (val >> 44) & 3;
306 store_unsigned_integer (buf, regsize, byte_order, val);
307 }
308 return status;
7803799a 309 }
d0f54f9d 310
2ccd1468 311 if (regnum_is_gpr_full (tdep, regnum))
7803799a 312 {
05d1431c 313 enum register_status status;
7803799a 314 ULONGEST val_upper;
05d1431c 315
7803799a
UW
316 regnum -= tdep->gpr_full_regnum;
317
05d1431c
PA
318 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
319 if (status == REG_VALID)
320 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
321 &val_upper);
322 if (status == REG_VALID)
323 {
324 val |= val_upper << 32;
325 store_unsigned_integer (buf, regsize, byte_order, val);
326 }
327 return status;
d0f54f9d 328 }
7803799a
UW
329
330 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
331}
332
333static void
7803799a
UW
334s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
335 int regnum, const gdb_byte *buf)
d0f54f9d 336{
7803799a 337 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 338 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 339 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
340 ULONGEST val, psw;
341
7803799a 342 if (regnum == tdep->pc_regnum)
d0f54f9d 343 {
7803799a
UW
344 val = extract_unsigned_integer (buf, regsize, byte_order);
345 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
346 {
347 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
348 val = (psw & 0x80000000) | (val & 0x7fffffff);
349 }
350 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
351 return;
352 }
d0f54f9d 353
7803799a
UW
354 if (regnum == tdep->cc_regnum)
355 {
356 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 357 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
358 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
359 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
360 else
361 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
362 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
363 return;
364 }
d0f54f9d 365
2ccd1468 366 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
367 {
368 regnum -= tdep->gpr_full_regnum;
369 val = extract_unsigned_integer (buf, regsize, byte_order);
370 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
371 val & 0xffffffff);
372 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
373 val >> 32);
374 return;
d0f54f9d 375 }
7803799a
UW
376
377 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
378}
379
380/* 'float' values are stored in the upper half of floating-point
381 registers, even though we are otherwise a big-endian platform. */
382
9acbedc0 383static struct value *
2ed3c037
UW
384s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
385 int regnum, struct frame_id frame_id)
d0f54f9d 386{
2ed3c037
UW
387 struct value *value = default_value_from_register (gdbarch, type,
388 regnum, frame_id);
744a8059
SP
389 check_typedef (type);
390
391 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
392 && TYPE_LENGTH (type) < 8)
9acbedc0 393 set_value_offset (value, 0);
d0f54f9d 394
9acbedc0 395 return value;
d0f54f9d
JB
396}
397
398/* Register groups. */
399
a78f21af 400static int
7803799a
UW
401s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
402 struct reggroup *group)
d0f54f9d
JB
403{
404 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
405
d6db1fab
UW
406 /* We usually save/restore the whole PSW, which includes PC and CC.
407 However, some older gdbservers may not support saving/restoring
408 the whole PSW yet, and will return an XML register description
409 excluding those from the save/restore register groups. In those
410 cases, we still need to explicitly save/restore PC and CC in order
411 to push or pop frames. Since this doesn't hurt anything if we
412 already save/restore the whole PSW (it's just redundant), we add
413 PC and CC at this point unconditionally. */
d0f54f9d 414 if (group == save_reggroup || group == restore_reggroup)
7803799a 415 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
416
417 return default_register_reggroup_p (gdbarch, regnum, group);
418}
419
420
2ccd1468 421/* Maps for register sets. */
d0f54f9d 422
2ccd1468
UW
423const short s390_regmap_gregset[] =
424 {
425 0x00, S390_PSWM_REGNUM,
426 0x04, S390_PSWA_REGNUM,
427 0x08, S390_R0_REGNUM,
428 0x0c, S390_R1_REGNUM,
429 0x10, S390_R2_REGNUM,
430 0x14, S390_R3_REGNUM,
431 0x18, S390_R4_REGNUM,
432 0x1c, S390_R5_REGNUM,
433 0x20, S390_R6_REGNUM,
434 0x24, S390_R7_REGNUM,
435 0x28, S390_R8_REGNUM,
436 0x2c, S390_R9_REGNUM,
437 0x30, S390_R10_REGNUM,
438 0x34, S390_R11_REGNUM,
439 0x38, S390_R12_REGNUM,
440 0x3c, S390_R13_REGNUM,
441 0x40, S390_R14_REGNUM,
442 0x44, S390_R15_REGNUM,
443 0x48, S390_A0_REGNUM,
444 0x4c, S390_A1_REGNUM,
445 0x50, S390_A2_REGNUM,
446 0x54, S390_A3_REGNUM,
447 0x58, S390_A4_REGNUM,
448 0x5c, S390_A5_REGNUM,
449 0x60, S390_A6_REGNUM,
450 0x64, S390_A7_REGNUM,
451 0x68, S390_A8_REGNUM,
452 0x6c, S390_A9_REGNUM,
453 0x70, S390_A10_REGNUM,
454 0x74, S390_A11_REGNUM,
455 0x78, S390_A12_REGNUM,
456 0x7c, S390_A13_REGNUM,
457 0x80, S390_A14_REGNUM,
458 0x84, S390_A15_REGNUM,
459 0x88, S390_ORIG_R2_REGNUM,
460 -1, -1
461 };
d0f54f9d 462
2ccd1468
UW
463const short s390x_regmap_gregset[] =
464 {
465 0x00, S390_PSWM_REGNUM,
466 0x08, S390_PSWA_REGNUM,
467 0x10, S390_R0_REGNUM,
468 0x18, S390_R1_REGNUM,
469 0x20, S390_R2_REGNUM,
470 0x28, S390_R3_REGNUM,
471 0x30, S390_R4_REGNUM,
472 0x38, S390_R5_REGNUM,
473 0x40, S390_R6_REGNUM,
474 0x48, S390_R7_REGNUM,
475 0x50, S390_R8_REGNUM,
476 0x58, S390_R9_REGNUM,
477 0x60, S390_R10_REGNUM,
478 0x68, S390_R11_REGNUM,
479 0x70, S390_R12_REGNUM,
480 0x78, S390_R13_REGNUM,
481 0x80, S390_R14_REGNUM,
482 0x88, S390_R15_REGNUM,
483 0x90, S390_A0_REGNUM,
484 0x94, S390_A1_REGNUM,
485 0x98, S390_A2_REGNUM,
486 0x9c, S390_A3_REGNUM,
487 0xa0, S390_A4_REGNUM,
488 0xa4, S390_A5_REGNUM,
489 0xa8, S390_A6_REGNUM,
490 0xac, S390_A7_REGNUM,
491 0xb0, S390_A8_REGNUM,
492 0xb4, S390_A9_REGNUM,
493 0xb8, S390_A10_REGNUM,
494 0xbc, S390_A11_REGNUM,
495 0xc0, S390_A12_REGNUM,
496 0xc4, S390_A13_REGNUM,
497 0xc8, S390_A14_REGNUM,
498 0xcc, S390_A15_REGNUM,
499 0x10, S390_R0_UPPER_REGNUM,
500 0x18, S390_R1_UPPER_REGNUM,
501 0x20, S390_R2_UPPER_REGNUM,
502 0x28, S390_R3_UPPER_REGNUM,
503 0x30, S390_R4_UPPER_REGNUM,
504 0x38, S390_R5_UPPER_REGNUM,
505 0x40, S390_R6_UPPER_REGNUM,
506 0x48, S390_R7_UPPER_REGNUM,
507 0x50, S390_R8_UPPER_REGNUM,
508 0x58, S390_R9_UPPER_REGNUM,
509 0x60, S390_R10_UPPER_REGNUM,
510 0x68, S390_R11_UPPER_REGNUM,
511 0x70, S390_R12_UPPER_REGNUM,
512 0x78, S390_R13_UPPER_REGNUM,
513 0x80, S390_R14_UPPER_REGNUM,
514 0x88, S390_R15_UPPER_REGNUM,
515 0xd0, S390_ORIG_R2_REGNUM,
516 -1, -1
517 };
d0f54f9d 518
2ccd1468
UW
519const short s390_regmap_fpregset[] =
520 {
521 0x00, S390_FPC_REGNUM,
522 0x08, S390_F0_REGNUM,
523 0x10, S390_F1_REGNUM,
524 0x18, S390_F2_REGNUM,
525 0x20, S390_F3_REGNUM,
526 0x28, S390_F4_REGNUM,
527 0x30, S390_F5_REGNUM,
528 0x38, S390_F6_REGNUM,
529 0x40, S390_F7_REGNUM,
530 0x48, S390_F8_REGNUM,
531 0x50, S390_F9_REGNUM,
532 0x58, S390_F10_REGNUM,
533 0x60, S390_F11_REGNUM,
534 0x68, S390_F12_REGNUM,
535 0x70, S390_F13_REGNUM,
536 0x78, S390_F14_REGNUM,
537 0x80, S390_F15_REGNUM,
538 -1, -1
539 };
7803799a 540
2ccd1468
UW
541const short s390_regmap_upper[] =
542 {
543 0x00, S390_R0_UPPER_REGNUM,
544 0x04, S390_R1_UPPER_REGNUM,
545 0x08, S390_R2_UPPER_REGNUM,
546 0x0c, S390_R3_UPPER_REGNUM,
547 0x10, S390_R4_UPPER_REGNUM,
548 0x14, S390_R5_UPPER_REGNUM,
549 0x18, S390_R6_UPPER_REGNUM,
550 0x1c, S390_R7_UPPER_REGNUM,
551 0x20, S390_R8_UPPER_REGNUM,
552 0x24, S390_R9_UPPER_REGNUM,
553 0x28, S390_R10_UPPER_REGNUM,
554 0x2c, S390_R11_UPPER_REGNUM,
555 0x30, S390_R12_UPPER_REGNUM,
556 0x34, S390_R13_UPPER_REGNUM,
557 0x38, S390_R14_UPPER_REGNUM,
558 0x3c, S390_R15_UPPER_REGNUM,
559 -1, -1
560 };
c642a434 561
2ccd1468
UW
562const short s390_regmap_last_break[] =
563 {
564 0x04, S390_LAST_BREAK_REGNUM,
565 -1, -1
566 };
567
568const short s390x_regmap_last_break[] =
569 {
570 0x00, S390_LAST_BREAK_REGNUM,
571 -1, -1
572 };
573
574const short s390_regmap_system_call[] =
575 {
576 0x00, S390_SYSTEM_CALL_REGNUM,
577 -1, -1
578 };
c642a434 579
4ac33720
UW
580const short s390_regmap_tdb[] =
581 {
582 0x00, S390_TDB_DWORD0_REGNUM,
583 0x08, S390_TDB_ABORT_CODE_REGNUM,
584 0x10, S390_TDB_CONFLICT_TOKEN_REGNUM,
585 0x18, S390_TDB_ATIA_REGNUM,
586 0x80, S390_TDB_R0_REGNUM,
587 0x88, S390_TDB_R1_REGNUM,
588 0x90, S390_TDB_R2_REGNUM,
589 0x98, S390_TDB_R3_REGNUM,
590 0xa0, S390_TDB_R4_REGNUM,
591 0xa8, S390_TDB_R5_REGNUM,
592 0xb0, S390_TDB_R6_REGNUM,
593 0xb8, S390_TDB_R7_REGNUM,
594 0xc0, S390_TDB_R8_REGNUM,
595 0xc8, S390_TDB_R9_REGNUM,
596 0xd0, S390_TDB_R10_REGNUM,
597 0xd8, S390_TDB_R11_REGNUM,
598 0xe0, S390_TDB_R12_REGNUM,
599 0xe8, S390_TDB_R13_REGNUM,
600 0xf0, S390_TDB_R14_REGNUM,
601 0xf8, S390_TDB_R15_REGNUM,
602 -1, -1
603 };
c642a434 604
d0f54f9d 605
34201ae3 606/* Supply register REGNUM from the register set REGSET to register cache
d0f54f9d
JB
607 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
608static void
609s390_supply_regset (const struct regset *regset, struct regcache *regcache,
610 int regnum, const void *regs, size_t len)
611{
2ccd1468
UW
612 const short *map;
613 for (map = regset->descr; map[0] >= 0; map += 2)
614 if (regnum == -1 || regnum == map[1])
4ac33720
UW
615 regcache_raw_supply (regcache, map[1],
616 regs ? (const char *)regs + map[0] : NULL);
617}
618
619/* Supply the TDB regset. Like s390_supply_regset, but invalidate the
620 TDB registers unless the TDB format field is valid. */
621
622static void
623s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
624 int regnum, const void *regs, size_t len)
625{
626 ULONGEST tdw;
627 enum register_status ret;
628 int i;
629
630 s390_supply_regset (regset, regcache, regnum, regs, len);
631 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
632 if (ret != REG_VALID || (tdw >> 56) != 1)
633 s390_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
634}
635
92f38ec2
UW
636/* Collect register REGNUM from the register cache REGCACHE and store
637 it in the buffer specified by REGS and LEN as described by the
638 general-purpose register set REGSET. If REGNUM is -1, do this for
639 all registers in REGSET. */
640static void
641s390_collect_regset (const struct regset *regset,
642 const struct regcache *regcache,
643 int regnum, void *regs, size_t len)
644{
2ccd1468
UW
645 const short *map;
646 for (map = regset->descr; map[0] >= 0; map += 2)
647 if (regnum == -1 || regnum == map[1])
648 regcache_raw_collect (regcache, map[1], (char *)regs + map[0]);
92f38ec2
UW
649}
650
d0f54f9d 651static const struct regset s390_gregset = {
34201ae3 652 s390_regmap_gregset,
92f38ec2
UW
653 s390_supply_regset,
654 s390_collect_regset
d0f54f9d
JB
655};
656
657static const struct regset s390x_gregset = {
34201ae3 658 s390x_regmap_gregset,
92f38ec2
UW
659 s390_supply_regset,
660 s390_collect_regset
d0f54f9d
JB
661};
662
663static const struct regset s390_fpregset = {
34201ae3 664 s390_regmap_fpregset,
92f38ec2
UW
665 s390_supply_regset,
666 s390_collect_regset
d0f54f9d
JB
667};
668
7803799a 669static const struct regset s390_upper_regset = {
34201ae3 670 s390_regmap_upper,
7803799a
UW
671 s390_supply_regset,
672 s390_collect_regset
673};
674
c642a434
UW
675static const struct regset s390_last_break_regset = {
676 s390_regmap_last_break,
677 s390_supply_regset,
678 s390_collect_regset
679};
680
681static const struct regset s390x_last_break_regset = {
682 s390x_regmap_last_break,
683 s390_supply_regset,
684 s390_collect_regset
685};
686
687static const struct regset s390_system_call_regset = {
688 s390_regmap_system_call,
689 s390_supply_regset,
690 s390_collect_regset
691};
692
4ac33720
UW
693static const struct regset s390_tdb_regset = {
694 s390_regmap_tdb,
695 s390_supply_tdb_regset,
696 s390_collect_regset
697};
698
c642a434
UW
699static struct core_regset_section s390_linux32_regset_sections[] =
700{
701 { ".reg", s390_sizeof_gregset, "general-purpose" },
702 { ".reg2", s390_sizeof_fpregset, "floating-point" },
703 { NULL, 0}
704};
705
706static struct core_regset_section s390_linux32v1_regset_sections[] =
707{
708 { ".reg", s390_sizeof_gregset, "general-purpose" },
709 { ".reg2", s390_sizeof_fpregset, "floating-point" },
710 { ".reg-s390-last-break", 8, "s390 last-break address" },
711 { NULL, 0}
712};
713
714static struct core_regset_section s390_linux32v2_regset_sections[] =
715{
716 { ".reg", s390_sizeof_gregset, "general-purpose" },
717 { ".reg2", s390_sizeof_fpregset, "floating-point" },
718 { ".reg-s390-last-break", 8, "s390 last-break address" },
719 { ".reg-s390-system-call", 4, "s390 system-call" },
720 { NULL, 0}
721};
722
723static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
724{
725 { ".reg", s390_sizeof_gregset, "general-purpose" },
726 { ".reg2", s390_sizeof_fpregset, "floating-point" },
727 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
728 { NULL, 0}
729};
730
c642a434
UW
731static struct core_regset_section s390_linux64v1_regset_sections[] =
732{
733 { ".reg", s390_sizeof_gregset, "general-purpose" },
734 { ".reg2", s390_sizeof_fpregset, "floating-point" },
735 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
736 { ".reg-s390-last-break", 8, "s930 last-break address" },
737 { NULL, 0}
738};
739
740static struct core_regset_section s390_linux64v2_regset_sections[] =
741{
742 { ".reg", s390_sizeof_gregset, "general-purpose" },
743 { ".reg2", s390_sizeof_fpregset, "floating-point" },
744 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
745 { ".reg-s390-last-break", 8, "s930 last-break address" },
746 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 747 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
748 { NULL, 0}
749};
750
751static struct core_regset_section s390x_linux64_regset_sections[] =
752{
753 { ".reg", s390x_sizeof_gregset, "general-purpose" },
754 { ".reg2", s390_sizeof_fpregset, "floating-point" },
755 { NULL, 0}
756};
757
758static struct core_regset_section s390x_linux64v1_regset_sections[] =
759{
760 { ".reg", s390x_sizeof_gregset, "general-purpose" },
761 { ".reg2", s390_sizeof_fpregset, "floating-point" },
762 { ".reg-s390-last-break", 8, "s930 last-break address" },
763 { NULL, 0}
764};
765
766static struct core_regset_section s390x_linux64v2_regset_sections[] =
767{
768 { ".reg", s390x_sizeof_gregset, "general-purpose" },
769 { ".reg2", s390_sizeof_fpregset, "floating-point" },
770 { ".reg-s390-last-break", 8, "s930 last-break address" },
771 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 772 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
773 { NULL, 0}
774};
775
776
d0f54f9d
JB
777/* Return the appropriate register set for the core section identified
778 by SECT_NAME and SECT_SIZE. */
63807e1d 779static const struct regset *
d0f54f9d
JB
780s390_regset_from_core_section (struct gdbarch *gdbarch,
781 const char *sect_name, size_t sect_size)
782{
783 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
784
e31dcd20 785 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
786 return tdep->gregset;
787
e31dcd20 788 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
789 return tdep->fpregset;
790
7803799a
UW
791 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
792 return &s390_upper_regset;
793
c642a434
UW
794 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
795 return (gdbarch_ptr_bit (gdbarch) == 32
796 ? &s390_last_break_regset : &s390x_last_break_regset);
797
798 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
799 return &s390_system_call_regset;
800
4ac33720
UW
801 if (strcmp (sect_name, ".reg-s390-tdb") == 0 && sect_size >= 256)
802 return &s390_tdb_regset;
803
d0f54f9d 804 return NULL;
5769d3cd
AC
805}
806
7803799a
UW
807static const struct target_desc *
808s390_core_read_description (struct gdbarch *gdbarch,
809 struct target_ops *target, bfd *abfd)
810{
811 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
812 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
813 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a 814 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 815 CORE_ADDR hwcap = 0;
4ac33720
UW
816
817 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
818 if (!section)
819 return NULL;
820
821 switch (bfd_section_size (abfd, section))
822 {
823 case s390_sizeof_gregset:
c642a434 824 if (high_gprs)
4ac33720
UW
825 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 :
826 v2? tdesc_s390_linux64v2 :
c642a434
UW
827 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
828 else
829 return (v2? tdesc_s390_linux32v2 :
830 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
831
832 case s390x_sizeof_gregset:
4ac33720
UW
833 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 :
834 v2? tdesc_s390x_linux64v2 :
c642a434 835 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
836
837 default:
838 return NULL;
839 }
840}
841
d0f54f9d 842
4bc8c588
JB
843/* Decoding S/390 instructions. */
844
845/* Named opcode values for the S/390 instructions we recognize. Some
846 instructions have their opcode split across two fields; those are the
847 op1_* and op2_* enums. */
848enum
849 {
a8c99f38
JB
850 op1_lhi = 0xa7, op2_lhi = 0x08,
851 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 852 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 853 op_lr = 0x18,
a8c99f38
JB
854 op_lgr = 0xb904,
855 op_l = 0x58,
856 op1_ly = 0xe3, op2_ly = 0x58,
857 op1_lg = 0xe3, op2_lg = 0x04,
858 op_lm = 0x98,
859 op1_lmy = 0xeb, op2_lmy = 0x98,
860 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 861 op_st = 0x50,
a8c99f38 862 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 863 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 864 op_std = 0x60,
4bc8c588 865 op_stm = 0x90,
a8c99f38 866 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 867 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
868 op1_aghi = 0xa7, op2_aghi = 0x0b,
869 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
870 op1_agfi = 0xc2, op2_agfi = 0x08,
871 op1_afi = 0xc2, op2_afi = 0x09,
872 op1_algfi= 0xc2, op2_algfi= 0x0a,
873 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
874 op_ar = 0x1a,
875 op_agr = 0xb908,
876 op_a = 0x5a,
877 op1_ay = 0xe3, op2_ay = 0x5a,
878 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
879 op1_slgfi= 0xc2, op2_slgfi= 0x04,
880 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
881 op_sr = 0x1b,
882 op_sgr = 0xb909,
883 op_s = 0x5b,
884 op1_sy = 0xe3, op2_sy = 0x5b,
885 op1_sg = 0xe3, op2_sg = 0x09,
886 op_nr = 0x14,
887 op_ngr = 0xb980,
888 op_la = 0x41,
889 op1_lay = 0xe3, op2_lay = 0x71,
890 op1_larl = 0xc0, op2_larl = 0x00,
891 op_basr = 0x0d,
892 op_bas = 0x4d,
893 op_bcr = 0x07,
894 op_bc = 0x0d,
1db4e8a0
UW
895 op_bctr = 0x06,
896 op_bctgr = 0xb946,
897 op_bct = 0x46,
898 op1_bctg = 0xe3, op2_bctg = 0x46,
899 op_bxh = 0x86,
900 op1_bxhg = 0xeb, op2_bxhg = 0x44,
901 op_bxle = 0x87,
902 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
903 op1_bras = 0xa7, op2_bras = 0x05,
904 op1_brasl= 0xc0, op2_brasl= 0x05,
905 op1_brc = 0xa7, op2_brc = 0x04,
906 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
907 op1_brct = 0xa7, op2_brct = 0x06,
908 op1_brctg= 0xa7, op2_brctg= 0x07,
909 op_brxh = 0x84,
910 op1_brxhg= 0xec, op2_brxhg= 0x44,
911 op_brxle = 0x85,
912 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 913 op_svc = 0x0a,
4bc8c588
JB
914 };
915
916
a8c99f38
JB
917/* Read a single instruction from address AT. */
918
919#define S390_MAX_INSTR_SIZE 6
920static int
921s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
922{
923 static int s390_instrlen[] = { 2, 4, 4, 6 };
924 int instrlen;
925
8defab1a 926 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
927 return -1;
928 instrlen = s390_instrlen[instr[0] >> 6];
929 if (instrlen > 2)
930 {
8defab1a 931 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 932 return -1;
a8c99f38
JB
933 }
934 return instrlen;
935}
936
937
4bc8c588
JB
938/* The functions below are for recognizing and decoding S/390
939 instructions of various formats. Each of them checks whether INSN
940 is an instruction of the given format, with the specified opcodes.
941 If it is, it sets the remaining arguments to the values of the
942 instruction's fields, and returns a non-zero value; otherwise, it
943 returns zero.
944
945 These functions' arguments appear in the order they appear in the
946 instruction, not in the machine-language form. So, opcodes always
947 come first, even though they're sometimes scattered around the
948 instructions. And displacements appear before base and extension
949 registers, as they do in the assembly syntax, not at the end, as
950 they do in the machine language. */
a78f21af 951static int
4bc8c588
JB
952is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
953{
954 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
955 {
956 *r1 = (insn[1] >> 4) & 0xf;
957 /* i2 is a 16-bit signed quantity. */
958 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
959 return 1;
960 }
961 else
962 return 0;
963}
8ac0e65a 964
5769d3cd 965
4bc8c588
JB
966static int
967is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 968 unsigned int *r1, int *i2)
4bc8c588
JB
969{
970 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
971 {
972 *r1 = (insn[1] >> 4) & 0xf;
973 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
974 no sign extension is necessary, but we don't want to assume
975 that. */
4bc8c588 976 *i2 = (((insn[2] << 24)
34201ae3
UW
977 | (insn[3] << 16)
978 | (insn[4] << 8)
979 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
980 return 1;
981 }
982 else
983 return 0;
984}
985
986
987static int
988is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
989{
990 if (insn[0] == op)
991 {
992 *r1 = (insn[1] >> 4) & 0xf;
993 *r2 = insn[1] & 0xf;
994 return 1;
995 }
996 else
997 return 0;
998}
999
1000
1001static int
1002is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1003{
1004 if (((insn[0] << 8) | insn[1]) == op)
1005 {
1006 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1007 *r1 = (insn[3] >> 4) & 0xf;
1008 *r2 = insn[3] & 0xf;
1009 return 1;
1010 }
1011 else
1012 return 0;
1013}
1014
1015
1016static int
1017is_rs (bfd_byte *insn, int op,
eb1bd1fb 1018 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1019{
1020 if (insn[0] == op)
1021 {
1022 *r1 = (insn[1] >> 4) & 0xf;
1023 *r3 = insn[1] & 0xf;
1024 *b2 = (insn[2] >> 4) & 0xf;
1025 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1026 return 1;
1027 }
1028 else
1029 return 0;
1030}
1031
1032
1033static int
a8c99f38 1034is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 1035 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1036{
1037 if (insn[0] == op1
4bc8c588
JB
1038 && insn[5] == op2)
1039 {
1040 *r1 = (insn[1] >> 4) & 0xf;
1041 *r3 = insn[1] & 0xf;
1042 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1043 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1044 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1045 ^ 0x80000) - 0x80000;
4bc8c588
JB
1046 return 1;
1047 }
1048 else
1049 return 0;
1050}
1051
1052
1db4e8a0
UW
1053static int
1054is_rsi (bfd_byte *insn, int op,
34201ae3 1055 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1056{
1057 if (insn[0] == op)
1058 {
1059 *r1 = (insn[1] >> 4) & 0xf;
1060 *r3 = insn[1] & 0xf;
1061 /* i2 is a 16-bit signed quantity. */
1062 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1063 return 1;
1064 }
1065 else
1066 return 0;
1067}
1068
1069
1070static int
1071is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 1072 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1073{
1074 if (insn[0] == op1
1075 && insn[5] == op2)
1076 {
1077 *r1 = (insn[1] >> 4) & 0xf;
1078 *r3 = insn[1] & 0xf;
1079 /* i2 is a 16-bit signed quantity. */
1080 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1081 return 1;
1082 }
1083 else
1084 return 0;
1085}
1086
1087
4bc8c588
JB
1088static int
1089is_rx (bfd_byte *insn, int op,
eb1bd1fb 1090 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1091{
1092 if (insn[0] == op)
1093 {
1094 *r1 = (insn[1] >> 4) & 0xf;
1095 *x2 = insn[1] & 0xf;
1096 *b2 = (insn[2] >> 4) & 0xf;
1097 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1098 return 1;
1099 }
1100 else
1101 return 0;
1102}
1103
1104
1105static int
a8c99f38 1106is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1107 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1108{
1109 if (insn[0] == op1
4bc8c588
JB
1110 && insn[5] == op2)
1111 {
1112 *r1 = (insn[1] >> 4) & 0xf;
1113 *x2 = insn[1] & 0xf;
1114 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1115 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1116 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1117 ^ 0x80000) - 0x80000;
4bc8c588
JB
1118 return 1;
1119 }
1120 else
1121 return 0;
1122}
1123
1124
3fc46200 1125/* Prologue analysis. */
4bc8c588 1126
d0f54f9d
JB
1127#define S390_NUM_GPRS 16
1128#define S390_NUM_FPRS 16
4bc8c588 1129
a8c99f38
JB
1130struct s390_prologue_data {
1131
ee1b3323
UW
1132 /* The stack. */
1133 struct pv_area *stack;
1134
e17a4113 1135 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1136 int gpr_size;
1137 int fpr_size;
e17a4113 1138 enum bfd_endian byte_order;
a8c99f38
JB
1139
1140 /* The general-purpose registers. */
3fc46200 1141 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1142
1143 /* The floating-point registers. */
3fc46200 1144 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1145
121d8485
UW
1146 /* The offset relative to the CFA where the incoming GPR N was saved
1147 by the function prologue. 0 if not saved or unknown. */
1148 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1149
121d8485
UW
1150 /* Likewise for FPRs. */
1151 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1152
121d8485
UW
1153 /* Nonzero if the backchain was saved. This is assumed to be the
1154 case when the incoming SP is saved at the current SP location. */
1155 int back_chain_saved_p;
1156};
4bc8c588 1157
3fc46200
UW
1158/* Return the effective address for an X-style instruction, like:
1159
34201ae3 1160 L R1, D2(X2, B2)
3fc46200
UW
1161
1162 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1163 constant; the effective address is the sum of all three. If either
1164 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1165 means that r0 can't be used as either X2 or B2. */
1166static pv_t
1167s390_addr (struct s390_prologue_data *data,
1168 int d2, unsigned int x2, unsigned int b2)
1169{
1170 pv_t result;
1171
1172 result = pv_constant (d2);
1173 if (x2)
1174 result = pv_add (result, data->gpr[x2]);
1175 if (b2)
1176 result = pv_add (result, data->gpr[b2]);
1177
1178 return result;
1179}
1180
1181/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1182static void
3fc46200
UW
1183s390_store (struct s390_prologue_data *data,
1184 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1185 pv_t value)
4bc8c588 1186{
3fc46200 1187 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1188 pv_t offset;
121d8485
UW
1189
1190 /* Check whether we are storing the backchain. */
3fc46200 1191 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1192
3fc46200 1193 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1194 if (size == data->gpr_size
3fc46200 1195 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1196 {
1197 data->back_chain_saved_p = 1;
1198 return;
1199 }
1200
1201
1202 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1203 if (!pv_area_store_would_trash (data->stack, addr))
1204 pv_area_store (data->stack, addr, size, value);
4bc8c588 1205
a8c99f38 1206
121d8485
UW
1207 /* Note: If this is some store we cannot identify, you might think we
1208 should forget our cached values, as any of those might have been hit.
1209
1210 However, we make the assumption that the register save areas are only
1211 ever stored to once in any given function, and we do recognize these
1212 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1213}
4bc8c588 1214
3fc46200
UW
1215/* Do a SIZE-byte load from D2(X2,B2). */
1216static pv_t
1217s390_load (struct s390_prologue_data *data,
1218 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1219
4bc8c588 1220{
3fc46200 1221 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1222
a8c99f38
JB
1223 /* If it's a load from an in-line constant pool, then we can
1224 simulate that, under the assumption that the code isn't
1225 going to change between the time the processor actually
1226 executed it creating the current frame, and the time when
1227 we're analyzing the code to unwind past that frame. */
3fc46200 1228 if (pv_is_constant (addr))
4bc8c588 1229 {
0542c86d 1230 struct target_section *secp;
3fc46200 1231 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1232 if (secp != NULL
34201ae3 1233 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1234 secp->the_bfd_section)
34201ae3
UW
1235 & SEC_READONLY))
1236 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1237 data->byte_order));
a8c99f38 1238 }
7666f43c 1239
121d8485 1240 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1241 return pv_area_fetch (data->stack, addr, size);
1242}
121d8485 1243
ee1b3323
UW
1244/* Function for finding saved registers in a 'struct pv_area'; we pass
1245 this to pv_area_scan.
121d8485 1246
ee1b3323
UW
1247 If VALUE is a saved register, ADDR says it was saved at a constant
1248 offset from the frame base, and SIZE indicates that the whole
1249 register was saved, record its offset in the reg_offset table in
1250 PROLOGUE_UNTYPED. */
1251static void
c378eb4e
MS
1252s390_check_for_saved (void *data_untyped, pv_t addr,
1253 CORE_ADDR size, pv_t value)
ee1b3323
UW
1254{
1255 struct s390_prologue_data *data = data_untyped;
1256 int i, offset;
1257
1258 if (!pv_is_register (addr, S390_SP_REGNUM))
1259 return;
1260
1261 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1262
ee1b3323
UW
1263 /* If we are storing the original value of a register, we want to
1264 record the CFA offset. If the same register is stored multiple
1265 times, the stack slot with the highest address counts. */
34201ae3 1266
ee1b3323
UW
1267 for (i = 0; i < S390_NUM_GPRS; i++)
1268 if (size == data->gpr_size
1269 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1270 if (data->gpr_slot[i] == 0
1271 || data->gpr_slot[i] > offset)
1272 {
1273 data->gpr_slot[i] = offset;
1274 return;
1275 }
1276
1277 for (i = 0; i < S390_NUM_FPRS; i++)
1278 if (size == data->fpr_size
1279 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1280 if (data->fpr_slot[i] == 0
1281 || data->fpr_slot[i] > offset)
1282 {
1283 data->fpr_slot[i] = offset;
1284 return;
1285 }
a8c99f38 1286}
4bc8c588 1287
a8c99f38
JB
1288/* Analyze the prologue of the function starting at START_PC,
1289 continuing at most until CURRENT_PC. Initialize DATA to
1290 hold all information we find out about the state of the registers
1291 and stack slots. Return the address of the instruction after
1292 the last one that changed the SP, FP, or back chain; or zero
1293 on error. */
1294static CORE_ADDR
1295s390_analyze_prologue (struct gdbarch *gdbarch,
1296 CORE_ADDR start_pc,
1297 CORE_ADDR current_pc,
1298 struct s390_prologue_data *data)
4bc8c588 1299{
a8c99f38
JB
1300 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1301
4bc8c588 1302 /* Our return value:
a8c99f38 1303 The address of the instruction after the last one that changed
34201ae3 1304 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1305 read memory. */
1306 CORE_ADDR result = start_pc;
4bc8c588 1307
4bc8c588
JB
1308 /* The current PC for our abstract interpretation. */
1309 CORE_ADDR pc;
1310
1311 /* The address of the next instruction after that. */
1312 CORE_ADDR next_pc;
34201ae3 1313
4bc8c588
JB
1314 /* Set up everything's initial value. */
1315 {
1316 int i;
1317
55f960e1 1318 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1319
a8c99f38
JB
1320 /* For the purpose of prologue tracking, we consider the GPR size to
1321 be equal to the ABI word size, even if it is actually larger
1322 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1323 data->gpr_size = word_size;
1324 data->fpr_size = 8;
e17a4113 1325 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1326
4bc8c588 1327 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1328 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1329
1330 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1331 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1332
121d8485
UW
1333 for (i = 0; i < S390_NUM_GPRS; i++)
1334 data->gpr_slot[i] = 0;
1335
1336 for (i = 0; i < S390_NUM_FPRS; i++)
1337 data->fpr_slot[i] = 0;
4bc8c588 1338
121d8485 1339 data->back_chain_saved_p = 0;
4bc8c588
JB
1340 }
1341
a8c99f38
JB
1342 /* Start interpreting instructions, until we hit the frame's
1343 current PC or the first branch instruction. */
1344 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1345 {
4bc8c588 1346 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1347 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1348
3fc46200
UW
1349 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1350 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1351 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1352
4bc8c588 1353 /* Fields for various kinds of instructions. */
a8c99f38
JB
1354 unsigned int b2, r1, r2, x2, r3;
1355 int i2, d2;
4bc8c588 1356
121d8485 1357 /* The values of SP and FP before this instruction,
34201ae3 1358 for detecting instructions that change them. */
3fc46200 1359 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1360 /* Likewise for the flag whether the back chain was saved. */
1361 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1362
1363 /* If we got an error trying to read the instruction, report it. */
1364 if (insn_len < 0)
34201ae3
UW
1365 {
1366 result = 0;
1367 break;
1368 }
4bc8c588
JB
1369
1370 next_pc = pc + insn_len;
1371
a8c99f38
JB
1372 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1373 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1374 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1375
4bc8c588 1376
3fc46200
UW
1377 /* LHI r1, i2 --- load halfword immediate. */
1378 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1379 /* LGFI r1, i2 --- load fullword immediate. */
1380 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1381 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1382 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1383 data->gpr[r1] = pv_constant (i2);
1384
1385 /* LR r1, r2 --- load from register. */
1386 /* LGR r1, r2 --- load from register (64-bit version). */
1387 else if (is_rr (insn32, op_lr, &r1, &r2)
1388 || is_rre (insn64, op_lgr, &r1, &r2))
1389 data->gpr[r1] = data->gpr[r2];
1390
1391 /* L r1, d2(x2, b2) --- load. */
1392 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1393 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1394 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1395 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1396 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1397 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1398
1399 /* ST r1, d2(x2, b2) --- store. */
1400 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1401 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1402 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1403 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1404 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1405 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1406
1407 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1408 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1409 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1410
1411 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1412 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1413 version). */
3fc46200
UW
1414 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1415 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1416 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1417 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1418 {
1419 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1420 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1421 }
4bc8c588 1422
3fc46200
UW
1423 /* AHI r1, i2 --- add halfword immediate. */
1424 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1425 /* AFI r1, i2 --- add fullword immediate. */
1426 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1427 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1428 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1429 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1430 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1431 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1432
1433 /* ALFI r1, i2 --- add logical immediate. */
1434 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1435 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1436 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1437 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1438 (CORE_ADDR)i2 & 0xffffffff);
1439
1440 /* AR r1, r2 -- add register. */
1441 /* AGR r1, r2 -- add register (64-bit version). */
1442 else if (is_rr (insn32, op_ar, &r1, &r2)
1443 || is_rre (insn64, op_agr, &r1, &r2))
1444 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1445
1446 /* A r1, d2(x2, b2) -- add. */
1447 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1448 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1449 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1450 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1451 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1452 data->gpr[r1] = pv_add (data->gpr[r1],
1453 s390_load (data, d2, x2, b2, data->gpr_size));
1454
1455 /* SLFI r1, i2 --- subtract logical immediate. */
1456 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1457 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1458 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1459 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1460 -((CORE_ADDR)i2 & 0xffffffff));
1461
1462 /* SR r1, r2 -- subtract register. */
1463 /* SGR r1, r2 -- subtract register (64-bit version). */
1464 else if (is_rr (insn32, op_sr, &r1, &r2)
1465 || is_rre (insn64, op_sgr, &r1, &r2))
1466 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1467
1468 /* S r1, d2(x2, b2) -- subtract. */
1469 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1470 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1471 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1472 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1473 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1474 data->gpr[r1] = pv_subtract (data->gpr[r1],
1475 s390_load (data, d2, x2, b2, data->gpr_size));
1476
1477 /* LA r1, d2(x2, b2) --- load address. */
1478 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1479 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1480 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1481 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1482
1483 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1484 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1485 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1486
3fc46200 1487 /* BASR r1, 0 --- branch and save.
34201ae3 1488 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1489 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1490 && r2 == 0)
3fc46200 1491 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1492
3fc46200 1493 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1494 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1495 {
1496 data->gpr[r1] = pv_constant (next_pc);
1497 next_pc = pc + i2 * 2;
4bc8c588 1498
34201ae3
UW
1499 /* We'd better not interpret any backward branches. We'll
1500 never terminate. */
1501 if (next_pc <= pc)
1502 break;
1503 }
4bc8c588 1504
a8c99f38
JB
1505 /* Terminate search when hitting any other branch instruction. */
1506 else if (is_rr (insn, op_basr, &r1, &r2)
1507 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1508 || is_rr (insn, op_bcr, &r1, &r2)
1509 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1510 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1511 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1512 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1513 break;
1514
4bc8c588 1515 else
d4fb63e1
TT
1516 {
1517 /* An instruction we don't know how to simulate. The only
1518 safe thing to do would be to set every value we're tracking
1519 to 'unknown'. Instead, we'll be optimistic: we assume that
1520 we *can* interpret every instruction that the compiler uses
1521 to manipulate any of the data we're interested in here --
1522 then we can just ignore anything else. */
1523 }
4bc8c588
JB
1524
1525 /* Record the address after the last instruction that changed
34201ae3
UW
1526 the FP, SP, or backlink. Ignore instructions that changed
1527 them back to their original values --- those are probably
1528 restore instructions. (The back chain is never restored,
1529 just popped.) */
4bc8c588 1530 {
34201ae3
UW
1531 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1532 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1533
1534 if ((! pv_is_identical (pre_insn_sp, sp)
1535 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1536 && sp.kind != pvk_unknown)
34201ae3
UW
1537 || (! pv_is_identical (pre_insn_fp, fp)
1538 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1539 && fp.kind != pvk_unknown)
34201ae3
UW
1540 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1541 result = next_pc;
4bc8c588 1542 }
5769d3cd 1543 }
4bc8c588 1544
ee1b3323
UW
1545 /* Record where all the registers were saved. */
1546 pv_area_scan (data->stack, s390_check_for_saved, data);
1547
1548 free_pv_area (data->stack);
1549 data->stack = NULL;
1550
4bc8c588 1551 return result;
5769d3cd
AC
1552}
1553
34201ae3 1554/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1555 some "real" code. */
1556static CORE_ADDR
6093d2eb 1557s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1558{
1559 struct s390_prologue_data data;
1560 CORE_ADDR skip_pc;
6093d2eb 1561 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1562 return skip_pc ? skip_pc : pc;
1563}
1564
d0f54f9d
JB
1565/* Return true if we are in the functin's epilogue, i.e. after the
1566 instruction that destroyed the function's stack frame. */
1567static int
1568s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1569{
1570 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1571
1572 /* In frameless functions, there's not frame to destroy and thus
1573 we don't care about the epilogue.
1574
1575 In functions with frame, the epilogue sequence is a pair of
1576 a LM-type instruction that restores (amongst others) the
1577 return register %r14 and the stack pointer %r15, followed
1578 by a branch 'br %r14' --or equivalent-- that effects the
1579 actual return.
1580
1581 In that situation, this function needs to return 'true' in
1582 exactly one case: when pc points to that branch instruction.
1583
1584 Thus we try to disassemble the one instructions immediately
177b42fe 1585 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1586 modifying the stack pointer.
1587
1588 Note that disassembling backwards is not reliable, so there
1589 is a slight chance of false positives here ... */
1590
1591 bfd_byte insn[6];
1592 unsigned int r1, r3, b2;
1593 int d2;
1594
1595 if (word_size == 4
8defab1a 1596 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1597 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1598 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1599 return 1;
1600
a8c99f38 1601 if (word_size == 4
8defab1a 1602 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1603 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1604 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1605 return 1;
1606
d0f54f9d 1607 if (word_size == 8
8defab1a 1608 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1609 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1610 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1611 return 1;
1612
1613 return 0;
1614}
5769d3cd 1615
1db4e8a0
UW
1616/* Displaced stepping. */
1617
1618/* Fix up the state of registers and memory after having single-stepped
1619 a displaced instruction. */
1620static void
1621s390_displaced_step_fixup (struct gdbarch *gdbarch,
1622 struct displaced_step_closure *closure,
1623 CORE_ADDR from, CORE_ADDR to,
1624 struct regcache *regs)
1625{
1626 /* Since we use simple_displaced_step_copy_insn, our closure is a
1627 copy of the instruction. */
1628 gdb_byte *insn = (gdb_byte *) closure;
1629 static int s390_instrlen[] = { 2, 4, 4, 6 };
1630 int insnlen = s390_instrlen[insn[0] >> 6];
1631
1632 /* Fields for various kinds of instructions. */
1633 unsigned int b2, r1, r2, x2, r3;
1634 int i2, d2;
1635
1636 /* Get current PC and addressing mode bit. */
1637 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1638 ULONGEST amode = 0;
1db4e8a0
UW
1639
1640 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1641 {
1642 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1643 amode &= 0x80000000;
1644 }
1645
1646 if (debug_displaced)
1647 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1648 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1649 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1650 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1651
1652 /* Handle absolute branch and save instructions. */
1653 if (is_rr (insn, op_basr, &r1, &r2)
1654 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1655 {
1656 /* Recompute saved return address in R1. */
1657 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1658 amode | (from + insnlen));
1659 }
1660
1661 /* Handle absolute branch instructions. */
1662 else if (is_rr (insn, op_bcr, &r1, &r2)
1663 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1664 || is_rr (insn, op_bctr, &r1, &r2)
1665 || is_rre (insn, op_bctgr, &r1, &r2)
1666 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1667 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1668 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1669 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1670 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1671 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1672 {
1673 /* Update PC iff branch was *not* taken. */
1674 if (pc == to + insnlen)
1675 regcache_write_pc (regs, from + insnlen);
1676 }
1677
1678 /* Handle PC-relative branch and save instructions. */
1679 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1680 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1681 {
1682 /* Update PC. */
1683 regcache_write_pc (regs, pc - to + from);
1684 /* Recompute saved return address in R1. */
1685 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1686 amode | (from + insnlen));
1687 }
1688
1689 /* Handle PC-relative branch instructions. */
1690 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1691 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1692 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1693 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1694 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1695 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1696 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1697 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1698 {
1699 /* Update PC. */
1700 regcache_write_pc (regs, pc - to + from);
1701 }
1702
1703 /* Handle LOAD ADDRESS RELATIVE LONG. */
1704 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1705 {
0161e4b9
UW
1706 /* Update PC. */
1707 regcache_write_pc (regs, from + insnlen);
34201ae3 1708 /* Recompute output address in R1. */
1db4e8a0 1709 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1710 amode | (from + i2 * 2));
1db4e8a0
UW
1711 }
1712
1713 /* If we executed a breakpoint instruction, point PC right back at it. */
1714 else if (insn[0] == 0x0 && insn[1] == 0x1)
1715 regcache_write_pc (regs, from);
1716
1717 /* For any other insn, PC points right after the original instruction. */
1718 else
1719 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1720
1721 if (debug_displaced)
1722 fprintf_unfiltered (gdb_stdlog,
1723 "displaced: (s390) pc is now %s\n",
1724 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1725}
a8c99f38 1726
d6db1fab
UW
1727
1728/* Helper routine to unwind pseudo registers. */
1729
1730static struct value *
1731s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1732{
1733 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1734 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1735 struct type *type = register_type (gdbarch, regnum);
1736
1737 /* Unwind PC via PSW address. */
1738 if (regnum == tdep->pc_regnum)
1739 {
1740 struct value *val;
1741
1742 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1743 if (!value_optimized_out (val))
1744 {
1745 LONGEST pswa = value_as_long (val);
1746
1747 if (TYPE_LENGTH (type) == 4)
1748 return value_from_pointer (type, pswa & 0x7fffffff);
1749 else
1750 return value_from_pointer (type, pswa);
1751 }
1752 }
1753
1754 /* Unwind CC via PSW mask. */
1755 if (regnum == tdep->cc_regnum)
1756 {
1757 struct value *val;
1758
1759 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1760 if (!value_optimized_out (val))
1761 {
1762 LONGEST pswm = value_as_long (val);
1763
1764 if (TYPE_LENGTH (type) == 4)
1765 return value_from_longest (type, (pswm >> 12) & 3);
1766 else
1767 return value_from_longest (type, (pswm >> 44) & 3);
1768 }
1769 }
1770
1771 /* Unwind full GPRs to show at least the lower halves (as the
1772 upper halves are undefined). */
2ccd1468 1773 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1774 {
1775 int reg = regnum - tdep->gpr_full_regnum;
1776 struct value *val;
1777
1778 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1779 if (!value_optimized_out (val))
1780 return value_cast (type, val);
1781 }
1782
1783 return allocate_optimized_out_value (type);
1784}
1785
1786static struct value *
1787s390_trad_frame_prev_register (struct frame_info *this_frame,
1788 struct trad_frame_saved_reg saved_regs[],
1789 int regnum)
1790{
1791 if (regnum < S390_NUM_REGS)
1792 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1793 else
1794 return s390_unwind_pseudo_register (this_frame, regnum);
1795}
1796
1797
a8c99f38
JB
1798/* Normal stack frames. */
1799
1800struct s390_unwind_cache {
1801
1802 CORE_ADDR func;
1803 CORE_ADDR frame_base;
1804 CORE_ADDR local_base;
1805
1806 struct trad_frame_saved_reg *saved_regs;
1807};
1808
a78f21af 1809static int
f089c433 1810s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1811 struct s390_unwind_cache *info)
5769d3cd 1812{
f089c433 1813 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1814 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1815 struct s390_prologue_data data;
3fc46200
UW
1816 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1817 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1818 int i;
1819 CORE_ADDR cfa;
a8c99f38
JB
1820 CORE_ADDR func;
1821 CORE_ADDR result;
1822 ULONGEST reg;
1823 CORE_ADDR prev_sp;
1824 int frame_pointer;
1825 int size;
edb3359d 1826 struct frame_info *next_frame;
a8c99f38
JB
1827
1828 /* Try to find the function start address. If we can't find it, we don't
1829 bother searching for it -- with modern compilers this would be mostly
1830 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1831 or else a valid backchain ... */
f089c433 1832 func = get_frame_func (this_frame);
a8c99f38
JB
1833 if (!func)
1834 return 0;
5769d3cd 1835
a8c99f38
JB
1836 /* Try to analyze the prologue. */
1837 result = s390_analyze_prologue (gdbarch, func,
f089c433 1838 get_frame_pc (this_frame), &data);
a8c99f38 1839 if (!result)
5769d3cd 1840 return 0;
5769d3cd 1841
a8c99f38 1842 /* If this was successful, we should have found the instruction that
34201ae3 1843 sets the stack pointer register to the previous value of the stack
a8c99f38 1844 pointer minus the frame size. */
3fc46200 1845 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1846 return 0;
a8c99f38 1847
34201ae3 1848 /* A frame size of zero at this point can mean either a real
a8c99f38 1849 frameless function, or else a failure to find the prologue.
34201ae3 1850 Perform some sanity checks to verify we really have a
a8c99f38
JB
1851 frameless function. */
1852 if (sp->k == 0)
5769d3cd 1853 {
34201ae3
UW
1854 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1855 size zero. This is only possible if the next frame is a sentinel
a8c99f38 1856 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1857 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1858 needed, instead the code should simpliy rely on its
1859 analysis. */
edb3359d
DJ
1860 next_frame = get_next_frame (this_frame);
1861 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1862 next_frame = get_next_frame (next_frame);
1863 if (next_frame
f089c433 1864 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1865 return 0;
5769d3cd 1866
a8c99f38
JB
1867 /* If we really have a frameless function, %r14 must be valid
1868 -- in particular, it must point to a different function. */
f089c433 1869 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1870 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1871 if (get_pc_function_start (reg) == func)
5769d3cd 1872 {
a8c99f38
JB
1873 /* However, there is one case where it *is* valid for %r14
1874 to point to the same function -- if this is a recursive
1875 call, and we have stopped in the prologue *before* the
1876 stack frame was allocated.
1877
1878 Recognize this case by looking ahead a bit ... */
5769d3cd 1879
a8c99f38 1880 struct s390_prologue_data data2;
3fc46200 1881 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1882
1883 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
1884 && pv_is_register (*sp, S390_SP_REGNUM)
1885 && sp->k != 0))
a8c99f38 1886 return 0;
5769d3cd 1887 }
5769d3cd 1888 }
5769d3cd
AC
1889
1890
a8c99f38
JB
1891 /* OK, we've found valid prologue data. */
1892 size = -sp->k;
5769d3cd 1893
a8c99f38
JB
1894 /* If the frame pointer originally also holds the same value
1895 as the stack pointer, we're probably using it. If it holds
1896 some other value -- even a constant offset -- it is most
1897 likely used as temp register. */
3fc46200 1898 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1899 frame_pointer = S390_FRAME_REGNUM;
1900 else
1901 frame_pointer = S390_SP_REGNUM;
1902
34201ae3
UW
1903 /* If we've detected a function with stack frame, we'll still have to
1904 treat it as frameless if we're currently within the function epilog
c378eb4e 1905 code at a point where the frame pointer has already been restored.
a8c99f38 1906 This can only happen in an innermost frame. */
0e100dab
AC
1907 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1908 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1909 next_frame = get_next_frame (this_frame);
1910 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1911 next_frame = get_next_frame (next_frame);
f089c433 1912 if (size > 0
edb3359d 1913 && (next_frame == NULL
f089c433 1914 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1915 {
a8c99f38
JB
1916 /* See the comment in s390_in_function_epilogue_p on why this is
1917 not completely reliable ... */
f089c433 1918 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1919 {
a8c99f38
JB
1920 memset (&data, 0, sizeof (data));
1921 size = 0;
1922 frame_pointer = S390_SP_REGNUM;
5769d3cd 1923 }
5769d3cd 1924 }
5769d3cd 1925
a8c99f38
JB
1926 /* Once we know the frame register and the frame size, we can unwind
1927 the current value of the frame register from the next frame, and
34201ae3 1928 add back the frame size to arrive that the previous frame's
a8c99f38 1929 stack pointer value. */
f089c433 1930 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1931 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1932
7803799a
UW
1933 /* Set up ABI call-saved/call-clobbered registers. */
1934 for (i = 0; i < S390_NUM_REGS; i++)
1935 if (!s390_register_call_saved (gdbarch, i))
1936 trad_frame_set_unknown (info->saved_regs, i);
1937
1938 /* CC is always call-clobbered. */
d6db1fab 1939 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1940
121d8485
UW
1941 /* Record the addresses of all register spill slots the prologue parser
1942 has recognized. Consider only registers defined as call-saved by the
1943 ABI; for call-clobbered registers the parser may have recognized
1944 spurious stores. */
5769d3cd 1945
7803799a
UW
1946 for (i = 0; i < 16; i++)
1947 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1948 && data.gpr_slot[i] != 0)
121d8485 1949 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1950
7803799a
UW
1951 for (i = 0; i < 16; i++)
1952 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1953 && data.fpr_slot[i] != 0)
1954 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1955
1956 /* Function return will set PC to %r14. */
d6db1fab 1957 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1958
1959 /* In frameless functions, we unwind simply by moving the return
1960 address to the PC. However, if we actually stored to the
1961 save area, use that -- we might only think the function frameless
1962 because we're in the middle of the prologue ... */
1963 if (size == 0
d6db1fab 1964 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1965 {
d6db1fab 1966 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1967 }
a8c99f38
JB
1968
1969 /* Another sanity check: unless this is a frameless function,
1970 we should have found spill slots for SP and PC.
1971 If not, we cannot unwind further -- this happens e.g. in
1972 libc's thread_start routine. */
1973 if (size > 0)
5769d3cd 1974 {
a8c99f38 1975 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1976 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1977 prev_sp = -1;
5769d3cd 1978 }
a8c99f38
JB
1979
1980 /* We use the current value of the frame register as local_base,
1981 and the top of the register save area as frame_base. */
1982 if (prev_sp != -1)
1983 {
1984 info->frame_base = prev_sp + 16*word_size + 32;
1985 info->local_base = prev_sp - size;
1986 }
1987
1988 info->func = func;
1989 return 1;
5769d3cd
AC
1990}
1991
a78f21af 1992static void
f089c433 1993s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1994 struct s390_unwind_cache *info)
5769d3cd 1995{
f089c433 1996 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1997 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1998 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1999 CORE_ADDR backchain;
2000 ULONGEST reg;
2001 LONGEST sp;
7803799a
UW
2002 int i;
2003
2004 /* Set up ABI call-saved/call-clobbered registers. */
2005 for (i = 0; i < S390_NUM_REGS; i++)
2006 if (!s390_register_call_saved (gdbarch, i))
2007 trad_frame_set_unknown (info->saved_regs, i);
2008
2009 /* CC is always call-clobbered. */
d6db1fab 2010 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2011
2012 /* Get the backchain. */
f089c433 2013 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 2014 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
2015
2016 /* A zero backchain terminates the frame chain. As additional
2017 sanity check, let's verify that the spill slot for SP in the
2018 save area pointed to by the backchain in fact links back to
2019 the save area. */
2020 if (backchain != 0
e17a4113
UW
2021 && safe_read_memory_integer (backchain + 15*word_size,
2022 word_size, byte_order, &sp)
a8c99f38
JB
2023 && (CORE_ADDR)sp == backchain)
2024 {
2025 /* We don't know which registers were saved, but it will have
34201ae3
UW
2026 to be at least %r14 and %r15. This will allow us to continue
2027 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
2028 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2029 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2030
2031 /* Function return will set PC to %r14. */
d6db1fab 2032 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2033 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2034
2035 /* We use the current value of the frame register as local_base,
34201ae3 2036 and the top of the register save area as frame_base. */
a8c99f38
JB
2037 info->frame_base = backchain + 16*word_size + 32;
2038 info->local_base = reg;
2039 }
2040
f089c433 2041 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2042}
2043
a8c99f38 2044static struct s390_unwind_cache *
f089c433 2045s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2046 void **this_prologue_cache)
2047{
62261490 2048 volatile struct gdb_exception ex;
a8c99f38 2049 struct s390_unwind_cache *info;
62261490 2050
a8c99f38
JB
2051 if (*this_prologue_cache)
2052 return *this_prologue_cache;
2053
2054 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2055 *this_prologue_cache = info;
f089c433 2056 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2057 info->func = -1;
2058 info->frame_base = -1;
2059 info->local_base = -1;
2060
62261490
PA
2061 TRY_CATCH (ex, RETURN_MASK_ERROR)
2062 {
2063 /* Try to use prologue analysis to fill the unwind cache.
2064 If this fails, fall back to reading the stack backchain. */
2065 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2066 s390_backchain_frame_unwind_cache (this_frame, info);
2067 }
2068 if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
2069 throw_exception (ex);
a8c99f38
JB
2070
2071 return info;
2072}
5769d3cd 2073
a78f21af 2074static void
f089c433 2075s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2076 void **this_prologue_cache,
2077 struct frame_id *this_id)
5769d3cd 2078{
a8c99f38 2079 struct s390_unwind_cache *info
f089c433 2080 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2081
a8c99f38
JB
2082 if (info->frame_base == -1)
2083 return;
5769d3cd 2084
a8c99f38 2085 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2086}
2087
f089c433
UW
2088static struct value *
2089s390_frame_prev_register (struct frame_info *this_frame,
2090 void **this_prologue_cache, int regnum)
a8c99f38 2091{
7803799a 2092 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2093 struct s390_unwind_cache *info
f089c433 2094 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2095
d6db1fab 2096 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2097}
2098
2099static const struct frame_unwind s390_frame_unwind = {
2100 NORMAL_FRAME,
8fbca658 2101 default_frame_unwind_stop_reason,
a8c99f38 2102 s390_frame_this_id,
f089c433
UW
2103 s390_frame_prev_register,
2104 NULL,
2105 default_frame_sniffer
a8c99f38
JB
2106};
2107
5769d3cd 2108
8e645ae7
AC
2109/* Code stubs and their stack frames. For things like PLTs and NULL
2110 function calls (where there is no true frame and the return address
2111 is in the RETADDR register). */
a8c99f38 2112
8e645ae7
AC
2113struct s390_stub_unwind_cache
2114{
a8c99f38
JB
2115 CORE_ADDR frame_base;
2116 struct trad_frame_saved_reg *saved_regs;
2117};
2118
8e645ae7 2119static struct s390_stub_unwind_cache *
f089c433 2120s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2121 void **this_prologue_cache)
5769d3cd 2122{
f089c433 2123 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2124 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2125 struct s390_stub_unwind_cache *info;
a8c99f38 2126 ULONGEST reg;
5c3cf190 2127
a8c99f38
JB
2128 if (*this_prologue_cache)
2129 return *this_prologue_cache;
5c3cf190 2130
8e645ae7 2131 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2132 *this_prologue_cache = info;
f089c433 2133 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2134
2135 /* The return address is in register %r14. */
d6db1fab 2136 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2137
2138 /* Retrieve stack pointer and determine our frame base. */
f089c433 2139 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2140 info->frame_base = reg + 16*word_size + 32;
2141
2142 return info;
5769d3cd
AC
2143}
2144
a8c99f38 2145static void
f089c433 2146s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2147 void **this_prologue_cache,
2148 struct frame_id *this_id)
5769d3cd 2149{
8e645ae7 2150 struct s390_stub_unwind_cache *info
f089c433
UW
2151 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2152 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2153}
5769d3cd 2154
f089c433
UW
2155static struct value *
2156s390_stub_frame_prev_register (struct frame_info *this_frame,
2157 void **this_prologue_cache, int regnum)
8e645ae7
AC
2158{
2159 struct s390_stub_unwind_cache *info
f089c433 2160 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2161 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2162}
2163
f089c433
UW
2164static int
2165s390_stub_frame_sniffer (const struct frame_unwind *self,
2166 struct frame_info *this_frame,
2167 void **this_prologue_cache)
a8c99f38 2168{
93d42b30 2169 CORE_ADDR addr_in_block;
8e645ae7
AC
2170 bfd_byte insn[S390_MAX_INSTR_SIZE];
2171
2172 /* If the current PC points to non-readable memory, we assume we
2173 have trapped due to an invalid function pointer call. We handle
2174 the non-existing current function like a PLT stub. */
f089c433 2175 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2176 if (in_plt_section (addr_in_block)
f089c433
UW
2177 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2178 return 1;
2179 return 0;
a8c99f38 2180}
5769d3cd 2181
f089c433
UW
2182static const struct frame_unwind s390_stub_frame_unwind = {
2183 NORMAL_FRAME,
8fbca658 2184 default_frame_unwind_stop_reason,
f089c433
UW
2185 s390_stub_frame_this_id,
2186 s390_stub_frame_prev_register,
2187 NULL,
2188 s390_stub_frame_sniffer
2189};
2190
5769d3cd 2191
a8c99f38 2192/* Signal trampoline stack frames. */
5769d3cd 2193
a8c99f38
JB
2194struct s390_sigtramp_unwind_cache {
2195 CORE_ADDR frame_base;
2196 struct trad_frame_saved_reg *saved_regs;
2197};
5769d3cd 2198
a8c99f38 2199static struct s390_sigtramp_unwind_cache *
f089c433 2200s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2201 void **this_prologue_cache)
5769d3cd 2202{
f089c433 2203 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2204 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2205 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2206 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2207 struct s390_sigtramp_unwind_cache *info;
2208 ULONGEST this_sp, prev_sp;
7803799a 2209 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2210 int i;
2211
2212 if (*this_prologue_cache)
2213 return *this_prologue_cache;
5769d3cd 2214
a8c99f38
JB
2215 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2216 *this_prologue_cache = info;
f089c433 2217 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2218
f089c433
UW
2219 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2220 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2221 next_cfa = this_sp + 16*word_size + 32;
2222
2223 /* New-style RT frame:
2224 retcode + alignment (8 bytes)
2225 siginfo (128 bytes)
c378eb4e 2226 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2227 if (next_ra == next_cfa)
2228 {
f0f63663 2229 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2230 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2231 upper GPR halves if present. */
2232 sigreg_high_off = 8;
a8c99f38
JB
2233 }
2234
2235 /* Old-style RT frame and all non-RT frames:
2236 old signal mask (8 bytes)
c378eb4e 2237 pointer to sigregs. */
5769d3cd
AC
2238 else
2239 {
e17a4113
UW
2240 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2241 word_size, byte_order);
7803799a
UW
2242 /* sigregs are followed by signo (4 bytes), then by the
2243 upper GPR halves if present. */
2244 sigreg_high_off = 4;
a8c99f38 2245 }
5769d3cd 2246
a8c99f38 2247 /* The sigregs structure looks like this:
34201ae3
UW
2248 long psw_mask;
2249 long psw_addr;
2250 long gprs[16];
2251 int acrs[16];
2252 int fpc;
2253 int __pad;
2254 double fprs[16]; */
5769d3cd 2255
7803799a
UW
2256 /* PSW mask and address. */
2257 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2258 sigreg_ptr += word_size;
7803799a 2259 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2260 sigreg_ptr += word_size;
2261
2262 /* Then the GPRs. */
2263 for (i = 0; i < 16; i++)
2264 {
2265 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2266 sigreg_ptr += word_size;
2267 }
2268
2269 /* Then the ACRs. */
2270 for (i = 0; i < 16; i++)
2271 {
2272 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2273 sigreg_ptr += 4;
5769d3cd 2274 }
5769d3cd 2275
a8c99f38
JB
2276 /* The floating-point control word. */
2277 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2278 sigreg_ptr += 8;
5769d3cd 2279
a8c99f38
JB
2280 /* And finally the FPRs. */
2281 for (i = 0; i < 16; i++)
2282 {
2283 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2284 sigreg_ptr += 8;
2285 }
2286
7803799a
UW
2287 /* If we have them, the GPR upper halves are appended at the end. */
2288 sigreg_ptr += sigreg_high_off;
2289 if (tdep->gpr_full_regnum != -1)
2290 for (i = 0; i < 16; i++)
2291 {
34201ae3 2292 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2293 sigreg_ptr += 4;
2294 }
2295
a8c99f38
JB
2296 /* Restore the previous frame's SP. */
2297 prev_sp = read_memory_unsigned_integer (
2298 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2299 word_size, byte_order);
5769d3cd 2300
a8c99f38
JB
2301 /* Determine our frame base. */
2302 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2303
a8c99f38 2304 return info;
5769d3cd
AC
2305}
2306
a8c99f38 2307static void
f089c433 2308s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2309 void **this_prologue_cache,
2310 struct frame_id *this_id)
5769d3cd 2311{
a8c99f38 2312 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2313 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2314 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2315}
2316
f089c433
UW
2317static struct value *
2318s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2319 void **this_prologue_cache, int regnum)
a8c99f38
JB
2320{
2321 struct s390_sigtramp_unwind_cache *info
f089c433 2322 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2323 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2324}
2325
f089c433
UW
2326static int
2327s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2328 struct frame_info *this_frame,
2329 void **this_prologue_cache)
5769d3cd 2330{
f089c433 2331 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2332 bfd_byte sigreturn[2];
4c8287ac 2333
8defab1a 2334 if (target_read_memory (pc, sigreturn, 2))
f089c433 2335 return 0;
4c8287ac 2336
237b092b 2337 if (sigreturn[0] != op_svc)
f089c433 2338 return 0;
5769d3cd 2339
a8c99f38
JB
2340 if (sigreturn[1] != 119 /* sigreturn */
2341 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2342 return 0;
34201ae3 2343
f089c433 2344 return 1;
5769d3cd
AC
2345}
2346
f089c433
UW
2347static const struct frame_unwind s390_sigtramp_frame_unwind = {
2348 SIGTRAMP_FRAME,
8fbca658 2349 default_frame_unwind_stop_reason,
f089c433
UW
2350 s390_sigtramp_frame_this_id,
2351 s390_sigtramp_frame_prev_register,
2352 NULL,
2353 s390_sigtramp_frame_sniffer
2354};
2355
237b092b
AA
2356/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2357 upon error. */
2358
2359static LONGEST
2360s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2361 ptid_t ptid)
2362{
2363 struct regcache *regs = get_thread_regcache (ptid);
2364 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2365 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2366 ULONGEST pc;
2367 ULONGEST svc_number = -1;
2368 unsigned opcode;
2369
2370 /* Assume that the PC points after the 2-byte SVC instruction. We
2371 don't currently support SVC via EXECUTE. */
2372 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2373 pc -= 2;
2374 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2375 if (opcode != op_svc)
2376 return -1;
2377
2378 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2379 byte_order);
2380 if (svc_number == 0)
2381 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2382
2383 return svc_number;
2384}
2385
4c8287ac 2386
a8c99f38
JB
2387/* Frame base handling. */
2388
2389static CORE_ADDR
f089c433 2390s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2391{
a8c99f38 2392 struct s390_unwind_cache *info
f089c433 2393 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2394 return info->frame_base;
2395}
2396
2397static CORE_ADDR
f089c433 2398s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2399{
2400 struct s390_unwind_cache *info
f089c433 2401 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2402 return info->local_base;
2403}
2404
2405static const struct frame_base s390_frame_base = {
2406 &s390_frame_unwind,
2407 s390_frame_base_address,
2408 s390_local_base_address,
2409 s390_local_base_address
2410};
2411
2412static CORE_ADDR
2413s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2414{
7803799a 2415 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2416 ULONGEST pc;
7803799a 2417 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2418 return gdbarch_addr_bits_remove (gdbarch, pc);
2419}
2420
2421static CORE_ADDR
2422s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2423{
2424 ULONGEST sp;
2425 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2426 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2427}
2428
2429
a431654a
AC
2430/* DWARF-2 frame support. */
2431
7803799a
UW
2432static struct value *
2433s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2434 int regnum)
2435{
d6db1fab 2436 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2437}
2438
a431654a
AC
2439static void
2440s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2441 struct dwarf2_frame_state_reg *reg,
4a4e5149 2442 struct frame_info *this_frame)
a431654a
AC
2443{
2444 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2445
d6db1fab
UW
2446 /* The condition code (and thus PSW mask) is call-clobbered. */
2447 if (regnum == S390_PSWM_REGNUM)
2448 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2449
2450 /* The PSW address unwinds to the return address. */
2451 else if (regnum == S390_PSWA_REGNUM)
2452 reg->how = DWARF2_FRAME_REG_RA;
2453
7803799a
UW
2454 /* Fixed registers are call-saved or call-clobbered
2455 depending on the ABI in use. */
d6db1fab 2456 else if (regnum < S390_NUM_REGS)
a431654a 2457 {
7803799a 2458 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2459 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2460 else
a431654a 2461 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2462 }
a431654a 2463
d6db1fab
UW
2464 /* We install a special function to unwind pseudos. */
2465 else
7803799a
UW
2466 {
2467 reg->how = DWARF2_FRAME_REG_FN;
2468 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2469 }
2470}
2471
2472
b0cf273e
JB
2473/* Dummy function calls. */
2474
78f8b424
JB
2475/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2476 "Integer-like" types are those that should be passed the way
2477 integers are: integers, enums, ranges, characters, and booleans. */
2478static int
2479is_integer_like (struct type *type)
2480{
2481 enum type_code code = TYPE_CODE (type);
2482
2483 return (code == TYPE_CODE_INT
34201ae3
UW
2484 || code == TYPE_CODE_ENUM
2485 || code == TYPE_CODE_RANGE
2486 || code == TYPE_CODE_CHAR
2487 || code == TYPE_CODE_BOOL);
78f8b424
JB
2488}
2489
78f8b424
JB
2490/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2491 "Pointer-like" types are those that should be passed the way
2492 pointers are: pointers and references. */
2493static int
2494is_pointer_like (struct type *type)
2495{
2496 enum type_code code = TYPE_CODE (type);
2497
2498 return (code == TYPE_CODE_PTR
34201ae3 2499 || code == TYPE_CODE_REF);
78f8b424
JB
2500}
2501
2502
20a940cc
JB
2503/* Return non-zero if TYPE is a `float singleton' or `double
2504 singleton', zero otherwise.
2505
2506 A `T singleton' is a struct type with one member, whose type is
2507 either T or a `T singleton'. So, the following are all float
2508 singletons:
2509
2510 struct { float x };
2511 struct { struct { float x; } x; };
2512 struct { struct { struct { float x; } x; } x; };
2513
2514 ... and so on.
2515
b0cf273e
JB
2516 All such structures are passed as if they were floats or doubles,
2517 as the (revised) ABI says. */
20a940cc
JB
2518static int
2519is_float_singleton (struct type *type)
2520{
b0cf273e
JB
2521 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2522 {
2523 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2524 CHECK_TYPEDEF (singleton_type);
2525
2526 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2527 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2528 || is_float_singleton (singleton_type));
2529 }
2530
2531 return 0;
20a940cc
JB
2532}
2533
2534
2535/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2536 "Struct-like" types are those that should be passed as structs are:
2537 structs and unions.
2538
2539 As an odd quirk, not mentioned in the ABI, GCC passes float and
2540 double singletons as if they were a plain float, double, etc. (The
2541 corresponding union types are handled normally.) So we exclude
2542 those types here. *shrug* */
2543static int
2544is_struct_like (struct type *type)
2545{
2546 enum type_code code = TYPE_CODE (type);
2547
2548 return (code == TYPE_CODE_UNION
34201ae3 2549 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
20a940cc
JB
2550}
2551
2552
2553/* Return non-zero if TYPE is a float-like type, zero otherwise.
2554 "Float-like" types are those that should be passed as
2555 floating-point values are.
2556
2557 You'd think this would just be floats, doubles, long doubles, etc.
2558 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2559 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2560 corresponding union types are handled normally.) So we include
20a940cc
JB
2561 those types here. *shrug* */
2562static int
2563is_float_like (struct type *type)
2564{
2565 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2566 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
34201ae3 2567 || is_float_singleton (type));
20a940cc
JB
2568}
2569
2570
78f8b424 2571static int
b0cf273e 2572is_power_of_two (unsigned int n)
78f8b424 2573{
b0cf273e 2574 return ((n & (n - 1)) == 0);
78f8b424
JB
2575}
2576
b0cf273e
JB
2577/* Return non-zero if TYPE should be passed as a pointer to a copy,
2578 zero otherwise. */
4d819d0e 2579static int
b0cf273e 2580s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2581{
354ecfd5 2582 if (TYPE_LENGTH (type) > 8)
b0cf273e 2583 return 1;
4d819d0e 2584
56b9d9ac
UW
2585 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2586 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2587 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2588}
2589
b0cf273e
JB
2590/* Return non-zero if TYPE should be passed in a float register
2591 if possible. */
78f8b424 2592static int
b0cf273e 2593s390_function_arg_float (struct type *type)
78f8b424 2594{
354ecfd5 2595 if (TYPE_LENGTH (type) > 8)
b0cf273e 2596 return 0;
78f8b424 2597
b0cf273e 2598 return is_float_like (type);
4d819d0e
JB
2599}
2600
b0cf273e
JB
2601/* Return non-zero if TYPE should be passed in an integer register
2602 (or a pair of integer registers) if possible. */
78f8b424 2603static int
b0cf273e 2604s390_function_arg_integer (struct type *type)
78f8b424 2605{
354ecfd5 2606 if (TYPE_LENGTH (type) > 8)
b0cf273e 2607 return 0;
78f8b424 2608
b0cf273e
JB
2609 return is_integer_like (type)
2610 || is_pointer_like (type)
354ecfd5 2611 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2612}
2613
78f8b424
JB
2614/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2615 word as required for the ABI. */
2616static LONGEST
e17a4113 2617extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2618{
e17a4113 2619 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2620 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2621
2622 /* Even structs get passed in the least significant bits of the
2623 register / memory word. It's not really right to extract them as
2624 an integer, but it does take care of the extension. */
2625 if (TYPE_UNSIGNED (type))
0fd88904 2626 return extract_unsigned_integer (value_contents (arg),
34201ae3 2627 TYPE_LENGTH (type), byte_order);
78f8b424 2628 else
0fd88904 2629 return extract_signed_integer (value_contents (arg),
34201ae3 2630 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2631}
2632
2633
78f8b424
JB
2634/* Return the alignment required by TYPE. */
2635static int
2636alignment_of (struct type *type)
2637{
2638 int alignment;
2639
2640 if (is_integer_like (type)
2641 || is_pointer_like (type)
a16b8bcd
UW
2642 || TYPE_CODE (type) == TYPE_CODE_FLT
2643 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2644 alignment = TYPE_LENGTH (type);
2645 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
34201ae3 2646 || TYPE_CODE (type) == TYPE_CODE_UNION)
78f8b424
JB
2647 {
2648 int i;
2649
2650 alignment = 1;
2651 for (i = 0; i < TYPE_NFIELDS (type); i++)
34201ae3
UW
2652 {
2653 int field_alignment
56b9d9ac 2654 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424 2655
34201ae3
UW
2656 if (field_alignment > alignment)
2657 alignment = field_alignment;
2658 }
78f8b424
JB
2659 }
2660 else
2661 alignment = 1;
2662
2663 /* Check that everything we ever return is a power of two. Lots of
2664 code doesn't want to deal with aligning things to arbitrary
2665 boundaries. */
2666 gdb_assert ((alignment & (alignment - 1)) == 0);
2667
2668 return alignment;
2669}
2670
2671
2672/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2673 place to be passed to a function, as specified by the "GNU/Linux
2674 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2675
2676 SP is the current stack pointer. We must put arguments, links,
2677 padding, etc. whereever they belong, and return the new stack
2678 pointer value.
34201ae3 2679
78f8b424
JB
2680 If STRUCT_RETURN is non-zero, then the function we're calling is
2681 going to return a structure by value; STRUCT_ADDR is the address of
2682 a block we've allocated for it on the stack.
2683
2684 Our caller has taken care of any type promotions needed to satisfy
2685 prototypes or the old K&R argument-passing rules. */
a78f21af 2686static CORE_ADDR
7d9b040b 2687s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2688 struct regcache *regcache, CORE_ADDR bp_addr,
2689 int nargs, struct value **args, CORE_ADDR sp,
2690 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2691{
b0cf273e
JB
2692 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2693 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2694 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2695 int i;
5769d3cd 2696
78f8b424
JB
2697 /* If the i'th argument is passed as a reference to a copy, then
2698 copy_addr[i] is the address of the copy we made. */
2699 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2700
c0cc4c83 2701 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2702 for (i = 0; i < nargs; i++)
2703 {
2704 struct value *arg = args[i];
56b9d9ac 2705 struct type *type = check_typedef (value_type (arg));
5769d3cd 2706
b0cf273e 2707 if (s390_function_arg_pass_by_reference (type))
34201ae3
UW
2708 {
2709 sp -= TYPE_LENGTH (type);
2710 sp = align_down (sp, alignment_of (type));
2711 copy_addr[i] = sp;
2712 }
5769d3cd 2713 }
5769d3cd 2714
78f8b424
JB
2715 /* Reserve space for the parameter area. As a conservative
2716 simplification, we assume that everything will be passed on the
34201ae3 2717 stack. Since every argument larger than 8 bytes will be
b0cf273e
JB
2718 passed by reference, we use this simple upper bound. */
2719 sp -= nargs * 8;
78f8b424 2720
78f8b424
JB
2721 /* After all that, make sure it's still aligned on an eight-byte
2722 boundary. */
5b03f266 2723 sp = align_down (sp, 8);
78f8b424 2724
c0cc4c83
UW
2725 /* Allocate the standard frame areas: the register save area, the
2726 word reserved for the compiler (which seems kind of meaningless),
2727 and the back chain pointer. */
2728 sp -= 16*word_size + 32;
2729
2730 /* Now we have the final SP value. Make sure we didn't underflow;
2731 on 31-bit, this would result in addresses with the high bit set,
2732 which causes confusion elsewhere. Note that if we error out
2733 here, stack and registers remain untouched. */
2734 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2735 error (_("Stack overflow"));
2736
2737
78f8b424
JB
2738 /* Finally, place the actual parameters, working from SP towards
2739 higher addresses. The code above is supposed to reserve enough
2740 space for this. */
2741 {
2742 int fr = 0;
2743 int gr = 2;
c0cc4c83 2744 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2745
b0cf273e 2746 /* A struct is returned using general register 2. */
4d819d0e 2747 if (struct_return)
b0cf273e
JB
2748 {
2749 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2750 struct_addr);
b0cf273e
JB
2751 gr++;
2752 }
4d819d0e 2753
78f8b424
JB
2754 for (i = 0; i < nargs; i++)
2755 {
34201ae3
UW
2756 struct value *arg = args[i];
2757 struct type *type = check_typedef (value_type (arg));
2758 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2759
2760 if (s390_function_arg_pass_by_reference (type))
2761 {
c0cc4c83
UW
2762 /* Actually copy the argument contents to the stack slot
2763 that was reserved above. */
2764 write_memory (copy_addr[i], value_contents (arg), length);
2765
b0cf273e
JB
2766 if (gr <= 6)
2767 {
2768 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2769 copy_addr[i]);
b0cf273e
JB
2770 gr++;
2771 }
2772 else
2773 {
e17a4113
UW
2774 write_memory_unsigned_integer (starg, word_size, byte_order,
2775 copy_addr[i]);
b0cf273e
JB
2776 starg += word_size;
2777 }
2778 }
2779 else if (s390_function_arg_float (type))
2780 {
2781 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2782 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2783 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2784 {
2785 /* When we store a single-precision value in an FP register,
2786 it occupies the leftmost bits. */
2787 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2788 0, length, value_contents (arg));
b0cf273e
JB
2789 fr += 2;
2790 }
2791 else
2792 {
2793 /* When we store a single-precision value in a stack slot,
2794 it occupies the rightmost bits. */
2795 starg = align_up (starg + length, word_size);
34201ae3 2796 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2797 }
2798 }
2799 else if (s390_function_arg_integer (type) && length <= word_size)
2800 {
2801 if (gr <= 6)
2802 {
2803 /* Integer arguments are always extended to word size. */
2804 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2805 extend_simple_arg (gdbarch,
2806 arg));
b0cf273e
JB
2807 gr++;
2808 }
2809 else
2810 {
2811 /* Integer arguments are always extended to word size. */
e17a4113 2812 write_memory_signed_integer (starg, word_size, byte_order,
34201ae3
UW
2813 extend_simple_arg (gdbarch, arg));
2814 starg += word_size;
b0cf273e
JB
2815 }
2816 }
2817 else if (s390_function_arg_integer (type) && length == 2*word_size)
2818 {
2819 if (gr <= 5)
2820 {
2821 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2822 value_contents (arg));
b0cf273e 2823 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2824 value_contents (arg) + word_size);
b0cf273e
JB
2825 gr += 2;
2826 }
2827 else
2828 {
2829 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2830 in it, then don't go back and use it again later. */
2831 gr = 7;
2832
0fd88904 2833 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2834 starg += length;
2835 }
2836 }
2837 else
e2e0b3e5 2838 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2839 }
2840 }
2841
8de7d199
UW
2842 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2843 if (word_size == 4)
2844 {
2845 ULONGEST pswa;
2846 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2847 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2848 }
b0cf273e 2849 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2850
b0cf273e
JB
2851 /* Store updated stack pointer. */
2852 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2853
a8c99f38 2854 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2855 which is actually the top of the register save area. */
2856 return sp + 16*word_size + 32;
5769d3cd
AC
2857}
2858
f089c433 2859/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2860 dummy frame. The frame ID's base needs to match the TOS value
2861 returned by push_dummy_call, and the PC match the dummy frame's
2862 breakpoint. */
2863static struct frame_id
f089c433 2864s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2865{
a8c99f38 2866 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2867 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2868 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2869
121d8485 2870 return frame_id_build (sp + 16*word_size + 32,
34201ae3 2871 get_frame_pc (this_frame));
b0cf273e 2872}
c8f9d51c 2873
4074e13c
JB
2874static CORE_ADDR
2875s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2876{
2877 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2878 always be aligned on an eight-byte boundary. */
2879 return (addr & -8);
2880}
2881
2882
b0cf273e
JB
2883/* Function return value access. */
2884
2885static enum return_value_convention
2886s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2887{
354ecfd5 2888 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2889 return RETURN_VALUE_STRUCT_CONVENTION;
2890
2891 switch (TYPE_CODE (type))
2892 {
2893 case TYPE_CODE_STRUCT:
2894 case TYPE_CODE_UNION:
2895 case TYPE_CODE_ARRAY:
56b9d9ac 2896 case TYPE_CODE_COMPLEX:
b0cf273e 2897 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2898
b0cf273e
JB
2899 default:
2900 return RETURN_VALUE_REGISTER_CONVENTION;
2901 }
c8f9d51c
JB
2902}
2903
b0cf273e 2904static enum return_value_convention
6a3a010b 2905s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2906 struct type *type, struct regcache *regcache,
2907 gdb_byte *out, const gdb_byte *in)
5769d3cd 2908{
e17a4113 2909 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2910 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2911 enum return_value_convention rvc;
2912 int length;
2913
2914 type = check_typedef (type);
2915 rvc = s390_return_value_convention (gdbarch, type);
2916 length = TYPE_LENGTH (type);
2917
b0cf273e
JB
2918 if (in)
2919 {
2920 switch (rvc)
2921 {
2922 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2923 if (TYPE_CODE (type) == TYPE_CODE_FLT
2924 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2925 {
2926 /* When we store a single-precision value in an FP register,
2927 it occupies the leftmost bits. */
34201ae3 2928 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2929 0, length, in);
2930 }
2931 else if (length <= word_size)
2932 {
2933 /* Integer arguments are always extended to word size. */
2934 if (TYPE_UNSIGNED (type))
2935 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2936 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2937 else
2938 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2939 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2940 }
2941 else if (length == 2*word_size)
2942 {
2943 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2944 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2945 }
2946 else
e2e0b3e5 2947 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2948 break;
2949
2950 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2951 error (_("Cannot set function return value."));
b0cf273e
JB
2952 break;
2953 }
2954 }
2955 else if (out)
2956 {
2957 switch (rvc)
2958 {
2959 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2960 if (TYPE_CODE (type) == TYPE_CODE_FLT
2961 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2962 {
2963 /* When we store a single-precision value in an FP register,
2964 it occupies the leftmost bits. */
34201ae3 2965 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2966 0, length, out);
2967 }
2968 else if (length <= word_size)
2969 {
2970 /* Integer arguments occupy the rightmost bits. */
34201ae3 2971 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
b0cf273e
JB
2972 word_size - length, length, out);
2973 }
2974 else if (length == 2*word_size)
2975 {
2976 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2977 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2978 }
2979 else
e2e0b3e5 2980 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2981 break;
5769d3cd 2982
b0cf273e 2983 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2984 error (_("Function return value unknown."));
b0cf273e
JB
2985 break;
2986 }
2987 }
2988
2989 return rvc;
2990}
5769d3cd
AC
2991
2992
a8c99f38
JB
2993/* Breakpoints. */
2994
43af2100 2995static const gdb_byte *
c378eb4e
MS
2996s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2997 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2998{
43af2100 2999 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
3000
3001 *lenptr = sizeof (breakpoint);
3002 return breakpoint;
3003}
3004
5769d3cd 3005
a8c99f38 3006/* Address handling. */
5769d3cd
AC
3007
3008static CORE_ADDR
24568a2c 3009s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 3010{
a8c99f38 3011 return addr & 0x7fffffff;
5769d3cd
AC
3012}
3013
ffc65945
KB
3014static int
3015s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
3016{
3017 if (byte_size == 4)
119ac181 3018 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3019 else
3020 return 0;
3021}
3022
3023static const char *
3024s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
3025{
119ac181 3026 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
3027 return "mode32";
3028 else
3029 return NULL;
3030}
3031
a78f21af 3032static int
c378eb4e
MS
3033s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
3034 const char *name,
ffc65945
KB
3035 int *type_flags_ptr)
3036{
3037 if (strcmp (name, "mode32") == 0)
3038 {
119ac181 3039 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3040 return 1;
3041 }
3042 else
3043 return 0;
3044}
3045
55aa24fb
SDJ
3046/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3047 gdbarch.h. */
3048
3049static int
3050s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3051{
3052 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3053 or indirection. */
3054 || *s == '%' /* Register access. */
3055 || isdigit (*s)); /* Literal number. */
3056}
3057
a8c99f38
JB
3058/* Set up gdbarch struct. */
3059
a78f21af 3060static struct gdbarch *
5769d3cd
AC
3061s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3062{
7803799a
UW
3063 const struct target_desc *tdesc = info.target_desc;
3064 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
3065 struct gdbarch *gdbarch;
3066 struct gdbarch_tdep *tdep;
7803799a
UW
3067 int tdep_abi;
3068 int have_upper = 0;
c642a434
UW
3069 int have_linux_v1 = 0;
3070 int have_linux_v2 = 0;
7803799a 3071 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
3072 static const char *const stap_register_prefixes[] = { "%", NULL };
3073 static const char *const stap_register_indirection_prefixes[] = { "(",
3074 NULL };
3075 static const char *const stap_register_indirection_suffixes[] = { ")",
3076 NULL };
7803799a
UW
3077
3078 /* Default ABI and register size. */
3079 switch (info.bfd_arch_info->mach)
3080 {
3081 case bfd_mach_s390_31:
3082 tdep_abi = ABI_LINUX_S390;
3083 break;
3084
3085 case bfd_mach_s390_64:
3086 tdep_abi = ABI_LINUX_ZSERIES;
3087 break;
3088
3089 default:
3090 return NULL;
3091 }
3092
3093 /* Use default target description if none provided by the target. */
3094 if (!tdesc_has_registers (tdesc))
3095 {
3096 if (tdep_abi == ABI_LINUX_S390)
3097 tdesc = tdesc_s390_linux32;
3098 else
3099 tdesc = tdesc_s390x_linux64;
3100 }
3101
3102 /* Check any target description for validity. */
3103 if (tdesc_has_registers (tdesc))
3104 {
3105 static const char *const gprs[] = {
3106 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3107 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3108 };
3109 static const char *const fprs[] = {
3110 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3111 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3112 };
3113 static const char *const acrs[] = {
3114 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3115 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3116 };
3117 static const char *const gprs_lower[] = {
3118 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3119 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3120 };
3121 static const char *const gprs_upper[] = {
3122 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3123 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3124 };
4ac33720
UW
3125 static const char *const tdb_regs[] = {
3126 "tdb0", "tac", "tct", "atia",
3127 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
3128 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
3129 };
7803799a
UW
3130 const struct tdesc_feature *feature;
3131 int i, valid_p = 1;
3132
3133 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3134 if (feature == NULL)
3135 return NULL;
3136
3137 tdesc_data = tdesc_data_alloc ();
3138
3139 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3140 S390_PSWM_REGNUM, "pswm");
3141 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3142 S390_PSWA_REGNUM, "pswa");
3143
3144 if (tdesc_unnumbered_register (feature, "r0"))
3145 {
3146 for (i = 0; i < 16; i++)
3147 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3148 S390_R0_REGNUM + i, gprs[i]);
3149 }
3150 else
3151 {
3152 have_upper = 1;
3153
3154 for (i = 0; i < 16; i++)
3155 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3156 S390_R0_REGNUM + i,
3157 gprs_lower[i]);
3158 for (i = 0; i < 16; i++)
3159 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3160 S390_R0_UPPER_REGNUM + i,
3161 gprs_upper[i]);
3162 }
3163
3164 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3165 if (feature == NULL)
3166 {
3167 tdesc_data_cleanup (tdesc_data);
3168 return NULL;
3169 }
3170
3171 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3172 S390_FPC_REGNUM, "fpc");
3173 for (i = 0; i < 16; i++)
3174 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3175 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3176
7803799a
UW
3177 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3178 if (feature == NULL)
3179 {
3180 tdesc_data_cleanup (tdesc_data);
3181 return NULL;
3182 }
3183
3184 for (i = 0; i < 16; i++)
3185 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3186 S390_A0_REGNUM + i, acrs[i]);
3187
94eae614 3188 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3189 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3190 if (feature)
3191 {
3192 tdesc_numbered_register (feature, tdesc_data,
3193 S390_ORIG_R2_REGNUM, "orig_r2");
3194
3195 if (tdesc_numbered_register (feature, tdesc_data,
3196 S390_LAST_BREAK_REGNUM, "last_break"))
3197 have_linux_v1 = 1;
3198
3199 if (tdesc_numbered_register (feature, tdesc_data,
3200 S390_SYSTEM_CALL_REGNUM, "system_call"))
3201 have_linux_v2 = 1;
3202
3203 if (have_linux_v2 > have_linux_v1)
3204 valid_p = 0;
3205 }
3206
4ac33720
UW
3207 /* Transaction diagnostic block. */
3208 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3209 if (feature)
3210 {
3211 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3212 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3213 S390_TDB_DWORD0_REGNUM + i,
3214 tdb_regs[i]);
3215 }
3216
7803799a
UW
3217 if (!valid_p)
3218 {
3219 tdesc_data_cleanup (tdesc_data);
3220 return NULL;
3221 }
3222 }
5769d3cd 3223
7803799a
UW
3224 /* Find a candidate among extant architectures. */
3225 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3226 arches != NULL;
3227 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3228 {
3229 tdep = gdbarch_tdep (arches->gdbarch);
3230 if (!tdep)
3231 continue;
3232 if (tdep->abi != tdep_abi)
3233 continue;
3234 if ((tdep->gpr_full_regnum != -1) != have_upper)
3235 continue;
3236 if (tdesc_data != NULL)
3237 tdesc_data_cleanup (tdesc_data);
3238 return arches->gdbarch;
3239 }
5769d3cd 3240
7803799a 3241 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 3242 tdep = XCNEW (struct gdbarch_tdep);
7803799a 3243 tdep->abi = tdep_abi;
d0f54f9d 3244 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3245
3246 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3247 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3248
1de90795
UW
3249 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3250 We can safely let them default to 128-bit, since the debug info
3251 will give the size of type actually used in each case. */
3252 set_gdbarch_long_double_bit (gdbarch, 128);
3253 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3254
aaab4dba 3255 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3256 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3257 always. */
5769d3cd 3258 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3259 /* Stack grows downward. */
3260 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3261 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3262 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3263 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3264
7803799a 3265 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3266 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3267 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3268 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3269 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3270 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d 3271 set_gdbarch_regset_from_core_section (gdbarch,
34201ae3 3272 s390_regset_from_core_section);
7803799a 3273 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3274 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3275 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3276 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3277 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3278 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3279 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3280 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 3281 s390_pseudo_register_reggroup_p);
7803799a
UW
3282 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3283
3284 /* Assign pseudo register numbers. */
3285 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3286 last_pseudo_reg = first_pseudo_reg;
3287 tdep->gpr_full_regnum = -1;
3288 if (have_upper)
3289 {
3290 tdep->gpr_full_regnum = last_pseudo_reg;
3291 last_pseudo_reg += 16;
3292 }
3293 tdep->pc_regnum = last_pseudo_reg++;
3294 tdep->cc_regnum = last_pseudo_reg++;
3295 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3296 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3297
b0cf273e
JB
3298 /* Inferior function calls. */
3299 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3300 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3301 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3302 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3303
237b092b
AA
3304 /* Syscall handling. */
3305 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3306
a8c99f38 3307 /* Frame handling. */
a431654a 3308 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3309 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3310 dwarf2_append_unwinders (gdbarch);
a431654a 3311 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3312 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3313 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3314 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3315 frame_base_set_default (gdbarch, &s390_frame_base);
3316 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3317 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3318
1db4e8a0
UW
3319 /* Displaced stepping. */
3320 set_gdbarch_displaced_step_copy_insn (gdbarch,
34201ae3 3321 simple_displaced_step_copy_insn);
1db4e8a0
UW
3322 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3323 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 3324 simple_displaced_step_free_closure);
1db4e8a0 3325 set_gdbarch_displaced_step_location (gdbarch,
34201ae3 3326 displaced_step_at_entry_point);
1db4e8a0
UW
3327 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3328
70728992
PA
3329 /* Note that GNU/Linux is the only OS supported on this
3330 platform. */
3331 linux_init_abi (info, gdbarch);
3332
7803799a 3333 switch (tdep->abi)
5769d3cd 3334 {
7803799a 3335 case ABI_LINUX_S390:
d0f54f9d
JB
3336 tdep->gregset = &s390_gregset;
3337 tdep->sizeof_gregset = s390_sizeof_gregset;
3338 tdep->fpregset = &s390_fpregset;
3339 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3340
3341 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3342 set_solib_svr4_fetch_link_map_offsets
3343 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 3344
237b092b
AA
3345 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
3346
c642a434
UW
3347 if (have_upper)
3348 {
3349 if (have_linux_v2)
3350 set_gdbarch_core_regset_sections (gdbarch,
3351 s390_linux64v2_regset_sections);
3352 else if (have_linux_v1)
3353 set_gdbarch_core_regset_sections (gdbarch,
3354 s390_linux64v1_regset_sections);
3355 else
3356 set_gdbarch_core_regset_sections (gdbarch,
3357 s390_linux64_regset_sections);
3358 }
3359 else
3360 {
3361 if (have_linux_v2)
3362 set_gdbarch_core_regset_sections (gdbarch,
3363 s390_linux32v2_regset_sections);
3364 else if (have_linux_v1)
3365 set_gdbarch_core_regset_sections (gdbarch,
3366 s390_linux32v1_regset_sections);
3367 else
3368 set_gdbarch_core_regset_sections (gdbarch,
3369 s390_linux32_regset_sections);
3370 }
5769d3cd 3371 break;
b0cf273e 3372
7803799a 3373 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3374 tdep->gregset = &s390x_gregset;
3375 tdep->sizeof_gregset = s390x_sizeof_gregset;
3376 tdep->fpregset = &s390_fpregset;
3377 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3378
3379 set_gdbarch_long_bit (gdbarch, 64);
3380 set_gdbarch_long_long_bit (gdbarch, 64);
3381 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3382 set_solib_svr4_fetch_link_map_offsets
3383 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 3384 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 3385 s390_address_class_type_flags);
ffc65945 3386 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 3387 s390_address_class_type_flags_to_name);
ffc65945 3388 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 3389 s390_address_class_name_to_type_flags);
c642a434 3390
237b092b
AA
3391 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
3392
c642a434
UW
3393 if (have_linux_v2)
3394 set_gdbarch_core_regset_sections (gdbarch,
3395 s390x_linux64v2_regset_sections);
3396 else if (have_linux_v1)
3397 set_gdbarch_core_regset_sections (gdbarch,
3398 s390x_linux64v1_regset_sections);
3399 else
3400 set_gdbarch_core_regset_sections (gdbarch,
3401 s390x_linux64_regset_sections);
5769d3cd
AC
3402 break;
3403 }
3404
36482093
AC
3405 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3406
982e9687
UW
3407 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3408
b2756930
KB
3409 /* Enable TLS support. */
3410 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 3411 svr4_fetch_objfile_link_map);
b2756930 3412
1dd635ac
UW
3413 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3414
55aa24fb 3415 /* SystemTap functions. */
05c0465e
SDJ
3416 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3417 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3418 stap_register_indirection_prefixes);
3419 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3420 stap_register_indirection_suffixes);
55aa24fb
SDJ
3421 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3422
5769d3cd
AC
3423 return gdbarch;
3424}
3425
3426
a78f21af
AC
3427extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3428
5769d3cd 3429void
5ae5f592 3430_initialize_s390_tdep (void)
5769d3cd 3431{
5769d3cd
AC
3432 /* Hook us into the gdbarch mechanism. */
3433 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3434
94eae614 3435 /* Initialize the GNU/Linux target descriptions. */
7803799a 3436 initialize_tdesc_s390_linux32 ();
c642a434
UW
3437 initialize_tdesc_s390_linux32v1 ();
3438 initialize_tdesc_s390_linux32v2 ();
7803799a 3439 initialize_tdesc_s390_linux64 ();
c642a434
UW
3440 initialize_tdesc_s390_linux64v1 ();
3441 initialize_tdesc_s390_linux64v2 ();
4ac33720 3442 initialize_tdesc_s390_te_linux64 ();
7803799a 3443 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3444 initialize_tdesc_s390x_linux64v1 ();
3445 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3446 initialize_tdesc_s390x_te_linux64 ();
5769d3cd 3447}
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