gas: slightly relax .startof.()/.sizeof.() testcase
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
61baf725 3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
566c56c9
MK
47#include "linux-record.h"
48#include "record-full.h"
4ac33720 49#include "auxv.h"
237b092b 50#include "xml-syscall.h"
5769d3cd 51
55aa24fb
SDJ
52#include "stap-probe.h"
53#include "ax.h"
54#include "ax-gdb.h"
55#include "user-regs.h"
56#include "cli/cli-utils.h"
57#include <ctype.h>
04a83fee 58#include "elf/common.h"
417c80f9
AA
59#include "elf/s390.h"
60#include "elf-bfd.h"
325fac50 61#include <algorithm>
55aa24fb 62
7803799a 63#include "features/s390-linux32.c"
c642a434
UW
64#include "features/s390-linux32v1.c"
65#include "features/s390-linux32v2.c"
7803799a 66#include "features/s390-linux64.c"
c642a434
UW
67#include "features/s390-linux64v1.c"
68#include "features/s390-linux64v2.c"
4ac33720 69#include "features/s390-te-linux64.c"
550bdf96
AA
70#include "features/s390-vx-linux64.c"
71#include "features/s390-tevx-linux64.c"
7803799a 72#include "features/s390x-linux64.c"
c642a434
UW
73#include "features/s390x-linux64v1.c"
74#include "features/s390x-linux64v2.c"
4ac33720 75#include "features/s390x-te-linux64.c"
550bdf96
AA
76#include "features/s390x-vx-linux64.c"
77#include "features/s390x-tevx-linux64.c"
7803799a 78
237b092b
AA
79#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
80#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
81
52059ffd
TT
82enum s390_abi_kind
83{
84 ABI_LINUX_S390,
85 ABI_LINUX_ZSERIES
86};
87
417c80f9
AA
88enum s390_vector_abi_kind
89{
90 S390_VECTOR_ABI_NONE,
91 S390_VECTOR_ABI_128
92};
93
d0f54f9d
JB
94/* The tdep structure. */
95
96struct gdbarch_tdep
5769d3cd 97{
b0cf273e 98 /* ABI version. */
52059ffd 99 enum s390_abi_kind abi;
b0cf273e 100
417c80f9
AA
101 /* Vector ABI. */
102 enum s390_vector_abi_kind vector_abi;
103
7803799a
UW
104 /* Pseudo register numbers. */
105 int gpr_full_regnum;
106 int pc_regnum;
107 int cc_regnum;
550bdf96 108 int v0_full_regnum;
7803799a 109
5aa82d05
AA
110 int have_linux_v1;
111 int have_linux_v2;
112 int have_tdb;
d0f54f9d
JB
113};
114
115
7803799a
UW
116/* ABI call-saved register information. */
117
118static int
119s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 120{
7803799a
UW
121 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
122
123 switch (tdep->abi)
6707b003 124 {
7803799a
UW
125 case ABI_LINUX_S390:
126 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
127 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
128 || regnum == S390_A0_REGNUM)
129 return 1;
6707b003 130
7803799a
UW
131 break;
132
133 case ABI_LINUX_ZSERIES:
134 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
135 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
136 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
137 return 1;
138
139 break;
140 }
141
142 return 0;
5769d3cd
AC
143}
144
c642a434
UW
145static int
146s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
147{
148 /* The last-break address is read-only. */
149 return regnum == S390_LAST_BREAK_REGNUM;
150}
151
152static void
153s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
154{
155 struct gdbarch *gdbarch = get_regcache_arch (regcache);
156 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
157
158 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
159
160 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
161 messing with the PC we just installed, if we happen to be within
162 an interrupted system call that the kernel wants to restart.
163
164 Note that after we return from the dummy call, the SYSTEM_CALL and
165 ORIG_R2 registers will be automatically restored, and the kernel
166 continues to restart the system call at this point. */
167 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
168 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
169}
170
f79a3bae
MK
171/* The "guess_tracepoint_registers" gdbarch method. */
172
173static void
174s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
175 struct regcache *regcache,
176 CORE_ADDR addr)
177{
178 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
179 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
180 gdb_byte *reg = (gdb_byte *) alloca (sz);
181 ULONGEST pswm, pswa;
182
183 /* Set PSWA from the location and a default PSWM (the only part we're
184 unlikely to get right is the CC). */
185 if (tdep->abi == ABI_LINUX_S390)
186 {
187 /* 31-bit PSWA needs high bit set (it's very unlikely the target
188 was in 24-bit mode). */
189 pswa = addr | 0x80000000UL;
190 pswm = 0x070d0000UL;
191 }
192 else
193 {
194 pswa = addr;
195 pswm = 0x0705000180000000ULL;
196 }
197
198 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
199 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
200
201 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
202 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
203}
204
7803799a 205
d0f54f9d
JB
206/* DWARF Register Mapping. */
207
2ccd1468 208static const short s390_dwarf_regmap[] =
d0f54f9d 209{
550bdf96 210 /* 0-15: General Purpose Registers. */
d0f54f9d
JB
211 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
212 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
213 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
214 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
215
550bdf96 216 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
d0f54f9d
JB
217 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
218 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
219 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
220 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
221
550bdf96 222 /* 32-47: Control Registers (not mapped). */
34201ae3
UW
223 -1, -1, -1, -1, -1, -1, -1, -1,
224 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d 225
550bdf96 226 /* 48-63: Access Registers. */
d0f54f9d
JB
227 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
228 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
229 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
230 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
231
550bdf96 232 /* 64-65: Program Status Word. */
d0f54f9d 233 S390_PSWM_REGNUM,
7803799a
UW
234 S390_PSWA_REGNUM,
235
550bdf96
AA
236 /* 66-67: Reserved. */
237 -1, -1,
238
239 /* 68-83: Vector Registers 16-31. */
240 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
241 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
242 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
243 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
244
245 /* End of "official" DWARF registers. The remainder of the map is
246 for GDB internal use only. */
247
7803799a
UW
248 /* GPR Lower Half Access. */
249 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
250 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
251 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
252 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
d0f54f9d
JB
253};
254
550bdf96
AA
255enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
256
d0f54f9d
JB
257/* Convert DWARF register number REG to the appropriate register
258 number used by GDB. */
a78f21af 259static int
d3f73121 260s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 261{
7803799a 262 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
550bdf96 263 int gdb_reg = -1;
7803799a 264
550bdf96
AA
265 /* In a 32-on-64 debug scenario, debug info refers to the full
266 64-bit GPRs. Note that call frame information still refers to
267 the 32-bit lower halves, because s390_adjust_frame_regnum uses
268 special register numbers to access GPRs. */
7803799a
UW
269 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
270 return tdep->gpr_full_regnum + reg;
d0f54f9d 271
16aff9a6 272 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
550bdf96
AA
273 gdb_reg = s390_dwarf_regmap[reg];
274
275 if (tdep->v0_full_regnum == -1)
276 {
277 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
278 gdb_reg = -1;
279 }
280 else
281 {
282 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
283 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
284 }
d0f54f9d 285
550bdf96 286 return gdb_reg;
7803799a 287}
d0f54f9d 288
7803799a
UW
289/* Translate a .eh_frame register to DWARF register, or adjust a
290 .debug_frame register. */
291static int
292s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
293{
294 /* See s390_dwarf_reg_to_regnum for comments. */
550bdf96 295 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
d0f54f9d
JB
296}
297
d0f54f9d 298
7803799a
UW
299/* Pseudo registers. */
300
2ccd1468
UW
301static int
302regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
303{
304 return (tdep->gpr_full_regnum != -1
305 && regnum >= tdep->gpr_full_regnum
306 && regnum <= tdep->gpr_full_regnum + 15);
307}
308
550bdf96
AA
309/* Check whether REGNUM indicates a full vector register (v0-v15).
310 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
311
312static int
313regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
314{
315 return (tdep->v0_full_regnum != -1
316 && regnum >= tdep->v0_full_regnum
317 && regnum <= tdep->v0_full_regnum + 15);
318}
319
87de11c0
AA
320/* Return the name of register REGNO. Return the empty string for
321 registers that shouldn't be visible. */
550bdf96
AA
322
323static const char *
324s390_register_name (struct gdbarch *gdbarch, int regnum)
325{
326 if (regnum >= S390_V0_LOWER_REGNUM
327 && regnum <= S390_V15_LOWER_REGNUM)
87de11c0 328 return "";
550bdf96
AA
329 return tdesc_register_name (gdbarch, regnum);
330}
331
7803799a
UW
332static const char *
333s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 334{
7803799a 335 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 336
7803799a
UW
337 if (regnum == tdep->pc_regnum)
338 return "pc";
d0f54f9d 339
7803799a
UW
340 if (regnum == tdep->cc_regnum)
341 return "cc";
d0f54f9d 342
2ccd1468 343 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
344 {
345 static const char *full_name[] = {
346 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
347 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
348 };
349 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 350 }
7803799a 351
550bdf96
AA
352 if (regnum_is_vxr_full (tdep, regnum))
353 {
354 static const char *full_name[] = {
355 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
356 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
357 };
358 return full_name[regnum - tdep->v0_full_regnum];
359 }
360
7803799a 361 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
362}
363
7803799a
UW
364static struct type *
365s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 366{
7803799a 367 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 368
7803799a
UW
369 if (regnum == tdep->pc_regnum)
370 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 371
7803799a
UW
372 if (regnum == tdep->cc_regnum)
373 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 374
2ccd1468 375 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
376 return builtin_type (gdbarch)->builtin_uint64;
377
550bdf96
AA
378 if (regnum_is_vxr_full (tdep, regnum))
379 return tdesc_find_type (gdbarch, "vec128");
380
7803799a 381 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
382}
383
05d1431c 384static enum register_status
7803799a
UW
385s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
386 int regnum, gdb_byte *buf)
d0f54f9d 387{
7803799a 388 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 389 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 390 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
391 ULONGEST val;
392
7803799a 393 if (regnum == tdep->pc_regnum)
d0f54f9d 394 {
05d1431c
PA
395 enum register_status status;
396
397 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
398 if (status == REG_VALID)
399 {
400 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
401 val &= 0x7fffffff;
402 store_unsigned_integer (buf, regsize, byte_order, val);
403 }
404 return status;
7803799a 405 }
d0f54f9d 406
7803799a
UW
407 if (regnum == tdep->cc_regnum)
408 {
05d1431c
PA
409 enum register_status status;
410
411 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
412 if (status == REG_VALID)
413 {
414 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
415 val = (val >> 12) & 3;
416 else
417 val = (val >> 44) & 3;
418 store_unsigned_integer (buf, regsize, byte_order, val);
419 }
420 return status;
7803799a 421 }
d0f54f9d 422
2ccd1468 423 if (regnum_is_gpr_full (tdep, regnum))
7803799a 424 {
05d1431c 425 enum register_status status;
7803799a 426 ULONGEST val_upper;
05d1431c 427
7803799a
UW
428 regnum -= tdep->gpr_full_regnum;
429
05d1431c
PA
430 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
431 if (status == REG_VALID)
432 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
433 &val_upper);
434 if (status == REG_VALID)
435 {
436 val |= val_upper << 32;
437 store_unsigned_integer (buf, regsize, byte_order, val);
438 }
439 return status;
d0f54f9d 440 }
7803799a 441
550bdf96
AA
442 if (regnum_is_vxr_full (tdep, regnum))
443 {
444 enum register_status status;
445
446 regnum -= tdep->v0_full_regnum;
447
448 status = regcache_raw_read (regcache, S390_F0_REGNUM + regnum, buf);
449 if (status == REG_VALID)
450 status = regcache_raw_read (regcache,
451 S390_V0_LOWER_REGNUM + regnum, buf + 8);
452 return status;
453 }
454
7803799a 455 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
456}
457
458static void
7803799a
UW
459s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
460 int regnum, const gdb_byte *buf)
d0f54f9d 461{
7803799a 462 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 463 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 464 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
465 ULONGEST val, psw;
466
7803799a 467 if (regnum == tdep->pc_regnum)
d0f54f9d 468 {
7803799a
UW
469 val = extract_unsigned_integer (buf, regsize, byte_order);
470 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
471 {
472 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
473 val = (psw & 0x80000000) | (val & 0x7fffffff);
474 }
475 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
476 return;
477 }
d0f54f9d 478
7803799a
UW
479 if (regnum == tdep->cc_regnum)
480 {
481 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 482 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
483 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
484 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
485 else
486 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
487 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
488 return;
489 }
d0f54f9d 490
2ccd1468 491 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
492 {
493 regnum -= tdep->gpr_full_regnum;
494 val = extract_unsigned_integer (buf, regsize, byte_order);
495 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
496 val & 0xffffffff);
497 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
498 val >> 32);
499 return;
d0f54f9d 500 }
7803799a 501
550bdf96
AA
502 if (regnum_is_vxr_full (tdep, regnum))
503 {
504 regnum -= tdep->v0_full_regnum;
505 regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf);
506 regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8);
507 return;
508 }
509
7803799a 510 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
511}
512
513/* 'float' values are stored in the upper half of floating-point
550bdf96
AA
514 registers, even though we are otherwise a big-endian platform. The
515 same applies to a 'float' value within a vector. */
d0f54f9d 516
9acbedc0 517static struct value *
2ed3c037
UW
518s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
519 int regnum, struct frame_id frame_id)
d0f54f9d 520{
550bdf96 521 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2ed3c037
UW
522 struct value *value = default_value_from_register (gdbarch, type,
523 regnum, frame_id);
744a8059
SP
524 check_typedef (type);
525
550bdf96
AA
526 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
527 && TYPE_LENGTH (type) < 8)
528 || regnum_is_vxr_full (tdep, regnum)
529 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
9acbedc0 530 set_value_offset (value, 0);
d0f54f9d 531
9acbedc0 532 return value;
d0f54f9d
JB
533}
534
535/* Register groups. */
536
a78f21af 537static int
7803799a
UW
538s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
539 struct reggroup *group)
d0f54f9d
JB
540{
541 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
542
d6db1fab
UW
543 /* We usually save/restore the whole PSW, which includes PC and CC.
544 However, some older gdbservers may not support saving/restoring
545 the whole PSW yet, and will return an XML register description
546 excluding those from the save/restore register groups. In those
547 cases, we still need to explicitly save/restore PC and CC in order
548 to push or pop frames. Since this doesn't hurt anything if we
549 already save/restore the whole PSW (it's just redundant), we add
550 PC and CC at this point unconditionally. */
d0f54f9d 551 if (group == save_reggroup || group == restore_reggroup)
7803799a 552 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d 553
550bdf96
AA
554 if (group == vector_reggroup)
555 return regnum_is_vxr_full (tdep, regnum);
556
557 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
558 return 0;
559
d0f54f9d
JB
560 return default_register_reggroup_p (gdbarch, regnum, group);
561}
562
c4b3e547
MK
563/* The "ax_pseudo_register_collect" gdbarch method. */
564
565static int
566s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
567 struct agent_expr *ax, int regnum)
568{
569 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
570 if (regnum == tdep->pc_regnum)
571 {
572 ax_reg_mask (ax, S390_PSWA_REGNUM);
573 }
574 else if (regnum == tdep->cc_regnum)
575 {
576 ax_reg_mask (ax, S390_PSWM_REGNUM);
577 }
578 else if (regnum_is_gpr_full (tdep, regnum))
579 {
580 regnum -= tdep->gpr_full_regnum;
581 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
582 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
583 }
584 else if (regnum_is_vxr_full (tdep, regnum))
585 {
586 regnum -= tdep->v0_full_regnum;
587 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
588 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
589 }
590 else
591 {
592 internal_error (__FILE__, __LINE__, _("invalid regnum"));
593 }
594 return 0;
595}
596
597/* The "ax_pseudo_register_push_stack" gdbarch method. */
598
599static int
600s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
601 struct agent_expr *ax, int regnum)
602{
603 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
604 if (regnum == tdep->pc_regnum)
605 {
606 ax_reg (ax, S390_PSWA_REGNUM);
607 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
608 {
609 ax_zero_ext (ax, 31);
610 }
611 }
612 else if (regnum == tdep->cc_regnum)
613 {
614 ax_reg (ax, S390_PSWM_REGNUM);
615 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
616 ax_const_l (ax, 12);
617 else
618 ax_const_l (ax, 44);
619 ax_simple (ax, aop_rsh_unsigned);
620 ax_zero_ext (ax, 2);
621 }
622 else if (regnum_is_gpr_full (tdep, regnum))
623 {
624 regnum -= tdep->gpr_full_regnum;
625 ax_reg (ax, S390_R0_REGNUM + regnum);
626 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
627 ax_const_l (ax, 32);
628 ax_simple (ax, aop_lsh);
629 ax_simple (ax, aop_bit_or);
630 }
631 else if (regnum_is_vxr_full (tdep, regnum))
632 {
633 /* Too large to stuff on the stack. */
634 return 1;
635 }
636 else
637 {
638 internal_error (__FILE__, __LINE__, _("invalid regnum"));
639 }
640 return 0;
641}
642
70104a90
MK
643/* The "gen_return_address" gdbarch method. Since this is supposed to be
644 just a best-effort method, and we don't really have the means to run
645 the full unwinder here, just collect the link register. */
646
647static void
648s390_gen_return_address (struct gdbarch *gdbarch,
649 struct agent_expr *ax, struct axs_value *value,
650 CORE_ADDR scope)
651{
652 value->type = register_type (gdbarch, S390_R14_REGNUM);
653 value->kind = axs_lvalue_register;
654 value->u.reg = S390_R14_REGNUM;
655}
656
d0f54f9d 657
6df55226
MK
658/* A helper for s390_software_single_step, decides if an instruction
659 is a partial-execution instruction that needs to be executed until
660 completion when in record mode. If it is, returns 1 and writes
661 instruction length to a pointer. */
662
663static int
664s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
665{
666 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
667 uint16_t insn;
668
669 insn = read_memory_integer (loc, 2, byte_order);
670
671 switch (insn >> 8)
672 {
673 case 0xa8: /* MVCLE */
674 *len = 4;
675 return 1;
676
677 case 0xeb:
678 {
679 insn = read_memory_integer (loc + 4, 2, byte_order);
680 if ((insn & 0xff) == 0x8e)
681 {
682 /* MVCLU */
683 *len = 6;
684 return 1;
685 }
686 }
687 break;
688 }
689
690 switch (insn)
691 {
692 case 0xb255: /* MVST */
693 case 0xb263: /* CMPSC */
694 case 0xb2a5: /* TRE */
695 case 0xb2a6: /* CU21 */
696 case 0xb2a7: /* CU12 */
697 case 0xb9b0: /* CU14 */
698 case 0xb9b1: /* CU24 */
699 case 0xb9b2: /* CU41 */
700 case 0xb9b3: /* CU42 */
701 case 0xb92a: /* KMF */
702 case 0xb92b: /* KMO */
703 case 0xb92f: /* KMC */
704 case 0xb92d: /* KMCTR */
705 case 0xb92e: /* KM */
706 case 0xb93c: /* PPNO */
707 case 0xb990: /* TRTT */
708 case 0xb991: /* TRTO */
709 case 0xb992: /* TROT */
710 case 0xb993: /* TROO */
711 *len = 4;
712 return 1;
713 }
714
715 return 0;
716}
717
718/* Implement the "software_single_step" gdbarch method, needed to single step
719 through instructions like MVCLE in record mode, to make sure they are
720 executed to completion. Without that, record will save the full length
721 of destination buffer on every iteration, even though the CPU will only
722 process about 4kiB of it each time, leading to O(n**2) memory and time
723 complexity. */
724
93f9a11f 725static VEC (CORE_ADDR) *
f5ea389a 726s390_software_single_step (struct regcache *regcache)
6df55226 727{
ad769689
YQ
728 struct gdbarch *gdbarch = get_regcache_arch (regcache);
729 CORE_ADDR loc = regcache_read_pc (regcache);
6df55226
MK
730 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
731 int len;
732 uint16_t insn;
93f9a11f 733 VEC (CORE_ADDR) *next_pcs = NULL;
6df55226
MK
734
735 /* Special handling only if recording. */
736 if (!record_full_is_used ())
93f9a11f 737 return NULL;
6df55226
MK
738
739 /* First, match a partial instruction. */
740 if (!s390_is_partial_instruction (gdbarch, loc, &len))
93f9a11f 741 return NULL;
6df55226
MK
742
743 loc += len;
744
745 /* Second, look for a branch back to it. */
746 insn = read_memory_integer (loc, 2, byte_order);
747 if (insn != 0xa714) /* BRC with mask 1 */
93f9a11f 748 return NULL;
6df55226
MK
749
750 insn = read_memory_integer (loc + 2, 2, byte_order);
751 if (insn != (uint16_t) -(len / 2))
93f9a11f 752 return NULL;
6df55226
MK
753
754 loc += 4;
755
756 /* Found it, step past the whole thing. */
93f9a11f 757 VEC_safe_push (CORE_ADDR, next_pcs, loc);
6df55226 758
93f9a11f 759 return next_pcs;
6df55226
MK
760}
761
762static int
763s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
764 struct displaced_step_closure *closure)
765{
766 return 1;
767}
768
769
2ccd1468 770/* Maps for register sets. */
d0f54f9d 771
99b7da5d 772static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 773 {
99b7da5d
AA
774 { 1, S390_PSWM_REGNUM },
775 { 1, S390_PSWA_REGNUM },
776 { 16, S390_R0_REGNUM },
777 { 16, S390_A0_REGNUM },
778 { 1, S390_ORIG_R2_REGNUM },
779 { 0 }
2ccd1468 780 };
d0f54f9d 781
99b7da5d 782static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 783 {
99b7da5d
AA
784 { 1, S390_FPC_REGNUM, 8 },
785 { 16, S390_F0_REGNUM, 8 },
786 { 0 }
2ccd1468 787 };
d0f54f9d 788
99b7da5d 789static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 790 {
99b7da5d
AA
791 { 16, S390_R0_UPPER_REGNUM, 4 },
792 { 0 }
2ccd1468 793 };
7803799a 794
99b7da5d 795static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 796 {
99b7da5d
AA
797 { 1, REGCACHE_MAP_SKIP, 4 },
798 { 1, S390_LAST_BREAK_REGNUM, 4 },
799 { 0 }
2ccd1468 800 };
c642a434 801
99b7da5d 802static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 803 {
99b7da5d
AA
804 { 1, S390_LAST_BREAK_REGNUM, 8 },
805 { 0 }
2ccd1468
UW
806 };
807
99b7da5d 808static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 809 {
99b7da5d
AA
810 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
811 { 0 }
2ccd1468
UW
812 };
813
99b7da5d 814static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 815 {
99b7da5d
AA
816 { 1, S390_TDB_DWORD0_REGNUM, 8 },
817 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
818 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
819 { 1, S390_TDB_ATIA_REGNUM, 8 },
820 { 12, REGCACHE_MAP_SKIP, 8 },
821 { 16, S390_TDB_R0_REGNUM, 8 },
822 { 0 }
2ccd1468 823 };
c642a434 824
550bdf96
AA
825static const struct regcache_map_entry s390_regmap_vxrs_low[] =
826 {
827 { 16, S390_V0_LOWER_REGNUM, 8 },
828 { 0 }
829 };
830
831static const struct regcache_map_entry s390_regmap_vxrs_high[] =
832 {
833 { 16, S390_V16_REGNUM, 16 },
834 { 0 }
835 };
836
4ac33720 837
99b7da5d
AA
838/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
839 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
840
841static void
842s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
843 int regnum, const void *regs, size_t len)
844{
845 ULONGEST tdw;
846 enum register_status ret;
4ac33720 847
99b7da5d 848 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
849 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
850 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 851 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
852}
853
99b7da5d
AA
854const struct regset s390_gregset = {
855 s390_gregmap,
856 regcache_supply_regset,
857 regcache_collect_regset
d0f54f9d
JB
858};
859
99b7da5d
AA
860const struct regset s390_fpregset = {
861 s390_fpregmap,
862 regcache_supply_regset,
863 regcache_collect_regset
d0f54f9d
JB
864};
865
7803799a 866static const struct regset s390_upper_regset = {
34201ae3 867 s390_regmap_upper,
99b7da5d
AA
868 regcache_supply_regset,
869 regcache_collect_regset
7803799a
UW
870};
871
99b7da5d 872const struct regset s390_last_break_regset = {
c642a434 873 s390_regmap_last_break,
99b7da5d
AA
874 regcache_supply_regset,
875 regcache_collect_regset
c642a434
UW
876};
877
99b7da5d 878const struct regset s390x_last_break_regset = {
c642a434 879 s390x_regmap_last_break,
99b7da5d
AA
880 regcache_supply_regset,
881 regcache_collect_regset
c642a434
UW
882};
883
99b7da5d 884const struct regset s390_system_call_regset = {
c642a434 885 s390_regmap_system_call,
99b7da5d
AA
886 regcache_supply_regset,
887 regcache_collect_regset
c642a434
UW
888};
889
99b7da5d 890const struct regset s390_tdb_regset = {
4ac33720
UW
891 s390_regmap_tdb,
892 s390_supply_tdb_regset,
99b7da5d 893 regcache_collect_regset
4ac33720
UW
894};
895
550bdf96
AA
896const struct regset s390_vxrs_low_regset = {
897 s390_regmap_vxrs_low,
898 regcache_supply_regset,
899 regcache_collect_regset
900};
901
902const struct regset s390_vxrs_high_regset = {
903 s390_regmap_vxrs_high,
904 regcache_supply_regset,
905 regcache_collect_regset
906};
907
5aa82d05
AA
908/* Iterate over supported core file register note sections. */
909
910static void
911s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
912 iterate_over_regset_sections_cb *cb,
913 void *cb_data,
914 const struct regcache *regcache)
915{
916 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8f0435f7
AA
917 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
918 s390_sizeof_gregset : s390x_sizeof_gregset);
5aa82d05 919
8f0435f7
AA
920 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
921 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
5aa82d05
AA
922
923 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
8f0435f7
AA
924 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
925 "s390 GPR upper halves", cb_data);
5aa82d05
AA
926
927 if (tdep->have_linux_v1)
8f0435f7
AA
928 cb (".reg-s390-last-break", 8,
929 (gdbarch_ptr_bit (gdbarch) == 32
930 ? &s390_last_break_regset : &s390x_last_break_regset),
34a60ddb 931 "s390 last-break address", cb_data);
5aa82d05
AA
932
933 if (tdep->have_linux_v2)
8f0435f7
AA
934 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
935 "s390 system-call", cb_data);
5aa82d05
AA
936
937 /* If regcache is set, we are in "write" (gcore) mode. In this
938 case, don't iterate over the TDB unless its registers are
939 available. */
940 if (tdep->have_tdb
941 && (regcache == NULL
942 || REG_VALID == regcache_register_status (regcache,
943 S390_TDB_DWORD0_REGNUM)))
8f0435f7
AA
944 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
945 "s390 TDB", cb_data);
550bdf96
AA
946
947 if (tdep->v0_full_regnum != -1)
948 {
949 cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset,
950 "s390 vector registers 0-15 lower half", cb_data);
951 cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset,
952 "s390 vector registers 16-31", cb_data);
953 }
5aa82d05
AA
954}
955
7803799a
UW
956static const struct target_desc *
957s390_core_read_description (struct gdbarch *gdbarch,
958 struct target_ops *target, bfd *abfd)
959{
7803799a 960 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 961 CORE_ADDR hwcap = 0;
550bdf96 962 int high_gprs, v1, v2, te, vx;
4ac33720
UW
963
964 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
965 if (!section)
966 return NULL;
967
550bdf96
AA
968 high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs")
969 != NULL);
970 v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL);
971 v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL);
972 vx = (hwcap & HWCAP_S390_VX);
973 te = (hwcap & HWCAP_S390_TE);
974
7803799a
UW
975 switch (bfd_section_size (abfd, section))
976 {
977 case s390_sizeof_gregset:
c642a434 978 if (high_gprs)
550bdf96
AA
979 return (te && vx ? tdesc_s390_tevx_linux64 :
980 vx ? tdesc_s390_vx_linux64 :
981 te ? tdesc_s390_te_linux64 :
982 v2 ? tdesc_s390_linux64v2 :
983 v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64);
c642a434 984 else
550bdf96
AA
985 return (v2 ? tdesc_s390_linux32v2 :
986 v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
987
988 case s390x_sizeof_gregset:
550bdf96
AA
989 return (te && vx ? tdesc_s390x_tevx_linux64 :
990 vx ? tdesc_s390x_vx_linux64 :
991 te ? tdesc_s390x_te_linux64 :
992 v2 ? tdesc_s390x_linux64v2 :
993 v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
994
995 default:
996 return NULL;
997 }
998}
999
d0f54f9d 1000
4bc8c588
JB
1001/* Decoding S/390 instructions. */
1002
1003/* Named opcode values for the S/390 instructions we recognize. Some
1004 instructions have their opcode split across two fields; those are the
1005 op1_* and op2_* enums. */
1006enum
1007 {
a8c99f38
JB
1008 op1_lhi = 0xa7, op2_lhi = 0x08,
1009 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 1010 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 1011 op_lr = 0x18,
a8c99f38
JB
1012 op_lgr = 0xb904,
1013 op_l = 0x58,
1014 op1_ly = 0xe3, op2_ly = 0x58,
1015 op1_lg = 0xe3, op2_lg = 0x04,
1016 op_lm = 0x98,
1017 op1_lmy = 0xeb, op2_lmy = 0x98,
1018 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 1019 op_st = 0x50,
a8c99f38 1020 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 1021 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 1022 op_std = 0x60,
4bc8c588 1023 op_stm = 0x90,
a8c99f38 1024 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 1025 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
1026 op1_aghi = 0xa7, op2_aghi = 0x0b,
1027 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
1028 op1_agfi = 0xc2, op2_agfi = 0x08,
1029 op1_afi = 0xc2, op2_afi = 0x09,
1030 op1_algfi= 0xc2, op2_algfi= 0x0a,
1031 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
1032 op_ar = 0x1a,
1033 op_agr = 0xb908,
1034 op_a = 0x5a,
1035 op1_ay = 0xe3, op2_ay = 0x5a,
1036 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
1037 op1_slgfi= 0xc2, op2_slgfi= 0x04,
1038 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
1039 op_sr = 0x1b,
1040 op_sgr = 0xb909,
1041 op_s = 0x5b,
1042 op1_sy = 0xe3, op2_sy = 0x5b,
1043 op1_sg = 0xe3, op2_sg = 0x09,
1044 op_nr = 0x14,
1045 op_ngr = 0xb980,
1046 op_la = 0x41,
1047 op1_lay = 0xe3, op2_lay = 0x71,
1048 op1_larl = 0xc0, op2_larl = 0x00,
1049 op_basr = 0x0d,
1050 op_bas = 0x4d,
1051 op_bcr = 0x07,
1052 op_bc = 0x0d,
1db4e8a0
UW
1053 op_bctr = 0x06,
1054 op_bctgr = 0xb946,
1055 op_bct = 0x46,
1056 op1_bctg = 0xe3, op2_bctg = 0x46,
1057 op_bxh = 0x86,
1058 op1_bxhg = 0xeb, op2_bxhg = 0x44,
1059 op_bxle = 0x87,
1060 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
1061 op1_bras = 0xa7, op2_bras = 0x05,
1062 op1_brasl= 0xc0, op2_brasl= 0x05,
1063 op1_brc = 0xa7, op2_brc = 0x04,
1064 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
1065 op1_brct = 0xa7, op2_brct = 0x06,
1066 op1_brctg= 0xa7, op2_brctg= 0x07,
1067 op_brxh = 0x84,
1068 op1_brxhg= 0xec, op2_brxhg= 0x44,
1069 op_brxle = 0x85,
1070 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 1071 op_svc = 0x0a,
4bc8c588
JB
1072 };
1073
1074
a8c99f38
JB
1075/* Read a single instruction from address AT. */
1076
1077#define S390_MAX_INSTR_SIZE 6
1078static int
1079s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
1080{
1081 static int s390_instrlen[] = { 2, 4, 4, 6 };
1082 int instrlen;
1083
8defab1a 1084 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
1085 return -1;
1086 instrlen = s390_instrlen[instr[0] >> 6];
1087 if (instrlen > 2)
1088 {
8defab1a 1089 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 1090 return -1;
a8c99f38
JB
1091 }
1092 return instrlen;
1093}
1094
1095
4bc8c588
JB
1096/* The functions below are for recognizing and decoding S/390
1097 instructions of various formats. Each of them checks whether INSN
1098 is an instruction of the given format, with the specified opcodes.
1099 If it is, it sets the remaining arguments to the values of the
1100 instruction's fields, and returns a non-zero value; otherwise, it
1101 returns zero.
1102
1103 These functions' arguments appear in the order they appear in the
1104 instruction, not in the machine-language form. So, opcodes always
1105 come first, even though they're sometimes scattered around the
1106 instructions. And displacements appear before base and extension
1107 registers, as they do in the assembly syntax, not at the end, as
1108 they do in the machine language. */
a78f21af 1109static int
4bc8c588
JB
1110is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
1111{
1112 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1113 {
1114 *r1 = (insn[1] >> 4) & 0xf;
1115 /* i2 is a 16-bit signed quantity. */
1116 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1117 return 1;
1118 }
1119 else
1120 return 0;
1121}
8ac0e65a 1122
5769d3cd 1123
4bc8c588
JB
1124static int
1125is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 1126 unsigned int *r1, int *i2)
4bc8c588
JB
1127{
1128 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1129 {
1130 *r1 = (insn[1] >> 4) & 0xf;
1131 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
1132 no sign extension is necessary, but we don't want to assume
1133 that. */
4bc8c588 1134 *i2 = (((insn[2] << 24)
34201ae3
UW
1135 | (insn[3] << 16)
1136 | (insn[4] << 8)
1137 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
1138 return 1;
1139 }
1140 else
1141 return 0;
1142}
1143
1144
1145static int
1146is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1147{
1148 if (insn[0] == op)
1149 {
1150 *r1 = (insn[1] >> 4) & 0xf;
1151 *r2 = insn[1] & 0xf;
1152 return 1;
1153 }
1154 else
1155 return 0;
1156}
1157
1158
1159static int
1160is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1161{
1162 if (((insn[0] << 8) | insn[1]) == op)
1163 {
1164 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1165 *r1 = (insn[3] >> 4) & 0xf;
1166 *r2 = insn[3] & 0xf;
1167 return 1;
1168 }
1169 else
1170 return 0;
1171}
1172
1173
1174static int
1175is_rs (bfd_byte *insn, int op,
eb1bd1fb 1176 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1177{
1178 if (insn[0] == op)
1179 {
1180 *r1 = (insn[1] >> 4) & 0xf;
1181 *r3 = insn[1] & 0xf;
1182 *b2 = (insn[2] >> 4) & 0xf;
1183 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1184 return 1;
1185 }
1186 else
1187 return 0;
1188}
1189
1190
1191static int
a8c99f38 1192is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 1193 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1194{
1195 if (insn[0] == op1
4bc8c588
JB
1196 && insn[5] == op2)
1197 {
1198 *r1 = (insn[1] >> 4) & 0xf;
1199 *r3 = insn[1] & 0xf;
1200 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1201 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1202 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1203 ^ 0x80000) - 0x80000;
4bc8c588
JB
1204 return 1;
1205 }
1206 else
1207 return 0;
1208}
1209
1210
1db4e8a0
UW
1211static int
1212is_rsi (bfd_byte *insn, int op,
34201ae3 1213 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1214{
1215 if (insn[0] == op)
1216 {
1217 *r1 = (insn[1] >> 4) & 0xf;
1218 *r3 = insn[1] & 0xf;
1219 /* i2 is a 16-bit signed quantity. */
1220 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1221 return 1;
1222 }
1223 else
1224 return 0;
1225}
1226
1227
1228static int
1229is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 1230 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1231{
1232 if (insn[0] == op1
1233 && insn[5] == op2)
1234 {
1235 *r1 = (insn[1] >> 4) & 0xf;
1236 *r3 = insn[1] & 0xf;
1237 /* i2 is a 16-bit signed quantity. */
1238 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1239 return 1;
1240 }
1241 else
1242 return 0;
1243}
1244
1245
4bc8c588
JB
1246static int
1247is_rx (bfd_byte *insn, int op,
eb1bd1fb 1248 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1249{
1250 if (insn[0] == op)
1251 {
1252 *r1 = (insn[1] >> 4) & 0xf;
1253 *x2 = insn[1] & 0xf;
1254 *b2 = (insn[2] >> 4) & 0xf;
1255 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1256 return 1;
1257 }
1258 else
1259 return 0;
1260}
1261
1262
1263static int
a8c99f38 1264is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1265 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1266{
1267 if (insn[0] == op1
4bc8c588
JB
1268 && insn[5] == op2)
1269 {
1270 *r1 = (insn[1] >> 4) & 0xf;
1271 *x2 = insn[1] & 0xf;
1272 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1273 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1274 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1275 ^ 0x80000) - 0x80000;
4bc8c588
JB
1276 return 1;
1277 }
1278 else
1279 return 0;
1280}
1281
1282
3fc46200 1283/* Prologue analysis. */
4bc8c588 1284
d0f54f9d
JB
1285#define S390_NUM_GPRS 16
1286#define S390_NUM_FPRS 16
4bc8c588 1287
a8c99f38
JB
1288struct s390_prologue_data {
1289
ee1b3323
UW
1290 /* The stack. */
1291 struct pv_area *stack;
1292
e17a4113 1293 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1294 int gpr_size;
1295 int fpr_size;
e17a4113 1296 enum bfd_endian byte_order;
a8c99f38
JB
1297
1298 /* The general-purpose registers. */
3fc46200 1299 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1300
1301 /* The floating-point registers. */
3fc46200 1302 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1303
121d8485
UW
1304 /* The offset relative to the CFA where the incoming GPR N was saved
1305 by the function prologue. 0 if not saved or unknown. */
1306 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1307
121d8485
UW
1308 /* Likewise for FPRs. */
1309 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1310
121d8485
UW
1311 /* Nonzero if the backchain was saved. This is assumed to be the
1312 case when the incoming SP is saved at the current SP location. */
1313 int back_chain_saved_p;
1314};
4bc8c588 1315
3fc46200
UW
1316/* Return the effective address for an X-style instruction, like:
1317
34201ae3 1318 L R1, D2(X2, B2)
3fc46200
UW
1319
1320 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1321 constant; the effective address is the sum of all three. If either
1322 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1323 means that r0 can't be used as either X2 or B2. */
1324static pv_t
1325s390_addr (struct s390_prologue_data *data,
1326 int d2, unsigned int x2, unsigned int b2)
1327{
1328 pv_t result;
1329
1330 result = pv_constant (d2);
1331 if (x2)
1332 result = pv_add (result, data->gpr[x2]);
1333 if (b2)
1334 result = pv_add (result, data->gpr[b2]);
1335
1336 return result;
1337}
1338
1339/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1340static void
3fc46200
UW
1341s390_store (struct s390_prologue_data *data,
1342 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1343 pv_t value)
4bc8c588 1344{
3fc46200 1345 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1346 pv_t offset;
121d8485
UW
1347
1348 /* Check whether we are storing the backchain. */
3fc46200 1349 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1350
3fc46200 1351 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1352 if (size == data->gpr_size
3fc46200 1353 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1354 {
1355 data->back_chain_saved_p = 1;
1356 return;
1357 }
1358
1359
1360 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1361 if (!pv_area_store_would_trash (data->stack, addr))
1362 pv_area_store (data->stack, addr, size, value);
4bc8c588 1363
a8c99f38 1364
121d8485
UW
1365 /* Note: If this is some store we cannot identify, you might think we
1366 should forget our cached values, as any of those might have been hit.
1367
1368 However, we make the assumption that the register save areas are only
1369 ever stored to once in any given function, and we do recognize these
1370 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1371}
4bc8c588 1372
3fc46200
UW
1373/* Do a SIZE-byte load from D2(X2,B2). */
1374static pv_t
1375s390_load (struct s390_prologue_data *data,
1376 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1377
4bc8c588 1378{
3fc46200 1379 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1380
a8c99f38
JB
1381 /* If it's a load from an in-line constant pool, then we can
1382 simulate that, under the assumption that the code isn't
1383 going to change between the time the processor actually
1384 executed it creating the current frame, and the time when
1385 we're analyzing the code to unwind past that frame. */
3fc46200 1386 if (pv_is_constant (addr))
4bc8c588 1387 {
0542c86d 1388 struct target_section *secp;
3fc46200 1389 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1390 if (secp != NULL
34201ae3 1391 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1392 secp->the_bfd_section)
34201ae3
UW
1393 & SEC_READONLY))
1394 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1395 data->byte_order));
a8c99f38 1396 }
7666f43c 1397
121d8485 1398 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1399 return pv_area_fetch (data->stack, addr, size);
1400}
121d8485 1401
ee1b3323
UW
1402/* Function for finding saved registers in a 'struct pv_area'; we pass
1403 this to pv_area_scan.
121d8485 1404
ee1b3323
UW
1405 If VALUE is a saved register, ADDR says it was saved at a constant
1406 offset from the frame base, and SIZE indicates that the whole
1407 register was saved, record its offset in the reg_offset table in
1408 PROLOGUE_UNTYPED. */
1409static void
c378eb4e
MS
1410s390_check_for_saved (void *data_untyped, pv_t addr,
1411 CORE_ADDR size, pv_t value)
ee1b3323 1412{
19ba03f4 1413 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
ee1b3323
UW
1414 int i, offset;
1415
1416 if (!pv_is_register (addr, S390_SP_REGNUM))
1417 return;
1418
1419 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1420
ee1b3323
UW
1421 /* If we are storing the original value of a register, we want to
1422 record the CFA offset. If the same register is stored multiple
1423 times, the stack slot with the highest address counts. */
34201ae3 1424
ee1b3323
UW
1425 for (i = 0; i < S390_NUM_GPRS; i++)
1426 if (size == data->gpr_size
1427 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1428 if (data->gpr_slot[i] == 0
1429 || data->gpr_slot[i] > offset)
1430 {
1431 data->gpr_slot[i] = offset;
1432 return;
1433 }
1434
1435 for (i = 0; i < S390_NUM_FPRS; i++)
1436 if (size == data->fpr_size
1437 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1438 if (data->fpr_slot[i] == 0
1439 || data->fpr_slot[i] > offset)
1440 {
1441 data->fpr_slot[i] = offset;
1442 return;
1443 }
a8c99f38 1444}
4bc8c588 1445
a8c99f38
JB
1446/* Analyze the prologue of the function starting at START_PC,
1447 continuing at most until CURRENT_PC. Initialize DATA to
1448 hold all information we find out about the state of the registers
1449 and stack slots. Return the address of the instruction after
1450 the last one that changed the SP, FP, or back chain; or zero
1451 on error. */
1452static CORE_ADDR
1453s390_analyze_prologue (struct gdbarch *gdbarch,
1454 CORE_ADDR start_pc,
1455 CORE_ADDR current_pc,
1456 struct s390_prologue_data *data)
4bc8c588 1457{
a8c99f38
JB
1458 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1459
4bc8c588 1460 /* Our return value:
a8c99f38 1461 The address of the instruction after the last one that changed
34201ae3 1462 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1463 read memory. */
1464 CORE_ADDR result = start_pc;
4bc8c588 1465
4bc8c588
JB
1466 /* The current PC for our abstract interpretation. */
1467 CORE_ADDR pc;
1468
1469 /* The address of the next instruction after that. */
1470 CORE_ADDR next_pc;
34201ae3 1471
4bc8c588
JB
1472 /* Set up everything's initial value. */
1473 {
1474 int i;
1475
55f960e1 1476 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1477
a8c99f38
JB
1478 /* For the purpose of prologue tracking, we consider the GPR size to
1479 be equal to the ABI word size, even if it is actually larger
1480 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1481 data->gpr_size = word_size;
1482 data->fpr_size = 8;
e17a4113 1483 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1484
4bc8c588 1485 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1486 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1487
1488 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1489 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1490
121d8485
UW
1491 for (i = 0; i < S390_NUM_GPRS; i++)
1492 data->gpr_slot[i] = 0;
1493
1494 for (i = 0; i < S390_NUM_FPRS; i++)
1495 data->fpr_slot[i] = 0;
4bc8c588 1496
121d8485 1497 data->back_chain_saved_p = 0;
4bc8c588
JB
1498 }
1499
a8c99f38
JB
1500 /* Start interpreting instructions, until we hit the frame's
1501 current PC or the first branch instruction. */
1502 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1503 {
4bc8c588 1504 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1505 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1506
3fc46200
UW
1507 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1508 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1509 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1510
4bc8c588 1511 /* Fields for various kinds of instructions. */
a8c99f38
JB
1512 unsigned int b2, r1, r2, x2, r3;
1513 int i2, d2;
4bc8c588 1514
121d8485 1515 /* The values of SP and FP before this instruction,
34201ae3 1516 for detecting instructions that change them. */
3fc46200 1517 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1518 /* Likewise for the flag whether the back chain was saved. */
1519 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1520
1521 /* If we got an error trying to read the instruction, report it. */
1522 if (insn_len < 0)
34201ae3
UW
1523 {
1524 result = 0;
1525 break;
1526 }
4bc8c588
JB
1527
1528 next_pc = pc + insn_len;
1529
a8c99f38
JB
1530 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1531 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1532 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1533
4bc8c588 1534
3fc46200
UW
1535 /* LHI r1, i2 --- load halfword immediate. */
1536 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1537 /* LGFI r1, i2 --- load fullword immediate. */
1538 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1539 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1540 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1541 data->gpr[r1] = pv_constant (i2);
1542
1543 /* LR r1, r2 --- load from register. */
1544 /* LGR r1, r2 --- load from register (64-bit version). */
1545 else if (is_rr (insn32, op_lr, &r1, &r2)
1546 || is_rre (insn64, op_lgr, &r1, &r2))
1547 data->gpr[r1] = data->gpr[r2];
1548
1549 /* L r1, d2(x2, b2) --- load. */
1550 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1551 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1552 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1553 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1554 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1555 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1556
1557 /* ST r1, d2(x2, b2) --- store. */
1558 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1559 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1560 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1561 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1562 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1563 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1564
1565 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1566 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1567 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1568
1569 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1570 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1571 version). */
3fc46200
UW
1572 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1573 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1574 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1575 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1576 {
1577 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1578 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1579 }
4bc8c588 1580
3fc46200
UW
1581 /* AHI r1, i2 --- add halfword immediate. */
1582 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1583 /* AFI r1, i2 --- add fullword immediate. */
1584 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1585 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1586 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1587 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1588 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1589 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1590
1591 /* ALFI r1, i2 --- add logical immediate. */
1592 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1593 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1594 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1595 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1596 (CORE_ADDR)i2 & 0xffffffff);
1597
1598 /* AR r1, r2 -- add register. */
1599 /* AGR r1, r2 -- add register (64-bit version). */
1600 else if (is_rr (insn32, op_ar, &r1, &r2)
1601 || is_rre (insn64, op_agr, &r1, &r2))
1602 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1603
1604 /* A r1, d2(x2, b2) -- add. */
1605 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1606 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1607 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1608 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1609 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1610 data->gpr[r1] = pv_add (data->gpr[r1],
1611 s390_load (data, d2, x2, b2, data->gpr_size));
1612
1613 /* SLFI r1, i2 --- subtract logical immediate. */
1614 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1615 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1616 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1617 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1618 -((CORE_ADDR)i2 & 0xffffffff));
1619
1620 /* SR r1, r2 -- subtract register. */
1621 /* SGR r1, r2 -- subtract register (64-bit version). */
1622 else if (is_rr (insn32, op_sr, &r1, &r2)
1623 || is_rre (insn64, op_sgr, &r1, &r2))
1624 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1625
1626 /* S r1, d2(x2, b2) -- subtract. */
1627 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1628 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1629 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1630 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1631 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1632 data->gpr[r1] = pv_subtract (data->gpr[r1],
1633 s390_load (data, d2, x2, b2, data->gpr_size));
1634
1635 /* LA r1, d2(x2, b2) --- load address. */
1636 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1637 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1638 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1639 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1640
1641 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1642 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1643 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1644
3fc46200 1645 /* BASR r1, 0 --- branch and save.
34201ae3 1646 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1647 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1648 && r2 == 0)
3fc46200 1649 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1650
3fc46200 1651 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1652 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1653 {
1654 data->gpr[r1] = pv_constant (next_pc);
1655 next_pc = pc + i2 * 2;
4bc8c588 1656
34201ae3
UW
1657 /* We'd better not interpret any backward branches. We'll
1658 never terminate. */
1659 if (next_pc <= pc)
1660 break;
1661 }
4bc8c588 1662
bc0e3f49
AA
1663 /* BRC/BRCL -- branch relative on condition. Ignore "branch
1664 never", branch to following instruction, and "conditional
1665 trap" (BRC +2). Otherwise terminate search. */
1666 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
1667 {
1668 if (r1 != 0 && i2 != 1 && i2 != 2)
1669 break;
1670 }
1671 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
1672 {
1673 if (r1 != 0 && i2 != 3)
1674 break;
1675 }
1676
a8c99f38
JB
1677 /* Terminate search when hitting any other branch instruction. */
1678 else if (is_rr (insn, op_basr, &r1, &r2)
1679 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1680 || is_rr (insn, op_bcr, &r1, &r2)
1681 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
a8c99f38
JB
1682 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1683 break;
1684
4bc8c588 1685 else
d4fb63e1
TT
1686 {
1687 /* An instruction we don't know how to simulate. The only
1688 safe thing to do would be to set every value we're tracking
1689 to 'unknown'. Instead, we'll be optimistic: we assume that
1690 we *can* interpret every instruction that the compiler uses
1691 to manipulate any of the data we're interested in here --
1692 then we can just ignore anything else. */
1693 }
4bc8c588
JB
1694
1695 /* Record the address after the last instruction that changed
34201ae3
UW
1696 the FP, SP, or backlink. Ignore instructions that changed
1697 them back to their original values --- those are probably
1698 restore instructions. (The back chain is never restored,
1699 just popped.) */
4bc8c588 1700 {
34201ae3
UW
1701 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1702 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1703
1704 if ((! pv_is_identical (pre_insn_sp, sp)
1705 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1706 && sp.kind != pvk_unknown)
34201ae3
UW
1707 || (! pv_is_identical (pre_insn_fp, fp)
1708 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1709 && fp.kind != pvk_unknown)
34201ae3
UW
1710 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1711 result = next_pc;
4bc8c588 1712 }
5769d3cd 1713 }
4bc8c588 1714
ee1b3323
UW
1715 /* Record where all the registers were saved. */
1716 pv_area_scan (data->stack, s390_check_for_saved, data);
1717
1718 free_pv_area (data->stack);
1719 data->stack = NULL;
1720
4bc8c588 1721 return result;
5769d3cd
AC
1722}
1723
34201ae3 1724/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1725 some "real" code. */
1726static CORE_ADDR
6093d2eb 1727s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1728{
1729 struct s390_prologue_data data;
f054145e
AA
1730 CORE_ADDR skip_pc, func_addr;
1731
1732 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1733 {
1734 CORE_ADDR post_prologue_pc
1735 = skip_prologue_using_sal (gdbarch, func_addr);
1736 if (post_prologue_pc != 0)
325fac50 1737 return std::max (pc, post_prologue_pc);
f054145e
AA
1738 }
1739
6093d2eb 1740 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1741 return skip_pc ? skip_pc : pc;
1742}
1743
c9cf6e20 1744/* Implmement the stack_frame_destroyed_p gdbarch method. */
d0f54f9d 1745static int
c9cf6e20 1746s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
d0f54f9d
JB
1747{
1748 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1749
1750 /* In frameless functions, there's not frame to destroy and thus
1751 we don't care about the epilogue.
1752
1753 In functions with frame, the epilogue sequence is a pair of
1754 a LM-type instruction that restores (amongst others) the
1755 return register %r14 and the stack pointer %r15, followed
1756 by a branch 'br %r14' --or equivalent-- that effects the
1757 actual return.
1758
1759 In that situation, this function needs to return 'true' in
1760 exactly one case: when pc points to that branch instruction.
1761
1762 Thus we try to disassemble the one instructions immediately
177b42fe 1763 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1764 modifying the stack pointer.
1765
1766 Note that disassembling backwards is not reliable, so there
1767 is a slight chance of false positives here ... */
1768
1769 bfd_byte insn[6];
1770 unsigned int r1, r3, b2;
1771 int d2;
1772
1773 if (word_size == 4
8defab1a 1774 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1775 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1776 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1777 return 1;
1778
a8c99f38 1779 if (word_size == 4
8defab1a 1780 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1781 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1782 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1783 return 1;
1784
d0f54f9d 1785 if (word_size == 8
8defab1a 1786 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1787 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1788 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1789 return 1;
1790
1791 return 0;
1792}
5769d3cd 1793
1db4e8a0
UW
1794/* Displaced stepping. */
1795
5ac21343
PA
1796/* Return true if INSN is a non-branch RIL-b or RIL-c format
1797 instruction. */
1798
1799static int
1800is_non_branch_ril (gdb_byte *insn)
1801{
1802 gdb_byte op1 = insn[0];
1803
1804 if (op1 == 0xc4)
1805 {
1806 gdb_byte op2 = insn[1] & 0x0f;
1807
1808 switch (op2)
1809 {
1810 case 0x02: /* llhrl */
1811 case 0x04: /* lghrl */
1812 case 0x05: /* lhrl */
1813 case 0x06: /* llghrl */
1814 case 0x07: /* sthrl */
1815 case 0x08: /* lgrl */
1816 case 0x0b: /* stgrl */
1817 case 0x0c: /* lgfrl */
1818 case 0x0d: /* lrl */
1819 case 0x0e: /* llgfrl */
1820 case 0x0f: /* strl */
1821 return 1;
1822 }
1823 }
1824 else if (op1 == 0xc6)
1825 {
1826 gdb_byte op2 = insn[1] & 0x0f;
1827
1828 switch (op2)
1829 {
1830 case 0x00: /* exrl */
1831 case 0x02: /* pfdrl */
1832 case 0x04: /* cghrl */
1833 case 0x05: /* chrl */
1834 case 0x06: /* clghrl */
1835 case 0x07: /* clhrl */
1836 case 0x08: /* cgrl */
1837 case 0x0a: /* clgrl */
1838 case 0x0c: /* cgfrl */
1839 case 0x0d: /* crl */
1840 case 0x0e: /* clgfrl */
1841 case 0x0f: /* clrl */
1842 return 1;
1843 }
1844 }
1845
1846 return 0;
1847}
1848
1849/* Implementation of gdbarch_displaced_step_copy_insn. */
1850
1851static struct displaced_step_closure *
1852s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
1853 CORE_ADDR from, CORE_ADDR to,
1854 struct regcache *regs)
1855{
1856 size_t len = gdbarch_max_insn_length (gdbarch);
224c3ddb 1857 gdb_byte *buf = (gdb_byte *) xmalloc (len);
5ac21343
PA
1858 struct cleanup *old_chain = make_cleanup (xfree, buf);
1859
1860 read_memory (from, buf, len);
1861
1862 /* Adjust the displacement field of PC-relative RIL instructions,
1863 except branches. The latter are handled in the fixup hook. */
1864 if (is_non_branch_ril (buf))
1865 {
1866 LONGEST offset;
1867
1868 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
1869 offset = (from - to + offset * 2) / 2;
1870
1871 /* If the instruction is too far from the jump pad, punt. This
1872 will usually happen with instructions in shared libraries.
1873 We could probably support these by rewriting them to be
1874 absolute or fully emulating them. */
1875 if (offset < INT32_MIN || offset > INT32_MAX)
1876 {
1877 /* Let the core fall back to stepping over the breakpoint
1878 in-line. */
1879 if (debug_displaced)
1880 {
1881 fprintf_unfiltered (gdb_stdlog,
1882 "displaced: can't displaced step "
1883 "RIL instruction: offset %s out of range\n",
1884 plongest (offset));
1885 }
1886 do_cleanups (old_chain);
1887 return NULL;
1888 }
1889
1890 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
1891 }
1892
1893 write_memory (to, buf, len);
1894
1895 if (debug_displaced)
1896 {
1897 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
1898 paddress (gdbarch, from), paddress (gdbarch, to));
1899 displaced_step_dump_bytes (gdb_stdlog, buf, len);
1900 }
1901
1902 discard_cleanups (old_chain);
1903 return (struct displaced_step_closure *) buf;
1904}
1905
1db4e8a0
UW
1906/* Fix up the state of registers and memory after having single-stepped
1907 a displaced instruction. */
1908static void
1909s390_displaced_step_fixup (struct gdbarch *gdbarch,
1910 struct displaced_step_closure *closure,
1911 CORE_ADDR from, CORE_ADDR to,
1912 struct regcache *regs)
1913{
5ac21343 1914 /* Our closure is a copy of the instruction. */
1db4e8a0
UW
1915 gdb_byte *insn = (gdb_byte *) closure;
1916 static int s390_instrlen[] = { 2, 4, 4, 6 };
1917 int insnlen = s390_instrlen[insn[0] >> 6];
1918
1919 /* Fields for various kinds of instructions. */
1920 unsigned int b2, r1, r2, x2, r3;
1921 int i2, d2;
1922
1923 /* Get current PC and addressing mode bit. */
1924 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1925 ULONGEST amode = 0;
1db4e8a0
UW
1926
1927 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1928 {
1929 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1930 amode &= 0x80000000;
1931 }
1932
1933 if (debug_displaced)
1934 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1935 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1936 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1937 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1938
1939 /* Handle absolute branch and save instructions. */
1940 if (is_rr (insn, op_basr, &r1, &r2)
1941 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1942 {
1943 /* Recompute saved return address in R1. */
1944 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1945 amode | (from + insnlen));
1946 }
1947
1948 /* Handle absolute branch instructions. */
1949 else if (is_rr (insn, op_bcr, &r1, &r2)
1950 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1951 || is_rr (insn, op_bctr, &r1, &r2)
1952 || is_rre (insn, op_bctgr, &r1, &r2)
1953 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1954 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1955 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1956 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1957 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1958 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1959 {
1960 /* Update PC iff branch was *not* taken. */
1961 if (pc == to + insnlen)
1962 regcache_write_pc (regs, from + insnlen);
1963 }
1964
1965 /* Handle PC-relative branch and save instructions. */
1966 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1967 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1968 {
1969 /* Update PC. */
1970 regcache_write_pc (regs, pc - to + from);
1971 /* Recompute saved return address in R1. */
1972 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1973 amode | (from + insnlen));
1974 }
1975
1976 /* Handle PC-relative branch instructions. */
1977 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1978 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1979 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1980 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1981 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1982 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1983 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1984 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1985 {
1986 /* Update PC. */
1987 regcache_write_pc (regs, pc - to + from);
1988 }
1989
1990 /* Handle LOAD ADDRESS RELATIVE LONG. */
1991 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1992 {
0161e4b9
UW
1993 /* Update PC. */
1994 regcache_write_pc (regs, from + insnlen);
34201ae3 1995 /* Recompute output address in R1. */
1db4e8a0 1996 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1997 amode | (from + i2 * 2));
1db4e8a0
UW
1998 }
1999
2000 /* If we executed a breakpoint instruction, point PC right back at it. */
2001 else if (insn[0] == 0x0 && insn[1] == 0x1)
2002 regcache_write_pc (regs, from);
2003
2004 /* For any other insn, PC points right after the original instruction. */
2005 else
2006 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
2007
2008 if (debug_displaced)
2009 fprintf_unfiltered (gdb_stdlog,
2010 "displaced: (s390) pc is now %s\n",
2011 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 2012}
a8c99f38 2013
d6db1fab
UW
2014
2015/* Helper routine to unwind pseudo registers. */
2016
2017static struct value *
2018s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2019{
2020 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2021 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2022 struct type *type = register_type (gdbarch, regnum);
2023
2024 /* Unwind PC via PSW address. */
2025 if (regnum == tdep->pc_regnum)
2026 {
2027 struct value *val;
2028
2029 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2030 if (!value_optimized_out (val))
2031 {
2032 LONGEST pswa = value_as_long (val);
2033
2034 if (TYPE_LENGTH (type) == 4)
2035 return value_from_pointer (type, pswa & 0x7fffffff);
2036 else
2037 return value_from_pointer (type, pswa);
2038 }
2039 }
2040
2041 /* Unwind CC via PSW mask. */
2042 if (regnum == tdep->cc_regnum)
2043 {
2044 struct value *val;
2045
2046 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2047 if (!value_optimized_out (val))
2048 {
2049 LONGEST pswm = value_as_long (val);
2050
2051 if (TYPE_LENGTH (type) == 4)
2052 return value_from_longest (type, (pswm >> 12) & 3);
2053 else
2054 return value_from_longest (type, (pswm >> 44) & 3);
2055 }
2056 }
2057
2058 /* Unwind full GPRs to show at least the lower halves (as the
2059 upper halves are undefined). */
2ccd1468 2060 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
2061 {
2062 int reg = regnum - tdep->gpr_full_regnum;
2063 struct value *val;
2064
2065 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2066 if (!value_optimized_out (val))
2067 return value_cast (type, val);
2068 }
2069
2070 return allocate_optimized_out_value (type);
2071}
2072
2073static struct value *
2074s390_trad_frame_prev_register (struct frame_info *this_frame,
2075 struct trad_frame_saved_reg saved_regs[],
2076 int regnum)
2077{
2078 if (regnum < S390_NUM_REGS)
2079 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2080 else
2081 return s390_unwind_pseudo_register (this_frame, regnum);
2082}
2083
2084
a8c99f38
JB
2085/* Normal stack frames. */
2086
2087struct s390_unwind_cache {
2088
2089 CORE_ADDR func;
2090 CORE_ADDR frame_base;
2091 CORE_ADDR local_base;
2092
2093 struct trad_frame_saved_reg *saved_regs;
2094};
2095
a78f21af 2096static int
f089c433 2097s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2098 struct s390_unwind_cache *info)
5769d3cd 2099{
f089c433 2100 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
2101 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2102 struct s390_prologue_data data;
3fc46200
UW
2103 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2104 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
2105 int i;
2106 CORE_ADDR cfa;
a8c99f38
JB
2107 CORE_ADDR func;
2108 CORE_ADDR result;
2109 ULONGEST reg;
2110 CORE_ADDR prev_sp;
2111 int frame_pointer;
2112 int size;
edb3359d 2113 struct frame_info *next_frame;
a8c99f38
JB
2114
2115 /* Try to find the function start address. If we can't find it, we don't
2116 bother searching for it -- with modern compilers this would be mostly
2117 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2118 or else a valid backchain ... */
6d53bec8
AA
2119 if (!get_frame_func_if_available (this_frame, &info->func))
2120 {
2121 info->func = -1;
2122 return 0;
2123 }
2124 func = info->func;
5769d3cd 2125
a8c99f38
JB
2126 /* Try to analyze the prologue. */
2127 result = s390_analyze_prologue (gdbarch, func,
f089c433 2128 get_frame_pc (this_frame), &data);
a8c99f38 2129 if (!result)
5769d3cd 2130 return 0;
5769d3cd 2131
a8c99f38 2132 /* If this was successful, we should have found the instruction that
34201ae3 2133 sets the stack pointer register to the previous value of the stack
a8c99f38 2134 pointer minus the frame size. */
3fc46200 2135 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 2136 return 0;
a8c99f38 2137
34201ae3 2138 /* A frame size of zero at this point can mean either a real
a8c99f38 2139 frameless function, or else a failure to find the prologue.
34201ae3 2140 Perform some sanity checks to verify we really have a
a8c99f38
JB
2141 frameless function. */
2142 if (sp->k == 0)
5769d3cd 2143 {
34201ae3
UW
2144 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2145 size zero. This is only possible if the next frame is a sentinel
a8c99f38 2146 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
2147 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2148 needed, instead the code should simpliy rely on its
2149 analysis. */
edb3359d
DJ
2150 next_frame = get_next_frame (this_frame);
2151 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2152 next_frame = get_next_frame (next_frame);
2153 if (next_frame
f089c433 2154 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 2155 return 0;
5769d3cd 2156
a8c99f38
JB
2157 /* If we really have a frameless function, %r14 must be valid
2158 -- in particular, it must point to a different function. */
f089c433 2159 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
2160 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2161 if (get_pc_function_start (reg) == func)
5769d3cd 2162 {
a8c99f38
JB
2163 /* However, there is one case where it *is* valid for %r14
2164 to point to the same function -- if this is a recursive
2165 call, and we have stopped in the prologue *before* the
2166 stack frame was allocated.
2167
2168 Recognize this case by looking ahead a bit ... */
5769d3cd 2169
a8c99f38 2170 struct s390_prologue_data data2;
3fc46200 2171 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
2172
2173 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
2174 && pv_is_register (*sp, S390_SP_REGNUM)
2175 && sp->k != 0))
a8c99f38 2176 return 0;
5769d3cd 2177 }
5769d3cd 2178 }
5769d3cd
AC
2179
2180
a8c99f38
JB
2181 /* OK, we've found valid prologue data. */
2182 size = -sp->k;
5769d3cd 2183
a8c99f38
JB
2184 /* If the frame pointer originally also holds the same value
2185 as the stack pointer, we're probably using it. If it holds
2186 some other value -- even a constant offset -- it is most
2187 likely used as temp register. */
3fc46200 2188 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
2189 frame_pointer = S390_FRAME_REGNUM;
2190 else
2191 frame_pointer = S390_SP_REGNUM;
2192
34201ae3
UW
2193 /* If we've detected a function with stack frame, we'll still have to
2194 treat it as frameless if we're currently within the function epilog
c378eb4e 2195 code at a point where the frame pointer has already been restored.
a8c99f38 2196 This can only happen in an innermost frame. */
0e100dab
AC
2197 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2198 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
2199 next_frame = get_next_frame (this_frame);
2200 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2201 next_frame = get_next_frame (next_frame);
f089c433 2202 if (size > 0
edb3359d 2203 && (next_frame == NULL
f089c433 2204 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 2205 {
c9cf6e20 2206 /* See the comment in s390_stack_frame_destroyed_p on why this is
a8c99f38 2207 not completely reliable ... */
c9cf6e20 2208 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 2209 {
a8c99f38
JB
2210 memset (&data, 0, sizeof (data));
2211 size = 0;
2212 frame_pointer = S390_SP_REGNUM;
5769d3cd 2213 }
5769d3cd 2214 }
5769d3cd 2215
a8c99f38
JB
2216 /* Once we know the frame register and the frame size, we can unwind
2217 the current value of the frame register from the next frame, and
34201ae3 2218 add back the frame size to arrive that the previous frame's
a8c99f38 2219 stack pointer value. */
f089c433 2220 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 2221 cfa = prev_sp + 16*word_size + 32;
5769d3cd 2222
7803799a
UW
2223 /* Set up ABI call-saved/call-clobbered registers. */
2224 for (i = 0; i < S390_NUM_REGS; i++)
2225 if (!s390_register_call_saved (gdbarch, i))
2226 trad_frame_set_unknown (info->saved_regs, i);
2227
2228 /* CC is always call-clobbered. */
d6db1fab 2229 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 2230
121d8485
UW
2231 /* Record the addresses of all register spill slots the prologue parser
2232 has recognized. Consider only registers defined as call-saved by the
2233 ABI; for call-clobbered registers the parser may have recognized
2234 spurious stores. */
5769d3cd 2235
7803799a
UW
2236 for (i = 0; i < 16; i++)
2237 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2238 && data.gpr_slot[i] != 0)
121d8485 2239 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 2240
7803799a
UW
2241 for (i = 0; i < 16; i++)
2242 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2243 && data.fpr_slot[i] != 0)
2244 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
2245
2246 /* Function return will set PC to %r14. */
d6db1fab 2247 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2248
2249 /* In frameless functions, we unwind simply by moving the return
2250 address to the PC. However, if we actually stored to the
2251 save area, use that -- we might only think the function frameless
2252 because we're in the middle of the prologue ... */
2253 if (size == 0
d6db1fab 2254 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2255 {
d6db1fab 2256 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 2257 }
a8c99f38
JB
2258
2259 /* Another sanity check: unless this is a frameless function,
2260 we should have found spill slots for SP and PC.
2261 If not, we cannot unwind further -- this happens e.g. in
2262 libc's thread_start routine. */
2263 if (size > 0)
5769d3cd 2264 {
a8c99f38 2265 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 2266 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2267 prev_sp = -1;
5769d3cd 2268 }
a8c99f38
JB
2269
2270 /* We use the current value of the frame register as local_base,
2271 and the top of the register save area as frame_base. */
2272 if (prev_sp != -1)
2273 {
2274 info->frame_base = prev_sp + 16*word_size + 32;
2275 info->local_base = prev_sp - size;
2276 }
2277
a8c99f38 2278 return 1;
5769d3cd
AC
2279}
2280
a78f21af 2281static void
f089c433 2282s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2283 struct s390_unwind_cache *info)
5769d3cd 2284{
f089c433 2285 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2286 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2287 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2288 CORE_ADDR backchain;
2289 ULONGEST reg;
f2489477 2290 LONGEST sp, tmp;
7803799a
UW
2291 int i;
2292
2293 /* Set up ABI call-saved/call-clobbered registers. */
2294 for (i = 0; i < S390_NUM_REGS; i++)
2295 if (!s390_register_call_saved (gdbarch, i))
2296 trad_frame_set_unknown (info->saved_regs, i);
2297
2298 /* CC is always call-clobbered. */
d6db1fab 2299 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2300
2301 /* Get the backchain. */
f089c433 2302 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
f2489477
AA
2303 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2304 tmp = 0;
2305 backchain = (CORE_ADDR) tmp;
a8c99f38
JB
2306
2307 /* A zero backchain terminates the frame chain. As additional
2308 sanity check, let's verify that the spill slot for SP in the
2309 save area pointed to by the backchain in fact links back to
2310 the save area. */
2311 if (backchain != 0
e17a4113
UW
2312 && safe_read_memory_integer (backchain + 15*word_size,
2313 word_size, byte_order, &sp)
a8c99f38
JB
2314 && (CORE_ADDR)sp == backchain)
2315 {
2316 /* We don't know which registers were saved, but it will have
34201ae3
UW
2317 to be at least %r14 and %r15. This will allow us to continue
2318 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
2319 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2320 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2321
2322 /* Function return will set PC to %r14. */
d6db1fab 2323 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2324 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2325
2326 /* We use the current value of the frame register as local_base,
34201ae3 2327 and the top of the register save area as frame_base. */
a8c99f38
JB
2328 info->frame_base = backchain + 16*word_size + 32;
2329 info->local_base = reg;
2330 }
2331
f089c433 2332 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2333}
2334
a8c99f38 2335static struct s390_unwind_cache *
f089c433 2336s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2337 void **this_prologue_cache)
2338{
2339 struct s390_unwind_cache *info;
62261490 2340
a8c99f38 2341 if (*this_prologue_cache)
19ba03f4 2342 return (struct s390_unwind_cache *) *this_prologue_cache;
a8c99f38
JB
2343
2344 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2345 *this_prologue_cache = info;
f089c433 2346 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2347 info->func = -1;
2348 info->frame_base = -1;
2349 info->local_base = -1;
2350
492d29ea 2351 TRY
62261490
PA
2352 {
2353 /* Try to use prologue analysis to fill the unwind cache.
2354 If this fails, fall back to reading the stack backchain. */
2355 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2356 s390_backchain_frame_unwind_cache (this_frame, info);
2357 }
492d29ea 2358 CATCH (ex, RETURN_MASK_ERROR)
7556d4a4
PA
2359 {
2360 if (ex.error != NOT_AVAILABLE_ERROR)
2361 throw_exception (ex);
2362 }
492d29ea 2363 END_CATCH
a8c99f38
JB
2364
2365 return info;
2366}
5769d3cd 2367
a78f21af 2368static void
f089c433 2369s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2370 void **this_prologue_cache,
2371 struct frame_id *this_id)
5769d3cd 2372{
a8c99f38 2373 struct s390_unwind_cache *info
f089c433 2374 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2375
a8c99f38 2376 if (info->frame_base == -1)
6d53bec8
AA
2377 {
2378 if (info->func != -1)
2379 *this_id = frame_id_build_unavailable_stack (info->func);
2380 return;
2381 }
5769d3cd 2382
a8c99f38 2383 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2384}
2385
f089c433
UW
2386static struct value *
2387s390_frame_prev_register (struct frame_info *this_frame,
2388 void **this_prologue_cache, int regnum)
a8c99f38
JB
2389{
2390 struct s390_unwind_cache *info
f089c433 2391 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2392
d6db1fab 2393 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2394}
2395
2396static const struct frame_unwind s390_frame_unwind = {
2397 NORMAL_FRAME,
8fbca658 2398 default_frame_unwind_stop_reason,
a8c99f38 2399 s390_frame_this_id,
f089c433
UW
2400 s390_frame_prev_register,
2401 NULL,
2402 default_frame_sniffer
a8c99f38
JB
2403};
2404
5769d3cd 2405
8e645ae7
AC
2406/* Code stubs and their stack frames. For things like PLTs and NULL
2407 function calls (where there is no true frame and the return address
2408 is in the RETADDR register). */
a8c99f38 2409
8e645ae7
AC
2410struct s390_stub_unwind_cache
2411{
a8c99f38
JB
2412 CORE_ADDR frame_base;
2413 struct trad_frame_saved_reg *saved_regs;
2414};
2415
8e645ae7 2416static struct s390_stub_unwind_cache *
f089c433 2417s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2418 void **this_prologue_cache)
5769d3cd 2419{
f089c433 2420 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2421 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2422 struct s390_stub_unwind_cache *info;
a8c99f38 2423 ULONGEST reg;
5c3cf190 2424
a8c99f38 2425 if (*this_prologue_cache)
19ba03f4 2426 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
5c3cf190 2427
8e645ae7 2428 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2429 *this_prologue_cache = info;
f089c433 2430 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2431
2432 /* The return address is in register %r14. */
d6db1fab 2433 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2434
2435 /* Retrieve stack pointer and determine our frame base. */
f089c433 2436 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2437 info->frame_base = reg + 16*word_size + 32;
2438
2439 return info;
5769d3cd
AC
2440}
2441
a8c99f38 2442static void
f089c433 2443s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2444 void **this_prologue_cache,
2445 struct frame_id *this_id)
5769d3cd 2446{
8e645ae7 2447 struct s390_stub_unwind_cache *info
f089c433
UW
2448 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2449 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2450}
5769d3cd 2451
f089c433
UW
2452static struct value *
2453s390_stub_frame_prev_register (struct frame_info *this_frame,
2454 void **this_prologue_cache, int regnum)
8e645ae7
AC
2455{
2456 struct s390_stub_unwind_cache *info
f089c433 2457 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2458 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2459}
2460
f089c433
UW
2461static int
2462s390_stub_frame_sniffer (const struct frame_unwind *self,
2463 struct frame_info *this_frame,
2464 void **this_prologue_cache)
a8c99f38 2465{
93d42b30 2466 CORE_ADDR addr_in_block;
8e645ae7
AC
2467 bfd_byte insn[S390_MAX_INSTR_SIZE];
2468
2469 /* If the current PC points to non-readable memory, we assume we
2470 have trapped due to an invalid function pointer call. We handle
2471 the non-existing current function like a PLT stub. */
f089c433 2472 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2473 if (in_plt_section (addr_in_block)
f089c433
UW
2474 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2475 return 1;
2476 return 0;
a8c99f38 2477}
5769d3cd 2478
f089c433
UW
2479static const struct frame_unwind s390_stub_frame_unwind = {
2480 NORMAL_FRAME,
8fbca658 2481 default_frame_unwind_stop_reason,
f089c433
UW
2482 s390_stub_frame_this_id,
2483 s390_stub_frame_prev_register,
2484 NULL,
2485 s390_stub_frame_sniffer
2486};
2487
5769d3cd 2488
a8c99f38 2489/* Signal trampoline stack frames. */
5769d3cd 2490
a8c99f38
JB
2491struct s390_sigtramp_unwind_cache {
2492 CORE_ADDR frame_base;
2493 struct trad_frame_saved_reg *saved_regs;
2494};
5769d3cd 2495
a8c99f38 2496static struct s390_sigtramp_unwind_cache *
f089c433 2497s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2498 void **this_prologue_cache)
5769d3cd 2499{
f089c433 2500 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2501 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2502 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2503 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2504 struct s390_sigtramp_unwind_cache *info;
2505 ULONGEST this_sp, prev_sp;
7803799a 2506 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2507 int i;
2508
2509 if (*this_prologue_cache)
19ba03f4 2510 return (struct s390_sigtramp_unwind_cache *) *this_prologue_cache;
5769d3cd 2511
a8c99f38
JB
2512 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2513 *this_prologue_cache = info;
f089c433 2514 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2515
f089c433
UW
2516 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2517 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2518 next_cfa = this_sp + 16*word_size + 32;
2519
2520 /* New-style RT frame:
2521 retcode + alignment (8 bytes)
2522 siginfo (128 bytes)
c378eb4e 2523 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2524 if (next_ra == next_cfa)
2525 {
f0f63663 2526 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2527 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2528 upper GPR halves if present. */
2529 sigreg_high_off = 8;
a8c99f38
JB
2530 }
2531
2532 /* Old-style RT frame and all non-RT frames:
2533 old signal mask (8 bytes)
c378eb4e 2534 pointer to sigregs. */
5769d3cd
AC
2535 else
2536 {
e17a4113
UW
2537 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2538 word_size, byte_order);
7803799a
UW
2539 /* sigregs are followed by signo (4 bytes), then by the
2540 upper GPR halves if present. */
2541 sigreg_high_off = 4;
a8c99f38 2542 }
5769d3cd 2543
a8c99f38 2544 /* The sigregs structure looks like this:
34201ae3
UW
2545 long psw_mask;
2546 long psw_addr;
2547 long gprs[16];
2548 int acrs[16];
2549 int fpc;
2550 int __pad;
2551 double fprs[16]; */
5769d3cd 2552
7803799a
UW
2553 /* PSW mask and address. */
2554 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2555 sigreg_ptr += word_size;
7803799a 2556 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2557 sigreg_ptr += word_size;
2558
2559 /* Then the GPRs. */
2560 for (i = 0; i < 16; i++)
2561 {
2562 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2563 sigreg_ptr += word_size;
2564 }
2565
2566 /* Then the ACRs. */
2567 for (i = 0; i < 16; i++)
2568 {
2569 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2570 sigreg_ptr += 4;
5769d3cd 2571 }
5769d3cd 2572
a8c99f38
JB
2573 /* The floating-point control word. */
2574 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2575 sigreg_ptr += 8;
5769d3cd 2576
a8c99f38
JB
2577 /* And finally the FPRs. */
2578 for (i = 0; i < 16; i++)
2579 {
2580 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2581 sigreg_ptr += 8;
2582 }
2583
7803799a
UW
2584 /* If we have them, the GPR upper halves are appended at the end. */
2585 sigreg_ptr += sigreg_high_off;
2586 if (tdep->gpr_full_regnum != -1)
2587 for (i = 0; i < 16; i++)
2588 {
34201ae3 2589 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2590 sigreg_ptr += 4;
2591 }
2592
a8c99f38
JB
2593 /* Restore the previous frame's SP. */
2594 prev_sp = read_memory_unsigned_integer (
2595 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2596 word_size, byte_order);
5769d3cd 2597
a8c99f38
JB
2598 /* Determine our frame base. */
2599 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2600
a8c99f38 2601 return info;
5769d3cd
AC
2602}
2603
a8c99f38 2604static void
f089c433 2605s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2606 void **this_prologue_cache,
2607 struct frame_id *this_id)
5769d3cd 2608{
a8c99f38 2609 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2610 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2611 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2612}
2613
f089c433
UW
2614static struct value *
2615s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2616 void **this_prologue_cache, int regnum)
a8c99f38
JB
2617{
2618 struct s390_sigtramp_unwind_cache *info
f089c433 2619 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2620 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2621}
2622
f089c433
UW
2623static int
2624s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2625 struct frame_info *this_frame,
2626 void **this_prologue_cache)
5769d3cd 2627{
f089c433 2628 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2629 bfd_byte sigreturn[2];
4c8287ac 2630
8defab1a 2631 if (target_read_memory (pc, sigreturn, 2))
f089c433 2632 return 0;
4c8287ac 2633
237b092b 2634 if (sigreturn[0] != op_svc)
f089c433 2635 return 0;
5769d3cd 2636
a8c99f38
JB
2637 if (sigreturn[1] != 119 /* sigreturn */
2638 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2639 return 0;
34201ae3 2640
f089c433 2641 return 1;
5769d3cd
AC
2642}
2643
f089c433
UW
2644static const struct frame_unwind s390_sigtramp_frame_unwind = {
2645 SIGTRAMP_FRAME,
8fbca658 2646 default_frame_unwind_stop_reason,
f089c433
UW
2647 s390_sigtramp_frame_this_id,
2648 s390_sigtramp_frame_prev_register,
2649 NULL,
2650 s390_sigtramp_frame_sniffer
2651};
2652
237b092b
AA
2653/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2654 upon error. */
2655
2656static LONGEST
2657s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2658 ptid_t ptid)
2659{
2660 struct regcache *regs = get_thread_regcache (ptid);
2661 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2662 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2663 ULONGEST pc;
2664 ULONGEST svc_number = -1;
2665 unsigned opcode;
2666
2667 /* Assume that the PC points after the 2-byte SVC instruction. We
2668 don't currently support SVC via EXECUTE. */
2669 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2670 pc -= 2;
2671 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2672 if (opcode != op_svc)
2673 return -1;
2674
2675 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2676 byte_order);
2677 if (svc_number == 0)
2678 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2679
2680 return svc_number;
2681}
2682
566c56c9
MK
2683/* Process record-replay */
2684
2685static struct linux_record_tdep s390_linux_record_tdep;
2686static struct linux_record_tdep s390x_linux_record_tdep;
2687
2688/* Record all registers but PC register for process-record. */
2689
2690static int
2691s390_all_but_pc_registers_record (struct regcache *regcache)
2692{
2693 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2694 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2695 int i;
2696
2697 for (i = 0; i < 16; i++)
2698 {
2699 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2700 return -1;
2701 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
2702 return -1;
2703 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2704 return -1;
2705 if (tdep->gpr_full_regnum != -1)
2706 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2707 return -1;
2708 if (tdep->v0_full_regnum != -1)
2709 {
2710 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2711 return -1;
2712 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i))
2713 return -1;
2714 }
2715 }
2716 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2717 return -1;
2718 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2719 return -1;
2720
2721 return 0;
2722}
2723
2724static enum gdb_syscall
2725s390_canonicalize_syscall (int syscall, enum s390_abi_kind abi)
2726{
2727 switch (syscall)
2728 {
2729 /* s390 syscall numbers < 222 are mostly the same as x86, so just list
2730 the exceptions. */
2731 case 0:
2732 return gdb_sys_no_syscall;
2733 case 7:
2734 return gdb_sys_restart_syscall;
2735 /* These syscalls work only on 31-bit. */
2736 case 13: /* time */
2737 case 16: /* lchown[16] */
2738 case 23: /* setuid[16] */
2739 case 24: /* getuid[16] */
2740 case 25: /* stime */
2741 case 46: /* setgid[16] */
2742 case 47: /* getgid[16] */
2743 case 49: /* seteuid[16] */
2744 case 50: /* getegid[16] */
2745 case 70: /* setreuid[16] */
2746 case 71: /* setregid[16] */
2747 case 76: /* [old_]getrlimit */
2748 case 80: /* getgroups[16] */
2749 case 81: /* setgroups[16] */
2750 case 95: /* fchown[16] */
2751 case 101: /* ioperm */
2752 case 138: /* setfsuid[16] */
2753 case 139: /* setfsgid[16] */
2754 case 140: /* _llseek */
2755 case 164: /* setresuid[16] */
2756 case 165: /* getresuid[16] */
2757 case 170: /* setresgid[16] */
2758 case 171: /* getresgid[16] */
2759 case 182: /* chown[16] */
2760 case 192: /* mmap2 */
2761 case 193: /* truncate64 */
2762 case 194: /* ftruncate64 */
2763 case 195: /* stat64 */
2764 case 196: /* lstat64 */
2765 case 197: /* fstat64 */
2766 case 221: /* fcntl64 */
2767 if (abi == ABI_LINUX_S390)
4d193179 2768 return (enum gdb_syscall) syscall;
566c56c9
MK
2769 return gdb_sys_no_syscall;
2770 /* These syscalls don't exist on s390. */
2771 case 17: /* break */
2772 case 18: /* oldstat */
2773 case 28: /* oldfstat */
2774 case 31: /* stty */
2775 case 32: /* gtty */
2776 case 35: /* ftime */
2777 case 44: /* prof */
2778 case 53: /* lock */
2779 case 56: /* mpx */
2780 case 58: /* ulimit */
2781 case 59: /* oldolduname */
2782 case 68: /* sgetmask */
2783 case 69: /* ssetmask */
2784 case 82: /* [old_]select */
2785 case 84: /* oldlstat */
2786 case 98: /* profil */
2787 case 109: /* olduname */
2788 case 113: /* vm86old */
2789 case 123: /* modify_ldt */
2790 case 166: /* vm86 */
2791 return gdb_sys_no_syscall;
2792 case 110:
2793 return gdb_sys_lookup_dcookie;
2794 /* Here come the differences. */
2795 case 222:
2796 return gdb_sys_readahead;
2797 case 223:
2798 if (abi == ABI_LINUX_S390)
2799 return gdb_sys_sendfile64;
2800 return gdb_sys_no_syscall;
2801 /* 224-235 handled below */
2802 case 236:
2803 return gdb_sys_gettid;
2804 case 237:
2805 return gdb_sys_tkill;
2806 case 238:
2807 return gdb_sys_futex;
2808 case 239:
2809 return gdb_sys_sched_setaffinity;
2810 case 240:
2811 return gdb_sys_sched_getaffinity;
2812 case 241:
2813 return gdb_sys_tgkill;
2814 /* 242 reserved */
2815 case 243:
2816 return gdb_sys_io_setup;
2817 case 244:
2818 return gdb_sys_io_destroy;
2819 case 245:
2820 return gdb_sys_io_getevents;
2821 case 246:
2822 return gdb_sys_io_submit;
2823 case 247:
2824 return gdb_sys_io_cancel;
2825 case 248:
2826 return gdb_sys_exit_group;
2827 case 249:
2828 return gdb_sys_epoll_create;
2829 case 250:
2830 return gdb_sys_epoll_ctl;
2831 case 251:
2832 return gdb_sys_epoll_wait;
2833 case 252:
2834 return gdb_sys_set_tid_address;
2835 case 253:
2836 return gdb_sys_fadvise64;
2837 /* 254-262 handled below */
2838 /* 263 reserved */
2839 case 264:
2840 if (abi == ABI_LINUX_S390)
2841 return gdb_sys_fadvise64_64;
2842 return gdb_sys_no_syscall;
2843 case 265:
2844 return gdb_sys_statfs64;
2845 case 266:
2846 return gdb_sys_fstatfs64;
2847 case 267:
2848 return gdb_sys_remap_file_pages;
2849 /* 268-270 reserved */
2850 /* 271-277 handled below */
2851 case 278:
2852 return gdb_sys_add_key;
2853 case 279:
2854 return gdb_sys_request_key;
2855 case 280:
2856 return gdb_sys_keyctl;
2857 case 281:
2858 return gdb_sys_waitid;
2859 /* 282-312 handled below */
2860 case 293:
2861 if (abi == ABI_LINUX_S390)
2862 return gdb_sys_fstatat64;
2863 return gdb_sys_newfstatat;
2864 /* 313+ not yet supported */
2865 default:
4d193179
SM
2866 {
2867 int ret;
2868
2869 /* Most "old" syscalls copied from i386. */
2870 if (syscall <= 221)
2871 ret = syscall;
2872 /* xattr syscalls. */
2873 else if (syscall >= 224 && syscall <= 235)
2874 ret = syscall + 2;
2875 /* timer syscalls. */
2876 else if (syscall >= 254 && syscall <= 262)
2877 ret = syscall + 5;
2878 /* mq_* and kexec_load */
2879 else if (syscall >= 271 && syscall <= 277)
2880 ret = syscall + 6;
2881 /* ioprio_set .. epoll_pwait */
2882 else if (syscall >= 282 && syscall <= 312)
2883 ret = syscall + 7;
2884 else
2885 ret = gdb_sys_no_syscall;
2886
2887 return (enum gdb_syscall) ret;
2888 }
566c56c9
MK
2889 }
2890}
2891
2892static int
2893s390_linux_syscall_record (struct regcache *regcache, LONGEST syscall_native)
2894{
2895 struct gdbarch *gdbarch = get_regcache_arch (regcache);
2896 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2897 int ret;
2898 enum gdb_syscall syscall_gdb;
2899
2900 /* On s390, syscall number can be passed either as immediate field of svc
2901 instruction, or in %r1 (with svc 0). */
2902 if (syscall_native == 0)
2903 regcache_raw_read_signed (regcache, S390_R1_REGNUM, &syscall_native);
2904
2905 syscall_gdb = s390_canonicalize_syscall (syscall_native, tdep->abi);
2906
2907 if (syscall_gdb < 0)
2908 {
2909 printf_unfiltered (_("Process record and replay target doesn't "
2910 "support syscall number %s\n"),
2911 plongest (syscall_native));
2912 return -1;
2913 }
2914
2915 if (syscall_gdb == gdb_sys_sigreturn
2916 || syscall_gdb == gdb_sys_rt_sigreturn)
2917 {
2918 if (s390_all_but_pc_registers_record (regcache))
2919 return -1;
2920 return 0;
2921 }
2922
2923 if (tdep->abi == ABI_LINUX_ZSERIES)
2924 ret = record_linux_system_call (syscall_gdb, regcache,
2925 &s390x_linux_record_tdep);
2926 else
2927 ret = record_linux_system_call (syscall_gdb, regcache,
2928 &s390_linux_record_tdep);
2929
2930 if (ret)
2931 return ret;
2932
2933 /* Record the return value of the system call. */
2934 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
2935 return -1;
2936
2937 return 0;
2938}
2939
2940static int
2941s390_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache,
2942 enum gdb_signal signal)
2943{
2944 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2945 /* There are two kinds of signal frames on s390. rt_sigframe is always
2946 the larger one, so don't even bother with sigframe. */
2947 const int sizeof_rt_sigframe = (tdep->abi == ABI_LINUX_ZSERIES ?
2948 160 + 8 + 128 + 1024 : 96 + 8 + 128 + 1000);
2949 ULONGEST sp;
2950 int i;
2951
2952 for (i = 0; i < 16; i++)
2953 {
2954 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2955 return -1;
2956 if (tdep->gpr_full_regnum != -1)
2957 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2958 return -1;
2959 }
2960 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
2961 return -1;
2962 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2963 return -1;
2964
2965 /* Record the change in the stack.
2966 frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */
2967 regcache_raw_read_unsigned (regcache, S390_SP_REGNUM, &sp);
2968 sp -= sizeof_rt_sigframe;
2969
2970 if (record_full_arch_list_add_mem (sp, sizeof_rt_sigframe))
2971 return -1;
2972
2973 if (record_full_arch_list_add_end ())
2974 return -1;
2975
2976 return 0;
2977}
4c8287ac 2978
a8c99f38
JB
2979/* Frame base handling. */
2980
2981static CORE_ADDR
f089c433 2982s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2983{
a8c99f38 2984 struct s390_unwind_cache *info
f089c433 2985 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2986 return info->frame_base;
2987}
2988
2989static CORE_ADDR
f089c433 2990s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2991{
2992 struct s390_unwind_cache *info
f089c433 2993 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2994 return info->local_base;
2995}
2996
2997static const struct frame_base s390_frame_base = {
2998 &s390_frame_unwind,
2999 s390_frame_base_address,
3000 s390_local_base_address,
3001 s390_local_base_address
3002};
3003
3004static CORE_ADDR
3005s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
3006{
7803799a 3007 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 3008 ULONGEST pc;
7803799a 3009 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
3010 return gdbarch_addr_bits_remove (gdbarch, pc);
3011}
3012
3013static CORE_ADDR
3014s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
3015{
3016 ULONGEST sp;
3017 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
3018 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
3019}
3020
3021
a431654a
AC
3022/* DWARF-2 frame support. */
3023
7803799a
UW
3024static struct value *
3025s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
3026 int regnum)
3027{
d6db1fab 3028 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
3029}
3030
a431654a
AC
3031static void
3032s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 3033 struct dwarf2_frame_state_reg *reg,
4a4e5149 3034 struct frame_info *this_frame)
a431654a 3035{
d6db1fab
UW
3036 /* The condition code (and thus PSW mask) is call-clobbered. */
3037 if (regnum == S390_PSWM_REGNUM)
3038 reg->how = DWARF2_FRAME_REG_UNDEFINED;
3039
3040 /* The PSW address unwinds to the return address. */
3041 else if (regnum == S390_PSWA_REGNUM)
3042 reg->how = DWARF2_FRAME_REG_RA;
3043
7803799a
UW
3044 /* Fixed registers are call-saved or call-clobbered
3045 depending on the ABI in use. */
d6db1fab 3046 else if (regnum < S390_NUM_REGS)
a431654a 3047 {
7803799a 3048 if (s390_register_call_saved (gdbarch, regnum))
a431654a 3049 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 3050 else
a431654a 3051 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 3052 }
a431654a 3053
d6db1fab
UW
3054 /* We install a special function to unwind pseudos. */
3055 else
7803799a
UW
3056 {
3057 reg->how = DWARF2_FRAME_REG_FN;
3058 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
3059 }
3060}
3061
3062
b0cf273e
JB
3063/* Dummy function calls. */
3064
80f75320
AA
3065/* Unwrap any single-field structs in TYPE and return the effective
3066 "inner" type. E.g., yield "float" for all these cases:
20a940cc 3067
80f75320
AA
3068 float x;
3069 struct { float x };
3070 struct { struct { float x; } x; };
417c80f9
AA
3071 struct { struct { struct { float x; } x; } x; };
3072
3073 However, if an inner type is smaller than MIN_SIZE, abort the
3074 unwrapping. */
20a940cc 3075
80f75320 3076static struct type *
417c80f9 3077s390_effective_inner_type (struct type *type, unsigned int min_size)
20a940cc 3078{
80f75320
AA
3079 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
3080 && TYPE_NFIELDS (type) == 1)
417c80f9
AA
3081 {
3082 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
3083
3084 if (TYPE_LENGTH (inner) < min_size)
3085 break;
3086 type = inner;
3087 }
3088
80f75320 3089 return type;
20a940cc
JB
3090}
3091
80f75320
AA
3092/* Return non-zero if TYPE should be passed like "float" or
3093 "double". */
20a940cc 3094
20a940cc 3095static int
80f75320 3096s390_function_arg_float (struct type *type)
20a940cc 3097{
80f75320
AA
3098 /* Note that long double as well as complex types are intentionally
3099 excluded. */
3100 if (TYPE_LENGTH (type) > 8)
3101 return 0;
20a940cc 3102
80f75320
AA
3103 /* A struct containing just a float or double is passed like a float
3104 or double. */
417c80f9 3105 type = s390_effective_inner_type (type, 0);
20a940cc 3106
20a940cc 3107 return (TYPE_CODE (type) == TYPE_CODE_FLT
80f75320 3108 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
20a940cc
JB
3109}
3110
417c80f9
AA
3111/* Return non-zero if TYPE should be passed like a vector. */
3112
3113static int
3114s390_function_arg_vector (struct type *type)
3115{
3116 if (TYPE_LENGTH (type) > 16)
3117 return 0;
3118
3119 /* Structs containing just a vector are passed like a vector. */
3120 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
3121
3122 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
3123}
3124
6dbc9c04 3125/* Determine whether N is a power of two. */
20a940cc 3126
78f8b424 3127static int
b0cf273e 3128is_power_of_two (unsigned int n)
78f8b424 3129{
6dbc9c04 3130 return n && ((n & (n - 1)) == 0);
78f8b424
JB
3131}
3132
80f75320 3133/* For an argument whose type is TYPE and which is not passed like a
417c80f9
AA
3134 float or vector, return non-zero if it should be passed like "int"
3135 or "long long". */
4d819d0e 3136
78f8b424 3137static int
b0cf273e 3138s390_function_arg_integer (struct type *type)
78f8b424 3139{
80f75320
AA
3140 enum type_code code = TYPE_CODE (type);
3141
354ecfd5 3142 if (TYPE_LENGTH (type) > 8)
b0cf273e 3143 return 0;
78f8b424 3144
80f75320
AA
3145 if (code == TYPE_CODE_INT
3146 || code == TYPE_CODE_ENUM
3147 || code == TYPE_CODE_RANGE
3148 || code == TYPE_CODE_CHAR
3149 || code == TYPE_CODE_BOOL
3150 || code == TYPE_CODE_PTR
3151 || code == TYPE_CODE_REF)
3152 return 1;
3153
3154 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
3155 && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
3156}
3157
80f75320
AA
3158/* Argument passing state: Internal data structure passed to helper
3159 routines of s390_push_dummy_call. */
78f8b424 3160
80f75320
AA
3161struct s390_arg_state
3162 {
3163 /* Register cache, or NULL, if we are in "preparation mode". */
3164 struct regcache *regcache;
417c80f9
AA
3165 /* Next available general/floating-point/vector register for
3166 argument passing. */
3167 int gr, fr, vr;
80f75320
AA
3168 /* Current pointer to copy area (grows downwards). */
3169 CORE_ADDR copy;
3170 /* Current pointer to parameter area (grows upwards). */
3171 CORE_ADDR argp;
3172 };
78f8b424 3173
80f75320
AA
3174/* Prepare one argument ARG for a dummy call and update the argument
3175 passing state AS accordingly. If the regcache field in AS is set,
3176 operate in "write mode" and write ARG into the inferior. Otherwise
3177 run "preparation mode" and skip all updates to the inferior. */
78f8b424 3178
80f75320
AA
3179static void
3180s390_handle_arg (struct s390_arg_state *as, struct value *arg,
3181 struct gdbarch_tdep *tdep, int word_size,
417c80f9 3182 enum bfd_endian byte_order, int is_unnamed)
78f8b424 3183{
80f75320
AA
3184 struct type *type = check_typedef (value_type (arg));
3185 unsigned int length = TYPE_LENGTH (type);
3186 int write_mode = as->regcache != NULL;
78f8b424 3187
80f75320
AA
3188 if (s390_function_arg_float (type))
3189 {
3190 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
3191 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
3192 6. */
3193 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
3194 {
3195 /* When we store a single-precision value in an FP register,
3196 it occupies the leftmost bits. */
3197 if (write_mode)
3198 regcache_cooked_write_part (as->regcache,
3199 S390_F0_REGNUM + as->fr,
3200 0, length,
3201 value_contents (arg));
3202 as->fr += 2;
3203 }
3204 else
3205 {
3206 /* When we store a single-precision value in a stack slot,
3207 it occupies the rightmost bits. */
3208 as->argp = align_up (as->argp + length, word_size);
3209 if (write_mode)
3210 write_memory (as->argp - length, value_contents (arg),
3211 length);
3212 }
3213 }
417c80f9
AA
3214 else if (tdep->vector_abi == S390_VECTOR_ABI_128
3215 && s390_function_arg_vector (type))
3216 {
3217 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
3218
3219 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
3220 {
3221 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
3222
3223 if (write_mode)
3224 regcache_cooked_write_part (as->regcache, regnum,
3225 0, length,
3226 value_contents (arg));
3227 as->vr++;
3228 }
3229 else
3230 {
3231 if (write_mode)
3232 write_memory (as->argp, value_contents (arg), length);
3233 as->argp = align_up (as->argp + length, word_size);
3234 }
3235 }
80f75320 3236 else if (s390_function_arg_integer (type) && length <= word_size)
78f8b424 3237 {
decf8d9a
JK
3238 /* Initialize it just to avoid a GCC false warning. */
3239 ULONGEST val = 0;
78f8b424 3240
80f75320 3241 if (write_mode)
34201ae3 3242 {
80f75320
AA
3243 /* Place value in least significant bits of the register or
3244 memory word and sign- or zero-extend to full word size.
3245 This also applies to a struct or union. */
3246 val = TYPE_UNSIGNED (type)
3247 ? extract_unsigned_integer (value_contents (arg),
3248 length, byte_order)
3249 : extract_signed_integer (value_contents (arg),
3250 length, byte_order);
3251 }
78f8b424 3252
80f75320
AA
3253 if (as->gr <= 6)
3254 {
3255 if (write_mode)
3256 regcache_cooked_write_unsigned (as->regcache,
3257 S390_R0_REGNUM + as->gr,
3258 val);
3259 as->gr++;
3260 }
3261 else
3262 {
3263 if (write_mode)
3264 write_memory_unsigned_integer (as->argp, word_size,
3265 byte_order, val);
3266 as->argp += word_size;
34201ae3 3267 }
78f8b424 3268 }
80f75320
AA
3269 else if (s390_function_arg_integer (type) && length == 8)
3270 {
3271 if (as->gr <= 5)
3272 {
3273 if (write_mode)
3274 {
3275 regcache_cooked_write (as->regcache,
3276 S390_R0_REGNUM + as->gr,
3277 value_contents (arg));
3278 regcache_cooked_write (as->regcache,
3279 S390_R0_REGNUM + as->gr + 1,
3280 value_contents (arg) + word_size);
3281 }
3282 as->gr += 2;
3283 }
3284 else
3285 {
3286 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
3287 in it, then don't go back and use it again later. */
3288 as->gr = 7;
78f8b424 3289
80f75320
AA
3290 if (write_mode)
3291 write_memory (as->argp, value_contents (arg), length);
3292 as->argp += length;
3293 }
3294 }
3295 else
3296 {
3297 /* This argument type is never passed in registers. Place the
3298 value in the copy area and pass a pointer to it. Use 8-byte
3299 alignment as a conservative assumption. */
3300 as->copy = align_down (as->copy - length, 8);
3301 if (write_mode)
3302 write_memory (as->copy, value_contents (arg), length);
3303
3304 if (as->gr <= 6)
3305 {
3306 if (write_mode)
3307 regcache_cooked_write_unsigned (as->regcache,
3308 S390_R0_REGNUM + as->gr,
3309 as->copy);
3310 as->gr++;
3311 }
3312 else
3313 {
3314 if (write_mode)
3315 write_memory_unsigned_integer (as->argp, word_size,
3316 byte_order, as->copy);
3317 as->argp += word_size;
3318 }
3319 }
78f8b424
JB
3320}
3321
78f8b424 3322/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
3323 place to be passed to a function, as specified by the "GNU/Linux
3324 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
3325
3326 SP is the current stack pointer. We must put arguments, links,
3327 padding, etc. whereever they belong, and return the new stack
3328 pointer value.
34201ae3 3329
78f8b424
JB
3330 If STRUCT_RETURN is non-zero, then the function we're calling is
3331 going to return a structure by value; STRUCT_ADDR is the address of
3332 a block we've allocated for it on the stack.
3333
3334 Our caller has taken care of any type promotions needed to satisfy
3335 prototypes or the old K&R argument-passing rules. */
80f75320 3336
a78f21af 3337static CORE_ADDR
7d9b040b 3338s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
3339 struct regcache *regcache, CORE_ADDR bp_addr,
3340 int nargs, struct value **args, CORE_ADDR sp,
3341 int struct_return, CORE_ADDR struct_addr)
5769d3cd 3342{
b0cf273e
JB
3343 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3344 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 3345 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 3346 int i;
80f75320
AA
3347 struct s390_arg_state arg_state, arg_prep;
3348 CORE_ADDR param_area_start, new_sp;
417c80f9
AA
3349 struct type *ftype = check_typedef (value_type (function));
3350
3351 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
3352 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
5769d3cd 3353
80f75320
AA
3354 arg_prep.copy = sp;
3355 arg_prep.gr = struct_return ? 3 : 2;
3356 arg_prep.fr = 0;
417c80f9 3357 arg_prep.vr = 0;
80f75320
AA
3358 arg_prep.argp = 0;
3359 arg_prep.regcache = NULL;
5769d3cd 3360
80f75320
AA
3361 /* Initialize arg_state for "preparation mode". */
3362 arg_state = arg_prep;
5769d3cd 3363
80f75320
AA
3364 /* Update arg_state.copy with the start of the reference-to-copy area
3365 and arg_state.argp with the size of the parameter area. */
3366 for (i = 0; i < nargs; i++)
417c80f9
AA
3367 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3368 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3369
80f75320 3370 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
78f8b424 3371
c0cc4c83 3372 /* Allocate the standard frame areas: the register save area, the
80f75320
AA
3373 word reserved for the compiler, and the back chain pointer. */
3374 new_sp = param_area_start - (16 * word_size + 32);
3375
3376 /* Now we have the final stack pointer. Make sure we didn't
3377 underflow; on 31-bit, this would result in addresses with the
3378 high bit set, which causes confusion elsewhere. Note that if we
3379 error out here, stack and registers remain untouched. */
3380 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
c0cc4c83
UW
3381 error (_("Stack overflow"));
3382
80f75320
AA
3383 /* Pass the structure return address in general register 2. */
3384 if (struct_return)
3385 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
c0cc4c83 3386
80f75320
AA
3387 /* Initialize arg_state for "write mode". */
3388 arg_state = arg_prep;
3389 arg_state.argp = param_area_start;
3390 arg_state.regcache = regcache;
78f8b424 3391
80f75320
AA
3392 /* Write all parameters. */
3393 for (i = 0; i < nargs; i++)
417c80f9
AA
3394 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3395 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3396
8de7d199
UW
3397 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
3398 if (word_size == 4)
3399 {
3400 ULONGEST pswa;
3401 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3402 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
3403 }
b0cf273e 3404 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 3405
b0cf273e 3406 /* Store updated stack pointer. */
80f75320 3407 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
78f8b424 3408
a8c99f38 3409 /* We need to return the 'stack part' of the frame ID,
121d8485 3410 which is actually the top of the register save area. */
80f75320 3411 return param_area_start;
5769d3cd
AC
3412}
3413
f089c433 3414/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
3415 dummy frame. The frame ID's base needs to match the TOS value
3416 returned by push_dummy_call, and the PC match the dummy frame's
3417 breakpoint. */
3418static struct frame_id
f089c433 3419s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 3420{
a8c99f38 3421 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
3422 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
3423 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 3424
121d8485 3425 return frame_id_build (sp + 16*word_size + 32,
34201ae3 3426 get_frame_pc (this_frame));
b0cf273e 3427}
c8f9d51c 3428
4074e13c
JB
3429static CORE_ADDR
3430s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
3431{
3432 /* Both the 32- and 64-bit ABI's say that the stack pointer should
3433 always be aligned on an eight-byte boundary. */
3434 return (addr & -8);
3435}
3436
3437
4e65a17e
AA
3438/* Helper for s390_return_value: Set or retrieve a function return
3439 value if it resides in a register. */
b0cf273e 3440
4e65a17e
AA
3441static void
3442s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
3443 struct regcache *regcache,
3444 gdb_byte *out, const gdb_byte *in)
c8f9d51c 3445{
4e65a17e
AA
3446 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3447 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
3448 int length = TYPE_LENGTH (type);
3449 int code = TYPE_CODE (type);
b0cf273e 3450
4e65a17e 3451 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
b0cf273e 3452 {
4e65a17e
AA
3453 /* Float-like value: left-aligned in f0. */
3454 if (in != NULL)
3455 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
3456 0, length, in);
3457 else
3458 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
3459 0, length, out);
3460 }
417c80f9
AA
3461 else if (code == TYPE_CODE_ARRAY)
3462 {
3463 /* Vector: left-aligned in v24. */
3464 if (in != NULL)
3465 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
3466 0, length, in);
3467 else
3468 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
3469 0, length, out);
3470 }
4e65a17e
AA
3471 else if (length <= word_size)
3472 {
3473 /* Integer: zero- or sign-extended in r2. */
3474 if (out != NULL)
3475 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
3476 word_size - length, length, out);
3477 else if (TYPE_UNSIGNED (type))
3478 regcache_cooked_write_unsigned
3479 (regcache, S390_R2_REGNUM,
3480 extract_unsigned_integer (in, length, byte_order));
3481 else
3482 regcache_cooked_write_signed
3483 (regcache, S390_R2_REGNUM,
3484 extract_signed_integer (in, length, byte_order));
b0cf273e 3485 }
4e65a17e
AA
3486 else if (length == 2 * word_size)
3487 {
3488 /* Double word: in r2 and r3. */
3489 if (in != NULL)
3490 {
3491 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
3492 regcache_cooked_write (regcache, S390_R3_REGNUM,
3493 in + word_size);
3494 }
3495 else
3496 {
3497 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
3498 regcache_cooked_read (regcache, S390_R3_REGNUM,
3499 out + word_size);
3500 }
3501 }
3502 else
3503 internal_error (__FILE__, __LINE__, _("invalid return type"));
c8f9d51c
JB
3504}
3505
4e65a17e
AA
3506
3507/* Implement the 'return_value' gdbarch method. */
3508
b0cf273e 3509static enum return_value_convention
6a3a010b 3510s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
3511 struct type *type, struct regcache *regcache,
3512 gdb_byte *out, const gdb_byte *in)
5769d3cd 3513{
56b9d9ac 3514 enum return_value_convention rvc;
56b9d9ac
UW
3515
3516 type = check_typedef (type);
56b9d9ac 3517
4e65a17e 3518 switch (TYPE_CODE (type))
b0cf273e 3519 {
4e65a17e
AA
3520 case TYPE_CODE_STRUCT:
3521 case TYPE_CODE_UNION:
4e65a17e
AA
3522 case TYPE_CODE_COMPLEX:
3523 rvc = RETURN_VALUE_STRUCT_CONVENTION;
3524 break;
417c80f9
AA
3525 case TYPE_CODE_ARRAY:
3526 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
3527 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
3528 ? RETURN_VALUE_REGISTER_CONVENTION
3529 : RETURN_VALUE_STRUCT_CONVENTION;
3530 break;
4e65a17e
AA
3531 default:
3532 rvc = TYPE_LENGTH (type) <= 8
3533 ? RETURN_VALUE_REGISTER_CONVENTION
3534 : RETURN_VALUE_STRUCT_CONVENTION;
b0cf273e 3535 }
5769d3cd 3536
4e65a17e
AA
3537 if (in != NULL || out != NULL)
3538 {
3539 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
3540 s390_register_return_value (gdbarch, type, regcache, out, in);
3541 else if (in != NULL)
3542 error (_("Cannot set function return value."));
3543 else
3544 error (_("Function return value unknown."));
b0cf273e
JB
3545 }
3546
3547 return rvc;
3548}
5769d3cd
AC
3549
3550
a8c99f38 3551/* Breakpoints. */
04180708 3552constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
a8c99f38 3553
04180708 3554typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
5769d3cd 3555
a8c99f38 3556/* Address handling. */
5769d3cd
AC
3557
3558static CORE_ADDR
24568a2c 3559s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 3560{
a8c99f38 3561 return addr & 0x7fffffff;
5769d3cd
AC
3562}
3563
ffc65945
KB
3564static int
3565s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
3566{
3567 if (byte_size == 4)
119ac181 3568 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3569 else
3570 return 0;
3571}
3572
3573static const char *
3574s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
3575{
119ac181 3576 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
3577 return "mode32";
3578 else
3579 return NULL;
3580}
3581
a78f21af 3582static int
c378eb4e
MS
3583s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
3584 const char *name,
ffc65945
KB
3585 int *type_flags_ptr)
3586{
3587 if (strcmp (name, "mode32") == 0)
3588 {
119ac181 3589 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3590 return 1;
3591 }
3592 else
3593 return 0;
3594}
3595
60abeae4
AA
3596/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
3597 "-mcmodel=large". */
a2658feb
JK
3598
3599static char *
3600s390_gcc_target_options (struct gdbarch *gdbarch)
3601{
60abeae4
AA
3602 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
3603}
3604
3605/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
3606 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
3607 always "s390". Note that an s390x compiler supports "-m31" as
3608 well. */
3609
3610static const char *
3611s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
3612{
3613 return "s390x?";
a2658feb
JK
3614}
3615
55aa24fb
SDJ
3616/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3617 gdbarch.h. */
3618
3619static int
3620s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3621{
3622 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3623 or indirection. */
3624 || *s == '%' /* Register access. */
3625 || isdigit (*s)); /* Literal number. */
3626}
3627
566c56c9
MK
3628/* Process record and replay helpers. */
3629
3630/* Takes the intermediate sum of address calculations and masks off upper
3631 bits according to current addressing mode. */
3632
3633static CORE_ADDR
3634s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
3635 CORE_ADDR val) {
3636 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3637 ULONGEST pswm, pswa;
3638 int am;
3639 if (tdep->abi == ABI_LINUX_S390)
3640 {
3641 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3642 am = pswa >> 31 & 1;
3643 }
3644 else
3645 {
3646 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
3647 am = pswm >> 31 & 3;
3648 }
3649 switch (am)
3650 {
3651 case 0:
3652 return val & 0xffffff;
3653 case 1:
3654 return val & 0x7fffffff;
3655 case 3:
3656 return val;
3657 default:
3658 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
3659 return 0;
3660 }
3661}
3662
3663/* Calculates memory address using pre-calculated index, raw instruction word
3664 with b and d/dl fields, and raw instruction byte with dh field. Index and
3665 dh should be set to 0 if unused. */
3666
3667static CORE_ADDR
3668s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
3669 ULONGEST x, uint16_t bd, int8_t dh)
3670{
3671 uint8_t rb = bd >> 12 & 0xf;
3672 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
3673 ULONGEST b;
3674 CORE_ADDR res = d + x;
3675 if (rb)
3676 {
3677 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
3678 res += b;
3679 }
3680 return s390_record_address_mask (gdbarch, regcache, res);
3681}
3682
3683/* Calculates memory address using raw x, b + d/dl, dh fields from
3684 instruction. rx and dh should be set to 0 if unused. */
3685
3686static CORE_ADDR
3687s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
3688 uint8_t rx, uint16_t bd, int8_t dh)
3689{
3690 ULONGEST x = 0;
3691 if (rx)
3692 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
3693 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3694}
3695
3696/* Calculates memory address for VSCE[GF] instructions. */
3697
3698static int
3699s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
3700 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
3701 int8_t dh, CORE_ADDR *res)
3702{
3703 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3704 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3705 ULONGEST x;
3706 gdb_byte buf[16];
3707 if (tdep->v0_full_regnum == -1 || el * es >= 16)
3708 return -1;
3709 if (vx < 16)
3710 regcache_cooked_read (regcache, tdep->v0_full_regnum + vx, buf);
3711 else
3712 regcache_raw_read (regcache, S390_V16_REGNUM + vx - 16, buf);
3713 x = extract_unsigned_integer (buf + el * es, es, byte_order);
3714 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3715 return 0;
3716}
3717
3718/* Calculates memory address for instructions with relative long addressing. */
3719
3720static CORE_ADDR
3721s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
3722 CORE_ADDR addr, uint16_t i1, uint16_t i2)
3723{
3724 int32_t ri = i1 << 16 | i2;
3725 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
3726}
3727
3728/* Population count helper. */
3729
3730static int s390_popcnt (unsigned int x) {
3731 int res = 0;
3732 while (x)
3733 {
3734 if (x & 1)
3735 res++;
3736 x >>= 1;
3737 }
3738 return res;
3739}
3740
3741/* Record 64-bit register. */
3742
3743static int
3744s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3745{
3746 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3747 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3748 return -1;
3749 if (tdep->abi == ABI_LINUX_S390)
3750 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3751 return -1;
3752 return 0;
3753}
3754
3755/* Record high 32 bits of a register. */
3756
3757static int
3758s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3759{
3760 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3761 if (tdep->abi == ABI_LINUX_S390)
3762 {
3763 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3764 return -1;
3765 }
3766 else
3767 {
3768 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3769 return -1;
3770 }
3771 return 0;
3772}
3773
3774/* Record vector register. */
3775
3776static int
3777s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3778{
566c56c9
MK
3779 if (i < 16)
3780 {
3781 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
3782 return -1;
3783 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
3784 return -1;
3785 }
3786 else
3787 {
3788 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
3789 return -1;
3790 }
3791 return 0;
3792}
3793
3794static int
3795s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
3796 CORE_ADDR addr)
3797{
566c56c9
MK
3798 uint16_t insn[3] = {0};
3799 /* Instruction as bytes. */
3800 uint8_t ibyte[6];
3801 /* Instruction as nibbles. */
3802 uint8_t inib[12];
3803 /* Instruction vector registers. */
3804 uint8_t ivec[4];
3805 CORE_ADDR oaddr, oaddr2, oaddr3;
3806 ULONGEST tmp;
3807 int i, n;
3808 /* if EX/EXRL instruction used, here's the reg parameter */
3809 int ex = -1;
3810 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3811
3812 /* Attempting to use EX or EXRL jumps back here */
3813ex:
3814
3815 /* Read instruction. */
3816 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
3817 /* If execute was involved, do the adjustment. */
3818 if (ex != -1)
3819 insn[0] |= ex & 0xff;
3820 /* Two highest bits determine instruction size. */
3821 if (insn[0] >= 0x4000)
3822 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
3823 else
3824 /* Not necessary, but avoids uninitialized variable warnings. */
3825 insn[1] = 0;
3826 if (insn[0] >= 0xc000)
3827 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
3828 else
3829 insn[2] = 0;
3830 /* Split instruction into bytes and nibbles. */
3831 for (i = 0; i < 3; i++)
3832 {
3833 ibyte[i*2] = insn[i] >> 8 & 0xff;
3834 ibyte[i*2+1] = insn[i] & 0xff;
3835 }
3836 for (i = 0; i < 6; i++)
3837 {
3838 inib[i*2] = ibyte[i] >> 4 & 0xf;
3839 inib[i*2+1] = ibyte[i] & 0xf;
3840 }
3841 /* Compute vector registers, if applicable. */
3842 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
3843 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
3844 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
3845 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
3846
3847 switch (ibyte[0])
3848 {
3849 /* 0x00 undefined */
3850
3851 case 0x01:
3852 /* E-format instruction */
3853 switch (ibyte[1])
3854 {
3855 /* 0x00 undefined */
3856 /* 0x01 unsupported: PR - program return */
3857 /* 0x02 unsupported: UPT */
3858 /* 0x03 undefined */
3859 /* 0x04 privileged: PTFF - perform timing facility function */
3860 /* 0x05-0x06 undefined */
3861 /* 0x07 privileged: SCKPF - set clock programmable field */
3862 /* 0x08-0x09 undefined */
3863
3864 case 0x0a: /* PFPO - perform floating point operation */
3865 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3866 if (!(tmp & 0x80000000u))
3867 {
3868 uint8_t ofc = tmp >> 16 & 0xff;
3869 switch (ofc)
3870 {
3871 case 0x00: /* HFP32 */
3872 case 0x01: /* HFP64 */
3873 case 0x05: /* BFP32 */
3874 case 0x06: /* BFP64 */
3875 case 0x08: /* DFP32 */
3876 case 0x09: /* DFP64 */
3877 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3878 return -1;
3879 break;
3880 case 0x02: /* HFP128 */
3881 case 0x07: /* BFP128 */
3882 case 0x0a: /* DFP128 */
3883 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3884 return -1;
3885 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3886 return -1;
3887 break;
3888 default:
3889 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3890 ofc, paddress (gdbarch, addr));
3891 return -1;
3892 }
3893
3894 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3895 return -1;
3896 }
3897 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3898 return -1;
3899 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3900 return -1;
3901 break;
3902
3903 case 0x0b: /* TAM - test address mode */
3904 case 0x0c: /* SAM24 - set address mode 24 */
3905 case 0x0d: /* SAM31 - set address mode 31 */
3906 case 0x0e: /* SAM64 - set address mode 64 */
3907 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3908 return -1;
3909 break;
3910
3911 /* 0x0f-0xfe undefined */
3912
3913 /* 0xff unsupported: TRAP */
3914
3915 default:
3916 goto UNKNOWN_OP;
3917 }
3918 break;
3919
3920 /* 0x02 undefined */
3921 /* 0x03 undefined */
3922
3923 case 0x04: /* SPM - set program mask */
3924 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3925 return -1;
3926 break;
3927
3928 case 0x05: /* BALR - branch and link */
3929 case 0x45: /* BAL - branch and link */
3930 case 0x06: /* BCTR - branch on count */
3931 case 0x46: /* BCT - branch on count */
3932 case 0x0d: /* BASR - branch and save */
3933 case 0x4d: /* BAS - branch and save */
3934 case 0x84: /* BRXH - branch relative on index high */
3935 case 0x85: /* BRXLE - branch relative on index low or equal */
3936 case 0x86: /* BXH - branch on index high */
3937 case 0x87: /* BXLE - branch on index low or equal */
3938 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3939 use 32-bit destination as counter. */
3940 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3941 return -1;
3942 break;
3943
3944 case 0x07: /* BCR - branch on condition */
3945 case 0x47: /* BC - branch on condition */
3946 /* No effect other than PC transfer. */
3947 break;
3948
3949 /* 0x08 undefined */
3950 /* 0x09 undefined */
3951
3952 case 0x0a:
3953 /* SVC - supervisor call */
3954 if (s390_linux_syscall_record (regcache, ibyte[1]))
3955 return -1;
3956 break;
3957
3958 case 0x0b: /* BSM - branch and set mode */
3959 if (inib[2])
3960 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3961 return -1;
3962 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3963 return -1;
3964 break;
3965
3966 case 0x0c: /* BASSM - branch and save and set mode */
3967 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3968 return -1;
3969 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3970 return -1;
3971 break;
3972
3973 case 0x0e: /* MVCL - move long [interruptible] */
3974 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3975 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3976 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3977 tmp &= 0xffffff;
3978 if (record_full_arch_list_add_mem (oaddr, tmp))
3979 return -1;
3980 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3981 return -1;
3982 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3983 return -1;
3984 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3985 return -1;
3986 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3987 return -1;
3988 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3989 return -1;
3990 break;
3991
3992 case 0x0f: /* CLCL - compare logical long [interruptible] */
3993 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3994 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3995 return -1;
3996 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3997 return -1;
3998 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3999 return -1;
4000 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4001 return -1;
4002 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4003 return -1;
4004 break;
4005
4006 case 0x10: /* LPR - load positive */
4007 case 0x11: /* LNR - load negative */
4008 case 0x12: /* LTR - load and test */
4009 case 0x13: /* LCR - load complement */
4010 case 0x14: /* NR - and */
4011 case 0x16: /* OR - or */
4012 case 0x17: /* XR - xor */
4013 case 0x1a: /* AR - add */
4014 case 0x1b: /* SR - subtract */
4015 case 0x1e: /* ALR - add logical */
4016 case 0x1f: /* SLR - subtract logical */
4017 case 0x54: /* N - and */
4018 case 0x56: /* O - or */
4019 case 0x57: /* X - xor */
4020 case 0x5a: /* A - add */
4021 case 0x5b: /* S - subtract */
4022 case 0x5e: /* AL - add logical */
4023 case 0x5f: /* SL - subtract logical */
4024 case 0x4a: /* AH - add halfword */
4025 case 0x4b: /* SH - subtract halfword */
4026 case 0x8a: /* SRA - shift right single */
4027 case 0x8b: /* SLA - shift left single */
4028 case 0xbf: /* ICM - insert characters under mask */
4029 /* 32-bit destination + flags */
4030 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4031 return -1;
4032 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4033 return -1;
4034 break;
4035
4036 case 0x15: /* CLR - compare logical */
4037 case 0x55: /* CL - compare logical */
4038 case 0x19: /* CR - compare */
4039 case 0x29: /* CDR - compare */
4040 case 0x39: /* CER - compare */
4041 case 0x49: /* CH - compare halfword */
4042 case 0x59: /* C - compare */
4043 case 0x69: /* CD - compare */
4044 case 0x79: /* CE - compare */
4045 case 0x91: /* TM - test under mask */
4046 case 0x95: /* CLI - compare logical */
4047 case 0xbd: /* CLM - compare logical under mask */
4048 case 0xd5: /* CLC - compare logical */
4049 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4050 return -1;
4051 break;
4052
4053 case 0x18: /* LR - load */
4054 case 0x48: /* LH - load halfword */
4055 case 0x58: /* L - load */
4056 case 0x41: /* LA - load address */
4057 case 0x43: /* IC - insert character */
4058 case 0x4c: /* MH - multiply halfword */
4059 case 0x71: /* MS - multiply single */
4060 case 0x88: /* SRL - shift right single logical */
4061 case 0x89: /* SLL - shift left single logical */
4062 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
4063 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4064 return -1;
4065 break;
4066
4067 case 0x1c: /* MR - multiply */
4068 case 0x5c: /* M - multiply */
4069 case 0x1d: /* DR - divide */
4070 case 0x5d: /* D - divide */
4071 case 0x8c: /* SRDL - shift right double logical */
4072 case 0x8d: /* SLDL - shift left double logical */
4073 /* 32-bit pair destination, no flags */
4074 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4075 return -1;
4076 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4077 return -1;
4078 break;
4079
4080 case 0x20: /* LPDR - load positive */
4081 case 0x30: /* LPER - load positive */
4082 case 0x21: /* LNDR - load negative */
4083 case 0x31: /* LNER - load negative */
4084 case 0x22: /* LTDR - load and test */
4085 case 0x32: /* LTER - load and test */
4086 case 0x23: /* LCDR - load complement */
4087 case 0x33: /* LCER - load complement */
4088 case 0x2a: /* ADR - add */
4089 case 0x3a: /* AER - add */
4090 case 0x6a: /* AD - add */
4091 case 0x7a: /* AE - add */
4092 case 0x2b: /* SDR - subtract */
4093 case 0x3b: /* SER - subtract */
4094 case 0x6b: /* SD - subtract */
4095 case 0x7b: /* SE - subtract */
4096 case 0x2e: /* AWR - add unnormalized */
4097 case 0x3e: /* AUR - add unnormalized */
4098 case 0x6e: /* AW - add unnormalized */
4099 case 0x7e: /* AU - add unnormalized */
4100 case 0x2f: /* SWR - subtract unnormalized */
4101 case 0x3f: /* SUR - subtract unnormalized */
4102 case 0x6f: /* SW - subtract unnormalized */
4103 case 0x7f: /* SU - subtract unnormalized */
4104 /* float destination + flags */
4105 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4106 return -1;
4107 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4108 return -1;
4109 break;
4110
4111 case 0x24: /* HDR - halve */
4112 case 0x34: /* HER - halve */
4113 case 0x25: /* LDXR - load rounded */
4114 case 0x35: /* LEDR - load rounded */
4115 case 0x28: /* LDR - load */
4116 case 0x38: /* LER - load */
4117 case 0x68: /* LD - load */
4118 case 0x78: /* LE - load */
4119 case 0x2c: /* MDR - multiply */
4120 case 0x3c: /* MDER - multiply */
4121 case 0x6c: /* MD - multiply */
4122 case 0x7c: /* MDE - multiply */
4123 case 0x2d: /* DDR - divide */
4124 case 0x3d: /* DER - divide */
4125 case 0x6d: /* DD - divide */
4126 case 0x7d: /* DE - divide */
4127 /* float destination, no flags */
4128 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4129 return -1;
4130 break;
4131
4132 case 0x26: /* MXR - multiply */
4133 case 0x27: /* MXDR - multiply */
4134 case 0x67: /* MXD - multiply */
4135 /* float pair destination, no flags */
4136 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4137 return -1;
4138 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4139 return -1;
4140 break;
4141
4142 case 0x36: /* AXR - add */
4143 case 0x37: /* SXR - subtract */
4144 /* float pair destination + flags */
4145 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4146 return -1;
4147 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4148 return -1;
4149 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4150 return -1;
4151 break;
4152
4153 case 0x40: /* STH - store halfword */
4154 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4155 if (record_full_arch_list_add_mem (oaddr, 2))
4156 return -1;
4157 break;
4158
4159 case 0x42: /* STC - store character */
4160 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4161 if (record_full_arch_list_add_mem (oaddr, 1))
4162 return -1;
4163 break;
4164
4165 case 0x44: /* EX - execute */
4166 if (ex != -1)
4167 {
4168 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4169 paddress (gdbarch, addr));
4170 return -1;
4171 }
4172 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4173 if (inib[2])
4174 {
4175 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4176 ex = tmp & 0xff;
4177 }
4178 else
4179 {
4180 ex = 0;
4181 }
4182 goto ex;
4183
4184 case 0x4e: /* CVD - convert to decimal */
4185 case 0x60: /* STD - store */
4186 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4187 if (record_full_arch_list_add_mem (oaddr, 8))
4188 return -1;
4189 break;
4190
4191 case 0x4f: /* CVB - convert to binary */
4192 /* 32-bit gpr destination + FPC (DXC write) */
4193 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4194 return -1;
4195 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4196 return -1;
4197 break;
4198
4199 case 0x50: /* ST - store */
4200 case 0x70: /* STE - store */
4201 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4202 if (record_full_arch_list_add_mem (oaddr, 4))
4203 return -1;
4204 break;
4205
4206 case 0x51: /* LAE - load address extended */
4207 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4208 return -1;
4209 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
4210 return -1;
4211 break;
4212
4213 /* 0x52 undefined */
4214 /* 0x53 undefined */
4215
4216 /* 0x61-0x66 undefined */
4217
4218 /* 0x72-0x77 undefined */
4219
4220 /* 0x80 privileged: SSM - set system mask */
4221 /* 0x81 undefined */
4222 /* 0x82 privileged: LPSW - load PSW */
4223 /* 0x83 privileged: diagnose */
4224
4225 case 0x8e: /* SRDA - shift right double */
4226 case 0x8f: /* SLDA - shift left double */
4227 /* 32-bit pair destination + flags */
4228 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4229 return -1;
4230 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4231 return -1;
4232 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4233 return -1;
4234 break;
4235
4236 case 0x90: /* STM - store multiple */
4237 case 0x9b: /* STAM - store access multiple */
4238 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4239 if (inib[2] <= inib[3])
4240 n = inib[3] - inib[2] + 1;
4241 else
4242 n = inib[3] + 0x10 - inib[2] + 1;
4243 if (record_full_arch_list_add_mem (oaddr, n * 4))
4244 return -1;
4245 break;
4246
4247 case 0x92: /* MVI - move */
4248 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4249 if (record_full_arch_list_add_mem (oaddr, 1))
4250 return -1;
4251 break;
4252
4253 case 0x93: /* TS - test and set */
4254 case 0x94: /* NI - and */
4255 case 0x96: /* OI - or */
4256 case 0x97: /* XI - xor */
4257 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4258 if (record_full_arch_list_add_mem (oaddr, 1))
4259 return -1;
4260 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4261 return -1;
4262 break;
4263
4264 case 0x98: /* LM - load multiple */
4265 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4266 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
4267 return -1;
4268 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4269 return -1;
4270 break;
4271
4272 /* 0x99 privileged: TRACE */
4273
4274 case 0x9a: /* LAM - load access multiple */
4275 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4276 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
4277 return -1;
4278 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
4279 return -1;
4280 break;
4281
4282 /* 0x9c-0x9f privileged and obsolete (old I/O) */
4283 /* 0xa0-0xa4 undefined */
4284
4285 case 0xa5:
4286 case 0xa7:
4287 /* RI-format instruction */
4288 switch (ibyte[0] << 4 | inib[3])
4289 {
4290 case 0xa50: /* IIHH - insert immediate */
4291 case 0xa51: /* IIHL - insert immediate */
4292 /* high 32-bit destination */
4293 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4294 return -1;
4295 break;
4296
4297 case 0xa52: /* IILH - insert immediate */
4298 case 0xa53: /* IILL - insert immediate */
4299 case 0xa75: /* BRAS - branch relative and save */
4300 case 0xa76: /* BRCT - branch relative on count */
4301 case 0xa78: /* LHI - load halfword immediate */
4302 case 0xa7c: /* MHI - multiply halfword immediate */
4303 /* 32-bit or native destination */
4304 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4305 return -1;
4306 break;
4307
4308 case 0xa54: /* NIHH - and immediate */
4309 case 0xa55: /* NIHL - and immediate */
4310 case 0xa58: /* OIHH - or immediate */
4311 case 0xa59: /* OIHL - or immediate */
4312 /* high 32-bit destination + flags */
4313 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4314 return -1;
4315 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4316 return -1;
4317 break;
4318
4319 case 0xa56: /* NILH - and immediate */
4320 case 0xa57: /* NILL - and immediate */
4321 case 0xa5a: /* OILH - or immediate */
4322 case 0xa5b: /* OILL - or immediate */
4323 case 0xa7a: /* AHI - add halfword immediate */
4324 /* 32-bit destination + flags */
4325 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4326 return -1;
4327 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4328 return -1;
4329 break;
4330
4331 case 0xa5c: /* LLIHH - load logical immediate */
4332 case 0xa5d: /* LLIHL - load logical immediate */
4333 case 0xa5e: /* LLILH - load logical immediate */
4334 case 0xa5f: /* LLILL - load logical immediate */
4335 case 0xa77: /* BRCTG - branch relative on count */
4336 case 0xa79: /* LGHI - load halfword immediate */
4337 case 0xa7d: /* MGHI - multiply halfword immediate */
4338 /* 64-bit destination */
4339 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4340 return -1;
4341 break;
4342
4343 case 0xa70: /* TMLH - test under mask */
4344 case 0xa71: /* TMLL - test under mask */
4345 case 0xa72: /* TMHH - test under mask */
4346 case 0xa73: /* TMHL - test under mask */
4347 case 0xa7e: /* CHI - compare halfword immediate */
4348 case 0xa7f: /* CGHI - compare halfword immediate */
4349 /* flags only */
4350 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4351 return -1;
4352 break;
4353
4354 case 0xa74: /* BRC - branch relative on condition */
4355 /* no register change */
4356 break;
4357
4358 case 0xa7b: /* AGHI - add halfword immediate */
4359 /* 64-bit destination + flags */
4360 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4361 return -1;
4362 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4363 return -1;
4364 break;
4365
4366 default:
4367 goto UNKNOWN_OP;
4368 }
4369 break;
4370
4371 /* 0xa6 undefined */
4372
4373 case 0xa8: /* MVCLE - move long extended [partial] */
4374 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4375 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4376 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
4377 if (record_full_arch_list_add_mem (oaddr, tmp))
4378 return -1;
4379 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4380 return -1;
4381 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4382 return -1;
4383 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4384 return -1;
4385 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4386 return -1;
4387 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4388 return -1;
4389 break;
4390
4391 /* 0xaa-0xab undefined */
4392 /* 0xac privileged: STNSM - store then and system mask */
4393 /* 0xad privileged: STOSM - store then or system mask */
4394 /* 0xae privileged: SIGP - signal processor */
4395 /* 0xaf unsupported: MC - monitor call */
4396 /* 0xb0 undefined */
4397 /* 0xb1 privileged: LRA - load real address */
4398
4399 case 0xb2:
4400 case 0xb3:
4401 case 0xb9:
4402 /* S/RRD/RRE/RRF/IE-format instruction */
4403 switch (insn[0])
4404 {
4405 /* 0xb200-0xb204 undefined or privileged */
4406
4407 case 0xb205: /* STCK - store clock */
4408 case 0xb27c: /* STCKF - store clock fast */
4409 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4410 if (record_full_arch_list_add_mem (oaddr, 8))
4411 return -1;
4412 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4413 return -1;
4414 break;
4415
4416 /* 0xb206-0xb219 undefined, privileged, or unsupported */
4417 /* 0xb21a unsupported: CFC */
4418 /* 0xb21b-0xb221 undefined or privileged */
4419
4420 case 0xb222: /* IPM - insert program mask */
4421 case 0xb24f: /* EAR - extract access */
4422 case 0xb252: /* MSR - multiply single */
4423 case 0xb2ec: /* ETND - extract transaction nesting depth */
4424 case 0xb38c: /* EFPC - extract fpc */
4425 case 0xb91f: /* LRVR - load reversed */
4426 case 0xb926: /* LBR - load byte */
4427 case 0xb927: /* LHR - load halfword */
4428 case 0xb994: /* LLCR - load logical character */
4429 case 0xb995: /* LLHR - load logical halfword */
4430 case 0xb9f2: /* LOCR - load on condition */
4431 /* 32-bit gpr destination */
4432 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4433 return -1;
4434 break;
4435
4436 /* 0xb223-0xb22c privileged or unsupported */
4437
4438 case 0xb22d: /* DXR - divide */
4439 case 0xb325: /* LXDR - load lengthened */
4440 case 0xb326: /* LXER - load lengthened */
4441 case 0xb336: /* SQXR - square root */
4442 case 0xb365: /* LXR - load */
4443 case 0xb367: /* FIXR - load fp integer */
4444 case 0xb376: /* LZXR - load zero */
4445 case 0xb3b6: /* CXFR - convert from fixed */
4446 case 0xb3c6: /* CXGR - convert from fixed */
4447 case 0xb3fe: /* IEXTR - insert biased exponent */
4448 /* float pair destination */
4449 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4450 return -1;
4451 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4452 return -1;
4453 break;
4454
4455 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
4456
4457 case 0xb241: /* CKSM - checksum [partial] */
4458 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4459 return -1;
4460 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4461 return -1;
4462 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4463 return -1;
4464 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4465 return -1;
4466 break;
4467
4468 /* 0xb242-0xb243 undefined */
4469
4470 case 0xb244: /* SQDR - square root */
4471 case 0xb245: /* SQER - square root */
4472 case 0xb324: /* LDER - load lengthened */
4473 case 0xb337: /* MEER - multiply */
4474 case 0xb366: /* LEXR - load rounded */
4475 case 0xb370: /* LPDFR - load positive */
4476 case 0xb371: /* LNDFR - load negative */
4477 case 0xb372: /* CSDFR - copy sign */
4478 case 0xb373: /* LCDFR - load complement */
4479 case 0xb374: /* LZER - load zero */
4480 case 0xb375: /* LZDR - load zero */
4481 case 0xb377: /* FIER - load fp integer */
4482 case 0xb37f: /* FIDR - load fp integer */
4483 case 0xb3b4: /* CEFR - convert from fixed */
4484 case 0xb3b5: /* CDFR - convert from fixed */
4485 case 0xb3c1: /* LDGR - load fpr from gr */
4486 case 0xb3c4: /* CEGR - convert from fixed */
4487 case 0xb3c5: /* CDGR - convert from fixed */
4488 case 0xb3f6: /* IEDTR - insert biased exponent */
4489 /* float destination */
4490 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4491 return -1;
4492 break;
4493
4494 /* 0xb246-0xb24c: privileged or unsupported */
4495
4496 case 0xb24d: /* CPYA - copy access */
4497 case 0xb24e: /* SAR - set access */
4498 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
4499 return -1;
4500 break;
4501
4502 /* 0xb250-0xb251 undefined or privileged */
4503 /* 0xb253-0xb254 undefined or privileged */
4504
4505 case 0xb255: /* MVST - move string [partial] */
4506 {
4507 uint8_t end;
4508 gdb_byte cur;
4509 ULONGEST num = 0;
4510 /* Read ending byte. */
4511 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4512 end = tmp & 0xff;
4513 /* Get address of second operand. */
4514 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
4515 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4516 /* Search for ending byte and compute length. */
4517 do {
4518 num++;
4519 if (target_read_memory (oaddr, &cur, 1))
4520 return -1;
4521 oaddr++;
4522 } while (cur != end);
4523 /* Get address of first operand and record it. */
4524 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4525 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4526 if (record_full_arch_list_add_mem (oaddr, num))
4527 return -1;
4528 /* Record the registers. */
4529 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4530 return -1;
4531 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4532 return -1;
4533 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4534 return -1;
4535 }
4536 break;
4537
4538 /* 0xb256 undefined */
4539
4540 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
4541 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4542 return -1;
4543 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4544 return -1;
4545 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4546 return -1;
4547 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4548 return -1;
4549 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4550 return -1;
4551 break;
4552
4553 /* 0xb258-0xb25c undefined, privileged, or unsupported */
4554
4555 case 0xb25d: /* CLST - compare logical string [partial] */
4556 case 0xb25e: /* SRST - search string [partial] */
4557 case 0xb9be: /* SRSTU - search string unicode [partial] */
4558 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4559 return -1;
4560 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4561 return -1;
4562 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4563 return -1;
4564 break;
4565
4566 /* 0xb25f-0xb262 undefined */
4567
4568 case 0xb263: /* CMPSC - compression call [interruptible] */
4569 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4570 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4571 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4572 if (record_full_arch_list_add_mem (oaddr, tmp))
4573 return -1;
4574 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4575 return -1;
4576 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4577 return -1;
4578 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4579 return -1;
4580 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4581 return -1;
4582 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
4583 return -1;
4584 /* DXC may be written */
4585 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4586 return -1;
4587 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4588 return -1;
4589 break;
4590
4591 /* 0xb264-0xb277 undefined, privileged, or unsupported */
4592
4593 case 0xb278: /* STCKE - store clock extended */
4594 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4595 if (record_full_arch_list_add_mem (oaddr, 16))
4596 return -1;
4597 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4598 return -1;
4599 break;
4600
4601 /* 0xb279-0xb27b undefined or unsupported */
4602 /* 0xb27d-0xb298 undefined or privileged */
4603
4604 case 0xb299: /* SRNM - set rounding mode */
4605 case 0xb2b8: /* SRNMB - set bfp rounding mode */
4606 case 0xb2b9: /* SRNMT - set dfp rounding mode */
4607 case 0xb29d: /* LFPC - load fpc */
4608 case 0xb2bd: /* LFAS - load fpc and signal */
4609 case 0xb384: /* SFPC - set fpc */
4610 case 0xb385: /* SFASR - set fpc and signal */
4611 case 0xb960: /* CGRT - compare and trap */
4612 case 0xb961: /* CLGRT - compare logical and trap */
4613 case 0xb972: /* CRT - compare and trap */
4614 case 0xb973: /* CLRT - compare logical and trap */
4615 /* fpc only - including possible DXC write for trapping insns */
4616 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4617 return -1;
4618 break;
4619
4620 /* 0xb29a-0xb29b undefined */
4621
4622 case 0xb29c: /* STFPC - store fpc */
4623 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4624 if (record_full_arch_list_add_mem (oaddr, 4))
4625 return -1;
4626 break;
4627
4628 /* 0xb29e-0xb2a4 undefined */
4629
4630 case 0xb2a5: /* TRE - translate extended [partial] */
4631 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4632 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4633 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4634 if (record_full_arch_list_add_mem (oaddr, tmp))
4635 return -1;
4636 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4637 return -1;
4638 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4639 return -1;
4640 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4641 return -1;
4642 break;
4643
4644 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
4645 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
4646 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
4647 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
4648 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
4649 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
4650 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4651 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4652 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4653 if (record_full_arch_list_add_mem (oaddr, tmp))
4654 return -1;
4655 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4656 return -1;
4657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4658 return -1;
4659 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4660 return -1;
4661 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4662 return -1;
4663 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4664 return -1;
4665 break;
4666
4667 /* 0xb2a8-0xb2af undefined */
4668
4669 case 0xb2b0: /* STFLE - store facility list extended */
4670 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4671 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4672 tmp &= 0xff;
4673 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
4674 return -1;
4675 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
4676 return -1;
4677 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4678 return -1;
4679 break;
4680
4681 /* 0xb2b1-0xb2b7 undefined or privileged */
4682 /* 0xb2ba-0xb2bc undefined */
4683 /* 0xb2be-0xb2e7 undefined */
4684 /* 0xb2e9-0xb2eb undefined */
4685 /* 0xb2ed-0xb2f7 undefined */
4686 /* 0xb2f8 unsupported: TEND */
4687 /* 0xb2f9 undefined */
4688
4689 case 0xb2e8: /* PPA - perform processor assist */
4690 case 0xb2fa: /* NIAI - next instruction access intent */
4691 /* no visible effects */
4692 break;
4693
4694 /* 0xb2fb undefined */
4695 /* 0xb2fc unsupported: TABORT */
4696 /* 0xb2fd-0xb2fe undefined */
4697 /* 0xb2ff unsupported: TRAP */
4698
4699 case 0xb300: /* LPEBR - load positive */
4700 case 0xb301: /* LNEBR - load negative */
4701 case 0xb303: /* LCEBR - load complement */
4702 case 0xb310: /* LPDBR - load positive */
4703 case 0xb311: /* LNDBR - load negative */
4704 case 0xb313: /* LCDBR - load complement */
4705 case 0xb350: /* TBEDR - convert hfp to bfp */
4706 case 0xb351: /* TBDR - convert hfp to bfp */
4707 case 0xb358: /* THDER - convert bfp to hfp */
4708 case 0xb359: /* THDR - convert bfp to hfp */
4709 /* float destination + flags */
4710 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4711 return -1;
4712 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4713 return -1;
4714 break;
4715
4716 case 0xb304: /* LDEBR - load lengthened */
4717 case 0xb30c: /* MDEBR - multiply */
4718 case 0xb30d: /* DEBR - divide */
4719 case 0xb314: /* SQEBR - square root */
4720 case 0xb315: /* SQDBR - square root */
4721 case 0xb317: /* MEEBR - multiply */
4722 case 0xb31c: /* MDBR - multiply */
4723 case 0xb31d: /* DDBR - divide */
4724 case 0xb344: /* LEDBRA - load rounded */
4725 case 0xb345: /* LDXBRA - load rounded */
4726 case 0xb346: /* LEXBRA - load rounded */
4727 case 0xb357: /* FIEBRA - load fp integer */
4728 case 0xb35f: /* FIDBRA - load fp integer */
4729 case 0xb390: /* CELFBR - convert from logical */
4730 case 0xb391: /* CDLFBR - convert from logical */
4731 case 0xb394: /* CEFBR - convert from fixed */
4732 case 0xb395: /* CDFBR - convert from fixed */
4733 case 0xb3a0: /* CELGBR - convert from logical */
4734 case 0xb3a1: /* CDLGBR - convert from logical */
4735 case 0xb3a4: /* CEGBR - convert from fixed */
4736 case 0xb3a5: /* CDGBR - convert from fixed */
4737 case 0xb3d0: /* MDTR - multiply */
4738 case 0xb3d1: /* DDTR - divide */
4739 case 0xb3d4: /* LDETR - load lengthened */
4740 case 0xb3d5: /* LEDTR - load lengthened */
4741 case 0xb3d7: /* FIDTR - load fp integer */
4742 case 0xb3dd: /* LDXTR - load lengthened */
4743 case 0xb3f1: /* CDGTR - convert from fixed */
4744 case 0xb3f2: /* CDUTR - convert from unsigned packed */
4745 case 0xb3f3: /* CDSTR - convert from signed packed */
4746 case 0xb3f5: /* QADTR - quantize */
4747 case 0xb3f7: /* RRDTR - reround */
4748 case 0xb951: /* CDFTR - convert from fixed */
4749 case 0xb952: /* CDLGTR - convert from logical */
4750 case 0xb953: /* CDLFTR - convert from logical */
4751 /* float destination + fpc */
4752 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4753 return -1;
4754 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4755 return -1;
4756 break;
4757
4758 case 0xb305: /* LXDBR - load lengthened */
4759 case 0xb306: /* LXEBR - load lengthened */
4760 case 0xb307: /* MXDBR - multiply */
4761 case 0xb316: /* SQXBR - square root */
4762 case 0xb34c: /* MXBR - multiply */
4763 case 0xb34d: /* DXBR - divide */
4764 case 0xb347: /* FIXBRA - load fp integer */
4765 case 0xb392: /* CXLFBR - convert from logical */
4766 case 0xb396: /* CXFBR - convert from fixed */
4767 case 0xb3a2: /* CXLGBR - convert from logical */
4768 case 0xb3a6: /* CXGBR - convert from fixed */
4769 case 0xb3d8: /* MXTR - multiply */
4770 case 0xb3d9: /* DXTR - divide */
4771 case 0xb3dc: /* LXDTR - load lengthened */
4772 case 0xb3df: /* FIXTR - load fp integer */
4773 case 0xb3f9: /* CXGTR - convert from fixed */
4774 case 0xb3fa: /* CXUTR - convert from unsigned packed */
4775 case 0xb3fb: /* CXSTR - convert from signed packed */
4776 case 0xb3fd: /* QAXTR - quantize */
4777 case 0xb3ff: /* RRXTR - reround */
4778 case 0xb959: /* CXFTR - convert from fixed */
4779 case 0xb95a: /* CXLGTR - convert from logical */
4780 case 0xb95b: /* CXLFTR - convert from logical */
4781 /* float pair destination + fpc */
4782 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4783 return -1;
4784 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4785 return -1;
4786 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4787 return -1;
4788 break;
4789
4790 case 0xb308: /* KEBR - compare and signal */
4791 case 0xb309: /* CEBR - compare */
4792 case 0xb318: /* KDBR - compare and signal */
4793 case 0xb319: /* CDBR - compare */
4794 case 0xb348: /* KXBR - compare and signal */
4795 case 0xb349: /* CXBR - compare */
4796 case 0xb3e0: /* KDTR - compare and signal */
4797 case 0xb3e4: /* CDTR - compare */
4798 case 0xb3e8: /* KXTR - compare and signal */
4799 case 0xb3ec: /* CXTR - compare */
4800 /* flags + fpc only */
4801 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4802 return -1;
4803 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4804 return -1;
4805 break;
4806
4807 case 0xb302: /* LTEBR - load and test */
4808 case 0xb312: /* LTDBR - load and test */
4809 case 0xb30a: /* AEBR - add */
4810 case 0xb30b: /* SEBR - subtract */
4811 case 0xb31a: /* ADBR - add */
4812 case 0xb31b: /* SDBR - subtract */
4813 case 0xb3d2: /* ADTR - add */
4814 case 0xb3d3: /* SDTR - subtract */
4815 case 0xb3d6: /* LTDTR - load and test */
4816 /* float destination + flags + fpc */
4817 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4818 return -1;
4819 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4820 return -1;
4821 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4822 return -1;
4823 break;
4824
4825 case 0xb30e: /* MAEBR - multiply and add */
4826 case 0xb30f: /* MSEBR - multiply and subtract */
4827 case 0xb31e: /* MADBR - multiply and add */
4828 case 0xb31f: /* MSDBR - multiply and subtract */
4829 /* float destination [RRD] + fpc */
4830 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4831 return -1;
4832 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4833 return -1;
4834 break;
4835
4836 /* 0xb320-0xb323 undefined */
4837 /* 0xb327-0xb32d undefined */
4838
4839 case 0xb32e: /* MAER - multiply and add */
4840 case 0xb32f: /* MSER - multiply and subtract */
4841 case 0xb338: /* MAYLR - multiply and add unnormalized */
4842 case 0xb339: /* MYLR - multiply unnormalized */
4843 case 0xb33c: /* MAYHR - multiply and add unnormalized */
4844 case 0xb33d: /* MYHR - multiply unnormalized */
4845 case 0xb33e: /* MADR - multiply and add */
4846 case 0xb33f: /* MSDR - multiply and subtract */
4847 /* float destination [RRD] */
4848 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4849 return -1;
4850 break;
4851
4852 /* 0xb330-0xb335 undefined */
4853
4854 case 0xb33a: /* MAYR - multiply and add unnormalized */
4855 case 0xb33b: /* MYR - multiply unnormalized */
4856 /* float pair destination [RRD] */
4857 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4858 return -1;
4859 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4860 return -1;
4861 break;
4862
4863 case 0xb340: /* LPXBR - load positive */
4864 case 0xb341: /* LNXBR - load negative */
4865 case 0xb343: /* LCXBR - load complement */
4866 case 0xb360: /* LPXR - load positive */
4867 case 0xb361: /* LNXR - load negative */
4868 case 0xb362: /* LTXR - load and test */
4869 case 0xb363: /* LCXR - load complement */
4870 /* float pair destination + flags */
4871 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4872 return -1;
4873 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4874 return -1;
4875 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4876 return -1;
4877 break;
4878
4879 case 0xb342: /* LTXBR - load and test */
4880 case 0xb34a: /* AXBR - add */
4881 case 0xb34b: /* SXBR - subtract */
4882 case 0xb3da: /* AXTR - add */
4883 case 0xb3db: /* SXTR - subtract */
4884 case 0xb3de: /* LTXTR - load and test */
4885 /* float pair destination + flags + fpc */
4886 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4887 return -1;
4888 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4889 return -1;
4890 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4891 return -1;
4892 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4893 return -1;
4894 break;
4895
4896 /* 0xb34e-0xb34f undefined */
4897 /* 0xb352 undefined */
4898
4899 case 0xb353: /* DIEBR - divide to integer */
4900 case 0xb35b: /* DIDBR - divide to integer */
4901 /* two float destinations + flags + fpc */
4902 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4903 return -1;
4904 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4905 return -1;
4906 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4907 return -1;
4908 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4909 return -1;
4910 break;
4911
4912 /* 0xb354-0xb356 undefined */
4913 /* 0xb35a undefined */
4914
4915 /* 0xb35c-0xb35e undefined */
4916 /* 0xb364 undefined */
4917 /* 0xb368 undefined */
4918
4919 case 0xb369: /* CXR - compare */
4920 case 0xb3f4: /* CEDTR - compare biased exponent */
4921 case 0xb3fc: /* CEXTR - compare biased exponent */
4922 case 0xb920: /* CGR - compare */
4923 case 0xb921: /* CLGR - compare logical */
4924 case 0xb930: /* CGFR - compare */
4925 case 0xb931: /* CLGFR - compare logical */
4926 case 0xb9cd: /* CHHR - compare high */
4927 case 0xb9cf: /* CLHHR - compare logical high */
4928 case 0xb9dd: /* CHLR - compare high */
4929 case 0xb9df: /* CLHLR - compare logical high */
4930 /* flags only */
4931 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4932 return -1;
4933 break;
4934
4935 /* 0xb36a-0xb36f undefined */
4936 /* 0xb377-0xb37e undefined */
4937 /* 0xb380-0xb383 undefined */
4938 /* 0xb386-0xb38b undefined */
4939 /* 0xb38d-0xb38f undefined */
4940 /* 0xb393 undefined */
4941 /* 0xb397 undefined */
4942
4943 case 0xb398: /* CFEBR - convert to fixed */
4944 case 0xb399: /* CFDBR - convert to fixed */
4945 case 0xb39a: /* CFXBR - convert to fixed */
4946 case 0xb39c: /* CLFEBR - convert to logical */
4947 case 0xb39d: /* CLFDBR - convert to logical */
4948 case 0xb39e: /* CLFXBR - convert to logical */
4949 case 0xb941: /* CFDTR - convert to fixed */
4950 case 0xb949: /* CFXTR - convert to fixed */
4951 case 0xb943: /* CLFDTR - convert to logical */
4952 case 0xb94b: /* CLFXTR - convert to logical */
4953 /* 32-bit gpr destination + flags + fpc */
4954 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4955 return -1;
4956 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4957 return -1;
4958 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4959 return -1;
4960 break;
4961
4962 /* 0xb39b undefined */
4963 /* 0xb39f undefined */
4964
4965 /* 0xb3a3 undefined */
4966 /* 0xb3a7 undefined */
4967
4968 case 0xb3a8: /* CGEBR - convert to fixed */
4969 case 0xb3a9: /* CGDBR - convert to fixed */
4970 case 0xb3aa: /* CGXBR - convert to fixed */
4971 case 0xb3ac: /* CLGEBR - convert to logical */
4972 case 0xb3ad: /* CLGDBR - convert to logical */
4973 case 0xb3ae: /* CLGXBR - convert to logical */
4974 case 0xb3e1: /* CGDTR - convert to fixed */
4975 case 0xb3e9: /* CGXTR - convert to fixed */
4976 case 0xb942: /* CLGDTR - convert to logical */
4977 case 0xb94a: /* CLGXTR - convert to logical */
4978 /* 64-bit gpr destination + flags + fpc */
4979 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4980 return -1;
4981 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4982 return -1;
4983 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4984 return -1;
4985 break;
4986
4987 /* 0xb3ab undefined */
4988 /* 0xb3af-0xb3b3 undefined */
4989 /* 0xb3b7 undefined */
4990
4991 case 0xb3b8: /* CFER - convert to fixed */
4992 case 0xb3b9: /* CFDR - convert to fixed */
4993 case 0xb3ba: /* CFXR - convert to fixed */
4994 case 0xb998: /* ALCR - add logical with carry */
4995 case 0xb999: /* SLBR - subtract logical with borrow */
4996 case 0xb9f4: /* NRK - and */
4997 case 0xb9f6: /* ORK - or */
4998 case 0xb9f7: /* XRK - xor */
4999 case 0xb9f8: /* ARK - add */
5000 case 0xb9f9: /* SRK - subtract */
5001 case 0xb9fa: /* ALRK - add logical */
5002 case 0xb9fb: /* SLRK - subtract logical */
5003 /* 32-bit gpr destination + flags */
5004 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5005 return -1;
5006 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5007 return -1;
5008 break;
5009
5010 case 0xb3c8: /* CGER - convert to fixed */
5011 case 0xb3c9: /* CGDR - convert to fixed */
5012 case 0xb3ca: /* CGXR - convert to fixed */
5013 case 0xb900: /* LPGR - load positive */
5014 case 0xb901: /* LNGR - load negative */
5015 case 0xb902: /* LTGR - load and test */
5016 case 0xb903: /* LCGR - load complement */
5017 case 0xb908: /* AGR - add */
5018 case 0xb909: /* SGR - subtract */
5019 case 0xb90a: /* ALGR - add logical */
5020 case 0xb90b: /* SLGR - subtract logical */
5021 case 0xb910: /* LPGFR - load positive */
5022 case 0xb911: /* LNGFR - load negative */
5023 case 0xb912: /* LTGFR - load and test */
5024 case 0xb913: /* LCGFR - load complement */
5025 case 0xb918: /* AGFR - add */
5026 case 0xb919: /* SGFR - subtract */
5027 case 0xb91a: /* ALGFR - add logical */
5028 case 0xb91b: /* SLGFR - subtract logical */
5029 case 0xb980: /* NGR - and */
5030 case 0xb981: /* OGR - or */
5031 case 0xb982: /* XGR - xor */
5032 case 0xb988: /* ALCGR - add logical with carry */
5033 case 0xb989: /* SLBGR - subtract logical with borrow */
5034 case 0xb9e1: /* POPCNT - population count */
5035 case 0xb9e4: /* NGRK - and */
5036 case 0xb9e6: /* OGRK - or */
5037 case 0xb9e7: /* XGRK - xor */
5038 case 0xb9e8: /* AGRK - add */
5039 case 0xb9e9: /* SGRK - subtract */
5040 case 0xb9ea: /* ALGRK - add logical */
5041 case 0xb9eb: /* SLGRK - subtract logical */
5042 /* 64-bit gpr destination + flags */
5043 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5044 return -1;
5045 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5046 return -1;
5047 break;
5048
5049 /* 0xb3bb-0xb3c0 undefined */
5050 /* 0xb3c2-0xb3c3 undefined */
5051 /* 0xb3c7 undefined */
5052 /* 0xb3cb-0xb3cc undefined */
5053
5054 case 0xb3cd: /* LGDR - load gr from fpr */
5055 case 0xb3e2: /* CUDTR - convert to unsigned packed */
5056 case 0xb3e3: /* CSDTR - convert to signed packed */
5057 case 0xb3e5: /* EEDTR - extract biased exponent */
5058 case 0xb3e7: /* ESDTR - extract significance */
5059 case 0xb3ed: /* EEXTR - extract biased exponent */
5060 case 0xb3ef: /* ESXTR - extract significance */
5061 case 0xb904: /* LGR - load */
5062 case 0xb906: /* LGBR - load byte */
5063 case 0xb907: /* LGHR - load halfword */
5064 case 0xb90c: /* MSGR - multiply single */
5065 case 0xb90f: /* LRVGR - load reversed */
5066 case 0xb914: /* LGFR - load */
5067 case 0xb916: /* LLGFR - load logical */
5068 case 0xb917: /* LLGTR - load logical thirty one bits */
5069 case 0xb91c: /* MSGFR - load */
5070 case 0xb946: /* BCTGR - branch on count */
5071 case 0xb984: /* LLGCR - load logical character */
5072 case 0xb985: /* LLGHR - load logical halfword */
5073 case 0xb9e2: /* LOCGR - load on condition */
5074 /* 64-bit gpr destination */
5075 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5076 return -1;
5077 break;
5078
5079 /* 0xb3ce-0xb3cf undefined */
5080 /* 0xb3e6 undefined */
5081
5082 case 0xb3ea: /* CUXTR - convert to unsigned packed */
5083 case 0xb3eb: /* CSXTR - convert to signed packed */
5084 case 0xb90d: /* DSGR - divide single */
5085 case 0xb91d: /* DSGFR - divide single */
5086 case 0xb986: /* MLGR - multiply logical */
5087 case 0xb987: /* DLGR - divide logical */
5088 /* 64-bit gpr pair destination */
5089 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5090 return -1;
5091 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5092 return -1;
5093 break;
5094
5095 /* 0xb3ee undefined */
5096 /* 0xb3f0 undefined */
5097 /* 0xb3f8 undefined */
5098
5099 /* 0xb905 privileged */
5100
5101 /* 0xb90e unsupported: EREGG */
5102
5103 /* 0xb915 undefined */
5104
5105 case 0xb91e: /* KMAC - compute message authentication code [partial] */
5106 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5107 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5108 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5109 tmp &= 0xff;
5110 switch (tmp)
5111 {
5112 case 0x00: /* KMAC-Query */
5113 if (record_full_arch_list_add_mem (oaddr, 16))
5114 return -1;
5115 break;
5116
5117 case 0x01: /* KMAC-DEA */
5118 case 0x02: /* KMAC-TDEA-128 */
5119 case 0x03: /* KMAC-TDEA-192 */
5120 case 0x09: /* KMAC-Encrypted-DEA */
5121 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
5122 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
5123 if (record_full_arch_list_add_mem (oaddr, 8))
5124 return -1;
5125 break;
5126
5127 case 0x12: /* KMAC-AES-128 */
5128 case 0x13: /* KMAC-AES-192 */
5129 case 0x14: /* KMAC-AES-256 */
5130 case 0x1a: /* KMAC-Encrypted-AES-128 */
5131 case 0x1b: /* KMAC-Encrypted-AES-192 */
5132 case 0x1c: /* KMAC-Encrypted-AES-256 */
5133 if (record_full_arch_list_add_mem (oaddr, 16))
5134 return -1;
5135 break;
5136
5137 default:
5138 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5139 (int)tmp, paddress (gdbarch, addr));
5140 return -1;
5141 }
5142 if (tmp != 0)
5143 {
5144 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5145 return -1;
5146 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5147 return -1;
5148 }
5149 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5150 return -1;
5151 break;
5152
5153 /* 0xb922-0xb924 undefined */
5154 /* 0xb925 privileged */
5155 /* 0xb928 privileged */
5156 /* 0xb929 undefined */
5157
5158 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
5159 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
5160 case 0xb92f: /* KMC - cipher message with chaining [partial] */
5161 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5162 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5163 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5164 tmp &= 0x7f;
5165 switch (tmp)
5166 {
5167 case 0x00: /* KM*-Query */
5168 if (record_full_arch_list_add_mem (oaddr, 16))
5169 return -1;
5170 break;
5171
5172 case 0x01: /* KM*-DEA */
5173 case 0x02: /* KM*-TDEA-128 */
5174 case 0x03: /* KM*-TDEA-192 */
5175 case 0x09: /* KM*-Encrypted-DEA */
5176 case 0x0a: /* KM*-Encrypted-TDEA-128 */
5177 case 0x0b: /* KM*-Encrypted-TDEA-192 */
5178 if (record_full_arch_list_add_mem (oaddr, 8))
5179 return -1;
5180 break;
5181
5182 case 0x12: /* KM*-AES-128 */
5183 case 0x13: /* KM*-AES-192 */
5184 case 0x14: /* KM*-AES-256 */
5185 case 0x1a: /* KM*-Encrypted-AES-128 */
5186 case 0x1b: /* KM*-Encrypted-AES-192 */
5187 case 0x1c: /* KM*-Encrypted-AES-256 */
5188 if (record_full_arch_list_add_mem (oaddr, 16))
5189 return -1;
5190 break;
5191
5192 case 0x43: /* KMC-PRNG */
5193 /* Only valid for KMC. */
5194 if (insn[0] == 0xb92f)
5195 {
5196 if (record_full_arch_list_add_mem (oaddr, 8))
5197 return -1;
5198 break;
5199 }
5200 /* For other instructions, fallthru. */
5201 default:
5202 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
5203 (int)tmp, paddress (gdbarch, addr));
5204 return -1;
5205 }
5206 if (tmp != 0)
5207 {
5208 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5209 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5210 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5211 if (record_full_arch_list_add_mem (oaddr2, tmp))
5212 return -1;
5213 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5214 return -1;
5215 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5216 return -1;
5217 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5218 return -1;
5219 }
5220 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5221 return -1;
5222 break;
5223
5224 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
5225 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5226 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5227 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5228 tmp &= 0x7f;
5229 switch (tmp)
5230 {
5231 case 0x00: /* PCC-Query */
5232 if (record_full_arch_list_add_mem (oaddr, 16))
5233 return -1;
5234 break;
5235
5236 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
5237 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
5238 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
5239 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
5240 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
5241 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
5242 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
5243 return -1;
5244 break;
5245
5246 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
5247 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
5248 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
5249 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
5250 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
5251 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
5252 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
5253 return -1;
5254 break;
5255
5256 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
5257 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
5258 return -1;
5259 break;
5260
5261 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
5262 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
5263 return -1;
5264 break;
5265
5266 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
5267 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
5268 return -1;
5269 break;
5270
5271 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
5272 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
5273 return -1;
5274 break;
5275
5276 default:
5277 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
5278 (int)tmp, paddress (gdbarch, addr));
5279 return -1;
5280 }
5281 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5282 return -1;
5283 break;
5284
5285 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
5286 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5287 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5288 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5289 tmp &= 0x7f;
5290 switch (tmp)
5291 {
5292 case 0x00: /* KMCTR-Query */
5293 if (record_full_arch_list_add_mem (oaddr, 16))
5294 return -1;
5295 break;
5296
5297 case 0x01: /* KMCTR-DEA */
5298 case 0x02: /* KMCTR-TDEA-128 */
5299 case 0x03: /* KMCTR-TDEA-192 */
5300 case 0x09: /* KMCTR-Encrypted-DEA */
5301 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
5302 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
5303 case 0x12: /* KMCTR-AES-128 */
5304 case 0x13: /* KMCTR-AES-192 */
5305 case 0x14: /* KMCTR-AES-256 */
5306 case 0x1a: /* KMCTR-Encrypted-AES-128 */
5307 case 0x1b: /* KMCTR-Encrypted-AES-192 */
5308 case 0x1c: /* KMCTR-Encrypted-AES-256 */
5309 break;
5310
5311 default:
5312 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
5313 (int)tmp, paddress (gdbarch, addr));
5314 return -1;
5315 }
5316 if (tmp != 0)
5317 {
5318 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5319 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5320 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5321 if (record_full_arch_list_add_mem (oaddr2, tmp))
5322 return -1;
5323 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5324 return -1;
5325 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5326 return -1;
5327 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5328 return -1;
5329 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
5330 return -1;
5331 }
5332 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5333 return -1;
5334 break;
5335
5336 case 0xb92e: /* KM - cipher message [partial] */
5337 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5338 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5339 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5340 tmp &= 0x7f;
5341 switch (tmp)
5342 {
5343 case 0x00: /* KM-Query */
5344 if (record_full_arch_list_add_mem (oaddr, 16))
5345 return -1;
5346 break;
5347
5348 case 0x01: /* KM-DEA */
5349 case 0x02: /* KM-TDEA-128 */
5350 case 0x03: /* KM-TDEA-192 */
5351 case 0x09: /* KM-Encrypted-DEA */
5352 case 0x0a: /* KM-Encrypted-TDEA-128 */
5353 case 0x0b: /* KM-Encrypted-TDEA-192 */
5354 case 0x12: /* KM-AES-128 */
5355 case 0x13: /* KM-AES-192 */
5356 case 0x14: /* KM-AES-256 */
5357 case 0x1a: /* KM-Encrypted-AES-128 */
5358 case 0x1b: /* KM-Encrypted-AES-192 */
5359 case 0x1c: /* KM-Encrypted-AES-256 */
5360 break;
5361
5362 case 0x32: /* KM-XTS-AES-128 */
5363 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
5364 return -1;
5365 break;
5366
5367 case 0x34: /* KM-XTS-AES-256 */
5368 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
5369 return -1;
5370 break;
5371
5372 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
5373 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
5374 return -1;
5375 break;
5376
5377 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
5378 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
5379 return -1;
5380 break;
5381
5382 default:
5383 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
5384 (int)tmp, paddress (gdbarch, addr));
5385 return -1;
5386 }
5387 if (tmp != 0)
5388 {
5389 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5390 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5391 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5392 if (record_full_arch_list_add_mem (oaddr2, tmp))
5393 return -1;
5394 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5395 return -1;
5396 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5397 return -1;
5398 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5399 return -1;
5400 }
5401 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5402 return -1;
5403 break;
5404
5405 /* 0xb932-0xb93b undefined */
5406
5407 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
5408 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5409 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5410 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5411 tmp &= 0xff;
5412 switch (tmp)
5413 {
5414 case 0x00: /* PPNO-Query */
5415 case 0x80: /* PPNO-Query */
5416 if (record_full_arch_list_add_mem (oaddr, 16))
5417 return -1;
5418 break;
5419
5420 case 0x03: /* PPNO-SHA-512-DRNG - generate */
5421 if (record_full_arch_list_add_mem (oaddr, 240))
5422 return -1;
5423 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5424 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5425 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5426 if (record_full_arch_list_add_mem (oaddr2, tmp))
5427 return -1;
5428 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5429 return -1;
5430 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5431 return -1;
5432 break;
5433
5434 case 0x83: /* PPNO-SHA-512-DRNG - seed */
5435 if (record_full_arch_list_add_mem (oaddr, 240))
5436 return -1;
5437 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5438 return -1;
5439 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5440 return -1;
5441 break;
5442
5443 default:
5444 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
5445 (int)tmp, paddress (gdbarch, addr));
5446 return -1;
5447 }
5448 /* DXC may be written */
5449 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5450 return -1;
5451 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5452 return -1;
5453 break;
5454
5455 /* 0xb93d undefined */
5456
5457 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
5458 case 0xb93f: /* KLMD - compute last message digest [partial] */
5459 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5460 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5461 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5462 tmp &= 0xff;
5463 switch (tmp)
5464 {
5465 case 0x00: /* K*MD-Query */
5466 if (record_full_arch_list_add_mem (oaddr, 16))
5467 return -1;
5468 break;
5469
5470 case 0x01: /* K*MD-SHA-1 */
5471 if (record_full_arch_list_add_mem (oaddr, 20))
5472 return -1;
5473 break;
5474
5475 case 0x02: /* K*MD-SHA-256 */
5476 if (record_full_arch_list_add_mem (oaddr, 32))
5477 return -1;
5478 break;
5479
5480 case 0x03: /* K*MD-SHA-512 */
5481 if (record_full_arch_list_add_mem (oaddr, 64))
5482 return -1;
5483 break;
5484
5485 case 0x41: /* KIMD-GHASH */
5486 /* Only valid for KIMD. */
5487 if (insn[0] == 0xb93e)
5488 {
5489 if (record_full_arch_list_add_mem (oaddr, 16))
5490 return -1;
5491 break;
5492 }
5493 /* For KLMD, fallthru. */
5494 default:
5495 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5496 (int)tmp, paddress (gdbarch, addr));
5497 return -1;
5498 }
5499 if (tmp != 0)
5500 {
5501 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5502 return -1;
5503 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5504 return -1;
5505 }
5506 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5507 return -1;
5508 break;
5509
5510 /* 0xb940 undefined */
5511 /* 0xb944-0xb945 undefined */
5512 /* 0xb947-0xb948 undefined */
5513 /* 0xb94c-0xb950 undefined */
5514 /* 0xb954-0xb958 undefined */
5515 /* 0xb95c-0xb95f undefined */
5516 /* 0xb962-0xb971 undefined */
5517 /* 0xb974-0xb97f undefined */
5518
5519 case 0xb983: /* FLOGR - find leftmost one */
5520 /* 64-bit gpr pair destination + flags */
5521 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5522 return -1;
5523 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5524 return -1;
5525 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5526 return -1;
5527 break;
5528
5529 /* 0xb98a privileged */
5530 /* 0xb98b-0xb98c undefined */
5531
5532 case 0xb98d: /* EPSW - extract psw */
5533 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5534 return -1;
5535 if (inib[7])
5536 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5537 return -1;
5538 break;
5539
5540 /* 0xb98e-0xb98f privileged */
5541
5542 case 0xb990: /* TRTT - translate two to two [partial] */
5543 case 0xb991: /* TRTO - translate two to one [partial] */
5544 case 0xb992: /* TROT - translate one to two [partial] */
5545 case 0xb993: /* TROO - translate one to one [partial] */
5546 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5547 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5548 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5549 /* tmp is source length, we want destination length. Adjust. */
5550 if (insn[0] == 0xb991)
5551 tmp >>= 1;
5552 if (insn[0] == 0xb992)
5553 tmp <<= 1;
5554 if (record_full_arch_list_add_mem (oaddr, tmp))
5555 return -1;
5556 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5557 return -1;
5558 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5559 return -1;
5560 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5561 return -1;
5562 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5563 return -1;
5564 break;
5565
5566 case 0xb996: /* MLR - multiply logical */
5567 case 0xb997: /* DLR - divide logical */
5568 /* 32-bit gpr pair destination */
5569 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5570 return -1;
5571 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5572 return -1;
5573 break;
5574
5575 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
5576 /* 0xb9b4-0xb9bc undefined */
5577
5578 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
5579 case 0xb9bf: /* TRTE - translate and test extended [partial] */
5580 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5581 return -1;
5582 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5583 return -1;
5584 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5585 return -1;
5586 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5587 return -1;
5588 break;
5589
5590 /* 0xb9c0-0xb9c7 undefined */
5591
5592 case 0xb9c8: /* AHHHR - add high */
5593 case 0xb9c9: /* SHHHR - subtract high */
5594 case 0xb9ca: /* ALHHHR - add logical high */
5595 case 0xb9cb: /* SLHHHR - subtract logical high */
5596 case 0xb9d8: /* AHHLR - add high */
5597 case 0xb9d9: /* SHHLR - subtract high */
5598 case 0xb9da: /* ALHHLR - add logical high */
5599 case 0xb9db: /* SLHHLR - subtract logical high */
5600 /* 32-bit high gpr destination + flags */
5601 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5602 return -1;
5603 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5604 return -1;
5605 break;
5606
5607 /* 0xb9cc undefined */
5608 /* 0xb9ce undefined */
5609 /* 0xb9d0-0xb9d7 undefined */
5610 /* 0xb9dc undefined */
5611 /* 0xb9de undefined */
5612
5613 case 0xb9e0: /* LOCFHR - load high on condition */
5614 /* 32-bit high gpr destination */
5615 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5616 return -1;
5617 break;
5618
5619 /* 0xb9e3 undefined */
5620 /* 0xb9e5 undefined */
5621 /* 0xb9ec-0xb9f1 undefined */
5622 /* 0xb9f3 undefined */
5623 /* 0xb9f5 undefined */
5624 /* 0xb9fc-0xb9ff undefined */
5625
5626 default:
5627 goto UNKNOWN_OP;
5628 }
5629 break;
5630
5631 /* 0xb4-0xb5 undefined */
5632 /* 0xb6 privileged: STCTL - store control */
5633 /* 0xb7 privileged: LCTL - load control */
5634 /* 0xb8 undefined */
5635
5636 case 0xba: /* CS - compare and swap */
5637 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5638 if (record_full_arch_list_add_mem (oaddr, 4))
5639 return -1;
5640 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5641 return -1;
5642 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5643 return -1;
5644 break;
5645
5646 case 0xbb: /* CDS - compare double and swap */
5647 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5648 if (record_full_arch_list_add_mem (oaddr, 8))
5649 return -1;
5650 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5651 return -1;
5652 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5653 return -1;
5654 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5655 return -1;
5656 break;
5657
5658 /* 0xbc undefined */
5659
5660 case 0xbe: /* STCM - store characters under mask */
5661 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5662 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5663 return -1;
5664 break;
5665
5666 case 0xc0:
5667 case 0xc2:
5668 case 0xc4:
5669 case 0xc6:
5670 case 0xcc:
5671 /* RIL-format instruction */
5672 switch (ibyte[0] << 4 | inib[3])
5673 {
5674 case 0xc00: /* LARL - load address relative long */
5675 case 0xc05: /* BRASL - branch relative and save long */
5676 case 0xc09: /* IILF - insert immediate */
5677 case 0xc21: /* MSFI - multiply single immediate */
5678 case 0xc42: /* LLHRL - load logical halfword relative long */
5679 case 0xc45: /* LHRL - load halfword relative long */
5680 case 0xc4d: /* LRL - load relative long */
5681 /* 32-bit or native gpr destination */
5682 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5683 return -1;
5684 break;
5685
5686 case 0xc01: /* LGFI - load immediate */
5687 case 0xc0e: /* LLIHF - load logical immediate */
5688 case 0xc0f: /* LLILF - load logical immediate */
5689 case 0xc20: /* MSGFI - multiply single immediate */
5690 case 0xc44: /* LGHRL - load halfword relative long */
5691 case 0xc46: /* LLGHRL - load logical halfword relative long */
5692 case 0xc48: /* LGRL - load relative long */
5693 case 0xc4c: /* LGFRL - load relative long */
5694 case 0xc4e: /* LLGFRL - load logical relative long */
5695 /* 64-bit gpr destination */
5696 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5697 return -1;
5698 break;
5699
5700 /* 0xc02-0xc03 undefined */
5701
5702 case 0xc04: /* BRCL - branch relative on condition long */
5703 case 0xc62: /* PFDRL - prefetch data relative long */
5704 break;
5705
5706 case 0xc06: /* XIHF - xor immediate */
5707 case 0xc0a: /* NIHF - and immediate */
5708 case 0xc0c: /* OIHF - or immediate */
5709 case 0xcc8: /* AIH - add immediate high */
5710 case 0xcca: /* ALSIH - add logical with signed immediate high */
5711 /* 32-bit high gpr destination + flags */
5712 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5713 return -1;
5714 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5715 return -1;
5716 break;
5717
5718 case 0xc07: /* XILF - xor immediate */
5719 case 0xc0b: /* NILF - and immediate */
5720 case 0xc0d: /* OILF - or immediate */
5721 case 0xc25: /* SLFI - subtract logical immediate */
5722 case 0xc29: /* AFI - add immediate */
5723 case 0xc2b: /* ALFI - add logical immediate */
5724 /* 32-bit gpr destination + flags */
5725 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5726 return -1;
5727 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5728 return -1;
5729 break;
5730
5731 case 0xc08: /* IIHF - insert immediate */
5732 case 0xcc6: /* BRCTH - branch relative on count high */
5733 case 0xccb: /* ALSIHN - add logical with signed immediate high */
5734 /* 32-bit high gpr destination */
5735 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5736 return -1;
5737 break;
5738
5739 /* 0xc22-0xc23 undefined */
5740
5741 case 0xc24: /* SLGFI - subtract logical immediate */
5742 case 0xc28: /* AGFI - add immediate */
5743 case 0xc2a: /* ALGFI - add logical immediate */
5744 /* 64-bit gpr destination + flags */
5745 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5746 return -1;
5747 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5748 return -1;
5749 break;
5750
5751 /* 0xc26-0xc27 undefined */
5752
5753 case 0xc2c: /* CGFI - compare immediate */
5754 case 0xc2d: /* CFI - compare immediate */
5755 case 0xc2e: /* CLGFI - compare logical immediate */
5756 case 0xc2f: /* CLFI - compare logical immediate */
5757 case 0xc64: /* CGHRL - compare halfword relative long */
5758 case 0xc65: /* CHRL - compare halfword relative long */
5759 case 0xc66: /* CLGHRL - compare logical halfword relative long */
5760 case 0xc67: /* CLHRL - compare logical halfword relative long */
5761 case 0xc68: /* CGRL - compare relative long */
5762 case 0xc6a: /* CLGRL - compare logical relative long */
5763 case 0xc6c: /* CGFRL - compare relative long */
5764 case 0xc6d: /* CRL - compare relative long */
5765 case 0xc6e: /* CLGFRL - compare logical relative long */
5766 case 0xc6f: /* CLRL - compare logical relative long */
5767 case 0xccd: /* CIH - compare immediate high */
5768 case 0xccf: /* CLIH - compare logical immediate high */
5769 /* flags only */
5770 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5771 return -1;
5772 break;
5773
5774 /* 0xc40-0xc41 undefined */
5775 /* 0xc43 undefined */
5776
5777 case 0xc47: /* STHRL - store halfword relative long */
5778 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5779 if (record_full_arch_list_add_mem (oaddr, 2))
5780 return -1;
5781 break;
5782
5783 /* 0xc49-0xc4a undefined */
5784
5785 case 0xc4b: /* STGRL - store relative long */
5786 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5787 if (record_full_arch_list_add_mem (oaddr, 8))
5788 return -1;
5789 break;
5790
5791 case 0xc4f: /* STRL - store relative long */
5792 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5793 if (record_full_arch_list_add_mem (oaddr, 4))
5794 return -1;
5795 break;
5796
5797 case 0xc60: /* EXRL - execute relative long */
5798 if (ex != -1)
5799 {
5800 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
5801 paddress (gdbarch, addr));
5802 return -1;
5803 }
5804 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5805 if (inib[2])
5806 {
5807 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5808 ex = tmp & 0xff;
5809 }
5810 else
5811 {
5812 ex = 0;
5813 }
5814 goto ex;
5815
5816 /* 0xc61 undefined */
5817 /* 0xc63 undefined */
5818 /* 0xc69 undefined */
5819 /* 0xc6b undefined */
5820 /* 0xcc0-0xcc5 undefined */
5821 /* 0xcc7 undefined */
5822 /* 0xcc9 undefined */
5823 /* 0xccc undefined */
5824 /* 0xcce undefined */
5825
5826 default:
5827 goto UNKNOWN_OP;
5828 }
5829 break;
5830
5831 /* 0xc1 undefined */
5832 /* 0xc3 undefined */
5833
5834 case 0xc5: /* BPRP - branch prediction relative preload */
5835 case 0xc7: /* BPP - branch prediction preload */
5836 /* no visible effect */
5837 break;
5838
5839 case 0xc8:
5840 /* SSF-format instruction */
5841 switch (ibyte[0] << 4 | inib[3])
5842 {
5843 /* 0xc80 unsupported */
5844
5845 case 0xc81: /* ECTG - extract cpu time */
5846 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5847 return -1;
5848 if (s390_record_gpr_g (gdbarch, regcache, 0))
5849 return -1;
5850 if (s390_record_gpr_g (gdbarch, regcache, 1))
5851 return -1;
5852 break;
5853
5854 case 0xc82: /* CSST - compare and swap and store */
5855 {
5856 uint8_t fc, sc;
5857 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5858 fc = tmp & 0xff;
5859 sc = tmp >> 8 & 0xff;
5860
5861 /* First and third operands. */
5862 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5863 switch (fc)
5864 {
5865 case 0x00: /* 32-bit */
5866 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5867 return -1;
5868 if (record_full_arch_list_add_mem (oaddr, 4))
5869 return -1;
5870 break;
5871
5872 case 0x01: /* 64-bit */
5873 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5874 return -1;
5875 if (record_full_arch_list_add_mem (oaddr, 8))
5876 return -1;
5877 break;
5878
5879 case 0x02: /* 128-bit */
5880 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5881 return -1;
5882 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5883 return -1;
5884 if (record_full_arch_list_add_mem (oaddr, 16))
5885 return -1;
5886 break;
5887
5888 default:
5889 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5890 fc, paddress (gdbarch, addr));
5891 return -1;
5892 }
5893
5894 /* Second operand. */
5895 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5896 if (sc > 4)
5897 {
5898 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5899 sc, paddress (gdbarch, addr));
5900 return -1;
5901 }
5902
5903 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5904 return -1;
5905
5906 /* Flags. */
5907 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5908 return -1;
5909 }
5910 break;
5911
5912 /* 0xc83 undefined */
5913
5914 case 0xc84: /* LPD - load pair disjoint */
5915 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5916 return -1;
5917 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5918 return -1;
5919 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5920 return -1;
5921 break;
5922
5923 case 0xc85: /* LPDG - load pair disjoint */
5924 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5925 return -1;
5926 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5927 return -1;
5928 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5929 return -1;
5930 break;
5931
5932 /* 0xc86-0xc8f undefined */
5933
5934 default:
5935 goto UNKNOWN_OP;
5936 }
5937 break;
5938
5939 /* 0xc9-0xcb undefined */
5940 /* 0xcd-0xcf undefined */
5941
5942 case 0xd0: /* TRTR - translate and test reversed */
5943 case 0xdd: /* TRT - translate and test */
5944 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5945 return -1;
5946 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5947 return -1;
5948 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5949 return -1;
5950 break;
5951
5952 case 0xd1: /* MVN - move numbers */
5953 case 0xd2: /* MVC - move */
5954 case 0xd3: /* MVZ - move zones */
5955 case 0xdc: /* TR - translate */
5956 case 0xe8: /* MVCIN - move inverse */
5957 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5958 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5959 return -1;
5960 break;
5961
5962 case 0xd4: /* NC - and */
5963 case 0xd6: /* OC - or*/
5964 case 0xd7: /* XC - xor */
5965 case 0xe2: /* UNPKU - unpack unicode */
5966 case 0xea: /* UNPKA - unpack ASCII */
5967 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5968 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5969 return -1;
5970 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5971 return -1;
5972 break;
5973
5974 case 0xde: /* ED - edit */
5975 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5976 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5977 return -1;
5978 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5979 return -1;
5980 /* DXC may be written */
5981 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5982 return -1;
5983 break;
5984
5985 case 0xdf: /* EDMK - edit and mark */
5986 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5987 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5988 return -1;
5989 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5990 return -1;
5991 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5992 return -1;
5993 /* DXC may be written */
5994 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5995 return -1;
5996 break;
5997
5998 /* 0xd8 undefined */
5999 /* 0xd9 unsupported: MVCK - move with key */
6000 /* 0xda unsupported: MVCP - move to primary */
6001 /* 0xdb unsupported: MVCS - move to secondary */
6002 /* 0xe0 undefined */
6003
6004 case 0xe1: /* PKU - pack unicode */
6005 case 0xe9: /* PKA - pack ASCII */
6006 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6007 if (record_full_arch_list_add_mem (oaddr, 16))
6008 return -1;
6009 break;
6010
6011 case 0xe3:
6012 case 0xe7:
6013 case 0xeb:
6014 case 0xed:
6015 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
6016 switch (ibyte[0] << 8 | ibyte[5])
6017 {
6018 /* 0xe300-0xe301 undefined */
6019
6020 case 0xe302: /* LTG - load and test */
6021 case 0xe308: /* AG - add */
6022 case 0xe309: /* SG - subtract */
6023 case 0xe30a: /* ALG - add logical */
6024 case 0xe30b: /* SLG - subtract logical */
6025 case 0xe318: /* AGF - add */
6026 case 0xe319: /* SGF - subtract */
6027 case 0xe31a: /* ALGF - add logical */
6028 case 0xe31b: /* SLGF - subtract logical */
6029 case 0xe332: /* LTGF - load and test */
6030 case 0xe380: /* NG - and */
6031 case 0xe381: /* OG - or */
6032 case 0xe382: /* XG - xor */
6033 case 0xe388: /* ALCG - add logical with carry */
6034 case 0xe389: /* SLBG - subtract logical with borrow */
6035 case 0xeb0a: /* SRAG - shift right single */
6036 case 0xeb0b: /* SLAG - shift left single */
6037 /* 64-bit gpr destination + flags */
6038 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6039 return -1;
6040 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6041 return -1;
6042 break;
6043
6044 /* 0xe303 privileged */
6045
6046 case 0xe304: /* LG - load */
6047 case 0xe30c: /* MSG - multiply single */
6048 case 0xe30f: /* LRVG - load reversed */
6049 case 0xe314: /* LGF - load */
6050 case 0xe315: /* LGH - load halfword */
6051 case 0xe316: /* LLGF - load logical */
6052 case 0xe317: /* LLGT - load logical thirty one bits */
6053 case 0xe31c: /* MSGF - multiply single */
6054 case 0xe32a: /* LZRG - load and zero rightmost byte */
6055 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
6056 case 0xe346: /* BCTG - branch on count */
6057 case 0xe377: /* LGB - load byte */
6058 case 0xe390: /* LLGC - load logical character */
6059 case 0xe391: /* LLGH - load logical halfword */
6060 case 0xeb0c: /* SRLG - shift right single logical */
6061 case 0xeb0d: /* SLLG - shift left single logical */
6062 case 0xeb1c: /* RLLG - rotate left single logical */
6063 case 0xeb44: /* BXHG - branch on index high */
6064 case 0xeb45: /* BXLEG - branch on index low or equal */
6065 case 0xeb4c: /* ECAG - extract cpu attribute */
6066 case 0xebe2: /* LOCG - load on condition */
6067 /* 64-bit gpr destination */
6068 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6069 return -1;
6070 break;
6071
6072 /* 0xe305 undefined */
6073
6074 case 0xe306: /* CVBY - convert to binary */
6075 /* 32-bit or native gpr destination + FPC (DXC write) */
6076 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6077 return -1;
6078 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6079 return -1;
6080 break;
6081
6082 /* 0xe307 undefined */
6083
6084 case 0xe30d: /* DSG - divide single */
6085 case 0xe31d: /* DSGF - divide single */
6086 case 0xe386: /* MLG - multiply logical */
6087 case 0xe387: /* DLG - divide logical */
6088 case 0xe38f: /* LPQ - load pair from quadword */
6089 /* 64-bit gpr pair destination */
6090 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6091 return -1;
6092 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6093 return -1;
6094 break;
6095
6096 case 0xe30e: /* CVBG - convert to binary */
6097 /* 64-bit gpr destination + FPC (DXC write) */
6098 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6099 return -1;
6100 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6101 return -1;
6102 break;
6103
6104 /* 0xe310-0xe311 undefined */
6105
6106 case 0xe312: /* LT - load and test */
6107 case 0xe354: /* NY - and */
6108 case 0xe356: /* OY - or */
6109 case 0xe357: /* XY - xor */
6110 case 0xe35a: /* AY - add */
6111 case 0xe35b: /* SY - subtract */
6112 case 0xe35e: /* ALY - add logical */
6113 case 0xe35f: /* SLY - subtract logical */
6114 case 0xe37a: /* AHY - add halfword */
6115 case 0xe37b: /* SHY - subtract halfword */
6116 case 0xe398: /* ALC - add logical with carry */
6117 case 0xe399: /* SLB - subtract logical with borrow */
6118 case 0xe727: /* LCBB - load count to block bounduary */
6119 case 0xeb81: /* ICMY - insert characters under mask */
6120 case 0xebdc: /* SRAK - shift left single */
6121 case 0xebdd: /* SLAK - shift left single */
6122 /* 32-bit gpr destination + flags */
6123 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6124 return -1;
6125 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6126 return -1;
6127 break;
6128
6129 /* 0xe313 privileged */
6130
6131 case 0xe31e: /* LRV - load reversed */
6132 case 0xe31f: /* LRVH - load reversed */
6133 case 0xe33b: /* LZRF - load and zero rightmost byte */
6134 case 0xe351: /* MSY - multiply single */
6135 case 0xe358: /* LY - load */
6136 case 0xe371: /* LAY - load address */
6137 case 0xe373: /* ICY - insert character */
6138 case 0xe376: /* LB - load byte */
6139 case 0xe378: /* LHY - load */
6140 case 0xe37c: /* MHY - multiply halfword */
6141 case 0xe394: /* LLC - load logical character */
6142 case 0xe395: /* LLH - load logical halfword */
6143 case 0xeb1d: /* RLL - rotate left single logical */
6144 case 0xebde: /* SRLK - shift left single logical */
6145 case 0xebdf: /* SLLK - shift left single logical */
6146 case 0xebf2: /* LOC - load on condition */
6147 /* 32-bit or native gpr destination */
6148 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6149 return -1;
6150 break;
6151
6152 case 0xe320: /* CG - compare */
6153 case 0xe321: /* CLG - compare logical */
6154 case 0xe330: /* CGF - compare */
6155 case 0xe331: /* CLGF - compare logical */
6156 case 0xe334: /* CGH - compare halfword */
6157 case 0xe355: /* CLY - compare logical */
6158 case 0xe359: /* CY - compare */
6159 case 0xe379: /* CHY - compare halfword */
6160 case 0xe3cd: /* CHF - compare high */
6161 case 0xe3cf: /* CLHF - compare logical high */
6162 case 0xeb20: /* CLMH - compare logical under mask high */
6163 case 0xeb21: /* CLMY - compare logical under mask */
6164 case 0xeb51: /* TMY - test under mask */
6165 case 0xeb55: /* CLIY - compare logical */
6166 case 0xebc0: /* TP - test decimal */
6167 case 0xed10: /* TCEB - test data class */
6168 case 0xed11: /* TCDB - test data class */
6169 case 0xed12: /* TCXB - test data class */
6170 case 0xed50: /* TDCET - test data class */
6171 case 0xed51: /* TDGET - test data group */
6172 case 0xed54: /* TDCDT - test data class */
6173 case 0xed55: /* TDGDT - test data group */
6174 case 0xed58: /* TDCXT - test data class */
6175 case 0xed59: /* TDGXT - test data group */
6176 /* flags only */
6177 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6178 return -1;
6179 break;
6180
6181 /* 0xe322-0xe323 undefined */
6182
6183 case 0xe324: /* STG - store */
6184 case 0xe325: /* NTSTG - nontransactional store */
6185 case 0xe326: /* CVDY - convert to decimal */
6186 case 0xe32f: /* STRVG - store reversed */
6187 case 0xebe3: /* STOCG - store on condition */
6188 case 0xed67: /* STDY - store */
6189 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6190 if (record_full_arch_list_add_mem (oaddr, 8))
6191 return -1;
6192 break;
6193
6194 /* 0xe327-0xe329 undefined */
6195 /* 0xe32b-0xe32d undefined */
6196
6197 case 0xe32e: /* CVDG - convert to decimal */
6198 case 0xe38e: /* STPQ - store pair to quadword */
6199 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6200 if (record_full_arch_list_add_mem (oaddr, 16))
6201 return -1;
6202 break;
6203
6204 /* 0xe333 undefined */
6205 /* 0xe335 undefined */
6206
6207 case 0xe336: /* PFD - prefetch data */
6208 break;
6209
6210 /* 0xe337-0xe339 undefined */
6211 /* 0xe33c-0xe33d undefined */
6212
6213 case 0xe33e: /* STRV - store reversed */
6214 case 0xe350: /* STY - store */
6215 case 0xe3cb: /* STFH - store high */
6216 case 0xebe1: /* STOCFH - store high on condition */
6217 case 0xebf3: /* STOC - store on condition */
6218 case 0xed66: /* STEY - store */
6219 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6220 if (record_full_arch_list_add_mem (oaddr, 4))
6221 return -1;
6222 break;
6223
6224 case 0xe33f: /* STRVH - store reversed */
6225 case 0xe370: /* STHY - store halfword */
6226 case 0xe3c7: /* STHH - store halfword high */
6227 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6228 if (record_full_arch_list_add_mem (oaddr, 2))
6229 return -1;
6230 break;
6231
6232 /* 0xe340-0xe345 undefined */
6233 /* 0xe347-0xe34f undefined */
6234 /* 0xe352-0xe353 undefined */
6235
6236 case 0xe35c: /* MFY - multiply */
6237 case 0xe396: /* ML - multiply logical */
6238 case 0xe397: /* DL - divide logical */
6239 /* 32-bit gpr pair destination */
6240 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6241 return -1;
6242 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6243 return -1;
6244 break;
6245
6246 /* 0xe35d undefined */
6247 /* 0xe360-0xe36f undefined */
6248
6249 case 0xe372: /* STCY - store character */
6250 case 0xe3c3: /* STCH - store character high */
6251 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6252 if (record_full_arch_list_add_mem (oaddr, 1))
6253 return -1;
6254 break;
6255
6256 /* 0xe374 undefined */
6257
6258 case 0xe375: /* LAEY - load address extended */
6259 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6260 return -1;
6261 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
6262 return -1;
6263 break;
6264
6265 /* 0xe37d-0xe37f undefined */
6266 /* 0xe383-0xe384 undefined */
6267
6268 case 0xe385: /* LGAT - load and trap */
6269 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
6270 case 0xe39d: /* LLGFAT - load logical and trap */
6271 case 0xe721: /* VLGV - vector load gr from vr element */
6272 /* 64-bit gpr destination + fpc for possible DXC write */
6273 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6274 return -1;
6275 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6276 return -1;
6277 break;
6278
6279 /* 0xe38a-0xe38d undefined */
6280 /* 0xe392-0xe393 undefined */
6281 /* 0xe39a-0xe39b undefined */
6282 /* 0xe39e undefined */
6283
6284 case 0xe39f: /* LAT - load and trap */
6285 /* 32-bit gpr destination + fpc for possible DXC write */
6286 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6287 return -1;
6288 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6289 return -1;
6290 break;
6291
6292 /* 0xe3a0-0xe3bf undefined */
6293
6294 case 0xe3c0: /* LBH - load byte high */
6295 case 0xe3c2: /* LLCH - load logical character high */
6296 case 0xe3c4: /* LHH - load halfword high */
6297 case 0xe3c6: /* LLHH - load logical halfword high */
6298 case 0xe3ca: /* LFH - load high */
6299 case 0xebe0: /* LOCFH - load high on condition */
6300 /* 32-bit high gpr destination */
6301 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6302 return -1;
6303 break;
6304
6305 /* 0xe3c1 undefined */
6306 /* 0xe3c5 undefined */
6307
6308 case 0xe3c8: /* LFHAT - load high and trap */
6309 /* 32-bit high gpr destination + fpc for possible DXC write */
6310 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6311 return -1;
6312 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6313 return -1;
6314 break;
6315
6316 /* 0xe3c9 undefined */
6317 /* 0xe3cc undefined */
6318 /* 0xe3ce undefined */
6319 /* 0xe3d0-0xe3ff undefined */
6320
6321 case 0xe700: /* VLEB - vector load element */
6322 case 0xe701: /* VLEH - vector load element */
6323 case 0xe702: /* VLEG - vector load element */
6324 case 0xe703: /* VLEF - vector load element */
6325 case 0xe704: /* VLLEZ - vector load logical element and zero */
6326 case 0xe705: /* VLREP - vector load and replicate */
6327 case 0xe706: /* VL - vector load */
6328 case 0xe707: /* VLBB - vector load to block bounduary */
6329 case 0xe712: /* VGEG - vector gather element */
6330 case 0xe713: /* VGEF - vector gather element */
6331 case 0xe722: /* VLVG - vector load vr element from gr */
6332 case 0xe730: /* VESL - vector element shift left */
6333 case 0xe733: /* VERLL - vector element rotate left logical */
6334 case 0xe737: /* VLL - vector load with length */
6335 case 0xe738: /* VESRL - vector element shift right logical */
6336 case 0xe73a: /* VESRA - vector element shift right arithmetic */
6337 case 0xe740: /* VLEIB - vector load element immediate */
6338 case 0xe741: /* VLEIH - vector load element immediate */
6339 case 0xe742: /* VLEIG - vector load element immediate */
6340 case 0xe743: /* VLEIF - vector load element immediate */
6341 case 0xe744: /* VGBM - vector generate byte mask */
6342 case 0xe745: /* VREPI - vector replicate immediate */
6343 case 0xe746: /* VGM - vector generate mask */
6344 case 0xe74d: /* VREP - vector replicate */
6345 case 0xe750: /* VPOPCT - vector population count */
6346 case 0xe752: /* VCTZ - vector count trailing zeros */
6347 case 0xe753: /* VCLZ - vector count leading zeros */
6348 case 0xe756: /* VLR - vector load */
6349 case 0xe75f: /* VSEG -vector sign extend to doubleword */
6350 case 0xe760: /* VMRL - vector merge low */
6351 case 0xe761: /* VMRH - vector merge high */
6352 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
6353 case 0xe764: /* VSUM - vector sum across word */
6354 case 0xe765: /* VSUMG - vector sum across doubleword */
6355 case 0xe766: /* VCKSM - vector checksum */
6356 case 0xe767: /* VSUMQ - vector sum across quadword */
6357 case 0xe768: /* VN - vector and */
6358 case 0xe769: /* VNC - vector and with complement */
6359 case 0xe76a: /* VO - vector or */
6360 case 0xe76b: /* VNO - vector nor */
6361 case 0xe76d: /* VX - vector xor */
6362 case 0xe770: /* VESLV - vector element shift left */
6363 case 0xe772: /* VERIM - vector element rotate and insert under mask */
6364 case 0xe773: /* VERLLV - vector element rotate left logical */
6365 case 0xe774: /* VSL - vector shift left */
6366 case 0xe775: /* VSLB - vector shift left by byte */
6367 case 0xe777: /* VSLDB - vector shift left double by byte */
6368 case 0xe778: /* VESRLV - vector element shift right logical */
6369 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
6370 case 0xe77c: /* VSRL - vector shift right logical */
6371 case 0xe77d: /* VSRLB - vector shift right logical by byte */
6372 case 0xe77e: /* VSRA - vector shift right arithmetic */
6373 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
6374 case 0xe784: /* VPDI - vector permute doubleword immediate */
6375 case 0xe78c: /* VPERM - vector permute */
6376 case 0xe78d: /* VSEL - vector select */
6377 case 0xe78e: /* VFMS - vector fp multiply and subtract */
6378 case 0xe78f: /* VFMA - vector fp multiply and add */
6379 case 0xe794: /* VPK - vector pack */
6380 case 0xe7a1: /* VMLH - vector multiply logical high */
6381 case 0xe7a2: /* VML - vector multiply low */
6382 case 0xe7a3: /* VMH - vector multiply high */
6383 case 0xe7a4: /* VMLE - vector multiply logical even */
6384 case 0xe7a5: /* VMLO - vector multiply logical odd */
6385 case 0xe7a6: /* VME - vector multiply even */
6386 case 0xe7a7: /* VMO - vector multiply odd */
6387 case 0xe7a9: /* VMALH - vector multiply and add logical high */
6388 case 0xe7aa: /* VMAL - vector multiply and add low */
6389 case 0xe7ab: /* VMAH - vector multiply and add high */
6390 case 0xe7ac: /* VMALE - vector multiply and add logical even */
6391 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
6392 case 0xe7ae: /* VMAE - vector multiply and add even */
6393 case 0xe7af: /* VMAO - vector multiply and add odd */
6394 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
6395 case 0xe7b9: /* VACCC - vector add with carry compute carry */
6396 case 0xe7bb: /* VAC - vector add with carry */
6397 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
6398 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
6399 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
6400 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
6401 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
6402 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
6403 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
6404 case 0xe7c4: /* VLDE - vector fp load lengthened */
6405 case 0xe7c5: /* VLED - vector fp load rounded */
6406 case 0xe7c7: /* VFI - vector load fp integer */
6407 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
6408 case 0xe7ce: /* VFSQ - vector fp square root */
6409 case 0xe7d4: /* VUPLL - vector unpack logical low */
6410 case 0xe7d6: /* VUPL - vector unpack low */
6411 case 0xe7d5: /* VUPLH - vector unpack logical high */
6412 case 0xe7d7: /* VUPH - vector unpack high */
6413 case 0xe7de: /* VLC - vector load complement */
6414 case 0xe7df: /* VLP - vector load positive */
6415 case 0xe7e2: /* VFA - vector fp subtract */
6416 case 0xe7e3: /* VFA - vector fp add */
6417 case 0xe7e5: /* VFD - vector fp divide */
6418 case 0xe7e7: /* VFM - vector fp multiply */
6419 case 0xe7f0: /* VAVGL - vector average logical */
6420 case 0xe7f1: /* VACC - vector add and compute carry */
6421 case 0xe7f2: /* VAVG - vector average */
6422 case 0xe7f3: /* VA - vector add */
6423 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
6424 case 0xe7f7: /* VS - vector subtract */
6425 case 0xe7fc: /* VMNL - vector minimum logical */
6426 case 0xe7fd: /* VMXL - vector maximum logical */
6427 case 0xe7fe: /* VMN - vector minimum */
6428 case 0xe7ff: /* VMX - vector maximum */
6429 /* vector destination + FPC */
6430 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6431 return -1;
6432 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6433 return -1;
6434 break;
6435
6436 case 0xe708: /* VSTEB - vector store element */
6437 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6438 if (record_full_arch_list_add_mem (oaddr, 1))
6439 return -1;
6440 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6441 return -1;
6442 break;
6443
6444 case 0xe709: /* VSTEH - vector store element */
6445 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6446 if (record_full_arch_list_add_mem (oaddr, 2))
6447 return -1;
6448 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6449 return -1;
6450 break;
6451
6452 case 0xe70a: /* VSTEG - vector store element */
6453 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6454 if (record_full_arch_list_add_mem (oaddr, 8))
6455 return -1;
6456 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6457 return -1;
6458 break;
6459
6460 case 0xe70b: /* VSTEF - vector store element */
6461 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6462 if (record_full_arch_list_add_mem (oaddr, 4))
6463 return -1;
6464 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6465 return -1;
6466 break;
6467
6468 /* 0xe70c-0xe70d undefined */
6469
6470 case 0xe70e: /* VST - vector store */
6471 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6472 if (record_full_arch_list_add_mem (oaddr, 16))
6473 return -1;
6474 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6475 return -1;
6476 break;
6477
6478 /* 0xe70f-0xe711 undefined */
6479 /* 0xe714-0xe719 undefined */
6480
6481 case 0xe71a: /* VSCEG - vector scatter element */
6482 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
6483 return -1;
6484 if (record_full_arch_list_add_mem (oaddr, 8))
6485 return -1;
6486 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6487 return -1;
6488 break;
6489
6490 case 0xe71b: /* VSCEF - vector scatter element */
6491 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
6492 return -1;
6493 if (record_full_arch_list_add_mem (oaddr, 4))
6494 return -1;
6495 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6496 return -1;
6497 break;
6498
6499 /* 0xe71c-0xe720 undefined */
6500 /* 0xe723-0xe726 undefined */
6501 /* 0xe728-0xe72f undefined */
6502 /* 0xe731-0xe732 undefined */
6503 /* 0xe734-0xe735 undefined */
6504
6505 case 0xe736: /* VLM - vector load multiple */
6506 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
6507 if (s390_record_vr (gdbarch, regcache, i))
6508 return -1;
6509 if (s390_record_vr (gdbarch, regcache, ivec[1]))
6510 return -1;
6511 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6512 return -1;
6513 break;
6514
6515 /* 0xe739 undefined */
6516 /* 0xe73b-0xe73d undefined */
6517
6518 case 0xe73e: /* VSTM - vector store multiple */
6519 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6520 if (ivec[0] <= ivec[1])
6521 n = ivec[1] - ivec[0] + 1;
6522 else
6523 n = ivec[1] + 0x20 - ivec[0] + 1;
6524 if (record_full_arch_list_add_mem (oaddr, n * 16))
6525 return -1;
6526 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6527 return -1;
6528 break;
6529
6530 case 0xe73f: /* VSTL - vector store with length */
6531 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6532 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
6533 tmp &= 0xffffffffu;
6534 if (tmp > 16)
6535 tmp = 16;
6536 if (record_full_arch_list_add_mem (oaddr, tmp))
6537 return -1;
6538 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6539 return -1;
6540 break;
6541
6542 /* 0xe747-0xe749 undefined */
6543
6544 case 0xe74a: /* VFTCI - vector fp test data class immediate */
6545 case 0xe75c: /* VISTR - vector isolate string */
6546 case 0xe780: /* VFEE - vector find element equal */
6547 case 0xe781: /* VFENE - vector find element not equal */
6548 case 0xe782: /* VFA - vector find any element equal */
6549 case 0xe78a: /* VSTRC - vector string range compare */
6550 case 0xe795: /* VPKLS - vector pack logical saturate */
6551 case 0xe797: /* VPKS - vector pack saturate */
6552 case 0xe7e8: /* VFCE - vector fp compare equal */
6553 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
6554 case 0xe7eb: /* VFCE - vector fp compare high */
6555 case 0xe7f8: /* VCEQ - vector compare equal */
6556 case 0xe7f9: /* VCHL - vector compare high logical */
6557 case 0xe7fb: /* VCH - vector compare high */
6558 /* vector destination + flags + FPC */
6559 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6560 return -1;
6561 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6562 return -1;
6563 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6564 return -1;
6565 break;
6566
6567 /* 0xe74b-0xe74c undefined */
6568 /* 0xe74e-0xe74f undefined */
6569 /* 0xe751 undefined */
6570 /* 0xe754-0xe755 undefined */
6571 /* 0xe757-0xe75b undefined */
6572 /* 0xe75d-0xe75e undefined */
6573 /* 0xe763 undefined */
6574 /* 0xe76c undefined */
6575 /* 0xe76e-0xe76f undefined */
6576 /* 0xe771 undefined */
6577 /* 0xe776 undefined */
6578 /* 0xe779 undefined */
6579 /* 0xe77b undefined */
6580 /* 0xe783 undefined */
6581 /* 0xe785-0xe789 undefined */
6582 /* 0xe78b undefined */
6583 /* 0xe790-0xe793 undefined */
6584 /* 0xe796 undefined */
6585 /* 0xe798-0xe7a0 undefined */
6586 /* 0xe7a8 undefined */
6587 /* 0xe7b0-0xe7b3 undefined */
6588 /* 0xe7b5-0xe7b8 undefined */
6589 /* 0xe7ba undefined */
6590 /* 0xe7be undefined */
6591 /* 0xe7c6 undefined */
6592 /* 0xe7c8-0xe7c9 undefined */
6593
6594 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
6595 case 0xe7cb: /* WFC - vector fp compare scalar */
6596 case 0xe7d8: /* VTM - vector test under mask */
6597 case 0xe7d9: /* VECL - vector element compare logical */
6598 case 0xe7db: /* VEC - vector element compare */
6599 case 0xed08: /* KEB - compare and signal */
6600 case 0xed09: /* CEB - compare */
6601 case 0xed18: /* KDB - compare and signal */
6602 case 0xed19: /* CDB - compare */
6603 /* flags + fpc only */
6604 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6605 return -1;
6606 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6607 return -1;
6608 break;
6609
6610 /* 0xe7cd undefined */
6611 /* 0xe7cf-0xe7d3 undefined */
6612 /* 0xe7da undefined */
6613 /* 0xe7dc-0xe7dd undefined */
6614 /* 0xe7e0-0xe7e1 undefined */
6615 /* 0xe7e4 undefined */
6616 /* 0xe7e6 undefined */
6617 /* 0xe7e9 undefined */
6618 /* 0xe7ec-0xe7ef undefined */
6619 /* 0xe7f4 undefined */
6620 /* 0xe7f6 undefined */
6621 /* 0xe7fa undefined */
6622
6623 /* 0xeb00-0xeb03 undefined */
6624
6625 case 0xeb04: /* LMG - load multiple */
6626 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6627 if (s390_record_gpr_g (gdbarch, regcache, i))
6628 return -1;
6629 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6630 return -1;
6631 break;
6632
6633 /* 0xeb05-0xeb09 undefined */
6634 /* 0xeb0e undefined */
6635 /* 0xeb0f privileged: TRACG */
6636 /* 0xeb10-0xeb13 undefined */
6637
6638 case 0xeb14: /* CSY - compare and swap */
6639 case 0xebf4: /* LAN - load and and */
6640 case 0xebf6: /* LAO - load and or */
6641 case 0xebf7: /* LAX - load and xor */
6642 case 0xebf8: /* LAA - load and add */
6643 case 0xebfa: /* LAAL - load and add logical */
6644 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6645 if (record_full_arch_list_add_mem (oaddr, 4))
6646 return -1;
6647 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6648 return -1;
6649 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6650 return -1;
6651 break;
6652
6653 /* 0xeb15-0xeb1b undefined */
6654 /* 0xeb1e-0xeb1f undefined */
6655 /* 0xeb22 undefined */
6656
6657 case 0xeb23: /* CLT - compare logical and trap */
6658 case 0xeb2b: /* CLGT - compare logical and trap */
6659 /* fpc only - including possible DXC write for trapping insns */
6660 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6661 return -1;
6662 break;
6663
6664 case 0xeb24: /* STMG - store multiple */
6665 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6666 if (inib[2] <= inib[3])
6667 n = inib[3] - inib[2] + 1;
6668 else
6669 n = inib[3] + 0x10 - inib[2] + 1;
6670 if (record_full_arch_list_add_mem (oaddr, n * 8))
6671 return -1;
6672 break;
6673
6674 /* 0xeb25 privileged */
6675
6676 case 0xeb26: /* STMH - store multiple high */
6677 case 0xeb90: /* STMY - store multiple */
6678 case 0xeb9b: /* STAMY - store access multiple */
6679 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6680 if (inib[2] <= inib[3])
6681 n = inib[3] - inib[2] + 1;
6682 else
6683 n = inib[3] + 0x10 - inib[2] + 1;
6684 if (record_full_arch_list_add_mem (oaddr, n * 4))
6685 return -1;
6686 break;
6687
6688 /* 0xeb27-0xeb2a undefined */
6689
6690 case 0xeb2c: /* STCMH - store characters under mask */
6691 case 0xeb2d: /* STCMY - store characters under mask */
6692 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6693 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
6694 return -1;
6695 break;
6696
6697 /* 0xeb2e undefined */
6698 /* 0xeb2f privileged */
6699
6700 case 0xeb30: /* CSG - compare and swap */
6701 case 0xebe4: /* LANG - load and and */
6702 case 0xebe6: /* LAOG - load and or */
6703 case 0xebe7: /* LAXG - load and xor */
6704 case 0xebe8: /* LAAG - load and add */
6705 case 0xebea: /* LAALG - load and add logical */
6706 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6707 if (record_full_arch_list_add_mem (oaddr, 8))
6708 return -1;
6709 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6710 return -1;
6711 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6712 return -1;
6713 break;
6714
6715 case 0xeb31: /* CDSY - compare double and swap */
6716 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6717 if (record_full_arch_list_add_mem (oaddr, 8))
6718 return -1;
6719 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6720 return -1;
6721 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6722 return -1;
6723 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6724 return -1;
6725 break;
6726
6727 /* 0xeb32-0xeb3d undefined */
6728
6729 case 0xeb3e: /* CDSG - compare double and swap */
6730 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6731 if (record_full_arch_list_add_mem (oaddr, 16))
6732 return -1;
6733 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6734 return -1;
6735 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6736 return -1;
6737 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6738 return -1;
6739 break;
6740
6741 /* 0xeb3f-0xeb43 undefined */
6742 /* 0xeb46-0xeb4b undefined */
6743 /* 0xeb4d-0xeb50 undefined */
6744
6745 case 0xeb52: /* MVIY - move */
6746 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6747 if (record_full_arch_list_add_mem (oaddr, 1))
6748 return -1;
6749 break;
6750
6751 case 0xeb54: /* NIY - and */
6752 case 0xeb56: /* OIY - or */
6753 case 0xeb57: /* XIY - xor */
6754 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6755 if (record_full_arch_list_add_mem (oaddr, 1))
6756 return -1;
6757 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6758 return -1;
6759 break;
6760
6761 /* 0xeb53 undefined */
6762 /* 0xeb58-0xeb69 undefined */
6763
6764 case 0xeb6a: /* ASI - add immediate */
6765 case 0xeb6e: /* ALSI - add immediate */
6766 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6767 if (record_full_arch_list_add_mem (oaddr, 4))
6768 return -1;
6769 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6770 return -1;
6771 break;
6772
6773 /* 0xeb6b-0xeb6d undefined */
6774 /* 0xeb6f-0xeb79 undefined */
6775
6776 case 0xeb7a: /* AGSI - add immediate */
6777 case 0xeb7e: /* ALGSI - add immediate */
6778 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6779 if (record_full_arch_list_add_mem (oaddr, 8))
6780 return -1;
6781 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6782 return -1;
6783 break;
6784
6785 /* 0xeb7b-0xeb7d undefined */
6786 /* 0xeb7f undefined */
6787
6788 case 0xeb80: /* ICMH - insert characters under mask */
6789 /* 32-bit high gpr destination + flags */
6790 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6791 return -1;
6792 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6793 return -1;
6794 break;
6795
6796 /* 0xeb82-0xeb8d undefined */
6797
6798 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6799 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6800 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6801 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6802 if (record_full_arch_list_add_mem (oaddr, tmp))
6803 return -1;
6804 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6805 return -1;
6806 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6807 return -1;
6808 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6809 return -1;
6810 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6811 return -1;
6812 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6813 return -1;
6814 break;
6815
6816 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6817 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6818 return -1;
6819 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6820 return -1;
6821 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6822 return -1;
6823 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6824 return -1;
6825 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6826 return -1;
6827 break;
6828
6829 /* 0xeb91-0xeb95 undefined */
6830
6831 case 0xeb96: /* LMH - load multiple high */
6832 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6833 if (s390_record_gpr_h (gdbarch, regcache, i))
6834 return -1;
6835 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6836 return -1;
6837 break;
6838
6839 /* 0xeb97 undefined */
6840
6841 case 0xeb98: /* LMY - load multiple */
6842 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6843 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6844 return -1;
6845 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6846 return -1;
6847 break;
6848
6849 /* 0xeb99 undefined */
6850
6851 case 0xeb9a: /* LAMY - load access multiple */
6852 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6853 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6854 return -1;
6855 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6856 return -1;
6857 break;
6858
6859 /* 0xeb9c-0xebbf undefined */
6860 /* 0xebc1-0xebdb undefined */
6861 /* 0xebe5 undefined */
6862 /* 0xebe9 undefined */
6863 /* 0xebeb-0xebf1 undefined */
6864 /* 0xebf5 undefined */
6865 /* 0xebf9 undefined */
6866 /* 0xebfb-0xebff undefined */
6867
6868 /* 0xed00-0xed03 undefined */
6869
6870 case 0xed04: /* LDEB - load lengthened */
6871 case 0xed0c: /* MDEB - multiply */
6872 case 0xed0d: /* DEB - divide */
6873 case 0xed14: /* SQEB - square root */
6874 case 0xed15: /* SQDB - square root */
6875 case 0xed17: /* MEEB - multiply */
6876 case 0xed1c: /* MDB - multiply */
6877 case 0xed1d: /* DDB - divide */
6878 /* float destination + fpc */
6879 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6880 return -1;
6881 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6882 return -1;
6883 break;
6884
6885 case 0xed05: /* LXDB - load lengthened */
6886 case 0xed06: /* LXEB - load lengthened */
6887 case 0xed07: /* MXDB - multiply */
6888 /* float pair destination + fpc */
6889 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6890 return -1;
6891 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6892 return -1;
6893 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6894 return -1;
6895 break;
6896
6897 case 0xed0a: /* AEB - add */
6898 case 0xed0b: /* SEB - subtract */
6899 case 0xed1a: /* ADB - add */
6900 case 0xed1b: /* SDB - subtract */
6901 /* float destination + flags + fpc */
6902 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6903 return -1;
6904 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6905 return -1;
6906 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6907 return -1;
6908 break;
6909
6910 case 0xed0e: /* MAEB - multiply and add */
6911 case 0xed0f: /* MSEB - multiply and subtract */
6912 case 0xed1e: /* MADB - multiply and add */
6913 case 0xed1f: /* MSDB - multiply and subtract */
6914 case 0xed40: /* SLDT - shift significand left */
6915 case 0xed41: /* SRDT - shift significand right */
6916 case 0xedaa: /* CDZT - convert from zoned */
6917 case 0xedae: /* CDPT - convert from packed */
6918 /* float destination [RXF] + fpc */
6919 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6920 return -1;
6921 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6922 return -1;
6923 break;
6924
6925 /* 0xed13 undefined */
6926 /* 0xed16 undefined */
6927 /* 0xed20-0xed23 undefined */
6928
6929 case 0xed24: /* LDE - load lengthened */
6930 case 0xed34: /* SQE - square root */
6931 case 0xed35: /* SQD - square root */
6932 case 0xed37: /* MEE - multiply */
6933 case 0xed64: /* LEY - load */
6934 case 0xed65: /* LDY - load */
6935 /* float destination */
6936 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6937 return -1;
6938 break;
6939
6940 case 0xed25: /* LXD - load lengthened */
6941 case 0xed26: /* LXE - load lengthened */
6942 /* float pair destination */
6943 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6944 return -1;
6945 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6946 return -1;
6947 break;
6948
6949 /* 0xed27-0xed2d undefined */
6950
6951 case 0xed2e: /* MAE - multiply and add */
6952 case 0xed2f: /* MSE - multiply and subtract */
6953 case 0xed38: /* MAYL - multiply and add unnormalized */
6954 case 0xed39: /* MYL - multiply unnormalized */
6955 case 0xed3c: /* MAYH - multiply and add unnormalized */
6956 case 0xed3d: /* MYH - multiply unnormalized */
6957 case 0xed3e: /* MAD - multiply and add */
6958 case 0xed3f: /* MSD - multiply and subtract */
6959 /* float destination [RXF] */
6960 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6961 return -1;
6962 break;
6963
6964 /* 0xed30-0xed33 undefined */
6965 /* 0xed36 undefined */
6966
6967 case 0xed3a: /* MAY - multiply and add unnormalized */
6968 case 0xed3b: /* MY - multiply unnormalized */
6969 /* float pair destination [RXF] */
6970 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6971 return -1;
6972 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6973 return -1;
6974 break;
6975
6976 /* 0xed42-0xed47 undefind */
6977
6978 case 0xed48: /* SLXT - shift significand left */
6979 case 0xed49: /* SRXT - shift significand right */
6980 case 0xedab: /* CXZT - convert from zoned */
6981 case 0xedaf: /* CXPT - convert from packed */
6982 /* float pair destination [RXF] + fpc */
6983 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6984 return -1;
6985 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6986 return -1;
6987 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6988 return -1;
6989 break;
6990
6991 /* 0xed4a-0xed4f undefind */
6992 /* 0xed52-0xed53 undefind */
6993 /* 0xed56-0xed57 undefind */
6994 /* 0xed5a-0xed63 undefind */
6995 /* 0xed68-0xeda7 undefined */
6996
6997 case 0xeda8: /* CZDT - convert to zoned */
6998 case 0xeda9: /* CZXT - convert to zoned */
6999 case 0xedac: /* CPDT - convert to packed */
7000 case 0xedad: /* CPXT - convert to packed */
7001 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7002 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
7003 return -1;
7004 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7005 return -1;
7006 break;
7007
7008 /* 0xedb0-0xedff undefined */
7009
7010 default:
7011 goto UNKNOWN_OP;
7012 }
7013 break;
7014
7015 /* 0xe4 undefined */
7016
7017 case 0xe5:
7018 /* SSE/SIL-format instruction */
7019 switch (insn[0])
7020 {
7021 /* 0xe500-0xe543 undefined, privileged, or unsupported */
7022
7023 case 0xe544: /* MVHHI - move */
7024 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7025 if (record_full_arch_list_add_mem (oaddr, 2))
7026 return -1;
7027 break;
7028
7029 /* 0xe545-0xe547 undefined */
7030
7031 case 0xe548: /* MVGHI - move */
7032 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7033 if (record_full_arch_list_add_mem (oaddr, 8))
7034 return -1;
7035 break;
7036
7037 /* 0xe549-0xe54b undefined */
7038
7039 case 0xe54c: /* MVHI - move */
7040 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7041 if (record_full_arch_list_add_mem (oaddr, 4))
7042 return -1;
7043 break;
7044
7045 /* 0xe54d-0xe553 undefined */
7046
7047 case 0xe554: /* CHHSI - compare halfword immediate */
7048 case 0xe555: /* CLHHSI - compare logical immediate */
7049 case 0xe558: /* CGHSI - compare halfword immediate */
7050 case 0xe559: /* CLGHSI - compare logical immediate */
7051 case 0xe55c: /* CHSI - compare halfword immediate */
7052 case 0xe55d: /* CLFHSI - compare logical immediate */
7053 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7054 return -1;
7055 break;
7056
7057 /* 0xe556-0xe557 undefined */
7058 /* 0xe55a-0xe55b undefined */
7059 /* 0xe55e-0xe55f undefined */
7060
7061 case 0xe560: /* TBEGIN - transaction begin */
7062 /* The transaction will be immediately aborted after this
7063 instruction, due to single-stepping. This instruction is
7064 only supported so that the program can fail a few times
7065 and go to the non-transactional fallback. */
7066 if (inib[4])
7067 {
7068 /* Transaction diagnostic block - user. */
7069 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7070 if (record_full_arch_list_add_mem (oaddr, 256))
7071 return -1;
7072 }
7073 /* Transaction diagnostic block - supervisor. */
7074 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
7075 return -1;
7076 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
7077 return -1;
7078 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
7079 return -1;
7080 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
7081 return -1;
7082 for (i = 0; i < 16; i++)
7083 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
7084 return -1;
7085 /* And flags. */
7086 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7087 return -1;
7088 break;
7089
7090 /* 0xe561 unsupported: TBEGINC */
7091 /* 0xe562-0xe5ff undefined */
7092
7093 default:
7094 goto UNKNOWN_OP;
7095 }
7096 break;
7097
7098 /* 0xe6 undefined */
7099
7100 case 0xec:
7101 /* RIE/RIS/RRS-format instruction */
7102 switch (ibyte[0] << 8 | ibyte[5])
7103 {
7104 /* 0xec00-0xec41 undefined */
7105
7106 case 0xec42: /* LOCHI - load halfword immediate on condition */
7107 case 0xec51: /* RISBLG - rotate then insert selected bits low */
7108 /* 32-bit or native gpr destination */
7109 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7110 return -1;
7111 break;
7112
7113 /* 0xec43 undefined */
7114
7115 case 0xec44: /* BRXHG - branch relative on index high */
7116 case 0xec45: /* BRXLG - branch relative on index low or equal */
7117 case 0xec46: /* LOCGHI - load halfword immediate on condition */
7118 case 0xec59: /* RISBGN - rotate then insert selected bits */
7119 /* 64-bit gpr destination */
7120 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7121 return -1;
7122 break;
7123
7124 /* 0xec47-0xec4d undefined */
7125
7126 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
7127 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
7128 /* 32-bit high gpr destination */
7129 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
7130 return -1;
7131 break;
7132
7133 /* 0xec4f-0xec50 undefined */
7134 /* 0xec52-0xec53 undefined */
7135
7136 case 0xec54: /* RNSBG - rotate then and selected bits */
7137 case 0xec55: /* RISBG - rotate then insert selected bits */
7138 case 0xec56: /* ROSBG - rotate then or selected bits */
7139 case 0xec57: /* RXSBG - rotate then xor selected bits */
7140 case 0xecd9: /* AGHIK - add immediate */
7141 case 0xecdb: /* ALGHSIK - add logical immediate */
7142 /* 64-bit gpr destination + flags */
7143 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7144 return -1;
7145 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7146 return -1;
7147 break;
7148
7149 /* 0xec58 undefined */
7150 /* 0xec5a-0xec5c undefined */
7151 /* 0xec5e-0xec63 undefined */
7152
7153 case 0xec64: /* CGRJ - compare and branch relative */
7154 case 0xec65: /* CLGRJ - compare logical and branch relative */
7155 case 0xec76: /* CRJ - compare and branch relative */
7156 case 0xec77: /* CLRJ - compare logical and branch relative */
7157 case 0xec7c: /* CGIJ - compare immediate and branch relative */
7158 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
7159 case 0xec7e: /* CIJ - compare immediate and branch relative */
7160 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
7161 case 0xece4: /* CGRB - compare and branch */
7162 case 0xece5: /* CLGRB - compare logical and branch */
7163 case 0xecf6: /* CRB - compare and branch */
7164 case 0xecf7: /* CLRB - compare logical and branch */
7165 case 0xecfc: /* CGIB - compare immediate and branch */
7166 case 0xecfd: /* CLGIB - compare logical immediate and branch */
7167 case 0xecfe: /* CIB - compare immediate and branch */
7168 case 0xecff: /* CLIB - compare logical immediate and branch */
7169 break;
7170
7171 /* 0xec66-0xec6f undefined */
7172
7173 case 0xec70: /* CGIT - compare immediate and trap */
7174 case 0xec71: /* CLGIT - compare logical immediate and trap */
7175 case 0xec72: /* CIT - compare immediate and trap */
7176 case 0xec73: /* CLFIT - compare logical immediate and trap */
7177 /* fpc only - including possible DXC write for trapping insns */
7178 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7179 return -1;
7180 break;
7181
7182 /* 0xec74-0xec75 undefined */
7183 /* 0xec78-0xec7b undefined */
7184
7185 /* 0xec80-0xecd7 undefined */
7186
7187 case 0xecd8: /* AHIK - add immediate */
7188 case 0xecda: /* ALHSIK - add logical immediate */
7189 /* 32-bit gpr destination + flags */
7190 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7191 return -1;
7192 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7193 return -1;
7194 break;
7195
7196 /* 0xecdc-0xece3 undefined */
7197 /* 0xece6-0xecf5 undefined */
7198 /* 0xecf8-0xecfb undefined */
7199
7200 default:
7201 goto UNKNOWN_OP;
7202 }
7203 break;
7204
7205 case 0xee: /* PLO - perform locked operation */
7206 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
7207 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7208 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
7209 if (!(tmp & 0x100))
7210 {
7211 uint8_t fc = tmp & 0xff;
7212 gdb_byte buf[8];
7213 switch (fc)
7214 {
7215 case 0x00: /* CL */
7216 /* op1c */
7217 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7218 return -1;
7219 /* op3 */
7220 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7221 return -1;
7222 break;
7223
7224 case 0x01: /* CLG */
7225 /* op1c */
7226 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7227 return -1;
7228 /* op3 */
7229 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7230 return -1;
7231 break;
7232
7233 case 0x02: /* CLGR */
7234 /* op1c */
7235 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7236 return -1;
7237 /* op3 */
7238 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7239 return -1;
7240 break;
7241
7242 case 0x03: /* CLX */
7243 /* op1c */
7244 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7245 return -1;
7246 /* op3 */
7247 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7248 return -1;
7249 break;
7250
7251 case 0x08: /* DCS */
7252 /* op3c */
7253 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7254 return -1;
7255 /* fallthru */
7256 case 0x0c: /* CSST */
7257 /* op4 */
7258 if (record_full_arch_list_add_mem (oaddr2, 4))
7259 return -1;
7260 goto CS;
7261
7262 case 0x14: /* CSTST */
7263 /* op8 */
7264 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7265 return -1;
7266 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7267 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7268 if (record_full_arch_list_add_mem (oaddr3, 4))
7269 return -1;
7270 /* fallthru */
7271 case 0x10: /* CSDST */
7272 /* op6 */
7273 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7274 return -1;
7275 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7276 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7277 if (record_full_arch_list_add_mem (oaddr3, 4))
7278 return -1;
7279 /* op4 */
7280 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7281 return -1;
7282 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7283 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7284 if (record_full_arch_list_add_mem (oaddr3, 4))
7285 return -1;
7286 /* fallthru */
7287 case 0x04: /* CS */
7288CS:
7289 /* op1c */
7290 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7291 return -1;
7292 /* op2 */
7293 if (record_full_arch_list_add_mem (oaddr, 4))
7294 return -1;
7295 break;
7296
7297 case 0x09: /* DCSG */
7298 /* op3c */
7299 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7300 return -1;
7301 goto CSSTG;
7302
7303 case 0x15: /* CSTSTG */
7304 /* op8 */
7305 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7306 return -1;
7307 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7308 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7309 if (record_full_arch_list_add_mem (oaddr3, 8))
7310 return -1;
7311 /* fallthru */
7312 case 0x11: /* CSDSTG */
7313 /* op6 */
7314 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7315 return -1;
7316 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7317 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7318 if (record_full_arch_list_add_mem (oaddr3, 8))
7319 return -1;
7320 /* fallthru */
7321 case 0x0d: /* CSSTG */
7322CSSTG:
7323 /* op4 */
7324 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7325 return -1;
7326 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7327 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7328 if (record_full_arch_list_add_mem (oaddr3, 8))
7329 return -1;
7330 /* fallthru */
7331 case 0x05: /* CSG */
7332 /* op1c */
7333 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7334 return -1;
7335 /* op2 */
7336 if (record_full_arch_list_add_mem (oaddr, 8))
7337 return -1;
7338 break;
7339
7340 case 0x0a: /* DCSGR */
7341 /* op3c */
7342 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7343 return -1;
7344 /* fallthru */
7345 case 0x0e: /* CSSTGR */
7346 /* op4 */
7347 if (record_full_arch_list_add_mem (oaddr2, 8))
7348 return -1;
7349 goto CSGR;
7350
7351 case 0x16: /* CSTSTGR */
7352 /* op8 */
7353 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7354 return -1;
7355 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7356 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7357 if (record_full_arch_list_add_mem (oaddr3, 8))
7358 return -1;
7359 /* fallthru */
7360 case 0x12: /* CSDSTGR */
7361 /* op6 */
7362 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7363 return -1;
7364 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7365 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7366 if (record_full_arch_list_add_mem (oaddr3, 8))
7367 return -1;
7368 /* op4 */
7369 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7370 return -1;
7371 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7372 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7373 if (record_full_arch_list_add_mem (oaddr3, 8))
7374 return -1;
7375 /* fallthru */
7376 case 0x06: /* CSGR */
7377CSGR:
7378 /* op1c */
7379 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7380 return -1;
7381 /* op2 */
7382 if (record_full_arch_list_add_mem (oaddr, 8))
7383 return -1;
7384 break;
7385
7386 case 0x0b: /* DCSX */
7387 /* op3c */
7388 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7389 return -1;
7390 goto CSSTX;
7391
7392 case 0x17: /* CSTSTX */
7393 /* op8 */
7394 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7395 return -1;
7396 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7397 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7398 if (record_full_arch_list_add_mem (oaddr3, 16))
7399 return -1;
7400 /* fallthru */
7401 case 0x13: /* CSDSTX */
7402 /* op6 */
7403 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7404 return -1;
7405 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7406 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7407 if (record_full_arch_list_add_mem (oaddr3, 16))
7408 return -1;
7409 /* fallthru */
7410 case 0x0f: /* CSSTX */
7411CSSTX:
7412 /* op4 */
7413 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7414 return -1;
7415 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7416 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7417 if (record_full_arch_list_add_mem (oaddr3, 16))
7418 return -1;
7419 /* fallthru */
7420 case 0x07: /* CSX */
7421 /* op1c */
7422 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7423 return -1;
7424 /* op2 */
7425 if (record_full_arch_list_add_mem (oaddr, 16))
7426 return -1;
7427 break;
7428
7429 default:
7430 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
7431 fc, paddress (gdbarch, addr));
7432 return -1;
7433 }
7434 }
7435 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7436 return -1;
7437 break;
7438
7439 case 0xef: /* LMD - load multiple disjoint */
7440 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
7441 if (s390_record_gpr_g (gdbarch, regcache, i))
7442 return -1;
7443 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7444 return -1;
7445 break;
7446
7447 case 0xf0: /* SRP - shift and round decimal */
7448 case 0xf8: /* ZAP - zero and add */
7449 case 0xfa: /* AP - add decimal */
7450 case 0xfb: /* SP - subtract decimal */
7451 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7452 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7453 return -1;
7454 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7455 return -1;
7456 /* DXC may be written */
7457 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7458 return -1;
7459 break;
7460
7461 case 0xf1: /* MVO - move with offset */
7462 case 0xf2: /* PACK - pack */
7463 case 0xf3: /* UNPK - unpack */
7464 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7465 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7466 return -1;
7467 break;
7468
7469 /* 0xf4-0xf7 undefined */
7470
7471 case 0xf9: /* CP - compare decimal */
7472 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7473 return -1;
7474 /* DXC may be written */
7475 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7476 return -1;
7477 break;
7478
7479 case 0xfc: /* MP - multiply decimal */
7480 case 0xfd: /* DP - divide decimal */
7481 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7482 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7483 return -1;
7484 /* DXC may be written */
7485 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7486 return -1;
7487 break;
7488
7489 /* 0xfe-0xff undefined */
7490
7491 default:
7492UNKNOWN_OP:
7493 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
7494 "at %s.\n", insn[0], paddress (gdbarch, addr));
7495 return -1;
7496 }
7497
7498 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
7499 return -1;
7500 if (record_full_arch_list_add_end ())
7501 return -1;
7502 return 0;
7503}
7504
7505/* Initialize linux_record_tdep if not initialized yet. */
7506
7507static void
7508s390_init_linux_record_tdep (struct linux_record_tdep *record_tdep,
7509 enum s390_abi_kind abi)
7510{
7511 /* These values are the size of the type that will be used in a system
7512 call. They are obtained from Linux Kernel source. */
7513
7514 if (abi == ABI_LINUX_ZSERIES)
7515 {
7516 record_tdep->size_pointer = 8;
7517 /* no _old_kernel_stat */
7518 record_tdep->size_tms = 32;
7519 record_tdep->size_loff_t = 8;
7520 record_tdep->size_flock = 32;
7521 record_tdep->size_ustat = 32;
7522 record_tdep->size_old_sigaction = 32;
7523 record_tdep->size_old_sigset_t = 8;
7524 record_tdep->size_rlimit = 16;
7525 record_tdep->size_rusage = 144;
7526 record_tdep->size_timeval = 16;
7527 record_tdep->size_timezone = 8;
7528 /* old_[ug]id_t never used */
7529 record_tdep->size_fd_set = 128;
7530 record_tdep->size_old_dirent = 280;
7531 record_tdep->size_statfs = 88;
7532 record_tdep->size_statfs64 = 88;
7533 record_tdep->size_sockaddr = 16;
7534 record_tdep->size_int = 4;
7535 record_tdep->size_long = 8;
7536 record_tdep->size_ulong = 8;
7537 record_tdep->size_msghdr = 56;
7538 record_tdep->size_itimerval = 32;
7539 record_tdep->size_stat = 144;
7540 /* old_utsname unused */
7541 record_tdep->size_sysinfo = 112;
7542 record_tdep->size_msqid_ds = 120;
7543 record_tdep->size_shmid_ds = 112;
7544 record_tdep->size_new_utsname = 390;
7545 record_tdep->size_timex = 208;
7546 record_tdep->size_mem_dqinfo = 24;
7547 record_tdep->size_if_dqblk = 72;
7548 record_tdep->size_fs_quota_stat = 80;
7549 record_tdep->size_timespec = 16;
7550 record_tdep->size_pollfd = 8;
7551 record_tdep->size_NFS_FHSIZE = 32;
7552 record_tdep->size_knfsd_fh = 132;
7553 record_tdep->size_TASK_COMM_LEN = 16;
7554 record_tdep->size_sigaction = 32;
7555 record_tdep->size_sigset_t = 8;
7556 record_tdep->size_siginfo_t = 128;
7557 record_tdep->size_cap_user_data_t = 12;
7558 record_tdep->size_stack_t = 24;
7559 record_tdep->size_off_t = 8;
7560 /* stat64 unused */
7561 record_tdep->size_gid_t = 4;
7562 record_tdep->size_uid_t = 4;
7563 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7564 record_tdep->size_flock64 = 32;
7565 record_tdep->size_io_event = 32;
7566 record_tdep->size_iocb = 64;
7567 record_tdep->size_epoll_event = 16;
7568 record_tdep->size_itimerspec = 32;
7569 record_tdep->size_mq_attr = 64;
7570 record_tdep->size_termios = 36;
7571 record_tdep->size_termios2 = 44;
7572 record_tdep->size_pid_t = 4;
7573 record_tdep->size_winsize = 8;
7574 record_tdep->size_serial_struct = 72;
7575 record_tdep->size_serial_icounter_struct = 80;
7576 record_tdep->size_size_t = 8;
7577 record_tdep->size_iovec = 16;
7578 record_tdep->size_time_t = 8;
7579 }
7580 else if (abi == ABI_LINUX_S390)
7581 {
7582 record_tdep->size_pointer = 4;
7583 record_tdep->size__old_kernel_stat = 32;
7584 record_tdep->size_tms = 16;
7585 record_tdep->size_loff_t = 8;
7586 record_tdep->size_flock = 16;
7587 record_tdep->size_ustat = 20;
7588 record_tdep->size_old_sigaction = 16;
7589 record_tdep->size_old_sigset_t = 4;
7590 record_tdep->size_rlimit = 8;
7591 record_tdep->size_rusage = 72;
7592 record_tdep->size_timeval = 8;
7593 record_tdep->size_timezone = 8;
7594 record_tdep->size_old_gid_t = 2;
7595 record_tdep->size_old_uid_t = 2;
7596 record_tdep->size_fd_set = 128;
7597 record_tdep->size_old_dirent = 268;
7598 record_tdep->size_statfs = 64;
7599 record_tdep->size_statfs64 = 88;
7600 record_tdep->size_sockaddr = 16;
7601 record_tdep->size_int = 4;
7602 record_tdep->size_long = 4;
7603 record_tdep->size_ulong = 4;
7604 record_tdep->size_msghdr = 28;
7605 record_tdep->size_itimerval = 16;
7606 record_tdep->size_stat = 64;
7607 /* old_utsname unused */
7608 record_tdep->size_sysinfo = 64;
7609 record_tdep->size_msqid_ds = 88;
7610 record_tdep->size_shmid_ds = 84;
7611 record_tdep->size_new_utsname = 390;
7612 record_tdep->size_timex = 128;
7613 record_tdep->size_mem_dqinfo = 24;
7614 record_tdep->size_if_dqblk = 72;
7615 record_tdep->size_fs_quota_stat = 80;
7616 record_tdep->size_timespec = 8;
7617 record_tdep->size_pollfd = 8;
7618 record_tdep->size_NFS_FHSIZE = 32;
7619 record_tdep->size_knfsd_fh = 132;
7620 record_tdep->size_TASK_COMM_LEN = 16;
7621 record_tdep->size_sigaction = 20;
7622 record_tdep->size_sigset_t = 8;
7623 record_tdep->size_siginfo_t = 128;
7624 record_tdep->size_cap_user_data_t = 12;
7625 record_tdep->size_stack_t = 12;
7626 record_tdep->size_off_t = 4;
7627 record_tdep->size_stat64 = 104;
7628 record_tdep->size_gid_t = 4;
7629 record_tdep->size_uid_t = 4;
7630 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7631 record_tdep->size_flock64 = 32;
7632 record_tdep->size_io_event = 32;
7633 record_tdep->size_iocb = 64;
7634 record_tdep->size_epoll_event = 16;
7635 record_tdep->size_itimerspec = 16;
7636 record_tdep->size_mq_attr = 32;
7637 record_tdep->size_termios = 36;
7638 record_tdep->size_termios2 = 44;
7639 record_tdep->size_pid_t = 4;
7640 record_tdep->size_winsize = 8;
7641 record_tdep->size_serial_struct = 60;
7642 record_tdep->size_serial_icounter_struct = 80;
7643 record_tdep->size_size_t = 4;
7644 record_tdep->size_iovec = 8;
7645 record_tdep->size_time_t = 4;
7646 }
7647
7648 /* These values are the second argument of system call "sys_fcntl"
7649 and "sys_fcntl64". They are obtained from Linux Kernel source. */
7650 record_tdep->fcntl_F_GETLK = 5;
7651 record_tdep->fcntl_F_GETLK64 = 12;
7652 record_tdep->fcntl_F_SETLK64 = 13;
7653 record_tdep->fcntl_F_SETLKW64 = 14;
7654
7655 record_tdep->arg1 = S390_R2_REGNUM;
7656 record_tdep->arg2 = S390_R3_REGNUM;
7657 record_tdep->arg3 = S390_R4_REGNUM;
7658 record_tdep->arg4 = S390_R5_REGNUM;
7659 record_tdep->arg5 = S390_R6_REGNUM;
7660
7661 /* These values are the second argument of system call "sys_ioctl".
7662 They are obtained from Linux Kernel source.
7663 See arch/s390/include/uapi/asm/ioctls.h. */
7664
7665 record_tdep->ioctl_TCGETS = 0x5401;
7666 record_tdep->ioctl_TCSETS = 0x5402;
7667 record_tdep->ioctl_TCSETSW = 0x5403;
7668 record_tdep->ioctl_TCSETSF = 0x5404;
7669 record_tdep->ioctl_TCGETA = 0x5405;
7670 record_tdep->ioctl_TCSETA = 0x5406;
7671 record_tdep->ioctl_TCSETAW = 0x5407;
7672 record_tdep->ioctl_TCSETAF = 0x5408;
7673 record_tdep->ioctl_TCSBRK = 0x5409;
7674 record_tdep->ioctl_TCXONC = 0x540a;
7675 record_tdep->ioctl_TCFLSH = 0x540b;
7676 record_tdep->ioctl_TIOCEXCL = 0x540c;
7677 record_tdep->ioctl_TIOCNXCL = 0x540d;
7678 record_tdep->ioctl_TIOCSCTTY = 0x540e;
7679 record_tdep->ioctl_TIOCGPGRP = 0x540f;
7680 record_tdep->ioctl_TIOCSPGRP = 0x5410;
7681 record_tdep->ioctl_TIOCOUTQ = 0x5411;
7682 record_tdep->ioctl_TIOCSTI = 0x5412;
7683 record_tdep->ioctl_TIOCGWINSZ = 0x5413;
7684 record_tdep->ioctl_TIOCSWINSZ = 0x5414;
7685 record_tdep->ioctl_TIOCMGET = 0x5415;
7686 record_tdep->ioctl_TIOCMBIS = 0x5416;
7687 record_tdep->ioctl_TIOCMBIC = 0x5417;
7688 record_tdep->ioctl_TIOCMSET = 0x5418;
7689 record_tdep->ioctl_TIOCGSOFTCAR = 0x5419;
7690 record_tdep->ioctl_TIOCSSOFTCAR = 0x541a;
7691 record_tdep->ioctl_FIONREAD = 0x541b;
7692 record_tdep->ioctl_TIOCINQ = 0x541b; /* alias */
7693 record_tdep->ioctl_TIOCLINUX = 0x541c;
7694 record_tdep->ioctl_TIOCCONS = 0x541d;
7695 record_tdep->ioctl_TIOCGSERIAL = 0x541e;
7696 record_tdep->ioctl_TIOCSSERIAL = 0x541f;
7697 record_tdep->ioctl_TIOCPKT = 0x5420;
7698 record_tdep->ioctl_FIONBIO = 0x5421;
7699 record_tdep->ioctl_TIOCNOTTY = 0x5422;
7700 record_tdep->ioctl_TIOCSETD = 0x5423;
7701 record_tdep->ioctl_TIOCGETD = 0x5424;
7702 record_tdep->ioctl_TCSBRKP = 0x5425;
7703 record_tdep->ioctl_TIOCSBRK = 0x5427;
7704 record_tdep->ioctl_TIOCCBRK = 0x5428;
7705 record_tdep->ioctl_TIOCGSID = 0x5429;
7706 record_tdep->ioctl_TCGETS2 = 0x802c542a;
7707 record_tdep->ioctl_TCSETS2 = 0x402c542b;
7708 record_tdep->ioctl_TCSETSW2 = 0x402c542c;
7709 record_tdep->ioctl_TCSETSF2 = 0x402c542d;
7710 record_tdep->ioctl_TIOCGPTN = 0x80045430;
7711 record_tdep->ioctl_TIOCSPTLCK = 0x40045431;
7712 record_tdep->ioctl_FIONCLEX = 0x5450;
7713 record_tdep->ioctl_FIOCLEX = 0x5451;
7714 record_tdep->ioctl_FIOASYNC = 0x5452;
7715 record_tdep->ioctl_TIOCSERCONFIG = 0x5453;
7716 record_tdep->ioctl_TIOCSERGWILD = 0x5454;
7717 record_tdep->ioctl_TIOCSERSWILD = 0x5455;
7718 record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456;
7719 record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457;
7720 record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458;
7721 record_tdep->ioctl_TIOCSERGETLSR = 0x5459;
7722 record_tdep->ioctl_TIOCSERGETMULTI = 0x545a;
7723 record_tdep->ioctl_TIOCSERSETMULTI = 0x545b;
7724 record_tdep->ioctl_TIOCMIWAIT = 0x545c;
7725 record_tdep->ioctl_TIOCGICOUNT = 0x545d;
7726 record_tdep->ioctl_FIOQSIZE = 0x545e;
7727}
7728
a8c99f38
JB
7729/* Set up gdbarch struct. */
7730
a78f21af 7731static struct gdbarch *
5769d3cd
AC
7732s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
7733{
7803799a
UW
7734 const struct target_desc *tdesc = info.target_desc;
7735 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
7736 struct gdbarch *gdbarch;
7737 struct gdbarch_tdep *tdep;
f486487f 7738 enum s390_abi_kind tdep_abi;
417c80f9 7739 enum s390_vector_abi_kind vector_abi;
7803799a 7740 int have_upper = 0;
c642a434
UW
7741 int have_linux_v1 = 0;
7742 int have_linux_v2 = 0;
5aa82d05 7743 int have_tdb = 0;
550bdf96 7744 int have_vx = 0;
7803799a 7745 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
7746 static const char *const stap_register_prefixes[] = { "%", NULL };
7747 static const char *const stap_register_indirection_prefixes[] = { "(",
7748 NULL };
7749 static const char *const stap_register_indirection_suffixes[] = { ")",
7750 NULL };
7803799a
UW
7751
7752 /* Default ABI and register size. */
7753 switch (info.bfd_arch_info->mach)
7754 {
7755 case bfd_mach_s390_31:
7756 tdep_abi = ABI_LINUX_S390;
7757 break;
7758
7759 case bfd_mach_s390_64:
7760 tdep_abi = ABI_LINUX_ZSERIES;
7761 break;
7762
7763 default:
7764 return NULL;
7765 }
7766
7767 /* Use default target description if none provided by the target. */
7768 if (!tdesc_has_registers (tdesc))
7769 {
7770 if (tdep_abi == ABI_LINUX_S390)
7771 tdesc = tdesc_s390_linux32;
7772 else
7773 tdesc = tdesc_s390x_linux64;
7774 }
7775
7776 /* Check any target description for validity. */
7777 if (tdesc_has_registers (tdesc))
7778 {
7779 static const char *const gprs[] = {
7780 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
7781 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
7782 };
7783 static const char *const fprs[] = {
7784 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
7785 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
7786 };
7787 static const char *const acrs[] = {
7788 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
7789 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
7790 };
7791 static const char *const gprs_lower[] = {
7792 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
7793 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
7794 };
7795 static const char *const gprs_upper[] = {
7796 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
7797 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
7798 };
4ac33720
UW
7799 static const char *const tdb_regs[] = {
7800 "tdb0", "tac", "tct", "atia",
7801 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
7802 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
7803 };
550bdf96
AA
7804 static const char *const vxrs_low[] = {
7805 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
7806 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
7807 };
7808 static const char *const vxrs_high[] = {
7809 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
7810 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
7811 };
7803799a
UW
7812 const struct tdesc_feature *feature;
7813 int i, valid_p = 1;
7814
7815 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
7816 if (feature == NULL)
7817 return NULL;
7818
7819 tdesc_data = tdesc_data_alloc ();
7820
7821 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7822 S390_PSWM_REGNUM, "pswm");
7823 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7824 S390_PSWA_REGNUM, "pswa");
7825
7826 if (tdesc_unnumbered_register (feature, "r0"))
7827 {
7828 for (i = 0; i < 16; i++)
7829 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7830 S390_R0_REGNUM + i, gprs[i]);
7831 }
7832 else
7833 {
7834 have_upper = 1;
7835
7836 for (i = 0; i < 16; i++)
7837 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7838 S390_R0_REGNUM + i,
7839 gprs_lower[i]);
7840 for (i = 0; i < 16; i++)
7841 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7842 S390_R0_UPPER_REGNUM + i,
7843 gprs_upper[i]);
7844 }
7845
7846 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
7847 if (feature == NULL)
7848 {
7849 tdesc_data_cleanup (tdesc_data);
7850 return NULL;
7851 }
7852
7853 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7854 S390_FPC_REGNUM, "fpc");
7855 for (i = 0; i < 16; i++)
7856 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7857 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 7858
7803799a
UW
7859 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
7860 if (feature == NULL)
7861 {
7862 tdesc_data_cleanup (tdesc_data);
7863 return NULL;
7864 }
7865
7866 for (i = 0; i < 16; i++)
7867 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7868 S390_A0_REGNUM + i, acrs[i]);
7869
94eae614 7870 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
7871 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
7872 if (feature)
7873 {
7874 tdesc_numbered_register (feature, tdesc_data,
7875 S390_ORIG_R2_REGNUM, "orig_r2");
7876
7877 if (tdesc_numbered_register (feature, tdesc_data,
7878 S390_LAST_BREAK_REGNUM, "last_break"))
7879 have_linux_v1 = 1;
7880
7881 if (tdesc_numbered_register (feature, tdesc_data,
7882 S390_SYSTEM_CALL_REGNUM, "system_call"))
7883 have_linux_v2 = 1;
7884
7885 if (have_linux_v2 > have_linux_v1)
7886 valid_p = 0;
7887 }
7888
4ac33720
UW
7889 /* Transaction diagnostic block. */
7890 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
7891 if (feature)
7892 {
7893 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
7894 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7895 S390_TDB_DWORD0_REGNUM + i,
7896 tdb_regs[i]);
5aa82d05 7897 have_tdb = 1;
4ac33720
UW
7898 }
7899
550bdf96
AA
7900 /* Vector registers. */
7901 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
7902 if (feature)
7903 {
7904 for (i = 0; i < 16; i++)
7905 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7906 S390_V0_LOWER_REGNUM + i,
7907 vxrs_low[i]);
7908 for (i = 0; i < 16; i++)
7909 valid_p &= tdesc_numbered_register (feature, tdesc_data,
7910 S390_V16_REGNUM + i,
7911 vxrs_high[i]);
7912 have_vx = 1;
7913 }
7914
7803799a
UW
7915 if (!valid_p)
7916 {
7917 tdesc_data_cleanup (tdesc_data);
7918 return NULL;
7919 }
7920 }
5769d3cd 7921
417c80f9
AA
7922 /* Determine vector ABI. */
7923 vector_abi = S390_VECTOR_ABI_NONE;
7924#ifdef HAVE_ELF
7925 if (have_vx
7926 && info.abfd != NULL
7927 && info.abfd->format == bfd_object
7928 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7929 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7930 Tag_GNU_S390_ABI_Vector) == 2)
7931 vector_abi = S390_VECTOR_ABI_128;
7932#endif
7933
7803799a
UW
7934 /* Find a candidate among extant architectures. */
7935 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7936 arches != NULL;
7937 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7938 {
7939 tdep = gdbarch_tdep (arches->gdbarch);
7940 if (!tdep)
7941 continue;
7942 if (tdep->abi != tdep_abi)
7943 continue;
417c80f9
AA
7944 if (tdep->vector_abi != vector_abi)
7945 continue;
7803799a
UW
7946 if ((tdep->gpr_full_regnum != -1) != have_upper)
7947 continue;
7948 if (tdesc_data != NULL)
7949 tdesc_data_cleanup (tdesc_data);
7950 return arches->gdbarch;
7951 }
5769d3cd 7952
7803799a 7953 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 7954 tdep = XCNEW (struct gdbarch_tdep);
7803799a 7955 tdep->abi = tdep_abi;
417c80f9 7956 tdep->vector_abi = vector_abi;
5aa82d05
AA
7957 tdep->have_linux_v1 = have_linux_v1;
7958 tdep->have_linux_v2 = have_linux_v2;
7959 tdep->have_tdb = have_tdb;
d0f54f9d 7960 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
7961
7962 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 7963 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 7964
1de90795
UW
7965 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7966 We can safely let them default to 128-bit, since the debug info
7967 will give the size of type actually used in each case. */
7968 set_gdbarch_long_double_bit (gdbarch, 128);
7969 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
7970
aaab4dba 7971 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 7972 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 7973 always. */
5769d3cd 7974 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
7975 /* Stack grows downward. */
7976 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
04180708
YQ
7977 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
7978 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6df55226
MK
7979 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
7980 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
5769d3cd 7981 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
c9cf6e20 7982 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
a8c99f38 7983
7803799a 7984 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 7985 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 7986 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 7987 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 7988 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 7989 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7803799a 7990 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
5aa82d05
AA
7991 set_gdbarch_iterate_over_regset_sections (gdbarch,
7992 s390_iterate_over_regset_sections);
c642a434
UW
7993 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
7994 set_gdbarch_write_pc (gdbarch, s390_write_pc);
f79a3bae 7995 set_gdbarch_guess_tracepoint_registers (gdbarch, s390_guess_tracepoint_registers);
7803799a
UW
7996 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7997 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7998 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7999 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
8000 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 8001 s390_pseudo_register_reggroup_p);
c4b3e547
MK
8002 set_gdbarch_ax_pseudo_register_collect (gdbarch,
8003 s390_ax_pseudo_register_collect);
8004 set_gdbarch_ax_pseudo_register_push_stack
8005 (gdbarch, s390_ax_pseudo_register_push_stack);
70104a90 8006 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
7803799a 8007 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
550bdf96 8008 set_gdbarch_register_name (gdbarch, s390_register_name);
7803799a
UW
8009
8010 /* Assign pseudo register numbers. */
8011 first_pseudo_reg = gdbarch_num_regs (gdbarch);
8012 last_pseudo_reg = first_pseudo_reg;
8013 tdep->gpr_full_regnum = -1;
8014 if (have_upper)
8015 {
8016 tdep->gpr_full_regnum = last_pseudo_reg;
8017 last_pseudo_reg += 16;
8018 }
550bdf96
AA
8019 tdep->v0_full_regnum = -1;
8020 if (have_vx)
8021 {
8022 tdep->v0_full_regnum = last_pseudo_reg;
8023 last_pseudo_reg += 16;
8024 }
7803799a
UW
8025 tdep->pc_regnum = last_pseudo_reg++;
8026 tdep->cc_regnum = last_pseudo_reg++;
8027 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
8028 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 8029
b0cf273e
JB
8030 /* Inferior function calls. */
8031 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 8032 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 8033 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 8034 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 8035
237b092b
AA
8036 /* Syscall handling. */
8037 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
8038
a8c99f38 8039 /* Frame handling. */
a431654a 8040 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 8041 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 8042 dwarf2_append_unwinders (gdbarch);
a431654a 8043 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
8044 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
8045 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
8046 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
8047 frame_base_set_default (gdbarch, &s390_frame_base);
8048 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
8049 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
8050
1db4e8a0
UW
8051 /* Displaced stepping. */
8052 set_gdbarch_displaced_step_copy_insn (gdbarch,
5ac21343 8053 s390_displaced_step_copy_insn);
1db4e8a0
UW
8054 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
8055 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 8056 simple_displaced_step_free_closure);
906d60cf 8057 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
1db4e8a0
UW
8058 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
8059
70728992
PA
8060 /* Note that GNU/Linux is the only OS supported on this
8061 platform. */
8062 linux_init_abi (info, gdbarch);
8063
7803799a 8064 switch (tdep->abi)
5769d3cd 8065 {
7803799a 8066 case ABI_LINUX_S390:
5769d3cd 8067 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
8068 set_solib_svr4_fetch_link_map_offsets
8069 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 8070
458c8db8 8071 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
5769d3cd 8072 break;
b0cf273e 8073
7803799a 8074 case ABI_LINUX_ZSERIES:
5769d3cd
AC
8075 set_gdbarch_long_bit (gdbarch, 64);
8076 set_gdbarch_long_long_bit (gdbarch, 64);
8077 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
8078 set_solib_svr4_fetch_link_map_offsets
8079 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 8080 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 8081 s390_address_class_type_flags);
ffc65945 8082 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 8083 s390_address_class_type_flags_to_name);
ffc65945 8084 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 8085 s390_address_class_name_to_type_flags);
d851a69a 8086 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X);
5769d3cd
AC
8087 break;
8088 }
8089
36482093
AC
8090 set_gdbarch_print_insn (gdbarch, print_insn_s390);
8091
982e9687
UW
8092 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
8093
b2756930
KB
8094 /* Enable TLS support. */
8095 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 8096 svr4_fetch_objfile_link_map);
b2756930 8097
55aa24fb 8098 /* SystemTap functions. */
05c0465e
SDJ
8099 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
8100 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
8101 stap_register_indirection_prefixes);
8102 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
8103 stap_register_indirection_suffixes);
55aa24fb 8104 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
60abeae4
AA
8105 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
8106 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
55aa24fb 8107
566c56c9
MK
8108 /* Support reverse debugging. */
8109
8110 set_gdbarch_process_record (gdbarch, s390_process_record);
8111 set_gdbarch_process_record_signal (gdbarch, s390_linux_record_signal);
8112
8113 s390_init_linux_record_tdep (&s390_linux_record_tdep, ABI_LINUX_S390);
8114 s390_init_linux_record_tdep (&s390x_linux_record_tdep, ABI_LINUX_ZSERIES);
8115
5769d3cd
AC
8116 return gdbarch;
8117}
8118
8119
a78f21af
AC
8120extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
8121
5769d3cd 8122void
5ae5f592 8123_initialize_s390_tdep (void)
5769d3cd 8124{
5769d3cd
AC
8125 /* Hook us into the gdbarch mechanism. */
8126 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 8127
94eae614 8128 /* Initialize the GNU/Linux target descriptions. */
7803799a 8129 initialize_tdesc_s390_linux32 ();
c642a434
UW
8130 initialize_tdesc_s390_linux32v1 ();
8131 initialize_tdesc_s390_linux32v2 ();
7803799a 8132 initialize_tdesc_s390_linux64 ();
c642a434
UW
8133 initialize_tdesc_s390_linux64v1 ();
8134 initialize_tdesc_s390_linux64v2 ();
4ac33720 8135 initialize_tdesc_s390_te_linux64 ();
550bdf96
AA
8136 initialize_tdesc_s390_vx_linux64 ();
8137 initialize_tdesc_s390_tevx_linux64 ();
7803799a 8138 initialize_tdesc_s390x_linux64 ();
c642a434
UW
8139 initialize_tdesc_s390x_linux64v1 ();
8140 initialize_tdesc_s390x_linux64v2 ();
4ac33720 8141 initialize_tdesc_s390x_te_linux64 ();
550bdf96
AA
8142 initialize_tdesc_s390x_vx_linux64 ();
8143 initialize_tdesc_s390x_tevx_linux64 ();
5769d3cd 8144}
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