Replace 'core_regset_sections' by iterator method
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
ecd75fc8 3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
4ac33720 47#include "auxv.h"
237b092b 48#include "xml-syscall.h"
5769d3cd 49
55aa24fb
SDJ
50#include "stap-probe.h"
51#include "ax.h"
52#include "ax-gdb.h"
53#include "user-regs.h"
54#include "cli/cli-utils.h"
55#include <ctype.h>
04a83fee 56#include "elf/common.h"
55aa24fb 57
7803799a 58#include "features/s390-linux32.c"
c642a434
UW
59#include "features/s390-linux32v1.c"
60#include "features/s390-linux32v2.c"
7803799a 61#include "features/s390-linux64.c"
c642a434
UW
62#include "features/s390-linux64v1.c"
63#include "features/s390-linux64v2.c"
4ac33720 64#include "features/s390-te-linux64.c"
7803799a 65#include "features/s390x-linux64.c"
c642a434
UW
66#include "features/s390x-linux64v1.c"
67#include "features/s390x-linux64v2.c"
4ac33720 68#include "features/s390x-te-linux64.c"
7803799a 69
237b092b
AA
70#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
71#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
72
d0f54f9d
JB
73/* The tdep structure. */
74
75struct gdbarch_tdep
5769d3cd 76{
b0cf273e
JB
77 /* ABI version. */
78 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
79
7803799a
UW
80 /* Pseudo register numbers. */
81 int gpr_full_regnum;
82 int pc_regnum;
83 int cc_regnum;
84
d0f54f9d
JB
85 /* Core file register sets. */
86 const struct regset *gregset;
87 int sizeof_gregset;
88
89 const struct regset *fpregset;
90 int sizeof_fpregset;
5aa82d05
AA
91
92 int have_linux_v1;
93 int have_linux_v2;
94 int have_tdb;
d0f54f9d
JB
95};
96
97
7803799a
UW
98/* ABI call-saved register information. */
99
100static int
101s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 102{
7803799a
UW
103 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
104
105 switch (tdep->abi)
6707b003 106 {
7803799a
UW
107 case ABI_LINUX_S390:
108 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
109 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
110 || regnum == S390_A0_REGNUM)
111 return 1;
6707b003 112
7803799a
UW
113 break;
114
115 case ABI_LINUX_ZSERIES:
116 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
117 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
118 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
119 return 1;
120
121 break;
122 }
123
124 return 0;
5769d3cd
AC
125}
126
c642a434
UW
127static int
128s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
129{
130 /* The last-break address is read-only. */
131 return regnum == S390_LAST_BREAK_REGNUM;
132}
133
134static void
135s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
136{
137 struct gdbarch *gdbarch = get_regcache_arch (regcache);
138 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
139
140 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
141
142 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
143 messing with the PC we just installed, if we happen to be within
144 an interrupted system call that the kernel wants to restart.
145
146 Note that after we return from the dummy call, the SYSTEM_CALL and
147 ORIG_R2 registers will be automatically restored, and the kernel
148 continues to restart the system call at this point. */
149 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
150 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
151}
152
7803799a 153
d0f54f9d
JB
154/* DWARF Register Mapping. */
155
2ccd1468 156static const short s390_dwarf_regmap[] =
d0f54f9d
JB
157{
158 /* General Purpose Registers. */
159 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
160 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
161 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
162 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
163
164 /* Floating Point Registers. */
165 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
166 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
167 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
168 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
169
170 /* Control Registers (not mapped). */
34201ae3
UW
171 -1, -1, -1, -1, -1, -1, -1, -1,
172 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d
JB
173
174 /* Access Registers. */
175 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
176 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
177 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
178 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
179
180 /* Program Status Word. */
181 S390_PSWM_REGNUM,
7803799a
UW
182 S390_PSWA_REGNUM,
183
184 /* GPR Lower Half Access. */
185 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
186 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
187 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
188 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 189
94eae614 190 /* GNU/Linux-specific registers (not mapped). */
c642a434 191 -1, -1, -1,
d0f54f9d
JB
192};
193
194/* Convert DWARF register number REG to the appropriate register
195 number used by GDB. */
a78f21af 196static int
d3f73121 197s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 198{
7803799a
UW
199 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
200
201 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
202 GPRs. Note that call frame information still refers to the 32-bit
203 lower halves, because s390_adjust_frame_regnum uses register numbers
204 66 .. 81 to access GPRs. */
205 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
206 return tdep->gpr_full_regnum + reg;
d0f54f9d 207
16aff9a6 208 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 209 return s390_dwarf_regmap[reg];
d0f54f9d 210
7803799a
UW
211 warning (_("Unmapped DWARF Register #%d encountered."), reg);
212 return -1;
213}
d0f54f9d 214
7803799a
UW
215/* Translate a .eh_frame register to DWARF register, or adjust a
216 .debug_frame register. */
217static int
218s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
219{
220 /* See s390_dwarf_reg_to_regnum for comments. */
221 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
222}
223
d0f54f9d 224
7803799a
UW
225/* Pseudo registers. */
226
2ccd1468
UW
227static int
228regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
229{
230 return (tdep->gpr_full_regnum != -1
231 && regnum >= tdep->gpr_full_regnum
232 && regnum <= tdep->gpr_full_regnum + 15);
233}
234
7803799a
UW
235static const char *
236s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 237{
7803799a 238 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 239
7803799a
UW
240 if (regnum == tdep->pc_regnum)
241 return "pc";
d0f54f9d 242
7803799a
UW
243 if (regnum == tdep->cc_regnum)
244 return "cc";
d0f54f9d 245
2ccd1468 246 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
247 {
248 static const char *full_name[] = {
249 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
250 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
251 };
252 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 253 }
7803799a
UW
254
255 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
256}
257
7803799a
UW
258static struct type *
259s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 260{
7803799a 261 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 262
7803799a
UW
263 if (regnum == tdep->pc_regnum)
264 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 265
7803799a
UW
266 if (regnum == tdep->cc_regnum)
267 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 268
2ccd1468 269 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
270 return builtin_type (gdbarch)->builtin_uint64;
271
272 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
273}
274
05d1431c 275static enum register_status
7803799a
UW
276s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
277 int regnum, gdb_byte *buf)
d0f54f9d 278{
7803799a 279 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 280 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 281 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
282 ULONGEST val;
283
7803799a 284 if (regnum == tdep->pc_regnum)
d0f54f9d 285 {
05d1431c
PA
286 enum register_status status;
287
288 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
289 if (status == REG_VALID)
290 {
291 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
292 val &= 0x7fffffff;
293 store_unsigned_integer (buf, regsize, byte_order, val);
294 }
295 return status;
7803799a 296 }
d0f54f9d 297
7803799a
UW
298 if (regnum == tdep->cc_regnum)
299 {
05d1431c
PA
300 enum register_status status;
301
302 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
303 if (status == REG_VALID)
304 {
305 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
306 val = (val >> 12) & 3;
307 else
308 val = (val >> 44) & 3;
309 store_unsigned_integer (buf, regsize, byte_order, val);
310 }
311 return status;
7803799a 312 }
d0f54f9d 313
2ccd1468 314 if (regnum_is_gpr_full (tdep, regnum))
7803799a 315 {
05d1431c 316 enum register_status status;
7803799a 317 ULONGEST val_upper;
05d1431c 318
7803799a
UW
319 regnum -= tdep->gpr_full_regnum;
320
05d1431c
PA
321 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
322 if (status == REG_VALID)
323 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
324 &val_upper);
325 if (status == REG_VALID)
326 {
327 val |= val_upper << 32;
328 store_unsigned_integer (buf, regsize, byte_order, val);
329 }
330 return status;
d0f54f9d 331 }
7803799a
UW
332
333 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
334}
335
336static void
7803799a
UW
337s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
338 int regnum, const gdb_byte *buf)
d0f54f9d 339{
7803799a 340 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 341 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 342 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
343 ULONGEST val, psw;
344
7803799a 345 if (regnum == tdep->pc_regnum)
d0f54f9d 346 {
7803799a
UW
347 val = extract_unsigned_integer (buf, regsize, byte_order);
348 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
349 {
350 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
351 val = (psw & 0x80000000) | (val & 0x7fffffff);
352 }
353 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
354 return;
355 }
d0f54f9d 356
7803799a
UW
357 if (regnum == tdep->cc_regnum)
358 {
359 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 360 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
361 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
362 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
363 else
364 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
365 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
366 return;
367 }
d0f54f9d 368
2ccd1468 369 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
370 {
371 regnum -= tdep->gpr_full_regnum;
372 val = extract_unsigned_integer (buf, regsize, byte_order);
373 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
374 val & 0xffffffff);
375 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
376 val >> 32);
377 return;
d0f54f9d 378 }
7803799a
UW
379
380 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
381}
382
383/* 'float' values are stored in the upper half of floating-point
384 registers, even though we are otherwise a big-endian platform. */
385
9acbedc0 386static struct value *
2ed3c037
UW
387s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
388 int regnum, struct frame_id frame_id)
d0f54f9d 389{
2ed3c037
UW
390 struct value *value = default_value_from_register (gdbarch, type,
391 regnum, frame_id);
744a8059
SP
392 check_typedef (type);
393
394 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
395 && TYPE_LENGTH (type) < 8)
9acbedc0 396 set_value_offset (value, 0);
d0f54f9d 397
9acbedc0 398 return value;
d0f54f9d
JB
399}
400
401/* Register groups. */
402
a78f21af 403static int
7803799a
UW
404s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
405 struct reggroup *group)
d0f54f9d
JB
406{
407 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
408
d6db1fab
UW
409 /* We usually save/restore the whole PSW, which includes PC and CC.
410 However, some older gdbservers may not support saving/restoring
411 the whole PSW yet, and will return an XML register description
412 excluding those from the save/restore register groups. In those
413 cases, we still need to explicitly save/restore PC and CC in order
414 to push or pop frames. Since this doesn't hurt anything if we
415 already save/restore the whole PSW (it's just redundant), we add
416 PC and CC at this point unconditionally. */
d0f54f9d 417 if (group == save_reggroup || group == restore_reggroup)
7803799a 418 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
419
420 return default_register_reggroup_p (gdbarch, regnum, group);
421}
422
423
2ccd1468 424/* Maps for register sets. */
d0f54f9d 425
99b7da5d 426static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 427 {
99b7da5d
AA
428 { 1, S390_PSWM_REGNUM },
429 { 1, S390_PSWA_REGNUM },
430 { 16, S390_R0_REGNUM },
431 { 16, S390_A0_REGNUM },
432 { 1, S390_ORIG_R2_REGNUM },
433 { 0 }
2ccd1468 434 };
d0f54f9d 435
99b7da5d 436static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 437 {
99b7da5d
AA
438 { 1, S390_FPC_REGNUM, 8 },
439 { 16, S390_F0_REGNUM, 8 },
440 { 0 }
2ccd1468 441 };
d0f54f9d 442
99b7da5d 443static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 444 {
99b7da5d
AA
445 { 16, S390_R0_UPPER_REGNUM, 4 },
446 { 0 }
2ccd1468 447 };
7803799a 448
99b7da5d 449static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 450 {
99b7da5d
AA
451 { 1, REGCACHE_MAP_SKIP, 4 },
452 { 1, S390_LAST_BREAK_REGNUM, 4 },
453 { 0 }
2ccd1468 454 };
c642a434 455
99b7da5d 456static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 457 {
99b7da5d
AA
458 { 1, S390_LAST_BREAK_REGNUM, 8 },
459 { 0 }
2ccd1468
UW
460 };
461
99b7da5d 462static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 463 {
99b7da5d
AA
464 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
465 { 0 }
2ccd1468
UW
466 };
467
99b7da5d 468static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 469 {
99b7da5d
AA
470 { 1, S390_TDB_DWORD0_REGNUM, 8 },
471 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
472 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
473 { 1, S390_TDB_ATIA_REGNUM, 8 },
474 { 12, REGCACHE_MAP_SKIP, 8 },
475 { 16, S390_TDB_R0_REGNUM, 8 },
476 { 0 }
2ccd1468 477 };
c642a434 478
4ac33720 479
99b7da5d
AA
480/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
481 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
482
483static void
484s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
485 int regnum, const void *regs, size_t len)
486{
487 ULONGEST tdw;
488 enum register_status ret;
489 int i;
490
99b7da5d 491 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
492 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
493 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 494 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
495}
496
99b7da5d
AA
497const struct regset s390_gregset = {
498 s390_gregmap,
499 regcache_supply_regset,
500 regcache_collect_regset
d0f54f9d
JB
501};
502
99b7da5d
AA
503const struct regset s390_fpregset = {
504 s390_fpregmap,
505 regcache_supply_regset,
506 regcache_collect_regset
d0f54f9d
JB
507};
508
7803799a 509static const struct regset s390_upper_regset = {
34201ae3 510 s390_regmap_upper,
99b7da5d
AA
511 regcache_supply_regset,
512 regcache_collect_regset
7803799a
UW
513};
514
99b7da5d 515const struct regset s390_last_break_regset = {
c642a434 516 s390_regmap_last_break,
99b7da5d
AA
517 regcache_supply_regset,
518 regcache_collect_regset
c642a434
UW
519};
520
99b7da5d 521const struct regset s390x_last_break_regset = {
c642a434 522 s390x_regmap_last_break,
99b7da5d
AA
523 regcache_supply_regset,
524 regcache_collect_regset
c642a434
UW
525};
526
99b7da5d 527const struct regset s390_system_call_regset = {
c642a434 528 s390_regmap_system_call,
99b7da5d
AA
529 regcache_supply_regset,
530 regcache_collect_regset
c642a434
UW
531};
532
99b7da5d 533const struct regset s390_tdb_regset = {
4ac33720
UW
534 s390_regmap_tdb,
535 s390_supply_tdb_regset,
99b7da5d 536 regcache_collect_regset
4ac33720
UW
537};
538
d0f54f9d
JB
539/* Return the appropriate register set for the core section identified
540 by SECT_NAME and SECT_SIZE. */
63807e1d 541static const struct regset *
d0f54f9d
JB
542s390_regset_from_core_section (struct gdbarch *gdbarch,
543 const char *sect_name, size_t sect_size)
544{
545 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
546
e31dcd20 547 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
548 return tdep->gregset;
549
e31dcd20 550 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
551 return tdep->fpregset;
552
7803799a
UW
553 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
554 return &s390_upper_regset;
555
c642a434
UW
556 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
557 return (gdbarch_ptr_bit (gdbarch) == 32
558 ? &s390_last_break_regset : &s390x_last_break_regset);
559
560 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
561 return &s390_system_call_regset;
562
4ac33720
UW
563 if (strcmp (sect_name, ".reg-s390-tdb") == 0 && sect_size >= 256)
564 return &s390_tdb_regset;
565
d0f54f9d 566 return NULL;
5769d3cd
AC
567}
568
5aa82d05
AA
569/* Iterate over supported core file register note sections. */
570
571static void
572s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
573 iterate_over_regset_sections_cb *cb,
574 void *cb_data,
575 const struct regcache *regcache)
576{
577 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
578
579 cb (".reg", tdep->sizeof_gregset, "general-purpose", cb_data);
580 cb (".reg2", s390_sizeof_fpregset, "floating-point", cb_data);
581
582 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
583 cb (".reg-s390-high-gprs", 16 * 4, "s390 GPR upper halves", cb_data);
584
585 if (tdep->have_linux_v1)
586 cb (".reg-s390-last-break", 8, "s930 last-break address", cb_data);
587
588 if (tdep->have_linux_v2)
589 cb (".reg-s390-system-call", 4, "s390 system-call", cb_data);
590
591 /* If regcache is set, we are in "write" (gcore) mode. In this
592 case, don't iterate over the TDB unless its registers are
593 available. */
594 if (tdep->have_tdb
595 && (regcache == NULL
596 || REG_VALID == regcache_register_status (regcache,
597 S390_TDB_DWORD0_REGNUM)))
598 cb (".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB", cb_data);
599}
600
7803799a
UW
601static const struct target_desc *
602s390_core_read_description (struct gdbarch *gdbarch,
603 struct target_ops *target, bfd *abfd)
604{
605 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
606 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
607 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a 608 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 609 CORE_ADDR hwcap = 0;
4ac33720
UW
610
611 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
612 if (!section)
613 return NULL;
614
615 switch (bfd_section_size (abfd, section))
616 {
617 case s390_sizeof_gregset:
c642a434 618 if (high_gprs)
4ac33720
UW
619 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 :
620 v2? tdesc_s390_linux64v2 :
c642a434
UW
621 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
622 else
623 return (v2? tdesc_s390_linux32v2 :
624 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
625
626 case s390x_sizeof_gregset:
4ac33720
UW
627 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 :
628 v2? tdesc_s390x_linux64v2 :
c642a434 629 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
630
631 default:
632 return NULL;
633 }
634}
635
d0f54f9d 636
4bc8c588
JB
637/* Decoding S/390 instructions. */
638
639/* Named opcode values for the S/390 instructions we recognize. Some
640 instructions have their opcode split across two fields; those are the
641 op1_* and op2_* enums. */
642enum
643 {
a8c99f38
JB
644 op1_lhi = 0xa7, op2_lhi = 0x08,
645 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 646 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 647 op_lr = 0x18,
a8c99f38
JB
648 op_lgr = 0xb904,
649 op_l = 0x58,
650 op1_ly = 0xe3, op2_ly = 0x58,
651 op1_lg = 0xe3, op2_lg = 0x04,
652 op_lm = 0x98,
653 op1_lmy = 0xeb, op2_lmy = 0x98,
654 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 655 op_st = 0x50,
a8c99f38 656 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 657 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 658 op_std = 0x60,
4bc8c588 659 op_stm = 0x90,
a8c99f38 660 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 661 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
662 op1_aghi = 0xa7, op2_aghi = 0x0b,
663 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
664 op1_agfi = 0xc2, op2_agfi = 0x08,
665 op1_afi = 0xc2, op2_afi = 0x09,
666 op1_algfi= 0xc2, op2_algfi= 0x0a,
667 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
668 op_ar = 0x1a,
669 op_agr = 0xb908,
670 op_a = 0x5a,
671 op1_ay = 0xe3, op2_ay = 0x5a,
672 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
673 op1_slgfi= 0xc2, op2_slgfi= 0x04,
674 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
675 op_sr = 0x1b,
676 op_sgr = 0xb909,
677 op_s = 0x5b,
678 op1_sy = 0xe3, op2_sy = 0x5b,
679 op1_sg = 0xe3, op2_sg = 0x09,
680 op_nr = 0x14,
681 op_ngr = 0xb980,
682 op_la = 0x41,
683 op1_lay = 0xe3, op2_lay = 0x71,
684 op1_larl = 0xc0, op2_larl = 0x00,
685 op_basr = 0x0d,
686 op_bas = 0x4d,
687 op_bcr = 0x07,
688 op_bc = 0x0d,
1db4e8a0
UW
689 op_bctr = 0x06,
690 op_bctgr = 0xb946,
691 op_bct = 0x46,
692 op1_bctg = 0xe3, op2_bctg = 0x46,
693 op_bxh = 0x86,
694 op1_bxhg = 0xeb, op2_bxhg = 0x44,
695 op_bxle = 0x87,
696 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
697 op1_bras = 0xa7, op2_bras = 0x05,
698 op1_brasl= 0xc0, op2_brasl= 0x05,
699 op1_brc = 0xa7, op2_brc = 0x04,
700 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
701 op1_brct = 0xa7, op2_brct = 0x06,
702 op1_brctg= 0xa7, op2_brctg= 0x07,
703 op_brxh = 0x84,
704 op1_brxhg= 0xec, op2_brxhg= 0x44,
705 op_brxle = 0x85,
706 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 707 op_svc = 0x0a,
4bc8c588
JB
708 };
709
710
a8c99f38
JB
711/* Read a single instruction from address AT. */
712
713#define S390_MAX_INSTR_SIZE 6
714static int
715s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
716{
717 static int s390_instrlen[] = { 2, 4, 4, 6 };
718 int instrlen;
719
8defab1a 720 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
721 return -1;
722 instrlen = s390_instrlen[instr[0] >> 6];
723 if (instrlen > 2)
724 {
8defab1a 725 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 726 return -1;
a8c99f38
JB
727 }
728 return instrlen;
729}
730
731
4bc8c588
JB
732/* The functions below are for recognizing and decoding S/390
733 instructions of various formats. Each of them checks whether INSN
734 is an instruction of the given format, with the specified opcodes.
735 If it is, it sets the remaining arguments to the values of the
736 instruction's fields, and returns a non-zero value; otherwise, it
737 returns zero.
738
739 These functions' arguments appear in the order they appear in the
740 instruction, not in the machine-language form. So, opcodes always
741 come first, even though they're sometimes scattered around the
742 instructions. And displacements appear before base and extension
743 registers, as they do in the assembly syntax, not at the end, as
744 they do in the machine language. */
a78f21af 745static int
4bc8c588
JB
746is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
747{
748 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
749 {
750 *r1 = (insn[1] >> 4) & 0xf;
751 /* i2 is a 16-bit signed quantity. */
752 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
753 return 1;
754 }
755 else
756 return 0;
757}
8ac0e65a 758
5769d3cd 759
4bc8c588
JB
760static int
761is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 762 unsigned int *r1, int *i2)
4bc8c588
JB
763{
764 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
765 {
766 *r1 = (insn[1] >> 4) & 0xf;
767 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
768 no sign extension is necessary, but we don't want to assume
769 that. */
4bc8c588 770 *i2 = (((insn[2] << 24)
34201ae3
UW
771 | (insn[3] << 16)
772 | (insn[4] << 8)
773 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
774 return 1;
775 }
776 else
777 return 0;
778}
779
780
781static int
782is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
783{
784 if (insn[0] == op)
785 {
786 *r1 = (insn[1] >> 4) & 0xf;
787 *r2 = insn[1] & 0xf;
788 return 1;
789 }
790 else
791 return 0;
792}
793
794
795static int
796is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
797{
798 if (((insn[0] << 8) | insn[1]) == op)
799 {
800 /* Yes, insn[3]. insn[2] is unused in RRE format. */
801 *r1 = (insn[3] >> 4) & 0xf;
802 *r2 = insn[3] & 0xf;
803 return 1;
804 }
805 else
806 return 0;
807}
808
809
810static int
811is_rs (bfd_byte *insn, int op,
eb1bd1fb 812 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
813{
814 if (insn[0] == op)
815 {
816 *r1 = (insn[1] >> 4) & 0xf;
817 *r3 = insn[1] & 0xf;
818 *b2 = (insn[2] >> 4) & 0xf;
819 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
820 return 1;
821 }
822 else
823 return 0;
824}
825
826
827static int
a8c99f38 828is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 829 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
830{
831 if (insn[0] == op1
4bc8c588
JB
832 && insn[5] == op2)
833 {
834 *r1 = (insn[1] >> 4) & 0xf;
835 *r3 = insn[1] & 0xf;
836 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 837 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 838 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 839 ^ 0x80000) - 0x80000;
4bc8c588
JB
840 return 1;
841 }
842 else
843 return 0;
844}
845
846
1db4e8a0
UW
847static int
848is_rsi (bfd_byte *insn, int op,
34201ae3 849 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
850{
851 if (insn[0] == op)
852 {
853 *r1 = (insn[1] >> 4) & 0xf;
854 *r3 = insn[1] & 0xf;
855 /* i2 is a 16-bit signed quantity. */
856 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
857 return 1;
858 }
859 else
860 return 0;
861}
862
863
864static int
865is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 866 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
867{
868 if (insn[0] == op1
869 && insn[5] == op2)
870 {
871 *r1 = (insn[1] >> 4) & 0xf;
872 *r3 = insn[1] & 0xf;
873 /* i2 is a 16-bit signed quantity. */
874 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
875 return 1;
876 }
877 else
878 return 0;
879}
880
881
4bc8c588
JB
882static int
883is_rx (bfd_byte *insn, int op,
eb1bd1fb 884 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
885{
886 if (insn[0] == op)
887 {
888 *r1 = (insn[1] >> 4) & 0xf;
889 *x2 = insn[1] & 0xf;
890 *b2 = (insn[2] >> 4) & 0xf;
891 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
892 return 1;
893 }
894 else
895 return 0;
896}
897
898
899static int
a8c99f38 900is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 901 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
902{
903 if (insn[0] == op1
4bc8c588
JB
904 && insn[5] == op2)
905 {
906 *r1 = (insn[1] >> 4) & 0xf;
907 *x2 = insn[1] & 0xf;
908 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 909 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 910 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 911 ^ 0x80000) - 0x80000;
4bc8c588
JB
912 return 1;
913 }
914 else
915 return 0;
916}
917
918
3fc46200 919/* Prologue analysis. */
4bc8c588 920
d0f54f9d
JB
921#define S390_NUM_GPRS 16
922#define S390_NUM_FPRS 16
4bc8c588 923
a8c99f38
JB
924struct s390_prologue_data {
925
ee1b3323
UW
926 /* The stack. */
927 struct pv_area *stack;
928
e17a4113 929 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
930 int gpr_size;
931 int fpr_size;
e17a4113 932 enum bfd_endian byte_order;
a8c99f38
JB
933
934 /* The general-purpose registers. */
3fc46200 935 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
936
937 /* The floating-point registers. */
3fc46200 938 pv_t fpr[S390_NUM_FPRS];
a8c99f38 939
121d8485
UW
940 /* The offset relative to the CFA where the incoming GPR N was saved
941 by the function prologue. 0 if not saved or unknown. */
942 int gpr_slot[S390_NUM_GPRS];
4bc8c588 943
121d8485
UW
944 /* Likewise for FPRs. */
945 int fpr_slot[S390_NUM_FPRS];
4bc8c588 946
121d8485
UW
947 /* Nonzero if the backchain was saved. This is assumed to be the
948 case when the incoming SP is saved at the current SP location. */
949 int back_chain_saved_p;
950};
4bc8c588 951
3fc46200
UW
952/* Return the effective address for an X-style instruction, like:
953
34201ae3 954 L R1, D2(X2, B2)
3fc46200
UW
955
956 Here, X2 and B2 are registers, and D2 is a signed 20-bit
957 constant; the effective address is the sum of all three. If either
958 X2 or B2 are zero, then it doesn't contribute to the sum --- this
959 means that r0 can't be used as either X2 or B2. */
960static pv_t
961s390_addr (struct s390_prologue_data *data,
962 int d2, unsigned int x2, unsigned int b2)
963{
964 pv_t result;
965
966 result = pv_constant (d2);
967 if (x2)
968 result = pv_add (result, data->gpr[x2]);
969 if (b2)
970 result = pv_add (result, data->gpr[b2]);
971
972 return result;
973}
974
975/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 976static void
3fc46200
UW
977s390_store (struct s390_prologue_data *data,
978 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
979 pv_t value)
4bc8c588 980{
3fc46200 981 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 982 pv_t offset;
121d8485
UW
983
984 /* Check whether we are storing the backchain. */
3fc46200 985 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 986
3fc46200 987 if (pv_is_constant (offset) && offset.k == 0)
121d8485 988 if (size == data->gpr_size
3fc46200 989 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
990 {
991 data->back_chain_saved_p = 1;
992 return;
993 }
994
995
996 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
997 if (!pv_area_store_would_trash (data->stack, addr))
998 pv_area_store (data->stack, addr, size, value);
4bc8c588 999
a8c99f38 1000
121d8485
UW
1001 /* Note: If this is some store we cannot identify, you might think we
1002 should forget our cached values, as any of those might have been hit.
1003
1004 However, we make the assumption that the register save areas are only
1005 ever stored to once in any given function, and we do recognize these
1006 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1007}
4bc8c588 1008
3fc46200
UW
1009/* Do a SIZE-byte load from D2(X2,B2). */
1010static pv_t
1011s390_load (struct s390_prologue_data *data,
1012 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1013
4bc8c588 1014{
3fc46200 1015 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1016
a8c99f38
JB
1017 /* If it's a load from an in-line constant pool, then we can
1018 simulate that, under the assumption that the code isn't
1019 going to change between the time the processor actually
1020 executed it creating the current frame, and the time when
1021 we're analyzing the code to unwind past that frame. */
3fc46200 1022 if (pv_is_constant (addr))
4bc8c588 1023 {
0542c86d 1024 struct target_section *secp;
3fc46200 1025 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1026 if (secp != NULL
34201ae3 1027 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1028 secp->the_bfd_section)
34201ae3
UW
1029 & SEC_READONLY))
1030 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1031 data->byte_order));
a8c99f38 1032 }
7666f43c 1033
121d8485 1034 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1035 return pv_area_fetch (data->stack, addr, size);
1036}
121d8485 1037
ee1b3323
UW
1038/* Function for finding saved registers in a 'struct pv_area'; we pass
1039 this to pv_area_scan.
121d8485 1040
ee1b3323
UW
1041 If VALUE is a saved register, ADDR says it was saved at a constant
1042 offset from the frame base, and SIZE indicates that the whole
1043 register was saved, record its offset in the reg_offset table in
1044 PROLOGUE_UNTYPED. */
1045static void
c378eb4e
MS
1046s390_check_for_saved (void *data_untyped, pv_t addr,
1047 CORE_ADDR size, pv_t value)
ee1b3323
UW
1048{
1049 struct s390_prologue_data *data = data_untyped;
1050 int i, offset;
1051
1052 if (!pv_is_register (addr, S390_SP_REGNUM))
1053 return;
1054
1055 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1056
ee1b3323
UW
1057 /* If we are storing the original value of a register, we want to
1058 record the CFA offset. If the same register is stored multiple
1059 times, the stack slot with the highest address counts. */
34201ae3 1060
ee1b3323
UW
1061 for (i = 0; i < S390_NUM_GPRS; i++)
1062 if (size == data->gpr_size
1063 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1064 if (data->gpr_slot[i] == 0
1065 || data->gpr_slot[i] > offset)
1066 {
1067 data->gpr_slot[i] = offset;
1068 return;
1069 }
1070
1071 for (i = 0; i < S390_NUM_FPRS; i++)
1072 if (size == data->fpr_size
1073 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1074 if (data->fpr_slot[i] == 0
1075 || data->fpr_slot[i] > offset)
1076 {
1077 data->fpr_slot[i] = offset;
1078 return;
1079 }
a8c99f38 1080}
4bc8c588 1081
a8c99f38
JB
1082/* Analyze the prologue of the function starting at START_PC,
1083 continuing at most until CURRENT_PC. Initialize DATA to
1084 hold all information we find out about the state of the registers
1085 and stack slots. Return the address of the instruction after
1086 the last one that changed the SP, FP, or back chain; or zero
1087 on error. */
1088static CORE_ADDR
1089s390_analyze_prologue (struct gdbarch *gdbarch,
1090 CORE_ADDR start_pc,
1091 CORE_ADDR current_pc,
1092 struct s390_prologue_data *data)
4bc8c588 1093{
a8c99f38
JB
1094 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1095
4bc8c588 1096 /* Our return value:
a8c99f38 1097 The address of the instruction after the last one that changed
34201ae3 1098 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1099 read memory. */
1100 CORE_ADDR result = start_pc;
4bc8c588 1101
4bc8c588
JB
1102 /* The current PC for our abstract interpretation. */
1103 CORE_ADDR pc;
1104
1105 /* The address of the next instruction after that. */
1106 CORE_ADDR next_pc;
34201ae3 1107
4bc8c588
JB
1108 /* Set up everything's initial value. */
1109 {
1110 int i;
1111
55f960e1 1112 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1113
a8c99f38
JB
1114 /* For the purpose of prologue tracking, we consider the GPR size to
1115 be equal to the ABI word size, even if it is actually larger
1116 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1117 data->gpr_size = word_size;
1118 data->fpr_size = 8;
e17a4113 1119 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1120
4bc8c588 1121 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1122 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1123
1124 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1125 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1126
121d8485
UW
1127 for (i = 0; i < S390_NUM_GPRS; i++)
1128 data->gpr_slot[i] = 0;
1129
1130 for (i = 0; i < S390_NUM_FPRS; i++)
1131 data->fpr_slot[i] = 0;
4bc8c588 1132
121d8485 1133 data->back_chain_saved_p = 0;
4bc8c588
JB
1134 }
1135
a8c99f38
JB
1136 /* Start interpreting instructions, until we hit the frame's
1137 current PC or the first branch instruction. */
1138 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1139 {
4bc8c588 1140 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1141 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1142
3fc46200
UW
1143 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1144 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1145 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1146
4bc8c588 1147 /* Fields for various kinds of instructions. */
a8c99f38
JB
1148 unsigned int b2, r1, r2, x2, r3;
1149 int i2, d2;
4bc8c588 1150
121d8485 1151 /* The values of SP and FP before this instruction,
34201ae3 1152 for detecting instructions that change them. */
3fc46200 1153 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1154 /* Likewise for the flag whether the back chain was saved. */
1155 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1156
1157 /* If we got an error trying to read the instruction, report it. */
1158 if (insn_len < 0)
34201ae3
UW
1159 {
1160 result = 0;
1161 break;
1162 }
4bc8c588
JB
1163
1164 next_pc = pc + insn_len;
1165
a8c99f38
JB
1166 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1167 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1168 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1169
4bc8c588 1170
3fc46200
UW
1171 /* LHI r1, i2 --- load halfword immediate. */
1172 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1173 /* LGFI r1, i2 --- load fullword immediate. */
1174 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1175 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1176 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1177 data->gpr[r1] = pv_constant (i2);
1178
1179 /* LR r1, r2 --- load from register. */
1180 /* LGR r1, r2 --- load from register (64-bit version). */
1181 else if (is_rr (insn32, op_lr, &r1, &r2)
1182 || is_rre (insn64, op_lgr, &r1, &r2))
1183 data->gpr[r1] = data->gpr[r2];
1184
1185 /* L r1, d2(x2, b2) --- load. */
1186 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1187 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1188 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1189 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1190 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1191 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1192
1193 /* ST r1, d2(x2, b2) --- store. */
1194 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1195 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1196 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1197 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1198 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1199 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1200
1201 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1202 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1203 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1204
1205 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1206 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1207 version). */
3fc46200
UW
1208 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1209 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1210 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1211 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1212 {
1213 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1214 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1215 }
4bc8c588 1216
3fc46200
UW
1217 /* AHI r1, i2 --- add halfword immediate. */
1218 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1219 /* AFI r1, i2 --- add fullword immediate. */
1220 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1221 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1222 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1223 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1224 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1225 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1226
1227 /* ALFI r1, i2 --- add logical immediate. */
1228 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1229 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1230 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1231 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1232 (CORE_ADDR)i2 & 0xffffffff);
1233
1234 /* AR r1, r2 -- add register. */
1235 /* AGR r1, r2 -- add register (64-bit version). */
1236 else if (is_rr (insn32, op_ar, &r1, &r2)
1237 || is_rre (insn64, op_agr, &r1, &r2))
1238 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1239
1240 /* A r1, d2(x2, b2) -- add. */
1241 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1242 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1243 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1244 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1245 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1246 data->gpr[r1] = pv_add (data->gpr[r1],
1247 s390_load (data, d2, x2, b2, data->gpr_size));
1248
1249 /* SLFI r1, i2 --- subtract logical immediate. */
1250 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1251 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1252 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1253 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1254 -((CORE_ADDR)i2 & 0xffffffff));
1255
1256 /* SR r1, r2 -- subtract register. */
1257 /* SGR r1, r2 -- subtract register (64-bit version). */
1258 else if (is_rr (insn32, op_sr, &r1, &r2)
1259 || is_rre (insn64, op_sgr, &r1, &r2))
1260 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1261
1262 /* S r1, d2(x2, b2) -- subtract. */
1263 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1264 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1265 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1266 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1267 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1268 data->gpr[r1] = pv_subtract (data->gpr[r1],
1269 s390_load (data, d2, x2, b2, data->gpr_size));
1270
1271 /* LA r1, d2(x2, b2) --- load address. */
1272 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1273 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1274 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1275 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1276
1277 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1278 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1279 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1280
3fc46200 1281 /* BASR r1, 0 --- branch and save.
34201ae3 1282 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1283 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1284 && r2 == 0)
3fc46200 1285 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1286
3fc46200 1287 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1288 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1289 {
1290 data->gpr[r1] = pv_constant (next_pc);
1291 next_pc = pc + i2 * 2;
4bc8c588 1292
34201ae3
UW
1293 /* We'd better not interpret any backward branches. We'll
1294 never terminate. */
1295 if (next_pc <= pc)
1296 break;
1297 }
4bc8c588 1298
a8c99f38
JB
1299 /* Terminate search when hitting any other branch instruction. */
1300 else if (is_rr (insn, op_basr, &r1, &r2)
1301 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1302 || is_rr (insn, op_bcr, &r1, &r2)
1303 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1304 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1305 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1306 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1307 break;
1308
4bc8c588 1309 else
d4fb63e1
TT
1310 {
1311 /* An instruction we don't know how to simulate. The only
1312 safe thing to do would be to set every value we're tracking
1313 to 'unknown'. Instead, we'll be optimistic: we assume that
1314 we *can* interpret every instruction that the compiler uses
1315 to manipulate any of the data we're interested in here --
1316 then we can just ignore anything else. */
1317 }
4bc8c588
JB
1318
1319 /* Record the address after the last instruction that changed
34201ae3
UW
1320 the FP, SP, or backlink. Ignore instructions that changed
1321 them back to their original values --- those are probably
1322 restore instructions. (The back chain is never restored,
1323 just popped.) */
4bc8c588 1324 {
34201ae3
UW
1325 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1326 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1327
1328 if ((! pv_is_identical (pre_insn_sp, sp)
1329 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1330 && sp.kind != pvk_unknown)
34201ae3
UW
1331 || (! pv_is_identical (pre_insn_fp, fp)
1332 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1333 && fp.kind != pvk_unknown)
34201ae3
UW
1334 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1335 result = next_pc;
4bc8c588 1336 }
5769d3cd 1337 }
4bc8c588 1338
ee1b3323
UW
1339 /* Record where all the registers were saved. */
1340 pv_area_scan (data->stack, s390_check_for_saved, data);
1341
1342 free_pv_area (data->stack);
1343 data->stack = NULL;
1344
4bc8c588 1345 return result;
5769d3cd
AC
1346}
1347
34201ae3 1348/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1349 some "real" code. */
1350static CORE_ADDR
6093d2eb 1351s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1352{
1353 struct s390_prologue_data data;
1354 CORE_ADDR skip_pc;
6093d2eb 1355 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1356 return skip_pc ? skip_pc : pc;
1357}
1358
d0f54f9d
JB
1359/* Return true if we are in the functin's epilogue, i.e. after the
1360 instruction that destroyed the function's stack frame. */
1361static int
1362s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1363{
1364 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1365
1366 /* In frameless functions, there's not frame to destroy and thus
1367 we don't care about the epilogue.
1368
1369 In functions with frame, the epilogue sequence is a pair of
1370 a LM-type instruction that restores (amongst others) the
1371 return register %r14 and the stack pointer %r15, followed
1372 by a branch 'br %r14' --or equivalent-- that effects the
1373 actual return.
1374
1375 In that situation, this function needs to return 'true' in
1376 exactly one case: when pc points to that branch instruction.
1377
1378 Thus we try to disassemble the one instructions immediately
177b42fe 1379 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1380 modifying the stack pointer.
1381
1382 Note that disassembling backwards is not reliable, so there
1383 is a slight chance of false positives here ... */
1384
1385 bfd_byte insn[6];
1386 unsigned int r1, r3, b2;
1387 int d2;
1388
1389 if (word_size == 4
8defab1a 1390 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1391 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1392 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1393 return 1;
1394
a8c99f38 1395 if (word_size == 4
8defab1a 1396 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1397 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1398 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1399 return 1;
1400
d0f54f9d 1401 if (word_size == 8
8defab1a 1402 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1403 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1404 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1405 return 1;
1406
1407 return 0;
1408}
5769d3cd 1409
1db4e8a0
UW
1410/* Displaced stepping. */
1411
1412/* Fix up the state of registers and memory after having single-stepped
1413 a displaced instruction. */
1414static void
1415s390_displaced_step_fixup (struct gdbarch *gdbarch,
1416 struct displaced_step_closure *closure,
1417 CORE_ADDR from, CORE_ADDR to,
1418 struct regcache *regs)
1419{
1420 /* Since we use simple_displaced_step_copy_insn, our closure is a
1421 copy of the instruction. */
1422 gdb_byte *insn = (gdb_byte *) closure;
1423 static int s390_instrlen[] = { 2, 4, 4, 6 };
1424 int insnlen = s390_instrlen[insn[0] >> 6];
1425
1426 /* Fields for various kinds of instructions. */
1427 unsigned int b2, r1, r2, x2, r3;
1428 int i2, d2;
1429
1430 /* Get current PC and addressing mode bit. */
1431 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1432 ULONGEST amode = 0;
1db4e8a0
UW
1433
1434 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1435 {
1436 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1437 amode &= 0x80000000;
1438 }
1439
1440 if (debug_displaced)
1441 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1442 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1443 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1444 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1445
1446 /* Handle absolute branch and save instructions. */
1447 if (is_rr (insn, op_basr, &r1, &r2)
1448 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1449 {
1450 /* Recompute saved return address in R1. */
1451 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1452 amode | (from + insnlen));
1453 }
1454
1455 /* Handle absolute branch instructions. */
1456 else if (is_rr (insn, op_bcr, &r1, &r2)
1457 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1458 || is_rr (insn, op_bctr, &r1, &r2)
1459 || is_rre (insn, op_bctgr, &r1, &r2)
1460 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1461 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1462 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1463 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1464 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1465 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1466 {
1467 /* Update PC iff branch was *not* taken. */
1468 if (pc == to + insnlen)
1469 regcache_write_pc (regs, from + insnlen);
1470 }
1471
1472 /* Handle PC-relative branch and save instructions. */
1473 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1474 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1475 {
1476 /* Update PC. */
1477 regcache_write_pc (regs, pc - to + from);
1478 /* Recompute saved return address in R1. */
1479 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1480 amode | (from + insnlen));
1481 }
1482
1483 /* Handle PC-relative branch instructions. */
1484 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1485 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1486 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1487 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1488 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1489 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1490 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1491 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1492 {
1493 /* Update PC. */
1494 regcache_write_pc (regs, pc - to + from);
1495 }
1496
1497 /* Handle LOAD ADDRESS RELATIVE LONG. */
1498 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1499 {
0161e4b9
UW
1500 /* Update PC. */
1501 regcache_write_pc (regs, from + insnlen);
34201ae3 1502 /* Recompute output address in R1. */
1db4e8a0 1503 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1504 amode | (from + i2 * 2));
1db4e8a0
UW
1505 }
1506
1507 /* If we executed a breakpoint instruction, point PC right back at it. */
1508 else if (insn[0] == 0x0 && insn[1] == 0x1)
1509 regcache_write_pc (regs, from);
1510
1511 /* For any other insn, PC points right after the original instruction. */
1512 else
1513 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1514
1515 if (debug_displaced)
1516 fprintf_unfiltered (gdb_stdlog,
1517 "displaced: (s390) pc is now %s\n",
1518 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1519}
a8c99f38 1520
d6db1fab
UW
1521
1522/* Helper routine to unwind pseudo registers. */
1523
1524static struct value *
1525s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1526{
1527 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1528 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1529 struct type *type = register_type (gdbarch, regnum);
1530
1531 /* Unwind PC via PSW address. */
1532 if (regnum == tdep->pc_regnum)
1533 {
1534 struct value *val;
1535
1536 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1537 if (!value_optimized_out (val))
1538 {
1539 LONGEST pswa = value_as_long (val);
1540
1541 if (TYPE_LENGTH (type) == 4)
1542 return value_from_pointer (type, pswa & 0x7fffffff);
1543 else
1544 return value_from_pointer (type, pswa);
1545 }
1546 }
1547
1548 /* Unwind CC via PSW mask. */
1549 if (regnum == tdep->cc_regnum)
1550 {
1551 struct value *val;
1552
1553 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1554 if (!value_optimized_out (val))
1555 {
1556 LONGEST pswm = value_as_long (val);
1557
1558 if (TYPE_LENGTH (type) == 4)
1559 return value_from_longest (type, (pswm >> 12) & 3);
1560 else
1561 return value_from_longest (type, (pswm >> 44) & 3);
1562 }
1563 }
1564
1565 /* Unwind full GPRs to show at least the lower halves (as the
1566 upper halves are undefined). */
2ccd1468 1567 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1568 {
1569 int reg = regnum - tdep->gpr_full_regnum;
1570 struct value *val;
1571
1572 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1573 if (!value_optimized_out (val))
1574 return value_cast (type, val);
1575 }
1576
1577 return allocate_optimized_out_value (type);
1578}
1579
1580static struct value *
1581s390_trad_frame_prev_register (struct frame_info *this_frame,
1582 struct trad_frame_saved_reg saved_regs[],
1583 int regnum)
1584{
1585 if (regnum < S390_NUM_REGS)
1586 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1587 else
1588 return s390_unwind_pseudo_register (this_frame, regnum);
1589}
1590
1591
a8c99f38
JB
1592/* Normal stack frames. */
1593
1594struct s390_unwind_cache {
1595
1596 CORE_ADDR func;
1597 CORE_ADDR frame_base;
1598 CORE_ADDR local_base;
1599
1600 struct trad_frame_saved_reg *saved_regs;
1601};
1602
a78f21af 1603static int
f089c433 1604s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1605 struct s390_unwind_cache *info)
5769d3cd 1606{
f089c433 1607 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1608 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1609 struct s390_prologue_data data;
3fc46200
UW
1610 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1611 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1612 int i;
1613 CORE_ADDR cfa;
a8c99f38
JB
1614 CORE_ADDR func;
1615 CORE_ADDR result;
1616 ULONGEST reg;
1617 CORE_ADDR prev_sp;
1618 int frame_pointer;
1619 int size;
edb3359d 1620 struct frame_info *next_frame;
a8c99f38
JB
1621
1622 /* Try to find the function start address. If we can't find it, we don't
1623 bother searching for it -- with modern compilers this would be mostly
1624 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1625 or else a valid backchain ... */
f089c433 1626 func = get_frame_func (this_frame);
a8c99f38
JB
1627 if (!func)
1628 return 0;
5769d3cd 1629
a8c99f38
JB
1630 /* Try to analyze the prologue. */
1631 result = s390_analyze_prologue (gdbarch, func,
f089c433 1632 get_frame_pc (this_frame), &data);
a8c99f38 1633 if (!result)
5769d3cd 1634 return 0;
5769d3cd 1635
a8c99f38 1636 /* If this was successful, we should have found the instruction that
34201ae3 1637 sets the stack pointer register to the previous value of the stack
a8c99f38 1638 pointer minus the frame size. */
3fc46200 1639 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1640 return 0;
a8c99f38 1641
34201ae3 1642 /* A frame size of zero at this point can mean either a real
a8c99f38 1643 frameless function, or else a failure to find the prologue.
34201ae3 1644 Perform some sanity checks to verify we really have a
a8c99f38
JB
1645 frameless function. */
1646 if (sp->k == 0)
5769d3cd 1647 {
34201ae3
UW
1648 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1649 size zero. This is only possible if the next frame is a sentinel
a8c99f38 1650 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1651 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1652 needed, instead the code should simpliy rely on its
1653 analysis. */
edb3359d
DJ
1654 next_frame = get_next_frame (this_frame);
1655 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1656 next_frame = get_next_frame (next_frame);
1657 if (next_frame
f089c433 1658 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1659 return 0;
5769d3cd 1660
a8c99f38
JB
1661 /* If we really have a frameless function, %r14 must be valid
1662 -- in particular, it must point to a different function. */
f089c433 1663 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1664 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1665 if (get_pc_function_start (reg) == func)
5769d3cd 1666 {
a8c99f38
JB
1667 /* However, there is one case where it *is* valid for %r14
1668 to point to the same function -- if this is a recursive
1669 call, and we have stopped in the prologue *before* the
1670 stack frame was allocated.
1671
1672 Recognize this case by looking ahead a bit ... */
5769d3cd 1673
a8c99f38 1674 struct s390_prologue_data data2;
3fc46200 1675 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1676
1677 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
1678 && pv_is_register (*sp, S390_SP_REGNUM)
1679 && sp->k != 0))
a8c99f38 1680 return 0;
5769d3cd 1681 }
5769d3cd 1682 }
5769d3cd
AC
1683
1684
a8c99f38
JB
1685 /* OK, we've found valid prologue data. */
1686 size = -sp->k;
5769d3cd 1687
a8c99f38
JB
1688 /* If the frame pointer originally also holds the same value
1689 as the stack pointer, we're probably using it. If it holds
1690 some other value -- even a constant offset -- it is most
1691 likely used as temp register. */
3fc46200 1692 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1693 frame_pointer = S390_FRAME_REGNUM;
1694 else
1695 frame_pointer = S390_SP_REGNUM;
1696
34201ae3
UW
1697 /* If we've detected a function with stack frame, we'll still have to
1698 treat it as frameless if we're currently within the function epilog
c378eb4e 1699 code at a point where the frame pointer has already been restored.
a8c99f38 1700 This can only happen in an innermost frame. */
0e100dab
AC
1701 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1702 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1703 next_frame = get_next_frame (this_frame);
1704 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1705 next_frame = get_next_frame (next_frame);
f089c433 1706 if (size > 0
edb3359d 1707 && (next_frame == NULL
f089c433 1708 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1709 {
a8c99f38
JB
1710 /* See the comment in s390_in_function_epilogue_p on why this is
1711 not completely reliable ... */
f089c433 1712 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1713 {
a8c99f38
JB
1714 memset (&data, 0, sizeof (data));
1715 size = 0;
1716 frame_pointer = S390_SP_REGNUM;
5769d3cd 1717 }
5769d3cd 1718 }
5769d3cd 1719
a8c99f38
JB
1720 /* Once we know the frame register and the frame size, we can unwind
1721 the current value of the frame register from the next frame, and
34201ae3 1722 add back the frame size to arrive that the previous frame's
a8c99f38 1723 stack pointer value. */
f089c433 1724 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1725 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1726
7803799a
UW
1727 /* Set up ABI call-saved/call-clobbered registers. */
1728 for (i = 0; i < S390_NUM_REGS; i++)
1729 if (!s390_register_call_saved (gdbarch, i))
1730 trad_frame_set_unknown (info->saved_regs, i);
1731
1732 /* CC is always call-clobbered. */
d6db1fab 1733 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1734
121d8485
UW
1735 /* Record the addresses of all register spill slots the prologue parser
1736 has recognized. Consider only registers defined as call-saved by the
1737 ABI; for call-clobbered registers the parser may have recognized
1738 spurious stores. */
5769d3cd 1739
7803799a
UW
1740 for (i = 0; i < 16; i++)
1741 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1742 && data.gpr_slot[i] != 0)
121d8485 1743 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1744
7803799a
UW
1745 for (i = 0; i < 16; i++)
1746 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1747 && data.fpr_slot[i] != 0)
1748 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1749
1750 /* Function return will set PC to %r14. */
d6db1fab 1751 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1752
1753 /* In frameless functions, we unwind simply by moving the return
1754 address to the PC. However, if we actually stored to the
1755 save area, use that -- we might only think the function frameless
1756 because we're in the middle of the prologue ... */
1757 if (size == 0
d6db1fab 1758 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1759 {
d6db1fab 1760 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1761 }
a8c99f38
JB
1762
1763 /* Another sanity check: unless this is a frameless function,
1764 we should have found spill slots for SP and PC.
1765 If not, we cannot unwind further -- this happens e.g. in
1766 libc's thread_start routine. */
1767 if (size > 0)
5769d3cd 1768 {
a8c99f38 1769 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1770 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1771 prev_sp = -1;
5769d3cd 1772 }
a8c99f38
JB
1773
1774 /* We use the current value of the frame register as local_base,
1775 and the top of the register save area as frame_base. */
1776 if (prev_sp != -1)
1777 {
1778 info->frame_base = prev_sp + 16*word_size + 32;
1779 info->local_base = prev_sp - size;
1780 }
1781
1782 info->func = func;
1783 return 1;
5769d3cd
AC
1784}
1785
a78f21af 1786static void
f089c433 1787s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1788 struct s390_unwind_cache *info)
5769d3cd 1789{
f089c433 1790 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1791 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1792 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1793 CORE_ADDR backchain;
1794 ULONGEST reg;
1795 LONGEST sp;
7803799a
UW
1796 int i;
1797
1798 /* Set up ABI call-saved/call-clobbered registers. */
1799 for (i = 0; i < S390_NUM_REGS; i++)
1800 if (!s390_register_call_saved (gdbarch, i))
1801 trad_frame_set_unknown (info->saved_regs, i);
1802
1803 /* CC is always call-clobbered. */
d6db1fab 1804 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1805
1806 /* Get the backchain. */
f089c433 1807 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1808 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1809
1810 /* A zero backchain terminates the frame chain. As additional
1811 sanity check, let's verify that the spill slot for SP in the
1812 save area pointed to by the backchain in fact links back to
1813 the save area. */
1814 if (backchain != 0
e17a4113
UW
1815 && safe_read_memory_integer (backchain + 15*word_size,
1816 word_size, byte_order, &sp)
a8c99f38
JB
1817 && (CORE_ADDR)sp == backchain)
1818 {
1819 /* We don't know which registers were saved, but it will have
34201ae3
UW
1820 to be at least %r14 and %r15. This will allow us to continue
1821 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
1822 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1823 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1824
1825 /* Function return will set PC to %r14. */
d6db1fab 1826 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1827 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1828
1829 /* We use the current value of the frame register as local_base,
34201ae3 1830 and the top of the register save area as frame_base. */
a8c99f38
JB
1831 info->frame_base = backchain + 16*word_size + 32;
1832 info->local_base = reg;
1833 }
1834
f089c433 1835 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1836}
1837
a8c99f38 1838static struct s390_unwind_cache *
f089c433 1839s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1840 void **this_prologue_cache)
1841{
62261490 1842 volatile struct gdb_exception ex;
a8c99f38 1843 struct s390_unwind_cache *info;
62261490 1844
a8c99f38
JB
1845 if (*this_prologue_cache)
1846 return *this_prologue_cache;
1847
1848 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1849 *this_prologue_cache = info;
f089c433 1850 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1851 info->func = -1;
1852 info->frame_base = -1;
1853 info->local_base = -1;
1854
62261490
PA
1855 TRY_CATCH (ex, RETURN_MASK_ERROR)
1856 {
1857 /* Try to use prologue analysis to fill the unwind cache.
1858 If this fails, fall back to reading the stack backchain. */
1859 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1860 s390_backchain_frame_unwind_cache (this_frame, info);
1861 }
1862 if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
1863 throw_exception (ex);
a8c99f38
JB
1864
1865 return info;
1866}
5769d3cd 1867
a78f21af 1868static void
f089c433 1869s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1870 void **this_prologue_cache,
1871 struct frame_id *this_id)
5769d3cd 1872{
a8c99f38 1873 struct s390_unwind_cache *info
f089c433 1874 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 1875
a8c99f38
JB
1876 if (info->frame_base == -1)
1877 return;
5769d3cd 1878
a8c99f38 1879 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
1880}
1881
f089c433
UW
1882static struct value *
1883s390_frame_prev_register (struct frame_info *this_frame,
1884 void **this_prologue_cache, int regnum)
a8c99f38 1885{
7803799a 1886 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1887 struct s390_unwind_cache *info
f089c433 1888 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 1889
d6db1fab 1890 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1891}
1892
1893static const struct frame_unwind s390_frame_unwind = {
1894 NORMAL_FRAME,
8fbca658 1895 default_frame_unwind_stop_reason,
a8c99f38 1896 s390_frame_this_id,
f089c433
UW
1897 s390_frame_prev_register,
1898 NULL,
1899 default_frame_sniffer
a8c99f38
JB
1900};
1901
5769d3cd 1902
8e645ae7
AC
1903/* Code stubs and their stack frames. For things like PLTs and NULL
1904 function calls (where there is no true frame and the return address
1905 is in the RETADDR register). */
a8c99f38 1906
8e645ae7
AC
1907struct s390_stub_unwind_cache
1908{
a8c99f38
JB
1909 CORE_ADDR frame_base;
1910 struct trad_frame_saved_reg *saved_regs;
1911};
1912
8e645ae7 1913static struct s390_stub_unwind_cache *
f089c433 1914s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 1915 void **this_prologue_cache)
5769d3cd 1916{
f089c433 1917 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1918 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 1919 struct s390_stub_unwind_cache *info;
a8c99f38 1920 ULONGEST reg;
5c3cf190 1921
a8c99f38
JB
1922 if (*this_prologue_cache)
1923 return *this_prologue_cache;
5c3cf190 1924
8e645ae7 1925 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 1926 *this_prologue_cache = info;
f089c433 1927 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1928
1929 /* The return address is in register %r14. */
d6db1fab 1930 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
1931
1932 /* Retrieve stack pointer and determine our frame base. */
f089c433 1933 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
1934 info->frame_base = reg + 16*word_size + 32;
1935
1936 return info;
5769d3cd
AC
1937}
1938
a8c99f38 1939static void
f089c433 1940s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
1941 void **this_prologue_cache,
1942 struct frame_id *this_id)
5769d3cd 1943{
8e645ae7 1944 struct s390_stub_unwind_cache *info
f089c433
UW
1945 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1946 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 1947}
5769d3cd 1948
f089c433
UW
1949static struct value *
1950s390_stub_frame_prev_register (struct frame_info *this_frame,
1951 void **this_prologue_cache, int regnum)
8e645ae7
AC
1952{
1953 struct s390_stub_unwind_cache *info
f089c433 1954 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 1955 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1956}
1957
f089c433
UW
1958static int
1959s390_stub_frame_sniffer (const struct frame_unwind *self,
1960 struct frame_info *this_frame,
1961 void **this_prologue_cache)
a8c99f38 1962{
93d42b30 1963 CORE_ADDR addr_in_block;
8e645ae7
AC
1964 bfd_byte insn[S390_MAX_INSTR_SIZE];
1965
1966 /* If the current PC points to non-readable memory, we assume we
1967 have trapped due to an invalid function pointer call. We handle
1968 the non-existing current function like a PLT stub. */
f089c433 1969 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 1970 if (in_plt_section (addr_in_block)
f089c433
UW
1971 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
1972 return 1;
1973 return 0;
a8c99f38 1974}
5769d3cd 1975
f089c433
UW
1976static const struct frame_unwind s390_stub_frame_unwind = {
1977 NORMAL_FRAME,
8fbca658 1978 default_frame_unwind_stop_reason,
f089c433
UW
1979 s390_stub_frame_this_id,
1980 s390_stub_frame_prev_register,
1981 NULL,
1982 s390_stub_frame_sniffer
1983};
1984
5769d3cd 1985
a8c99f38 1986/* Signal trampoline stack frames. */
5769d3cd 1987
a8c99f38
JB
1988struct s390_sigtramp_unwind_cache {
1989 CORE_ADDR frame_base;
1990 struct trad_frame_saved_reg *saved_regs;
1991};
5769d3cd 1992
a8c99f38 1993static struct s390_sigtramp_unwind_cache *
f089c433 1994s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1995 void **this_prologue_cache)
5769d3cd 1996{
f089c433 1997 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 1998 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 1999 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2000 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2001 struct s390_sigtramp_unwind_cache *info;
2002 ULONGEST this_sp, prev_sp;
7803799a 2003 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2004 int i;
2005
2006 if (*this_prologue_cache)
2007 return *this_prologue_cache;
5769d3cd 2008
a8c99f38
JB
2009 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2010 *this_prologue_cache = info;
f089c433 2011 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2012
f089c433
UW
2013 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2014 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2015 next_cfa = this_sp + 16*word_size + 32;
2016
2017 /* New-style RT frame:
2018 retcode + alignment (8 bytes)
2019 siginfo (128 bytes)
c378eb4e 2020 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2021 if (next_ra == next_cfa)
2022 {
f0f63663 2023 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2024 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2025 upper GPR halves if present. */
2026 sigreg_high_off = 8;
a8c99f38
JB
2027 }
2028
2029 /* Old-style RT frame and all non-RT frames:
2030 old signal mask (8 bytes)
c378eb4e 2031 pointer to sigregs. */
5769d3cd
AC
2032 else
2033 {
e17a4113
UW
2034 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2035 word_size, byte_order);
7803799a
UW
2036 /* sigregs are followed by signo (4 bytes), then by the
2037 upper GPR halves if present. */
2038 sigreg_high_off = 4;
a8c99f38 2039 }
5769d3cd 2040
a8c99f38 2041 /* The sigregs structure looks like this:
34201ae3
UW
2042 long psw_mask;
2043 long psw_addr;
2044 long gprs[16];
2045 int acrs[16];
2046 int fpc;
2047 int __pad;
2048 double fprs[16]; */
5769d3cd 2049
7803799a
UW
2050 /* PSW mask and address. */
2051 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2052 sigreg_ptr += word_size;
7803799a 2053 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2054 sigreg_ptr += word_size;
2055
2056 /* Then the GPRs. */
2057 for (i = 0; i < 16; i++)
2058 {
2059 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2060 sigreg_ptr += word_size;
2061 }
2062
2063 /* Then the ACRs. */
2064 for (i = 0; i < 16; i++)
2065 {
2066 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2067 sigreg_ptr += 4;
5769d3cd 2068 }
5769d3cd 2069
a8c99f38
JB
2070 /* The floating-point control word. */
2071 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2072 sigreg_ptr += 8;
5769d3cd 2073
a8c99f38
JB
2074 /* And finally the FPRs. */
2075 for (i = 0; i < 16; i++)
2076 {
2077 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2078 sigreg_ptr += 8;
2079 }
2080
7803799a
UW
2081 /* If we have them, the GPR upper halves are appended at the end. */
2082 sigreg_ptr += sigreg_high_off;
2083 if (tdep->gpr_full_regnum != -1)
2084 for (i = 0; i < 16; i++)
2085 {
34201ae3 2086 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2087 sigreg_ptr += 4;
2088 }
2089
a8c99f38
JB
2090 /* Restore the previous frame's SP. */
2091 prev_sp = read_memory_unsigned_integer (
2092 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2093 word_size, byte_order);
5769d3cd 2094
a8c99f38
JB
2095 /* Determine our frame base. */
2096 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2097
a8c99f38 2098 return info;
5769d3cd
AC
2099}
2100
a8c99f38 2101static void
f089c433 2102s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2103 void **this_prologue_cache,
2104 struct frame_id *this_id)
5769d3cd 2105{
a8c99f38 2106 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2107 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2108 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2109}
2110
f089c433
UW
2111static struct value *
2112s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2113 void **this_prologue_cache, int regnum)
a8c99f38
JB
2114{
2115 struct s390_sigtramp_unwind_cache *info
f089c433 2116 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2117 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2118}
2119
f089c433
UW
2120static int
2121s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2122 struct frame_info *this_frame,
2123 void **this_prologue_cache)
5769d3cd 2124{
f089c433 2125 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2126 bfd_byte sigreturn[2];
4c8287ac 2127
8defab1a 2128 if (target_read_memory (pc, sigreturn, 2))
f089c433 2129 return 0;
4c8287ac 2130
237b092b 2131 if (sigreturn[0] != op_svc)
f089c433 2132 return 0;
5769d3cd 2133
a8c99f38
JB
2134 if (sigreturn[1] != 119 /* sigreturn */
2135 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2136 return 0;
34201ae3 2137
f089c433 2138 return 1;
5769d3cd
AC
2139}
2140
f089c433
UW
2141static const struct frame_unwind s390_sigtramp_frame_unwind = {
2142 SIGTRAMP_FRAME,
8fbca658 2143 default_frame_unwind_stop_reason,
f089c433
UW
2144 s390_sigtramp_frame_this_id,
2145 s390_sigtramp_frame_prev_register,
2146 NULL,
2147 s390_sigtramp_frame_sniffer
2148};
2149
237b092b
AA
2150/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2151 upon error. */
2152
2153static LONGEST
2154s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2155 ptid_t ptid)
2156{
2157 struct regcache *regs = get_thread_regcache (ptid);
2158 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2159 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2160 ULONGEST pc;
2161 ULONGEST svc_number = -1;
2162 unsigned opcode;
2163
2164 /* Assume that the PC points after the 2-byte SVC instruction. We
2165 don't currently support SVC via EXECUTE. */
2166 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2167 pc -= 2;
2168 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2169 if (opcode != op_svc)
2170 return -1;
2171
2172 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2173 byte_order);
2174 if (svc_number == 0)
2175 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2176
2177 return svc_number;
2178}
2179
4c8287ac 2180
a8c99f38
JB
2181/* Frame base handling. */
2182
2183static CORE_ADDR
f089c433 2184s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2185{
a8c99f38 2186 struct s390_unwind_cache *info
f089c433 2187 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2188 return info->frame_base;
2189}
2190
2191static CORE_ADDR
f089c433 2192s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2193{
2194 struct s390_unwind_cache *info
f089c433 2195 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2196 return info->local_base;
2197}
2198
2199static const struct frame_base s390_frame_base = {
2200 &s390_frame_unwind,
2201 s390_frame_base_address,
2202 s390_local_base_address,
2203 s390_local_base_address
2204};
2205
2206static CORE_ADDR
2207s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2208{
7803799a 2209 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2210 ULONGEST pc;
7803799a 2211 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2212 return gdbarch_addr_bits_remove (gdbarch, pc);
2213}
2214
2215static CORE_ADDR
2216s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2217{
2218 ULONGEST sp;
2219 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2220 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2221}
2222
2223
a431654a
AC
2224/* DWARF-2 frame support. */
2225
7803799a
UW
2226static struct value *
2227s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2228 int regnum)
2229{
d6db1fab 2230 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2231}
2232
a431654a
AC
2233static void
2234s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2235 struct dwarf2_frame_state_reg *reg,
4a4e5149 2236 struct frame_info *this_frame)
a431654a
AC
2237{
2238 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2239
d6db1fab
UW
2240 /* The condition code (and thus PSW mask) is call-clobbered. */
2241 if (regnum == S390_PSWM_REGNUM)
2242 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2243
2244 /* The PSW address unwinds to the return address. */
2245 else if (regnum == S390_PSWA_REGNUM)
2246 reg->how = DWARF2_FRAME_REG_RA;
2247
7803799a
UW
2248 /* Fixed registers are call-saved or call-clobbered
2249 depending on the ABI in use. */
d6db1fab 2250 else if (regnum < S390_NUM_REGS)
a431654a 2251 {
7803799a 2252 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2253 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2254 else
a431654a 2255 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2256 }
a431654a 2257
d6db1fab
UW
2258 /* We install a special function to unwind pseudos. */
2259 else
7803799a
UW
2260 {
2261 reg->how = DWARF2_FRAME_REG_FN;
2262 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2263 }
2264}
2265
2266
b0cf273e
JB
2267/* Dummy function calls. */
2268
78f8b424
JB
2269/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2270 "Integer-like" types are those that should be passed the way
2271 integers are: integers, enums, ranges, characters, and booleans. */
2272static int
2273is_integer_like (struct type *type)
2274{
2275 enum type_code code = TYPE_CODE (type);
2276
2277 return (code == TYPE_CODE_INT
34201ae3
UW
2278 || code == TYPE_CODE_ENUM
2279 || code == TYPE_CODE_RANGE
2280 || code == TYPE_CODE_CHAR
2281 || code == TYPE_CODE_BOOL);
78f8b424
JB
2282}
2283
78f8b424
JB
2284/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2285 "Pointer-like" types are those that should be passed the way
2286 pointers are: pointers and references. */
2287static int
2288is_pointer_like (struct type *type)
2289{
2290 enum type_code code = TYPE_CODE (type);
2291
2292 return (code == TYPE_CODE_PTR
34201ae3 2293 || code == TYPE_CODE_REF);
78f8b424
JB
2294}
2295
2296
20a940cc
JB
2297/* Return non-zero if TYPE is a `float singleton' or `double
2298 singleton', zero otherwise.
2299
2300 A `T singleton' is a struct type with one member, whose type is
2301 either T or a `T singleton'. So, the following are all float
2302 singletons:
2303
2304 struct { float x };
2305 struct { struct { float x; } x; };
2306 struct { struct { struct { float x; } x; } x; };
2307
2308 ... and so on.
2309
b0cf273e
JB
2310 All such structures are passed as if they were floats or doubles,
2311 as the (revised) ABI says. */
20a940cc
JB
2312static int
2313is_float_singleton (struct type *type)
2314{
b0cf273e
JB
2315 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2316 {
2317 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2318 CHECK_TYPEDEF (singleton_type);
2319
2320 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2321 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2322 || is_float_singleton (singleton_type));
2323 }
2324
2325 return 0;
20a940cc
JB
2326}
2327
2328
2329/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2330 "Struct-like" types are those that should be passed as structs are:
2331 structs and unions.
2332
2333 As an odd quirk, not mentioned in the ABI, GCC passes float and
2334 double singletons as if they were a plain float, double, etc. (The
2335 corresponding union types are handled normally.) So we exclude
2336 those types here. *shrug* */
2337static int
2338is_struct_like (struct type *type)
2339{
2340 enum type_code code = TYPE_CODE (type);
2341
2342 return (code == TYPE_CODE_UNION
34201ae3 2343 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
20a940cc
JB
2344}
2345
2346
2347/* Return non-zero if TYPE is a float-like type, zero otherwise.
2348 "Float-like" types are those that should be passed as
2349 floating-point values are.
2350
2351 You'd think this would just be floats, doubles, long doubles, etc.
2352 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2353 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2354 corresponding union types are handled normally.) So we include
20a940cc
JB
2355 those types here. *shrug* */
2356static int
2357is_float_like (struct type *type)
2358{
2359 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2360 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
34201ae3 2361 || is_float_singleton (type));
20a940cc
JB
2362}
2363
2364
78f8b424 2365static int
b0cf273e 2366is_power_of_two (unsigned int n)
78f8b424 2367{
b0cf273e 2368 return ((n & (n - 1)) == 0);
78f8b424
JB
2369}
2370
b0cf273e
JB
2371/* Return non-zero if TYPE should be passed as a pointer to a copy,
2372 zero otherwise. */
4d819d0e 2373static int
b0cf273e 2374s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2375{
354ecfd5 2376 if (TYPE_LENGTH (type) > 8)
b0cf273e 2377 return 1;
4d819d0e 2378
56b9d9ac
UW
2379 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2380 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2381 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2382}
2383
b0cf273e
JB
2384/* Return non-zero if TYPE should be passed in a float register
2385 if possible. */
78f8b424 2386static int
b0cf273e 2387s390_function_arg_float (struct type *type)
78f8b424 2388{
354ecfd5 2389 if (TYPE_LENGTH (type) > 8)
b0cf273e 2390 return 0;
78f8b424 2391
b0cf273e 2392 return is_float_like (type);
4d819d0e
JB
2393}
2394
b0cf273e
JB
2395/* Return non-zero if TYPE should be passed in an integer register
2396 (or a pair of integer registers) if possible. */
78f8b424 2397static int
b0cf273e 2398s390_function_arg_integer (struct type *type)
78f8b424 2399{
354ecfd5 2400 if (TYPE_LENGTH (type) > 8)
b0cf273e 2401 return 0;
78f8b424 2402
b0cf273e
JB
2403 return is_integer_like (type)
2404 || is_pointer_like (type)
354ecfd5 2405 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2406}
2407
78f8b424
JB
2408/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2409 word as required for the ABI. */
2410static LONGEST
e17a4113 2411extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2412{
e17a4113 2413 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2414 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2415
2416 /* Even structs get passed in the least significant bits of the
2417 register / memory word. It's not really right to extract them as
2418 an integer, but it does take care of the extension. */
2419 if (TYPE_UNSIGNED (type))
0fd88904 2420 return extract_unsigned_integer (value_contents (arg),
34201ae3 2421 TYPE_LENGTH (type), byte_order);
78f8b424 2422 else
0fd88904 2423 return extract_signed_integer (value_contents (arg),
34201ae3 2424 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2425}
2426
2427
78f8b424
JB
2428/* Return the alignment required by TYPE. */
2429static int
2430alignment_of (struct type *type)
2431{
2432 int alignment;
2433
2434 if (is_integer_like (type)
2435 || is_pointer_like (type)
a16b8bcd
UW
2436 || TYPE_CODE (type) == TYPE_CODE_FLT
2437 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2438 alignment = TYPE_LENGTH (type);
2439 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
34201ae3 2440 || TYPE_CODE (type) == TYPE_CODE_UNION)
78f8b424
JB
2441 {
2442 int i;
2443
2444 alignment = 1;
2445 for (i = 0; i < TYPE_NFIELDS (type); i++)
34201ae3
UW
2446 {
2447 int field_alignment
56b9d9ac 2448 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424 2449
34201ae3
UW
2450 if (field_alignment > alignment)
2451 alignment = field_alignment;
2452 }
78f8b424
JB
2453 }
2454 else
2455 alignment = 1;
2456
2457 /* Check that everything we ever return is a power of two. Lots of
2458 code doesn't want to deal with aligning things to arbitrary
2459 boundaries. */
2460 gdb_assert ((alignment & (alignment - 1)) == 0);
2461
2462 return alignment;
2463}
2464
2465
2466/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2467 place to be passed to a function, as specified by the "GNU/Linux
2468 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2469
2470 SP is the current stack pointer. We must put arguments, links,
2471 padding, etc. whereever they belong, and return the new stack
2472 pointer value.
34201ae3 2473
78f8b424
JB
2474 If STRUCT_RETURN is non-zero, then the function we're calling is
2475 going to return a structure by value; STRUCT_ADDR is the address of
2476 a block we've allocated for it on the stack.
2477
2478 Our caller has taken care of any type promotions needed to satisfy
2479 prototypes or the old K&R argument-passing rules. */
a78f21af 2480static CORE_ADDR
7d9b040b 2481s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2482 struct regcache *regcache, CORE_ADDR bp_addr,
2483 int nargs, struct value **args, CORE_ADDR sp,
2484 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2485{
b0cf273e
JB
2486 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2487 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2488 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2489 int i;
5769d3cd 2490
78f8b424
JB
2491 /* If the i'th argument is passed as a reference to a copy, then
2492 copy_addr[i] is the address of the copy we made. */
2493 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2494
c0cc4c83 2495 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2496 for (i = 0; i < nargs; i++)
2497 {
2498 struct value *arg = args[i];
56b9d9ac 2499 struct type *type = check_typedef (value_type (arg));
5769d3cd 2500
b0cf273e 2501 if (s390_function_arg_pass_by_reference (type))
34201ae3
UW
2502 {
2503 sp -= TYPE_LENGTH (type);
2504 sp = align_down (sp, alignment_of (type));
2505 copy_addr[i] = sp;
2506 }
5769d3cd 2507 }
5769d3cd 2508
78f8b424
JB
2509 /* Reserve space for the parameter area. As a conservative
2510 simplification, we assume that everything will be passed on the
34201ae3 2511 stack. Since every argument larger than 8 bytes will be
b0cf273e
JB
2512 passed by reference, we use this simple upper bound. */
2513 sp -= nargs * 8;
78f8b424 2514
78f8b424
JB
2515 /* After all that, make sure it's still aligned on an eight-byte
2516 boundary. */
5b03f266 2517 sp = align_down (sp, 8);
78f8b424 2518
c0cc4c83
UW
2519 /* Allocate the standard frame areas: the register save area, the
2520 word reserved for the compiler (which seems kind of meaningless),
2521 and the back chain pointer. */
2522 sp -= 16*word_size + 32;
2523
2524 /* Now we have the final SP value. Make sure we didn't underflow;
2525 on 31-bit, this would result in addresses with the high bit set,
2526 which causes confusion elsewhere. Note that if we error out
2527 here, stack and registers remain untouched. */
2528 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2529 error (_("Stack overflow"));
2530
2531
78f8b424
JB
2532 /* Finally, place the actual parameters, working from SP towards
2533 higher addresses. The code above is supposed to reserve enough
2534 space for this. */
2535 {
2536 int fr = 0;
2537 int gr = 2;
c0cc4c83 2538 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2539
b0cf273e 2540 /* A struct is returned using general register 2. */
4d819d0e 2541 if (struct_return)
b0cf273e
JB
2542 {
2543 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2544 struct_addr);
b0cf273e
JB
2545 gr++;
2546 }
4d819d0e 2547
78f8b424
JB
2548 for (i = 0; i < nargs; i++)
2549 {
34201ae3
UW
2550 struct value *arg = args[i];
2551 struct type *type = check_typedef (value_type (arg));
2552 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2553
2554 if (s390_function_arg_pass_by_reference (type))
2555 {
c0cc4c83
UW
2556 /* Actually copy the argument contents to the stack slot
2557 that was reserved above. */
2558 write_memory (copy_addr[i], value_contents (arg), length);
2559
b0cf273e
JB
2560 if (gr <= 6)
2561 {
2562 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2563 copy_addr[i]);
b0cf273e
JB
2564 gr++;
2565 }
2566 else
2567 {
e17a4113
UW
2568 write_memory_unsigned_integer (starg, word_size, byte_order,
2569 copy_addr[i]);
b0cf273e
JB
2570 starg += word_size;
2571 }
2572 }
2573 else if (s390_function_arg_float (type))
2574 {
2575 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2576 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2577 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2578 {
2579 /* When we store a single-precision value in an FP register,
2580 it occupies the leftmost bits. */
2581 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2582 0, length, value_contents (arg));
b0cf273e
JB
2583 fr += 2;
2584 }
2585 else
2586 {
2587 /* When we store a single-precision value in a stack slot,
2588 it occupies the rightmost bits. */
2589 starg = align_up (starg + length, word_size);
34201ae3 2590 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2591 }
2592 }
2593 else if (s390_function_arg_integer (type) && length <= word_size)
2594 {
2595 if (gr <= 6)
2596 {
2597 /* Integer arguments are always extended to word size. */
2598 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2599 extend_simple_arg (gdbarch,
2600 arg));
b0cf273e
JB
2601 gr++;
2602 }
2603 else
2604 {
2605 /* Integer arguments are always extended to word size. */
e17a4113 2606 write_memory_signed_integer (starg, word_size, byte_order,
34201ae3
UW
2607 extend_simple_arg (gdbarch, arg));
2608 starg += word_size;
b0cf273e
JB
2609 }
2610 }
2611 else if (s390_function_arg_integer (type) && length == 2*word_size)
2612 {
2613 if (gr <= 5)
2614 {
2615 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2616 value_contents (arg));
b0cf273e 2617 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2618 value_contents (arg) + word_size);
b0cf273e
JB
2619 gr += 2;
2620 }
2621 else
2622 {
2623 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2624 in it, then don't go back and use it again later. */
2625 gr = 7;
2626
0fd88904 2627 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2628 starg += length;
2629 }
2630 }
2631 else
e2e0b3e5 2632 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2633 }
2634 }
2635
8de7d199
UW
2636 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2637 if (word_size == 4)
2638 {
2639 ULONGEST pswa;
2640 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2641 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2642 }
b0cf273e 2643 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2644
b0cf273e
JB
2645 /* Store updated stack pointer. */
2646 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2647
a8c99f38 2648 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2649 which is actually the top of the register save area. */
2650 return sp + 16*word_size + 32;
5769d3cd
AC
2651}
2652
f089c433 2653/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2654 dummy frame. The frame ID's base needs to match the TOS value
2655 returned by push_dummy_call, and the PC match the dummy frame's
2656 breakpoint. */
2657static struct frame_id
f089c433 2658s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2659{
a8c99f38 2660 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2661 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2662 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2663
121d8485 2664 return frame_id_build (sp + 16*word_size + 32,
34201ae3 2665 get_frame_pc (this_frame));
b0cf273e 2666}
c8f9d51c 2667
4074e13c
JB
2668static CORE_ADDR
2669s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2670{
2671 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2672 always be aligned on an eight-byte boundary. */
2673 return (addr & -8);
2674}
2675
2676
b0cf273e
JB
2677/* Function return value access. */
2678
2679static enum return_value_convention
2680s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2681{
354ecfd5 2682 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2683 return RETURN_VALUE_STRUCT_CONVENTION;
2684
2685 switch (TYPE_CODE (type))
2686 {
2687 case TYPE_CODE_STRUCT:
2688 case TYPE_CODE_UNION:
2689 case TYPE_CODE_ARRAY:
56b9d9ac 2690 case TYPE_CODE_COMPLEX:
b0cf273e 2691 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2692
b0cf273e
JB
2693 default:
2694 return RETURN_VALUE_REGISTER_CONVENTION;
2695 }
c8f9d51c
JB
2696}
2697
b0cf273e 2698static enum return_value_convention
6a3a010b 2699s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2700 struct type *type, struct regcache *regcache,
2701 gdb_byte *out, const gdb_byte *in)
5769d3cd 2702{
e17a4113 2703 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2704 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2705 enum return_value_convention rvc;
2706 int length;
2707
2708 type = check_typedef (type);
2709 rvc = s390_return_value_convention (gdbarch, type);
2710 length = TYPE_LENGTH (type);
2711
b0cf273e
JB
2712 if (in)
2713 {
2714 switch (rvc)
2715 {
2716 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2717 if (TYPE_CODE (type) == TYPE_CODE_FLT
2718 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2719 {
2720 /* When we store a single-precision value in an FP register,
2721 it occupies the leftmost bits. */
34201ae3 2722 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2723 0, length, in);
2724 }
2725 else if (length <= word_size)
2726 {
2727 /* Integer arguments are always extended to word size. */
2728 if (TYPE_UNSIGNED (type))
2729 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2730 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2731 else
2732 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2733 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2734 }
2735 else if (length == 2*word_size)
2736 {
2737 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2738 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2739 }
2740 else
e2e0b3e5 2741 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2742 break;
2743
2744 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2745 error (_("Cannot set function return value."));
b0cf273e
JB
2746 break;
2747 }
2748 }
2749 else if (out)
2750 {
2751 switch (rvc)
2752 {
2753 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2754 if (TYPE_CODE (type) == TYPE_CODE_FLT
2755 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2756 {
2757 /* When we store a single-precision value in an FP register,
2758 it occupies the leftmost bits. */
34201ae3 2759 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2760 0, length, out);
2761 }
2762 else if (length <= word_size)
2763 {
2764 /* Integer arguments occupy the rightmost bits. */
34201ae3 2765 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
b0cf273e
JB
2766 word_size - length, length, out);
2767 }
2768 else if (length == 2*word_size)
2769 {
2770 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2771 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2772 }
2773 else
e2e0b3e5 2774 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2775 break;
5769d3cd 2776
b0cf273e 2777 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2778 error (_("Function return value unknown."));
b0cf273e
JB
2779 break;
2780 }
2781 }
2782
2783 return rvc;
2784}
5769d3cd
AC
2785
2786
a8c99f38
JB
2787/* Breakpoints. */
2788
43af2100 2789static const gdb_byte *
c378eb4e
MS
2790s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2791 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2792{
43af2100 2793 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2794
2795 *lenptr = sizeof (breakpoint);
2796 return breakpoint;
2797}
2798
5769d3cd 2799
a8c99f38 2800/* Address handling. */
5769d3cd
AC
2801
2802static CORE_ADDR
24568a2c 2803s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2804{
a8c99f38 2805 return addr & 0x7fffffff;
5769d3cd
AC
2806}
2807
ffc65945
KB
2808static int
2809s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2810{
2811 if (byte_size == 4)
119ac181 2812 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2813 else
2814 return 0;
2815}
2816
2817static const char *
2818s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2819{
119ac181 2820 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2821 return "mode32";
2822 else
2823 return NULL;
2824}
2825
a78f21af 2826static int
c378eb4e
MS
2827s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2828 const char *name,
ffc65945
KB
2829 int *type_flags_ptr)
2830{
2831 if (strcmp (name, "mode32") == 0)
2832 {
119ac181 2833 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2834 return 1;
2835 }
2836 else
2837 return 0;
2838}
2839
55aa24fb
SDJ
2840/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2841 gdbarch.h. */
2842
2843static int
2844s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2845{
2846 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2847 or indirection. */
2848 || *s == '%' /* Register access. */
2849 || isdigit (*s)); /* Literal number. */
2850}
2851
a8c99f38
JB
2852/* Set up gdbarch struct. */
2853
a78f21af 2854static struct gdbarch *
5769d3cd
AC
2855s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2856{
7803799a
UW
2857 const struct target_desc *tdesc = info.target_desc;
2858 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2859 struct gdbarch *gdbarch;
2860 struct gdbarch_tdep *tdep;
7803799a
UW
2861 int tdep_abi;
2862 int have_upper = 0;
c642a434
UW
2863 int have_linux_v1 = 0;
2864 int have_linux_v2 = 0;
5aa82d05 2865 int have_tdb = 0;
7803799a 2866 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
2867 static const char *const stap_register_prefixes[] = { "%", NULL };
2868 static const char *const stap_register_indirection_prefixes[] = { "(",
2869 NULL };
2870 static const char *const stap_register_indirection_suffixes[] = { ")",
2871 NULL };
7803799a
UW
2872
2873 /* Default ABI and register size. */
2874 switch (info.bfd_arch_info->mach)
2875 {
2876 case bfd_mach_s390_31:
2877 tdep_abi = ABI_LINUX_S390;
2878 break;
2879
2880 case bfd_mach_s390_64:
2881 tdep_abi = ABI_LINUX_ZSERIES;
2882 break;
2883
2884 default:
2885 return NULL;
2886 }
2887
2888 /* Use default target description if none provided by the target. */
2889 if (!tdesc_has_registers (tdesc))
2890 {
2891 if (tdep_abi == ABI_LINUX_S390)
2892 tdesc = tdesc_s390_linux32;
2893 else
2894 tdesc = tdesc_s390x_linux64;
2895 }
2896
2897 /* Check any target description for validity. */
2898 if (tdesc_has_registers (tdesc))
2899 {
2900 static const char *const gprs[] = {
2901 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2902 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2903 };
2904 static const char *const fprs[] = {
2905 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2906 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
2907 };
2908 static const char *const acrs[] = {
2909 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
2910 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
2911 };
2912 static const char *const gprs_lower[] = {
2913 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
2914 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
2915 };
2916 static const char *const gprs_upper[] = {
2917 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
2918 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
2919 };
4ac33720
UW
2920 static const char *const tdb_regs[] = {
2921 "tdb0", "tac", "tct", "atia",
2922 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
2923 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
2924 };
7803799a
UW
2925 const struct tdesc_feature *feature;
2926 int i, valid_p = 1;
2927
2928 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
2929 if (feature == NULL)
2930 return NULL;
2931
2932 tdesc_data = tdesc_data_alloc ();
2933
2934 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2935 S390_PSWM_REGNUM, "pswm");
2936 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2937 S390_PSWA_REGNUM, "pswa");
2938
2939 if (tdesc_unnumbered_register (feature, "r0"))
2940 {
2941 for (i = 0; i < 16; i++)
2942 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2943 S390_R0_REGNUM + i, gprs[i]);
2944 }
2945 else
2946 {
2947 have_upper = 1;
2948
2949 for (i = 0; i < 16; i++)
2950 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2951 S390_R0_REGNUM + i,
2952 gprs_lower[i]);
2953 for (i = 0; i < 16; i++)
2954 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2955 S390_R0_UPPER_REGNUM + i,
2956 gprs_upper[i]);
2957 }
2958
2959 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
2960 if (feature == NULL)
2961 {
2962 tdesc_data_cleanup (tdesc_data);
2963 return NULL;
2964 }
2965
2966 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2967 S390_FPC_REGNUM, "fpc");
2968 for (i = 0; i < 16; i++)
2969 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2970 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 2971
7803799a
UW
2972 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
2973 if (feature == NULL)
2974 {
2975 tdesc_data_cleanup (tdesc_data);
2976 return NULL;
2977 }
2978
2979 for (i = 0; i < 16; i++)
2980 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2981 S390_A0_REGNUM + i, acrs[i]);
2982
94eae614 2983 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
2984 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
2985 if (feature)
2986 {
2987 tdesc_numbered_register (feature, tdesc_data,
2988 S390_ORIG_R2_REGNUM, "orig_r2");
2989
2990 if (tdesc_numbered_register (feature, tdesc_data,
2991 S390_LAST_BREAK_REGNUM, "last_break"))
2992 have_linux_v1 = 1;
2993
2994 if (tdesc_numbered_register (feature, tdesc_data,
2995 S390_SYSTEM_CALL_REGNUM, "system_call"))
2996 have_linux_v2 = 1;
2997
2998 if (have_linux_v2 > have_linux_v1)
2999 valid_p = 0;
3000 }
3001
4ac33720
UW
3002 /* Transaction diagnostic block. */
3003 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3004 if (feature)
3005 {
3006 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3007 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3008 S390_TDB_DWORD0_REGNUM + i,
3009 tdb_regs[i]);
5aa82d05 3010 have_tdb = 1;
4ac33720
UW
3011 }
3012
7803799a
UW
3013 if (!valid_p)
3014 {
3015 tdesc_data_cleanup (tdesc_data);
3016 return NULL;
3017 }
3018 }
5769d3cd 3019
7803799a
UW
3020 /* Find a candidate among extant architectures. */
3021 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3022 arches != NULL;
3023 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3024 {
3025 tdep = gdbarch_tdep (arches->gdbarch);
3026 if (!tdep)
3027 continue;
3028 if (tdep->abi != tdep_abi)
3029 continue;
3030 if ((tdep->gpr_full_regnum != -1) != have_upper)
3031 continue;
3032 if (tdesc_data != NULL)
3033 tdesc_data_cleanup (tdesc_data);
3034 return arches->gdbarch;
3035 }
5769d3cd 3036
7803799a 3037 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 3038 tdep = XCNEW (struct gdbarch_tdep);
7803799a 3039 tdep->abi = tdep_abi;
5aa82d05
AA
3040 tdep->have_linux_v1 = have_linux_v1;
3041 tdep->have_linux_v2 = have_linux_v2;
3042 tdep->have_tdb = have_tdb;
d0f54f9d 3043 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3044
3045 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3046 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3047
1de90795
UW
3048 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3049 We can safely let them default to 128-bit, since the debug info
3050 will give the size of type actually used in each case. */
3051 set_gdbarch_long_double_bit (gdbarch, 128);
3052 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3053
aaab4dba 3054 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3055 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3056 always. */
5769d3cd 3057 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3058 /* Stack grows downward. */
3059 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3060 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3061 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3062 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3063
7803799a 3064 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3065 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3066 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3067 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3068 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3069 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d 3070 set_gdbarch_regset_from_core_section (gdbarch,
34201ae3 3071 s390_regset_from_core_section);
7803799a 3072 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
5aa82d05
AA
3073 set_gdbarch_iterate_over_regset_sections (gdbarch,
3074 s390_iterate_over_regset_sections);
c642a434
UW
3075 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3076 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3077 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3078 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3079 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3080 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3081 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 3082 s390_pseudo_register_reggroup_p);
7803799a
UW
3083 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3084
3085 /* Assign pseudo register numbers. */
3086 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3087 last_pseudo_reg = first_pseudo_reg;
3088 tdep->gpr_full_regnum = -1;
3089 if (have_upper)
3090 {
3091 tdep->gpr_full_regnum = last_pseudo_reg;
3092 last_pseudo_reg += 16;
3093 }
3094 tdep->pc_regnum = last_pseudo_reg++;
3095 tdep->cc_regnum = last_pseudo_reg++;
3096 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3097 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3098
b0cf273e
JB
3099 /* Inferior function calls. */
3100 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3101 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3102 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3103 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3104
237b092b
AA
3105 /* Syscall handling. */
3106 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3107
a8c99f38 3108 /* Frame handling. */
a431654a 3109 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3110 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3111 dwarf2_append_unwinders (gdbarch);
a431654a 3112 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3113 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3114 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3115 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3116 frame_base_set_default (gdbarch, &s390_frame_base);
3117 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3118 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3119
1db4e8a0
UW
3120 /* Displaced stepping. */
3121 set_gdbarch_displaced_step_copy_insn (gdbarch,
34201ae3 3122 simple_displaced_step_copy_insn);
1db4e8a0
UW
3123 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3124 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 3125 simple_displaced_step_free_closure);
1db4e8a0 3126 set_gdbarch_displaced_step_location (gdbarch,
34201ae3 3127 displaced_step_at_entry_point);
1db4e8a0
UW
3128 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3129
70728992
PA
3130 /* Note that GNU/Linux is the only OS supported on this
3131 platform. */
3132 linux_init_abi (info, gdbarch);
3133
7803799a 3134 switch (tdep->abi)
5769d3cd 3135 {
7803799a 3136 case ABI_LINUX_S390:
d0f54f9d
JB
3137 tdep->gregset = &s390_gregset;
3138 tdep->sizeof_gregset = s390_sizeof_gregset;
3139 tdep->fpregset = &s390_fpregset;
3140 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3141
3142 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3143 set_solib_svr4_fetch_link_map_offsets
3144 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 3145
237b092b 3146 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
5769d3cd 3147 break;
b0cf273e 3148
7803799a 3149 case ABI_LINUX_ZSERIES:
99b7da5d 3150 tdep->gregset = &s390_gregset;
d0f54f9d
JB
3151 tdep->sizeof_gregset = s390x_sizeof_gregset;
3152 tdep->fpregset = &s390_fpregset;
3153 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3154
3155 set_gdbarch_long_bit (gdbarch, 64);
3156 set_gdbarch_long_long_bit (gdbarch, 64);
3157 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3158 set_solib_svr4_fetch_link_map_offsets
3159 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 3160 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 3161 s390_address_class_type_flags);
ffc65945 3162 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 3163 s390_address_class_type_flags_to_name);
ffc65945 3164 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 3165 s390_address_class_name_to_type_flags);
237b092b 3166 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
5769d3cd
AC
3167 break;
3168 }
3169
36482093
AC
3170 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3171
982e9687
UW
3172 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3173
b2756930
KB
3174 /* Enable TLS support. */
3175 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 3176 svr4_fetch_objfile_link_map);
b2756930 3177
1dd635ac
UW
3178 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3179
55aa24fb 3180 /* SystemTap functions. */
05c0465e
SDJ
3181 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3182 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3183 stap_register_indirection_prefixes);
3184 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3185 stap_register_indirection_suffixes);
55aa24fb
SDJ
3186 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3187
5769d3cd
AC
3188 return gdbarch;
3189}
3190
3191
a78f21af
AC
3192extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3193
5769d3cd 3194void
5ae5f592 3195_initialize_s390_tdep (void)
5769d3cd 3196{
5769d3cd
AC
3197 /* Hook us into the gdbarch mechanism. */
3198 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3199
94eae614 3200 /* Initialize the GNU/Linux target descriptions. */
7803799a 3201 initialize_tdesc_s390_linux32 ();
c642a434
UW
3202 initialize_tdesc_s390_linux32v1 ();
3203 initialize_tdesc_s390_linux32v2 ();
7803799a 3204 initialize_tdesc_s390_linux64 ();
c642a434
UW
3205 initialize_tdesc_s390_linux64v1 ();
3206 initialize_tdesc_s390_linux64v2 ();
4ac33720 3207 initialize_tdesc_s390_te_linux64 ();
7803799a 3208 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3209 initialize_tdesc_s390x_linux64v1 ();
3210 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3211 initialize_tdesc_s390x_te_linux64 ();
5769d3cd 3212}
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