s390: Hook s390 into OSABI mechanism
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
e2882c85 3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
7042632b 33#include "osabi.h"
5769d3cd 34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
566c56c9
MK
47#include "linux-record.h"
48#include "record-full.h"
4ac33720 49#include "auxv.h"
237b092b 50#include "xml-syscall.h"
5769d3cd 51
55aa24fb
SDJ
52#include "stap-probe.h"
53#include "ax.h"
54#include "ax-gdb.h"
55#include "user-regs.h"
56#include "cli/cli-utils.h"
57#include <ctype.h>
04a83fee 58#include "elf/common.h"
417c80f9
AA
59#include "elf/s390.h"
60#include "elf-bfd.h"
325fac50 61#include <algorithm>
55aa24fb 62
7803799a 63#include "features/s390-linux32.c"
c642a434
UW
64#include "features/s390-linux32v1.c"
65#include "features/s390-linux32v2.c"
7803799a 66#include "features/s390-linux64.c"
c642a434
UW
67#include "features/s390-linux64v1.c"
68#include "features/s390-linux64v2.c"
4ac33720 69#include "features/s390-te-linux64.c"
550bdf96
AA
70#include "features/s390-vx-linux64.c"
71#include "features/s390-tevx-linux64.c"
1b63490c 72#include "features/s390-gs-linux64.c"
7803799a 73#include "features/s390x-linux64.c"
c642a434
UW
74#include "features/s390x-linux64v1.c"
75#include "features/s390x-linux64v2.c"
4ac33720 76#include "features/s390x-te-linux64.c"
550bdf96
AA
77#include "features/s390x-vx-linux64.c"
78#include "features/s390x-tevx-linux64.c"
1b63490c 79#include "features/s390x-gs-linux64.c"
7803799a 80
237b092b
AA
81#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
82#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
83
65b48a81
PB
84/* Holds the current set of options to be passed to the disassembler. */
85static char *s390_disassembler_options;
86
52059ffd
TT
87enum s390_abi_kind
88{
21f6f5ff 89 ABI_NONE,
52059ffd
TT
90 ABI_LINUX_S390,
91 ABI_LINUX_ZSERIES
92};
93
417c80f9
AA
94enum s390_vector_abi_kind
95{
96 S390_VECTOR_ABI_NONE,
97 S390_VECTOR_ABI_128
98};
99
d0f54f9d
JB
100/* The tdep structure. */
101
102struct gdbarch_tdep
5769d3cd 103{
095085d8
PR
104 /* Target description. */
105 const struct target_desc *tdesc;
106
b0cf273e 107 /* ABI version. */
52059ffd 108 enum s390_abi_kind abi;
b0cf273e 109
417c80f9
AA
110 /* Vector ABI. */
111 enum s390_vector_abi_kind vector_abi;
112
7803799a
UW
113 /* Pseudo register numbers. */
114 int gpr_full_regnum;
115 int pc_regnum;
116 int cc_regnum;
550bdf96 117 int v0_full_regnum;
7803799a 118
21f6f5ff 119 bool have_upper;
ab9bcc67
PR
120 bool have_linux_v1;
121 bool have_linux_v2;
122 bool have_tdb;
21f6f5ff 123 bool have_vx;
1b63490c 124 bool have_gs;
d0f54f9d
JB
125};
126
127
7803799a
UW
128/* ABI call-saved register information. */
129
130static int
131s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 132{
7803799a
UW
133 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
134
135 switch (tdep->abi)
6707b003 136 {
7803799a
UW
137 case ABI_LINUX_S390:
138 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
139 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
140 || regnum == S390_A0_REGNUM)
141 return 1;
6707b003 142
7803799a
UW
143 break;
144
145 case ABI_LINUX_ZSERIES:
146 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
147 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
148 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
149 return 1;
150
151 break;
152 }
153
154 return 0;
5769d3cd
AC
155}
156
c642a434
UW
157static int
158s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
159{
160 /* The last-break address is read-only. */
161 return regnum == S390_LAST_BREAK_REGNUM;
162}
163
164static void
165s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
166{
ac7936df 167 struct gdbarch *gdbarch = regcache->arch ();
c642a434
UW
168 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
169
170 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
171
172 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
173 messing with the PC we just installed, if we happen to be within
174 an interrupted system call that the kernel wants to restart.
175
176 Note that after we return from the dummy call, the SYSTEM_CALL and
177 ORIG_R2 registers will be automatically restored, and the kernel
178 continues to restart the system call at this point. */
179 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
180 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
181}
182
f79a3bae
MK
183/* The "guess_tracepoint_registers" gdbarch method. */
184
185static void
186s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
187 struct regcache *regcache,
188 CORE_ADDR addr)
189{
190 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
191 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
192 gdb_byte *reg = (gdb_byte *) alloca (sz);
193 ULONGEST pswm, pswa;
194
195 /* Set PSWA from the location and a default PSWM (the only part we're
196 unlikely to get right is the CC). */
197 if (tdep->abi == ABI_LINUX_S390)
198 {
199 /* 31-bit PSWA needs high bit set (it's very unlikely the target
200 was in 24-bit mode). */
201 pswa = addr | 0x80000000UL;
202 pswm = 0x070d0000UL;
203 }
204 else
205 {
206 pswa = addr;
207 pswm = 0x0705000180000000ULL;
208 }
209
210 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
211 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
212
213 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
214 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
215}
216
7803799a 217
d0f54f9d
JB
218/* DWARF Register Mapping. */
219
2ccd1468 220static const short s390_dwarf_regmap[] =
d0f54f9d 221{
550bdf96 222 /* 0-15: General Purpose Registers. */
d0f54f9d
JB
223 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
224 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
225 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
226 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
227
550bdf96 228 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
d0f54f9d
JB
229 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
230 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
231 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
232 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
233
550bdf96 234 /* 32-47: Control Registers (not mapped). */
34201ae3
UW
235 -1, -1, -1, -1, -1, -1, -1, -1,
236 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d 237
550bdf96 238 /* 48-63: Access Registers. */
d0f54f9d
JB
239 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
240 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
241 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
242 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
243
550bdf96 244 /* 64-65: Program Status Word. */
d0f54f9d 245 S390_PSWM_REGNUM,
7803799a
UW
246 S390_PSWA_REGNUM,
247
550bdf96
AA
248 /* 66-67: Reserved. */
249 -1, -1,
250
251 /* 68-83: Vector Registers 16-31. */
252 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
253 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
254 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
255 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
256
257 /* End of "official" DWARF registers. The remainder of the map is
258 for GDB internal use only. */
259
7803799a
UW
260 /* GPR Lower Half Access. */
261 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
262 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
263 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
264 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
d0f54f9d
JB
265};
266
550bdf96
AA
267enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
268
d0f54f9d
JB
269/* Convert DWARF register number REG to the appropriate register
270 number used by GDB. */
a78f21af 271static int
d3f73121 272s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 273{
7803799a 274 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
550bdf96 275 int gdb_reg = -1;
7803799a 276
550bdf96
AA
277 /* In a 32-on-64 debug scenario, debug info refers to the full
278 64-bit GPRs. Note that call frame information still refers to
279 the 32-bit lower halves, because s390_adjust_frame_regnum uses
280 special register numbers to access GPRs. */
7803799a
UW
281 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
282 return tdep->gpr_full_regnum + reg;
d0f54f9d 283
16aff9a6 284 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
550bdf96
AA
285 gdb_reg = s390_dwarf_regmap[reg];
286
287 if (tdep->v0_full_regnum == -1)
288 {
289 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
290 gdb_reg = -1;
291 }
292 else
293 {
294 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
295 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
296 }
d0f54f9d 297
550bdf96 298 return gdb_reg;
7803799a 299}
d0f54f9d 300
7803799a
UW
301/* Translate a .eh_frame register to DWARF register, or adjust a
302 .debug_frame register. */
303static int
304s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
305{
306 /* See s390_dwarf_reg_to_regnum for comments. */
550bdf96 307 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
d0f54f9d
JB
308}
309
d0f54f9d 310
7803799a
UW
311/* Pseudo registers. */
312
2ccd1468
UW
313static int
314regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
315{
316 return (tdep->gpr_full_regnum != -1
317 && regnum >= tdep->gpr_full_regnum
318 && regnum <= tdep->gpr_full_regnum + 15);
319}
320
550bdf96
AA
321/* Check whether REGNUM indicates a full vector register (v0-v15).
322 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
323
324static int
325regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
326{
327 return (tdep->v0_full_regnum != -1
328 && regnum >= tdep->v0_full_regnum
329 && regnum <= tdep->v0_full_regnum + 15);
330}
331
87de11c0
AA
332/* Return the name of register REGNO. Return the empty string for
333 registers that shouldn't be visible. */
550bdf96
AA
334
335static const char *
336s390_register_name (struct gdbarch *gdbarch, int regnum)
337{
338 if (regnum >= S390_V0_LOWER_REGNUM
339 && regnum <= S390_V15_LOWER_REGNUM)
87de11c0 340 return "";
550bdf96
AA
341 return tdesc_register_name (gdbarch, regnum);
342}
343
7803799a
UW
344static const char *
345s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 346{
7803799a 347 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 348
7803799a
UW
349 if (regnum == tdep->pc_regnum)
350 return "pc";
d0f54f9d 351
7803799a
UW
352 if (regnum == tdep->cc_regnum)
353 return "cc";
d0f54f9d 354
2ccd1468 355 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
356 {
357 static const char *full_name[] = {
358 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
359 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
360 };
361 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 362 }
7803799a 363
550bdf96
AA
364 if (regnum_is_vxr_full (tdep, regnum))
365 {
366 static const char *full_name[] = {
367 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
368 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
369 };
370 return full_name[regnum - tdep->v0_full_regnum];
371 }
372
7803799a 373 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
374}
375
7803799a
UW
376static struct type *
377s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 378{
7803799a 379 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 380
7803799a
UW
381 if (regnum == tdep->pc_regnum)
382 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 383
7803799a
UW
384 if (regnum == tdep->cc_regnum)
385 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 386
2ccd1468 387 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
388 return builtin_type (gdbarch)->builtin_uint64;
389
550bdf96
AA
390 if (regnum_is_vxr_full (tdep, regnum))
391 return tdesc_find_type (gdbarch, "vec128");
392
7803799a 393 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
394}
395
05d1431c 396static enum register_status
7803799a
UW
397s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
398 int regnum, gdb_byte *buf)
d0f54f9d 399{
7803799a 400 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 401 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 402 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
403 ULONGEST val;
404
7803799a 405 if (regnum == tdep->pc_regnum)
d0f54f9d 406 {
05d1431c
PA
407 enum register_status status;
408
03f50fc8 409 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
05d1431c
PA
410 if (status == REG_VALID)
411 {
412 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
413 val &= 0x7fffffff;
414 store_unsigned_integer (buf, regsize, byte_order, val);
415 }
416 return status;
7803799a 417 }
d0f54f9d 418
7803799a
UW
419 if (regnum == tdep->cc_regnum)
420 {
05d1431c
PA
421 enum register_status status;
422
03f50fc8 423 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
05d1431c
PA
424 if (status == REG_VALID)
425 {
426 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
427 val = (val >> 12) & 3;
428 else
429 val = (val >> 44) & 3;
430 store_unsigned_integer (buf, regsize, byte_order, val);
431 }
432 return status;
7803799a 433 }
d0f54f9d 434
2ccd1468 435 if (regnum_is_gpr_full (tdep, regnum))
7803799a 436 {
05d1431c 437 enum register_status status;
7803799a 438 ULONGEST val_upper;
05d1431c 439
7803799a
UW
440 regnum -= tdep->gpr_full_regnum;
441
03f50fc8 442 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
05d1431c 443 if (status == REG_VALID)
03f50fc8
YQ
444 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
445 &val_upper);
05d1431c
PA
446 if (status == REG_VALID)
447 {
448 val |= val_upper << 32;
449 store_unsigned_integer (buf, regsize, byte_order, val);
450 }
451 return status;
d0f54f9d 452 }
7803799a 453
550bdf96
AA
454 if (regnum_is_vxr_full (tdep, regnum))
455 {
456 enum register_status status;
457
458 regnum -= tdep->v0_full_regnum;
459
03f50fc8 460 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
550bdf96 461 if (status == REG_VALID)
03f50fc8 462 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
550bdf96
AA
463 return status;
464 }
465
7803799a 466 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
467}
468
469static void
7803799a
UW
470s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
471 int regnum, const gdb_byte *buf)
d0f54f9d 472{
7803799a 473 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 474 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 475 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
476 ULONGEST val, psw;
477
7803799a 478 if (regnum == tdep->pc_regnum)
d0f54f9d 479 {
7803799a
UW
480 val = extract_unsigned_integer (buf, regsize, byte_order);
481 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
482 {
483 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
484 val = (psw & 0x80000000) | (val & 0x7fffffff);
485 }
486 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
487 return;
488 }
d0f54f9d 489
7803799a
UW
490 if (regnum == tdep->cc_regnum)
491 {
492 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 493 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
494 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
495 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
496 else
497 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
498 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
499 return;
500 }
d0f54f9d 501
2ccd1468 502 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
503 {
504 regnum -= tdep->gpr_full_regnum;
505 val = extract_unsigned_integer (buf, regsize, byte_order);
506 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
507 val & 0xffffffff);
508 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
509 val >> 32);
510 return;
d0f54f9d 511 }
7803799a 512
550bdf96
AA
513 if (regnum_is_vxr_full (tdep, regnum))
514 {
515 regnum -= tdep->v0_full_regnum;
516 regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf);
517 regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8);
518 return;
519 }
520
7803799a 521 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
522}
523
524/* 'float' values are stored in the upper half of floating-point
550bdf96
AA
525 registers, even though we are otherwise a big-endian platform. The
526 same applies to a 'float' value within a vector. */
d0f54f9d 527
9acbedc0 528static struct value *
2ed3c037
UW
529s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
530 int regnum, struct frame_id frame_id)
d0f54f9d 531{
550bdf96 532 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2ed3c037
UW
533 struct value *value = default_value_from_register (gdbarch, type,
534 regnum, frame_id);
744a8059
SP
535 check_typedef (type);
536
550bdf96
AA
537 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
538 && TYPE_LENGTH (type) < 8)
539 || regnum_is_vxr_full (tdep, regnum)
540 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
9acbedc0 541 set_value_offset (value, 0);
d0f54f9d 542
9acbedc0 543 return value;
d0f54f9d
JB
544}
545
546/* Register groups. */
547
a78f21af 548static int
7803799a
UW
549s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
550 struct reggroup *group)
d0f54f9d
JB
551{
552 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
553
d6db1fab
UW
554 /* We usually save/restore the whole PSW, which includes PC and CC.
555 However, some older gdbservers may not support saving/restoring
556 the whole PSW yet, and will return an XML register description
557 excluding those from the save/restore register groups. In those
558 cases, we still need to explicitly save/restore PC and CC in order
559 to push or pop frames. Since this doesn't hurt anything if we
560 already save/restore the whole PSW (it's just redundant), we add
561 PC and CC at this point unconditionally. */
d0f54f9d 562 if (group == save_reggroup || group == restore_reggroup)
7803799a 563 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d 564
550bdf96
AA
565 if (group == vector_reggroup)
566 return regnum_is_vxr_full (tdep, regnum);
567
568 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
569 return 0;
570
d0f54f9d
JB
571 return default_register_reggroup_p (gdbarch, regnum, group);
572}
573
c4b3e547
MK
574/* The "ax_pseudo_register_collect" gdbarch method. */
575
576static int
577s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
578 struct agent_expr *ax, int regnum)
579{
580 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
581 if (regnum == tdep->pc_regnum)
582 {
583 ax_reg_mask (ax, S390_PSWA_REGNUM);
584 }
585 else if (regnum == tdep->cc_regnum)
586 {
587 ax_reg_mask (ax, S390_PSWM_REGNUM);
588 }
589 else if (regnum_is_gpr_full (tdep, regnum))
590 {
591 regnum -= tdep->gpr_full_regnum;
592 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
593 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
594 }
595 else if (regnum_is_vxr_full (tdep, regnum))
596 {
597 regnum -= tdep->v0_full_regnum;
598 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
599 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
600 }
601 else
602 {
603 internal_error (__FILE__, __LINE__, _("invalid regnum"));
604 }
605 return 0;
606}
607
608/* The "ax_pseudo_register_push_stack" gdbarch method. */
609
610static int
611s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
612 struct agent_expr *ax, int regnum)
613{
614 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
615 if (regnum == tdep->pc_regnum)
616 {
617 ax_reg (ax, S390_PSWA_REGNUM);
618 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
619 {
620 ax_zero_ext (ax, 31);
621 }
622 }
623 else if (regnum == tdep->cc_regnum)
624 {
625 ax_reg (ax, S390_PSWM_REGNUM);
626 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
627 ax_const_l (ax, 12);
628 else
629 ax_const_l (ax, 44);
630 ax_simple (ax, aop_rsh_unsigned);
631 ax_zero_ext (ax, 2);
632 }
633 else if (regnum_is_gpr_full (tdep, regnum))
634 {
635 regnum -= tdep->gpr_full_regnum;
636 ax_reg (ax, S390_R0_REGNUM + regnum);
637 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
638 ax_const_l (ax, 32);
639 ax_simple (ax, aop_lsh);
640 ax_simple (ax, aop_bit_or);
641 }
642 else if (regnum_is_vxr_full (tdep, regnum))
643 {
644 /* Too large to stuff on the stack. */
645 return 1;
646 }
647 else
648 {
649 internal_error (__FILE__, __LINE__, _("invalid regnum"));
650 }
651 return 0;
652}
653
70104a90
MK
654/* The "gen_return_address" gdbarch method. Since this is supposed to be
655 just a best-effort method, and we don't really have the means to run
656 the full unwinder here, just collect the link register. */
657
658static void
659s390_gen_return_address (struct gdbarch *gdbarch,
660 struct agent_expr *ax, struct axs_value *value,
661 CORE_ADDR scope)
662{
663 value->type = register_type (gdbarch, S390_R14_REGNUM);
664 value->kind = axs_lvalue_register;
665 value->u.reg = S390_R14_REGNUM;
666}
667
d0f54f9d 668
6df55226
MK
669/* A helper for s390_software_single_step, decides if an instruction
670 is a partial-execution instruction that needs to be executed until
671 completion when in record mode. If it is, returns 1 and writes
672 instruction length to a pointer. */
673
674static int
675s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
676{
677 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
678 uint16_t insn;
679
680 insn = read_memory_integer (loc, 2, byte_order);
681
682 switch (insn >> 8)
683 {
684 case 0xa8: /* MVCLE */
685 *len = 4;
686 return 1;
687
688 case 0xeb:
689 {
690 insn = read_memory_integer (loc + 4, 2, byte_order);
691 if ((insn & 0xff) == 0x8e)
692 {
693 /* MVCLU */
694 *len = 6;
695 return 1;
696 }
697 }
698 break;
699 }
700
701 switch (insn)
702 {
703 case 0xb255: /* MVST */
704 case 0xb263: /* CMPSC */
705 case 0xb2a5: /* TRE */
706 case 0xb2a6: /* CU21 */
707 case 0xb2a7: /* CU12 */
708 case 0xb9b0: /* CU14 */
709 case 0xb9b1: /* CU24 */
710 case 0xb9b2: /* CU41 */
711 case 0xb9b3: /* CU42 */
712 case 0xb92a: /* KMF */
713 case 0xb92b: /* KMO */
714 case 0xb92f: /* KMC */
715 case 0xb92d: /* KMCTR */
716 case 0xb92e: /* KM */
717 case 0xb93c: /* PPNO */
718 case 0xb990: /* TRTT */
719 case 0xb991: /* TRTO */
720 case 0xb992: /* TROT */
721 case 0xb993: /* TROO */
722 *len = 4;
723 return 1;
724 }
725
726 return 0;
727}
728
729/* Implement the "software_single_step" gdbarch method, needed to single step
730 through instructions like MVCLE in record mode, to make sure they are
731 executed to completion. Without that, record will save the full length
732 of destination buffer on every iteration, even though the CPU will only
733 process about 4kiB of it each time, leading to O(n**2) memory and time
734 complexity. */
735
a0ff9e1a 736static std::vector<CORE_ADDR>
f5ea389a 737s390_software_single_step (struct regcache *regcache)
6df55226 738{
ac7936df 739 struct gdbarch *gdbarch = regcache->arch ();
ad769689 740 CORE_ADDR loc = regcache_read_pc (regcache);
6df55226
MK
741 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
742 int len;
743 uint16_t insn;
744
745 /* Special handling only if recording. */
746 if (!record_full_is_used ())
a0ff9e1a 747 return {};
6df55226
MK
748
749 /* First, match a partial instruction. */
750 if (!s390_is_partial_instruction (gdbarch, loc, &len))
a0ff9e1a 751 return {};
6df55226
MK
752
753 loc += len;
754
755 /* Second, look for a branch back to it. */
756 insn = read_memory_integer (loc, 2, byte_order);
757 if (insn != 0xa714) /* BRC with mask 1 */
a0ff9e1a 758 return {};
6df55226
MK
759
760 insn = read_memory_integer (loc + 2, 2, byte_order);
761 if (insn != (uint16_t) -(len / 2))
a0ff9e1a 762 return {};
6df55226
MK
763
764 loc += 4;
765
766 /* Found it, step past the whole thing. */
a0ff9e1a 767 return {loc};
6df55226
MK
768}
769
770static int
771s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
772 struct displaced_step_closure *closure)
773{
774 return 1;
775}
776
777
2ccd1468 778/* Maps for register sets. */
d0f54f9d 779
99b7da5d 780static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 781 {
99b7da5d
AA
782 { 1, S390_PSWM_REGNUM },
783 { 1, S390_PSWA_REGNUM },
784 { 16, S390_R0_REGNUM },
785 { 16, S390_A0_REGNUM },
786 { 1, S390_ORIG_R2_REGNUM },
787 { 0 }
2ccd1468 788 };
d0f54f9d 789
99b7da5d 790static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 791 {
99b7da5d
AA
792 { 1, S390_FPC_REGNUM, 8 },
793 { 16, S390_F0_REGNUM, 8 },
794 { 0 }
2ccd1468 795 };
d0f54f9d 796
99b7da5d 797static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 798 {
99b7da5d
AA
799 { 16, S390_R0_UPPER_REGNUM, 4 },
800 { 0 }
2ccd1468 801 };
7803799a 802
99b7da5d 803static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 804 {
99b7da5d
AA
805 { 1, REGCACHE_MAP_SKIP, 4 },
806 { 1, S390_LAST_BREAK_REGNUM, 4 },
807 { 0 }
2ccd1468 808 };
c642a434 809
99b7da5d 810static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 811 {
99b7da5d
AA
812 { 1, S390_LAST_BREAK_REGNUM, 8 },
813 { 0 }
2ccd1468
UW
814 };
815
99b7da5d 816static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 817 {
99b7da5d
AA
818 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
819 { 0 }
2ccd1468
UW
820 };
821
99b7da5d 822static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 823 {
99b7da5d
AA
824 { 1, S390_TDB_DWORD0_REGNUM, 8 },
825 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
826 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
827 { 1, S390_TDB_ATIA_REGNUM, 8 },
828 { 12, REGCACHE_MAP_SKIP, 8 },
829 { 16, S390_TDB_R0_REGNUM, 8 },
830 { 0 }
2ccd1468 831 };
c642a434 832
550bdf96
AA
833static const struct regcache_map_entry s390_regmap_vxrs_low[] =
834 {
835 { 16, S390_V0_LOWER_REGNUM, 8 },
836 { 0 }
837 };
838
839static const struct regcache_map_entry s390_regmap_vxrs_high[] =
840 {
841 { 16, S390_V16_REGNUM, 16 },
842 { 0 }
843 };
844
1b63490c
AA
845static const struct regcache_map_entry s390_regmap_gs[] =
846 {
847 { 1, REGCACHE_MAP_SKIP, 8 },
848 { 1, S390_GSD_REGNUM, 8 },
849 { 1, S390_GSSM_REGNUM, 8 },
850 { 1, S390_GSEPLA_REGNUM, 8 },
851 { 0 }
852 };
853
854static const struct regcache_map_entry s390_regmap_gsbc[] =
855 {
856 { 1, REGCACHE_MAP_SKIP, 8 },
857 { 1, S390_BC_GSD_REGNUM, 8 },
858 { 1, S390_BC_GSSM_REGNUM, 8 },
859 { 1, S390_BC_GSEPLA_REGNUM, 8 },
860 { 0 }
861 };
862
4ac33720 863
99b7da5d
AA
864/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
865 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
866
867static void
868s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
869 int regnum, const void *regs, size_t len)
870{
871 ULONGEST tdw;
872 enum register_status ret;
4ac33720 873
99b7da5d 874 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
875 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
876 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 877 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
878}
879
99b7da5d
AA
880const struct regset s390_gregset = {
881 s390_gregmap,
882 regcache_supply_regset,
883 regcache_collect_regset
d0f54f9d
JB
884};
885
99b7da5d
AA
886const struct regset s390_fpregset = {
887 s390_fpregmap,
888 regcache_supply_regset,
889 regcache_collect_regset
d0f54f9d
JB
890};
891
7803799a 892static const struct regset s390_upper_regset = {
34201ae3 893 s390_regmap_upper,
99b7da5d
AA
894 regcache_supply_regset,
895 regcache_collect_regset
7803799a
UW
896};
897
99b7da5d 898const struct regset s390_last_break_regset = {
c642a434 899 s390_regmap_last_break,
99b7da5d
AA
900 regcache_supply_regset,
901 regcache_collect_regset
c642a434
UW
902};
903
99b7da5d 904const struct regset s390x_last_break_regset = {
c642a434 905 s390x_regmap_last_break,
99b7da5d
AA
906 regcache_supply_regset,
907 regcache_collect_regset
c642a434
UW
908};
909
99b7da5d 910const struct regset s390_system_call_regset = {
c642a434 911 s390_regmap_system_call,
99b7da5d
AA
912 regcache_supply_regset,
913 regcache_collect_regset
c642a434
UW
914};
915
99b7da5d 916const struct regset s390_tdb_regset = {
4ac33720
UW
917 s390_regmap_tdb,
918 s390_supply_tdb_regset,
99b7da5d 919 regcache_collect_regset
4ac33720
UW
920};
921
550bdf96
AA
922const struct regset s390_vxrs_low_regset = {
923 s390_regmap_vxrs_low,
924 regcache_supply_regset,
925 regcache_collect_regset
926};
927
928const struct regset s390_vxrs_high_regset = {
929 s390_regmap_vxrs_high,
930 regcache_supply_regset,
931 regcache_collect_regset
932};
933
1b63490c
AA
934const struct regset s390_gs_regset = {
935 s390_regmap_gs,
936 regcache_supply_regset,
937 regcache_collect_regset
938};
939
940const struct regset s390_gsbc_regset = {
941 s390_regmap_gsbc,
942 regcache_supply_regset,
943 regcache_collect_regset
944};
945
5aa82d05
AA
946/* Iterate over supported core file register note sections. */
947
948static void
949s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
950 iterate_over_regset_sections_cb *cb,
951 void *cb_data,
952 const struct regcache *regcache)
953{
954 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8f0435f7
AA
955 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
956 s390_sizeof_gregset : s390x_sizeof_gregset);
5aa82d05 957
8f0435f7
AA
958 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
959 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
5aa82d05
AA
960
961 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
8f0435f7
AA
962 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
963 "s390 GPR upper halves", cb_data);
5aa82d05
AA
964
965 if (tdep->have_linux_v1)
8f0435f7
AA
966 cb (".reg-s390-last-break", 8,
967 (gdbarch_ptr_bit (gdbarch) == 32
968 ? &s390_last_break_regset : &s390x_last_break_regset),
34a60ddb 969 "s390 last-break address", cb_data);
5aa82d05
AA
970
971 if (tdep->have_linux_v2)
8f0435f7
AA
972 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
973 "s390 system-call", cb_data);
5aa82d05
AA
974
975 /* If regcache is set, we are in "write" (gcore) mode. In this
976 case, don't iterate over the TDB unless its registers are
977 available. */
978 if (tdep->have_tdb
979 && (regcache == NULL
980 || REG_VALID == regcache_register_status (regcache,
981 S390_TDB_DWORD0_REGNUM)))
8f0435f7
AA
982 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
983 "s390 TDB", cb_data);
550bdf96
AA
984
985 if (tdep->v0_full_regnum != -1)
986 {
987 cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset,
988 "s390 vector registers 0-15 lower half", cb_data);
989 cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset,
990 "s390 vector registers 16-31", cb_data);
991 }
1b63490c
AA
992
993 /* Iterate over the guarded-storage regsets if in "read" mode, or if
994 their registers are available. */
995 if (tdep->have_gs)
996 {
997 if (regcache == NULL
998 || REG_VALID == regcache_register_status (regcache,
999 S390_GSD_REGNUM))
1000 cb (".reg-s390-gs-cb", 4 * 8, &s390_gs_regset,
1001 "s390 guarded-storage registers", cb_data);
1002
1003 if (regcache == NULL
1004 || REG_VALID == regcache_register_status (regcache,
1005 S390_BC_GSD_REGNUM))
1006 cb (".reg-s390-gs-bc", 4 * 8, &s390_gsbc_regset,
1007 "s390 guarded-storage broadcast control", cb_data);
1008 }
5aa82d05
AA
1009}
1010
7803799a
UW
1011static const struct target_desc *
1012s390_core_read_description (struct gdbarch *gdbarch,
1013 struct target_ops *target, bfd *abfd)
1014{
7803799a 1015 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 1016 CORE_ADDR hwcap = 0;
1b63490c 1017 bool high_gprs, v1, v2, te, vx, gs;
4ac33720
UW
1018
1019 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
1020 if (!section)
1021 return NULL;
1022
550bdf96
AA
1023 high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs")
1024 != NULL);
1025 v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL);
1026 v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL);
1027 vx = (hwcap & HWCAP_S390_VX);
1028 te = (hwcap & HWCAP_S390_TE);
1b63490c 1029 gs = (hwcap & HWCAP_S390_GS);
550bdf96 1030
7803799a
UW
1031 switch (bfd_section_size (abfd, section))
1032 {
1033 case s390_sizeof_gregset:
c642a434 1034 if (high_gprs)
1b63490c
AA
1035 return (gs ? tdesc_s390_gs_linux64 :
1036 te && vx ? tdesc_s390_tevx_linux64 :
550bdf96
AA
1037 vx ? tdesc_s390_vx_linux64 :
1038 te ? tdesc_s390_te_linux64 :
1039 v2 ? tdesc_s390_linux64v2 :
1040 v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64);
c642a434 1041 else
550bdf96
AA
1042 return (v2 ? tdesc_s390_linux32v2 :
1043 v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
1044
1045 case s390x_sizeof_gregset:
1b63490c
AA
1046 return (gs ? tdesc_s390x_gs_linux64 :
1047 te && vx ? tdesc_s390x_tevx_linux64 :
550bdf96
AA
1048 vx ? tdesc_s390x_vx_linux64 :
1049 te ? tdesc_s390x_te_linux64 :
1050 v2 ? tdesc_s390x_linux64v2 :
1051 v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
1052
1053 default:
1054 return NULL;
1055 }
1056}
1057
d0f54f9d 1058
4bc8c588
JB
1059/* Decoding S/390 instructions. */
1060
1061/* Named opcode values for the S/390 instructions we recognize. Some
1062 instructions have their opcode split across two fields; those are the
1063 op1_* and op2_* enums. */
1064enum
1065 {
a8c99f38
JB
1066 op1_lhi = 0xa7, op2_lhi = 0x08,
1067 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 1068 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 1069 op_lr = 0x18,
a8c99f38
JB
1070 op_lgr = 0xb904,
1071 op_l = 0x58,
1072 op1_ly = 0xe3, op2_ly = 0x58,
1073 op1_lg = 0xe3, op2_lg = 0x04,
1074 op_lm = 0x98,
1075 op1_lmy = 0xeb, op2_lmy = 0x98,
1076 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 1077 op_st = 0x50,
a8c99f38 1078 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 1079 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 1080 op_std = 0x60,
4bc8c588 1081 op_stm = 0x90,
a8c99f38 1082 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 1083 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
1084 op1_aghi = 0xa7, op2_aghi = 0x0b,
1085 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
1086 op1_agfi = 0xc2, op2_agfi = 0x08,
1087 op1_afi = 0xc2, op2_afi = 0x09,
1088 op1_algfi= 0xc2, op2_algfi= 0x0a,
1089 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
1090 op_ar = 0x1a,
1091 op_agr = 0xb908,
1092 op_a = 0x5a,
1093 op1_ay = 0xe3, op2_ay = 0x5a,
1094 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
1095 op1_slgfi= 0xc2, op2_slgfi= 0x04,
1096 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
1097 op_sr = 0x1b,
1098 op_sgr = 0xb909,
1099 op_s = 0x5b,
1100 op1_sy = 0xe3, op2_sy = 0x5b,
1101 op1_sg = 0xe3, op2_sg = 0x09,
1102 op_nr = 0x14,
1103 op_ngr = 0xb980,
1104 op_la = 0x41,
1105 op1_lay = 0xe3, op2_lay = 0x71,
1106 op1_larl = 0xc0, op2_larl = 0x00,
1107 op_basr = 0x0d,
1108 op_bas = 0x4d,
1109 op_bcr = 0x07,
1110 op_bc = 0x0d,
1db4e8a0
UW
1111 op_bctr = 0x06,
1112 op_bctgr = 0xb946,
1113 op_bct = 0x46,
1114 op1_bctg = 0xe3, op2_bctg = 0x46,
1115 op_bxh = 0x86,
1116 op1_bxhg = 0xeb, op2_bxhg = 0x44,
1117 op_bxle = 0x87,
1118 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
1119 op1_bras = 0xa7, op2_bras = 0x05,
1120 op1_brasl= 0xc0, op2_brasl= 0x05,
1121 op1_brc = 0xa7, op2_brc = 0x04,
1122 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
1123 op1_brct = 0xa7, op2_brct = 0x06,
1124 op1_brctg= 0xa7, op2_brctg= 0x07,
1125 op_brxh = 0x84,
1126 op1_brxhg= 0xec, op2_brxhg= 0x44,
1127 op_brxle = 0x85,
1128 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 1129 op_svc = 0x0a,
4bc8c588
JB
1130 };
1131
1132
a8c99f38
JB
1133/* Read a single instruction from address AT. */
1134
1135#define S390_MAX_INSTR_SIZE 6
1136static int
1137s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
1138{
1139 static int s390_instrlen[] = { 2, 4, 4, 6 };
1140 int instrlen;
1141
8defab1a 1142 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
1143 return -1;
1144 instrlen = s390_instrlen[instr[0] >> 6];
1145 if (instrlen > 2)
1146 {
8defab1a 1147 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 1148 return -1;
a8c99f38
JB
1149 }
1150 return instrlen;
1151}
1152
1153
4bc8c588
JB
1154/* The functions below are for recognizing and decoding S/390
1155 instructions of various formats. Each of them checks whether INSN
1156 is an instruction of the given format, with the specified opcodes.
1157 If it is, it sets the remaining arguments to the values of the
1158 instruction's fields, and returns a non-zero value; otherwise, it
1159 returns zero.
1160
1161 These functions' arguments appear in the order they appear in the
1162 instruction, not in the machine-language form. So, opcodes always
1163 come first, even though they're sometimes scattered around the
1164 instructions. And displacements appear before base and extension
1165 registers, as they do in the assembly syntax, not at the end, as
1166 they do in the machine language. */
a78f21af 1167static int
4bc8c588
JB
1168is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
1169{
1170 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1171 {
1172 *r1 = (insn[1] >> 4) & 0xf;
1173 /* i2 is a 16-bit signed quantity. */
1174 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1175 return 1;
1176 }
1177 else
1178 return 0;
1179}
8ac0e65a 1180
5769d3cd 1181
4bc8c588
JB
1182static int
1183is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 1184 unsigned int *r1, int *i2)
4bc8c588
JB
1185{
1186 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
1187 {
1188 *r1 = (insn[1] >> 4) & 0xf;
1189 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
1190 no sign extension is necessary, but we don't want to assume
1191 that. */
4bc8c588 1192 *i2 = (((insn[2] << 24)
34201ae3
UW
1193 | (insn[3] << 16)
1194 | (insn[4] << 8)
1195 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
1196 return 1;
1197 }
1198 else
1199 return 0;
1200}
1201
1202
1203static int
1204is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1205{
1206 if (insn[0] == op)
1207 {
1208 *r1 = (insn[1] >> 4) & 0xf;
1209 *r2 = insn[1] & 0xf;
1210 return 1;
1211 }
1212 else
1213 return 0;
1214}
1215
1216
1217static int
1218is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1219{
1220 if (((insn[0] << 8) | insn[1]) == op)
1221 {
1222 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1223 *r1 = (insn[3] >> 4) & 0xf;
1224 *r2 = insn[3] & 0xf;
1225 return 1;
1226 }
1227 else
1228 return 0;
1229}
1230
1231
1232static int
1233is_rs (bfd_byte *insn, int op,
eb1bd1fb 1234 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1235{
1236 if (insn[0] == op)
1237 {
1238 *r1 = (insn[1] >> 4) & 0xf;
1239 *r3 = insn[1] & 0xf;
1240 *b2 = (insn[2] >> 4) & 0xf;
1241 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1242 return 1;
1243 }
1244 else
1245 return 0;
1246}
1247
1248
1249static int
a8c99f38 1250is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 1251 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1252{
1253 if (insn[0] == op1
4bc8c588
JB
1254 && insn[5] == op2)
1255 {
1256 *r1 = (insn[1] >> 4) & 0xf;
1257 *r3 = insn[1] & 0xf;
1258 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1259 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1260 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1261 ^ 0x80000) - 0x80000;
4bc8c588
JB
1262 return 1;
1263 }
1264 else
1265 return 0;
1266}
1267
1268
1269static int
1270is_rx (bfd_byte *insn, int op,
eb1bd1fb 1271 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1272{
1273 if (insn[0] == op)
1274 {
1275 *r1 = (insn[1] >> 4) & 0xf;
1276 *x2 = insn[1] & 0xf;
1277 *b2 = (insn[2] >> 4) & 0xf;
1278 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1279 return 1;
1280 }
1281 else
1282 return 0;
1283}
1284
1285
1286static int
a8c99f38 1287is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1288 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1289{
1290 if (insn[0] == op1
4bc8c588
JB
1291 && insn[5] == op2)
1292 {
1293 *r1 = (insn[1] >> 4) & 0xf;
1294 *x2 = insn[1] & 0xf;
1295 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1296 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1297 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1298 ^ 0x80000) - 0x80000;
4bc8c588
JB
1299 return 1;
1300 }
1301 else
1302 return 0;
1303}
1304
1305
3fc46200 1306/* Prologue analysis. */
4bc8c588 1307
d0f54f9d
JB
1308#define S390_NUM_GPRS 16
1309#define S390_NUM_FPRS 16
4bc8c588 1310
a8c99f38
JB
1311struct s390_prologue_data {
1312
ee1b3323
UW
1313 /* The stack. */
1314 struct pv_area *stack;
1315
e17a4113 1316 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1317 int gpr_size;
1318 int fpr_size;
e17a4113 1319 enum bfd_endian byte_order;
a8c99f38
JB
1320
1321 /* The general-purpose registers. */
3fc46200 1322 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1323
1324 /* The floating-point registers. */
3fc46200 1325 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1326
121d8485
UW
1327 /* The offset relative to the CFA where the incoming GPR N was saved
1328 by the function prologue. 0 if not saved or unknown. */
1329 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1330
121d8485
UW
1331 /* Likewise for FPRs. */
1332 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1333
121d8485
UW
1334 /* Nonzero if the backchain was saved. This is assumed to be the
1335 case when the incoming SP is saved at the current SP location. */
1336 int back_chain_saved_p;
1337};
4bc8c588 1338
3fc46200
UW
1339/* Return the effective address for an X-style instruction, like:
1340
34201ae3 1341 L R1, D2(X2, B2)
3fc46200
UW
1342
1343 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1344 constant; the effective address is the sum of all three. If either
1345 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1346 means that r0 can't be used as either X2 or B2. */
1347static pv_t
1348s390_addr (struct s390_prologue_data *data,
1349 int d2, unsigned int x2, unsigned int b2)
1350{
1351 pv_t result;
1352
1353 result = pv_constant (d2);
1354 if (x2)
1355 result = pv_add (result, data->gpr[x2]);
1356 if (b2)
1357 result = pv_add (result, data->gpr[b2]);
1358
1359 return result;
1360}
1361
1362/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1363static void
3fc46200
UW
1364s390_store (struct s390_prologue_data *data,
1365 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1366 pv_t value)
4bc8c588 1367{
3fc46200 1368 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1369 pv_t offset;
121d8485
UW
1370
1371 /* Check whether we are storing the backchain. */
3fc46200 1372 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1373
3fc46200 1374 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1375 if (size == data->gpr_size
3fc46200 1376 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1377 {
1378 data->back_chain_saved_p = 1;
1379 return;
1380 }
1381
1382
1383 /* Check whether we are storing a register into the stack. */
f7b7ed97
TT
1384 if (!data->stack->store_would_trash (addr))
1385 data->stack->store (addr, size, value);
4bc8c588 1386
a8c99f38 1387
121d8485
UW
1388 /* Note: If this is some store we cannot identify, you might think we
1389 should forget our cached values, as any of those might have been hit.
1390
1391 However, we make the assumption that the register save areas are only
1392 ever stored to once in any given function, and we do recognize these
1393 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1394}
4bc8c588 1395
3fc46200
UW
1396/* Do a SIZE-byte load from D2(X2,B2). */
1397static pv_t
1398s390_load (struct s390_prologue_data *data,
1399 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1400
4bc8c588 1401{
3fc46200 1402 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1403
a8c99f38
JB
1404 /* If it's a load from an in-line constant pool, then we can
1405 simulate that, under the assumption that the code isn't
1406 going to change between the time the processor actually
1407 executed it creating the current frame, and the time when
1408 we're analyzing the code to unwind past that frame. */
3fc46200 1409 if (pv_is_constant (addr))
4bc8c588 1410 {
0542c86d 1411 struct target_section *secp;
3fc46200 1412 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1413 if (secp != NULL
34201ae3 1414 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1415 secp->the_bfd_section)
34201ae3
UW
1416 & SEC_READONLY))
1417 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1418 data->byte_order));
a8c99f38 1419 }
7666f43c 1420
121d8485 1421 /* Check whether we are accessing one of our save slots. */
f7b7ed97 1422 return data->stack->fetch (addr, size);
ee1b3323 1423}
121d8485 1424
ee1b3323 1425/* Function for finding saved registers in a 'struct pv_area'; we pass
f7b7ed97 1426 this to pv_area::scan.
121d8485 1427
ee1b3323
UW
1428 If VALUE is a saved register, ADDR says it was saved at a constant
1429 offset from the frame base, and SIZE indicates that the whole
1430 register was saved, record its offset in the reg_offset table in
1431 PROLOGUE_UNTYPED. */
1432static void
c378eb4e
MS
1433s390_check_for_saved (void *data_untyped, pv_t addr,
1434 CORE_ADDR size, pv_t value)
ee1b3323 1435{
19ba03f4 1436 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
ee1b3323
UW
1437 int i, offset;
1438
1439 if (!pv_is_register (addr, S390_SP_REGNUM))
1440 return;
1441
1442 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1443
ee1b3323
UW
1444 /* If we are storing the original value of a register, we want to
1445 record the CFA offset. If the same register is stored multiple
1446 times, the stack slot with the highest address counts. */
34201ae3 1447
ee1b3323
UW
1448 for (i = 0; i < S390_NUM_GPRS; i++)
1449 if (size == data->gpr_size
1450 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1451 if (data->gpr_slot[i] == 0
1452 || data->gpr_slot[i] > offset)
1453 {
1454 data->gpr_slot[i] = offset;
1455 return;
1456 }
1457
1458 for (i = 0; i < S390_NUM_FPRS; i++)
1459 if (size == data->fpr_size
1460 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1461 if (data->fpr_slot[i] == 0
1462 || data->fpr_slot[i] > offset)
1463 {
1464 data->fpr_slot[i] = offset;
1465 return;
1466 }
a8c99f38 1467}
4bc8c588 1468
a8c99f38
JB
1469/* Analyze the prologue of the function starting at START_PC,
1470 continuing at most until CURRENT_PC. Initialize DATA to
1471 hold all information we find out about the state of the registers
1472 and stack slots. Return the address of the instruction after
1473 the last one that changed the SP, FP, or back chain; or zero
1474 on error. */
1475static CORE_ADDR
1476s390_analyze_prologue (struct gdbarch *gdbarch,
1477 CORE_ADDR start_pc,
1478 CORE_ADDR current_pc,
1479 struct s390_prologue_data *data)
4bc8c588 1480{
a8c99f38
JB
1481 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1482
4bc8c588 1483 /* Our return value:
a8c99f38 1484 The address of the instruction after the last one that changed
34201ae3 1485 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1486 read memory. */
1487 CORE_ADDR result = start_pc;
4bc8c588 1488
4bc8c588
JB
1489 /* The current PC for our abstract interpretation. */
1490 CORE_ADDR pc;
1491
1492 /* The address of the next instruction after that. */
1493 CORE_ADDR next_pc;
34201ae3 1494
f7b7ed97
TT
1495 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
1496 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
1497
4bc8c588
JB
1498 /* Set up everything's initial value. */
1499 {
1500 int i;
1501
a8c99f38
JB
1502 /* For the purpose of prologue tracking, we consider the GPR size to
1503 be equal to the ABI word size, even if it is actually larger
1504 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1505 data->gpr_size = word_size;
1506 data->fpr_size = 8;
e17a4113 1507 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1508
4bc8c588 1509 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1510 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1511
1512 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1513 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1514
121d8485
UW
1515 for (i = 0; i < S390_NUM_GPRS; i++)
1516 data->gpr_slot[i] = 0;
1517
1518 for (i = 0; i < S390_NUM_FPRS; i++)
1519 data->fpr_slot[i] = 0;
4bc8c588 1520
121d8485 1521 data->back_chain_saved_p = 0;
4bc8c588
JB
1522 }
1523
a8c99f38
JB
1524 /* Start interpreting instructions, until we hit the frame's
1525 current PC or the first branch instruction. */
1526 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1527 {
4bc8c588 1528 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1529 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1530
3fc46200
UW
1531 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1532 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1533 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1534
4bc8c588 1535 /* Fields for various kinds of instructions. */
a8c99f38
JB
1536 unsigned int b2, r1, r2, x2, r3;
1537 int i2, d2;
4bc8c588 1538
121d8485 1539 /* The values of SP and FP before this instruction,
34201ae3 1540 for detecting instructions that change them. */
3fc46200 1541 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1542 /* Likewise for the flag whether the back chain was saved. */
1543 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1544
1545 /* If we got an error trying to read the instruction, report it. */
1546 if (insn_len < 0)
34201ae3
UW
1547 {
1548 result = 0;
1549 break;
1550 }
4bc8c588
JB
1551
1552 next_pc = pc + insn_len;
1553
a8c99f38
JB
1554 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1555 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1556 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1557
4bc8c588 1558
3fc46200
UW
1559 /* LHI r1, i2 --- load halfword immediate. */
1560 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1561 /* LGFI r1, i2 --- load fullword immediate. */
1562 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1563 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1564 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1565 data->gpr[r1] = pv_constant (i2);
1566
1567 /* LR r1, r2 --- load from register. */
1568 /* LGR r1, r2 --- load from register (64-bit version). */
1569 else if (is_rr (insn32, op_lr, &r1, &r2)
1570 || is_rre (insn64, op_lgr, &r1, &r2))
1571 data->gpr[r1] = data->gpr[r2];
1572
1573 /* L r1, d2(x2, b2) --- load. */
1574 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1575 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1576 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1577 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1578 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1579 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1580
1581 /* ST r1, d2(x2, b2) --- store. */
1582 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1583 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1584 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1585 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1586 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1587 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1588
1589 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1590 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1591 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1592
1593 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1594 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1595 version). */
3fc46200
UW
1596 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1597 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1598 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1599 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1600 {
1601 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1602 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1603 }
4bc8c588 1604
3fc46200
UW
1605 /* AHI r1, i2 --- add halfword immediate. */
1606 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1607 /* AFI r1, i2 --- add fullword immediate. */
1608 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1609 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1610 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1611 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1612 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1613 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1614
1615 /* ALFI r1, i2 --- add logical immediate. */
1616 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1617 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1618 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1619 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1620 (CORE_ADDR)i2 & 0xffffffff);
1621
1622 /* AR r1, r2 -- add register. */
1623 /* AGR r1, r2 -- add register (64-bit version). */
1624 else if (is_rr (insn32, op_ar, &r1, &r2)
1625 || is_rre (insn64, op_agr, &r1, &r2))
1626 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1627
1628 /* A r1, d2(x2, b2) -- add. */
1629 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1630 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1631 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1632 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1633 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1634 data->gpr[r1] = pv_add (data->gpr[r1],
1635 s390_load (data, d2, x2, b2, data->gpr_size));
1636
1637 /* SLFI r1, i2 --- subtract logical immediate. */
1638 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1639 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1640 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1641 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1642 -((CORE_ADDR)i2 & 0xffffffff));
1643
1644 /* SR r1, r2 -- subtract register. */
1645 /* SGR r1, r2 -- subtract register (64-bit version). */
1646 else if (is_rr (insn32, op_sr, &r1, &r2)
1647 || is_rre (insn64, op_sgr, &r1, &r2))
1648 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1649
1650 /* S r1, d2(x2, b2) -- subtract. */
1651 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1652 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1653 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1654 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1655 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1656 data->gpr[r1] = pv_subtract (data->gpr[r1],
1657 s390_load (data, d2, x2, b2, data->gpr_size));
1658
1659 /* LA r1, d2(x2, b2) --- load address. */
1660 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1661 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1662 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1663 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1664
1665 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1666 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1667 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1668
3fc46200 1669 /* BASR r1, 0 --- branch and save.
34201ae3 1670 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1671 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1672 && r2 == 0)
3fc46200 1673 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1674
3fc46200 1675 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1676 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1677 {
1678 data->gpr[r1] = pv_constant (next_pc);
1679 next_pc = pc + i2 * 2;
4bc8c588 1680
34201ae3
UW
1681 /* We'd better not interpret any backward branches. We'll
1682 never terminate. */
1683 if (next_pc <= pc)
1684 break;
1685 }
4bc8c588 1686
bc0e3f49
AA
1687 /* BRC/BRCL -- branch relative on condition. Ignore "branch
1688 never", branch to following instruction, and "conditional
1689 trap" (BRC +2). Otherwise terminate search. */
1690 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
1691 {
1692 if (r1 != 0 && i2 != 1 && i2 != 2)
1693 break;
1694 }
1695 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
1696 {
1697 if (r1 != 0 && i2 != 3)
1698 break;
1699 }
1700
a8c99f38
JB
1701 /* Terminate search when hitting any other branch instruction. */
1702 else if (is_rr (insn, op_basr, &r1, &r2)
1703 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1704 || is_rr (insn, op_bcr, &r1, &r2)
1705 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
a8c99f38
JB
1706 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1707 break;
1708
4bc8c588 1709 else
d4fb63e1
TT
1710 {
1711 /* An instruction we don't know how to simulate. The only
1712 safe thing to do would be to set every value we're tracking
1713 to 'unknown'. Instead, we'll be optimistic: we assume that
1714 we *can* interpret every instruction that the compiler uses
1715 to manipulate any of the data we're interested in here --
1716 then we can just ignore anything else. */
1717 }
4bc8c588
JB
1718
1719 /* Record the address after the last instruction that changed
34201ae3
UW
1720 the FP, SP, or backlink. Ignore instructions that changed
1721 them back to their original values --- those are probably
1722 restore instructions. (The back chain is never restored,
1723 just popped.) */
4bc8c588 1724 {
34201ae3
UW
1725 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1726 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1727
1728 if ((! pv_is_identical (pre_insn_sp, sp)
1729 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1730 && sp.kind != pvk_unknown)
34201ae3
UW
1731 || (! pv_is_identical (pre_insn_fp, fp)
1732 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1733 && fp.kind != pvk_unknown)
34201ae3
UW
1734 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1735 result = next_pc;
4bc8c588 1736 }
5769d3cd 1737 }
4bc8c588 1738
ee1b3323 1739 /* Record where all the registers were saved. */
f7b7ed97 1740 data->stack->scan (s390_check_for_saved, data);
ee1b3323 1741
4bc8c588 1742 return result;
5769d3cd
AC
1743}
1744
34201ae3 1745/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1746 some "real" code. */
1747static CORE_ADDR
6093d2eb 1748s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1749{
1750 struct s390_prologue_data data;
f054145e
AA
1751 CORE_ADDR skip_pc, func_addr;
1752
1753 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1754 {
1755 CORE_ADDR post_prologue_pc
1756 = skip_prologue_using_sal (gdbarch, func_addr);
1757 if (post_prologue_pc != 0)
325fac50 1758 return std::max (pc, post_prologue_pc);
f054145e
AA
1759 }
1760
6093d2eb 1761 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1762 return skip_pc ? skip_pc : pc;
1763}
1764
c9cf6e20 1765/* Implmement the stack_frame_destroyed_p gdbarch method. */
d0f54f9d 1766static int
c9cf6e20 1767s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
d0f54f9d
JB
1768{
1769 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1770
1771 /* In frameless functions, there's not frame to destroy and thus
1772 we don't care about the epilogue.
1773
1774 In functions with frame, the epilogue sequence is a pair of
1775 a LM-type instruction that restores (amongst others) the
1776 return register %r14 and the stack pointer %r15, followed
1777 by a branch 'br %r14' --or equivalent-- that effects the
1778 actual return.
1779
1780 In that situation, this function needs to return 'true' in
1781 exactly one case: when pc points to that branch instruction.
1782
1783 Thus we try to disassemble the one instructions immediately
177b42fe 1784 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1785 modifying the stack pointer.
1786
1787 Note that disassembling backwards is not reliable, so there
1788 is a slight chance of false positives here ... */
1789
1790 bfd_byte insn[6];
1791 unsigned int r1, r3, b2;
1792 int d2;
1793
1794 if (word_size == 4
8defab1a 1795 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1796 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1797 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1798 return 1;
1799
a8c99f38 1800 if (word_size == 4
8defab1a 1801 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1802 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1803 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1804 return 1;
1805
d0f54f9d 1806 if (word_size == 8
8defab1a 1807 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1808 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1809 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1810 return 1;
1811
1812 return 0;
1813}
5769d3cd 1814
1db4e8a0
UW
1815/* Displaced stepping. */
1816
5ac21343
PA
1817/* Return true if INSN is a non-branch RIL-b or RIL-c format
1818 instruction. */
1819
1820static int
1821is_non_branch_ril (gdb_byte *insn)
1822{
1823 gdb_byte op1 = insn[0];
1824
1825 if (op1 == 0xc4)
1826 {
1827 gdb_byte op2 = insn[1] & 0x0f;
1828
1829 switch (op2)
1830 {
1831 case 0x02: /* llhrl */
1832 case 0x04: /* lghrl */
1833 case 0x05: /* lhrl */
1834 case 0x06: /* llghrl */
1835 case 0x07: /* sthrl */
1836 case 0x08: /* lgrl */
1837 case 0x0b: /* stgrl */
1838 case 0x0c: /* lgfrl */
1839 case 0x0d: /* lrl */
1840 case 0x0e: /* llgfrl */
1841 case 0x0f: /* strl */
1842 return 1;
1843 }
1844 }
1845 else if (op1 == 0xc6)
1846 {
1847 gdb_byte op2 = insn[1] & 0x0f;
1848
1849 switch (op2)
1850 {
1851 case 0x00: /* exrl */
1852 case 0x02: /* pfdrl */
1853 case 0x04: /* cghrl */
1854 case 0x05: /* chrl */
1855 case 0x06: /* clghrl */
1856 case 0x07: /* clhrl */
1857 case 0x08: /* cgrl */
1858 case 0x0a: /* clgrl */
1859 case 0x0c: /* cgfrl */
1860 case 0x0d: /* crl */
1861 case 0x0e: /* clgfrl */
1862 case 0x0f: /* clrl */
1863 return 1;
1864 }
1865 }
1866
1867 return 0;
1868}
1869
cfba9872
SM
1870typedef buf_displaced_step_closure s390_displaced_step_closure;
1871
5ac21343
PA
1872/* Implementation of gdbarch_displaced_step_copy_insn. */
1873
1874static struct displaced_step_closure *
1875s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
1876 CORE_ADDR from, CORE_ADDR to,
1877 struct regcache *regs)
1878{
1879 size_t len = gdbarch_max_insn_length (gdbarch);
cfba9872
SM
1880 std::unique_ptr<s390_displaced_step_closure> closure
1881 (new s390_displaced_step_closure (len));
1882 gdb_byte *buf = closure->buf.data ();
5ac21343
PA
1883
1884 read_memory (from, buf, len);
1885
1886 /* Adjust the displacement field of PC-relative RIL instructions,
1887 except branches. The latter are handled in the fixup hook. */
1888 if (is_non_branch_ril (buf))
1889 {
1890 LONGEST offset;
1891
1892 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
1893 offset = (from - to + offset * 2) / 2;
1894
1895 /* If the instruction is too far from the jump pad, punt. This
1896 will usually happen with instructions in shared libraries.
1897 We could probably support these by rewriting them to be
1898 absolute or fully emulating them. */
1899 if (offset < INT32_MIN || offset > INT32_MAX)
1900 {
1901 /* Let the core fall back to stepping over the breakpoint
1902 in-line. */
1903 if (debug_displaced)
1904 {
1905 fprintf_unfiltered (gdb_stdlog,
1906 "displaced: can't displaced step "
1907 "RIL instruction: offset %s out of range\n",
1908 plongest (offset));
1909 }
cfba9872 1910
5ac21343
PA
1911 return NULL;
1912 }
1913
1914 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
1915 }
1916
1917 write_memory (to, buf, len);
1918
1919 if (debug_displaced)
1920 {
1921 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
1922 paddress (gdbarch, from), paddress (gdbarch, to));
1923 displaced_step_dump_bytes (gdb_stdlog, buf, len);
1924 }
1925
cfba9872 1926 return closure.release ();
5ac21343
PA
1927}
1928
1db4e8a0
UW
1929/* Fix up the state of registers and memory after having single-stepped
1930 a displaced instruction. */
1931static void
1932s390_displaced_step_fixup (struct gdbarch *gdbarch,
cfba9872 1933 struct displaced_step_closure *closure_,
1db4e8a0
UW
1934 CORE_ADDR from, CORE_ADDR to,
1935 struct regcache *regs)
1936{
5ac21343 1937 /* Our closure is a copy of the instruction. */
cfba9872
SM
1938 s390_displaced_step_closure *closure
1939 = (s390_displaced_step_closure *) closure_;
1940 gdb_byte *insn = closure->buf.data ();
1db4e8a0
UW
1941 static int s390_instrlen[] = { 2, 4, 4, 6 };
1942 int insnlen = s390_instrlen[insn[0] >> 6];
1943
1944 /* Fields for various kinds of instructions. */
1945 unsigned int b2, r1, r2, x2, r3;
1946 int i2, d2;
1947
1948 /* Get current PC and addressing mode bit. */
1949 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1950 ULONGEST amode = 0;
1db4e8a0
UW
1951
1952 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1953 {
1954 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1955 amode &= 0x80000000;
1956 }
1957
1958 if (debug_displaced)
1959 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1960 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1961 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1962 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1963
1964 /* Handle absolute branch and save instructions. */
1965 if (is_rr (insn, op_basr, &r1, &r2)
1966 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1967 {
1968 /* Recompute saved return address in R1. */
1969 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1970 amode | (from + insnlen));
1971 }
1972
1973 /* Handle absolute branch instructions. */
1974 else if (is_rr (insn, op_bcr, &r1, &r2)
1975 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1976 || is_rr (insn, op_bctr, &r1, &r2)
1977 || is_rre (insn, op_bctgr, &r1, &r2)
1978 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1979 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1980 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1981 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1982 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1983 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1984 {
1985 /* Update PC iff branch was *not* taken. */
1986 if (pc == to + insnlen)
1987 regcache_write_pc (regs, from + insnlen);
1988 }
1989
1990 /* Handle PC-relative branch and save instructions. */
1991 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1992 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1993 {
1994 /* Update PC. */
1995 regcache_write_pc (regs, pc - to + from);
1996 /* Recompute saved return address in R1. */
1997 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1998 amode | (from + insnlen));
1999 }
2000
1db4e8a0
UW
2001 /* Handle LOAD ADDRESS RELATIVE LONG. */
2002 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
2003 {
0161e4b9
UW
2004 /* Update PC. */
2005 regcache_write_pc (regs, from + insnlen);
34201ae3 2006 /* Recompute output address in R1. */
1db4e8a0 2007 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 2008 amode | (from + i2 * 2));
1db4e8a0
UW
2009 }
2010
2011 /* If we executed a breakpoint instruction, point PC right back at it. */
2012 else if (insn[0] == 0x0 && insn[1] == 0x1)
2013 regcache_write_pc (regs, from);
2014
dcb84eda
AA
2015 /* For any other insn, adjust PC by negated displacement. PC then
2016 points right after the original instruction, except for PC-relative
2017 branches, where it points to the adjusted branch target. */
1db4e8a0 2018 else
dcb84eda 2019 regcache_write_pc (regs, pc - to + from);
0161e4b9
UW
2020
2021 if (debug_displaced)
2022 fprintf_unfiltered (gdb_stdlog,
2023 "displaced: (s390) pc is now %s\n",
2024 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 2025}
a8c99f38 2026
d6db1fab
UW
2027
2028/* Helper routine to unwind pseudo registers. */
2029
2030static struct value *
2031s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2032{
2033 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2034 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2035 struct type *type = register_type (gdbarch, regnum);
2036
2037 /* Unwind PC via PSW address. */
2038 if (regnum == tdep->pc_regnum)
2039 {
2040 struct value *val;
2041
2042 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2043 if (!value_optimized_out (val))
2044 {
2045 LONGEST pswa = value_as_long (val);
2046
2047 if (TYPE_LENGTH (type) == 4)
2048 return value_from_pointer (type, pswa & 0x7fffffff);
2049 else
2050 return value_from_pointer (type, pswa);
2051 }
2052 }
2053
2054 /* Unwind CC via PSW mask. */
2055 if (regnum == tdep->cc_regnum)
2056 {
2057 struct value *val;
2058
2059 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2060 if (!value_optimized_out (val))
2061 {
2062 LONGEST pswm = value_as_long (val);
2063
2064 if (TYPE_LENGTH (type) == 4)
2065 return value_from_longest (type, (pswm >> 12) & 3);
2066 else
2067 return value_from_longest (type, (pswm >> 44) & 3);
2068 }
2069 }
2070
2071 /* Unwind full GPRs to show at least the lower halves (as the
2072 upper halves are undefined). */
2ccd1468 2073 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
2074 {
2075 int reg = regnum - tdep->gpr_full_regnum;
2076 struct value *val;
2077
2078 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2079 if (!value_optimized_out (val))
2080 return value_cast (type, val);
2081 }
2082
2083 return allocate_optimized_out_value (type);
2084}
2085
2086static struct value *
2087s390_trad_frame_prev_register (struct frame_info *this_frame,
2088 struct trad_frame_saved_reg saved_regs[],
2089 int regnum)
2090{
2091 if (regnum < S390_NUM_REGS)
2092 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2093 else
2094 return s390_unwind_pseudo_register (this_frame, regnum);
2095}
2096
2097
a8c99f38
JB
2098/* Normal stack frames. */
2099
2100struct s390_unwind_cache {
2101
2102 CORE_ADDR func;
2103 CORE_ADDR frame_base;
2104 CORE_ADDR local_base;
2105
2106 struct trad_frame_saved_reg *saved_regs;
2107};
2108
a78f21af 2109static int
f089c433 2110s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2111 struct s390_unwind_cache *info)
5769d3cd 2112{
f089c433 2113 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
2114 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2115 struct s390_prologue_data data;
3fc46200
UW
2116 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2117 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
2118 int i;
2119 CORE_ADDR cfa;
a8c99f38
JB
2120 CORE_ADDR func;
2121 CORE_ADDR result;
2122 ULONGEST reg;
2123 CORE_ADDR prev_sp;
2124 int frame_pointer;
2125 int size;
edb3359d 2126 struct frame_info *next_frame;
a8c99f38
JB
2127
2128 /* Try to find the function start address. If we can't find it, we don't
2129 bother searching for it -- with modern compilers this would be mostly
2130 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2131 or else a valid backchain ... */
6d53bec8
AA
2132 if (!get_frame_func_if_available (this_frame, &info->func))
2133 {
2134 info->func = -1;
2135 return 0;
2136 }
2137 func = info->func;
5769d3cd 2138
a8c99f38
JB
2139 /* Try to analyze the prologue. */
2140 result = s390_analyze_prologue (gdbarch, func,
f089c433 2141 get_frame_pc (this_frame), &data);
a8c99f38 2142 if (!result)
5769d3cd 2143 return 0;
5769d3cd 2144
a8c99f38 2145 /* If this was successful, we should have found the instruction that
34201ae3 2146 sets the stack pointer register to the previous value of the stack
a8c99f38 2147 pointer minus the frame size. */
3fc46200 2148 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 2149 return 0;
a8c99f38 2150
34201ae3 2151 /* A frame size of zero at this point can mean either a real
a8c99f38 2152 frameless function, or else a failure to find the prologue.
34201ae3 2153 Perform some sanity checks to verify we really have a
a8c99f38
JB
2154 frameless function. */
2155 if (sp->k == 0)
5769d3cd 2156 {
34201ae3
UW
2157 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2158 size zero. This is only possible if the next frame is a sentinel
a8c99f38 2159 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
2160 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2161 needed, instead the code should simpliy rely on its
2162 analysis. */
edb3359d
DJ
2163 next_frame = get_next_frame (this_frame);
2164 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2165 next_frame = get_next_frame (next_frame);
2166 if (next_frame
f089c433 2167 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 2168 return 0;
5769d3cd 2169
a8c99f38
JB
2170 /* If we really have a frameless function, %r14 must be valid
2171 -- in particular, it must point to a different function. */
f089c433 2172 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
2173 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2174 if (get_pc_function_start (reg) == func)
5769d3cd 2175 {
a8c99f38
JB
2176 /* However, there is one case where it *is* valid for %r14
2177 to point to the same function -- if this is a recursive
2178 call, and we have stopped in the prologue *before* the
2179 stack frame was allocated.
2180
2181 Recognize this case by looking ahead a bit ... */
5769d3cd 2182
a8c99f38 2183 struct s390_prologue_data data2;
3fc46200 2184 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
2185
2186 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
2187 && pv_is_register (*sp, S390_SP_REGNUM)
2188 && sp->k != 0))
a8c99f38 2189 return 0;
5769d3cd 2190 }
5769d3cd 2191 }
5769d3cd
AC
2192
2193
a8c99f38
JB
2194 /* OK, we've found valid prologue data. */
2195 size = -sp->k;
5769d3cd 2196
a8c99f38
JB
2197 /* If the frame pointer originally also holds the same value
2198 as the stack pointer, we're probably using it. If it holds
2199 some other value -- even a constant offset -- it is most
2200 likely used as temp register. */
3fc46200 2201 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
2202 frame_pointer = S390_FRAME_REGNUM;
2203 else
2204 frame_pointer = S390_SP_REGNUM;
2205
34201ae3
UW
2206 /* If we've detected a function with stack frame, we'll still have to
2207 treat it as frameless if we're currently within the function epilog
c378eb4e 2208 code at a point where the frame pointer has already been restored.
a8c99f38 2209 This can only happen in an innermost frame. */
0e100dab
AC
2210 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2211 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
2212 next_frame = get_next_frame (this_frame);
2213 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2214 next_frame = get_next_frame (next_frame);
f089c433 2215 if (size > 0
edb3359d 2216 && (next_frame == NULL
f089c433 2217 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 2218 {
c9cf6e20 2219 /* See the comment in s390_stack_frame_destroyed_p on why this is
a8c99f38 2220 not completely reliable ... */
c9cf6e20 2221 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 2222 {
a8c99f38
JB
2223 memset (&data, 0, sizeof (data));
2224 size = 0;
2225 frame_pointer = S390_SP_REGNUM;
5769d3cd 2226 }
5769d3cd 2227 }
5769d3cd 2228
a8c99f38
JB
2229 /* Once we know the frame register and the frame size, we can unwind
2230 the current value of the frame register from the next frame, and
34201ae3 2231 add back the frame size to arrive that the previous frame's
a8c99f38 2232 stack pointer value. */
f089c433 2233 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 2234 cfa = prev_sp + 16*word_size + 32;
5769d3cd 2235
7803799a
UW
2236 /* Set up ABI call-saved/call-clobbered registers. */
2237 for (i = 0; i < S390_NUM_REGS; i++)
2238 if (!s390_register_call_saved (gdbarch, i))
2239 trad_frame_set_unknown (info->saved_regs, i);
2240
2241 /* CC is always call-clobbered. */
d6db1fab 2242 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 2243
121d8485
UW
2244 /* Record the addresses of all register spill slots the prologue parser
2245 has recognized. Consider only registers defined as call-saved by the
2246 ABI; for call-clobbered registers the parser may have recognized
2247 spurious stores. */
5769d3cd 2248
7803799a
UW
2249 for (i = 0; i < 16; i++)
2250 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2251 && data.gpr_slot[i] != 0)
121d8485 2252 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 2253
7803799a
UW
2254 for (i = 0; i < 16; i++)
2255 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2256 && data.fpr_slot[i] != 0)
2257 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
2258
2259 /* Function return will set PC to %r14. */
d6db1fab 2260 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2261
2262 /* In frameless functions, we unwind simply by moving the return
2263 address to the PC. However, if we actually stored to the
2264 save area, use that -- we might only think the function frameless
2265 because we're in the middle of the prologue ... */
2266 if (size == 0
d6db1fab 2267 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2268 {
d6db1fab 2269 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 2270 }
a8c99f38
JB
2271
2272 /* Another sanity check: unless this is a frameless function,
2273 we should have found spill slots for SP and PC.
2274 If not, we cannot unwind further -- this happens e.g. in
2275 libc's thread_start routine. */
2276 if (size > 0)
5769d3cd 2277 {
a8c99f38 2278 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 2279 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 2280 prev_sp = -1;
5769d3cd 2281 }
a8c99f38
JB
2282
2283 /* We use the current value of the frame register as local_base,
2284 and the top of the register save area as frame_base. */
2285 if (prev_sp != -1)
2286 {
2287 info->frame_base = prev_sp + 16*word_size + 32;
2288 info->local_base = prev_sp - size;
2289 }
2290
a8c99f38 2291 return 1;
5769d3cd
AC
2292}
2293
a78f21af 2294static void
f089c433 2295s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2296 struct s390_unwind_cache *info)
5769d3cd 2297{
f089c433 2298 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2299 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2300 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2301 CORE_ADDR backchain;
2302 ULONGEST reg;
f2489477 2303 LONGEST sp, tmp;
7803799a
UW
2304 int i;
2305
2306 /* Set up ABI call-saved/call-clobbered registers. */
2307 for (i = 0; i < S390_NUM_REGS; i++)
2308 if (!s390_register_call_saved (gdbarch, i))
2309 trad_frame_set_unknown (info->saved_regs, i);
2310
2311 /* CC is always call-clobbered. */
d6db1fab 2312 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2313
2314 /* Get the backchain. */
f089c433 2315 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
f2489477
AA
2316 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2317 tmp = 0;
2318 backchain = (CORE_ADDR) tmp;
a8c99f38
JB
2319
2320 /* A zero backchain terminates the frame chain. As additional
2321 sanity check, let's verify that the spill slot for SP in the
2322 save area pointed to by the backchain in fact links back to
2323 the save area. */
2324 if (backchain != 0
e17a4113
UW
2325 && safe_read_memory_integer (backchain + 15*word_size,
2326 word_size, byte_order, &sp)
a8c99f38
JB
2327 && (CORE_ADDR)sp == backchain)
2328 {
2329 /* We don't know which registers were saved, but it will have
34201ae3
UW
2330 to be at least %r14 and %r15. This will allow us to continue
2331 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
2332 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2333 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2334
2335 /* Function return will set PC to %r14. */
d6db1fab 2336 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2337 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2338
2339 /* We use the current value of the frame register as local_base,
34201ae3 2340 and the top of the register save area as frame_base. */
a8c99f38
JB
2341 info->frame_base = backchain + 16*word_size + 32;
2342 info->local_base = reg;
2343 }
2344
f089c433 2345 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2346}
2347
a8c99f38 2348static struct s390_unwind_cache *
f089c433 2349s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2350 void **this_prologue_cache)
2351{
2352 struct s390_unwind_cache *info;
62261490 2353
a8c99f38 2354 if (*this_prologue_cache)
19ba03f4 2355 return (struct s390_unwind_cache *) *this_prologue_cache;
a8c99f38
JB
2356
2357 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2358 *this_prologue_cache = info;
f089c433 2359 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2360 info->func = -1;
2361 info->frame_base = -1;
2362 info->local_base = -1;
2363
492d29ea 2364 TRY
62261490
PA
2365 {
2366 /* Try to use prologue analysis to fill the unwind cache.
2367 If this fails, fall back to reading the stack backchain. */
2368 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2369 s390_backchain_frame_unwind_cache (this_frame, info);
2370 }
492d29ea 2371 CATCH (ex, RETURN_MASK_ERROR)
7556d4a4
PA
2372 {
2373 if (ex.error != NOT_AVAILABLE_ERROR)
2374 throw_exception (ex);
2375 }
492d29ea 2376 END_CATCH
a8c99f38
JB
2377
2378 return info;
2379}
5769d3cd 2380
a78f21af 2381static void
f089c433 2382s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2383 void **this_prologue_cache,
2384 struct frame_id *this_id)
5769d3cd 2385{
a8c99f38 2386 struct s390_unwind_cache *info
f089c433 2387 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2388
a8c99f38 2389 if (info->frame_base == -1)
6d53bec8
AA
2390 {
2391 if (info->func != -1)
2392 *this_id = frame_id_build_unavailable_stack (info->func);
2393 return;
2394 }
5769d3cd 2395
a8c99f38 2396 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2397}
2398
f089c433
UW
2399static struct value *
2400s390_frame_prev_register (struct frame_info *this_frame,
2401 void **this_prologue_cache, int regnum)
a8c99f38
JB
2402{
2403 struct s390_unwind_cache *info
f089c433 2404 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2405
d6db1fab 2406 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2407}
2408
2409static const struct frame_unwind s390_frame_unwind = {
2410 NORMAL_FRAME,
8fbca658 2411 default_frame_unwind_stop_reason,
a8c99f38 2412 s390_frame_this_id,
f089c433
UW
2413 s390_frame_prev_register,
2414 NULL,
2415 default_frame_sniffer
a8c99f38
JB
2416};
2417
5769d3cd 2418
8e645ae7
AC
2419/* Code stubs and their stack frames. For things like PLTs and NULL
2420 function calls (where there is no true frame and the return address
2421 is in the RETADDR register). */
a8c99f38 2422
8e645ae7
AC
2423struct s390_stub_unwind_cache
2424{
a8c99f38
JB
2425 CORE_ADDR frame_base;
2426 struct trad_frame_saved_reg *saved_regs;
2427};
2428
8e645ae7 2429static struct s390_stub_unwind_cache *
f089c433 2430s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2431 void **this_prologue_cache)
5769d3cd 2432{
f089c433 2433 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2434 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2435 struct s390_stub_unwind_cache *info;
a8c99f38 2436 ULONGEST reg;
5c3cf190 2437
a8c99f38 2438 if (*this_prologue_cache)
19ba03f4 2439 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
5c3cf190 2440
8e645ae7 2441 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2442 *this_prologue_cache = info;
f089c433 2443 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2444
2445 /* The return address is in register %r14. */
d6db1fab 2446 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2447
2448 /* Retrieve stack pointer and determine our frame base. */
f089c433 2449 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2450 info->frame_base = reg + 16*word_size + 32;
2451
2452 return info;
5769d3cd
AC
2453}
2454
a8c99f38 2455static void
f089c433 2456s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2457 void **this_prologue_cache,
2458 struct frame_id *this_id)
5769d3cd 2459{
8e645ae7 2460 struct s390_stub_unwind_cache *info
f089c433
UW
2461 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2462 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2463}
5769d3cd 2464
f089c433
UW
2465static struct value *
2466s390_stub_frame_prev_register (struct frame_info *this_frame,
2467 void **this_prologue_cache, int regnum)
8e645ae7
AC
2468{
2469 struct s390_stub_unwind_cache *info
f089c433 2470 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2471 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2472}
2473
f089c433
UW
2474static int
2475s390_stub_frame_sniffer (const struct frame_unwind *self,
2476 struct frame_info *this_frame,
2477 void **this_prologue_cache)
a8c99f38 2478{
93d42b30 2479 CORE_ADDR addr_in_block;
8e645ae7
AC
2480 bfd_byte insn[S390_MAX_INSTR_SIZE];
2481
2482 /* If the current PC points to non-readable memory, we assume we
2483 have trapped due to an invalid function pointer call. We handle
2484 the non-existing current function like a PLT stub. */
f089c433 2485 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2486 if (in_plt_section (addr_in_block)
f089c433
UW
2487 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2488 return 1;
2489 return 0;
a8c99f38 2490}
5769d3cd 2491
f089c433
UW
2492static const struct frame_unwind s390_stub_frame_unwind = {
2493 NORMAL_FRAME,
8fbca658 2494 default_frame_unwind_stop_reason,
f089c433
UW
2495 s390_stub_frame_this_id,
2496 s390_stub_frame_prev_register,
2497 NULL,
2498 s390_stub_frame_sniffer
2499};
2500
5769d3cd 2501
a8c99f38 2502/* Signal trampoline stack frames. */
5769d3cd 2503
a8c99f38
JB
2504struct s390_sigtramp_unwind_cache {
2505 CORE_ADDR frame_base;
2506 struct trad_frame_saved_reg *saved_regs;
2507};
5769d3cd 2508
a8c99f38 2509static struct s390_sigtramp_unwind_cache *
f089c433 2510s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2511 void **this_prologue_cache)
5769d3cd 2512{
f089c433 2513 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2514 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2515 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2516 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2517 struct s390_sigtramp_unwind_cache *info;
2518 ULONGEST this_sp, prev_sp;
7803799a 2519 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2520 int i;
2521
2522 if (*this_prologue_cache)
19ba03f4 2523 return (struct s390_sigtramp_unwind_cache *) *this_prologue_cache;
5769d3cd 2524
a8c99f38
JB
2525 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2526 *this_prologue_cache = info;
f089c433 2527 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2528
f089c433
UW
2529 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2530 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2531 next_cfa = this_sp + 16*word_size + 32;
2532
2533 /* New-style RT frame:
2534 retcode + alignment (8 bytes)
2535 siginfo (128 bytes)
c378eb4e 2536 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2537 if (next_ra == next_cfa)
2538 {
f0f63663 2539 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2540 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2541 upper GPR halves if present. */
2542 sigreg_high_off = 8;
a8c99f38
JB
2543 }
2544
2545 /* Old-style RT frame and all non-RT frames:
2546 old signal mask (8 bytes)
c378eb4e 2547 pointer to sigregs. */
5769d3cd
AC
2548 else
2549 {
e17a4113
UW
2550 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2551 word_size, byte_order);
7803799a
UW
2552 /* sigregs are followed by signo (4 bytes), then by the
2553 upper GPR halves if present. */
2554 sigreg_high_off = 4;
a8c99f38 2555 }
5769d3cd 2556
a8c99f38 2557 /* The sigregs structure looks like this:
34201ae3
UW
2558 long psw_mask;
2559 long psw_addr;
2560 long gprs[16];
2561 int acrs[16];
2562 int fpc;
2563 int __pad;
2564 double fprs[16]; */
5769d3cd 2565
7803799a
UW
2566 /* PSW mask and address. */
2567 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2568 sigreg_ptr += word_size;
7803799a 2569 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2570 sigreg_ptr += word_size;
2571
2572 /* Then the GPRs. */
2573 for (i = 0; i < 16; i++)
2574 {
2575 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2576 sigreg_ptr += word_size;
2577 }
2578
2579 /* Then the ACRs. */
2580 for (i = 0; i < 16; i++)
2581 {
2582 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2583 sigreg_ptr += 4;
5769d3cd 2584 }
5769d3cd 2585
a8c99f38
JB
2586 /* The floating-point control word. */
2587 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2588 sigreg_ptr += 8;
5769d3cd 2589
a8c99f38
JB
2590 /* And finally the FPRs. */
2591 for (i = 0; i < 16; i++)
2592 {
2593 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2594 sigreg_ptr += 8;
2595 }
2596
7803799a
UW
2597 /* If we have them, the GPR upper halves are appended at the end. */
2598 sigreg_ptr += sigreg_high_off;
2599 if (tdep->gpr_full_regnum != -1)
2600 for (i = 0; i < 16; i++)
2601 {
34201ae3 2602 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2603 sigreg_ptr += 4;
2604 }
2605
a8c99f38
JB
2606 /* Restore the previous frame's SP. */
2607 prev_sp = read_memory_unsigned_integer (
2608 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2609 word_size, byte_order);
5769d3cd 2610
a8c99f38
JB
2611 /* Determine our frame base. */
2612 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2613
a8c99f38 2614 return info;
5769d3cd
AC
2615}
2616
a8c99f38 2617static void
f089c433 2618s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2619 void **this_prologue_cache,
2620 struct frame_id *this_id)
5769d3cd 2621{
a8c99f38 2622 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2623 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2624 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2625}
2626
f089c433
UW
2627static struct value *
2628s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2629 void **this_prologue_cache, int regnum)
a8c99f38
JB
2630{
2631 struct s390_sigtramp_unwind_cache *info
f089c433 2632 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2633 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2634}
2635
f089c433
UW
2636static int
2637s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2638 struct frame_info *this_frame,
2639 void **this_prologue_cache)
5769d3cd 2640{
f089c433 2641 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2642 bfd_byte sigreturn[2];
4c8287ac 2643
8defab1a 2644 if (target_read_memory (pc, sigreturn, 2))
f089c433 2645 return 0;
4c8287ac 2646
237b092b 2647 if (sigreturn[0] != op_svc)
f089c433 2648 return 0;
5769d3cd 2649
a8c99f38
JB
2650 if (sigreturn[1] != 119 /* sigreturn */
2651 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2652 return 0;
34201ae3 2653
f089c433 2654 return 1;
5769d3cd
AC
2655}
2656
f089c433
UW
2657static const struct frame_unwind s390_sigtramp_frame_unwind = {
2658 SIGTRAMP_FRAME,
8fbca658 2659 default_frame_unwind_stop_reason,
f089c433
UW
2660 s390_sigtramp_frame_this_id,
2661 s390_sigtramp_frame_prev_register,
2662 NULL,
2663 s390_sigtramp_frame_sniffer
2664};
2665
237b092b
AA
2666/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2667 upon error. */
2668
2669static LONGEST
2670s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2671 ptid_t ptid)
2672{
2673 struct regcache *regs = get_thread_regcache (ptid);
2674 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2675 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2676 ULONGEST pc;
2677 ULONGEST svc_number = -1;
2678 unsigned opcode;
2679
2680 /* Assume that the PC points after the 2-byte SVC instruction. We
2681 don't currently support SVC via EXECUTE. */
2682 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2683 pc -= 2;
2684 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2685 if (opcode != op_svc)
2686 return -1;
2687
2688 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2689 byte_order);
2690 if (svc_number == 0)
2691 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2692
2693 return svc_number;
2694}
2695
566c56c9
MK
2696/* Process record-replay */
2697
2698static struct linux_record_tdep s390_linux_record_tdep;
2699static struct linux_record_tdep s390x_linux_record_tdep;
2700
2701/* Record all registers but PC register for process-record. */
2702
2703static int
2704s390_all_but_pc_registers_record (struct regcache *regcache)
2705{
ac7936df 2706 struct gdbarch *gdbarch = regcache->arch ();
566c56c9
MK
2707 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2708 int i;
2709
2710 for (i = 0; i < 16; i++)
2711 {
2712 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2713 return -1;
2714 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
2715 return -1;
2716 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2717 return -1;
2718 if (tdep->gpr_full_regnum != -1)
2719 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2720 return -1;
2721 if (tdep->v0_full_regnum != -1)
2722 {
2723 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2724 return -1;
2725 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i))
2726 return -1;
2727 }
2728 }
2729 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2730 return -1;
2731 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2732 return -1;
2733
2734 return 0;
2735}
2736
2737static enum gdb_syscall
2738s390_canonicalize_syscall (int syscall, enum s390_abi_kind abi)
2739{
2740 switch (syscall)
2741 {
2742 /* s390 syscall numbers < 222 are mostly the same as x86, so just list
2743 the exceptions. */
2744 case 0:
2745 return gdb_sys_no_syscall;
2746 case 7:
2747 return gdb_sys_restart_syscall;
2748 /* These syscalls work only on 31-bit. */
2749 case 13: /* time */
2750 case 16: /* lchown[16] */
2751 case 23: /* setuid[16] */
2752 case 24: /* getuid[16] */
2753 case 25: /* stime */
2754 case 46: /* setgid[16] */
2755 case 47: /* getgid[16] */
2756 case 49: /* seteuid[16] */
2757 case 50: /* getegid[16] */
2758 case 70: /* setreuid[16] */
2759 case 71: /* setregid[16] */
2760 case 76: /* [old_]getrlimit */
2761 case 80: /* getgroups[16] */
2762 case 81: /* setgroups[16] */
2763 case 95: /* fchown[16] */
2764 case 101: /* ioperm */
2765 case 138: /* setfsuid[16] */
2766 case 139: /* setfsgid[16] */
2767 case 140: /* _llseek */
2768 case 164: /* setresuid[16] */
2769 case 165: /* getresuid[16] */
2770 case 170: /* setresgid[16] */
2771 case 171: /* getresgid[16] */
2772 case 182: /* chown[16] */
2773 case 192: /* mmap2 */
2774 case 193: /* truncate64 */
2775 case 194: /* ftruncate64 */
2776 case 195: /* stat64 */
2777 case 196: /* lstat64 */
2778 case 197: /* fstat64 */
2779 case 221: /* fcntl64 */
2780 if (abi == ABI_LINUX_S390)
4d193179 2781 return (enum gdb_syscall) syscall;
566c56c9
MK
2782 return gdb_sys_no_syscall;
2783 /* These syscalls don't exist on s390. */
2784 case 17: /* break */
2785 case 18: /* oldstat */
2786 case 28: /* oldfstat */
2787 case 31: /* stty */
2788 case 32: /* gtty */
2789 case 35: /* ftime */
2790 case 44: /* prof */
2791 case 53: /* lock */
2792 case 56: /* mpx */
2793 case 58: /* ulimit */
2794 case 59: /* oldolduname */
2795 case 68: /* sgetmask */
2796 case 69: /* ssetmask */
2797 case 82: /* [old_]select */
2798 case 84: /* oldlstat */
2799 case 98: /* profil */
2800 case 109: /* olduname */
2801 case 113: /* vm86old */
2802 case 123: /* modify_ldt */
2803 case 166: /* vm86 */
2804 return gdb_sys_no_syscall;
2805 case 110:
2806 return gdb_sys_lookup_dcookie;
2807 /* Here come the differences. */
2808 case 222:
2809 return gdb_sys_readahead;
2810 case 223:
2811 if (abi == ABI_LINUX_S390)
2812 return gdb_sys_sendfile64;
2813 return gdb_sys_no_syscall;
2814 /* 224-235 handled below */
2815 case 236:
2816 return gdb_sys_gettid;
2817 case 237:
2818 return gdb_sys_tkill;
2819 case 238:
2820 return gdb_sys_futex;
2821 case 239:
2822 return gdb_sys_sched_setaffinity;
2823 case 240:
2824 return gdb_sys_sched_getaffinity;
2825 case 241:
2826 return gdb_sys_tgkill;
2827 /* 242 reserved */
2828 case 243:
2829 return gdb_sys_io_setup;
2830 case 244:
2831 return gdb_sys_io_destroy;
2832 case 245:
2833 return gdb_sys_io_getevents;
2834 case 246:
2835 return gdb_sys_io_submit;
2836 case 247:
2837 return gdb_sys_io_cancel;
2838 case 248:
2839 return gdb_sys_exit_group;
2840 case 249:
2841 return gdb_sys_epoll_create;
2842 case 250:
2843 return gdb_sys_epoll_ctl;
2844 case 251:
2845 return gdb_sys_epoll_wait;
2846 case 252:
2847 return gdb_sys_set_tid_address;
2848 case 253:
2849 return gdb_sys_fadvise64;
2850 /* 254-262 handled below */
2851 /* 263 reserved */
2852 case 264:
2853 if (abi == ABI_LINUX_S390)
2854 return gdb_sys_fadvise64_64;
2855 return gdb_sys_no_syscall;
2856 case 265:
2857 return gdb_sys_statfs64;
2858 case 266:
2859 return gdb_sys_fstatfs64;
2860 case 267:
2861 return gdb_sys_remap_file_pages;
2862 /* 268-270 reserved */
2863 /* 271-277 handled below */
2864 case 278:
2865 return gdb_sys_add_key;
2866 case 279:
2867 return gdb_sys_request_key;
2868 case 280:
2869 return gdb_sys_keyctl;
2870 case 281:
2871 return gdb_sys_waitid;
2872 /* 282-312 handled below */
2873 case 293:
2874 if (abi == ABI_LINUX_S390)
2875 return gdb_sys_fstatat64;
2876 return gdb_sys_newfstatat;
2877 /* 313+ not yet supported */
2878 default:
4d193179
SM
2879 {
2880 int ret;
2881
2882 /* Most "old" syscalls copied from i386. */
2883 if (syscall <= 221)
2884 ret = syscall;
2885 /* xattr syscalls. */
2886 else if (syscall >= 224 && syscall <= 235)
2887 ret = syscall + 2;
2888 /* timer syscalls. */
2889 else if (syscall >= 254 && syscall <= 262)
2890 ret = syscall + 5;
2891 /* mq_* and kexec_load */
2892 else if (syscall >= 271 && syscall <= 277)
2893 ret = syscall + 6;
2894 /* ioprio_set .. epoll_pwait */
2895 else if (syscall >= 282 && syscall <= 312)
2896 ret = syscall + 7;
2897 else
2898 ret = gdb_sys_no_syscall;
2899
2900 return (enum gdb_syscall) ret;
2901 }
566c56c9
MK
2902 }
2903}
2904
2905static int
2906s390_linux_syscall_record (struct regcache *regcache, LONGEST syscall_native)
2907{
ac7936df 2908 struct gdbarch *gdbarch = regcache->arch ();
566c56c9
MK
2909 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2910 int ret;
2911 enum gdb_syscall syscall_gdb;
2912
2913 /* On s390, syscall number can be passed either as immediate field of svc
2914 instruction, or in %r1 (with svc 0). */
2915 if (syscall_native == 0)
2916 regcache_raw_read_signed (regcache, S390_R1_REGNUM, &syscall_native);
2917
2918 syscall_gdb = s390_canonicalize_syscall (syscall_native, tdep->abi);
2919
2920 if (syscall_gdb < 0)
2921 {
2922 printf_unfiltered (_("Process record and replay target doesn't "
2923 "support syscall number %s\n"),
2924 plongest (syscall_native));
2925 return -1;
2926 }
2927
2928 if (syscall_gdb == gdb_sys_sigreturn
2929 || syscall_gdb == gdb_sys_rt_sigreturn)
2930 {
2931 if (s390_all_but_pc_registers_record (regcache))
2932 return -1;
2933 return 0;
2934 }
2935
2936 if (tdep->abi == ABI_LINUX_ZSERIES)
2937 ret = record_linux_system_call (syscall_gdb, regcache,
2938 &s390x_linux_record_tdep);
2939 else
2940 ret = record_linux_system_call (syscall_gdb, regcache,
2941 &s390_linux_record_tdep);
2942
2943 if (ret)
2944 return ret;
2945
2946 /* Record the return value of the system call. */
2947 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
2948 return -1;
2949
2950 return 0;
2951}
2952
2953static int
2954s390_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache,
2955 enum gdb_signal signal)
2956{
2957 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2958 /* There are two kinds of signal frames on s390. rt_sigframe is always
2959 the larger one, so don't even bother with sigframe. */
2960 const int sizeof_rt_sigframe = (tdep->abi == ABI_LINUX_ZSERIES ?
2961 160 + 8 + 128 + 1024 : 96 + 8 + 128 + 1000);
2962 ULONGEST sp;
2963 int i;
2964
2965 for (i = 0; i < 16; i++)
2966 {
2967 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2968 return -1;
2969 if (tdep->gpr_full_regnum != -1)
2970 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2971 return -1;
2972 }
2973 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
2974 return -1;
2975 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
2976 return -1;
2977
2978 /* Record the change in the stack.
2979 frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */
2980 regcache_raw_read_unsigned (regcache, S390_SP_REGNUM, &sp);
2981 sp -= sizeof_rt_sigframe;
2982
2983 if (record_full_arch_list_add_mem (sp, sizeof_rt_sigframe))
2984 return -1;
2985
2986 if (record_full_arch_list_add_end ())
2987 return -1;
2988
2989 return 0;
2990}
4c8287ac 2991
a8c99f38
JB
2992/* Frame base handling. */
2993
2994static CORE_ADDR
f089c433 2995s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2996{
a8c99f38 2997 struct s390_unwind_cache *info
f089c433 2998 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2999 return info->frame_base;
3000}
3001
3002static CORE_ADDR
f089c433 3003s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
3004{
3005 struct s390_unwind_cache *info
f089c433 3006 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
3007 return info->local_base;
3008}
3009
3010static const struct frame_base s390_frame_base = {
3011 &s390_frame_unwind,
3012 s390_frame_base_address,
3013 s390_local_base_address,
3014 s390_local_base_address
3015};
3016
3017static CORE_ADDR
3018s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
3019{
7803799a 3020 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 3021 ULONGEST pc;
7803799a 3022 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
3023 return gdbarch_addr_bits_remove (gdbarch, pc);
3024}
3025
3026static CORE_ADDR
3027s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
3028{
3029 ULONGEST sp;
3030 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
3031 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
3032}
3033
3034
a431654a
AC
3035/* DWARF-2 frame support. */
3036
7803799a
UW
3037static struct value *
3038s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
3039 int regnum)
3040{
d6db1fab 3041 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
3042}
3043
a431654a
AC
3044static void
3045s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 3046 struct dwarf2_frame_state_reg *reg,
4a4e5149 3047 struct frame_info *this_frame)
a431654a 3048{
d6db1fab
UW
3049 /* The condition code (and thus PSW mask) is call-clobbered. */
3050 if (regnum == S390_PSWM_REGNUM)
3051 reg->how = DWARF2_FRAME_REG_UNDEFINED;
3052
3053 /* The PSW address unwinds to the return address. */
3054 else if (regnum == S390_PSWA_REGNUM)
3055 reg->how = DWARF2_FRAME_REG_RA;
3056
7803799a
UW
3057 /* Fixed registers are call-saved or call-clobbered
3058 depending on the ABI in use. */
d6db1fab 3059 else if (regnum < S390_NUM_REGS)
a431654a 3060 {
7803799a 3061 if (s390_register_call_saved (gdbarch, regnum))
a431654a 3062 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 3063 else
a431654a 3064 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 3065 }
a431654a 3066
d6db1fab
UW
3067 /* We install a special function to unwind pseudos. */
3068 else
7803799a
UW
3069 {
3070 reg->how = DWARF2_FRAME_REG_FN;
3071 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
3072 }
3073}
3074
3075
b0cf273e
JB
3076/* Dummy function calls. */
3077
80f75320
AA
3078/* Unwrap any single-field structs in TYPE and return the effective
3079 "inner" type. E.g., yield "float" for all these cases:
20a940cc 3080
80f75320
AA
3081 float x;
3082 struct { float x };
3083 struct { struct { float x; } x; };
417c80f9
AA
3084 struct { struct { struct { float x; } x; } x; };
3085
3086 However, if an inner type is smaller than MIN_SIZE, abort the
3087 unwrapping. */
20a940cc 3088
80f75320 3089static struct type *
417c80f9 3090s390_effective_inner_type (struct type *type, unsigned int min_size)
20a940cc 3091{
80f75320
AA
3092 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
3093 && TYPE_NFIELDS (type) == 1)
417c80f9
AA
3094 {
3095 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
3096
3097 if (TYPE_LENGTH (inner) < min_size)
3098 break;
3099 type = inner;
3100 }
3101
80f75320 3102 return type;
20a940cc
JB
3103}
3104
80f75320
AA
3105/* Return non-zero if TYPE should be passed like "float" or
3106 "double". */
20a940cc 3107
20a940cc 3108static int
80f75320 3109s390_function_arg_float (struct type *type)
20a940cc 3110{
80f75320
AA
3111 /* Note that long double as well as complex types are intentionally
3112 excluded. */
3113 if (TYPE_LENGTH (type) > 8)
3114 return 0;
20a940cc 3115
80f75320
AA
3116 /* A struct containing just a float or double is passed like a float
3117 or double. */
417c80f9 3118 type = s390_effective_inner_type (type, 0);
20a940cc 3119
20a940cc 3120 return (TYPE_CODE (type) == TYPE_CODE_FLT
80f75320 3121 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
20a940cc
JB
3122}
3123
417c80f9
AA
3124/* Return non-zero if TYPE should be passed like a vector. */
3125
3126static int
3127s390_function_arg_vector (struct type *type)
3128{
3129 if (TYPE_LENGTH (type) > 16)
3130 return 0;
3131
3132 /* Structs containing just a vector are passed like a vector. */
3133 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
3134
3135 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
3136}
3137
6dbc9c04 3138/* Determine whether N is a power of two. */
20a940cc 3139
78f8b424 3140static int
b0cf273e 3141is_power_of_two (unsigned int n)
78f8b424 3142{
6dbc9c04 3143 return n && ((n & (n - 1)) == 0);
78f8b424
JB
3144}
3145
80f75320 3146/* For an argument whose type is TYPE and which is not passed like a
417c80f9
AA
3147 float or vector, return non-zero if it should be passed like "int"
3148 or "long long". */
4d819d0e 3149
78f8b424 3150static int
b0cf273e 3151s390_function_arg_integer (struct type *type)
78f8b424 3152{
80f75320
AA
3153 enum type_code code = TYPE_CODE (type);
3154
354ecfd5 3155 if (TYPE_LENGTH (type) > 8)
b0cf273e 3156 return 0;
78f8b424 3157
80f75320
AA
3158 if (code == TYPE_CODE_INT
3159 || code == TYPE_CODE_ENUM
3160 || code == TYPE_CODE_RANGE
3161 || code == TYPE_CODE_CHAR
3162 || code == TYPE_CODE_BOOL
3163 || code == TYPE_CODE_PTR
aa006118 3164 || TYPE_IS_REFERENCE (type))
80f75320
AA
3165 return 1;
3166
3167 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
3168 && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
3169}
3170
80f75320
AA
3171/* Argument passing state: Internal data structure passed to helper
3172 routines of s390_push_dummy_call. */
78f8b424 3173
80f75320
AA
3174struct s390_arg_state
3175 {
3176 /* Register cache, or NULL, if we are in "preparation mode". */
3177 struct regcache *regcache;
417c80f9
AA
3178 /* Next available general/floating-point/vector register for
3179 argument passing. */
3180 int gr, fr, vr;
80f75320
AA
3181 /* Current pointer to copy area (grows downwards). */
3182 CORE_ADDR copy;
3183 /* Current pointer to parameter area (grows upwards). */
3184 CORE_ADDR argp;
3185 };
78f8b424 3186
80f75320
AA
3187/* Prepare one argument ARG for a dummy call and update the argument
3188 passing state AS accordingly. If the regcache field in AS is set,
3189 operate in "write mode" and write ARG into the inferior. Otherwise
3190 run "preparation mode" and skip all updates to the inferior. */
78f8b424 3191
80f75320
AA
3192static void
3193s390_handle_arg (struct s390_arg_state *as, struct value *arg,
3194 struct gdbarch_tdep *tdep, int word_size,
417c80f9 3195 enum bfd_endian byte_order, int is_unnamed)
78f8b424 3196{
80f75320
AA
3197 struct type *type = check_typedef (value_type (arg));
3198 unsigned int length = TYPE_LENGTH (type);
3199 int write_mode = as->regcache != NULL;
78f8b424 3200
80f75320
AA
3201 if (s390_function_arg_float (type))
3202 {
3203 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
3204 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
3205 6. */
3206 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
3207 {
3208 /* When we store a single-precision value in an FP register,
3209 it occupies the leftmost bits. */
3210 if (write_mode)
3211 regcache_cooked_write_part (as->regcache,
3212 S390_F0_REGNUM + as->fr,
3213 0, length,
3214 value_contents (arg));
3215 as->fr += 2;
3216 }
3217 else
3218 {
3219 /* When we store a single-precision value in a stack slot,
3220 it occupies the rightmost bits. */
3221 as->argp = align_up (as->argp + length, word_size);
3222 if (write_mode)
3223 write_memory (as->argp - length, value_contents (arg),
3224 length);
3225 }
3226 }
417c80f9
AA
3227 else if (tdep->vector_abi == S390_VECTOR_ABI_128
3228 && s390_function_arg_vector (type))
3229 {
3230 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
3231
3232 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
3233 {
3234 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
3235
3236 if (write_mode)
3237 regcache_cooked_write_part (as->regcache, regnum,
3238 0, length,
3239 value_contents (arg));
3240 as->vr++;
3241 }
3242 else
3243 {
3244 if (write_mode)
3245 write_memory (as->argp, value_contents (arg), length);
3246 as->argp = align_up (as->argp + length, word_size);
3247 }
3248 }
80f75320 3249 else if (s390_function_arg_integer (type) && length <= word_size)
78f8b424 3250 {
decf8d9a
JK
3251 /* Initialize it just to avoid a GCC false warning. */
3252 ULONGEST val = 0;
78f8b424 3253
80f75320 3254 if (write_mode)
34201ae3 3255 {
80f75320
AA
3256 /* Place value in least significant bits of the register or
3257 memory word and sign- or zero-extend to full word size.
3258 This also applies to a struct or union. */
3259 val = TYPE_UNSIGNED (type)
3260 ? extract_unsigned_integer (value_contents (arg),
3261 length, byte_order)
3262 : extract_signed_integer (value_contents (arg),
3263 length, byte_order);
3264 }
78f8b424 3265
80f75320
AA
3266 if (as->gr <= 6)
3267 {
3268 if (write_mode)
3269 regcache_cooked_write_unsigned (as->regcache,
3270 S390_R0_REGNUM + as->gr,
3271 val);
3272 as->gr++;
3273 }
3274 else
3275 {
3276 if (write_mode)
3277 write_memory_unsigned_integer (as->argp, word_size,
3278 byte_order, val);
3279 as->argp += word_size;
34201ae3 3280 }
78f8b424 3281 }
80f75320
AA
3282 else if (s390_function_arg_integer (type) && length == 8)
3283 {
3284 if (as->gr <= 5)
3285 {
3286 if (write_mode)
3287 {
3288 regcache_cooked_write (as->regcache,
3289 S390_R0_REGNUM + as->gr,
3290 value_contents (arg));
3291 regcache_cooked_write (as->regcache,
3292 S390_R0_REGNUM + as->gr + 1,
3293 value_contents (arg) + word_size);
3294 }
3295 as->gr += 2;
3296 }
3297 else
3298 {
3299 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
3300 in it, then don't go back and use it again later. */
3301 as->gr = 7;
78f8b424 3302
80f75320
AA
3303 if (write_mode)
3304 write_memory (as->argp, value_contents (arg), length);
3305 as->argp += length;
3306 }
3307 }
3308 else
3309 {
3310 /* This argument type is never passed in registers. Place the
3311 value in the copy area and pass a pointer to it. Use 8-byte
3312 alignment as a conservative assumption. */
3313 as->copy = align_down (as->copy - length, 8);
3314 if (write_mode)
3315 write_memory (as->copy, value_contents (arg), length);
3316
3317 if (as->gr <= 6)
3318 {
3319 if (write_mode)
3320 regcache_cooked_write_unsigned (as->regcache,
3321 S390_R0_REGNUM + as->gr,
3322 as->copy);
3323 as->gr++;
3324 }
3325 else
3326 {
3327 if (write_mode)
3328 write_memory_unsigned_integer (as->argp, word_size,
3329 byte_order, as->copy);
3330 as->argp += word_size;
3331 }
3332 }
78f8b424
JB
3333}
3334
78f8b424 3335/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
3336 place to be passed to a function, as specified by the "GNU/Linux
3337 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
3338
3339 SP is the current stack pointer. We must put arguments, links,
3340 padding, etc. whereever they belong, and return the new stack
3341 pointer value.
34201ae3 3342
78f8b424
JB
3343 If STRUCT_RETURN is non-zero, then the function we're calling is
3344 going to return a structure by value; STRUCT_ADDR is the address of
3345 a block we've allocated for it on the stack.
3346
3347 Our caller has taken care of any type promotions needed to satisfy
3348 prototypes or the old K&R argument-passing rules. */
80f75320 3349
a78f21af 3350static CORE_ADDR
7d9b040b 3351s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
3352 struct regcache *regcache, CORE_ADDR bp_addr,
3353 int nargs, struct value **args, CORE_ADDR sp,
3354 int struct_return, CORE_ADDR struct_addr)
5769d3cd 3355{
b0cf273e
JB
3356 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3357 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 3358 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 3359 int i;
80f75320
AA
3360 struct s390_arg_state arg_state, arg_prep;
3361 CORE_ADDR param_area_start, new_sp;
417c80f9
AA
3362 struct type *ftype = check_typedef (value_type (function));
3363
3364 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
3365 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
5769d3cd 3366
80f75320
AA
3367 arg_prep.copy = sp;
3368 arg_prep.gr = struct_return ? 3 : 2;
3369 arg_prep.fr = 0;
417c80f9 3370 arg_prep.vr = 0;
80f75320
AA
3371 arg_prep.argp = 0;
3372 arg_prep.regcache = NULL;
5769d3cd 3373
80f75320
AA
3374 /* Initialize arg_state for "preparation mode". */
3375 arg_state = arg_prep;
5769d3cd 3376
80f75320
AA
3377 /* Update arg_state.copy with the start of the reference-to-copy area
3378 and arg_state.argp with the size of the parameter area. */
3379 for (i = 0; i < nargs; i++)
417c80f9
AA
3380 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3381 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3382
80f75320 3383 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
78f8b424 3384
c0cc4c83 3385 /* Allocate the standard frame areas: the register save area, the
80f75320
AA
3386 word reserved for the compiler, and the back chain pointer. */
3387 new_sp = param_area_start - (16 * word_size + 32);
3388
3389 /* Now we have the final stack pointer. Make sure we didn't
3390 underflow; on 31-bit, this would result in addresses with the
3391 high bit set, which causes confusion elsewhere. Note that if we
3392 error out here, stack and registers remain untouched. */
3393 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
c0cc4c83
UW
3394 error (_("Stack overflow"));
3395
80f75320
AA
3396 /* Pass the structure return address in general register 2. */
3397 if (struct_return)
3398 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
c0cc4c83 3399
80f75320
AA
3400 /* Initialize arg_state for "write mode". */
3401 arg_state = arg_prep;
3402 arg_state.argp = param_area_start;
3403 arg_state.regcache = regcache;
78f8b424 3404
80f75320
AA
3405 /* Write all parameters. */
3406 for (i = 0; i < nargs; i++)
417c80f9
AA
3407 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
3408 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
78f8b424 3409
8de7d199
UW
3410 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
3411 if (word_size == 4)
3412 {
3413 ULONGEST pswa;
3414 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3415 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
3416 }
b0cf273e 3417 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 3418
b0cf273e 3419 /* Store updated stack pointer. */
80f75320 3420 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
78f8b424 3421
a8c99f38 3422 /* We need to return the 'stack part' of the frame ID,
121d8485 3423 which is actually the top of the register save area. */
80f75320 3424 return param_area_start;
5769d3cd
AC
3425}
3426
f089c433 3427/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
3428 dummy frame. The frame ID's base needs to match the TOS value
3429 returned by push_dummy_call, and the PC match the dummy frame's
3430 breakpoint. */
3431static struct frame_id
f089c433 3432s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 3433{
a8c99f38 3434 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
3435 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
3436 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 3437
121d8485 3438 return frame_id_build (sp + 16*word_size + 32,
34201ae3 3439 get_frame_pc (this_frame));
b0cf273e 3440}
c8f9d51c 3441
4074e13c
JB
3442static CORE_ADDR
3443s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
3444{
3445 /* Both the 32- and 64-bit ABI's say that the stack pointer should
3446 always be aligned on an eight-byte boundary. */
3447 return (addr & -8);
3448}
3449
3450
4e65a17e
AA
3451/* Helper for s390_return_value: Set or retrieve a function return
3452 value if it resides in a register. */
b0cf273e 3453
4e65a17e
AA
3454static void
3455s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
3456 struct regcache *regcache,
3457 gdb_byte *out, const gdb_byte *in)
c8f9d51c 3458{
4e65a17e
AA
3459 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3460 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
3461 int length = TYPE_LENGTH (type);
3462 int code = TYPE_CODE (type);
b0cf273e 3463
4e65a17e 3464 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
b0cf273e 3465 {
4e65a17e
AA
3466 /* Float-like value: left-aligned in f0. */
3467 if (in != NULL)
3468 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
3469 0, length, in);
3470 else
3471 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
3472 0, length, out);
3473 }
417c80f9
AA
3474 else if (code == TYPE_CODE_ARRAY)
3475 {
3476 /* Vector: left-aligned in v24. */
3477 if (in != NULL)
3478 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
3479 0, length, in);
3480 else
3481 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
3482 0, length, out);
3483 }
4e65a17e
AA
3484 else if (length <= word_size)
3485 {
3486 /* Integer: zero- or sign-extended in r2. */
3487 if (out != NULL)
3488 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
3489 word_size - length, length, out);
3490 else if (TYPE_UNSIGNED (type))
3491 regcache_cooked_write_unsigned
3492 (regcache, S390_R2_REGNUM,
3493 extract_unsigned_integer (in, length, byte_order));
3494 else
3495 regcache_cooked_write_signed
3496 (regcache, S390_R2_REGNUM,
3497 extract_signed_integer (in, length, byte_order));
b0cf273e 3498 }
4e65a17e
AA
3499 else if (length == 2 * word_size)
3500 {
3501 /* Double word: in r2 and r3. */
3502 if (in != NULL)
3503 {
3504 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
3505 regcache_cooked_write (regcache, S390_R3_REGNUM,
3506 in + word_size);
3507 }
3508 else
3509 {
3510 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
3511 regcache_cooked_read (regcache, S390_R3_REGNUM,
3512 out + word_size);
3513 }
3514 }
3515 else
3516 internal_error (__FILE__, __LINE__, _("invalid return type"));
c8f9d51c
JB
3517}
3518
4e65a17e
AA
3519
3520/* Implement the 'return_value' gdbarch method. */
3521
b0cf273e 3522static enum return_value_convention
6a3a010b 3523s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
3524 struct type *type, struct regcache *regcache,
3525 gdb_byte *out, const gdb_byte *in)
5769d3cd 3526{
56b9d9ac 3527 enum return_value_convention rvc;
56b9d9ac
UW
3528
3529 type = check_typedef (type);
56b9d9ac 3530
4e65a17e 3531 switch (TYPE_CODE (type))
b0cf273e 3532 {
4e65a17e
AA
3533 case TYPE_CODE_STRUCT:
3534 case TYPE_CODE_UNION:
4e65a17e
AA
3535 case TYPE_CODE_COMPLEX:
3536 rvc = RETURN_VALUE_STRUCT_CONVENTION;
3537 break;
417c80f9
AA
3538 case TYPE_CODE_ARRAY:
3539 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
3540 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
3541 ? RETURN_VALUE_REGISTER_CONVENTION
3542 : RETURN_VALUE_STRUCT_CONVENTION;
3543 break;
4e65a17e
AA
3544 default:
3545 rvc = TYPE_LENGTH (type) <= 8
3546 ? RETURN_VALUE_REGISTER_CONVENTION
3547 : RETURN_VALUE_STRUCT_CONVENTION;
b0cf273e 3548 }
5769d3cd 3549
4e65a17e
AA
3550 if (in != NULL || out != NULL)
3551 {
3552 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
3553 s390_register_return_value (gdbarch, type, regcache, out, in);
3554 else if (in != NULL)
3555 error (_("Cannot set function return value."));
3556 else
3557 error (_("Function return value unknown."));
b0cf273e
JB
3558 }
3559
3560 return rvc;
3561}
5769d3cd
AC
3562
3563
a8c99f38 3564/* Breakpoints. */
04180708 3565constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
a8c99f38 3566
04180708 3567typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
5769d3cd 3568
a8c99f38 3569/* Address handling. */
5769d3cd
AC
3570
3571static CORE_ADDR
24568a2c 3572s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 3573{
a8c99f38 3574 return addr & 0x7fffffff;
5769d3cd
AC
3575}
3576
ffc65945
KB
3577static int
3578s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
3579{
3580 if (byte_size == 4)
119ac181 3581 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3582 else
3583 return 0;
3584}
3585
3586static const char *
3587s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
3588{
119ac181 3589 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
3590 return "mode32";
3591 else
3592 return NULL;
3593}
3594
a78f21af 3595static int
c378eb4e
MS
3596s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
3597 const char *name,
ffc65945
KB
3598 int *type_flags_ptr)
3599{
3600 if (strcmp (name, "mode32") == 0)
3601 {
119ac181 3602 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3603 return 1;
3604 }
3605 else
3606 return 0;
3607}
3608
60abeae4
AA
3609/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
3610 "-mcmodel=large". */
a2658feb
JK
3611
3612static char *
3613s390_gcc_target_options (struct gdbarch *gdbarch)
3614{
60abeae4
AA
3615 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
3616}
3617
3618/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
3619 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
3620 always "s390". Note that an s390x compiler supports "-m31" as
3621 well. */
3622
3623static const char *
3624s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
3625{
3626 return "s390x?";
a2658feb
JK
3627}
3628
55aa24fb
SDJ
3629/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3630 gdbarch.h. */
3631
3632static int
3633s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3634{
3635 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3636 or indirection. */
3637 || *s == '%' /* Register access. */
3638 || isdigit (*s)); /* Literal number. */
3639}
3640
566c56c9
MK
3641/* Process record and replay helpers. */
3642
3643/* Takes the intermediate sum of address calculations and masks off upper
3644 bits according to current addressing mode. */
3645
3646static CORE_ADDR
3647s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
3648 CORE_ADDR val) {
3649 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3650 ULONGEST pswm, pswa;
3651 int am;
3652 if (tdep->abi == ABI_LINUX_S390)
3653 {
3654 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
3655 am = pswa >> 31 & 1;
3656 }
3657 else
3658 {
3659 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
3660 am = pswm >> 31 & 3;
3661 }
3662 switch (am)
3663 {
3664 case 0:
3665 return val & 0xffffff;
3666 case 1:
3667 return val & 0x7fffffff;
3668 case 3:
3669 return val;
3670 default:
3671 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
3672 return 0;
3673 }
3674}
3675
3676/* Calculates memory address using pre-calculated index, raw instruction word
3677 with b and d/dl fields, and raw instruction byte with dh field. Index and
3678 dh should be set to 0 if unused. */
3679
3680static CORE_ADDR
3681s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
3682 ULONGEST x, uint16_t bd, int8_t dh)
3683{
3684 uint8_t rb = bd >> 12 & 0xf;
3685 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
3686 ULONGEST b;
3687 CORE_ADDR res = d + x;
3688 if (rb)
3689 {
3690 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
3691 res += b;
3692 }
3693 return s390_record_address_mask (gdbarch, regcache, res);
3694}
3695
3696/* Calculates memory address using raw x, b + d/dl, dh fields from
3697 instruction. rx and dh should be set to 0 if unused. */
3698
3699static CORE_ADDR
3700s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
3701 uint8_t rx, uint16_t bd, int8_t dh)
3702{
3703 ULONGEST x = 0;
3704 if (rx)
3705 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
3706 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3707}
3708
3709/* Calculates memory address for VSCE[GF] instructions. */
3710
3711static int
3712s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
3713 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
3714 int8_t dh, CORE_ADDR *res)
3715{
3716 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3717 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3718 ULONGEST x;
3719 gdb_byte buf[16];
3720 if (tdep->v0_full_regnum == -1 || el * es >= 16)
3721 return -1;
3722 if (vx < 16)
3723 regcache_cooked_read (regcache, tdep->v0_full_regnum + vx, buf);
3724 else
3725 regcache_raw_read (regcache, S390_V16_REGNUM + vx - 16, buf);
3726 x = extract_unsigned_integer (buf + el * es, es, byte_order);
3727 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
3728 return 0;
3729}
3730
3731/* Calculates memory address for instructions with relative long addressing. */
3732
3733static CORE_ADDR
3734s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
3735 CORE_ADDR addr, uint16_t i1, uint16_t i2)
3736{
3737 int32_t ri = i1 << 16 | i2;
3738 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
3739}
3740
3741/* Population count helper. */
3742
3743static int s390_popcnt (unsigned int x) {
3744 int res = 0;
3745 while (x)
3746 {
3747 if (x & 1)
3748 res++;
3749 x >>= 1;
3750 }
3751 return res;
3752}
3753
3754/* Record 64-bit register. */
3755
3756static int
3757s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3758{
3759 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3760 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3761 return -1;
3762 if (tdep->abi == ABI_LINUX_S390)
3763 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3764 return -1;
3765 return 0;
3766}
3767
3768/* Record high 32 bits of a register. */
3769
3770static int
3771s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3772{
3773 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
3774 if (tdep->abi == ABI_LINUX_S390)
3775 {
3776 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
3777 return -1;
3778 }
3779 else
3780 {
3781 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3782 return -1;
3783 }
3784 return 0;
3785}
3786
3787/* Record vector register. */
3788
3789static int
3790s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
3791{
566c56c9
MK
3792 if (i < 16)
3793 {
3794 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
3795 return -1;
3796 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
3797 return -1;
3798 }
3799 else
3800 {
3801 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
3802 return -1;
3803 }
3804 return 0;
3805}
3806
3807static int
3808s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
3809 CORE_ADDR addr)
3810{
566c56c9
MK
3811 uint16_t insn[3] = {0};
3812 /* Instruction as bytes. */
3813 uint8_t ibyte[6];
3814 /* Instruction as nibbles. */
3815 uint8_t inib[12];
3816 /* Instruction vector registers. */
3817 uint8_t ivec[4];
3818 CORE_ADDR oaddr, oaddr2, oaddr3;
3819 ULONGEST tmp;
3820 int i, n;
3821 /* if EX/EXRL instruction used, here's the reg parameter */
3822 int ex = -1;
3823 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
3824
3825 /* Attempting to use EX or EXRL jumps back here */
3826ex:
3827
3828 /* Read instruction. */
3829 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
3830 /* If execute was involved, do the adjustment. */
3831 if (ex != -1)
3832 insn[0] |= ex & 0xff;
3833 /* Two highest bits determine instruction size. */
3834 if (insn[0] >= 0x4000)
3835 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
3836 else
3837 /* Not necessary, but avoids uninitialized variable warnings. */
3838 insn[1] = 0;
3839 if (insn[0] >= 0xc000)
3840 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
3841 else
3842 insn[2] = 0;
3843 /* Split instruction into bytes and nibbles. */
3844 for (i = 0; i < 3; i++)
3845 {
3846 ibyte[i*2] = insn[i] >> 8 & 0xff;
3847 ibyte[i*2+1] = insn[i] & 0xff;
3848 }
3849 for (i = 0; i < 6; i++)
3850 {
3851 inib[i*2] = ibyte[i] >> 4 & 0xf;
3852 inib[i*2+1] = ibyte[i] & 0xf;
3853 }
3854 /* Compute vector registers, if applicable. */
3855 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
3856 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
3857 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
3858 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
3859
3860 switch (ibyte[0])
3861 {
3862 /* 0x00 undefined */
3863
3864 case 0x01:
3865 /* E-format instruction */
3866 switch (ibyte[1])
3867 {
3868 /* 0x00 undefined */
3869 /* 0x01 unsupported: PR - program return */
3870 /* 0x02 unsupported: UPT */
3871 /* 0x03 undefined */
3872 /* 0x04 privileged: PTFF - perform timing facility function */
3873 /* 0x05-0x06 undefined */
3874 /* 0x07 privileged: SCKPF - set clock programmable field */
3875 /* 0x08-0x09 undefined */
3876
3877 case 0x0a: /* PFPO - perform floating point operation */
3878 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3879 if (!(tmp & 0x80000000u))
3880 {
3881 uint8_t ofc = tmp >> 16 & 0xff;
3882 switch (ofc)
3883 {
3884 case 0x00: /* HFP32 */
3885 case 0x01: /* HFP64 */
3886 case 0x05: /* BFP32 */
3887 case 0x06: /* BFP64 */
3888 case 0x08: /* DFP32 */
3889 case 0x09: /* DFP64 */
3890 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3891 return -1;
3892 break;
3893 case 0x02: /* HFP128 */
3894 case 0x07: /* BFP128 */
3895 case 0x0a: /* DFP128 */
3896 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3897 return -1;
3898 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3899 return -1;
3900 break;
3901 default:
3902 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3903 ofc, paddress (gdbarch, addr));
3904 return -1;
3905 }
3906
3907 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3908 return -1;
3909 }
3910 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3911 return -1;
3912 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3913 return -1;
3914 break;
3915
3916 case 0x0b: /* TAM - test address mode */
3917 case 0x0c: /* SAM24 - set address mode 24 */
3918 case 0x0d: /* SAM31 - set address mode 31 */
3919 case 0x0e: /* SAM64 - set address mode 64 */
3920 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3921 return -1;
3922 break;
3923
3924 /* 0x0f-0xfe undefined */
3925
3926 /* 0xff unsupported: TRAP */
3927
3928 default:
3929 goto UNKNOWN_OP;
3930 }
3931 break;
3932
3933 /* 0x02 undefined */
3934 /* 0x03 undefined */
3935
3936 case 0x04: /* SPM - set program mask */
3937 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3938 return -1;
3939 break;
3940
3941 case 0x05: /* BALR - branch and link */
3942 case 0x45: /* BAL - branch and link */
3943 case 0x06: /* BCTR - branch on count */
3944 case 0x46: /* BCT - branch on count */
3945 case 0x0d: /* BASR - branch and save */
3946 case 0x4d: /* BAS - branch and save */
3947 case 0x84: /* BRXH - branch relative on index high */
3948 case 0x85: /* BRXLE - branch relative on index low or equal */
3949 case 0x86: /* BXH - branch on index high */
3950 case 0x87: /* BXLE - branch on index low or equal */
3951 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3952 use 32-bit destination as counter. */
3953 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3954 return -1;
3955 break;
3956
3957 case 0x07: /* BCR - branch on condition */
3958 case 0x47: /* BC - branch on condition */
3959 /* No effect other than PC transfer. */
3960 break;
3961
3962 /* 0x08 undefined */
3963 /* 0x09 undefined */
3964
3965 case 0x0a:
3966 /* SVC - supervisor call */
3967 if (s390_linux_syscall_record (regcache, ibyte[1]))
3968 return -1;
3969 break;
3970
3971 case 0x0b: /* BSM - branch and set mode */
3972 if (inib[2])
3973 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3974 return -1;
3975 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3976 return -1;
3977 break;
3978
3979 case 0x0c: /* BASSM - branch and save and set mode */
3980 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3981 return -1;
3982 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3983 return -1;
3984 break;
3985
3986 case 0x0e: /* MVCL - move long [interruptible] */
3987 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3988 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3989 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3990 tmp &= 0xffffff;
3991 if (record_full_arch_list_add_mem (oaddr, tmp))
3992 return -1;
3993 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3994 return -1;
3995 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3996 return -1;
3997 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3998 return -1;
3999 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4000 return -1;
4001 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4002 return -1;
4003 break;
4004
4005 case 0x0f: /* CLCL - compare logical long [interruptible] */
4006 case 0xa9: /* CLCLE - compare logical long extended [partial] */
4007 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4008 return -1;
4009 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4010 return -1;
4011 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4012 return -1;
4013 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4014 return -1;
4015 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4016 return -1;
4017 break;
4018
4019 case 0x10: /* LPR - load positive */
4020 case 0x11: /* LNR - load negative */
4021 case 0x12: /* LTR - load and test */
4022 case 0x13: /* LCR - load complement */
4023 case 0x14: /* NR - and */
4024 case 0x16: /* OR - or */
4025 case 0x17: /* XR - xor */
4026 case 0x1a: /* AR - add */
4027 case 0x1b: /* SR - subtract */
4028 case 0x1e: /* ALR - add logical */
4029 case 0x1f: /* SLR - subtract logical */
4030 case 0x54: /* N - and */
4031 case 0x56: /* O - or */
4032 case 0x57: /* X - xor */
4033 case 0x5a: /* A - add */
4034 case 0x5b: /* S - subtract */
4035 case 0x5e: /* AL - add logical */
4036 case 0x5f: /* SL - subtract logical */
4037 case 0x4a: /* AH - add halfword */
4038 case 0x4b: /* SH - subtract halfword */
4039 case 0x8a: /* SRA - shift right single */
4040 case 0x8b: /* SLA - shift left single */
4041 case 0xbf: /* ICM - insert characters under mask */
4042 /* 32-bit destination + flags */
4043 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4044 return -1;
4045 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4046 return -1;
4047 break;
4048
4049 case 0x15: /* CLR - compare logical */
4050 case 0x55: /* CL - compare logical */
4051 case 0x19: /* CR - compare */
4052 case 0x29: /* CDR - compare */
4053 case 0x39: /* CER - compare */
4054 case 0x49: /* CH - compare halfword */
4055 case 0x59: /* C - compare */
4056 case 0x69: /* CD - compare */
4057 case 0x79: /* CE - compare */
4058 case 0x91: /* TM - test under mask */
4059 case 0x95: /* CLI - compare logical */
4060 case 0xbd: /* CLM - compare logical under mask */
4061 case 0xd5: /* CLC - compare logical */
4062 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4063 return -1;
4064 break;
4065
4066 case 0x18: /* LR - load */
4067 case 0x48: /* LH - load halfword */
4068 case 0x58: /* L - load */
4069 case 0x41: /* LA - load address */
4070 case 0x43: /* IC - insert character */
4071 case 0x4c: /* MH - multiply halfword */
4072 case 0x71: /* MS - multiply single */
4073 case 0x88: /* SRL - shift right single logical */
4074 case 0x89: /* SLL - shift left single logical */
4075 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
4076 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4077 return -1;
4078 break;
4079
4080 case 0x1c: /* MR - multiply */
4081 case 0x5c: /* M - multiply */
4082 case 0x1d: /* DR - divide */
4083 case 0x5d: /* D - divide */
4084 case 0x8c: /* SRDL - shift right double logical */
4085 case 0x8d: /* SLDL - shift left double logical */
4086 /* 32-bit pair destination, no flags */
4087 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4088 return -1;
4089 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4090 return -1;
4091 break;
4092
4093 case 0x20: /* LPDR - load positive */
4094 case 0x30: /* LPER - load positive */
4095 case 0x21: /* LNDR - load negative */
4096 case 0x31: /* LNER - load negative */
4097 case 0x22: /* LTDR - load and test */
4098 case 0x32: /* LTER - load and test */
4099 case 0x23: /* LCDR - load complement */
4100 case 0x33: /* LCER - load complement */
4101 case 0x2a: /* ADR - add */
4102 case 0x3a: /* AER - add */
4103 case 0x6a: /* AD - add */
4104 case 0x7a: /* AE - add */
4105 case 0x2b: /* SDR - subtract */
4106 case 0x3b: /* SER - subtract */
4107 case 0x6b: /* SD - subtract */
4108 case 0x7b: /* SE - subtract */
4109 case 0x2e: /* AWR - add unnormalized */
4110 case 0x3e: /* AUR - add unnormalized */
4111 case 0x6e: /* AW - add unnormalized */
4112 case 0x7e: /* AU - add unnormalized */
4113 case 0x2f: /* SWR - subtract unnormalized */
4114 case 0x3f: /* SUR - subtract unnormalized */
4115 case 0x6f: /* SW - subtract unnormalized */
4116 case 0x7f: /* SU - subtract unnormalized */
4117 /* float destination + flags */
4118 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4119 return -1;
4120 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4121 return -1;
4122 break;
4123
4124 case 0x24: /* HDR - halve */
4125 case 0x34: /* HER - halve */
4126 case 0x25: /* LDXR - load rounded */
4127 case 0x35: /* LEDR - load rounded */
4128 case 0x28: /* LDR - load */
4129 case 0x38: /* LER - load */
4130 case 0x68: /* LD - load */
4131 case 0x78: /* LE - load */
4132 case 0x2c: /* MDR - multiply */
4133 case 0x3c: /* MDER - multiply */
4134 case 0x6c: /* MD - multiply */
4135 case 0x7c: /* MDE - multiply */
4136 case 0x2d: /* DDR - divide */
4137 case 0x3d: /* DER - divide */
4138 case 0x6d: /* DD - divide */
4139 case 0x7d: /* DE - divide */
4140 /* float destination, no flags */
4141 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4142 return -1;
4143 break;
4144
4145 case 0x26: /* MXR - multiply */
4146 case 0x27: /* MXDR - multiply */
4147 case 0x67: /* MXD - multiply */
4148 /* float pair destination, no flags */
4149 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4150 return -1;
4151 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4152 return -1;
4153 break;
4154
4155 case 0x36: /* AXR - add */
4156 case 0x37: /* SXR - subtract */
4157 /* float pair destination + flags */
4158 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
4159 return -1;
4160 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
4161 return -1;
4162 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4163 return -1;
4164 break;
4165
4166 case 0x40: /* STH - store halfword */
4167 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4168 if (record_full_arch_list_add_mem (oaddr, 2))
4169 return -1;
4170 break;
4171
4172 case 0x42: /* STC - store character */
4173 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4174 if (record_full_arch_list_add_mem (oaddr, 1))
4175 return -1;
4176 break;
4177
4178 case 0x44: /* EX - execute */
4179 if (ex != -1)
4180 {
4181 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4182 paddress (gdbarch, addr));
4183 return -1;
4184 }
4185 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4186 if (inib[2])
4187 {
4188 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4189 ex = tmp & 0xff;
4190 }
4191 else
4192 {
4193 ex = 0;
4194 }
4195 goto ex;
4196
4197 case 0x4e: /* CVD - convert to decimal */
4198 case 0x60: /* STD - store */
4199 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4200 if (record_full_arch_list_add_mem (oaddr, 8))
4201 return -1;
4202 break;
4203
4204 case 0x4f: /* CVB - convert to binary */
4205 /* 32-bit gpr destination + FPC (DXC write) */
4206 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4207 return -1;
4208 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4209 return -1;
4210 break;
4211
4212 case 0x50: /* ST - store */
4213 case 0x70: /* STE - store */
4214 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
4215 if (record_full_arch_list_add_mem (oaddr, 4))
4216 return -1;
4217 break;
4218
4219 case 0x51: /* LAE - load address extended */
4220 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4221 return -1;
4222 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
4223 return -1;
4224 break;
4225
4226 /* 0x52 undefined */
4227 /* 0x53 undefined */
4228
4229 /* 0x61-0x66 undefined */
4230
4231 /* 0x72-0x77 undefined */
4232
4233 /* 0x80 privileged: SSM - set system mask */
4234 /* 0x81 undefined */
4235 /* 0x82 privileged: LPSW - load PSW */
4236 /* 0x83 privileged: diagnose */
4237
4238 case 0x8e: /* SRDA - shift right double */
4239 case 0x8f: /* SLDA - shift left double */
4240 /* 32-bit pair destination + flags */
4241 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4242 return -1;
4243 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4244 return -1;
4245 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4246 return -1;
4247 break;
4248
4249 case 0x90: /* STM - store multiple */
4250 case 0x9b: /* STAM - store access multiple */
4251 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4252 if (inib[2] <= inib[3])
4253 n = inib[3] - inib[2] + 1;
4254 else
4255 n = inib[3] + 0x10 - inib[2] + 1;
4256 if (record_full_arch_list_add_mem (oaddr, n * 4))
4257 return -1;
4258 break;
4259
4260 case 0x92: /* MVI - move */
4261 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4262 if (record_full_arch_list_add_mem (oaddr, 1))
4263 return -1;
4264 break;
4265
4266 case 0x93: /* TS - test and set */
4267 case 0x94: /* NI - and */
4268 case 0x96: /* OI - or */
4269 case 0x97: /* XI - xor */
4270 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4271 if (record_full_arch_list_add_mem (oaddr, 1))
4272 return -1;
4273 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4274 return -1;
4275 break;
4276
4277 case 0x98: /* LM - load multiple */
4278 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4279 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
4280 return -1;
4281 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4282 return -1;
4283 break;
4284
4285 /* 0x99 privileged: TRACE */
4286
4287 case 0x9a: /* LAM - load access multiple */
4288 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
4289 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
4290 return -1;
4291 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
4292 return -1;
4293 break;
4294
4295 /* 0x9c-0x9f privileged and obsolete (old I/O) */
4296 /* 0xa0-0xa4 undefined */
4297
4298 case 0xa5:
4299 case 0xa7:
4300 /* RI-format instruction */
4301 switch (ibyte[0] << 4 | inib[3])
4302 {
4303 case 0xa50: /* IIHH - insert immediate */
4304 case 0xa51: /* IIHL - insert immediate */
4305 /* high 32-bit destination */
4306 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4307 return -1;
4308 break;
4309
4310 case 0xa52: /* IILH - insert immediate */
4311 case 0xa53: /* IILL - insert immediate */
4312 case 0xa75: /* BRAS - branch relative and save */
4313 case 0xa76: /* BRCT - branch relative on count */
4314 case 0xa78: /* LHI - load halfword immediate */
4315 case 0xa7c: /* MHI - multiply halfword immediate */
4316 /* 32-bit or native destination */
4317 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4318 return -1;
4319 break;
4320
4321 case 0xa54: /* NIHH - and immediate */
4322 case 0xa55: /* NIHL - and immediate */
4323 case 0xa58: /* OIHH - or immediate */
4324 case 0xa59: /* OIHL - or immediate */
4325 /* high 32-bit destination + flags */
4326 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4327 return -1;
4328 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4329 return -1;
4330 break;
4331
4332 case 0xa56: /* NILH - and immediate */
4333 case 0xa57: /* NILL - and immediate */
4334 case 0xa5a: /* OILH - or immediate */
4335 case 0xa5b: /* OILL - or immediate */
4336 case 0xa7a: /* AHI - add halfword immediate */
4337 /* 32-bit destination + flags */
4338 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4339 return -1;
4340 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4341 return -1;
4342 break;
4343
4344 case 0xa5c: /* LLIHH - load logical immediate */
4345 case 0xa5d: /* LLIHL - load logical immediate */
4346 case 0xa5e: /* LLILH - load logical immediate */
4347 case 0xa5f: /* LLILL - load logical immediate */
4348 case 0xa77: /* BRCTG - branch relative on count */
4349 case 0xa79: /* LGHI - load halfword immediate */
4350 case 0xa7d: /* MGHI - multiply halfword immediate */
4351 /* 64-bit destination */
4352 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4353 return -1;
4354 break;
4355
4356 case 0xa70: /* TMLH - test under mask */
4357 case 0xa71: /* TMLL - test under mask */
4358 case 0xa72: /* TMHH - test under mask */
4359 case 0xa73: /* TMHL - test under mask */
4360 case 0xa7e: /* CHI - compare halfword immediate */
4361 case 0xa7f: /* CGHI - compare halfword immediate */
4362 /* flags only */
4363 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4364 return -1;
4365 break;
4366
4367 case 0xa74: /* BRC - branch relative on condition */
4368 /* no register change */
4369 break;
4370
4371 case 0xa7b: /* AGHI - add halfword immediate */
4372 /* 64-bit destination + flags */
4373 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4374 return -1;
4375 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4376 return -1;
4377 break;
4378
4379 default:
4380 goto UNKNOWN_OP;
4381 }
4382 break;
4383
4384 /* 0xa6 undefined */
4385
4386 case 0xa8: /* MVCLE - move long extended [partial] */
4387 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4388 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4389 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
4390 if (record_full_arch_list_add_mem (oaddr, tmp))
4391 return -1;
4392 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4393 return -1;
4394 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4395 return -1;
4396 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
4397 return -1;
4398 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
4399 return -1;
4400 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4401 return -1;
4402 break;
4403
4404 /* 0xaa-0xab undefined */
4405 /* 0xac privileged: STNSM - store then and system mask */
4406 /* 0xad privileged: STOSM - store then or system mask */
4407 /* 0xae privileged: SIGP - signal processor */
4408 /* 0xaf unsupported: MC - monitor call */
4409 /* 0xb0 undefined */
4410 /* 0xb1 privileged: LRA - load real address */
4411
4412 case 0xb2:
4413 case 0xb3:
4414 case 0xb9:
4415 /* S/RRD/RRE/RRF/IE-format instruction */
4416 switch (insn[0])
4417 {
4418 /* 0xb200-0xb204 undefined or privileged */
4419
4420 case 0xb205: /* STCK - store clock */
4421 case 0xb27c: /* STCKF - store clock fast */
4422 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4423 if (record_full_arch_list_add_mem (oaddr, 8))
4424 return -1;
4425 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4426 return -1;
4427 break;
4428
4429 /* 0xb206-0xb219 undefined, privileged, or unsupported */
4430 /* 0xb21a unsupported: CFC */
4431 /* 0xb21b-0xb221 undefined or privileged */
4432
4433 case 0xb222: /* IPM - insert program mask */
4434 case 0xb24f: /* EAR - extract access */
4435 case 0xb252: /* MSR - multiply single */
4436 case 0xb2ec: /* ETND - extract transaction nesting depth */
4437 case 0xb38c: /* EFPC - extract fpc */
4438 case 0xb91f: /* LRVR - load reversed */
4439 case 0xb926: /* LBR - load byte */
4440 case 0xb927: /* LHR - load halfword */
4441 case 0xb994: /* LLCR - load logical character */
4442 case 0xb995: /* LLHR - load logical halfword */
4443 case 0xb9f2: /* LOCR - load on condition */
4444 /* 32-bit gpr destination */
4445 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4446 return -1;
4447 break;
4448
4449 /* 0xb223-0xb22c privileged or unsupported */
4450
4451 case 0xb22d: /* DXR - divide */
4452 case 0xb325: /* LXDR - load lengthened */
4453 case 0xb326: /* LXER - load lengthened */
4454 case 0xb336: /* SQXR - square root */
4455 case 0xb365: /* LXR - load */
4456 case 0xb367: /* FIXR - load fp integer */
4457 case 0xb376: /* LZXR - load zero */
4458 case 0xb3b6: /* CXFR - convert from fixed */
4459 case 0xb3c6: /* CXGR - convert from fixed */
4460 case 0xb3fe: /* IEXTR - insert biased exponent */
4461 /* float pair destination */
4462 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4463 return -1;
4464 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4465 return -1;
4466 break;
4467
4468 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
4469
4470 case 0xb241: /* CKSM - checksum [partial] */
4471 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4472 return -1;
4473 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4474 return -1;
4475 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4476 return -1;
4477 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4478 return -1;
4479 break;
4480
4481 /* 0xb242-0xb243 undefined */
4482
4483 case 0xb244: /* SQDR - square root */
4484 case 0xb245: /* SQER - square root */
4485 case 0xb324: /* LDER - load lengthened */
4486 case 0xb337: /* MEER - multiply */
4487 case 0xb366: /* LEXR - load rounded */
4488 case 0xb370: /* LPDFR - load positive */
4489 case 0xb371: /* LNDFR - load negative */
4490 case 0xb372: /* CSDFR - copy sign */
4491 case 0xb373: /* LCDFR - load complement */
4492 case 0xb374: /* LZER - load zero */
4493 case 0xb375: /* LZDR - load zero */
4494 case 0xb377: /* FIER - load fp integer */
4495 case 0xb37f: /* FIDR - load fp integer */
4496 case 0xb3b4: /* CEFR - convert from fixed */
4497 case 0xb3b5: /* CDFR - convert from fixed */
4498 case 0xb3c1: /* LDGR - load fpr from gr */
4499 case 0xb3c4: /* CEGR - convert from fixed */
4500 case 0xb3c5: /* CDGR - convert from fixed */
4501 case 0xb3f6: /* IEDTR - insert biased exponent */
4502 /* float destination */
4503 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4504 return -1;
4505 break;
4506
4507 /* 0xb246-0xb24c: privileged or unsupported */
4508
4509 case 0xb24d: /* CPYA - copy access */
4510 case 0xb24e: /* SAR - set access */
4511 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
4512 return -1;
4513 break;
4514
4515 /* 0xb250-0xb251 undefined or privileged */
4516 /* 0xb253-0xb254 undefined or privileged */
4517
4518 case 0xb255: /* MVST - move string [partial] */
4519 {
4520 uint8_t end;
4521 gdb_byte cur;
4522 ULONGEST num = 0;
4523 /* Read ending byte. */
4524 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4525 end = tmp & 0xff;
4526 /* Get address of second operand. */
4527 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
4528 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4529 /* Search for ending byte and compute length. */
4530 do {
4531 num++;
4532 if (target_read_memory (oaddr, &cur, 1))
4533 return -1;
4534 oaddr++;
4535 } while (cur != end);
4536 /* Get address of first operand and record it. */
4537 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4538 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4539 if (record_full_arch_list_add_mem (oaddr, num))
4540 return -1;
4541 /* Record the registers. */
4542 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4543 return -1;
4544 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4545 return -1;
4546 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4547 return -1;
4548 }
4549 break;
4550
4551 /* 0xb256 undefined */
4552
4553 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
4554 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4555 return -1;
4556 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4557 return -1;
4558 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4559 return -1;
4560 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4561 return -1;
4562 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4563 return -1;
4564 break;
4565
4566 /* 0xb258-0xb25c undefined, privileged, or unsupported */
4567
4568 case 0xb25d: /* CLST - compare logical string [partial] */
4569 case 0xb25e: /* SRST - search string [partial] */
4570 case 0xb9be: /* SRSTU - search string unicode [partial] */
4571 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4572 return -1;
4573 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4574 return -1;
4575 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4576 return -1;
4577 break;
4578
4579 /* 0xb25f-0xb262 undefined */
4580
4581 case 0xb263: /* CMPSC - compression call [interruptible] */
4582 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4583 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4584 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4585 if (record_full_arch_list_add_mem (oaddr, tmp))
4586 return -1;
4587 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4588 return -1;
4589 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4590 return -1;
4591 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4592 return -1;
4593 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4594 return -1;
4595 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
4596 return -1;
4597 /* DXC may be written */
4598 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4599 return -1;
4600 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4601 return -1;
4602 break;
4603
4604 /* 0xb264-0xb277 undefined, privileged, or unsupported */
4605
4606 case 0xb278: /* STCKE - store clock extended */
4607 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4608 if (record_full_arch_list_add_mem (oaddr, 16))
4609 return -1;
4610 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4611 return -1;
4612 break;
4613
4614 /* 0xb279-0xb27b undefined or unsupported */
4615 /* 0xb27d-0xb298 undefined or privileged */
4616
4617 case 0xb299: /* SRNM - set rounding mode */
4618 case 0xb2b8: /* SRNMB - set bfp rounding mode */
4619 case 0xb2b9: /* SRNMT - set dfp rounding mode */
4620 case 0xb29d: /* LFPC - load fpc */
4621 case 0xb2bd: /* LFAS - load fpc and signal */
4622 case 0xb384: /* SFPC - set fpc */
4623 case 0xb385: /* SFASR - set fpc and signal */
4624 case 0xb960: /* CGRT - compare and trap */
4625 case 0xb961: /* CLGRT - compare logical and trap */
4626 case 0xb972: /* CRT - compare and trap */
4627 case 0xb973: /* CLRT - compare logical and trap */
4628 /* fpc only - including possible DXC write for trapping insns */
4629 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4630 return -1;
4631 break;
4632
4633 /* 0xb29a-0xb29b undefined */
4634
4635 case 0xb29c: /* STFPC - store fpc */
4636 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4637 if (record_full_arch_list_add_mem (oaddr, 4))
4638 return -1;
4639 break;
4640
4641 /* 0xb29e-0xb2a4 undefined */
4642
4643 case 0xb2a5: /* TRE - translate extended [partial] */
4644 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4645 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4646 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4647 if (record_full_arch_list_add_mem (oaddr, tmp))
4648 return -1;
4649 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4650 return -1;
4651 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4652 return -1;
4653 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4654 return -1;
4655 break;
4656
4657 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
4658 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
4659 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
4660 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
4661 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
4662 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
4663 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4664 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4665 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4666 if (record_full_arch_list_add_mem (oaddr, tmp))
4667 return -1;
4668 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4669 return -1;
4670 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4671 return -1;
4672 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4673 return -1;
4674 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4675 return -1;
4676 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4677 return -1;
4678 break;
4679
4680 /* 0xb2a8-0xb2af undefined */
4681
4682 case 0xb2b0: /* STFLE - store facility list extended */
4683 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4684 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4685 tmp &= 0xff;
4686 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
4687 return -1;
4688 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
4689 return -1;
4690 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4691 return -1;
4692 break;
4693
4694 /* 0xb2b1-0xb2b7 undefined or privileged */
4695 /* 0xb2ba-0xb2bc undefined */
4696 /* 0xb2be-0xb2e7 undefined */
4697 /* 0xb2e9-0xb2eb undefined */
4698 /* 0xb2ed-0xb2f7 undefined */
4699 /* 0xb2f8 unsupported: TEND */
4700 /* 0xb2f9 undefined */
4701
4702 case 0xb2e8: /* PPA - perform processor assist */
4703 case 0xb2fa: /* NIAI - next instruction access intent */
4704 /* no visible effects */
4705 break;
4706
4707 /* 0xb2fb undefined */
4708 /* 0xb2fc unsupported: TABORT */
4709 /* 0xb2fd-0xb2fe undefined */
4710 /* 0xb2ff unsupported: TRAP */
4711
4712 case 0xb300: /* LPEBR - load positive */
4713 case 0xb301: /* LNEBR - load negative */
4714 case 0xb303: /* LCEBR - load complement */
4715 case 0xb310: /* LPDBR - load positive */
4716 case 0xb311: /* LNDBR - load negative */
4717 case 0xb313: /* LCDBR - load complement */
4718 case 0xb350: /* TBEDR - convert hfp to bfp */
4719 case 0xb351: /* TBDR - convert hfp to bfp */
4720 case 0xb358: /* THDER - convert bfp to hfp */
4721 case 0xb359: /* THDR - convert bfp to hfp */
4722 /* float destination + flags */
4723 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4724 return -1;
4725 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4726 return -1;
4727 break;
4728
4729 case 0xb304: /* LDEBR - load lengthened */
4730 case 0xb30c: /* MDEBR - multiply */
4731 case 0xb30d: /* DEBR - divide */
4732 case 0xb314: /* SQEBR - square root */
4733 case 0xb315: /* SQDBR - square root */
4734 case 0xb317: /* MEEBR - multiply */
4735 case 0xb31c: /* MDBR - multiply */
4736 case 0xb31d: /* DDBR - divide */
4737 case 0xb344: /* LEDBRA - load rounded */
4738 case 0xb345: /* LDXBRA - load rounded */
4739 case 0xb346: /* LEXBRA - load rounded */
4740 case 0xb357: /* FIEBRA - load fp integer */
4741 case 0xb35f: /* FIDBRA - load fp integer */
4742 case 0xb390: /* CELFBR - convert from logical */
4743 case 0xb391: /* CDLFBR - convert from logical */
4744 case 0xb394: /* CEFBR - convert from fixed */
4745 case 0xb395: /* CDFBR - convert from fixed */
4746 case 0xb3a0: /* CELGBR - convert from logical */
4747 case 0xb3a1: /* CDLGBR - convert from logical */
4748 case 0xb3a4: /* CEGBR - convert from fixed */
4749 case 0xb3a5: /* CDGBR - convert from fixed */
4750 case 0xb3d0: /* MDTR - multiply */
4751 case 0xb3d1: /* DDTR - divide */
4752 case 0xb3d4: /* LDETR - load lengthened */
4753 case 0xb3d5: /* LEDTR - load lengthened */
4754 case 0xb3d7: /* FIDTR - load fp integer */
4755 case 0xb3dd: /* LDXTR - load lengthened */
4756 case 0xb3f1: /* CDGTR - convert from fixed */
4757 case 0xb3f2: /* CDUTR - convert from unsigned packed */
4758 case 0xb3f3: /* CDSTR - convert from signed packed */
4759 case 0xb3f5: /* QADTR - quantize */
4760 case 0xb3f7: /* RRDTR - reround */
4761 case 0xb951: /* CDFTR - convert from fixed */
4762 case 0xb952: /* CDLGTR - convert from logical */
4763 case 0xb953: /* CDLFTR - convert from logical */
4764 /* float destination + fpc */
4765 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4766 return -1;
4767 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4768 return -1;
4769 break;
4770
4771 case 0xb305: /* LXDBR - load lengthened */
4772 case 0xb306: /* LXEBR - load lengthened */
4773 case 0xb307: /* MXDBR - multiply */
4774 case 0xb316: /* SQXBR - square root */
4775 case 0xb34c: /* MXBR - multiply */
4776 case 0xb34d: /* DXBR - divide */
4777 case 0xb347: /* FIXBRA - load fp integer */
4778 case 0xb392: /* CXLFBR - convert from logical */
4779 case 0xb396: /* CXFBR - convert from fixed */
4780 case 0xb3a2: /* CXLGBR - convert from logical */
4781 case 0xb3a6: /* CXGBR - convert from fixed */
4782 case 0xb3d8: /* MXTR - multiply */
4783 case 0xb3d9: /* DXTR - divide */
4784 case 0xb3dc: /* LXDTR - load lengthened */
4785 case 0xb3df: /* FIXTR - load fp integer */
4786 case 0xb3f9: /* CXGTR - convert from fixed */
4787 case 0xb3fa: /* CXUTR - convert from unsigned packed */
4788 case 0xb3fb: /* CXSTR - convert from signed packed */
4789 case 0xb3fd: /* QAXTR - quantize */
4790 case 0xb3ff: /* RRXTR - reround */
4791 case 0xb959: /* CXFTR - convert from fixed */
4792 case 0xb95a: /* CXLGTR - convert from logical */
4793 case 0xb95b: /* CXLFTR - convert from logical */
4794 /* float pair destination + fpc */
4795 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4796 return -1;
4797 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4798 return -1;
4799 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4800 return -1;
4801 break;
4802
4803 case 0xb308: /* KEBR - compare and signal */
4804 case 0xb309: /* CEBR - compare */
4805 case 0xb318: /* KDBR - compare and signal */
4806 case 0xb319: /* CDBR - compare */
4807 case 0xb348: /* KXBR - compare and signal */
4808 case 0xb349: /* CXBR - compare */
4809 case 0xb3e0: /* KDTR - compare and signal */
4810 case 0xb3e4: /* CDTR - compare */
4811 case 0xb3e8: /* KXTR - compare and signal */
4812 case 0xb3ec: /* CXTR - compare */
4813 /* flags + fpc only */
4814 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4815 return -1;
4816 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4817 return -1;
4818 break;
4819
4820 case 0xb302: /* LTEBR - load and test */
4821 case 0xb312: /* LTDBR - load and test */
4822 case 0xb30a: /* AEBR - add */
4823 case 0xb30b: /* SEBR - subtract */
4824 case 0xb31a: /* ADBR - add */
4825 case 0xb31b: /* SDBR - subtract */
4826 case 0xb3d2: /* ADTR - add */
4827 case 0xb3d3: /* SDTR - subtract */
4828 case 0xb3d6: /* LTDTR - load and test */
4829 /* float destination + flags + fpc */
4830 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4831 return -1;
4832 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4833 return -1;
4834 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4835 return -1;
4836 break;
4837
4838 case 0xb30e: /* MAEBR - multiply and add */
4839 case 0xb30f: /* MSEBR - multiply and subtract */
4840 case 0xb31e: /* MADBR - multiply and add */
4841 case 0xb31f: /* MSDBR - multiply and subtract */
4842 /* float destination [RRD] + fpc */
4843 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4844 return -1;
4845 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4846 return -1;
4847 break;
4848
4849 /* 0xb320-0xb323 undefined */
4850 /* 0xb327-0xb32d undefined */
4851
4852 case 0xb32e: /* MAER - multiply and add */
4853 case 0xb32f: /* MSER - multiply and subtract */
4854 case 0xb338: /* MAYLR - multiply and add unnormalized */
4855 case 0xb339: /* MYLR - multiply unnormalized */
4856 case 0xb33c: /* MAYHR - multiply and add unnormalized */
4857 case 0xb33d: /* MYHR - multiply unnormalized */
4858 case 0xb33e: /* MADR - multiply and add */
4859 case 0xb33f: /* MSDR - multiply and subtract */
4860 /* float destination [RRD] */
4861 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4862 return -1;
4863 break;
4864
4865 /* 0xb330-0xb335 undefined */
4866
4867 case 0xb33a: /* MAYR - multiply and add unnormalized */
4868 case 0xb33b: /* MYR - multiply unnormalized */
4869 /* float pair destination [RRD] */
4870 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4871 return -1;
4872 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4873 return -1;
4874 break;
4875
4876 case 0xb340: /* LPXBR - load positive */
4877 case 0xb341: /* LNXBR - load negative */
4878 case 0xb343: /* LCXBR - load complement */
4879 case 0xb360: /* LPXR - load positive */
4880 case 0xb361: /* LNXR - load negative */
4881 case 0xb362: /* LTXR - load and test */
4882 case 0xb363: /* LCXR - load complement */
4883 /* float pair destination + flags */
4884 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4885 return -1;
4886 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4887 return -1;
4888 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4889 return -1;
4890 break;
4891
4892 case 0xb342: /* LTXBR - load and test */
4893 case 0xb34a: /* AXBR - add */
4894 case 0xb34b: /* SXBR - subtract */
4895 case 0xb3da: /* AXTR - add */
4896 case 0xb3db: /* SXTR - subtract */
4897 case 0xb3de: /* LTXTR - load and test */
4898 /* float pair destination + flags + fpc */
4899 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4900 return -1;
4901 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4902 return -1;
4903 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4904 return -1;
4905 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4906 return -1;
4907 break;
4908
4909 /* 0xb34e-0xb34f undefined */
4910 /* 0xb352 undefined */
4911
4912 case 0xb353: /* DIEBR - divide to integer */
4913 case 0xb35b: /* DIDBR - divide to integer */
4914 /* two float destinations + flags + fpc */
4915 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4916 return -1;
4917 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4918 return -1;
4919 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4920 return -1;
4921 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4922 return -1;
4923 break;
4924
4925 /* 0xb354-0xb356 undefined */
4926 /* 0xb35a undefined */
4927
4928 /* 0xb35c-0xb35e undefined */
4929 /* 0xb364 undefined */
4930 /* 0xb368 undefined */
4931
4932 case 0xb369: /* CXR - compare */
4933 case 0xb3f4: /* CEDTR - compare biased exponent */
4934 case 0xb3fc: /* CEXTR - compare biased exponent */
4935 case 0xb920: /* CGR - compare */
4936 case 0xb921: /* CLGR - compare logical */
4937 case 0xb930: /* CGFR - compare */
4938 case 0xb931: /* CLGFR - compare logical */
4939 case 0xb9cd: /* CHHR - compare high */
4940 case 0xb9cf: /* CLHHR - compare logical high */
4941 case 0xb9dd: /* CHLR - compare high */
4942 case 0xb9df: /* CLHLR - compare logical high */
4943 /* flags only */
4944 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4945 return -1;
4946 break;
4947
4948 /* 0xb36a-0xb36f undefined */
4949 /* 0xb377-0xb37e undefined */
4950 /* 0xb380-0xb383 undefined */
4951 /* 0xb386-0xb38b undefined */
4952 /* 0xb38d-0xb38f undefined */
4953 /* 0xb393 undefined */
4954 /* 0xb397 undefined */
4955
4956 case 0xb398: /* CFEBR - convert to fixed */
4957 case 0xb399: /* CFDBR - convert to fixed */
4958 case 0xb39a: /* CFXBR - convert to fixed */
4959 case 0xb39c: /* CLFEBR - convert to logical */
4960 case 0xb39d: /* CLFDBR - convert to logical */
4961 case 0xb39e: /* CLFXBR - convert to logical */
4962 case 0xb941: /* CFDTR - convert to fixed */
4963 case 0xb949: /* CFXTR - convert to fixed */
4964 case 0xb943: /* CLFDTR - convert to logical */
4965 case 0xb94b: /* CLFXTR - convert to logical */
4966 /* 32-bit gpr destination + flags + fpc */
4967 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4968 return -1;
4969 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4970 return -1;
4971 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4972 return -1;
4973 break;
4974
4975 /* 0xb39b undefined */
4976 /* 0xb39f undefined */
4977
4978 /* 0xb3a3 undefined */
4979 /* 0xb3a7 undefined */
4980
4981 case 0xb3a8: /* CGEBR - convert to fixed */
4982 case 0xb3a9: /* CGDBR - convert to fixed */
4983 case 0xb3aa: /* CGXBR - convert to fixed */
4984 case 0xb3ac: /* CLGEBR - convert to logical */
4985 case 0xb3ad: /* CLGDBR - convert to logical */
4986 case 0xb3ae: /* CLGXBR - convert to logical */
4987 case 0xb3e1: /* CGDTR - convert to fixed */
4988 case 0xb3e9: /* CGXTR - convert to fixed */
4989 case 0xb942: /* CLGDTR - convert to logical */
4990 case 0xb94a: /* CLGXTR - convert to logical */
4991 /* 64-bit gpr destination + flags + fpc */
4992 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4993 return -1;
4994 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4995 return -1;
4996 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4997 return -1;
4998 break;
4999
5000 /* 0xb3ab undefined */
5001 /* 0xb3af-0xb3b3 undefined */
5002 /* 0xb3b7 undefined */
5003
5004 case 0xb3b8: /* CFER - convert to fixed */
5005 case 0xb3b9: /* CFDR - convert to fixed */
5006 case 0xb3ba: /* CFXR - convert to fixed */
5007 case 0xb998: /* ALCR - add logical with carry */
5008 case 0xb999: /* SLBR - subtract logical with borrow */
5009 case 0xb9f4: /* NRK - and */
5010 case 0xb9f6: /* ORK - or */
5011 case 0xb9f7: /* XRK - xor */
5012 case 0xb9f8: /* ARK - add */
5013 case 0xb9f9: /* SRK - subtract */
5014 case 0xb9fa: /* ALRK - add logical */
5015 case 0xb9fb: /* SLRK - subtract logical */
5016 /* 32-bit gpr destination + flags */
5017 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5018 return -1;
5019 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5020 return -1;
5021 break;
5022
5023 case 0xb3c8: /* CGER - convert to fixed */
5024 case 0xb3c9: /* CGDR - convert to fixed */
5025 case 0xb3ca: /* CGXR - convert to fixed */
5026 case 0xb900: /* LPGR - load positive */
5027 case 0xb901: /* LNGR - load negative */
5028 case 0xb902: /* LTGR - load and test */
5029 case 0xb903: /* LCGR - load complement */
5030 case 0xb908: /* AGR - add */
5031 case 0xb909: /* SGR - subtract */
5032 case 0xb90a: /* ALGR - add logical */
5033 case 0xb90b: /* SLGR - subtract logical */
5034 case 0xb910: /* LPGFR - load positive */
5035 case 0xb911: /* LNGFR - load negative */
5036 case 0xb912: /* LTGFR - load and test */
5037 case 0xb913: /* LCGFR - load complement */
5038 case 0xb918: /* AGFR - add */
5039 case 0xb919: /* SGFR - subtract */
5040 case 0xb91a: /* ALGFR - add logical */
5041 case 0xb91b: /* SLGFR - subtract logical */
5042 case 0xb980: /* NGR - and */
5043 case 0xb981: /* OGR - or */
5044 case 0xb982: /* XGR - xor */
5045 case 0xb988: /* ALCGR - add logical with carry */
5046 case 0xb989: /* SLBGR - subtract logical with borrow */
5047 case 0xb9e1: /* POPCNT - population count */
5048 case 0xb9e4: /* NGRK - and */
5049 case 0xb9e6: /* OGRK - or */
5050 case 0xb9e7: /* XGRK - xor */
5051 case 0xb9e8: /* AGRK - add */
5052 case 0xb9e9: /* SGRK - subtract */
5053 case 0xb9ea: /* ALGRK - add logical */
5054 case 0xb9eb: /* SLGRK - subtract logical */
55efceab
AA
5055 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
5056 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
566c56c9
MK
5057 /* 64-bit gpr destination + flags */
5058 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5059 return -1;
5060 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5061 return -1;
5062 break;
5063
5064 /* 0xb3bb-0xb3c0 undefined */
5065 /* 0xb3c2-0xb3c3 undefined */
5066 /* 0xb3c7 undefined */
5067 /* 0xb3cb-0xb3cc undefined */
5068
5069 case 0xb3cd: /* LGDR - load gr from fpr */
5070 case 0xb3e2: /* CUDTR - convert to unsigned packed */
5071 case 0xb3e3: /* CSDTR - convert to signed packed */
5072 case 0xb3e5: /* EEDTR - extract biased exponent */
5073 case 0xb3e7: /* ESDTR - extract significance */
5074 case 0xb3ed: /* EEXTR - extract biased exponent */
5075 case 0xb3ef: /* ESXTR - extract significance */
5076 case 0xb904: /* LGR - load */
5077 case 0xb906: /* LGBR - load byte */
5078 case 0xb907: /* LGHR - load halfword */
5079 case 0xb90c: /* MSGR - multiply single */
5080 case 0xb90f: /* LRVGR - load reversed */
5081 case 0xb914: /* LGFR - load */
5082 case 0xb916: /* LLGFR - load logical */
5083 case 0xb917: /* LLGTR - load logical thirty one bits */
55efceab 5084 case 0xb91c: /* MSGFR - multiply single 64<32 */
566c56c9
MK
5085 case 0xb946: /* BCTGR - branch on count */
5086 case 0xb984: /* LLGCR - load logical character */
5087 case 0xb985: /* LLGHR - load logical halfword */
5088 case 0xb9e2: /* LOCGR - load on condition */
5089 /* 64-bit gpr destination */
5090 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5091 return -1;
5092 break;
5093
5094 /* 0xb3ce-0xb3cf undefined */
5095 /* 0xb3e6 undefined */
5096
5097 case 0xb3ea: /* CUXTR - convert to unsigned packed */
5098 case 0xb3eb: /* CSXTR - convert to signed packed */
5099 case 0xb90d: /* DSGR - divide single */
5100 case 0xb91d: /* DSGFR - divide single */
5101 case 0xb986: /* MLGR - multiply logical */
5102 case 0xb987: /* DLGR - divide logical */
55efceab 5103 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
566c56c9
MK
5104 /* 64-bit gpr pair destination */
5105 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5106 return -1;
5107 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5108 return -1;
5109 break;
5110
5111 /* 0xb3ee undefined */
5112 /* 0xb3f0 undefined */
5113 /* 0xb3f8 undefined */
5114
5115 /* 0xb905 privileged */
5116
5117 /* 0xb90e unsupported: EREGG */
5118
5119 /* 0xb915 undefined */
5120
5121 case 0xb91e: /* KMAC - compute message authentication code [partial] */
5122 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5123 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5124 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5125 tmp &= 0xff;
5126 switch (tmp)
5127 {
5128 case 0x00: /* KMAC-Query */
5129 if (record_full_arch_list_add_mem (oaddr, 16))
5130 return -1;
5131 break;
5132
5133 case 0x01: /* KMAC-DEA */
5134 case 0x02: /* KMAC-TDEA-128 */
5135 case 0x03: /* KMAC-TDEA-192 */
5136 case 0x09: /* KMAC-Encrypted-DEA */
5137 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
5138 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
5139 if (record_full_arch_list_add_mem (oaddr, 8))
5140 return -1;
5141 break;
5142
5143 case 0x12: /* KMAC-AES-128 */
5144 case 0x13: /* KMAC-AES-192 */
5145 case 0x14: /* KMAC-AES-256 */
5146 case 0x1a: /* KMAC-Encrypted-AES-128 */
5147 case 0x1b: /* KMAC-Encrypted-AES-192 */
5148 case 0x1c: /* KMAC-Encrypted-AES-256 */
5149 if (record_full_arch_list_add_mem (oaddr, 16))
5150 return -1;
5151 break;
5152
5153 default:
5154 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5155 (int)tmp, paddress (gdbarch, addr));
5156 return -1;
5157 }
5158 if (tmp != 0)
5159 {
5160 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5161 return -1;
5162 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5163 return -1;
5164 }
5165 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5166 return -1;
5167 break;
5168
5169 /* 0xb922-0xb924 undefined */
5170 /* 0xb925 privileged */
5171 /* 0xb928 privileged */
566c56c9 5172
55efceab 5173 case 0xb929: /* KMA - cipher message with authentication */
566c56c9
MK
5174 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
5175 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
5176 case 0xb92f: /* KMC - cipher message with chaining [partial] */
5177 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5178 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5179 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5180 tmp &= 0x7f;
5181 switch (tmp)
5182 {
5183 case 0x00: /* KM*-Query */
5184 if (record_full_arch_list_add_mem (oaddr, 16))
5185 return -1;
5186 break;
5187
5188 case 0x01: /* KM*-DEA */
5189 case 0x02: /* KM*-TDEA-128 */
5190 case 0x03: /* KM*-TDEA-192 */
5191 case 0x09: /* KM*-Encrypted-DEA */
5192 case 0x0a: /* KM*-Encrypted-TDEA-128 */
5193 case 0x0b: /* KM*-Encrypted-TDEA-192 */
5194 if (record_full_arch_list_add_mem (oaddr, 8))
5195 return -1;
5196 break;
5197
5198 case 0x12: /* KM*-AES-128 */
5199 case 0x13: /* KM*-AES-192 */
5200 case 0x14: /* KM*-AES-256 */
5201 case 0x1a: /* KM*-Encrypted-AES-128 */
5202 case 0x1b: /* KM*-Encrypted-AES-192 */
5203 case 0x1c: /* KM*-Encrypted-AES-256 */
5204 if (record_full_arch_list_add_mem (oaddr, 16))
5205 return -1;
5206 break;
5207
5208 case 0x43: /* KMC-PRNG */
5209 /* Only valid for KMC. */
5210 if (insn[0] == 0xb92f)
5211 {
5212 if (record_full_arch_list_add_mem (oaddr, 8))
5213 return -1;
5214 break;
5215 }
5216 /* For other instructions, fallthru. */
5217 default:
5218 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
5219 (int)tmp, paddress (gdbarch, addr));
5220 return -1;
5221 }
5222 if (tmp != 0)
5223 {
5224 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5225 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5226 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5227 if (record_full_arch_list_add_mem (oaddr2, tmp))
5228 return -1;
5229 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5230 return -1;
5231 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5232 return -1;
5233 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5234 return -1;
5235 }
55efceab
AA
5236 if (tmp != 0 && insn[0] == 0xb929)
5237 {
5238 if (record_full_arch_list_add_reg (regcache,
5239 S390_R0_REGNUM + inib[4]))
5240 return -1;
5241 if (record_full_arch_list_add_reg (regcache,
5242 S390_R0_REGNUM + (inib[4] | 1)))
5243 return -1;
5244 }
566c56c9
MK
5245 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5246 return -1;
5247 break;
5248
5249 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
5250 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5251 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5252 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5253 tmp &= 0x7f;
5254 switch (tmp)
5255 {
5256 case 0x00: /* PCC-Query */
5257 if (record_full_arch_list_add_mem (oaddr, 16))
5258 return -1;
5259 break;
5260
5261 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
5262 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
5263 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
5264 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
5265 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
5266 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
5267 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
5268 return -1;
5269 break;
5270
5271 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
5272 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
5273 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
5274 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
5275 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
5276 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
5277 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
5278 return -1;
5279 break;
5280
5281 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
5282 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
5283 return -1;
5284 break;
5285
5286 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
5287 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
5288 return -1;
5289 break;
5290
5291 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
5292 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
5293 return -1;
5294 break;
5295
5296 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
5297 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
5298 return -1;
5299 break;
5300
5301 default:
5302 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
5303 (int)tmp, paddress (gdbarch, addr));
5304 return -1;
5305 }
5306 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5307 return -1;
5308 break;
5309
5310 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
5311 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5312 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5313 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5314 tmp &= 0x7f;
5315 switch (tmp)
5316 {
5317 case 0x00: /* KMCTR-Query */
5318 if (record_full_arch_list_add_mem (oaddr, 16))
5319 return -1;
5320 break;
5321
5322 case 0x01: /* KMCTR-DEA */
5323 case 0x02: /* KMCTR-TDEA-128 */
5324 case 0x03: /* KMCTR-TDEA-192 */
5325 case 0x09: /* KMCTR-Encrypted-DEA */
5326 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
5327 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
5328 case 0x12: /* KMCTR-AES-128 */
5329 case 0x13: /* KMCTR-AES-192 */
5330 case 0x14: /* KMCTR-AES-256 */
5331 case 0x1a: /* KMCTR-Encrypted-AES-128 */
5332 case 0x1b: /* KMCTR-Encrypted-AES-192 */
5333 case 0x1c: /* KMCTR-Encrypted-AES-256 */
5334 break;
5335
5336 default:
5337 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
5338 (int)tmp, paddress (gdbarch, addr));
5339 return -1;
5340 }
5341 if (tmp != 0)
5342 {
5343 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5344 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5345 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5346 if (record_full_arch_list_add_mem (oaddr2, tmp))
5347 return -1;
5348 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5349 return -1;
5350 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5351 return -1;
5352 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5353 return -1;
5354 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
5355 return -1;
5356 }
5357 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5358 return -1;
5359 break;
5360
5361 case 0xb92e: /* KM - cipher message [partial] */
5362 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5363 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5364 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5365 tmp &= 0x7f;
5366 switch (tmp)
5367 {
5368 case 0x00: /* KM-Query */
5369 if (record_full_arch_list_add_mem (oaddr, 16))
5370 return -1;
5371 break;
5372
5373 case 0x01: /* KM-DEA */
5374 case 0x02: /* KM-TDEA-128 */
5375 case 0x03: /* KM-TDEA-192 */
5376 case 0x09: /* KM-Encrypted-DEA */
5377 case 0x0a: /* KM-Encrypted-TDEA-128 */
5378 case 0x0b: /* KM-Encrypted-TDEA-192 */
5379 case 0x12: /* KM-AES-128 */
5380 case 0x13: /* KM-AES-192 */
5381 case 0x14: /* KM-AES-256 */
5382 case 0x1a: /* KM-Encrypted-AES-128 */
5383 case 0x1b: /* KM-Encrypted-AES-192 */
5384 case 0x1c: /* KM-Encrypted-AES-256 */
5385 break;
5386
5387 case 0x32: /* KM-XTS-AES-128 */
5388 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
5389 return -1;
5390 break;
5391
5392 case 0x34: /* KM-XTS-AES-256 */
5393 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
5394 return -1;
5395 break;
5396
5397 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
5398 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
5399 return -1;
5400 break;
5401
5402 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
5403 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
5404 return -1;
5405 break;
5406
5407 default:
5408 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
5409 (int)tmp, paddress (gdbarch, addr));
5410 return -1;
5411 }
5412 if (tmp != 0)
5413 {
5414 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5415 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5416 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
5417 if (record_full_arch_list_add_mem (oaddr2, tmp))
5418 return -1;
5419 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5420 return -1;
5421 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5422 return -1;
5423 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5424 return -1;
5425 }
5426 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5427 return -1;
5428 break;
5429
5430 /* 0xb932-0xb93b undefined */
5431
5432 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
5433 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5434 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5435 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5436 tmp &= 0xff;
5437 switch (tmp)
5438 {
5439 case 0x00: /* PPNO-Query */
5440 case 0x80: /* PPNO-Query */
5441 if (record_full_arch_list_add_mem (oaddr, 16))
5442 return -1;
5443 break;
5444
5445 case 0x03: /* PPNO-SHA-512-DRNG - generate */
5446 if (record_full_arch_list_add_mem (oaddr, 240))
5447 return -1;
5448 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5449 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
5450 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5451 if (record_full_arch_list_add_mem (oaddr2, tmp))
5452 return -1;
5453 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5454 return -1;
5455 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5456 return -1;
5457 break;
5458
5459 case 0x83: /* PPNO-SHA-512-DRNG - seed */
5460 if (record_full_arch_list_add_mem (oaddr, 240))
5461 return -1;
5462 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5463 return -1;
5464 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5465 return -1;
5466 break;
5467
5468 default:
5469 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
5470 (int)tmp, paddress (gdbarch, addr));
5471 return -1;
5472 }
5473 /* DXC may be written */
5474 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5475 return -1;
5476 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5477 return -1;
5478 break;
5479
5480 /* 0xb93d undefined */
5481
5482 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
5483 case 0xb93f: /* KLMD - compute last message digest [partial] */
5484 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
5485 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5486 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5487 tmp &= 0xff;
5488 switch (tmp)
5489 {
5490 case 0x00: /* K*MD-Query */
5491 if (record_full_arch_list_add_mem (oaddr, 16))
5492 return -1;
5493 break;
5494
5495 case 0x01: /* K*MD-SHA-1 */
5496 if (record_full_arch_list_add_mem (oaddr, 20))
5497 return -1;
5498 break;
5499
5500 case 0x02: /* K*MD-SHA-256 */
5501 if (record_full_arch_list_add_mem (oaddr, 32))
5502 return -1;
5503 break;
5504
5505 case 0x03: /* K*MD-SHA-512 */
5506 if (record_full_arch_list_add_mem (oaddr, 64))
5507 return -1;
5508 break;
5509
5510 case 0x41: /* KIMD-GHASH */
5511 /* Only valid for KIMD. */
5512 if (insn[0] == 0xb93e)
5513 {
5514 if (record_full_arch_list_add_mem (oaddr, 16))
5515 return -1;
5516 break;
5517 }
5518 /* For KLMD, fallthru. */
5519 default:
5520 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
5521 (int)tmp, paddress (gdbarch, addr));
5522 return -1;
5523 }
5524 if (tmp != 0)
5525 {
5526 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5527 return -1;
5528 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
5529 return -1;
5530 }
5531 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5532 return -1;
5533 break;
5534
5535 /* 0xb940 undefined */
5536 /* 0xb944-0xb945 undefined */
5537 /* 0xb947-0xb948 undefined */
5538 /* 0xb94c-0xb950 undefined */
5539 /* 0xb954-0xb958 undefined */
5540 /* 0xb95c-0xb95f undefined */
5541 /* 0xb962-0xb971 undefined */
5542 /* 0xb974-0xb97f undefined */
5543
5544 case 0xb983: /* FLOGR - find leftmost one */
5545 /* 64-bit gpr pair destination + flags */
5546 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
5547 return -1;
5548 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
5549 return -1;
5550 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5551 return -1;
5552 break;
5553
5554 /* 0xb98a privileged */
5555 /* 0xb98b-0xb98c undefined */
5556
5557 case 0xb98d: /* EPSW - extract psw */
5558 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5559 return -1;
5560 if (inib[7])
5561 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5562 return -1;
5563 break;
5564
5565 /* 0xb98e-0xb98f privileged */
5566
5567 case 0xb990: /* TRTT - translate two to two [partial] */
5568 case 0xb991: /* TRTO - translate two to one [partial] */
5569 case 0xb992: /* TROT - translate one to two [partial] */
5570 case 0xb993: /* TROO - translate one to one [partial] */
5571 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
5572 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5573 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
5574 /* tmp is source length, we want destination length. Adjust. */
5575 if (insn[0] == 0xb991)
5576 tmp >>= 1;
5577 if (insn[0] == 0xb992)
5578 tmp <<= 1;
5579 if (record_full_arch_list_add_mem (oaddr, tmp))
5580 return -1;
5581 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5582 return -1;
5583 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5584 return -1;
5585 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5586 return -1;
5587 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5588 return -1;
5589 break;
5590
5591 case 0xb996: /* MLR - multiply logical */
5592 case 0xb997: /* DLR - divide logical */
5593 /* 32-bit gpr pair destination */
5594 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5595 return -1;
5596 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5597 return -1;
5598 break;
5599
5600 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
5601 /* 0xb9b4-0xb9bc undefined */
5602
5603 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
5604 case 0xb9bf: /* TRTE - translate and test extended [partial] */
5605 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
5606 return -1;
5607 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
5608 return -1;
5609 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
5610 return -1;
5611 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5612 return -1;
5613 break;
5614
5615 /* 0xb9c0-0xb9c7 undefined */
5616
5617 case 0xb9c8: /* AHHHR - add high */
5618 case 0xb9c9: /* SHHHR - subtract high */
5619 case 0xb9ca: /* ALHHHR - add logical high */
5620 case 0xb9cb: /* SLHHHR - subtract logical high */
5621 case 0xb9d8: /* AHHLR - add high */
5622 case 0xb9d9: /* SHHLR - subtract high */
5623 case 0xb9da: /* ALHHLR - add logical high */
5624 case 0xb9db: /* SLHHLR - subtract logical high */
5625 /* 32-bit high gpr destination + flags */
5626 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5627 return -1;
5628 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5629 return -1;
5630 break;
5631
5632 /* 0xb9cc undefined */
5633 /* 0xb9ce undefined */
5634 /* 0xb9d0-0xb9d7 undefined */
5635 /* 0xb9dc undefined */
5636 /* 0xb9de undefined */
5637
5638 case 0xb9e0: /* LOCFHR - load high on condition */
5639 /* 32-bit high gpr destination */
5640 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
5641 return -1;
5642 break;
5643
5644 /* 0xb9e3 undefined */
5645 /* 0xb9e5 undefined */
55efceab 5646 /* 0xb9ee-0xb9f1 undefined */
566c56c9
MK
5647 /* 0xb9f3 undefined */
5648 /* 0xb9f5 undefined */
55efceab
AA
5649 /* 0xb9fc undefined */
5650 /* 0xb9fe -0xb9ff undefined */
566c56c9
MK
5651
5652 default:
5653 goto UNKNOWN_OP;
5654 }
5655 break;
5656
5657 /* 0xb4-0xb5 undefined */
5658 /* 0xb6 privileged: STCTL - store control */
5659 /* 0xb7 privileged: LCTL - load control */
5660 /* 0xb8 undefined */
5661
5662 case 0xba: /* CS - compare and swap */
5663 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5664 if (record_full_arch_list_add_mem (oaddr, 4))
5665 return -1;
5666 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5667 return -1;
5668 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5669 return -1;
5670 break;
5671
5672 case 0xbb: /* CDS - compare double and swap */
5673 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5674 if (record_full_arch_list_add_mem (oaddr, 8))
5675 return -1;
5676 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5677 return -1;
5678 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5679 return -1;
5680 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5681 return -1;
5682 break;
5683
5684 /* 0xbc undefined */
5685
5686 case 0xbe: /* STCM - store characters under mask */
5687 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5688 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5689 return -1;
5690 break;
5691
5692 case 0xc0:
5693 case 0xc2:
5694 case 0xc4:
5695 case 0xc6:
5696 case 0xcc:
5697 /* RIL-format instruction */
5698 switch (ibyte[0] << 4 | inib[3])
5699 {
5700 case 0xc00: /* LARL - load address relative long */
5701 case 0xc05: /* BRASL - branch relative and save long */
5702 case 0xc09: /* IILF - insert immediate */
5703 case 0xc21: /* MSFI - multiply single immediate */
5704 case 0xc42: /* LLHRL - load logical halfword relative long */
5705 case 0xc45: /* LHRL - load halfword relative long */
5706 case 0xc4d: /* LRL - load relative long */
5707 /* 32-bit or native gpr destination */
5708 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5709 return -1;
5710 break;
5711
5712 case 0xc01: /* LGFI - load immediate */
5713 case 0xc0e: /* LLIHF - load logical immediate */
5714 case 0xc0f: /* LLILF - load logical immediate */
5715 case 0xc20: /* MSGFI - multiply single immediate */
5716 case 0xc44: /* LGHRL - load halfword relative long */
5717 case 0xc46: /* LLGHRL - load logical halfword relative long */
5718 case 0xc48: /* LGRL - load relative long */
5719 case 0xc4c: /* LGFRL - load relative long */
5720 case 0xc4e: /* LLGFRL - load logical relative long */
5721 /* 64-bit gpr destination */
5722 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5723 return -1;
5724 break;
5725
5726 /* 0xc02-0xc03 undefined */
5727
5728 case 0xc04: /* BRCL - branch relative on condition long */
5729 case 0xc62: /* PFDRL - prefetch data relative long */
5730 break;
5731
5732 case 0xc06: /* XIHF - xor immediate */
5733 case 0xc0a: /* NIHF - and immediate */
5734 case 0xc0c: /* OIHF - or immediate */
5735 case 0xcc8: /* AIH - add immediate high */
5736 case 0xcca: /* ALSIH - add logical with signed immediate high */
5737 /* 32-bit high gpr destination + flags */
5738 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5739 return -1;
5740 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5741 return -1;
5742 break;
5743
5744 case 0xc07: /* XILF - xor immediate */
5745 case 0xc0b: /* NILF - and immediate */
5746 case 0xc0d: /* OILF - or immediate */
5747 case 0xc25: /* SLFI - subtract logical immediate */
5748 case 0xc29: /* AFI - add immediate */
5749 case 0xc2b: /* ALFI - add logical immediate */
5750 /* 32-bit gpr destination + flags */
5751 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5752 return -1;
5753 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5754 return -1;
5755 break;
5756
5757 case 0xc08: /* IIHF - insert immediate */
5758 case 0xcc6: /* BRCTH - branch relative on count high */
5759 case 0xccb: /* ALSIHN - add logical with signed immediate high */
5760 /* 32-bit high gpr destination */
5761 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5762 return -1;
5763 break;
5764
5765 /* 0xc22-0xc23 undefined */
5766
5767 case 0xc24: /* SLGFI - subtract logical immediate */
5768 case 0xc28: /* AGFI - add immediate */
5769 case 0xc2a: /* ALGFI - add logical immediate */
5770 /* 64-bit gpr destination + flags */
5771 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5772 return -1;
5773 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5774 return -1;
5775 break;
5776
5777 /* 0xc26-0xc27 undefined */
5778
5779 case 0xc2c: /* CGFI - compare immediate */
5780 case 0xc2d: /* CFI - compare immediate */
5781 case 0xc2e: /* CLGFI - compare logical immediate */
5782 case 0xc2f: /* CLFI - compare logical immediate */
5783 case 0xc64: /* CGHRL - compare halfword relative long */
5784 case 0xc65: /* CHRL - compare halfword relative long */
5785 case 0xc66: /* CLGHRL - compare logical halfword relative long */
5786 case 0xc67: /* CLHRL - compare logical halfword relative long */
5787 case 0xc68: /* CGRL - compare relative long */
5788 case 0xc6a: /* CLGRL - compare logical relative long */
5789 case 0xc6c: /* CGFRL - compare relative long */
5790 case 0xc6d: /* CRL - compare relative long */
5791 case 0xc6e: /* CLGFRL - compare logical relative long */
5792 case 0xc6f: /* CLRL - compare logical relative long */
5793 case 0xccd: /* CIH - compare immediate high */
5794 case 0xccf: /* CLIH - compare logical immediate high */
5795 /* flags only */
5796 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5797 return -1;
5798 break;
5799
5800 /* 0xc40-0xc41 undefined */
5801 /* 0xc43 undefined */
5802
5803 case 0xc47: /* STHRL - store halfword relative long */
5804 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5805 if (record_full_arch_list_add_mem (oaddr, 2))
5806 return -1;
5807 break;
5808
5809 /* 0xc49-0xc4a undefined */
5810
5811 case 0xc4b: /* STGRL - store relative long */
5812 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5813 if (record_full_arch_list_add_mem (oaddr, 8))
5814 return -1;
5815 break;
5816
5817 case 0xc4f: /* STRL - store relative long */
5818 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5819 if (record_full_arch_list_add_mem (oaddr, 4))
5820 return -1;
5821 break;
5822
5823 case 0xc60: /* EXRL - execute relative long */
5824 if (ex != -1)
5825 {
5826 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
5827 paddress (gdbarch, addr));
5828 return -1;
5829 }
5830 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
5831 if (inib[2])
5832 {
5833 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5834 ex = tmp & 0xff;
5835 }
5836 else
5837 {
5838 ex = 0;
5839 }
5840 goto ex;
5841
5842 /* 0xc61 undefined */
5843 /* 0xc63 undefined */
5844 /* 0xc69 undefined */
5845 /* 0xc6b undefined */
5846 /* 0xcc0-0xcc5 undefined */
5847 /* 0xcc7 undefined */
5848 /* 0xcc9 undefined */
5849 /* 0xccc undefined */
5850 /* 0xcce undefined */
5851
5852 default:
5853 goto UNKNOWN_OP;
5854 }
5855 break;
5856
5857 /* 0xc1 undefined */
5858 /* 0xc3 undefined */
5859
5860 case 0xc5: /* BPRP - branch prediction relative preload */
5861 case 0xc7: /* BPP - branch prediction preload */
5862 /* no visible effect */
5863 break;
5864
5865 case 0xc8:
5866 /* SSF-format instruction */
5867 switch (ibyte[0] << 4 | inib[3])
5868 {
5869 /* 0xc80 unsupported */
5870
5871 case 0xc81: /* ECTG - extract cpu time */
5872 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5873 return -1;
5874 if (s390_record_gpr_g (gdbarch, regcache, 0))
5875 return -1;
5876 if (s390_record_gpr_g (gdbarch, regcache, 1))
5877 return -1;
5878 break;
5879
5880 case 0xc82: /* CSST - compare and swap and store */
5881 {
5882 uint8_t fc, sc;
5883 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5884 fc = tmp & 0xff;
5885 sc = tmp >> 8 & 0xff;
5886
5887 /* First and third operands. */
5888 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5889 switch (fc)
5890 {
5891 case 0x00: /* 32-bit */
5892 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5893 return -1;
5894 if (record_full_arch_list_add_mem (oaddr, 4))
5895 return -1;
5896 break;
5897
5898 case 0x01: /* 64-bit */
5899 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5900 return -1;
5901 if (record_full_arch_list_add_mem (oaddr, 8))
5902 return -1;
5903 break;
5904
5905 case 0x02: /* 128-bit */
5906 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5907 return -1;
5908 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5909 return -1;
5910 if (record_full_arch_list_add_mem (oaddr, 16))
5911 return -1;
5912 break;
5913
5914 default:
5915 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5916 fc, paddress (gdbarch, addr));
5917 return -1;
5918 }
5919
5920 /* Second operand. */
5921 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5922 if (sc > 4)
5923 {
5924 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5925 sc, paddress (gdbarch, addr));
5926 return -1;
5927 }
5928
5929 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5930 return -1;
5931
5932 /* Flags. */
5933 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5934 return -1;
5935 }
5936 break;
5937
5938 /* 0xc83 undefined */
5939
5940 case 0xc84: /* LPD - load pair disjoint */
5941 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5942 return -1;
5943 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5944 return -1;
5945 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5946 return -1;
5947 break;
5948
5949 case 0xc85: /* LPDG - load pair disjoint */
5950 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5951 return -1;
5952 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5953 return -1;
5954 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5955 return -1;
5956 break;
5957
5958 /* 0xc86-0xc8f undefined */
5959
5960 default:
5961 goto UNKNOWN_OP;
5962 }
5963 break;
5964
5965 /* 0xc9-0xcb undefined */
5966 /* 0xcd-0xcf undefined */
5967
5968 case 0xd0: /* TRTR - translate and test reversed */
5969 case 0xdd: /* TRT - translate and test */
5970 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5971 return -1;
5972 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5973 return -1;
5974 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5975 return -1;
5976 break;
5977
5978 case 0xd1: /* MVN - move numbers */
5979 case 0xd2: /* MVC - move */
5980 case 0xd3: /* MVZ - move zones */
5981 case 0xdc: /* TR - translate */
5982 case 0xe8: /* MVCIN - move inverse */
5983 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5984 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5985 return -1;
5986 break;
5987
5988 case 0xd4: /* NC - and */
5989 case 0xd6: /* OC - or*/
5990 case 0xd7: /* XC - xor */
5991 case 0xe2: /* UNPKU - unpack unicode */
5992 case 0xea: /* UNPKA - unpack ASCII */
5993 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5994 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5995 return -1;
5996 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5997 return -1;
5998 break;
5999
6000 case 0xde: /* ED - edit */
6001 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6002 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6003 return -1;
6004 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6005 return -1;
6006 /* DXC may be written */
6007 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6008 return -1;
6009 break;
6010
6011 case 0xdf: /* EDMK - edit and mark */
6012 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6013 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6014 return -1;
6015 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
6016 return -1;
6017 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6018 return -1;
6019 /* DXC may be written */
6020 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6021 return -1;
6022 break;
6023
6024 /* 0xd8 undefined */
6025 /* 0xd9 unsupported: MVCK - move with key */
6026 /* 0xda unsupported: MVCP - move to primary */
6027 /* 0xdb unsupported: MVCS - move to secondary */
6028 /* 0xe0 undefined */
6029
6030 case 0xe1: /* PKU - pack unicode */
6031 case 0xe9: /* PKA - pack ASCII */
6032 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6033 if (record_full_arch_list_add_mem (oaddr, 16))
6034 return -1;
6035 break;
6036
6037 case 0xe3:
55efceab 6038 case 0xe6:
566c56c9
MK
6039 case 0xe7:
6040 case 0xeb:
6041 case 0xed:
6042 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
6043 switch (ibyte[0] << 8 | ibyte[5])
6044 {
6045 /* 0xe300-0xe301 undefined */
6046
6047 case 0xe302: /* LTG - load and test */
6048 case 0xe308: /* AG - add */
6049 case 0xe309: /* SG - subtract */
6050 case 0xe30a: /* ALG - add logical */
6051 case 0xe30b: /* SLG - subtract logical */
6052 case 0xe318: /* AGF - add */
6053 case 0xe319: /* SGF - subtract */
6054 case 0xe31a: /* ALGF - add logical */
6055 case 0xe31b: /* SLGF - subtract logical */
6056 case 0xe332: /* LTGF - load and test */
6057 case 0xe380: /* NG - and */
6058 case 0xe381: /* OG - or */
6059 case 0xe382: /* XG - xor */
6060 case 0xe388: /* ALCG - add logical with carry */
6061 case 0xe389: /* SLBG - subtract logical with borrow */
6062 case 0xeb0a: /* SRAG - shift right single */
6063 case 0xeb0b: /* SLAG - shift left single */
6064 /* 64-bit gpr destination + flags */
6065 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6066 return -1;
6067 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6068 return -1;
6069 break;
6070
6071 /* 0xe303 privileged */
6072
6073 case 0xe304: /* LG - load */
6074 case 0xe30c: /* MSG - multiply single */
6075 case 0xe30f: /* LRVG - load reversed */
6076 case 0xe314: /* LGF - load */
6077 case 0xe315: /* LGH - load halfword */
6078 case 0xe316: /* LLGF - load logical */
6079 case 0xe317: /* LLGT - load logical thirty one bits */
6080 case 0xe31c: /* MSGF - multiply single */
6081 case 0xe32a: /* LZRG - load and zero rightmost byte */
6082 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
55efceab 6083 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
566c56c9
MK
6084 case 0xe346: /* BCTG - branch on count */
6085 case 0xe377: /* LGB - load byte */
6086 case 0xe390: /* LLGC - load logical character */
6087 case 0xe391: /* LLGH - load logical halfword */
6088 case 0xeb0c: /* SRLG - shift right single logical */
6089 case 0xeb0d: /* SLLG - shift left single logical */
6090 case 0xeb1c: /* RLLG - rotate left single logical */
6091 case 0xeb44: /* BXHG - branch on index high */
6092 case 0xeb45: /* BXLEG - branch on index low or equal */
6093 case 0xeb4c: /* ECAG - extract cpu attribute */
6094 case 0xebe2: /* LOCG - load on condition */
6095 /* 64-bit gpr destination */
6096 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6097 return -1;
6098 break;
6099
6100 /* 0xe305 undefined */
6101
6102 case 0xe306: /* CVBY - convert to binary */
6103 /* 32-bit or native gpr destination + FPC (DXC write) */
6104 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6105 return -1;
6106 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6107 return -1;
6108 break;
6109
6110 /* 0xe307 undefined */
6111
6112 case 0xe30d: /* DSG - divide single */
6113 case 0xe31d: /* DSGF - divide single */
55efceab 6114 case 0xe384: /* MG - multiply 64x64mem -> 128 */
566c56c9
MK
6115 case 0xe386: /* MLG - multiply logical */
6116 case 0xe387: /* DLG - divide logical */
6117 case 0xe38f: /* LPQ - load pair from quadword */
6118 /* 64-bit gpr pair destination */
6119 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6120 return -1;
6121 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6122 return -1;
6123 break;
6124
6125 case 0xe30e: /* CVBG - convert to binary */
6126 /* 64-bit gpr destination + FPC (DXC write) */
6127 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6128 return -1;
6129 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6130 return -1;
6131 break;
6132
6133 /* 0xe310-0xe311 undefined */
6134
6135 case 0xe312: /* LT - load and test */
55efceab
AA
6136 case 0xe338: /* AGH - add halfword to 64 bit value */
6137 case 0xe339: /* SGH - subtract halfword from 64 bit value */
6138 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
566c56c9
MK
6139 case 0xe354: /* NY - and */
6140 case 0xe356: /* OY - or */
6141 case 0xe357: /* XY - xor */
6142 case 0xe35a: /* AY - add */
6143 case 0xe35b: /* SY - subtract */
6144 case 0xe35e: /* ALY - add logical */
6145 case 0xe35f: /* SLY - subtract logical */
6146 case 0xe37a: /* AHY - add halfword */
6147 case 0xe37b: /* SHY - subtract halfword */
55efceab 6148 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
566c56c9
MK
6149 case 0xe398: /* ALC - add logical with carry */
6150 case 0xe399: /* SLB - subtract logical with borrow */
6151 case 0xe727: /* LCBB - load count to block bounduary */
6152 case 0xeb81: /* ICMY - insert characters under mask */
6153 case 0xebdc: /* SRAK - shift left single */
6154 case 0xebdd: /* SLAK - shift left single */
55efceab 6155 /* 32/64-bit gpr destination + flags */
566c56c9
MK
6156 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6157 return -1;
6158 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6159 return -1;
6160 break;
6161
6162 /* 0xe313 privileged */
6163
6164 case 0xe31e: /* LRV - load reversed */
6165 case 0xe31f: /* LRVH - load reversed */
6166 case 0xe33b: /* LZRF - load and zero rightmost byte */
6167 case 0xe351: /* MSY - multiply single */
6168 case 0xe358: /* LY - load */
6169 case 0xe371: /* LAY - load address */
6170 case 0xe373: /* ICY - insert character */
6171 case 0xe376: /* LB - load byte */
6172 case 0xe378: /* LHY - load */
6173 case 0xe37c: /* MHY - multiply halfword */
6174 case 0xe394: /* LLC - load logical character */
6175 case 0xe395: /* LLH - load logical halfword */
6176 case 0xeb1d: /* RLL - rotate left single logical */
6177 case 0xebde: /* SRLK - shift left single logical */
6178 case 0xebdf: /* SLLK - shift left single logical */
6179 case 0xebf2: /* LOC - load on condition */
6180 /* 32-bit or native gpr destination */
6181 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6182 return -1;
6183 break;
6184
6185 case 0xe320: /* CG - compare */
6186 case 0xe321: /* CLG - compare logical */
6187 case 0xe330: /* CGF - compare */
6188 case 0xe331: /* CLGF - compare logical */
6189 case 0xe334: /* CGH - compare halfword */
6190 case 0xe355: /* CLY - compare logical */
6191 case 0xe359: /* CY - compare */
6192 case 0xe379: /* CHY - compare halfword */
6193 case 0xe3cd: /* CHF - compare high */
6194 case 0xe3cf: /* CLHF - compare logical high */
6195 case 0xeb20: /* CLMH - compare logical under mask high */
6196 case 0xeb21: /* CLMY - compare logical under mask */
6197 case 0xeb51: /* TMY - test under mask */
6198 case 0xeb55: /* CLIY - compare logical */
6199 case 0xebc0: /* TP - test decimal */
6200 case 0xed10: /* TCEB - test data class */
6201 case 0xed11: /* TCDB - test data class */
6202 case 0xed12: /* TCXB - test data class */
6203 case 0xed50: /* TDCET - test data class */
6204 case 0xed51: /* TDGET - test data group */
6205 case 0xed54: /* TDCDT - test data class */
6206 case 0xed55: /* TDGDT - test data group */
6207 case 0xed58: /* TDCXT - test data class */
6208 case 0xed59: /* TDGXT - test data group */
6209 /* flags only */
6210 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6211 return -1;
6212 break;
6213
6214 /* 0xe322-0xe323 undefined */
6215
6216 case 0xe324: /* STG - store */
6217 case 0xe325: /* NTSTG - nontransactional store */
6218 case 0xe326: /* CVDY - convert to decimal */
6219 case 0xe32f: /* STRVG - store reversed */
6220 case 0xebe3: /* STOCG - store on condition */
6221 case 0xed67: /* STDY - store */
6222 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6223 if (record_full_arch_list_add_mem (oaddr, 8))
6224 return -1;
6225 break;
6226
6227 /* 0xe327-0xe329 undefined */
6228 /* 0xe32b-0xe32d undefined */
6229
6230 case 0xe32e: /* CVDG - convert to decimal */
6231 case 0xe38e: /* STPQ - store pair to quadword */
6232 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6233 if (record_full_arch_list_add_mem (oaddr, 16))
6234 return -1;
6235 break;
6236
6237 /* 0xe333 undefined */
6238 /* 0xe335 undefined */
6239
6240 case 0xe336: /* PFD - prefetch data */
6241 break;
6242
55efceab 6243 /* 0xe337 undefined */
566c56c9
MK
6244 /* 0xe33c-0xe33d undefined */
6245
6246 case 0xe33e: /* STRV - store reversed */
6247 case 0xe350: /* STY - store */
6248 case 0xe3cb: /* STFH - store high */
6249 case 0xebe1: /* STOCFH - store high on condition */
6250 case 0xebf3: /* STOC - store on condition */
6251 case 0xed66: /* STEY - store */
6252 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6253 if (record_full_arch_list_add_mem (oaddr, 4))
6254 return -1;
6255 break;
6256
6257 case 0xe33f: /* STRVH - store reversed */
6258 case 0xe370: /* STHY - store halfword */
6259 case 0xe3c7: /* STHH - store halfword high */
6260 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6261 if (record_full_arch_list_add_mem (oaddr, 2))
6262 return -1;
6263 break;
6264
6265 /* 0xe340-0xe345 undefined */
55efceab
AA
6266
6267 case 0xe347: /* BIC - branch indirect on condition */
6268 break;
6269
6270 /* 0xe348-0xe34f undefined */
6271 /* 0xe352 undefined */
566c56c9
MK
6272
6273 case 0xe35c: /* MFY - multiply */
6274 case 0xe396: /* ML - multiply logical */
6275 case 0xe397: /* DL - divide logical */
6276 /* 32-bit gpr pair destination */
6277 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6278 return -1;
6279 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6280 return -1;
6281 break;
6282
6283 /* 0xe35d undefined */
6284 /* 0xe360-0xe36f undefined */
6285
6286 case 0xe372: /* STCY - store character */
6287 case 0xe3c3: /* STCH - store character high */
6288 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
6289 if (record_full_arch_list_add_mem (oaddr, 1))
6290 return -1;
6291 break;
6292
6293 /* 0xe374 undefined */
6294
6295 case 0xe375: /* LAEY - load address extended */
6296 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6297 return -1;
6298 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
6299 return -1;
6300 break;
6301
6302 /* 0xe37d-0xe37f undefined */
566c56c9
MK
6303
6304 case 0xe385: /* LGAT - load and trap */
6305 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
6306 case 0xe39d: /* LLGFAT - load logical and trap */
55efceab
AA
6307 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
6308 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
566c56c9
MK
6309 case 0xe721: /* VLGV - vector load gr from vr element */
6310 /* 64-bit gpr destination + fpc for possible DXC write */
6311 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6312 return -1;
6313 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6314 return -1;
6315 break;
6316
6317 /* 0xe38a-0xe38d undefined */
6318 /* 0xe392-0xe393 undefined */
6319 /* 0xe39a-0xe39b undefined */
6320 /* 0xe39e undefined */
6321
6322 case 0xe39f: /* LAT - load and trap */
6323 /* 32-bit gpr destination + fpc for possible DXC write */
6324 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6325 return -1;
6326 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6327 return -1;
6328 break;
6329
6330 /* 0xe3a0-0xe3bf undefined */
6331
6332 case 0xe3c0: /* LBH - load byte high */
6333 case 0xe3c2: /* LLCH - load logical character high */
6334 case 0xe3c4: /* LHH - load halfword high */
6335 case 0xe3c6: /* LLHH - load logical halfword high */
6336 case 0xe3ca: /* LFH - load high */
6337 case 0xebe0: /* LOCFH - load high on condition */
6338 /* 32-bit high gpr destination */
6339 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6340 return -1;
6341 break;
6342
6343 /* 0xe3c1 undefined */
6344 /* 0xe3c5 undefined */
6345
6346 case 0xe3c8: /* LFHAT - load high and trap */
6347 /* 32-bit high gpr destination + fpc for possible DXC write */
6348 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6349 return -1;
6350 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6351 return -1;
6352 break;
6353
6354 /* 0xe3c9 undefined */
6355 /* 0xe3cc undefined */
6356 /* 0xe3ce undefined */
6357 /* 0xe3d0-0xe3ff undefined */
6358
55efceab
AA
6359 case 0xe634: /* VPKZ - vector pack zoned */
6360 case 0xe635: /* VLRL - vector load rightmost with immed. length */
6361 case 0xe637: /* VLRLR - vector load rightmost with length */
6362 case 0xe649: /* VLIP - vector load immediate decimal */
566c56c9
MK
6363 case 0xe700: /* VLEB - vector load element */
6364 case 0xe701: /* VLEH - vector load element */
6365 case 0xe702: /* VLEG - vector load element */
6366 case 0xe703: /* VLEF - vector load element */
6367 case 0xe704: /* VLLEZ - vector load logical element and zero */
6368 case 0xe705: /* VLREP - vector load and replicate */
6369 case 0xe706: /* VL - vector load */
6370 case 0xe707: /* VLBB - vector load to block bounduary */
6371 case 0xe712: /* VGEG - vector gather element */
6372 case 0xe713: /* VGEF - vector gather element */
6373 case 0xe722: /* VLVG - vector load vr element from gr */
6374 case 0xe730: /* VESL - vector element shift left */
6375 case 0xe733: /* VERLL - vector element rotate left logical */
6376 case 0xe737: /* VLL - vector load with length */
6377 case 0xe738: /* VESRL - vector element shift right logical */
6378 case 0xe73a: /* VESRA - vector element shift right arithmetic */
6379 case 0xe740: /* VLEIB - vector load element immediate */
6380 case 0xe741: /* VLEIH - vector load element immediate */
6381 case 0xe742: /* VLEIG - vector load element immediate */
6382 case 0xe743: /* VLEIF - vector load element immediate */
6383 case 0xe744: /* VGBM - vector generate byte mask */
6384 case 0xe745: /* VREPI - vector replicate immediate */
6385 case 0xe746: /* VGM - vector generate mask */
6386 case 0xe74d: /* VREP - vector replicate */
6387 case 0xe750: /* VPOPCT - vector population count */
6388 case 0xe752: /* VCTZ - vector count trailing zeros */
6389 case 0xe753: /* VCLZ - vector count leading zeros */
6390 case 0xe756: /* VLR - vector load */
6391 case 0xe75f: /* VSEG -vector sign extend to doubleword */
6392 case 0xe760: /* VMRL - vector merge low */
6393 case 0xe761: /* VMRH - vector merge high */
6394 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
6395 case 0xe764: /* VSUM - vector sum across word */
6396 case 0xe765: /* VSUMG - vector sum across doubleword */
6397 case 0xe766: /* VCKSM - vector checksum */
6398 case 0xe767: /* VSUMQ - vector sum across quadword */
6399 case 0xe768: /* VN - vector and */
6400 case 0xe769: /* VNC - vector and with complement */
6401 case 0xe76a: /* VO - vector or */
6402 case 0xe76b: /* VNO - vector nor */
55efceab 6403 case 0xe76c: /* VNX - vector not exclusive or */
566c56c9 6404 case 0xe76d: /* VX - vector xor */
55efceab
AA
6405 case 0xe76e: /* VNN - vector nand */
6406 case 0xe76f: /* VOC - vector or with complement */
566c56c9
MK
6407 case 0xe770: /* VESLV - vector element shift left */
6408 case 0xe772: /* VERIM - vector element rotate and insert under mask */
6409 case 0xe773: /* VERLLV - vector element rotate left logical */
6410 case 0xe774: /* VSL - vector shift left */
6411 case 0xe775: /* VSLB - vector shift left by byte */
6412 case 0xe777: /* VSLDB - vector shift left double by byte */
6413 case 0xe778: /* VESRLV - vector element shift right logical */
6414 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
6415 case 0xe77c: /* VSRL - vector shift right logical */
6416 case 0xe77d: /* VSRLB - vector shift right logical by byte */
6417 case 0xe77e: /* VSRA - vector shift right arithmetic */
6418 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
6419 case 0xe784: /* VPDI - vector permute doubleword immediate */
55efceab 6420 case 0xe785: /* VBPERM - vector bit permute */
566c56c9
MK
6421 case 0xe78c: /* VPERM - vector permute */
6422 case 0xe78d: /* VSEL - vector select */
6423 case 0xe78e: /* VFMS - vector fp multiply and subtract */
6424 case 0xe78f: /* VFMA - vector fp multiply and add */
6425 case 0xe794: /* VPK - vector pack */
55efceab
AA
6426 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
6427 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
566c56c9
MK
6428 case 0xe7a1: /* VMLH - vector multiply logical high */
6429 case 0xe7a2: /* VML - vector multiply low */
6430 case 0xe7a3: /* VMH - vector multiply high */
6431 case 0xe7a4: /* VMLE - vector multiply logical even */
6432 case 0xe7a5: /* VMLO - vector multiply logical odd */
6433 case 0xe7a6: /* VME - vector multiply even */
6434 case 0xe7a7: /* VMO - vector multiply odd */
6435 case 0xe7a9: /* VMALH - vector multiply and add logical high */
6436 case 0xe7aa: /* VMAL - vector multiply and add low */
6437 case 0xe7ab: /* VMAH - vector multiply and add high */
6438 case 0xe7ac: /* VMALE - vector multiply and add logical even */
6439 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
6440 case 0xe7ae: /* VMAE - vector multiply and add even */
6441 case 0xe7af: /* VMAO - vector multiply and add odd */
6442 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
55efceab 6443 case 0xe7b8: /* VMSL - vector multiply sum logical */
566c56c9
MK
6444 case 0xe7b9: /* VACCC - vector add with carry compute carry */
6445 case 0xe7bb: /* VAC - vector add with carry */
6446 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
6447 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
6448 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
6449 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
6450 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
6451 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
6452 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
55efceab
AA
6453 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
6454 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
566c56c9
MK
6455 case 0xe7c7: /* VFI - vector load fp integer */
6456 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
6457 case 0xe7ce: /* VFSQ - vector fp square root */
6458 case 0xe7d4: /* VUPLL - vector unpack logical low */
6459 case 0xe7d6: /* VUPL - vector unpack low */
6460 case 0xe7d5: /* VUPLH - vector unpack logical high */
6461 case 0xe7d7: /* VUPH - vector unpack high */
6462 case 0xe7de: /* VLC - vector load complement */
6463 case 0xe7df: /* VLP - vector load positive */
6464 case 0xe7e2: /* VFA - vector fp subtract */
6465 case 0xe7e3: /* VFA - vector fp add */
6466 case 0xe7e5: /* VFD - vector fp divide */
6467 case 0xe7e7: /* VFM - vector fp multiply */
55efceab
AA
6468 case 0xe7ee: /* VFMIN - vector fp minimum */
6469 case 0xe7ef: /* VFMAX - vector fp maximum */
566c56c9
MK
6470 case 0xe7f0: /* VAVGL - vector average logical */
6471 case 0xe7f1: /* VACC - vector add and compute carry */
6472 case 0xe7f2: /* VAVG - vector average */
6473 case 0xe7f3: /* VA - vector add */
6474 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
6475 case 0xe7f7: /* VS - vector subtract */
6476 case 0xe7fc: /* VMNL - vector minimum logical */
6477 case 0xe7fd: /* VMXL - vector maximum logical */
6478 case 0xe7fe: /* VMN - vector minimum */
6479 case 0xe7ff: /* VMX - vector maximum */
6480 /* vector destination + FPC */
6481 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6482 return -1;
6483 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6484 return -1;
6485 break;
6486
55efceab
AA
6487 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
6488 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6489 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
6490 return -1;
6491 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6492 return -1;
6493 break;
6494
566c56c9
MK
6495 case 0xe708: /* VSTEB - vector store element */
6496 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6497 if (record_full_arch_list_add_mem (oaddr, 1))
6498 return -1;
6499 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6500 return -1;
6501 break;
6502
6503 case 0xe709: /* VSTEH - vector store element */
6504 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6505 if (record_full_arch_list_add_mem (oaddr, 2))
6506 return -1;
6507 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6508 return -1;
6509 break;
6510
6511 case 0xe70a: /* VSTEG - vector store element */
6512 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6513 if (record_full_arch_list_add_mem (oaddr, 8))
6514 return -1;
6515 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6516 return -1;
6517 break;
6518
6519 case 0xe70b: /* VSTEF - vector store element */
6520 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6521 if (record_full_arch_list_add_mem (oaddr, 4))
6522 return -1;
6523 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6524 return -1;
6525 break;
6526
6527 /* 0xe70c-0xe70d undefined */
6528
6529 case 0xe70e: /* VST - vector store */
6530 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
6531 if (record_full_arch_list_add_mem (oaddr, 16))
6532 return -1;
6533 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6534 return -1;
6535 break;
6536
6537 /* 0xe70f-0xe711 undefined */
6538 /* 0xe714-0xe719 undefined */
6539
6540 case 0xe71a: /* VSCEG - vector scatter element */
6541 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
6542 return -1;
6543 if (record_full_arch_list_add_mem (oaddr, 8))
6544 return -1;
6545 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6546 return -1;
6547 break;
6548
6549 case 0xe71b: /* VSCEF - vector scatter element */
6550 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
6551 return -1;
6552 if (record_full_arch_list_add_mem (oaddr, 4))
6553 return -1;
6554 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6555 return -1;
6556 break;
6557
6558 /* 0xe71c-0xe720 undefined */
6559 /* 0xe723-0xe726 undefined */
6560 /* 0xe728-0xe72f undefined */
6561 /* 0xe731-0xe732 undefined */
6562 /* 0xe734-0xe735 undefined */
6563
6564 case 0xe736: /* VLM - vector load multiple */
6565 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
6566 if (s390_record_vr (gdbarch, regcache, i))
6567 return -1;
6568 if (s390_record_vr (gdbarch, regcache, ivec[1]))
6569 return -1;
6570 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6571 return -1;
6572 break;
6573
6574 /* 0xe739 undefined */
6575 /* 0xe73b-0xe73d undefined */
6576
6577 case 0xe73e: /* VSTM - vector store multiple */
6578 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6579 if (ivec[0] <= ivec[1])
6580 n = ivec[1] - ivec[0] + 1;
6581 else
6582 n = ivec[1] + 0x20 - ivec[0] + 1;
6583 if (record_full_arch_list_add_mem (oaddr, n * 16))
6584 return -1;
6585 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6586 return -1;
6587 break;
6588
55efceab
AA
6589 case 0xe63c: /* VUPKZ - vector unpack zoned */
6590 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6591 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
6592 return -1;
6593 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6594 return -1;
6595 break;
6596
6597 case 0xe63f: /* VSTRLR - vector store rightmost with length */
566c56c9
MK
6598 case 0xe73f: /* VSTL - vector store with length */
6599 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6600 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
6601 tmp &= 0xffffffffu;
55efceab
AA
6602 if (tmp > 15)
6603 tmp = 15;
6604 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
566c56c9
MK
6605 return -1;
6606 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6607 return -1;
6608 break;
6609
6610 /* 0xe747-0xe749 undefined */
6611
55efceab
AA
6612 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
6613 case 0xe659: /* VSRP - vector shift and round decimal */
6614 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
6615 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
6616 case 0xe671: /* VAP - vector add decimal */
6617 case 0xe673: /* VSP - vector subtract decimal */
6618 case 0xe678: /* VMP - vector multiply decimal */
6619 case 0xe679: /* VMSP - vector multiply decimal */
6620 case 0xe67a: /* VDP - vector divide decimal */
6621 case 0xe67b: /* VRP - vector remainder decimal */
6622 case 0xe67e: /* VSDP - vector shift and divide decimal */
566c56c9
MK
6623 case 0xe74a: /* VFTCI - vector fp test data class immediate */
6624 case 0xe75c: /* VISTR - vector isolate string */
6625 case 0xe780: /* VFEE - vector find element equal */
6626 case 0xe781: /* VFENE - vector find element not equal */
6627 case 0xe782: /* VFA - vector find any element equal */
6628 case 0xe78a: /* VSTRC - vector string range compare */
6629 case 0xe795: /* VPKLS - vector pack logical saturate */
6630 case 0xe797: /* VPKS - vector pack saturate */
6631 case 0xe7e8: /* VFCE - vector fp compare equal */
6632 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
55efceab 6633 case 0xe7eb: /* VFCH - vector fp compare high */
566c56c9
MK
6634 case 0xe7f8: /* VCEQ - vector compare equal */
6635 case 0xe7f9: /* VCHL - vector compare high logical */
6636 case 0xe7fb: /* VCH - vector compare high */
6637 /* vector destination + flags + FPC */
6638 if (s390_record_vr (gdbarch, regcache, ivec[0]))
6639 return -1;
6640 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6641 return -1;
6642 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6643 return -1;
6644 break;
6645
55efceab
AA
6646 case 0xe65f: /* VTP - vector test decimal */
6647 /* flags + FPC */
6648 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6649 return -1;
6650 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6651 return -1;
6652 break;
6653
566c56c9
MK
6654 /* 0xe74b-0xe74c undefined */
6655 /* 0xe74e-0xe74f undefined */
6656 /* 0xe751 undefined */
6657 /* 0xe754-0xe755 undefined */
6658 /* 0xe757-0xe75b undefined */
6659 /* 0xe75d-0xe75e undefined */
6660 /* 0xe763 undefined */
566c56c9
MK
6661 /* 0xe771 undefined */
6662 /* 0xe776 undefined */
6663 /* 0xe779 undefined */
6664 /* 0xe77b undefined */
6665 /* 0xe783 undefined */
55efceab 6666 /* 0xe786-0xe789 undefined */
566c56c9
MK
6667 /* 0xe78b undefined */
6668 /* 0xe790-0xe793 undefined */
6669 /* 0xe796 undefined */
55efceab
AA
6670 /* 0xe798-0xe79d undefined */
6671 /* 0xe7a0 undefined */
6672 /* 0xe7a8 undefined */
566c56c9 6673 /* 0xe7b0-0xe7b3 undefined */
55efceab 6674 /* 0xe7b5-0xe7b7 undefined */
566c56c9
MK
6675 /* 0xe7ba undefined */
6676 /* 0xe7be undefined */
6677 /* 0xe7c6 undefined */
6678 /* 0xe7c8-0xe7c9 undefined */
6679
55efceab 6680 case 0xe677: /* VCP - vector compare decimal */
566c56c9
MK
6681 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
6682 case 0xe7cb: /* WFC - vector fp compare scalar */
6683 case 0xe7d8: /* VTM - vector test under mask */
6684 case 0xe7d9: /* VECL - vector element compare logical */
6685 case 0xe7db: /* VEC - vector element compare */
6686 case 0xed08: /* KEB - compare and signal */
6687 case 0xed09: /* CEB - compare */
6688 case 0xed18: /* KDB - compare and signal */
6689 case 0xed19: /* CDB - compare */
6690 /* flags + fpc only */
6691 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6692 return -1;
6693 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6694 return -1;
6695 break;
6696
6697 /* 0xe7cd undefined */
6698 /* 0xe7cf-0xe7d3 undefined */
6699 /* 0xe7da undefined */
6700 /* 0xe7dc-0xe7dd undefined */
6701 /* 0xe7e0-0xe7e1 undefined */
6702 /* 0xe7e4 undefined */
6703 /* 0xe7e6 undefined */
6704 /* 0xe7e9 undefined */
55efceab 6705 /* 0xe7ec-0xe7ed undefined */
566c56c9
MK
6706 /* 0xe7f4 undefined */
6707 /* 0xe7f6 undefined */
6708 /* 0xe7fa undefined */
6709
6710 /* 0xeb00-0xeb03 undefined */
6711
6712 case 0xeb04: /* LMG - load multiple */
6713 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6714 if (s390_record_gpr_g (gdbarch, regcache, i))
6715 return -1;
6716 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6717 return -1;
6718 break;
6719
6720 /* 0xeb05-0xeb09 undefined */
6721 /* 0xeb0e undefined */
6722 /* 0xeb0f privileged: TRACG */
6723 /* 0xeb10-0xeb13 undefined */
6724
6725 case 0xeb14: /* CSY - compare and swap */
6726 case 0xebf4: /* LAN - load and and */
6727 case 0xebf6: /* LAO - load and or */
6728 case 0xebf7: /* LAX - load and xor */
6729 case 0xebf8: /* LAA - load and add */
6730 case 0xebfa: /* LAAL - load and add logical */
6731 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6732 if (record_full_arch_list_add_mem (oaddr, 4))
6733 return -1;
6734 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6735 return -1;
6736 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6737 return -1;
6738 break;
6739
6740 /* 0xeb15-0xeb1b undefined */
6741 /* 0xeb1e-0xeb1f undefined */
6742 /* 0xeb22 undefined */
6743
6744 case 0xeb23: /* CLT - compare logical and trap */
6745 case 0xeb2b: /* CLGT - compare logical and trap */
6746 /* fpc only - including possible DXC write for trapping insns */
6747 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6748 return -1;
6749 break;
6750
6751 case 0xeb24: /* STMG - store multiple */
6752 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6753 if (inib[2] <= inib[3])
6754 n = inib[3] - inib[2] + 1;
6755 else
6756 n = inib[3] + 0x10 - inib[2] + 1;
6757 if (record_full_arch_list_add_mem (oaddr, n * 8))
6758 return -1;
6759 break;
6760
6761 /* 0xeb25 privileged */
6762
6763 case 0xeb26: /* STMH - store multiple high */
6764 case 0xeb90: /* STMY - store multiple */
6765 case 0xeb9b: /* STAMY - store access multiple */
6766 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6767 if (inib[2] <= inib[3])
6768 n = inib[3] - inib[2] + 1;
6769 else
6770 n = inib[3] + 0x10 - inib[2] + 1;
6771 if (record_full_arch_list_add_mem (oaddr, n * 4))
6772 return -1;
6773 break;
6774
6775 /* 0xeb27-0xeb2a undefined */
6776
6777 case 0xeb2c: /* STCMH - store characters under mask */
6778 case 0xeb2d: /* STCMY - store characters under mask */
6779 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6780 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
6781 return -1;
6782 break;
6783
6784 /* 0xeb2e undefined */
6785 /* 0xeb2f privileged */
6786
6787 case 0xeb30: /* CSG - compare and swap */
6788 case 0xebe4: /* LANG - load and and */
6789 case 0xebe6: /* LAOG - load and or */
6790 case 0xebe7: /* LAXG - load and xor */
6791 case 0xebe8: /* LAAG - load and add */
6792 case 0xebea: /* LAALG - load and add logical */
6793 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6794 if (record_full_arch_list_add_mem (oaddr, 8))
6795 return -1;
6796 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6797 return -1;
6798 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6799 return -1;
6800 break;
6801
6802 case 0xeb31: /* CDSY - compare double and swap */
6803 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6804 if (record_full_arch_list_add_mem (oaddr, 8))
6805 return -1;
6806 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6807 return -1;
6808 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6809 return -1;
6810 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6811 return -1;
6812 break;
6813
6814 /* 0xeb32-0xeb3d undefined */
6815
6816 case 0xeb3e: /* CDSG - compare double and swap */
6817 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6818 if (record_full_arch_list_add_mem (oaddr, 16))
6819 return -1;
6820 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6821 return -1;
6822 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6823 return -1;
6824 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6825 return -1;
6826 break;
6827
6828 /* 0xeb3f-0xeb43 undefined */
6829 /* 0xeb46-0xeb4b undefined */
6830 /* 0xeb4d-0xeb50 undefined */
6831
6832 case 0xeb52: /* MVIY - move */
6833 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6834 if (record_full_arch_list_add_mem (oaddr, 1))
6835 return -1;
6836 break;
6837
6838 case 0xeb54: /* NIY - and */
6839 case 0xeb56: /* OIY - or */
6840 case 0xeb57: /* XIY - xor */
6841 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6842 if (record_full_arch_list_add_mem (oaddr, 1))
6843 return -1;
6844 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6845 return -1;
6846 break;
6847
6848 /* 0xeb53 undefined */
6849 /* 0xeb58-0xeb69 undefined */
6850
6851 case 0xeb6a: /* ASI - add immediate */
6852 case 0xeb6e: /* ALSI - add immediate */
6853 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6854 if (record_full_arch_list_add_mem (oaddr, 4))
6855 return -1;
6856 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6857 return -1;
6858 break;
6859
6860 /* 0xeb6b-0xeb6d undefined */
6861 /* 0xeb6f-0xeb79 undefined */
6862
6863 case 0xeb7a: /* AGSI - add immediate */
6864 case 0xeb7e: /* ALGSI - add immediate */
6865 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6866 if (record_full_arch_list_add_mem (oaddr, 8))
6867 return -1;
6868 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6869 return -1;
6870 break;
6871
6872 /* 0xeb7b-0xeb7d undefined */
6873 /* 0xeb7f undefined */
6874
6875 case 0xeb80: /* ICMH - insert characters under mask */
6876 /* 32-bit high gpr destination + flags */
6877 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6878 return -1;
6879 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6880 return -1;
6881 break;
6882
6883 /* 0xeb82-0xeb8d undefined */
6884
6885 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6886 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6887 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6888 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6889 if (record_full_arch_list_add_mem (oaddr, tmp))
6890 return -1;
6891 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6892 return -1;
6893 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6894 return -1;
6895 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6896 return -1;
6897 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6898 return -1;
6899 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6900 return -1;
6901 break;
6902
6903 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6904 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6905 return -1;
6906 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6907 return -1;
6908 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6909 return -1;
6910 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6911 return -1;
6912 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6913 return -1;
6914 break;
6915
6916 /* 0xeb91-0xeb95 undefined */
6917
6918 case 0xeb96: /* LMH - load multiple high */
6919 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6920 if (s390_record_gpr_h (gdbarch, regcache, i))
6921 return -1;
6922 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6923 return -1;
6924 break;
6925
6926 /* 0xeb97 undefined */
6927
6928 case 0xeb98: /* LMY - load multiple */
6929 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6930 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6931 return -1;
6932 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6933 return -1;
6934 break;
6935
6936 /* 0xeb99 undefined */
6937
6938 case 0xeb9a: /* LAMY - load access multiple */
6939 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6940 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6941 return -1;
6942 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6943 return -1;
6944 break;
6945
6946 /* 0xeb9c-0xebbf undefined */
6947 /* 0xebc1-0xebdb undefined */
6948 /* 0xebe5 undefined */
6949 /* 0xebe9 undefined */
6950 /* 0xebeb-0xebf1 undefined */
6951 /* 0xebf5 undefined */
6952 /* 0xebf9 undefined */
6953 /* 0xebfb-0xebff undefined */
6954
6955 /* 0xed00-0xed03 undefined */
6956
6957 case 0xed04: /* LDEB - load lengthened */
6958 case 0xed0c: /* MDEB - multiply */
6959 case 0xed0d: /* DEB - divide */
6960 case 0xed14: /* SQEB - square root */
6961 case 0xed15: /* SQDB - square root */
6962 case 0xed17: /* MEEB - multiply */
6963 case 0xed1c: /* MDB - multiply */
6964 case 0xed1d: /* DDB - divide */
6965 /* float destination + fpc */
6966 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6967 return -1;
6968 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6969 return -1;
6970 break;
6971
6972 case 0xed05: /* LXDB - load lengthened */
6973 case 0xed06: /* LXEB - load lengthened */
6974 case 0xed07: /* MXDB - multiply */
6975 /* float pair destination + fpc */
6976 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6977 return -1;
6978 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6979 return -1;
6980 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6981 return -1;
6982 break;
6983
6984 case 0xed0a: /* AEB - add */
6985 case 0xed0b: /* SEB - subtract */
6986 case 0xed1a: /* ADB - add */
6987 case 0xed1b: /* SDB - subtract */
6988 /* float destination + flags + fpc */
6989 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6990 return -1;
6991 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6992 return -1;
6993 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6994 return -1;
6995 break;
6996
6997 case 0xed0e: /* MAEB - multiply and add */
6998 case 0xed0f: /* MSEB - multiply and subtract */
6999 case 0xed1e: /* MADB - multiply and add */
7000 case 0xed1f: /* MSDB - multiply and subtract */
7001 case 0xed40: /* SLDT - shift significand left */
7002 case 0xed41: /* SRDT - shift significand right */
7003 case 0xedaa: /* CDZT - convert from zoned */
7004 case 0xedae: /* CDPT - convert from packed */
7005 /* float destination [RXF] + fpc */
7006 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
7007 return -1;
7008 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7009 return -1;
7010 break;
7011
7012 /* 0xed13 undefined */
7013 /* 0xed16 undefined */
7014 /* 0xed20-0xed23 undefined */
7015
7016 case 0xed24: /* LDE - load lengthened */
7017 case 0xed34: /* SQE - square root */
7018 case 0xed35: /* SQD - square root */
7019 case 0xed37: /* MEE - multiply */
7020 case 0xed64: /* LEY - load */
7021 case 0xed65: /* LDY - load */
7022 /* float destination */
7023 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
7024 return -1;
7025 break;
7026
7027 case 0xed25: /* LXD - load lengthened */
7028 case 0xed26: /* LXE - load lengthened */
7029 /* float pair destination */
7030 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
7031 return -1;
7032 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
7033 return -1;
7034 break;
7035
7036 /* 0xed27-0xed2d undefined */
7037
7038 case 0xed2e: /* MAE - multiply and add */
7039 case 0xed2f: /* MSE - multiply and subtract */
7040 case 0xed38: /* MAYL - multiply and add unnormalized */
7041 case 0xed39: /* MYL - multiply unnormalized */
7042 case 0xed3c: /* MAYH - multiply and add unnormalized */
7043 case 0xed3d: /* MYH - multiply unnormalized */
7044 case 0xed3e: /* MAD - multiply and add */
7045 case 0xed3f: /* MSD - multiply and subtract */
7046 /* float destination [RXF] */
7047 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
7048 return -1;
7049 break;
7050
7051 /* 0xed30-0xed33 undefined */
7052 /* 0xed36 undefined */
7053
7054 case 0xed3a: /* MAY - multiply and add unnormalized */
7055 case 0xed3b: /* MY - multiply unnormalized */
7056 /* float pair destination [RXF] */
7057 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
7058 return -1;
7059 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
7060 return -1;
7061 break;
7062
7063 /* 0xed42-0xed47 undefind */
7064
7065 case 0xed48: /* SLXT - shift significand left */
7066 case 0xed49: /* SRXT - shift significand right */
7067 case 0xedab: /* CXZT - convert from zoned */
7068 case 0xedaf: /* CXPT - convert from packed */
7069 /* float pair destination [RXF] + fpc */
7070 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
7071 return -1;
7072 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
7073 return -1;
7074 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7075 return -1;
7076 break;
7077
7078 /* 0xed4a-0xed4f undefind */
7079 /* 0xed52-0xed53 undefind */
7080 /* 0xed56-0xed57 undefind */
7081 /* 0xed5a-0xed63 undefind */
7082 /* 0xed68-0xeda7 undefined */
7083
7084 case 0xeda8: /* CZDT - convert to zoned */
7085 case 0xeda9: /* CZXT - convert to zoned */
7086 case 0xedac: /* CPDT - convert to packed */
7087 case 0xedad: /* CPXT - convert to packed */
7088 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7089 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
7090 return -1;
7091 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7092 return -1;
7093 break;
7094
7095 /* 0xedb0-0xedff undefined */
7096
7097 default:
7098 goto UNKNOWN_OP;
7099 }
7100 break;
7101
7102 /* 0xe4 undefined */
7103
7104 case 0xe5:
7105 /* SSE/SIL-format instruction */
7106 switch (insn[0])
7107 {
7108 /* 0xe500-0xe543 undefined, privileged, or unsupported */
7109
7110 case 0xe544: /* MVHHI - move */
7111 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7112 if (record_full_arch_list_add_mem (oaddr, 2))
7113 return -1;
7114 break;
7115
7116 /* 0xe545-0xe547 undefined */
7117
7118 case 0xe548: /* MVGHI - move */
7119 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7120 if (record_full_arch_list_add_mem (oaddr, 8))
7121 return -1;
7122 break;
7123
7124 /* 0xe549-0xe54b undefined */
7125
7126 case 0xe54c: /* MVHI - move */
7127 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7128 if (record_full_arch_list_add_mem (oaddr, 4))
7129 return -1;
7130 break;
7131
7132 /* 0xe54d-0xe553 undefined */
7133
7134 case 0xe554: /* CHHSI - compare halfword immediate */
7135 case 0xe555: /* CLHHSI - compare logical immediate */
7136 case 0xe558: /* CGHSI - compare halfword immediate */
7137 case 0xe559: /* CLGHSI - compare logical immediate */
7138 case 0xe55c: /* CHSI - compare halfword immediate */
7139 case 0xe55d: /* CLFHSI - compare logical immediate */
7140 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7141 return -1;
7142 break;
7143
7144 /* 0xe556-0xe557 undefined */
7145 /* 0xe55a-0xe55b undefined */
7146 /* 0xe55e-0xe55f undefined */
7147
7148 case 0xe560: /* TBEGIN - transaction begin */
7149 /* The transaction will be immediately aborted after this
7150 instruction, due to single-stepping. This instruction is
7151 only supported so that the program can fail a few times
7152 and go to the non-transactional fallback. */
7153 if (inib[4])
7154 {
7155 /* Transaction diagnostic block - user. */
7156 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7157 if (record_full_arch_list_add_mem (oaddr, 256))
7158 return -1;
7159 }
7160 /* Transaction diagnostic block - supervisor. */
7161 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
7162 return -1;
7163 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
7164 return -1;
7165 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
7166 return -1;
7167 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
7168 return -1;
7169 for (i = 0; i < 16; i++)
7170 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
7171 return -1;
7172 /* And flags. */
7173 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7174 return -1;
7175 break;
7176
7177 /* 0xe561 unsupported: TBEGINC */
7178 /* 0xe562-0xe5ff undefined */
7179
7180 default:
7181 goto UNKNOWN_OP;
7182 }
7183 break;
7184
566c56c9
MK
7185 case 0xec:
7186 /* RIE/RIS/RRS-format instruction */
7187 switch (ibyte[0] << 8 | ibyte[5])
7188 {
7189 /* 0xec00-0xec41 undefined */
7190
7191 case 0xec42: /* LOCHI - load halfword immediate on condition */
7192 case 0xec51: /* RISBLG - rotate then insert selected bits low */
7193 /* 32-bit or native gpr destination */
7194 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7195 return -1;
7196 break;
7197
7198 /* 0xec43 undefined */
7199
7200 case 0xec44: /* BRXHG - branch relative on index high */
7201 case 0xec45: /* BRXLG - branch relative on index low or equal */
7202 case 0xec46: /* LOCGHI - load halfword immediate on condition */
7203 case 0xec59: /* RISBGN - rotate then insert selected bits */
7204 /* 64-bit gpr destination */
7205 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7206 return -1;
7207 break;
7208
7209 /* 0xec47-0xec4d undefined */
7210
7211 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
7212 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
7213 /* 32-bit high gpr destination */
7214 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
7215 return -1;
7216 break;
7217
7218 /* 0xec4f-0xec50 undefined */
7219 /* 0xec52-0xec53 undefined */
7220
7221 case 0xec54: /* RNSBG - rotate then and selected bits */
7222 case 0xec55: /* RISBG - rotate then insert selected bits */
7223 case 0xec56: /* ROSBG - rotate then or selected bits */
7224 case 0xec57: /* RXSBG - rotate then xor selected bits */
7225 case 0xecd9: /* AGHIK - add immediate */
7226 case 0xecdb: /* ALGHSIK - add logical immediate */
7227 /* 64-bit gpr destination + flags */
7228 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7229 return -1;
7230 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7231 return -1;
7232 break;
7233
7234 /* 0xec58 undefined */
7235 /* 0xec5a-0xec5c undefined */
7236 /* 0xec5e-0xec63 undefined */
7237
7238 case 0xec64: /* CGRJ - compare and branch relative */
7239 case 0xec65: /* CLGRJ - compare logical and branch relative */
7240 case 0xec76: /* CRJ - compare and branch relative */
7241 case 0xec77: /* CLRJ - compare logical and branch relative */
7242 case 0xec7c: /* CGIJ - compare immediate and branch relative */
7243 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
7244 case 0xec7e: /* CIJ - compare immediate and branch relative */
7245 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
7246 case 0xece4: /* CGRB - compare and branch */
7247 case 0xece5: /* CLGRB - compare logical and branch */
7248 case 0xecf6: /* CRB - compare and branch */
7249 case 0xecf7: /* CLRB - compare logical and branch */
7250 case 0xecfc: /* CGIB - compare immediate and branch */
7251 case 0xecfd: /* CLGIB - compare logical immediate and branch */
7252 case 0xecfe: /* CIB - compare immediate and branch */
7253 case 0xecff: /* CLIB - compare logical immediate and branch */
7254 break;
7255
7256 /* 0xec66-0xec6f undefined */
7257
7258 case 0xec70: /* CGIT - compare immediate and trap */
7259 case 0xec71: /* CLGIT - compare logical immediate and trap */
7260 case 0xec72: /* CIT - compare immediate and trap */
7261 case 0xec73: /* CLFIT - compare logical immediate and trap */
7262 /* fpc only - including possible DXC write for trapping insns */
7263 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7264 return -1;
7265 break;
7266
7267 /* 0xec74-0xec75 undefined */
7268 /* 0xec78-0xec7b undefined */
7269
7270 /* 0xec80-0xecd7 undefined */
7271
7272 case 0xecd8: /* AHIK - add immediate */
7273 case 0xecda: /* ALHSIK - add logical immediate */
7274 /* 32-bit gpr destination + flags */
7275 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7276 return -1;
7277 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7278 return -1;
7279 break;
7280
7281 /* 0xecdc-0xece3 undefined */
7282 /* 0xece6-0xecf5 undefined */
7283 /* 0xecf8-0xecfb undefined */
7284
7285 default:
7286 goto UNKNOWN_OP;
7287 }
7288 break;
7289
7290 case 0xee: /* PLO - perform locked operation */
7291 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
7292 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7293 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
7294 if (!(tmp & 0x100))
7295 {
7296 uint8_t fc = tmp & 0xff;
7297 gdb_byte buf[8];
7298 switch (fc)
7299 {
7300 case 0x00: /* CL */
7301 /* op1c */
7302 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7303 return -1;
7304 /* op3 */
7305 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7306 return -1;
7307 break;
7308
7309 case 0x01: /* CLG */
7310 /* op1c */
7311 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7312 return -1;
7313 /* op3 */
7314 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7315 return -1;
7316 break;
7317
7318 case 0x02: /* CLGR */
7319 /* op1c */
7320 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7321 return -1;
7322 /* op3 */
7323 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7324 return -1;
7325 break;
7326
7327 case 0x03: /* CLX */
7328 /* op1c */
7329 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7330 return -1;
7331 /* op3 */
7332 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7333 return -1;
7334 break;
7335
7336 case 0x08: /* DCS */
7337 /* op3c */
7338 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
7339 return -1;
7340 /* fallthru */
7341 case 0x0c: /* CSST */
7342 /* op4 */
7343 if (record_full_arch_list_add_mem (oaddr2, 4))
7344 return -1;
7345 goto CS;
7346
7347 case 0x14: /* CSTST */
7348 /* op8 */
7349 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7350 return -1;
7351 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7352 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7353 if (record_full_arch_list_add_mem (oaddr3, 4))
7354 return -1;
7355 /* fallthru */
7356 case 0x10: /* CSDST */
7357 /* op6 */
7358 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7359 return -1;
7360 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7361 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7362 if (record_full_arch_list_add_mem (oaddr3, 4))
7363 return -1;
7364 /* op4 */
7365 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7366 return -1;
7367 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7368 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7369 if (record_full_arch_list_add_mem (oaddr3, 4))
7370 return -1;
7371 /* fallthru */
7372 case 0x04: /* CS */
7373CS:
7374 /* op1c */
7375 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
7376 return -1;
7377 /* op2 */
7378 if (record_full_arch_list_add_mem (oaddr, 4))
7379 return -1;
7380 break;
7381
7382 case 0x09: /* DCSG */
7383 /* op3c */
7384 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
7385 return -1;
7386 goto CSSTG;
7387
7388 case 0x15: /* CSTSTG */
7389 /* op8 */
7390 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7391 return -1;
7392 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7393 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7394 if (record_full_arch_list_add_mem (oaddr3, 8))
7395 return -1;
7396 /* fallthru */
7397 case 0x11: /* CSDSTG */
7398 /* op6 */
7399 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7400 return -1;
7401 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7402 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7403 if (record_full_arch_list_add_mem (oaddr3, 8))
7404 return -1;
7405 /* fallthru */
7406 case 0x0d: /* CSSTG */
7407CSSTG:
7408 /* op4 */
7409 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7410 return -1;
7411 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7412 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7413 if (record_full_arch_list_add_mem (oaddr3, 8))
7414 return -1;
7415 /* fallthru */
7416 case 0x05: /* CSG */
7417 /* op1c */
7418 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
7419 return -1;
7420 /* op2 */
7421 if (record_full_arch_list_add_mem (oaddr, 8))
7422 return -1;
7423 break;
7424
7425 case 0x0a: /* DCSGR */
7426 /* op3c */
7427 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7428 return -1;
7429 /* fallthru */
7430 case 0x0e: /* CSSTGR */
7431 /* op4 */
7432 if (record_full_arch_list_add_mem (oaddr2, 8))
7433 return -1;
7434 goto CSGR;
7435
7436 case 0x16: /* CSTSTGR */
7437 /* op8 */
7438 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7439 return -1;
7440 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7441 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7442 if (record_full_arch_list_add_mem (oaddr3, 8))
7443 return -1;
7444 /* fallthru */
7445 case 0x12: /* CSDSTGR */
7446 /* op6 */
7447 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7448 return -1;
7449 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7450 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7451 if (record_full_arch_list_add_mem (oaddr3, 8))
7452 return -1;
7453 /* op4 */
7454 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7455 return -1;
7456 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7457 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7458 if (record_full_arch_list_add_mem (oaddr3, 8))
7459 return -1;
7460 /* fallthru */
7461 case 0x06: /* CSGR */
7462CSGR:
7463 /* op1c */
7464 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
7465 return -1;
7466 /* op2 */
7467 if (record_full_arch_list_add_mem (oaddr, 8))
7468 return -1;
7469 break;
7470
7471 case 0x0b: /* DCSX */
7472 /* op3c */
7473 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
7474 return -1;
7475 goto CSSTX;
7476
7477 case 0x17: /* CSTSTX */
7478 /* op8 */
7479 if (target_read_memory (oaddr2 + 0x88, buf, 8))
7480 return -1;
7481 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7482 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7483 if (record_full_arch_list_add_mem (oaddr3, 16))
7484 return -1;
7485 /* fallthru */
7486 case 0x13: /* CSDSTX */
7487 /* op6 */
7488 if (target_read_memory (oaddr2 + 0x68, buf, 8))
7489 return -1;
7490 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7491 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7492 if (record_full_arch_list_add_mem (oaddr3, 16))
7493 return -1;
7494 /* fallthru */
7495 case 0x0f: /* CSSTX */
7496CSSTX:
7497 /* op4 */
7498 if (target_read_memory (oaddr2 + 0x48, buf, 8))
7499 return -1;
7500 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
7501 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
7502 if (record_full_arch_list_add_mem (oaddr3, 16))
7503 return -1;
7504 /* fallthru */
7505 case 0x07: /* CSX */
7506 /* op1c */
7507 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
7508 return -1;
7509 /* op2 */
7510 if (record_full_arch_list_add_mem (oaddr, 16))
7511 return -1;
7512 break;
7513
7514 default:
7515 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
7516 fc, paddress (gdbarch, addr));
7517 return -1;
7518 }
7519 }
7520 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7521 return -1;
7522 break;
7523
7524 case 0xef: /* LMD - load multiple disjoint */
7525 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
7526 if (s390_record_gpr_g (gdbarch, regcache, i))
7527 return -1;
7528 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
7529 return -1;
7530 break;
7531
7532 case 0xf0: /* SRP - shift and round decimal */
7533 case 0xf8: /* ZAP - zero and add */
7534 case 0xfa: /* AP - add decimal */
7535 case 0xfb: /* SP - subtract decimal */
7536 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7537 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7538 return -1;
7539 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7540 return -1;
7541 /* DXC may be written */
7542 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7543 return -1;
7544 break;
7545
7546 case 0xf1: /* MVO - move with offset */
7547 case 0xf2: /* PACK - pack */
7548 case 0xf3: /* UNPK - unpack */
7549 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7550 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7551 return -1;
7552 break;
7553
7554 /* 0xf4-0xf7 undefined */
7555
7556 case 0xf9: /* CP - compare decimal */
7557 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
7558 return -1;
7559 /* DXC may be written */
7560 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7561 return -1;
7562 break;
7563
7564 case 0xfc: /* MP - multiply decimal */
7565 case 0xfd: /* DP - divide decimal */
7566 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
7567 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
7568 return -1;
7569 /* DXC may be written */
7570 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
7571 return -1;
7572 break;
7573
7574 /* 0xfe-0xff undefined */
7575
7576 default:
7577UNKNOWN_OP:
7578 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
7579 "at %s.\n", insn[0], paddress (gdbarch, addr));
7580 return -1;
7581 }
7582
7583 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
7584 return -1;
7585 if (record_full_arch_list_add_end ())
7586 return -1;
7587 return 0;
7588}
7589
7590/* Initialize linux_record_tdep if not initialized yet. */
7591
7592static void
7593s390_init_linux_record_tdep (struct linux_record_tdep *record_tdep,
7594 enum s390_abi_kind abi)
7595{
7596 /* These values are the size of the type that will be used in a system
7597 call. They are obtained from Linux Kernel source. */
7598
7599 if (abi == ABI_LINUX_ZSERIES)
7600 {
7601 record_tdep->size_pointer = 8;
7602 /* no _old_kernel_stat */
7603 record_tdep->size_tms = 32;
7604 record_tdep->size_loff_t = 8;
7605 record_tdep->size_flock = 32;
7606 record_tdep->size_ustat = 32;
7607 record_tdep->size_old_sigaction = 32;
7608 record_tdep->size_old_sigset_t = 8;
7609 record_tdep->size_rlimit = 16;
7610 record_tdep->size_rusage = 144;
7611 record_tdep->size_timeval = 16;
7612 record_tdep->size_timezone = 8;
7613 /* old_[ug]id_t never used */
7614 record_tdep->size_fd_set = 128;
7615 record_tdep->size_old_dirent = 280;
7616 record_tdep->size_statfs = 88;
7617 record_tdep->size_statfs64 = 88;
7618 record_tdep->size_sockaddr = 16;
7619 record_tdep->size_int = 4;
7620 record_tdep->size_long = 8;
7621 record_tdep->size_ulong = 8;
7622 record_tdep->size_msghdr = 56;
7623 record_tdep->size_itimerval = 32;
7624 record_tdep->size_stat = 144;
7625 /* old_utsname unused */
7626 record_tdep->size_sysinfo = 112;
7627 record_tdep->size_msqid_ds = 120;
7628 record_tdep->size_shmid_ds = 112;
7629 record_tdep->size_new_utsname = 390;
7630 record_tdep->size_timex = 208;
7631 record_tdep->size_mem_dqinfo = 24;
7632 record_tdep->size_if_dqblk = 72;
7633 record_tdep->size_fs_quota_stat = 80;
7634 record_tdep->size_timespec = 16;
7635 record_tdep->size_pollfd = 8;
7636 record_tdep->size_NFS_FHSIZE = 32;
7637 record_tdep->size_knfsd_fh = 132;
7638 record_tdep->size_TASK_COMM_LEN = 16;
7639 record_tdep->size_sigaction = 32;
7640 record_tdep->size_sigset_t = 8;
7641 record_tdep->size_siginfo_t = 128;
7642 record_tdep->size_cap_user_data_t = 12;
7643 record_tdep->size_stack_t = 24;
7644 record_tdep->size_off_t = 8;
7645 /* stat64 unused */
7646 record_tdep->size_gid_t = 4;
7647 record_tdep->size_uid_t = 4;
7648 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7649 record_tdep->size_flock64 = 32;
7650 record_tdep->size_io_event = 32;
7651 record_tdep->size_iocb = 64;
7652 record_tdep->size_epoll_event = 16;
7653 record_tdep->size_itimerspec = 32;
7654 record_tdep->size_mq_attr = 64;
7655 record_tdep->size_termios = 36;
7656 record_tdep->size_termios2 = 44;
7657 record_tdep->size_pid_t = 4;
7658 record_tdep->size_winsize = 8;
7659 record_tdep->size_serial_struct = 72;
7660 record_tdep->size_serial_icounter_struct = 80;
7661 record_tdep->size_size_t = 8;
7662 record_tdep->size_iovec = 16;
7663 record_tdep->size_time_t = 8;
7664 }
7665 else if (abi == ABI_LINUX_S390)
7666 {
7667 record_tdep->size_pointer = 4;
7668 record_tdep->size__old_kernel_stat = 32;
7669 record_tdep->size_tms = 16;
7670 record_tdep->size_loff_t = 8;
7671 record_tdep->size_flock = 16;
7672 record_tdep->size_ustat = 20;
7673 record_tdep->size_old_sigaction = 16;
7674 record_tdep->size_old_sigset_t = 4;
7675 record_tdep->size_rlimit = 8;
7676 record_tdep->size_rusage = 72;
7677 record_tdep->size_timeval = 8;
7678 record_tdep->size_timezone = 8;
7679 record_tdep->size_old_gid_t = 2;
7680 record_tdep->size_old_uid_t = 2;
7681 record_tdep->size_fd_set = 128;
7682 record_tdep->size_old_dirent = 268;
7683 record_tdep->size_statfs = 64;
7684 record_tdep->size_statfs64 = 88;
7685 record_tdep->size_sockaddr = 16;
7686 record_tdep->size_int = 4;
7687 record_tdep->size_long = 4;
7688 record_tdep->size_ulong = 4;
7689 record_tdep->size_msghdr = 28;
7690 record_tdep->size_itimerval = 16;
7691 record_tdep->size_stat = 64;
7692 /* old_utsname unused */
7693 record_tdep->size_sysinfo = 64;
7694 record_tdep->size_msqid_ds = 88;
7695 record_tdep->size_shmid_ds = 84;
7696 record_tdep->size_new_utsname = 390;
7697 record_tdep->size_timex = 128;
7698 record_tdep->size_mem_dqinfo = 24;
7699 record_tdep->size_if_dqblk = 72;
7700 record_tdep->size_fs_quota_stat = 80;
7701 record_tdep->size_timespec = 8;
7702 record_tdep->size_pollfd = 8;
7703 record_tdep->size_NFS_FHSIZE = 32;
7704 record_tdep->size_knfsd_fh = 132;
7705 record_tdep->size_TASK_COMM_LEN = 16;
7706 record_tdep->size_sigaction = 20;
7707 record_tdep->size_sigset_t = 8;
7708 record_tdep->size_siginfo_t = 128;
7709 record_tdep->size_cap_user_data_t = 12;
7710 record_tdep->size_stack_t = 12;
7711 record_tdep->size_off_t = 4;
7712 record_tdep->size_stat64 = 104;
7713 record_tdep->size_gid_t = 4;
7714 record_tdep->size_uid_t = 4;
7715 record_tdep->size_PAGE_SIZE = 0x1000; /* 4KB */
7716 record_tdep->size_flock64 = 32;
7717 record_tdep->size_io_event = 32;
7718 record_tdep->size_iocb = 64;
7719 record_tdep->size_epoll_event = 16;
7720 record_tdep->size_itimerspec = 16;
7721 record_tdep->size_mq_attr = 32;
7722 record_tdep->size_termios = 36;
7723 record_tdep->size_termios2 = 44;
7724 record_tdep->size_pid_t = 4;
7725 record_tdep->size_winsize = 8;
7726 record_tdep->size_serial_struct = 60;
7727 record_tdep->size_serial_icounter_struct = 80;
7728 record_tdep->size_size_t = 4;
7729 record_tdep->size_iovec = 8;
7730 record_tdep->size_time_t = 4;
7731 }
7732
7733 /* These values are the second argument of system call "sys_fcntl"
7734 and "sys_fcntl64". They are obtained from Linux Kernel source. */
7735 record_tdep->fcntl_F_GETLK = 5;
7736 record_tdep->fcntl_F_GETLK64 = 12;
7737 record_tdep->fcntl_F_SETLK64 = 13;
7738 record_tdep->fcntl_F_SETLKW64 = 14;
7739
7740 record_tdep->arg1 = S390_R2_REGNUM;
7741 record_tdep->arg2 = S390_R3_REGNUM;
7742 record_tdep->arg3 = S390_R4_REGNUM;
7743 record_tdep->arg4 = S390_R5_REGNUM;
7744 record_tdep->arg5 = S390_R6_REGNUM;
7745
7746 /* These values are the second argument of system call "sys_ioctl".
7747 They are obtained from Linux Kernel source.
7748 See arch/s390/include/uapi/asm/ioctls.h. */
7749
7750 record_tdep->ioctl_TCGETS = 0x5401;
7751 record_tdep->ioctl_TCSETS = 0x5402;
7752 record_tdep->ioctl_TCSETSW = 0x5403;
7753 record_tdep->ioctl_TCSETSF = 0x5404;
7754 record_tdep->ioctl_TCGETA = 0x5405;
7755 record_tdep->ioctl_TCSETA = 0x5406;
7756 record_tdep->ioctl_TCSETAW = 0x5407;
7757 record_tdep->ioctl_TCSETAF = 0x5408;
7758 record_tdep->ioctl_TCSBRK = 0x5409;
7759 record_tdep->ioctl_TCXONC = 0x540a;
7760 record_tdep->ioctl_TCFLSH = 0x540b;
7761 record_tdep->ioctl_TIOCEXCL = 0x540c;
7762 record_tdep->ioctl_TIOCNXCL = 0x540d;
7763 record_tdep->ioctl_TIOCSCTTY = 0x540e;
7764 record_tdep->ioctl_TIOCGPGRP = 0x540f;
7765 record_tdep->ioctl_TIOCSPGRP = 0x5410;
7766 record_tdep->ioctl_TIOCOUTQ = 0x5411;
7767 record_tdep->ioctl_TIOCSTI = 0x5412;
7768 record_tdep->ioctl_TIOCGWINSZ = 0x5413;
7769 record_tdep->ioctl_TIOCSWINSZ = 0x5414;
7770 record_tdep->ioctl_TIOCMGET = 0x5415;
7771 record_tdep->ioctl_TIOCMBIS = 0x5416;
7772 record_tdep->ioctl_TIOCMBIC = 0x5417;
7773 record_tdep->ioctl_TIOCMSET = 0x5418;
7774 record_tdep->ioctl_TIOCGSOFTCAR = 0x5419;
7775 record_tdep->ioctl_TIOCSSOFTCAR = 0x541a;
7776 record_tdep->ioctl_FIONREAD = 0x541b;
7777 record_tdep->ioctl_TIOCINQ = 0x541b; /* alias */
7778 record_tdep->ioctl_TIOCLINUX = 0x541c;
7779 record_tdep->ioctl_TIOCCONS = 0x541d;
7780 record_tdep->ioctl_TIOCGSERIAL = 0x541e;
7781 record_tdep->ioctl_TIOCSSERIAL = 0x541f;
7782 record_tdep->ioctl_TIOCPKT = 0x5420;
7783 record_tdep->ioctl_FIONBIO = 0x5421;
7784 record_tdep->ioctl_TIOCNOTTY = 0x5422;
7785 record_tdep->ioctl_TIOCSETD = 0x5423;
7786 record_tdep->ioctl_TIOCGETD = 0x5424;
7787 record_tdep->ioctl_TCSBRKP = 0x5425;
7788 record_tdep->ioctl_TIOCSBRK = 0x5427;
7789 record_tdep->ioctl_TIOCCBRK = 0x5428;
7790 record_tdep->ioctl_TIOCGSID = 0x5429;
7791 record_tdep->ioctl_TCGETS2 = 0x802c542a;
7792 record_tdep->ioctl_TCSETS2 = 0x402c542b;
7793 record_tdep->ioctl_TCSETSW2 = 0x402c542c;
7794 record_tdep->ioctl_TCSETSF2 = 0x402c542d;
7795 record_tdep->ioctl_TIOCGPTN = 0x80045430;
7796 record_tdep->ioctl_TIOCSPTLCK = 0x40045431;
7797 record_tdep->ioctl_FIONCLEX = 0x5450;
7798 record_tdep->ioctl_FIOCLEX = 0x5451;
7799 record_tdep->ioctl_FIOASYNC = 0x5452;
7800 record_tdep->ioctl_TIOCSERCONFIG = 0x5453;
7801 record_tdep->ioctl_TIOCSERGWILD = 0x5454;
7802 record_tdep->ioctl_TIOCSERSWILD = 0x5455;
7803 record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456;
7804 record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457;
7805 record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458;
7806 record_tdep->ioctl_TIOCSERGETLSR = 0x5459;
7807 record_tdep->ioctl_TIOCSERGETMULTI = 0x545a;
7808 record_tdep->ioctl_TIOCSERSETMULTI = 0x545b;
7809 record_tdep->ioctl_TIOCMIWAIT = 0x545c;
7810 record_tdep->ioctl_TIOCGICOUNT = 0x545d;
7811 record_tdep->ioctl_FIOQSIZE = 0x545e;
7812}
7813
47c9317e
PR
7814/* Validate the range of registers. NAMES must be known at compile time. */
7815
7816#define s390_validate_reg_range(feature, tdesc_data, start, names) \
7817do \
7818{ \
7819 for (int i = 0; i < ARRAY_SIZE (names); i++) \
7820 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
7821 return false; \
7822} \
7823while (0)
7824
7825/* Validate the target description. Also numbers registers contained in
7826 tdesc. */
7827
7828static bool
7829s390_tdesc_valid (struct gdbarch_tdep *tdep,
7830 struct tdesc_arch_data *tdesc_data)
7831{
7832 static const char *const psw[] = {
7833 "pswm", "pswa"
7834 };
7835 static const char *const gprs[] = {
7836 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
7837 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
7838 };
7839 static const char *const fprs[] = {
7840 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
7841 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
7842 };
7843 static const char *const acrs[] = {
7844 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
7845 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
7846 };
7847 static const char *const gprs_lower[] = {
7848 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
7849 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
7850 };
7851 static const char *const gprs_upper[] = {
7852 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
7853 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
7854 };
7855 static const char *const tdb_regs[] = {
7856 "tdb0", "tac", "tct", "atia",
7857 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
7858 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
7859 };
7860 static const char *const vxrs_low[] = {
7861 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
7862 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
7863 };
7864 static const char *const vxrs_high[] = {
7865 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
7866 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
7867 };
7868 static const char *const gs_cb[] = {
7869 "gsd", "gssm", "gsepla",
7870 };
7871 static const char *const gs_bc[] = {
7872 "bc_gsd", "bc_gssm", "bc_gsepla",
7873 };
7874
7875 const struct target_desc *tdesc = tdep->tdesc;
7876 const struct tdesc_feature *feature;
7877
7878 /* Core registers, i.e. general purpose and PSW. */
7879 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
7880 if (feature == NULL)
7881 return false;
7882
7883 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
7884
7885 if (tdesc_unnumbered_register (feature, "r0"))
7886 {
7887 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
7888 }
7889 else
7890 {
7891 tdep->have_upper = true;
7892 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
7893 gprs_lower);
7894 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
7895 gprs_upper);
7896 }
7897
7898 /* Floating point registers. */
7899 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
7900 if (feature == NULL)
7901 return false;
7902
7903 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
7904 return false;
7905
7906 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
7907
7908 /* Access control registers. */
7909 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
7910 if (feature == NULL)
7911 return false;
7912
7913 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
7914
7915 /* Optional GNU/Linux-specific "registers". */
7916 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
7917 if (feature)
7918 {
7919 tdesc_numbered_register (feature, tdesc_data,
7920 S390_ORIG_R2_REGNUM, "orig_r2");
7921
7922 if (tdesc_numbered_register (feature, tdesc_data,
7923 S390_LAST_BREAK_REGNUM, "last_break"))
7924 tdep->have_linux_v1 = true;
7925
7926 if (tdesc_numbered_register (feature, tdesc_data,
7927 S390_SYSTEM_CALL_REGNUM, "system_call"))
7928 tdep->have_linux_v2 = true;
7929
7930 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
7931 return false;
7932 }
7933
7934 /* Transaction diagnostic block. */
7935 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
7936 if (feature)
7937 {
7938 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
7939 tdb_regs);
7940 tdep->have_tdb = true;
7941 }
7942
7943 /* Vector registers. */
7944 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
7945 if (feature)
7946 {
7947 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
7948 vxrs_low);
7949 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
7950 vxrs_high);
7951 tdep->have_vx = true;
7952 }
7953
7954 /* Guarded-storage registers. */
7955 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
7956 if (feature)
7957 {
7958 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
7959 tdep->have_gs = true;
7960 }
7961
7962 /* Guarded-storage broadcast control. */
7963 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
7964 if (feature)
7965 {
7966 if (!tdep->have_gs)
7967 return false;
7968 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
7969 gs_bc);
7970 }
7971
7972 return true;
7973}
7974
21f6f5ff
PR
7975/* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
7976 memory after use. */
7977
7978static struct gdbarch_tdep *
7979s390_gdbarch_tdep_alloc ()
7980{
7981 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
7982
095085d8
PR
7983 tdep->tdesc = NULL;
7984
21f6f5ff
PR
7985 tdep->abi = ABI_NONE;
7986 tdep->vector_abi = S390_VECTOR_ABI_NONE;
7987
7988 tdep->gpr_full_regnum = -1;
7989 tdep->v0_full_regnum = -1;
7990 tdep->pc_regnum = -1;
7991 tdep->cc_regnum = -1;
7992
7993 tdep->have_upper = false;
ab9bcc67
PR
7994 tdep->have_linux_v1 = false;
7995 tdep->have_linux_v2 = false;
7996 tdep->have_tdb = false;
21f6f5ff
PR
7997 tdep->have_vx = false;
7998 tdep->have_gs = false;
7999
8000 return tdep;
8001}
8002
a8c99f38
JB
8003/* Set up gdbarch struct. */
8004
a78f21af 8005static struct gdbarch *
5769d3cd
AC
8006s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
8007{
7803799a 8008 const struct target_desc *tdesc = info.target_desc;
7803799a 8009 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
8010 static const char *const stap_register_prefixes[] = { "%", NULL };
8011 static const char *const stap_register_indirection_prefixes[] = { "(",
8012 NULL };
8013 static const char *const stap_register_indirection_suffixes[] = { ")",
8014 NULL };
7803799a 8015
21f6f5ff
PR
8016 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
8017 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
47c9317e
PR
8018 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
8019 info.tdesc_data = tdesc_data;
21f6f5ff 8020
7042632b
PR
8021 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
8022 set_gdbarch_char_signed (gdbarch, 0);
8023
8024 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
8025 We can safely let them default to 128-bit, since the debug info
8026 will give the size of type actually used in each case. */
8027 set_gdbarch_long_double_bit (gdbarch, 128);
8028 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8029
8030 /* Amount PC must be decremented by after a breakpoint. This is
8031 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
8032 always. */
8033 set_gdbarch_decr_pc_after_break (gdbarch, 2);
8034 /* Stack grows downward. */
8035 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
8036 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
8037 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
8038 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
8039 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
8040 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
8041 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
8042
8043 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
8044 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
8045 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
8046 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
8047 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
8048 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
8049 set_gdbarch_guess_tracepoint_registers (gdbarch, s390_guess_tracepoint_registers);
8050 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
8051 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
8052 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
8053 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
8054 set_tdesc_pseudo_register_reggroup_p (gdbarch,
8055 s390_pseudo_register_reggroup_p);
8056 set_gdbarch_ax_pseudo_register_collect (gdbarch,
8057 s390_ax_pseudo_register_collect);
8058 set_gdbarch_ax_pseudo_register_push_stack
8059 (gdbarch, s390_ax_pseudo_register_push_stack);
8060 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
8061
8062 /* Inferior function calls. */
8063 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
8064 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
8065 set_gdbarch_frame_align (gdbarch, s390_frame_align);
8066 set_gdbarch_return_value (gdbarch, s390_return_value);
8067
8068 /* Frame handling. */
8069 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
8070 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
8071 dwarf2_append_unwinders (gdbarch);
8072 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
8073 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
8074
8075 /* Displaced stepping. */
8076 set_gdbarch_displaced_step_copy_insn (gdbarch,
8077 s390_displaced_step_copy_insn);
8078 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
8079 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
8080 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
8081
7803799a
UW
8082 switch (info.bfd_arch_info->mach)
8083 {
8084 case bfd_mach_s390_31:
7042632b 8085 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7803799a
UW
8086 break;
8087
8088 case bfd_mach_s390_64:
7042632b
PR
8089 set_gdbarch_long_bit (gdbarch, 64);
8090 set_gdbarch_long_long_bit (gdbarch, 64);
8091 set_gdbarch_ptr_bit (gdbarch, 64);
8092 set_gdbarch_address_class_type_flags (gdbarch,
8093 s390_address_class_type_flags);
8094 set_gdbarch_address_class_type_flags_to_name (gdbarch,
8095 s390_address_class_type_flags_to_name);
8096 set_gdbarch_address_class_name_to_type_flags (gdbarch,
8097 s390_address_class_name_to_type_flags);
7803799a 8098 break;
7803799a
UW
8099 }
8100
7042632b
PR
8101 /* SystemTap functions. */
8102 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
8103 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
8104 stap_register_indirection_prefixes);
8105 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
8106 stap_register_indirection_suffixes);
8107
8108 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
8109 set_gdbarch_valid_disassembler_options (gdbarch,
8110 disassembler_options_s390 ());
8111
8112 /* Process record-replay */
8113 set_gdbarch_process_record (gdbarch, s390_process_record);
8114
8115 /* Miscellaneous. */
8116 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
8117 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
8118 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
8119
8120 /* Initialize the OSABI. */
8121 gdbarch_init_osabi (info, gdbarch);
7803799a
UW
8122
8123 /* Check any target description for validity. */
650f5e13
PR
8124 gdb_assert (tdesc_has_registers (tdep->tdesc));
8125 if (!s390_tdesc_valid (tdep, tdesc_data))
7803799a 8126 {
650f5e13
PR
8127 tdesc_data_cleanup (tdesc_data);
8128 xfree (tdep);
8129 gdbarch_free (gdbarch);
8130 return NULL;
7803799a 8131 }
5769d3cd 8132
417c80f9 8133 /* Determine vector ABI. */
417c80f9 8134#ifdef HAVE_ELF
21f6f5ff 8135 if (tdep->have_vx
417c80f9
AA
8136 && info.abfd != NULL
8137 && info.abfd->format == bfd_object
8138 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
8139 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8140 Tag_GNU_S390_ABI_Vector) == 2)
21f6f5ff 8141 tdep->vector_abi = S390_VECTOR_ABI_128;
417c80f9
AA
8142#endif
8143
7803799a
UW
8144 /* Find a candidate among extant architectures. */
8145 for (arches = gdbarch_list_lookup_by_info (arches, &info);
8146 arches != NULL;
8147 arches = gdbarch_list_lookup_by_info (arches->next, &info))
8148 {
21f6f5ff
PR
8149 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
8150 if (!tmp)
7803799a 8151 continue;
0eb97953
PR
8152 /* A program can 'choose' not to use the vector registers when they
8153 are present. Leading to the same tdesc but different tdep and
8154 thereby a different gdbarch. */
21f6f5ff 8155 if (tmp->vector_abi != tdep->vector_abi)
417c80f9 8156 continue;
47c9317e
PR
8157
8158 tdesc_data_cleanup (tdesc_data);
21f6f5ff
PR
8159 xfree (tdep);
8160 gdbarch_free (gdbarch);
7803799a
UW
8161 return arches->gdbarch;
8162 }
5769d3cd 8163
095085d8 8164 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
550bdf96 8165 set_gdbarch_register_name (gdbarch, s390_register_name);
7803799a
UW
8166
8167 /* Assign pseudo register numbers. */
8168 first_pseudo_reg = gdbarch_num_regs (gdbarch);
8169 last_pseudo_reg = first_pseudo_reg;
21f6f5ff 8170 if (tdep->have_upper)
7803799a
UW
8171 {
8172 tdep->gpr_full_regnum = last_pseudo_reg;
8173 last_pseudo_reg += 16;
8174 }
21f6f5ff 8175 if (tdep->have_vx)
550bdf96
AA
8176 {
8177 tdep->v0_full_regnum = last_pseudo_reg;
8178 last_pseudo_reg += 16;
8179 }
7803799a
UW
8180 tdep->pc_regnum = last_pseudo_reg++;
8181 tdep->cc_regnum = last_pseudo_reg++;
8182 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
8183 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 8184
a431654a 8185 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433 8186 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
f089c433 8187 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38 8188 frame_base_set_default (gdbarch, &s390_frame_base);
a8c99f38 8189
7042632b
PR
8190 return gdbarch;
8191}
1db4e8a0 8192
7042632b 8193/* Initialize OSABI common for GNU/Linux on 31- and 64-bit systems. */
70728992 8194
7042632b
PR
8195static void
8196s390_linux_init_abi_any (struct gdbarch_info info, struct gdbarch *gdbarch)
8197{
8198 linux_init_abi (info, gdbarch);
c642a434 8199
7042632b
PR
8200 /* Register handling. */
8201 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
8202 set_gdbarch_iterate_over_regset_sections (gdbarch,
8203 s390_iterate_over_regset_sections);
8204 set_gdbarch_write_pc (gdbarch, s390_write_pc);
8205 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
b0cf273e 8206
7042632b
PR
8207 /* Syscall handling. */
8208 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
5769d3cd 8209
7042632b
PR
8210 /* Frame handling. */
8211 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
982e9687
UW
8212 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
8213
b2756930
KB
8214 /* Enable TLS support. */
8215 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 8216 svr4_fetch_objfile_link_map);
b2756930 8217
566c56c9 8218 /* Support reverse debugging. */
566c56c9 8219 set_gdbarch_process_record_signal (gdbarch, s390_linux_record_signal);
566c56c9
MK
8220 s390_init_linux_record_tdep (&s390_linux_record_tdep, ABI_LINUX_S390);
8221 s390_init_linux_record_tdep (&s390x_linux_record_tdep, ABI_LINUX_ZSERIES);
7042632b 8222}
566c56c9 8223
7042632b 8224/* Initialize OSABI for GNU/Linux on 31-bit systems. */
65b48a81 8225
7042632b
PR
8226static void
8227s390_linux_init_abi_31 (struct gdbarch_info info, struct gdbarch *gdbarch)
8228{
8229 const struct target_desc *tdesc = info.target_desc;
8230 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8231
8232 tdep->abi = ABI_LINUX_S390;
8233 if (!tdesc_has_registers (tdesc))
8234 tdesc = tdesc_s390_linux32;
8235 tdep->tdesc = tdesc;
8236
8237 s390_linux_init_abi_any (info, gdbarch);
8238
8239 set_solib_svr4_fetch_link_map_offsets (gdbarch,
8240 svr4_ilp32_fetch_link_map_offsets);
8241 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
8242}
8243
8244/* Initialize OSABI for GNU/Linux on 64-bit systems. */
8245
8246static void
8247s390_linux_init_abi_64 (struct gdbarch_info info, struct gdbarch *gdbarch)
8248{
8249 const struct target_desc *tdesc = info.target_desc;
8250 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8251
8252 tdep->abi = ABI_LINUX_ZSERIES;
8253 if (!tdesc_has_registers (tdesc))
8254 tdesc = tdesc_s390x_linux64;
8255 tdep->tdesc = tdesc;
8256
8257 s390_linux_init_abi_any (info, gdbarch);
8258
8259 set_solib_svr4_fetch_link_map_offsets (gdbarch,
8260 svr4_lp64_fetch_link_map_offsets);
8261 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X);
5769d3cd
AC
8262}
8263
5769d3cd 8264void
5ae5f592 8265_initialize_s390_tdep (void)
5769d3cd 8266{
5769d3cd
AC
8267 /* Hook us into the gdbarch mechanism. */
8268 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 8269
7042632b
PR
8270 /* Hook us into the OSABI mechanism. */
8271 gdbarch_register_osabi (bfd_arch_s390, bfd_mach_s390_31, GDB_OSABI_LINUX,
8272 s390_linux_init_abi_31);
8273 gdbarch_register_osabi (bfd_arch_s390, bfd_mach_s390_64, GDB_OSABI_LINUX,
8274 s390_linux_init_abi_64);
8275
94eae614 8276 /* Initialize the GNU/Linux target descriptions. */
7803799a 8277 initialize_tdesc_s390_linux32 ();
c642a434
UW
8278 initialize_tdesc_s390_linux32v1 ();
8279 initialize_tdesc_s390_linux32v2 ();
7803799a 8280 initialize_tdesc_s390_linux64 ();
c642a434
UW
8281 initialize_tdesc_s390_linux64v1 ();
8282 initialize_tdesc_s390_linux64v2 ();
4ac33720 8283 initialize_tdesc_s390_te_linux64 ();
550bdf96
AA
8284 initialize_tdesc_s390_vx_linux64 ();
8285 initialize_tdesc_s390_tevx_linux64 ();
1b63490c 8286 initialize_tdesc_s390_gs_linux64 ();
7803799a 8287 initialize_tdesc_s390x_linux64 ();
c642a434
UW
8288 initialize_tdesc_s390x_linux64v1 ();
8289 initialize_tdesc_s390x_linux64v2 ();
4ac33720 8290 initialize_tdesc_s390x_te_linux64 ();
550bdf96
AA
8291 initialize_tdesc_s390x_vx_linux64 ();
8292 initialize_tdesc_s390x_tevx_linux64 ();
1b63490c 8293 initialize_tdesc_s390x_gs_linux64 ();
5769d3cd 8294}
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