Don't store the inferior's exit code for --return-child-result in a print routine.
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
ecd75fc8 3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
27#include "symtab.h"
28#include "target.h"
29#include "gdbcore.h"
30#include "gdbcmd.h"
5769d3cd 31#include "objfiles.h"
5769d3cd
AC
32#include "floatformat.h"
33#include "regcache.h"
a8c99f38
JB
34#include "trad-frame.h"
35#include "frame-base.h"
36#include "frame-unwind.h"
a431654a 37#include "dwarf2-frame.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
4ac33720 47#include "auxv.h"
237b092b 48#include "xml-syscall.h"
5769d3cd 49
55aa24fb
SDJ
50#include "stap-probe.h"
51#include "ax.h"
52#include "ax-gdb.h"
53#include "user-regs.h"
54#include "cli/cli-utils.h"
55#include <ctype.h>
04a83fee 56#include "elf/common.h"
55aa24fb 57
7803799a 58#include "features/s390-linux32.c"
c642a434
UW
59#include "features/s390-linux32v1.c"
60#include "features/s390-linux32v2.c"
7803799a 61#include "features/s390-linux64.c"
c642a434
UW
62#include "features/s390-linux64v1.c"
63#include "features/s390-linux64v2.c"
4ac33720 64#include "features/s390-te-linux64.c"
7803799a 65#include "features/s390x-linux64.c"
c642a434
UW
66#include "features/s390x-linux64v1.c"
67#include "features/s390x-linux64v2.c"
4ac33720 68#include "features/s390x-te-linux64.c"
7803799a 69
237b092b
AA
70#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
71#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
72
d0f54f9d
JB
73/* The tdep structure. */
74
75struct gdbarch_tdep
5769d3cd 76{
b0cf273e
JB
77 /* ABI version. */
78 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
79
7803799a
UW
80 /* Pseudo register numbers. */
81 int gpr_full_regnum;
82 int pc_regnum;
83 int cc_regnum;
84
d0f54f9d
JB
85 /* Core file register sets. */
86 const struct regset *gregset;
87 int sizeof_gregset;
88
89 const struct regset *fpregset;
90 int sizeof_fpregset;
91};
92
93
7803799a
UW
94/* ABI call-saved register information. */
95
96static int
97s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 98{
7803799a
UW
99 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
100
101 switch (tdep->abi)
6707b003 102 {
7803799a
UW
103 case ABI_LINUX_S390:
104 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
105 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
106 || regnum == S390_A0_REGNUM)
107 return 1;
6707b003 108
7803799a
UW
109 break;
110
111 case ABI_LINUX_ZSERIES:
112 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
113 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
114 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
115 return 1;
116
117 break;
118 }
119
120 return 0;
5769d3cd
AC
121}
122
c642a434
UW
123static int
124s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
125{
126 /* The last-break address is read-only. */
127 return regnum == S390_LAST_BREAK_REGNUM;
128}
129
130static void
131s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
132{
133 struct gdbarch *gdbarch = get_regcache_arch (regcache);
134 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
135
136 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
137
138 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
139 messing with the PC we just installed, if we happen to be within
140 an interrupted system call that the kernel wants to restart.
141
142 Note that after we return from the dummy call, the SYSTEM_CALL and
143 ORIG_R2 registers will be automatically restored, and the kernel
144 continues to restart the system call at this point. */
145 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
146 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
147}
148
7803799a 149
d0f54f9d
JB
150/* DWARF Register Mapping. */
151
2ccd1468 152static const short s390_dwarf_regmap[] =
d0f54f9d
JB
153{
154 /* General Purpose Registers. */
155 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
156 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
157 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
158 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
159
160 /* Floating Point Registers. */
161 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
162 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
163 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
164 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
165
166 /* Control Registers (not mapped). */
34201ae3
UW
167 -1, -1, -1, -1, -1, -1, -1, -1,
168 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d
JB
169
170 /* Access Registers. */
171 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
172 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
173 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
174 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
175
176 /* Program Status Word. */
177 S390_PSWM_REGNUM,
7803799a
UW
178 S390_PSWA_REGNUM,
179
180 /* GPR Lower Half Access. */
181 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
182 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
183 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
184 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 185
94eae614 186 /* GNU/Linux-specific registers (not mapped). */
c642a434 187 -1, -1, -1,
d0f54f9d
JB
188};
189
190/* Convert DWARF register number REG to the appropriate register
191 number used by GDB. */
a78f21af 192static int
d3f73121 193s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 194{
7803799a
UW
195 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
196
197 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
198 GPRs. Note that call frame information still refers to the 32-bit
199 lower halves, because s390_adjust_frame_regnum uses register numbers
200 66 .. 81 to access GPRs. */
201 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
202 return tdep->gpr_full_regnum + reg;
d0f54f9d 203
16aff9a6 204 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 205 return s390_dwarf_regmap[reg];
d0f54f9d 206
7803799a
UW
207 warning (_("Unmapped DWARF Register #%d encountered."), reg);
208 return -1;
209}
d0f54f9d 210
7803799a
UW
211/* Translate a .eh_frame register to DWARF register, or adjust a
212 .debug_frame register. */
213static int
214s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
215{
216 /* See s390_dwarf_reg_to_regnum for comments. */
217 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
218}
219
d0f54f9d 220
7803799a
UW
221/* Pseudo registers. */
222
2ccd1468
UW
223static int
224regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
225{
226 return (tdep->gpr_full_regnum != -1
227 && regnum >= tdep->gpr_full_regnum
228 && regnum <= tdep->gpr_full_regnum + 15);
229}
230
7803799a
UW
231static const char *
232s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 233{
7803799a 234 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 235
7803799a
UW
236 if (regnum == tdep->pc_regnum)
237 return "pc";
d0f54f9d 238
7803799a
UW
239 if (regnum == tdep->cc_regnum)
240 return "cc";
d0f54f9d 241
2ccd1468 242 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
243 {
244 static const char *full_name[] = {
245 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
246 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
247 };
248 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 249 }
7803799a
UW
250
251 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
252}
253
7803799a
UW
254static struct type *
255s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 256{
7803799a 257 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 258
7803799a
UW
259 if (regnum == tdep->pc_regnum)
260 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 261
7803799a
UW
262 if (regnum == tdep->cc_regnum)
263 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 264
2ccd1468 265 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
266 return builtin_type (gdbarch)->builtin_uint64;
267
268 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
269}
270
05d1431c 271static enum register_status
7803799a
UW
272s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
273 int regnum, gdb_byte *buf)
d0f54f9d 274{
7803799a 275 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 276 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 277 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
278 ULONGEST val;
279
7803799a 280 if (regnum == tdep->pc_regnum)
d0f54f9d 281 {
05d1431c
PA
282 enum register_status status;
283
284 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
285 if (status == REG_VALID)
286 {
287 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
288 val &= 0x7fffffff;
289 store_unsigned_integer (buf, regsize, byte_order, val);
290 }
291 return status;
7803799a 292 }
d0f54f9d 293
7803799a
UW
294 if (regnum == tdep->cc_regnum)
295 {
05d1431c
PA
296 enum register_status status;
297
298 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
299 if (status == REG_VALID)
300 {
301 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
302 val = (val >> 12) & 3;
303 else
304 val = (val >> 44) & 3;
305 store_unsigned_integer (buf, regsize, byte_order, val);
306 }
307 return status;
7803799a 308 }
d0f54f9d 309
2ccd1468 310 if (regnum_is_gpr_full (tdep, regnum))
7803799a 311 {
05d1431c 312 enum register_status status;
7803799a 313 ULONGEST val_upper;
05d1431c 314
7803799a
UW
315 regnum -= tdep->gpr_full_regnum;
316
05d1431c
PA
317 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
318 if (status == REG_VALID)
319 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
320 &val_upper);
321 if (status == REG_VALID)
322 {
323 val |= val_upper << 32;
324 store_unsigned_integer (buf, regsize, byte_order, val);
325 }
326 return status;
d0f54f9d 327 }
7803799a
UW
328
329 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
330}
331
332static void
7803799a
UW
333s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
334 int regnum, const gdb_byte *buf)
d0f54f9d 335{
7803799a 336 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 338 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
339 ULONGEST val, psw;
340
7803799a 341 if (regnum == tdep->pc_regnum)
d0f54f9d 342 {
7803799a
UW
343 val = extract_unsigned_integer (buf, regsize, byte_order);
344 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
345 {
346 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
347 val = (psw & 0x80000000) | (val & 0x7fffffff);
348 }
349 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
350 return;
351 }
d0f54f9d 352
7803799a
UW
353 if (regnum == tdep->cc_regnum)
354 {
355 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 356 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
357 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
358 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
359 else
360 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
361 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
362 return;
363 }
d0f54f9d 364
2ccd1468 365 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
366 {
367 regnum -= tdep->gpr_full_regnum;
368 val = extract_unsigned_integer (buf, regsize, byte_order);
369 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
370 val & 0xffffffff);
371 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
372 val >> 32);
373 return;
d0f54f9d 374 }
7803799a
UW
375
376 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
377}
378
379/* 'float' values are stored in the upper half of floating-point
380 registers, even though we are otherwise a big-endian platform. */
381
9acbedc0 382static struct value *
2ed3c037
UW
383s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
384 int regnum, struct frame_id frame_id)
d0f54f9d 385{
2ed3c037
UW
386 struct value *value = default_value_from_register (gdbarch, type,
387 regnum, frame_id);
744a8059
SP
388 check_typedef (type);
389
390 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
391 && TYPE_LENGTH (type) < 8)
9acbedc0 392 set_value_offset (value, 0);
d0f54f9d 393
9acbedc0 394 return value;
d0f54f9d
JB
395}
396
397/* Register groups. */
398
a78f21af 399static int
7803799a
UW
400s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
401 struct reggroup *group)
d0f54f9d
JB
402{
403 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
404
d6db1fab
UW
405 /* We usually save/restore the whole PSW, which includes PC and CC.
406 However, some older gdbservers may not support saving/restoring
407 the whole PSW yet, and will return an XML register description
408 excluding those from the save/restore register groups. In those
409 cases, we still need to explicitly save/restore PC and CC in order
410 to push or pop frames. Since this doesn't hurt anything if we
411 already save/restore the whole PSW (it's just redundant), we add
412 PC and CC at this point unconditionally. */
d0f54f9d 413 if (group == save_reggroup || group == restore_reggroup)
7803799a 414 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
415
416 return default_register_reggroup_p (gdbarch, regnum, group);
417}
418
419
2ccd1468 420/* Maps for register sets. */
d0f54f9d 421
2ccd1468
UW
422const short s390_regmap_gregset[] =
423 {
424 0x00, S390_PSWM_REGNUM,
425 0x04, S390_PSWA_REGNUM,
426 0x08, S390_R0_REGNUM,
427 0x0c, S390_R1_REGNUM,
428 0x10, S390_R2_REGNUM,
429 0x14, S390_R3_REGNUM,
430 0x18, S390_R4_REGNUM,
431 0x1c, S390_R5_REGNUM,
432 0x20, S390_R6_REGNUM,
433 0x24, S390_R7_REGNUM,
434 0x28, S390_R8_REGNUM,
435 0x2c, S390_R9_REGNUM,
436 0x30, S390_R10_REGNUM,
437 0x34, S390_R11_REGNUM,
438 0x38, S390_R12_REGNUM,
439 0x3c, S390_R13_REGNUM,
440 0x40, S390_R14_REGNUM,
441 0x44, S390_R15_REGNUM,
442 0x48, S390_A0_REGNUM,
443 0x4c, S390_A1_REGNUM,
444 0x50, S390_A2_REGNUM,
445 0x54, S390_A3_REGNUM,
446 0x58, S390_A4_REGNUM,
447 0x5c, S390_A5_REGNUM,
448 0x60, S390_A6_REGNUM,
449 0x64, S390_A7_REGNUM,
450 0x68, S390_A8_REGNUM,
451 0x6c, S390_A9_REGNUM,
452 0x70, S390_A10_REGNUM,
453 0x74, S390_A11_REGNUM,
454 0x78, S390_A12_REGNUM,
455 0x7c, S390_A13_REGNUM,
456 0x80, S390_A14_REGNUM,
457 0x84, S390_A15_REGNUM,
458 0x88, S390_ORIG_R2_REGNUM,
459 -1, -1
460 };
d0f54f9d 461
2ccd1468
UW
462const short s390x_regmap_gregset[] =
463 {
464 0x00, S390_PSWM_REGNUM,
465 0x08, S390_PSWA_REGNUM,
466 0x10, S390_R0_REGNUM,
467 0x18, S390_R1_REGNUM,
468 0x20, S390_R2_REGNUM,
469 0x28, S390_R3_REGNUM,
470 0x30, S390_R4_REGNUM,
471 0x38, S390_R5_REGNUM,
472 0x40, S390_R6_REGNUM,
473 0x48, S390_R7_REGNUM,
474 0x50, S390_R8_REGNUM,
475 0x58, S390_R9_REGNUM,
476 0x60, S390_R10_REGNUM,
477 0x68, S390_R11_REGNUM,
478 0x70, S390_R12_REGNUM,
479 0x78, S390_R13_REGNUM,
480 0x80, S390_R14_REGNUM,
481 0x88, S390_R15_REGNUM,
482 0x90, S390_A0_REGNUM,
483 0x94, S390_A1_REGNUM,
484 0x98, S390_A2_REGNUM,
485 0x9c, S390_A3_REGNUM,
486 0xa0, S390_A4_REGNUM,
487 0xa4, S390_A5_REGNUM,
488 0xa8, S390_A6_REGNUM,
489 0xac, S390_A7_REGNUM,
490 0xb0, S390_A8_REGNUM,
491 0xb4, S390_A9_REGNUM,
492 0xb8, S390_A10_REGNUM,
493 0xbc, S390_A11_REGNUM,
494 0xc0, S390_A12_REGNUM,
495 0xc4, S390_A13_REGNUM,
496 0xc8, S390_A14_REGNUM,
497 0xcc, S390_A15_REGNUM,
498 0x10, S390_R0_UPPER_REGNUM,
499 0x18, S390_R1_UPPER_REGNUM,
500 0x20, S390_R2_UPPER_REGNUM,
501 0x28, S390_R3_UPPER_REGNUM,
502 0x30, S390_R4_UPPER_REGNUM,
503 0x38, S390_R5_UPPER_REGNUM,
504 0x40, S390_R6_UPPER_REGNUM,
505 0x48, S390_R7_UPPER_REGNUM,
506 0x50, S390_R8_UPPER_REGNUM,
507 0x58, S390_R9_UPPER_REGNUM,
508 0x60, S390_R10_UPPER_REGNUM,
509 0x68, S390_R11_UPPER_REGNUM,
510 0x70, S390_R12_UPPER_REGNUM,
511 0x78, S390_R13_UPPER_REGNUM,
512 0x80, S390_R14_UPPER_REGNUM,
513 0x88, S390_R15_UPPER_REGNUM,
514 0xd0, S390_ORIG_R2_REGNUM,
515 -1, -1
516 };
d0f54f9d 517
2ccd1468
UW
518const short s390_regmap_fpregset[] =
519 {
520 0x00, S390_FPC_REGNUM,
521 0x08, S390_F0_REGNUM,
522 0x10, S390_F1_REGNUM,
523 0x18, S390_F2_REGNUM,
524 0x20, S390_F3_REGNUM,
525 0x28, S390_F4_REGNUM,
526 0x30, S390_F5_REGNUM,
527 0x38, S390_F6_REGNUM,
528 0x40, S390_F7_REGNUM,
529 0x48, S390_F8_REGNUM,
530 0x50, S390_F9_REGNUM,
531 0x58, S390_F10_REGNUM,
532 0x60, S390_F11_REGNUM,
533 0x68, S390_F12_REGNUM,
534 0x70, S390_F13_REGNUM,
535 0x78, S390_F14_REGNUM,
536 0x80, S390_F15_REGNUM,
537 -1, -1
538 };
7803799a 539
2ccd1468
UW
540const short s390_regmap_upper[] =
541 {
542 0x00, S390_R0_UPPER_REGNUM,
543 0x04, S390_R1_UPPER_REGNUM,
544 0x08, S390_R2_UPPER_REGNUM,
545 0x0c, S390_R3_UPPER_REGNUM,
546 0x10, S390_R4_UPPER_REGNUM,
547 0x14, S390_R5_UPPER_REGNUM,
548 0x18, S390_R6_UPPER_REGNUM,
549 0x1c, S390_R7_UPPER_REGNUM,
550 0x20, S390_R8_UPPER_REGNUM,
551 0x24, S390_R9_UPPER_REGNUM,
552 0x28, S390_R10_UPPER_REGNUM,
553 0x2c, S390_R11_UPPER_REGNUM,
554 0x30, S390_R12_UPPER_REGNUM,
555 0x34, S390_R13_UPPER_REGNUM,
556 0x38, S390_R14_UPPER_REGNUM,
557 0x3c, S390_R15_UPPER_REGNUM,
558 -1, -1
559 };
c642a434 560
2ccd1468
UW
561const short s390_regmap_last_break[] =
562 {
563 0x04, S390_LAST_BREAK_REGNUM,
564 -1, -1
565 };
566
567const short s390x_regmap_last_break[] =
568 {
569 0x00, S390_LAST_BREAK_REGNUM,
570 -1, -1
571 };
572
573const short s390_regmap_system_call[] =
574 {
575 0x00, S390_SYSTEM_CALL_REGNUM,
576 -1, -1
577 };
c642a434 578
4ac33720
UW
579const short s390_regmap_tdb[] =
580 {
581 0x00, S390_TDB_DWORD0_REGNUM,
582 0x08, S390_TDB_ABORT_CODE_REGNUM,
583 0x10, S390_TDB_CONFLICT_TOKEN_REGNUM,
584 0x18, S390_TDB_ATIA_REGNUM,
585 0x80, S390_TDB_R0_REGNUM,
586 0x88, S390_TDB_R1_REGNUM,
587 0x90, S390_TDB_R2_REGNUM,
588 0x98, S390_TDB_R3_REGNUM,
589 0xa0, S390_TDB_R4_REGNUM,
590 0xa8, S390_TDB_R5_REGNUM,
591 0xb0, S390_TDB_R6_REGNUM,
592 0xb8, S390_TDB_R7_REGNUM,
593 0xc0, S390_TDB_R8_REGNUM,
594 0xc8, S390_TDB_R9_REGNUM,
595 0xd0, S390_TDB_R10_REGNUM,
596 0xd8, S390_TDB_R11_REGNUM,
597 0xe0, S390_TDB_R12_REGNUM,
598 0xe8, S390_TDB_R13_REGNUM,
599 0xf0, S390_TDB_R14_REGNUM,
600 0xf8, S390_TDB_R15_REGNUM,
601 -1, -1
602 };
c642a434 603
d0f54f9d 604
34201ae3 605/* Supply register REGNUM from the register set REGSET to register cache
d0f54f9d
JB
606 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
607static void
608s390_supply_regset (const struct regset *regset, struct regcache *regcache,
609 int regnum, const void *regs, size_t len)
610{
2ccd1468
UW
611 const short *map;
612 for (map = regset->descr; map[0] >= 0; map += 2)
613 if (regnum == -1 || regnum == map[1])
4ac33720
UW
614 regcache_raw_supply (regcache, map[1],
615 regs ? (const char *)regs + map[0] : NULL);
616}
617
618/* Supply the TDB regset. Like s390_supply_regset, but invalidate the
619 TDB registers unless the TDB format field is valid. */
620
621static void
622s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
623 int regnum, const void *regs, size_t len)
624{
625 ULONGEST tdw;
626 enum register_status ret;
627 int i;
628
629 s390_supply_regset (regset, regcache, regnum, regs, len);
630 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
631 if (ret != REG_VALID || (tdw >> 56) != 1)
632 s390_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
633}
634
92f38ec2
UW
635/* Collect register REGNUM from the register cache REGCACHE and store
636 it in the buffer specified by REGS and LEN as described by the
637 general-purpose register set REGSET. If REGNUM is -1, do this for
638 all registers in REGSET. */
639static void
640s390_collect_regset (const struct regset *regset,
641 const struct regcache *regcache,
642 int regnum, void *regs, size_t len)
643{
2ccd1468
UW
644 const short *map;
645 for (map = regset->descr; map[0] >= 0; map += 2)
646 if (regnum == -1 || regnum == map[1])
647 regcache_raw_collect (regcache, map[1], (char *)regs + map[0]);
92f38ec2
UW
648}
649
d0f54f9d 650static const struct regset s390_gregset = {
34201ae3 651 s390_regmap_gregset,
92f38ec2
UW
652 s390_supply_regset,
653 s390_collect_regset
d0f54f9d
JB
654};
655
656static const struct regset s390x_gregset = {
34201ae3 657 s390x_regmap_gregset,
92f38ec2
UW
658 s390_supply_regset,
659 s390_collect_regset
d0f54f9d
JB
660};
661
662static const struct regset s390_fpregset = {
34201ae3 663 s390_regmap_fpregset,
92f38ec2
UW
664 s390_supply_regset,
665 s390_collect_regset
d0f54f9d
JB
666};
667
7803799a 668static const struct regset s390_upper_regset = {
34201ae3 669 s390_regmap_upper,
7803799a
UW
670 s390_supply_regset,
671 s390_collect_regset
672};
673
c642a434
UW
674static const struct regset s390_last_break_regset = {
675 s390_regmap_last_break,
676 s390_supply_regset,
677 s390_collect_regset
678};
679
680static const struct regset s390x_last_break_regset = {
681 s390x_regmap_last_break,
682 s390_supply_regset,
683 s390_collect_regset
684};
685
686static const struct regset s390_system_call_regset = {
687 s390_regmap_system_call,
688 s390_supply_regset,
689 s390_collect_regset
690};
691
4ac33720
UW
692static const struct regset s390_tdb_regset = {
693 s390_regmap_tdb,
694 s390_supply_tdb_regset,
695 s390_collect_regset
696};
697
c642a434
UW
698static struct core_regset_section s390_linux32_regset_sections[] =
699{
700 { ".reg", s390_sizeof_gregset, "general-purpose" },
701 { ".reg2", s390_sizeof_fpregset, "floating-point" },
702 { NULL, 0}
703};
704
705static struct core_regset_section s390_linux32v1_regset_sections[] =
706{
707 { ".reg", s390_sizeof_gregset, "general-purpose" },
708 { ".reg2", s390_sizeof_fpregset, "floating-point" },
709 { ".reg-s390-last-break", 8, "s390 last-break address" },
710 { NULL, 0}
711};
712
713static struct core_regset_section s390_linux32v2_regset_sections[] =
714{
715 { ".reg", s390_sizeof_gregset, "general-purpose" },
716 { ".reg2", s390_sizeof_fpregset, "floating-point" },
717 { ".reg-s390-last-break", 8, "s390 last-break address" },
718 { ".reg-s390-system-call", 4, "s390 system-call" },
719 { NULL, 0}
720};
721
722static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
723{
724 { ".reg", s390_sizeof_gregset, "general-purpose" },
725 { ".reg2", s390_sizeof_fpregset, "floating-point" },
726 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
727 { NULL, 0}
728};
729
c642a434
UW
730static struct core_regset_section s390_linux64v1_regset_sections[] =
731{
732 { ".reg", s390_sizeof_gregset, "general-purpose" },
733 { ".reg2", s390_sizeof_fpregset, "floating-point" },
734 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
735 { ".reg-s390-last-break", 8, "s930 last-break address" },
736 { NULL, 0}
737};
738
739static struct core_regset_section s390_linux64v2_regset_sections[] =
740{
741 { ".reg", s390_sizeof_gregset, "general-purpose" },
742 { ".reg2", s390_sizeof_fpregset, "floating-point" },
743 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
744 { ".reg-s390-last-break", 8, "s930 last-break address" },
745 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 746 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
747 { NULL, 0}
748};
749
750static struct core_regset_section s390x_linux64_regset_sections[] =
751{
752 { ".reg", s390x_sizeof_gregset, "general-purpose" },
753 { ".reg2", s390_sizeof_fpregset, "floating-point" },
754 { NULL, 0}
755};
756
757static struct core_regset_section s390x_linux64v1_regset_sections[] =
758{
759 { ".reg", s390x_sizeof_gregset, "general-purpose" },
760 { ".reg2", s390_sizeof_fpregset, "floating-point" },
761 { ".reg-s390-last-break", 8, "s930 last-break address" },
762 { NULL, 0}
763};
764
765static struct core_regset_section s390x_linux64v2_regset_sections[] =
766{
767 { ".reg", s390x_sizeof_gregset, "general-purpose" },
768 { ".reg2", s390_sizeof_fpregset, "floating-point" },
769 { ".reg-s390-last-break", 8, "s930 last-break address" },
770 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 771 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
772 { NULL, 0}
773};
774
775
d0f54f9d
JB
776/* Return the appropriate register set for the core section identified
777 by SECT_NAME and SECT_SIZE. */
63807e1d 778static const struct regset *
d0f54f9d
JB
779s390_regset_from_core_section (struct gdbarch *gdbarch,
780 const char *sect_name, size_t sect_size)
781{
782 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
783
e31dcd20 784 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
785 return tdep->gregset;
786
e31dcd20 787 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
788 return tdep->fpregset;
789
7803799a
UW
790 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
791 return &s390_upper_regset;
792
c642a434
UW
793 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
794 return (gdbarch_ptr_bit (gdbarch) == 32
795 ? &s390_last_break_regset : &s390x_last_break_regset);
796
797 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
798 return &s390_system_call_regset;
799
4ac33720
UW
800 if (strcmp (sect_name, ".reg-s390-tdb") == 0 && sect_size >= 256)
801 return &s390_tdb_regset;
802
d0f54f9d 803 return NULL;
5769d3cd
AC
804}
805
7803799a
UW
806static const struct target_desc *
807s390_core_read_description (struct gdbarch *gdbarch,
808 struct target_ops *target, bfd *abfd)
809{
810 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
811 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
812 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a 813 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 814 CORE_ADDR hwcap = 0;
4ac33720
UW
815
816 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
817 if (!section)
818 return NULL;
819
820 switch (bfd_section_size (abfd, section))
821 {
822 case s390_sizeof_gregset:
c642a434 823 if (high_gprs)
4ac33720
UW
824 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 :
825 v2? tdesc_s390_linux64v2 :
c642a434
UW
826 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
827 else
828 return (v2? tdesc_s390_linux32v2 :
829 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
830
831 case s390x_sizeof_gregset:
4ac33720
UW
832 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 :
833 v2? tdesc_s390x_linux64v2 :
c642a434 834 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
835
836 default:
837 return NULL;
838 }
839}
840
d0f54f9d 841
4bc8c588
JB
842/* Decoding S/390 instructions. */
843
844/* Named opcode values for the S/390 instructions we recognize. Some
845 instructions have their opcode split across two fields; those are the
846 op1_* and op2_* enums. */
847enum
848 {
a8c99f38
JB
849 op1_lhi = 0xa7, op2_lhi = 0x08,
850 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 851 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 852 op_lr = 0x18,
a8c99f38
JB
853 op_lgr = 0xb904,
854 op_l = 0x58,
855 op1_ly = 0xe3, op2_ly = 0x58,
856 op1_lg = 0xe3, op2_lg = 0x04,
857 op_lm = 0x98,
858 op1_lmy = 0xeb, op2_lmy = 0x98,
859 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 860 op_st = 0x50,
a8c99f38 861 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 862 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 863 op_std = 0x60,
4bc8c588 864 op_stm = 0x90,
a8c99f38 865 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 866 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
867 op1_aghi = 0xa7, op2_aghi = 0x0b,
868 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
869 op1_agfi = 0xc2, op2_agfi = 0x08,
870 op1_afi = 0xc2, op2_afi = 0x09,
871 op1_algfi= 0xc2, op2_algfi= 0x0a,
872 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
873 op_ar = 0x1a,
874 op_agr = 0xb908,
875 op_a = 0x5a,
876 op1_ay = 0xe3, op2_ay = 0x5a,
877 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
878 op1_slgfi= 0xc2, op2_slgfi= 0x04,
879 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
880 op_sr = 0x1b,
881 op_sgr = 0xb909,
882 op_s = 0x5b,
883 op1_sy = 0xe3, op2_sy = 0x5b,
884 op1_sg = 0xe3, op2_sg = 0x09,
885 op_nr = 0x14,
886 op_ngr = 0xb980,
887 op_la = 0x41,
888 op1_lay = 0xe3, op2_lay = 0x71,
889 op1_larl = 0xc0, op2_larl = 0x00,
890 op_basr = 0x0d,
891 op_bas = 0x4d,
892 op_bcr = 0x07,
893 op_bc = 0x0d,
1db4e8a0
UW
894 op_bctr = 0x06,
895 op_bctgr = 0xb946,
896 op_bct = 0x46,
897 op1_bctg = 0xe3, op2_bctg = 0x46,
898 op_bxh = 0x86,
899 op1_bxhg = 0xeb, op2_bxhg = 0x44,
900 op_bxle = 0x87,
901 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
902 op1_bras = 0xa7, op2_bras = 0x05,
903 op1_brasl= 0xc0, op2_brasl= 0x05,
904 op1_brc = 0xa7, op2_brc = 0x04,
905 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
906 op1_brct = 0xa7, op2_brct = 0x06,
907 op1_brctg= 0xa7, op2_brctg= 0x07,
908 op_brxh = 0x84,
909 op1_brxhg= 0xec, op2_brxhg= 0x44,
910 op_brxle = 0x85,
911 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 912 op_svc = 0x0a,
4bc8c588
JB
913 };
914
915
a8c99f38
JB
916/* Read a single instruction from address AT. */
917
918#define S390_MAX_INSTR_SIZE 6
919static int
920s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
921{
922 static int s390_instrlen[] = { 2, 4, 4, 6 };
923 int instrlen;
924
8defab1a 925 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
926 return -1;
927 instrlen = s390_instrlen[instr[0] >> 6];
928 if (instrlen > 2)
929 {
8defab1a 930 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 931 return -1;
a8c99f38
JB
932 }
933 return instrlen;
934}
935
936
4bc8c588
JB
937/* The functions below are for recognizing and decoding S/390
938 instructions of various formats. Each of them checks whether INSN
939 is an instruction of the given format, with the specified opcodes.
940 If it is, it sets the remaining arguments to the values of the
941 instruction's fields, and returns a non-zero value; otherwise, it
942 returns zero.
943
944 These functions' arguments appear in the order they appear in the
945 instruction, not in the machine-language form. So, opcodes always
946 come first, even though they're sometimes scattered around the
947 instructions. And displacements appear before base and extension
948 registers, as they do in the assembly syntax, not at the end, as
949 they do in the machine language. */
a78f21af 950static int
4bc8c588
JB
951is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
952{
953 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
954 {
955 *r1 = (insn[1] >> 4) & 0xf;
956 /* i2 is a 16-bit signed quantity. */
957 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
958 return 1;
959 }
960 else
961 return 0;
962}
8ac0e65a 963
5769d3cd 964
4bc8c588
JB
965static int
966is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 967 unsigned int *r1, int *i2)
4bc8c588
JB
968{
969 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
970 {
971 *r1 = (insn[1] >> 4) & 0xf;
972 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
973 no sign extension is necessary, but we don't want to assume
974 that. */
4bc8c588 975 *i2 = (((insn[2] << 24)
34201ae3
UW
976 | (insn[3] << 16)
977 | (insn[4] << 8)
978 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
979 return 1;
980 }
981 else
982 return 0;
983}
984
985
986static int
987is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
988{
989 if (insn[0] == op)
990 {
991 *r1 = (insn[1] >> 4) & 0xf;
992 *r2 = insn[1] & 0xf;
993 return 1;
994 }
995 else
996 return 0;
997}
998
999
1000static int
1001is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1002{
1003 if (((insn[0] << 8) | insn[1]) == op)
1004 {
1005 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1006 *r1 = (insn[3] >> 4) & 0xf;
1007 *r2 = insn[3] & 0xf;
1008 return 1;
1009 }
1010 else
1011 return 0;
1012}
1013
1014
1015static int
1016is_rs (bfd_byte *insn, int op,
eb1bd1fb 1017 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1018{
1019 if (insn[0] == op)
1020 {
1021 *r1 = (insn[1] >> 4) & 0xf;
1022 *r3 = insn[1] & 0xf;
1023 *b2 = (insn[2] >> 4) & 0xf;
1024 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1025 return 1;
1026 }
1027 else
1028 return 0;
1029}
1030
1031
1032static int
a8c99f38 1033is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 1034 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
1035{
1036 if (insn[0] == op1
4bc8c588
JB
1037 && insn[5] == op2)
1038 {
1039 *r1 = (insn[1] >> 4) & 0xf;
1040 *r3 = insn[1] & 0xf;
1041 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1042 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1043 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1044 ^ 0x80000) - 0x80000;
4bc8c588
JB
1045 return 1;
1046 }
1047 else
1048 return 0;
1049}
1050
1051
1db4e8a0
UW
1052static int
1053is_rsi (bfd_byte *insn, int op,
34201ae3 1054 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1055{
1056 if (insn[0] == op)
1057 {
1058 *r1 = (insn[1] >> 4) & 0xf;
1059 *r3 = insn[1] & 0xf;
1060 /* i2 is a 16-bit signed quantity. */
1061 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1062 return 1;
1063 }
1064 else
1065 return 0;
1066}
1067
1068
1069static int
1070is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 1071 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
1072{
1073 if (insn[0] == op1
1074 && insn[5] == op2)
1075 {
1076 *r1 = (insn[1] >> 4) & 0xf;
1077 *r3 = insn[1] & 0xf;
1078 /* i2 is a 16-bit signed quantity. */
1079 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1080 return 1;
1081 }
1082 else
1083 return 0;
1084}
1085
1086
4bc8c588
JB
1087static int
1088is_rx (bfd_byte *insn, int op,
eb1bd1fb 1089 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1090{
1091 if (insn[0] == op)
1092 {
1093 *r1 = (insn[1] >> 4) & 0xf;
1094 *x2 = insn[1] & 0xf;
1095 *b2 = (insn[2] >> 4) & 0xf;
1096 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1097 return 1;
1098 }
1099 else
1100 return 0;
1101}
1102
1103
1104static int
a8c99f38 1105is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1106 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1107{
1108 if (insn[0] == op1
4bc8c588
JB
1109 && insn[5] == op2)
1110 {
1111 *r1 = (insn[1] >> 4) & 0xf;
1112 *x2 = insn[1] & 0xf;
1113 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1114 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1115 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1116 ^ 0x80000) - 0x80000;
4bc8c588
JB
1117 return 1;
1118 }
1119 else
1120 return 0;
1121}
1122
1123
3fc46200 1124/* Prologue analysis. */
4bc8c588 1125
d0f54f9d
JB
1126#define S390_NUM_GPRS 16
1127#define S390_NUM_FPRS 16
4bc8c588 1128
a8c99f38
JB
1129struct s390_prologue_data {
1130
ee1b3323
UW
1131 /* The stack. */
1132 struct pv_area *stack;
1133
e17a4113 1134 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1135 int gpr_size;
1136 int fpr_size;
e17a4113 1137 enum bfd_endian byte_order;
a8c99f38
JB
1138
1139 /* The general-purpose registers. */
3fc46200 1140 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1141
1142 /* The floating-point registers. */
3fc46200 1143 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1144
121d8485
UW
1145 /* The offset relative to the CFA where the incoming GPR N was saved
1146 by the function prologue. 0 if not saved or unknown. */
1147 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1148
121d8485
UW
1149 /* Likewise for FPRs. */
1150 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1151
121d8485
UW
1152 /* Nonzero if the backchain was saved. This is assumed to be the
1153 case when the incoming SP is saved at the current SP location. */
1154 int back_chain_saved_p;
1155};
4bc8c588 1156
3fc46200
UW
1157/* Return the effective address for an X-style instruction, like:
1158
34201ae3 1159 L R1, D2(X2, B2)
3fc46200
UW
1160
1161 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1162 constant; the effective address is the sum of all three. If either
1163 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1164 means that r0 can't be used as either X2 or B2. */
1165static pv_t
1166s390_addr (struct s390_prologue_data *data,
1167 int d2, unsigned int x2, unsigned int b2)
1168{
1169 pv_t result;
1170
1171 result = pv_constant (d2);
1172 if (x2)
1173 result = pv_add (result, data->gpr[x2]);
1174 if (b2)
1175 result = pv_add (result, data->gpr[b2]);
1176
1177 return result;
1178}
1179
1180/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1181static void
3fc46200
UW
1182s390_store (struct s390_prologue_data *data,
1183 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1184 pv_t value)
4bc8c588 1185{
3fc46200 1186 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1187 pv_t offset;
121d8485
UW
1188
1189 /* Check whether we are storing the backchain. */
3fc46200 1190 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1191
3fc46200 1192 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1193 if (size == data->gpr_size
3fc46200 1194 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1195 {
1196 data->back_chain_saved_p = 1;
1197 return;
1198 }
1199
1200
1201 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1202 if (!pv_area_store_would_trash (data->stack, addr))
1203 pv_area_store (data->stack, addr, size, value);
4bc8c588 1204
a8c99f38 1205
121d8485
UW
1206 /* Note: If this is some store we cannot identify, you might think we
1207 should forget our cached values, as any of those might have been hit.
1208
1209 However, we make the assumption that the register save areas are only
1210 ever stored to once in any given function, and we do recognize these
1211 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1212}
4bc8c588 1213
3fc46200
UW
1214/* Do a SIZE-byte load from D2(X2,B2). */
1215static pv_t
1216s390_load (struct s390_prologue_data *data,
1217 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1218
4bc8c588 1219{
3fc46200 1220 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1221
a8c99f38
JB
1222 /* If it's a load from an in-line constant pool, then we can
1223 simulate that, under the assumption that the code isn't
1224 going to change between the time the processor actually
1225 executed it creating the current frame, and the time when
1226 we're analyzing the code to unwind past that frame. */
3fc46200 1227 if (pv_is_constant (addr))
4bc8c588 1228 {
0542c86d 1229 struct target_section *secp;
3fc46200 1230 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1231 if (secp != NULL
34201ae3 1232 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1233 secp->the_bfd_section)
34201ae3
UW
1234 & SEC_READONLY))
1235 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1236 data->byte_order));
a8c99f38 1237 }
7666f43c 1238
121d8485 1239 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1240 return pv_area_fetch (data->stack, addr, size);
1241}
121d8485 1242
ee1b3323
UW
1243/* Function for finding saved registers in a 'struct pv_area'; we pass
1244 this to pv_area_scan.
121d8485 1245
ee1b3323
UW
1246 If VALUE is a saved register, ADDR says it was saved at a constant
1247 offset from the frame base, and SIZE indicates that the whole
1248 register was saved, record its offset in the reg_offset table in
1249 PROLOGUE_UNTYPED. */
1250static void
c378eb4e
MS
1251s390_check_for_saved (void *data_untyped, pv_t addr,
1252 CORE_ADDR size, pv_t value)
ee1b3323
UW
1253{
1254 struct s390_prologue_data *data = data_untyped;
1255 int i, offset;
1256
1257 if (!pv_is_register (addr, S390_SP_REGNUM))
1258 return;
1259
1260 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1261
ee1b3323
UW
1262 /* If we are storing the original value of a register, we want to
1263 record the CFA offset. If the same register is stored multiple
1264 times, the stack slot with the highest address counts. */
34201ae3 1265
ee1b3323
UW
1266 for (i = 0; i < S390_NUM_GPRS; i++)
1267 if (size == data->gpr_size
1268 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1269 if (data->gpr_slot[i] == 0
1270 || data->gpr_slot[i] > offset)
1271 {
1272 data->gpr_slot[i] = offset;
1273 return;
1274 }
1275
1276 for (i = 0; i < S390_NUM_FPRS; i++)
1277 if (size == data->fpr_size
1278 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1279 if (data->fpr_slot[i] == 0
1280 || data->fpr_slot[i] > offset)
1281 {
1282 data->fpr_slot[i] = offset;
1283 return;
1284 }
a8c99f38 1285}
4bc8c588 1286
a8c99f38
JB
1287/* Analyze the prologue of the function starting at START_PC,
1288 continuing at most until CURRENT_PC. Initialize DATA to
1289 hold all information we find out about the state of the registers
1290 and stack slots. Return the address of the instruction after
1291 the last one that changed the SP, FP, or back chain; or zero
1292 on error. */
1293static CORE_ADDR
1294s390_analyze_prologue (struct gdbarch *gdbarch,
1295 CORE_ADDR start_pc,
1296 CORE_ADDR current_pc,
1297 struct s390_prologue_data *data)
4bc8c588 1298{
a8c99f38
JB
1299 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1300
4bc8c588 1301 /* Our return value:
a8c99f38 1302 The address of the instruction after the last one that changed
34201ae3 1303 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1304 read memory. */
1305 CORE_ADDR result = start_pc;
4bc8c588 1306
4bc8c588
JB
1307 /* The current PC for our abstract interpretation. */
1308 CORE_ADDR pc;
1309
1310 /* The address of the next instruction after that. */
1311 CORE_ADDR next_pc;
34201ae3 1312
4bc8c588
JB
1313 /* Set up everything's initial value. */
1314 {
1315 int i;
1316
55f960e1 1317 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1318
a8c99f38
JB
1319 /* For the purpose of prologue tracking, we consider the GPR size to
1320 be equal to the ABI word size, even if it is actually larger
1321 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1322 data->gpr_size = word_size;
1323 data->fpr_size = 8;
e17a4113 1324 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1325
4bc8c588 1326 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1327 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1328
1329 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1330 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1331
121d8485
UW
1332 for (i = 0; i < S390_NUM_GPRS; i++)
1333 data->gpr_slot[i] = 0;
1334
1335 for (i = 0; i < S390_NUM_FPRS; i++)
1336 data->fpr_slot[i] = 0;
4bc8c588 1337
121d8485 1338 data->back_chain_saved_p = 0;
4bc8c588
JB
1339 }
1340
a8c99f38
JB
1341 /* Start interpreting instructions, until we hit the frame's
1342 current PC or the first branch instruction. */
1343 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1344 {
4bc8c588 1345 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1346 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1347
3fc46200
UW
1348 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1349 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1350 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1351
4bc8c588 1352 /* Fields for various kinds of instructions. */
a8c99f38
JB
1353 unsigned int b2, r1, r2, x2, r3;
1354 int i2, d2;
4bc8c588 1355
121d8485 1356 /* The values of SP and FP before this instruction,
34201ae3 1357 for detecting instructions that change them. */
3fc46200 1358 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1359 /* Likewise for the flag whether the back chain was saved. */
1360 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1361
1362 /* If we got an error trying to read the instruction, report it. */
1363 if (insn_len < 0)
34201ae3
UW
1364 {
1365 result = 0;
1366 break;
1367 }
4bc8c588
JB
1368
1369 next_pc = pc + insn_len;
1370
a8c99f38
JB
1371 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1372 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1373 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1374
4bc8c588 1375
3fc46200
UW
1376 /* LHI r1, i2 --- load halfword immediate. */
1377 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1378 /* LGFI r1, i2 --- load fullword immediate. */
1379 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1380 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1381 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1382 data->gpr[r1] = pv_constant (i2);
1383
1384 /* LR r1, r2 --- load from register. */
1385 /* LGR r1, r2 --- load from register (64-bit version). */
1386 else if (is_rr (insn32, op_lr, &r1, &r2)
1387 || is_rre (insn64, op_lgr, &r1, &r2))
1388 data->gpr[r1] = data->gpr[r2];
1389
1390 /* L r1, d2(x2, b2) --- load. */
1391 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1392 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1393 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1394 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1395 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1396 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1397
1398 /* ST r1, d2(x2, b2) --- store. */
1399 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1400 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1401 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1402 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1403 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1404 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1405
1406 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1407 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1408 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1409
1410 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1411 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1412 version). */
3fc46200
UW
1413 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1414 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1415 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1416 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1417 {
1418 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1419 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1420 }
4bc8c588 1421
3fc46200
UW
1422 /* AHI r1, i2 --- add halfword immediate. */
1423 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1424 /* AFI r1, i2 --- add fullword immediate. */
1425 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1426 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1427 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1428 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1429 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1430 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1431
1432 /* ALFI r1, i2 --- add logical immediate. */
1433 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1434 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1435 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1436 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1437 (CORE_ADDR)i2 & 0xffffffff);
1438
1439 /* AR r1, r2 -- add register. */
1440 /* AGR r1, r2 -- add register (64-bit version). */
1441 else if (is_rr (insn32, op_ar, &r1, &r2)
1442 || is_rre (insn64, op_agr, &r1, &r2))
1443 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1444
1445 /* A r1, d2(x2, b2) -- add. */
1446 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1447 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1448 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1449 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1450 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1451 data->gpr[r1] = pv_add (data->gpr[r1],
1452 s390_load (data, d2, x2, b2, data->gpr_size));
1453
1454 /* SLFI r1, i2 --- subtract logical immediate. */
1455 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1456 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1457 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1458 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1459 -((CORE_ADDR)i2 & 0xffffffff));
1460
1461 /* SR r1, r2 -- subtract register. */
1462 /* SGR r1, r2 -- subtract register (64-bit version). */
1463 else if (is_rr (insn32, op_sr, &r1, &r2)
1464 || is_rre (insn64, op_sgr, &r1, &r2))
1465 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1466
1467 /* S r1, d2(x2, b2) -- subtract. */
1468 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1469 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1470 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1471 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1472 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1473 data->gpr[r1] = pv_subtract (data->gpr[r1],
1474 s390_load (data, d2, x2, b2, data->gpr_size));
1475
1476 /* LA r1, d2(x2, b2) --- load address. */
1477 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1478 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1479 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1480 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1481
1482 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1483 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1484 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1485
3fc46200 1486 /* BASR r1, 0 --- branch and save.
34201ae3 1487 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1488 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1489 && r2 == 0)
3fc46200 1490 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1491
3fc46200 1492 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1493 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1494 {
1495 data->gpr[r1] = pv_constant (next_pc);
1496 next_pc = pc + i2 * 2;
4bc8c588 1497
34201ae3
UW
1498 /* We'd better not interpret any backward branches. We'll
1499 never terminate. */
1500 if (next_pc <= pc)
1501 break;
1502 }
4bc8c588 1503
a8c99f38
JB
1504 /* Terminate search when hitting any other branch instruction. */
1505 else if (is_rr (insn, op_basr, &r1, &r2)
1506 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1507 || is_rr (insn, op_bcr, &r1, &r2)
1508 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1509 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1510 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1511 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1512 break;
1513
4bc8c588 1514 else
d4fb63e1
TT
1515 {
1516 /* An instruction we don't know how to simulate. The only
1517 safe thing to do would be to set every value we're tracking
1518 to 'unknown'. Instead, we'll be optimistic: we assume that
1519 we *can* interpret every instruction that the compiler uses
1520 to manipulate any of the data we're interested in here --
1521 then we can just ignore anything else. */
1522 }
4bc8c588
JB
1523
1524 /* Record the address after the last instruction that changed
34201ae3
UW
1525 the FP, SP, or backlink. Ignore instructions that changed
1526 them back to their original values --- those are probably
1527 restore instructions. (The back chain is never restored,
1528 just popped.) */
4bc8c588 1529 {
34201ae3
UW
1530 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1531 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1532
1533 if ((! pv_is_identical (pre_insn_sp, sp)
1534 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1535 && sp.kind != pvk_unknown)
34201ae3
UW
1536 || (! pv_is_identical (pre_insn_fp, fp)
1537 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1538 && fp.kind != pvk_unknown)
34201ae3
UW
1539 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1540 result = next_pc;
4bc8c588 1541 }
5769d3cd 1542 }
4bc8c588 1543
ee1b3323
UW
1544 /* Record where all the registers were saved. */
1545 pv_area_scan (data->stack, s390_check_for_saved, data);
1546
1547 free_pv_area (data->stack);
1548 data->stack = NULL;
1549
4bc8c588 1550 return result;
5769d3cd
AC
1551}
1552
34201ae3 1553/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1554 some "real" code. */
1555static CORE_ADDR
6093d2eb 1556s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1557{
1558 struct s390_prologue_data data;
1559 CORE_ADDR skip_pc;
6093d2eb 1560 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1561 return skip_pc ? skip_pc : pc;
1562}
1563
d0f54f9d
JB
1564/* Return true if we are in the functin's epilogue, i.e. after the
1565 instruction that destroyed the function's stack frame. */
1566static int
1567s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1568{
1569 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1570
1571 /* In frameless functions, there's not frame to destroy and thus
1572 we don't care about the epilogue.
1573
1574 In functions with frame, the epilogue sequence is a pair of
1575 a LM-type instruction that restores (amongst others) the
1576 return register %r14 and the stack pointer %r15, followed
1577 by a branch 'br %r14' --or equivalent-- that effects the
1578 actual return.
1579
1580 In that situation, this function needs to return 'true' in
1581 exactly one case: when pc points to that branch instruction.
1582
1583 Thus we try to disassemble the one instructions immediately
177b42fe 1584 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1585 modifying the stack pointer.
1586
1587 Note that disassembling backwards is not reliable, so there
1588 is a slight chance of false positives here ... */
1589
1590 bfd_byte insn[6];
1591 unsigned int r1, r3, b2;
1592 int d2;
1593
1594 if (word_size == 4
8defab1a 1595 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1596 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1597 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1598 return 1;
1599
a8c99f38 1600 if (word_size == 4
8defab1a 1601 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1602 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1603 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1604 return 1;
1605
d0f54f9d 1606 if (word_size == 8
8defab1a 1607 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1608 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1609 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1610 return 1;
1611
1612 return 0;
1613}
5769d3cd 1614
1db4e8a0
UW
1615/* Displaced stepping. */
1616
1617/* Fix up the state of registers and memory after having single-stepped
1618 a displaced instruction. */
1619static void
1620s390_displaced_step_fixup (struct gdbarch *gdbarch,
1621 struct displaced_step_closure *closure,
1622 CORE_ADDR from, CORE_ADDR to,
1623 struct regcache *regs)
1624{
1625 /* Since we use simple_displaced_step_copy_insn, our closure is a
1626 copy of the instruction. */
1627 gdb_byte *insn = (gdb_byte *) closure;
1628 static int s390_instrlen[] = { 2, 4, 4, 6 };
1629 int insnlen = s390_instrlen[insn[0] >> 6];
1630
1631 /* Fields for various kinds of instructions. */
1632 unsigned int b2, r1, r2, x2, r3;
1633 int i2, d2;
1634
1635 /* Get current PC and addressing mode bit. */
1636 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1637 ULONGEST amode = 0;
1db4e8a0
UW
1638
1639 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1640 {
1641 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1642 amode &= 0x80000000;
1643 }
1644
1645 if (debug_displaced)
1646 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1647 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1648 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1649 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1650
1651 /* Handle absolute branch and save instructions. */
1652 if (is_rr (insn, op_basr, &r1, &r2)
1653 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1654 {
1655 /* Recompute saved return address in R1. */
1656 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1657 amode | (from + insnlen));
1658 }
1659
1660 /* Handle absolute branch instructions. */
1661 else if (is_rr (insn, op_bcr, &r1, &r2)
1662 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1663 || is_rr (insn, op_bctr, &r1, &r2)
1664 || is_rre (insn, op_bctgr, &r1, &r2)
1665 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1666 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1667 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1668 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1669 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1670 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1671 {
1672 /* Update PC iff branch was *not* taken. */
1673 if (pc == to + insnlen)
1674 regcache_write_pc (regs, from + insnlen);
1675 }
1676
1677 /* Handle PC-relative branch and save instructions. */
1678 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1679 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1680 {
1681 /* Update PC. */
1682 regcache_write_pc (regs, pc - to + from);
1683 /* Recompute saved return address in R1. */
1684 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1685 amode | (from + insnlen));
1686 }
1687
1688 /* Handle PC-relative branch instructions. */
1689 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1690 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1691 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1692 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1693 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1694 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1695 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1696 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1697 {
1698 /* Update PC. */
1699 regcache_write_pc (regs, pc - to + from);
1700 }
1701
1702 /* Handle LOAD ADDRESS RELATIVE LONG. */
1703 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1704 {
0161e4b9
UW
1705 /* Update PC. */
1706 regcache_write_pc (regs, from + insnlen);
34201ae3 1707 /* Recompute output address in R1. */
1db4e8a0 1708 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1709 amode | (from + i2 * 2));
1db4e8a0
UW
1710 }
1711
1712 /* If we executed a breakpoint instruction, point PC right back at it. */
1713 else if (insn[0] == 0x0 && insn[1] == 0x1)
1714 regcache_write_pc (regs, from);
1715
1716 /* For any other insn, PC points right after the original instruction. */
1717 else
1718 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1719
1720 if (debug_displaced)
1721 fprintf_unfiltered (gdb_stdlog,
1722 "displaced: (s390) pc is now %s\n",
1723 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1724}
a8c99f38 1725
d6db1fab
UW
1726
1727/* Helper routine to unwind pseudo registers. */
1728
1729static struct value *
1730s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1731{
1732 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1733 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1734 struct type *type = register_type (gdbarch, regnum);
1735
1736 /* Unwind PC via PSW address. */
1737 if (regnum == tdep->pc_regnum)
1738 {
1739 struct value *val;
1740
1741 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1742 if (!value_optimized_out (val))
1743 {
1744 LONGEST pswa = value_as_long (val);
1745
1746 if (TYPE_LENGTH (type) == 4)
1747 return value_from_pointer (type, pswa & 0x7fffffff);
1748 else
1749 return value_from_pointer (type, pswa);
1750 }
1751 }
1752
1753 /* Unwind CC via PSW mask. */
1754 if (regnum == tdep->cc_regnum)
1755 {
1756 struct value *val;
1757
1758 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1759 if (!value_optimized_out (val))
1760 {
1761 LONGEST pswm = value_as_long (val);
1762
1763 if (TYPE_LENGTH (type) == 4)
1764 return value_from_longest (type, (pswm >> 12) & 3);
1765 else
1766 return value_from_longest (type, (pswm >> 44) & 3);
1767 }
1768 }
1769
1770 /* Unwind full GPRs to show at least the lower halves (as the
1771 upper halves are undefined). */
2ccd1468 1772 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1773 {
1774 int reg = regnum - tdep->gpr_full_regnum;
1775 struct value *val;
1776
1777 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1778 if (!value_optimized_out (val))
1779 return value_cast (type, val);
1780 }
1781
1782 return allocate_optimized_out_value (type);
1783}
1784
1785static struct value *
1786s390_trad_frame_prev_register (struct frame_info *this_frame,
1787 struct trad_frame_saved_reg saved_regs[],
1788 int regnum)
1789{
1790 if (regnum < S390_NUM_REGS)
1791 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1792 else
1793 return s390_unwind_pseudo_register (this_frame, regnum);
1794}
1795
1796
a8c99f38
JB
1797/* Normal stack frames. */
1798
1799struct s390_unwind_cache {
1800
1801 CORE_ADDR func;
1802 CORE_ADDR frame_base;
1803 CORE_ADDR local_base;
1804
1805 struct trad_frame_saved_reg *saved_regs;
1806};
1807
a78f21af 1808static int
f089c433 1809s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1810 struct s390_unwind_cache *info)
5769d3cd 1811{
f089c433 1812 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1813 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1814 struct s390_prologue_data data;
3fc46200
UW
1815 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1816 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1817 int i;
1818 CORE_ADDR cfa;
a8c99f38
JB
1819 CORE_ADDR func;
1820 CORE_ADDR result;
1821 ULONGEST reg;
1822 CORE_ADDR prev_sp;
1823 int frame_pointer;
1824 int size;
edb3359d 1825 struct frame_info *next_frame;
a8c99f38
JB
1826
1827 /* Try to find the function start address. If we can't find it, we don't
1828 bother searching for it -- with modern compilers this would be mostly
1829 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1830 or else a valid backchain ... */
f089c433 1831 func = get_frame_func (this_frame);
a8c99f38
JB
1832 if (!func)
1833 return 0;
5769d3cd 1834
a8c99f38
JB
1835 /* Try to analyze the prologue. */
1836 result = s390_analyze_prologue (gdbarch, func,
f089c433 1837 get_frame_pc (this_frame), &data);
a8c99f38 1838 if (!result)
5769d3cd 1839 return 0;
5769d3cd 1840
a8c99f38 1841 /* If this was successful, we should have found the instruction that
34201ae3 1842 sets the stack pointer register to the previous value of the stack
a8c99f38 1843 pointer minus the frame size. */
3fc46200 1844 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1845 return 0;
a8c99f38 1846
34201ae3 1847 /* A frame size of zero at this point can mean either a real
a8c99f38 1848 frameless function, or else a failure to find the prologue.
34201ae3 1849 Perform some sanity checks to verify we really have a
a8c99f38
JB
1850 frameless function. */
1851 if (sp->k == 0)
5769d3cd 1852 {
34201ae3
UW
1853 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1854 size zero. This is only possible if the next frame is a sentinel
a8c99f38 1855 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1856 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1857 needed, instead the code should simpliy rely on its
1858 analysis. */
edb3359d
DJ
1859 next_frame = get_next_frame (this_frame);
1860 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1861 next_frame = get_next_frame (next_frame);
1862 if (next_frame
f089c433 1863 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1864 return 0;
5769d3cd 1865
a8c99f38
JB
1866 /* If we really have a frameless function, %r14 must be valid
1867 -- in particular, it must point to a different function. */
f089c433 1868 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1869 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1870 if (get_pc_function_start (reg) == func)
5769d3cd 1871 {
a8c99f38
JB
1872 /* However, there is one case where it *is* valid for %r14
1873 to point to the same function -- if this is a recursive
1874 call, and we have stopped in the prologue *before* the
1875 stack frame was allocated.
1876
1877 Recognize this case by looking ahead a bit ... */
5769d3cd 1878
a8c99f38 1879 struct s390_prologue_data data2;
3fc46200 1880 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1881
1882 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
1883 && pv_is_register (*sp, S390_SP_REGNUM)
1884 && sp->k != 0))
a8c99f38 1885 return 0;
5769d3cd 1886 }
5769d3cd 1887 }
5769d3cd
AC
1888
1889
a8c99f38
JB
1890 /* OK, we've found valid prologue data. */
1891 size = -sp->k;
5769d3cd 1892
a8c99f38
JB
1893 /* If the frame pointer originally also holds the same value
1894 as the stack pointer, we're probably using it. If it holds
1895 some other value -- even a constant offset -- it is most
1896 likely used as temp register. */
3fc46200 1897 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1898 frame_pointer = S390_FRAME_REGNUM;
1899 else
1900 frame_pointer = S390_SP_REGNUM;
1901
34201ae3
UW
1902 /* If we've detected a function with stack frame, we'll still have to
1903 treat it as frameless if we're currently within the function epilog
c378eb4e 1904 code at a point where the frame pointer has already been restored.
a8c99f38 1905 This can only happen in an innermost frame. */
0e100dab
AC
1906 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1907 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1908 next_frame = get_next_frame (this_frame);
1909 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1910 next_frame = get_next_frame (next_frame);
f089c433 1911 if (size > 0
edb3359d 1912 && (next_frame == NULL
f089c433 1913 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1914 {
a8c99f38
JB
1915 /* See the comment in s390_in_function_epilogue_p on why this is
1916 not completely reliable ... */
f089c433 1917 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1918 {
a8c99f38
JB
1919 memset (&data, 0, sizeof (data));
1920 size = 0;
1921 frame_pointer = S390_SP_REGNUM;
5769d3cd 1922 }
5769d3cd 1923 }
5769d3cd 1924
a8c99f38
JB
1925 /* Once we know the frame register and the frame size, we can unwind
1926 the current value of the frame register from the next frame, and
34201ae3 1927 add back the frame size to arrive that the previous frame's
a8c99f38 1928 stack pointer value. */
f089c433 1929 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1930 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1931
7803799a
UW
1932 /* Set up ABI call-saved/call-clobbered registers. */
1933 for (i = 0; i < S390_NUM_REGS; i++)
1934 if (!s390_register_call_saved (gdbarch, i))
1935 trad_frame_set_unknown (info->saved_regs, i);
1936
1937 /* CC is always call-clobbered. */
d6db1fab 1938 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1939
121d8485
UW
1940 /* Record the addresses of all register spill slots the prologue parser
1941 has recognized. Consider only registers defined as call-saved by the
1942 ABI; for call-clobbered registers the parser may have recognized
1943 spurious stores. */
5769d3cd 1944
7803799a
UW
1945 for (i = 0; i < 16; i++)
1946 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1947 && data.gpr_slot[i] != 0)
121d8485 1948 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1949
7803799a
UW
1950 for (i = 0; i < 16; i++)
1951 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1952 && data.fpr_slot[i] != 0)
1953 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1954
1955 /* Function return will set PC to %r14. */
d6db1fab 1956 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1957
1958 /* In frameless functions, we unwind simply by moving the return
1959 address to the PC. However, if we actually stored to the
1960 save area, use that -- we might only think the function frameless
1961 because we're in the middle of the prologue ... */
1962 if (size == 0
d6db1fab 1963 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1964 {
d6db1fab 1965 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1966 }
a8c99f38
JB
1967
1968 /* Another sanity check: unless this is a frameless function,
1969 we should have found spill slots for SP and PC.
1970 If not, we cannot unwind further -- this happens e.g. in
1971 libc's thread_start routine. */
1972 if (size > 0)
5769d3cd 1973 {
a8c99f38 1974 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1975 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1976 prev_sp = -1;
5769d3cd 1977 }
a8c99f38
JB
1978
1979 /* We use the current value of the frame register as local_base,
1980 and the top of the register save area as frame_base. */
1981 if (prev_sp != -1)
1982 {
1983 info->frame_base = prev_sp + 16*word_size + 32;
1984 info->local_base = prev_sp - size;
1985 }
1986
1987 info->func = func;
1988 return 1;
5769d3cd
AC
1989}
1990
a78f21af 1991static void
f089c433 1992s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1993 struct s390_unwind_cache *info)
5769d3cd 1994{
f089c433 1995 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1996 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1997 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1998 CORE_ADDR backchain;
1999 ULONGEST reg;
2000 LONGEST sp;
7803799a
UW
2001 int i;
2002
2003 /* Set up ABI call-saved/call-clobbered registers. */
2004 for (i = 0; i < S390_NUM_REGS; i++)
2005 if (!s390_register_call_saved (gdbarch, i))
2006 trad_frame_set_unknown (info->saved_regs, i);
2007
2008 /* CC is always call-clobbered. */
d6db1fab 2009 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
2010
2011 /* Get the backchain. */
f089c433 2012 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 2013 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
2014
2015 /* A zero backchain terminates the frame chain. As additional
2016 sanity check, let's verify that the spill slot for SP in the
2017 save area pointed to by the backchain in fact links back to
2018 the save area. */
2019 if (backchain != 0
e17a4113
UW
2020 && safe_read_memory_integer (backchain + 15*word_size,
2021 word_size, byte_order, &sp)
a8c99f38
JB
2022 && (CORE_ADDR)sp == backchain)
2023 {
2024 /* We don't know which registers were saved, but it will have
34201ae3
UW
2025 to be at least %r14 and %r15. This will allow us to continue
2026 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
2027 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2028 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2029
2030 /* Function return will set PC to %r14. */
d6db1fab 2031 info->saved_regs[S390_PSWA_REGNUM]
7803799a 2032 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
2033
2034 /* We use the current value of the frame register as local_base,
34201ae3 2035 and the top of the register save area as frame_base. */
a8c99f38
JB
2036 info->frame_base = backchain + 16*word_size + 32;
2037 info->local_base = reg;
2038 }
2039
f089c433 2040 info->func = get_frame_pc (this_frame);
5769d3cd
AC
2041}
2042
a8c99f38 2043static struct s390_unwind_cache *
f089c433 2044s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
2045 void **this_prologue_cache)
2046{
62261490 2047 volatile struct gdb_exception ex;
a8c99f38 2048 struct s390_unwind_cache *info;
62261490 2049
a8c99f38
JB
2050 if (*this_prologue_cache)
2051 return *this_prologue_cache;
2052
2053 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2054 *this_prologue_cache = info;
f089c433 2055 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2056 info->func = -1;
2057 info->frame_base = -1;
2058 info->local_base = -1;
2059
62261490
PA
2060 TRY_CATCH (ex, RETURN_MASK_ERROR)
2061 {
2062 /* Try to use prologue analysis to fill the unwind cache.
2063 If this fails, fall back to reading the stack backchain. */
2064 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2065 s390_backchain_frame_unwind_cache (this_frame, info);
2066 }
2067 if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
2068 throw_exception (ex);
a8c99f38
JB
2069
2070 return info;
2071}
5769d3cd 2072
a78f21af 2073static void
f089c433 2074s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2075 void **this_prologue_cache,
2076 struct frame_id *this_id)
5769d3cd 2077{
a8c99f38 2078 struct s390_unwind_cache *info
f089c433 2079 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2080
a8c99f38
JB
2081 if (info->frame_base == -1)
2082 return;
5769d3cd 2083
a8c99f38 2084 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2085}
2086
f089c433
UW
2087static struct value *
2088s390_frame_prev_register (struct frame_info *this_frame,
2089 void **this_prologue_cache, int regnum)
a8c99f38 2090{
7803799a 2091 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2092 struct s390_unwind_cache *info
f089c433 2093 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2094
d6db1fab 2095 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2096}
2097
2098static const struct frame_unwind s390_frame_unwind = {
2099 NORMAL_FRAME,
8fbca658 2100 default_frame_unwind_stop_reason,
a8c99f38 2101 s390_frame_this_id,
f089c433
UW
2102 s390_frame_prev_register,
2103 NULL,
2104 default_frame_sniffer
a8c99f38
JB
2105};
2106
5769d3cd 2107
8e645ae7
AC
2108/* Code stubs and their stack frames. For things like PLTs and NULL
2109 function calls (where there is no true frame and the return address
2110 is in the RETADDR register). */
a8c99f38 2111
8e645ae7
AC
2112struct s390_stub_unwind_cache
2113{
a8c99f38
JB
2114 CORE_ADDR frame_base;
2115 struct trad_frame_saved_reg *saved_regs;
2116};
2117
8e645ae7 2118static struct s390_stub_unwind_cache *
f089c433 2119s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2120 void **this_prologue_cache)
5769d3cd 2121{
f089c433 2122 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2123 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2124 struct s390_stub_unwind_cache *info;
a8c99f38 2125 ULONGEST reg;
5c3cf190 2126
a8c99f38
JB
2127 if (*this_prologue_cache)
2128 return *this_prologue_cache;
5c3cf190 2129
8e645ae7 2130 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2131 *this_prologue_cache = info;
f089c433 2132 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2133
2134 /* The return address is in register %r14. */
d6db1fab 2135 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2136
2137 /* Retrieve stack pointer and determine our frame base. */
f089c433 2138 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2139 info->frame_base = reg + 16*word_size + 32;
2140
2141 return info;
5769d3cd
AC
2142}
2143
a8c99f38 2144static void
f089c433 2145s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2146 void **this_prologue_cache,
2147 struct frame_id *this_id)
5769d3cd 2148{
8e645ae7 2149 struct s390_stub_unwind_cache *info
f089c433
UW
2150 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2151 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2152}
5769d3cd 2153
f089c433
UW
2154static struct value *
2155s390_stub_frame_prev_register (struct frame_info *this_frame,
2156 void **this_prologue_cache, int regnum)
8e645ae7
AC
2157{
2158 struct s390_stub_unwind_cache *info
f089c433 2159 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2160 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2161}
2162
f089c433
UW
2163static int
2164s390_stub_frame_sniffer (const struct frame_unwind *self,
2165 struct frame_info *this_frame,
2166 void **this_prologue_cache)
a8c99f38 2167{
93d42b30 2168 CORE_ADDR addr_in_block;
8e645ae7
AC
2169 bfd_byte insn[S390_MAX_INSTR_SIZE];
2170
2171 /* If the current PC points to non-readable memory, we assume we
2172 have trapped due to an invalid function pointer call. We handle
2173 the non-existing current function like a PLT stub. */
f089c433 2174 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2175 if (in_plt_section (addr_in_block)
f089c433
UW
2176 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2177 return 1;
2178 return 0;
a8c99f38 2179}
5769d3cd 2180
f089c433
UW
2181static const struct frame_unwind s390_stub_frame_unwind = {
2182 NORMAL_FRAME,
8fbca658 2183 default_frame_unwind_stop_reason,
f089c433
UW
2184 s390_stub_frame_this_id,
2185 s390_stub_frame_prev_register,
2186 NULL,
2187 s390_stub_frame_sniffer
2188};
2189
5769d3cd 2190
a8c99f38 2191/* Signal trampoline stack frames. */
5769d3cd 2192
a8c99f38
JB
2193struct s390_sigtramp_unwind_cache {
2194 CORE_ADDR frame_base;
2195 struct trad_frame_saved_reg *saved_regs;
2196};
5769d3cd 2197
a8c99f38 2198static struct s390_sigtramp_unwind_cache *
f089c433 2199s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2200 void **this_prologue_cache)
5769d3cd 2201{
f089c433 2202 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2203 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2204 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2205 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2206 struct s390_sigtramp_unwind_cache *info;
2207 ULONGEST this_sp, prev_sp;
7803799a 2208 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2209 int i;
2210
2211 if (*this_prologue_cache)
2212 return *this_prologue_cache;
5769d3cd 2213
a8c99f38
JB
2214 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2215 *this_prologue_cache = info;
f089c433 2216 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2217
f089c433
UW
2218 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2219 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2220 next_cfa = this_sp + 16*word_size + 32;
2221
2222 /* New-style RT frame:
2223 retcode + alignment (8 bytes)
2224 siginfo (128 bytes)
c378eb4e 2225 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2226 if (next_ra == next_cfa)
2227 {
f0f63663 2228 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2229 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2230 upper GPR halves if present. */
2231 sigreg_high_off = 8;
a8c99f38
JB
2232 }
2233
2234 /* Old-style RT frame and all non-RT frames:
2235 old signal mask (8 bytes)
c378eb4e 2236 pointer to sigregs. */
5769d3cd
AC
2237 else
2238 {
e17a4113
UW
2239 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2240 word_size, byte_order);
7803799a
UW
2241 /* sigregs are followed by signo (4 bytes), then by the
2242 upper GPR halves if present. */
2243 sigreg_high_off = 4;
a8c99f38 2244 }
5769d3cd 2245
a8c99f38 2246 /* The sigregs structure looks like this:
34201ae3
UW
2247 long psw_mask;
2248 long psw_addr;
2249 long gprs[16];
2250 int acrs[16];
2251 int fpc;
2252 int __pad;
2253 double fprs[16]; */
5769d3cd 2254
7803799a
UW
2255 /* PSW mask and address. */
2256 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2257 sigreg_ptr += word_size;
7803799a 2258 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2259 sigreg_ptr += word_size;
2260
2261 /* Then the GPRs. */
2262 for (i = 0; i < 16; i++)
2263 {
2264 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2265 sigreg_ptr += word_size;
2266 }
2267
2268 /* Then the ACRs. */
2269 for (i = 0; i < 16; i++)
2270 {
2271 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2272 sigreg_ptr += 4;
5769d3cd 2273 }
5769d3cd 2274
a8c99f38
JB
2275 /* The floating-point control word. */
2276 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2277 sigreg_ptr += 8;
5769d3cd 2278
a8c99f38
JB
2279 /* And finally the FPRs. */
2280 for (i = 0; i < 16; i++)
2281 {
2282 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2283 sigreg_ptr += 8;
2284 }
2285
7803799a
UW
2286 /* If we have them, the GPR upper halves are appended at the end. */
2287 sigreg_ptr += sigreg_high_off;
2288 if (tdep->gpr_full_regnum != -1)
2289 for (i = 0; i < 16; i++)
2290 {
34201ae3 2291 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2292 sigreg_ptr += 4;
2293 }
2294
a8c99f38
JB
2295 /* Restore the previous frame's SP. */
2296 prev_sp = read_memory_unsigned_integer (
2297 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2298 word_size, byte_order);
5769d3cd 2299
a8c99f38
JB
2300 /* Determine our frame base. */
2301 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2302
a8c99f38 2303 return info;
5769d3cd
AC
2304}
2305
a8c99f38 2306static void
f089c433 2307s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2308 void **this_prologue_cache,
2309 struct frame_id *this_id)
5769d3cd 2310{
a8c99f38 2311 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2312 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2313 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2314}
2315
f089c433
UW
2316static struct value *
2317s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2318 void **this_prologue_cache, int regnum)
a8c99f38
JB
2319{
2320 struct s390_sigtramp_unwind_cache *info
f089c433 2321 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2322 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2323}
2324
f089c433
UW
2325static int
2326s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2327 struct frame_info *this_frame,
2328 void **this_prologue_cache)
5769d3cd 2329{
f089c433 2330 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2331 bfd_byte sigreturn[2];
4c8287ac 2332
8defab1a 2333 if (target_read_memory (pc, sigreturn, 2))
f089c433 2334 return 0;
4c8287ac 2335
237b092b 2336 if (sigreturn[0] != op_svc)
f089c433 2337 return 0;
5769d3cd 2338
a8c99f38
JB
2339 if (sigreturn[1] != 119 /* sigreturn */
2340 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2341 return 0;
34201ae3 2342
f089c433 2343 return 1;
5769d3cd
AC
2344}
2345
f089c433
UW
2346static const struct frame_unwind s390_sigtramp_frame_unwind = {
2347 SIGTRAMP_FRAME,
8fbca658 2348 default_frame_unwind_stop_reason,
f089c433
UW
2349 s390_sigtramp_frame_this_id,
2350 s390_sigtramp_frame_prev_register,
2351 NULL,
2352 s390_sigtramp_frame_sniffer
2353};
2354
237b092b
AA
2355/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2356 upon error. */
2357
2358static LONGEST
2359s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2360 ptid_t ptid)
2361{
2362 struct regcache *regs = get_thread_regcache (ptid);
2363 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2364 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2365 ULONGEST pc;
2366 ULONGEST svc_number = -1;
2367 unsigned opcode;
2368
2369 /* Assume that the PC points after the 2-byte SVC instruction. We
2370 don't currently support SVC via EXECUTE. */
2371 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2372 pc -= 2;
2373 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2374 if (opcode != op_svc)
2375 return -1;
2376
2377 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2378 byte_order);
2379 if (svc_number == 0)
2380 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2381
2382 return svc_number;
2383}
2384
4c8287ac 2385
a8c99f38
JB
2386/* Frame base handling. */
2387
2388static CORE_ADDR
f089c433 2389s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2390{
a8c99f38 2391 struct s390_unwind_cache *info
f089c433 2392 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2393 return info->frame_base;
2394}
2395
2396static CORE_ADDR
f089c433 2397s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2398{
2399 struct s390_unwind_cache *info
f089c433 2400 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2401 return info->local_base;
2402}
2403
2404static const struct frame_base s390_frame_base = {
2405 &s390_frame_unwind,
2406 s390_frame_base_address,
2407 s390_local_base_address,
2408 s390_local_base_address
2409};
2410
2411static CORE_ADDR
2412s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2413{
7803799a 2414 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2415 ULONGEST pc;
7803799a 2416 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2417 return gdbarch_addr_bits_remove (gdbarch, pc);
2418}
2419
2420static CORE_ADDR
2421s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2422{
2423 ULONGEST sp;
2424 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2425 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2426}
2427
2428
a431654a
AC
2429/* DWARF-2 frame support. */
2430
7803799a
UW
2431static struct value *
2432s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2433 int regnum)
2434{
d6db1fab 2435 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2436}
2437
a431654a
AC
2438static void
2439s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2440 struct dwarf2_frame_state_reg *reg,
4a4e5149 2441 struct frame_info *this_frame)
a431654a
AC
2442{
2443 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2444
d6db1fab
UW
2445 /* The condition code (and thus PSW mask) is call-clobbered. */
2446 if (regnum == S390_PSWM_REGNUM)
2447 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2448
2449 /* The PSW address unwinds to the return address. */
2450 else if (regnum == S390_PSWA_REGNUM)
2451 reg->how = DWARF2_FRAME_REG_RA;
2452
7803799a
UW
2453 /* Fixed registers are call-saved or call-clobbered
2454 depending on the ABI in use. */
d6db1fab 2455 else if (regnum < S390_NUM_REGS)
a431654a 2456 {
7803799a 2457 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2458 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2459 else
a431654a 2460 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2461 }
a431654a 2462
d6db1fab
UW
2463 /* We install a special function to unwind pseudos. */
2464 else
7803799a
UW
2465 {
2466 reg->how = DWARF2_FRAME_REG_FN;
2467 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2468 }
2469}
2470
2471
b0cf273e
JB
2472/* Dummy function calls. */
2473
78f8b424
JB
2474/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2475 "Integer-like" types are those that should be passed the way
2476 integers are: integers, enums, ranges, characters, and booleans. */
2477static int
2478is_integer_like (struct type *type)
2479{
2480 enum type_code code = TYPE_CODE (type);
2481
2482 return (code == TYPE_CODE_INT
34201ae3
UW
2483 || code == TYPE_CODE_ENUM
2484 || code == TYPE_CODE_RANGE
2485 || code == TYPE_CODE_CHAR
2486 || code == TYPE_CODE_BOOL);
78f8b424
JB
2487}
2488
78f8b424
JB
2489/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2490 "Pointer-like" types are those that should be passed the way
2491 pointers are: pointers and references. */
2492static int
2493is_pointer_like (struct type *type)
2494{
2495 enum type_code code = TYPE_CODE (type);
2496
2497 return (code == TYPE_CODE_PTR
34201ae3 2498 || code == TYPE_CODE_REF);
78f8b424
JB
2499}
2500
2501
20a940cc
JB
2502/* Return non-zero if TYPE is a `float singleton' or `double
2503 singleton', zero otherwise.
2504
2505 A `T singleton' is a struct type with one member, whose type is
2506 either T or a `T singleton'. So, the following are all float
2507 singletons:
2508
2509 struct { float x };
2510 struct { struct { float x; } x; };
2511 struct { struct { struct { float x; } x; } x; };
2512
2513 ... and so on.
2514
b0cf273e
JB
2515 All such structures are passed as if they were floats or doubles,
2516 as the (revised) ABI says. */
20a940cc
JB
2517static int
2518is_float_singleton (struct type *type)
2519{
b0cf273e
JB
2520 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2521 {
2522 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2523 CHECK_TYPEDEF (singleton_type);
2524
2525 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2526 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2527 || is_float_singleton (singleton_type));
2528 }
2529
2530 return 0;
20a940cc
JB
2531}
2532
2533
2534/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2535 "Struct-like" types are those that should be passed as structs are:
2536 structs and unions.
2537
2538 As an odd quirk, not mentioned in the ABI, GCC passes float and
2539 double singletons as if they were a plain float, double, etc. (The
2540 corresponding union types are handled normally.) So we exclude
2541 those types here. *shrug* */
2542static int
2543is_struct_like (struct type *type)
2544{
2545 enum type_code code = TYPE_CODE (type);
2546
2547 return (code == TYPE_CODE_UNION
34201ae3 2548 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
20a940cc
JB
2549}
2550
2551
2552/* Return non-zero if TYPE is a float-like type, zero otherwise.
2553 "Float-like" types are those that should be passed as
2554 floating-point values are.
2555
2556 You'd think this would just be floats, doubles, long doubles, etc.
2557 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2558 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2559 corresponding union types are handled normally.) So we include
20a940cc
JB
2560 those types here. *shrug* */
2561static int
2562is_float_like (struct type *type)
2563{
2564 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2565 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
34201ae3 2566 || is_float_singleton (type));
20a940cc
JB
2567}
2568
2569
78f8b424 2570static int
b0cf273e 2571is_power_of_two (unsigned int n)
78f8b424 2572{
b0cf273e 2573 return ((n & (n - 1)) == 0);
78f8b424
JB
2574}
2575
b0cf273e
JB
2576/* Return non-zero if TYPE should be passed as a pointer to a copy,
2577 zero otherwise. */
4d819d0e 2578static int
b0cf273e 2579s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2580{
354ecfd5 2581 if (TYPE_LENGTH (type) > 8)
b0cf273e 2582 return 1;
4d819d0e 2583
56b9d9ac
UW
2584 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2585 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2586 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2587}
2588
b0cf273e
JB
2589/* Return non-zero if TYPE should be passed in a float register
2590 if possible. */
78f8b424 2591static int
b0cf273e 2592s390_function_arg_float (struct type *type)
78f8b424 2593{
354ecfd5 2594 if (TYPE_LENGTH (type) > 8)
b0cf273e 2595 return 0;
78f8b424 2596
b0cf273e 2597 return is_float_like (type);
4d819d0e
JB
2598}
2599
b0cf273e
JB
2600/* Return non-zero if TYPE should be passed in an integer register
2601 (or a pair of integer registers) if possible. */
78f8b424 2602static int
b0cf273e 2603s390_function_arg_integer (struct type *type)
78f8b424 2604{
354ecfd5 2605 if (TYPE_LENGTH (type) > 8)
b0cf273e 2606 return 0;
78f8b424 2607
b0cf273e
JB
2608 return is_integer_like (type)
2609 || is_pointer_like (type)
354ecfd5 2610 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2611}
2612
78f8b424
JB
2613/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2614 word as required for the ABI. */
2615static LONGEST
e17a4113 2616extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2617{
e17a4113 2618 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2619 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2620
2621 /* Even structs get passed in the least significant bits of the
2622 register / memory word. It's not really right to extract them as
2623 an integer, but it does take care of the extension. */
2624 if (TYPE_UNSIGNED (type))
0fd88904 2625 return extract_unsigned_integer (value_contents (arg),
34201ae3 2626 TYPE_LENGTH (type), byte_order);
78f8b424 2627 else
0fd88904 2628 return extract_signed_integer (value_contents (arg),
34201ae3 2629 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2630}
2631
2632
78f8b424
JB
2633/* Return the alignment required by TYPE. */
2634static int
2635alignment_of (struct type *type)
2636{
2637 int alignment;
2638
2639 if (is_integer_like (type)
2640 || is_pointer_like (type)
a16b8bcd
UW
2641 || TYPE_CODE (type) == TYPE_CODE_FLT
2642 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2643 alignment = TYPE_LENGTH (type);
2644 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
34201ae3 2645 || TYPE_CODE (type) == TYPE_CODE_UNION)
78f8b424
JB
2646 {
2647 int i;
2648
2649 alignment = 1;
2650 for (i = 0; i < TYPE_NFIELDS (type); i++)
34201ae3
UW
2651 {
2652 int field_alignment
56b9d9ac 2653 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424 2654
34201ae3
UW
2655 if (field_alignment > alignment)
2656 alignment = field_alignment;
2657 }
78f8b424
JB
2658 }
2659 else
2660 alignment = 1;
2661
2662 /* Check that everything we ever return is a power of two. Lots of
2663 code doesn't want to deal with aligning things to arbitrary
2664 boundaries. */
2665 gdb_assert ((alignment & (alignment - 1)) == 0);
2666
2667 return alignment;
2668}
2669
2670
2671/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2672 place to be passed to a function, as specified by the "GNU/Linux
2673 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2674
2675 SP is the current stack pointer. We must put arguments, links,
2676 padding, etc. whereever they belong, and return the new stack
2677 pointer value.
34201ae3 2678
78f8b424
JB
2679 If STRUCT_RETURN is non-zero, then the function we're calling is
2680 going to return a structure by value; STRUCT_ADDR is the address of
2681 a block we've allocated for it on the stack.
2682
2683 Our caller has taken care of any type promotions needed to satisfy
2684 prototypes or the old K&R argument-passing rules. */
a78f21af 2685static CORE_ADDR
7d9b040b 2686s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2687 struct regcache *regcache, CORE_ADDR bp_addr,
2688 int nargs, struct value **args, CORE_ADDR sp,
2689 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2690{
b0cf273e
JB
2691 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2692 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2693 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2694 int i;
5769d3cd 2695
78f8b424
JB
2696 /* If the i'th argument is passed as a reference to a copy, then
2697 copy_addr[i] is the address of the copy we made. */
2698 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2699
c0cc4c83 2700 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2701 for (i = 0; i < nargs; i++)
2702 {
2703 struct value *arg = args[i];
56b9d9ac 2704 struct type *type = check_typedef (value_type (arg));
5769d3cd 2705
b0cf273e 2706 if (s390_function_arg_pass_by_reference (type))
34201ae3
UW
2707 {
2708 sp -= TYPE_LENGTH (type);
2709 sp = align_down (sp, alignment_of (type));
2710 copy_addr[i] = sp;
2711 }
5769d3cd 2712 }
5769d3cd 2713
78f8b424
JB
2714 /* Reserve space for the parameter area. As a conservative
2715 simplification, we assume that everything will be passed on the
34201ae3 2716 stack. Since every argument larger than 8 bytes will be
b0cf273e
JB
2717 passed by reference, we use this simple upper bound. */
2718 sp -= nargs * 8;
78f8b424 2719
78f8b424
JB
2720 /* After all that, make sure it's still aligned on an eight-byte
2721 boundary. */
5b03f266 2722 sp = align_down (sp, 8);
78f8b424 2723
c0cc4c83
UW
2724 /* Allocate the standard frame areas: the register save area, the
2725 word reserved for the compiler (which seems kind of meaningless),
2726 and the back chain pointer. */
2727 sp -= 16*word_size + 32;
2728
2729 /* Now we have the final SP value. Make sure we didn't underflow;
2730 on 31-bit, this would result in addresses with the high bit set,
2731 which causes confusion elsewhere. Note that if we error out
2732 here, stack and registers remain untouched. */
2733 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2734 error (_("Stack overflow"));
2735
2736
78f8b424
JB
2737 /* Finally, place the actual parameters, working from SP towards
2738 higher addresses. The code above is supposed to reserve enough
2739 space for this. */
2740 {
2741 int fr = 0;
2742 int gr = 2;
c0cc4c83 2743 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2744
b0cf273e 2745 /* A struct is returned using general register 2. */
4d819d0e 2746 if (struct_return)
b0cf273e
JB
2747 {
2748 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2749 struct_addr);
b0cf273e
JB
2750 gr++;
2751 }
4d819d0e 2752
78f8b424
JB
2753 for (i = 0; i < nargs; i++)
2754 {
34201ae3
UW
2755 struct value *arg = args[i];
2756 struct type *type = check_typedef (value_type (arg));
2757 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2758
2759 if (s390_function_arg_pass_by_reference (type))
2760 {
c0cc4c83
UW
2761 /* Actually copy the argument contents to the stack slot
2762 that was reserved above. */
2763 write_memory (copy_addr[i], value_contents (arg), length);
2764
b0cf273e
JB
2765 if (gr <= 6)
2766 {
2767 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2768 copy_addr[i]);
b0cf273e
JB
2769 gr++;
2770 }
2771 else
2772 {
e17a4113
UW
2773 write_memory_unsigned_integer (starg, word_size, byte_order,
2774 copy_addr[i]);
b0cf273e
JB
2775 starg += word_size;
2776 }
2777 }
2778 else if (s390_function_arg_float (type))
2779 {
2780 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2781 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2782 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2783 {
2784 /* When we store a single-precision value in an FP register,
2785 it occupies the leftmost bits. */
2786 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2787 0, length, value_contents (arg));
b0cf273e
JB
2788 fr += 2;
2789 }
2790 else
2791 {
2792 /* When we store a single-precision value in a stack slot,
2793 it occupies the rightmost bits. */
2794 starg = align_up (starg + length, word_size);
34201ae3 2795 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2796 }
2797 }
2798 else if (s390_function_arg_integer (type) && length <= word_size)
2799 {
2800 if (gr <= 6)
2801 {
2802 /* Integer arguments are always extended to word size. */
2803 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2804 extend_simple_arg (gdbarch,
2805 arg));
b0cf273e
JB
2806 gr++;
2807 }
2808 else
2809 {
2810 /* Integer arguments are always extended to word size. */
e17a4113 2811 write_memory_signed_integer (starg, word_size, byte_order,
34201ae3
UW
2812 extend_simple_arg (gdbarch, arg));
2813 starg += word_size;
b0cf273e
JB
2814 }
2815 }
2816 else if (s390_function_arg_integer (type) && length == 2*word_size)
2817 {
2818 if (gr <= 5)
2819 {
2820 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2821 value_contents (arg));
b0cf273e 2822 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2823 value_contents (arg) + word_size);
b0cf273e
JB
2824 gr += 2;
2825 }
2826 else
2827 {
2828 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2829 in it, then don't go back and use it again later. */
2830 gr = 7;
2831
0fd88904 2832 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2833 starg += length;
2834 }
2835 }
2836 else
e2e0b3e5 2837 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2838 }
2839 }
2840
8de7d199
UW
2841 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2842 if (word_size == 4)
2843 {
2844 ULONGEST pswa;
2845 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2846 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2847 }
b0cf273e 2848 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2849
b0cf273e
JB
2850 /* Store updated stack pointer. */
2851 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2852
a8c99f38 2853 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2854 which is actually the top of the register save area. */
2855 return sp + 16*word_size + 32;
5769d3cd
AC
2856}
2857
f089c433 2858/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2859 dummy frame. The frame ID's base needs to match the TOS value
2860 returned by push_dummy_call, and the PC match the dummy frame's
2861 breakpoint. */
2862static struct frame_id
f089c433 2863s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2864{
a8c99f38 2865 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2866 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2867 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2868
121d8485 2869 return frame_id_build (sp + 16*word_size + 32,
34201ae3 2870 get_frame_pc (this_frame));
b0cf273e 2871}
c8f9d51c 2872
4074e13c
JB
2873static CORE_ADDR
2874s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2875{
2876 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2877 always be aligned on an eight-byte boundary. */
2878 return (addr & -8);
2879}
2880
2881
b0cf273e
JB
2882/* Function return value access. */
2883
2884static enum return_value_convention
2885s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2886{
354ecfd5 2887 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2888 return RETURN_VALUE_STRUCT_CONVENTION;
2889
2890 switch (TYPE_CODE (type))
2891 {
2892 case TYPE_CODE_STRUCT:
2893 case TYPE_CODE_UNION:
2894 case TYPE_CODE_ARRAY:
56b9d9ac 2895 case TYPE_CODE_COMPLEX:
b0cf273e 2896 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2897
b0cf273e
JB
2898 default:
2899 return RETURN_VALUE_REGISTER_CONVENTION;
2900 }
c8f9d51c
JB
2901}
2902
b0cf273e 2903static enum return_value_convention
6a3a010b 2904s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2905 struct type *type, struct regcache *regcache,
2906 gdb_byte *out, const gdb_byte *in)
5769d3cd 2907{
e17a4113 2908 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2909 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2910 enum return_value_convention rvc;
2911 int length;
2912
2913 type = check_typedef (type);
2914 rvc = s390_return_value_convention (gdbarch, type);
2915 length = TYPE_LENGTH (type);
2916
b0cf273e
JB
2917 if (in)
2918 {
2919 switch (rvc)
2920 {
2921 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2922 if (TYPE_CODE (type) == TYPE_CODE_FLT
2923 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2924 {
2925 /* When we store a single-precision value in an FP register,
2926 it occupies the leftmost bits. */
34201ae3 2927 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2928 0, length, in);
2929 }
2930 else if (length <= word_size)
2931 {
2932 /* Integer arguments are always extended to word size. */
2933 if (TYPE_UNSIGNED (type))
2934 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2935 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2936 else
2937 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2938 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2939 }
2940 else if (length == 2*word_size)
2941 {
2942 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2943 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2944 }
2945 else
e2e0b3e5 2946 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2947 break;
2948
2949 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2950 error (_("Cannot set function return value."));
b0cf273e
JB
2951 break;
2952 }
2953 }
2954 else if (out)
2955 {
2956 switch (rvc)
2957 {
2958 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2959 if (TYPE_CODE (type) == TYPE_CODE_FLT
2960 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2961 {
2962 /* When we store a single-precision value in an FP register,
2963 it occupies the leftmost bits. */
34201ae3 2964 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2965 0, length, out);
2966 }
2967 else if (length <= word_size)
2968 {
2969 /* Integer arguments occupy the rightmost bits. */
34201ae3 2970 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
b0cf273e
JB
2971 word_size - length, length, out);
2972 }
2973 else if (length == 2*word_size)
2974 {
2975 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2976 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2977 }
2978 else
e2e0b3e5 2979 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2980 break;
5769d3cd 2981
b0cf273e 2982 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2983 error (_("Function return value unknown."));
b0cf273e
JB
2984 break;
2985 }
2986 }
2987
2988 return rvc;
2989}
5769d3cd
AC
2990
2991
a8c99f38
JB
2992/* Breakpoints. */
2993
43af2100 2994static const gdb_byte *
c378eb4e
MS
2995s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2996 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2997{
43af2100 2998 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2999
3000 *lenptr = sizeof (breakpoint);
3001 return breakpoint;
3002}
3003
5769d3cd 3004
a8c99f38 3005/* Address handling. */
5769d3cd
AC
3006
3007static CORE_ADDR
24568a2c 3008s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 3009{
a8c99f38 3010 return addr & 0x7fffffff;
5769d3cd
AC
3011}
3012
ffc65945
KB
3013static int
3014s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
3015{
3016 if (byte_size == 4)
119ac181 3017 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3018 else
3019 return 0;
3020}
3021
3022static const char *
3023s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
3024{
119ac181 3025 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
3026 return "mode32";
3027 else
3028 return NULL;
3029}
3030
a78f21af 3031static int
c378eb4e
MS
3032s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
3033 const char *name,
ffc65945
KB
3034 int *type_flags_ptr)
3035{
3036 if (strcmp (name, "mode32") == 0)
3037 {
119ac181 3038 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
3039 return 1;
3040 }
3041 else
3042 return 0;
3043}
3044
55aa24fb
SDJ
3045/* Implementation of `gdbarch_stap_is_single_operand', as defined in
3046 gdbarch.h. */
3047
3048static int
3049s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
3050{
3051 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
3052 or indirection. */
3053 || *s == '%' /* Register access. */
3054 || isdigit (*s)); /* Literal number. */
3055}
3056
a8c99f38
JB
3057/* Set up gdbarch struct. */
3058
a78f21af 3059static struct gdbarch *
5769d3cd
AC
3060s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3061{
7803799a
UW
3062 const struct target_desc *tdesc = info.target_desc;
3063 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
3064 struct gdbarch *gdbarch;
3065 struct gdbarch_tdep *tdep;
7803799a
UW
3066 int tdep_abi;
3067 int have_upper = 0;
c642a434
UW
3068 int have_linux_v1 = 0;
3069 int have_linux_v2 = 0;
7803799a 3070 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
3071 static const char *const stap_register_prefixes[] = { "%", NULL };
3072 static const char *const stap_register_indirection_prefixes[] = { "(",
3073 NULL };
3074 static const char *const stap_register_indirection_suffixes[] = { ")",
3075 NULL };
7803799a
UW
3076
3077 /* Default ABI and register size. */
3078 switch (info.bfd_arch_info->mach)
3079 {
3080 case bfd_mach_s390_31:
3081 tdep_abi = ABI_LINUX_S390;
3082 break;
3083
3084 case bfd_mach_s390_64:
3085 tdep_abi = ABI_LINUX_ZSERIES;
3086 break;
3087
3088 default:
3089 return NULL;
3090 }
3091
3092 /* Use default target description if none provided by the target. */
3093 if (!tdesc_has_registers (tdesc))
3094 {
3095 if (tdep_abi == ABI_LINUX_S390)
3096 tdesc = tdesc_s390_linux32;
3097 else
3098 tdesc = tdesc_s390x_linux64;
3099 }
3100
3101 /* Check any target description for validity. */
3102 if (tdesc_has_registers (tdesc))
3103 {
3104 static const char *const gprs[] = {
3105 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3106 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3107 };
3108 static const char *const fprs[] = {
3109 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3110 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3111 };
3112 static const char *const acrs[] = {
3113 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3114 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3115 };
3116 static const char *const gprs_lower[] = {
3117 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3118 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3119 };
3120 static const char *const gprs_upper[] = {
3121 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3122 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3123 };
4ac33720
UW
3124 static const char *const tdb_regs[] = {
3125 "tdb0", "tac", "tct", "atia",
3126 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
3127 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
3128 };
7803799a
UW
3129 const struct tdesc_feature *feature;
3130 int i, valid_p = 1;
3131
3132 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3133 if (feature == NULL)
3134 return NULL;
3135
3136 tdesc_data = tdesc_data_alloc ();
3137
3138 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3139 S390_PSWM_REGNUM, "pswm");
3140 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3141 S390_PSWA_REGNUM, "pswa");
3142
3143 if (tdesc_unnumbered_register (feature, "r0"))
3144 {
3145 for (i = 0; i < 16; i++)
3146 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3147 S390_R0_REGNUM + i, gprs[i]);
3148 }
3149 else
3150 {
3151 have_upper = 1;
3152
3153 for (i = 0; i < 16; i++)
3154 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3155 S390_R0_REGNUM + i,
3156 gprs_lower[i]);
3157 for (i = 0; i < 16; i++)
3158 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3159 S390_R0_UPPER_REGNUM + i,
3160 gprs_upper[i]);
3161 }
3162
3163 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3164 if (feature == NULL)
3165 {
3166 tdesc_data_cleanup (tdesc_data);
3167 return NULL;
3168 }
3169
3170 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3171 S390_FPC_REGNUM, "fpc");
3172 for (i = 0; i < 16; i++)
3173 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3174 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3175
7803799a
UW
3176 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3177 if (feature == NULL)
3178 {
3179 tdesc_data_cleanup (tdesc_data);
3180 return NULL;
3181 }
3182
3183 for (i = 0; i < 16; i++)
3184 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3185 S390_A0_REGNUM + i, acrs[i]);
3186
94eae614 3187 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3188 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3189 if (feature)
3190 {
3191 tdesc_numbered_register (feature, tdesc_data,
3192 S390_ORIG_R2_REGNUM, "orig_r2");
3193
3194 if (tdesc_numbered_register (feature, tdesc_data,
3195 S390_LAST_BREAK_REGNUM, "last_break"))
3196 have_linux_v1 = 1;
3197
3198 if (tdesc_numbered_register (feature, tdesc_data,
3199 S390_SYSTEM_CALL_REGNUM, "system_call"))
3200 have_linux_v2 = 1;
3201
3202 if (have_linux_v2 > have_linux_v1)
3203 valid_p = 0;
3204 }
3205
4ac33720
UW
3206 /* Transaction diagnostic block. */
3207 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3208 if (feature)
3209 {
3210 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3211 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3212 S390_TDB_DWORD0_REGNUM + i,
3213 tdb_regs[i]);
3214 }
3215
7803799a
UW
3216 if (!valid_p)
3217 {
3218 tdesc_data_cleanup (tdesc_data);
3219 return NULL;
3220 }
3221 }
5769d3cd 3222
7803799a
UW
3223 /* Find a candidate among extant architectures. */
3224 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3225 arches != NULL;
3226 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3227 {
3228 tdep = gdbarch_tdep (arches->gdbarch);
3229 if (!tdep)
3230 continue;
3231 if (tdep->abi != tdep_abi)
3232 continue;
3233 if ((tdep->gpr_full_regnum != -1) != have_upper)
3234 continue;
3235 if (tdesc_data != NULL)
3236 tdesc_data_cleanup (tdesc_data);
3237 return arches->gdbarch;
3238 }
5769d3cd 3239
7803799a 3240 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 3241 tdep = XCNEW (struct gdbarch_tdep);
7803799a 3242 tdep->abi = tdep_abi;
d0f54f9d 3243 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3244
3245 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3246 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3247
1de90795
UW
3248 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3249 We can safely let them default to 128-bit, since the debug info
3250 will give the size of type actually used in each case. */
3251 set_gdbarch_long_double_bit (gdbarch, 128);
3252 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3253
aaab4dba 3254 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3255 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3256 always. */
5769d3cd 3257 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3258 /* Stack grows downward. */
3259 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3260 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3261 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3262 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3263
7803799a 3264 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3265 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3266 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3267 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3268 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3269 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d 3270 set_gdbarch_regset_from_core_section (gdbarch,
34201ae3 3271 s390_regset_from_core_section);
7803799a 3272 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3273 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3274 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3275 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3276 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3277 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3278 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3279 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 3280 s390_pseudo_register_reggroup_p);
7803799a
UW
3281 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3282
3283 /* Assign pseudo register numbers. */
3284 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3285 last_pseudo_reg = first_pseudo_reg;
3286 tdep->gpr_full_regnum = -1;
3287 if (have_upper)
3288 {
3289 tdep->gpr_full_regnum = last_pseudo_reg;
3290 last_pseudo_reg += 16;
3291 }
3292 tdep->pc_regnum = last_pseudo_reg++;
3293 tdep->cc_regnum = last_pseudo_reg++;
3294 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3295 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3296
b0cf273e
JB
3297 /* Inferior function calls. */
3298 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3299 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3300 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3301 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3302
237b092b
AA
3303 /* Syscall handling. */
3304 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3305
a8c99f38 3306 /* Frame handling. */
a431654a 3307 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3308 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3309 dwarf2_append_unwinders (gdbarch);
a431654a 3310 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3311 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3312 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3313 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3314 frame_base_set_default (gdbarch, &s390_frame_base);
3315 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3316 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3317
1db4e8a0
UW
3318 /* Displaced stepping. */
3319 set_gdbarch_displaced_step_copy_insn (gdbarch,
34201ae3 3320 simple_displaced_step_copy_insn);
1db4e8a0
UW
3321 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3322 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 3323 simple_displaced_step_free_closure);
1db4e8a0 3324 set_gdbarch_displaced_step_location (gdbarch,
34201ae3 3325 displaced_step_at_entry_point);
1db4e8a0
UW
3326 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3327
70728992
PA
3328 /* Note that GNU/Linux is the only OS supported on this
3329 platform. */
3330 linux_init_abi (info, gdbarch);
3331
7803799a 3332 switch (tdep->abi)
5769d3cd 3333 {
7803799a 3334 case ABI_LINUX_S390:
d0f54f9d
JB
3335 tdep->gregset = &s390_gregset;
3336 tdep->sizeof_gregset = s390_sizeof_gregset;
3337 tdep->fpregset = &s390_fpregset;
3338 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3339
3340 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3341 set_solib_svr4_fetch_link_map_offsets
3342 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 3343
237b092b
AA
3344 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
3345
c642a434
UW
3346 if (have_upper)
3347 {
3348 if (have_linux_v2)
3349 set_gdbarch_core_regset_sections (gdbarch,
3350 s390_linux64v2_regset_sections);
3351 else if (have_linux_v1)
3352 set_gdbarch_core_regset_sections (gdbarch,
3353 s390_linux64v1_regset_sections);
3354 else
3355 set_gdbarch_core_regset_sections (gdbarch,
3356 s390_linux64_regset_sections);
3357 }
3358 else
3359 {
3360 if (have_linux_v2)
3361 set_gdbarch_core_regset_sections (gdbarch,
3362 s390_linux32v2_regset_sections);
3363 else if (have_linux_v1)
3364 set_gdbarch_core_regset_sections (gdbarch,
3365 s390_linux32v1_regset_sections);
3366 else
3367 set_gdbarch_core_regset_sections (gdbarch,
3368 s390_linux32_regset_sections);
3369 }
5769d3cd 3370 break;
b0cf273e 3371
7803799a 3372 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3373 tdep->gregset = &s390x_gregset;
3374 tdep->sizeof_gregset = s390x_sizeof_gregset;
3375 tdep->fpregset = &s390_fpregset;
3376 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3377
3378 set_gdbarch_long_bit (gdbarch, 64);
3379 set_gdbarch_long_long_bit (gdbarch, 64);
3380 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3381 set_solib_svr4_fetch_link_map_offsets
3382 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 3383 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 3384 s390_address_class_type_flags);
ffc65945 3385 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 3386 s390_address_class_type_flags_to_name);
ffc65945 3387 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 3388 s390_address_class_name_to_type_flags);
c642a434 3389
237b092b
AA
3390 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
3391
c642a434
UW
3392 if (have_linux_v2)
3393 set_gdbarch_core_regset_sections (gdbarch,
3394 s390x_linux64v2_regset_sections);
3395 else if (have_linux_v1)
3396 set_gdbarch_core_regset_sections (gdbarch,
3397 s390x_linux64v1_regset_sections);
3398 else
3399 set_gdbarch_core_regset_sections (gdbarch,
3400 s390x_linux64_regset_sections);
5769d3cd
AC
3401 break;
3402 }
3403
36482093
AC
3404 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3405
982e9687
UW
3406 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3407
b2756930
KB
3408 /* Enable TLS support. */
3409 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 3410 svr4_fetch_objfile_link_map);
b2756930 3411
1dd635ac
UW
3412 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3413
55aa24fb 3414 /* SystemTap functions. */
05c0465e
SDJ
3415 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3416 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3417 stap_register_indirection_prefixes);
3418 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3419 stap_register_indirection_suffixes);
55aa24fb
SDJ
3420 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3421
5769d3cd
AC
3422 return gdbarch;
3423}
3424
3425
a78f21af
AC
3426extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3427
5769d3cd 3428void
5ae5f592 3429_initialize_s390_tdep (void)
5769d3cd 3430{
5769d3cd
AC
3431 /* Hook us into the gdbarch mechanism. */
3432 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3433
94eae614 3434 /* Initialize the GNU/Linux target descriptions. */
7803799a 3435 initialize_tdesc_s390_linux32 ();
c642a434
UW
3436 initialize_tdesc_s390_linux32v1 ();
3437 initialize_tdesc_s390_linux32v2 ();
7803799a 3438 initialize_tdesc_s390_linux64 ();
c642a434
UW
3439 initialize_tdesc_s390_linux64v1 ();
3440 initialize_tdesc_s390_linux64v2 ();
4ac33720 3441 initialize_tdesc_s390_te_linux64 ();
7803799a 3442 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3443 initialize_tdesc_s390x_linux64v1 ();
3444 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3445 initialize_tdesc_s390x_te_linux64 ();
5769d3cd 3446}
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