[Ada] move some variables to scope where they are used
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
4c38e0a4 3 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
469db033 4 Free Software Foundation, Inc.
ca557f44 5
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AC
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 23
d0f54f9d 24#include "defs.h"
5769d3cd
AC
25#include "arch-utils.h"
26#include "frame.h"
27#include "inferior.h"
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
78f8b424 42#include "gdb_assert.h"
a89aa300 43#include "dis-asm.h"
76a9d10f 44#include "solib-svr4.h"
3fc46200 45#include "prologue-value.h"
70728992 46#include "linux-tdep.h"
d0f54f9d 47#include "s390-tdep.h"
5769d3cd 48
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UW
49#include "features/s390-linux32.c"
50#include "features/s390-linux64.c"
51#include "features/s390x-linux64.c"
52
60e6cc42 53
d0f54f9d
JB
54/* The tdep structure. */
55
56struct gdbarch_tdep
5769d3cd 57{
b0cf273e
JB
58 /* ABI version. */
59 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
60
7803799a
UW
61 /* Pseudo register numbers. */
62 int gpr_full_regnum;
63 int pc_regnum;
64 int cc_regnum;
65
d0f54f9d
JB
66 /* Core file register sets. */
67 const struct regset *gregset;
68 int sizeof_gregset;
69
70 const struct regset *fpregset;
71 int sizeof_fpregset;
72};
73
74
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UW
75/* ABI call-saved register information. */
76
77static int
78s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 79{
7803799a
UW
80 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
81
82 switch (tdep->abi)
6707b003 83 {
7803799a
UW
84 case ABI_LINUX_S390:
85 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
86 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
87 || regnum == S390_A0_REGNUM)
88 return 1;
6707b003 89
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UW
90 break;
91
92 case ABI_LINUX_ZSERIES:
93 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
94 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
95 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
96 return 1;
97
98 break;
99 }
100
101 return 0;
5769d3cd
AC
102}
103
7803799a 104
d0f54f9d
JB
105/* DWARF Register Mapping. */
106
107static int s390_dwarf_regmap[] =
108{
109 /* General Purpose Registers. */
110 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
111 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
112 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
113 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
114
115 /* Floating Point Registers. */
116 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
117 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
118 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
119 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
120
121 /* Control Registers (not mapped). */
122 -1, -1, -1, -1, -1, -1, -1, -1,
123 -1, -1, -1, -1, -1, -1, -1, -1,
124
125 /* Access Registers. */
126 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
127 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
128 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
129 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
130
131 /* Program Status Word. */
132 S390_PSWM_REGNUM,
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UW
133 S390_PSWA_REGNUM,
134
135 /* GPR Lower Half Access. */
136 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
137 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
138 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
139 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
d0f54f9d
JB
140};
141
142/* Convert DWARF register number REG to the appropriate register
143 number used by GDB. */
a78f21af 144static int
d3f73121 145s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 146{
7803799a
UW
147 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
148
149 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
150 GPRs. Note that call frame information still refers to the 32-bit
151 lower halves, because s390_adjust_frame_regnum uses register numbers
152 66 .. 81 to access GPRs. */
153 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
154 return tdep->gpr_full_regnum + reg;
d0f54f9d 155
16aff9a6 156 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 157 return s390_dwarf_regmap[reg];
d0f54f9d 158
7803799a
UW
159 warning (_("Unmapped DWARF Register #%d encountered."), reg);
160 return -1;
161}
d0f54f9d 162
7803799a
UW
163/* Translate a .eh_frame register to DWARF register, or adjust a
164 .debug_frame register. */
165static int
166s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
167{
168 /* See s390_dwarf_reg_to_regnum for comments. */
169 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
170}
171
d0f54f9d 172
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UW
173/* Pseudo registers. */
174
175static const char *
176s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 177{
7803799a 178 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 179
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UW
180 if (regnum == tdep->pc_regnum)
181 return "pc";
d0f54f9d 182
7803799a
UW
183 if (regnum == tdep->cc_regnum)
184 return "cc";
d0f54f9d 185
7803799a
UW
186 if (tdep->gpr_full_regnum != -1
187 && regnum >= tdep->gpr_full_regnum
188 && regnum < tdep->gpr_full_regnum + 16)
189 {
190 static const char *full_name[] = {
191 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
192 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
193 };
194 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 195 }
7803799a
UW
196
197 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
198}
199
7803799a
UW
200static struct type *
201s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 202{
7803799a 203 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 204
7803799a
UW
205 if (regnum == tdep->pc_regnum)
206 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 207
7803799a
UW
208 if (regnum == tdep->cc_regnum)
209 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 210
7803799a
UW
211 if (tdep->gpr_full_regnum != -1
212 && regnum >= tdep->gpr_full_regnum
213 && regnum < tdep->gpr_full_regnum + 16)
214 return builtin_type (gdbarch)->builtin_uint64;
215
216 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
217}
218
d0f54f9d 219static void
7803799a
UW
220s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
221 int regnum, gdb_byte *buf)
d0f54f9d 222{
7803799a 223 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 224 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 225 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
226 ULONGEST val;
227
7803799a 228 if (regnum == tdep->pc_regnum)
d0f54f9d 229 {
7803799a
UW
230 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
231 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
232 val &= 0x7fffffff;
233 store_unsigned_integer (buf, regsize, byte_order, val);
234 return;
235 }
d0f54f9d 236
7803799a
UW
237 if (regnum == tdep->cc_regnum)
238 {
d0f54f9d 239 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
7803799a
UW
240 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
241 val = (val >> 12) & 3;
242 else
243 val = (val >> 44) & 3;
244 store_unsigned_integer (buf, regsize, byte_order, val);
245 return;
246 }
d0f54f9d 247
7803799a
UW
248 if (tdep->gpr_full_regnum != -1
249 && regnum >= tdep->gpr_full_regnum
250 && regnum < tdep->gpr_full_regnum + 16)
251 {
252 ULONGEST val_upper;
253 regnum -= tdep->gpr_full_regnum;
254
255 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
256 regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
257 &val_upper);
258 val |= val_upper << 32;
259 store_unsigned_integer (buf, regsize, byte_order, val);
260 return;
d0f54f9d 261 }
7803799a
UW
262
263 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
264}
265
266static void
7803799a
UW
267s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
268 int regnum, const gdb_byte *buf)
d0f54f9d 269{
7803799a 270 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 271 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 272 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
273 ULONGEST val, psw;
274
7803799a 275 if (regnum == tdep->pc_regnum)
d0f54f9d 276 {
7803799a
UW
277 val = extract_unsigned_integer (buf, regsize, byte_order);
278 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
279 {
280 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
281 val = (psw & 0x80000000) | (val & 0x7fffffff);
282 }
283 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
284 return;
285 }
d0f54f9d 286
7803799a
UW
287 if (regnum == tdep->cc_regnum)
288 {
289 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 290 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
291 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
292 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
293 else
294 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
295 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
296 return;
297 }
d0f54f9d 298
7803799a
UW
299 if (tdep->gpr_full_regnum != -1
300 && regnum >= tdep->gpr_full_regnum
301 && regnum < tdep->gpr_full_regnum + 16)
302 {
303 regnum -= tdep->gpr_full_regnum;
304 val = extract_unsigned_integer (buf, regsize, byte_order);
305 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
306 val & 0xffffffff);
307 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
308 val >> 32);
309 return;
d0f54f9d 310 }
7803799a
UW
311
312 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
313}
314
315/* 'float' values are stored in the upper half of floating-point
316 registers, even though we are otherwise a big-endian platform. */
317
9acbedc0
UW
318static struct value *
319s390_value_from_register (struct type *type, int regnum,
320 struct frame_info *frame)
d0f54f9d 321{
9acbedc0
UW
322 struct value *value = default_value_from_register (type, regnum, frame);
323 int len = TYPE_LENGTH (type);
d0f54f9d 324
9acbedc0
UW
325 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8)
326 set_value_offset (value, 0);
d0f54f9d 327
9acbedc0 328 return value;
d0f54f9d
JB
329}
330
331/* Register groups. */
332
a78f21af 333static int
7803799a
UW
334s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
335 struct reggroup *group)
d0f54f9d
JB
336{
337 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
338
7803799a 339 /* PC and CC pseudo registers need to be saved/restored in order to
d0f54f9d
JB
340 push or pop frames. */
341 if (group == save_reggroup || group == restore_reggroup)
7803799a 342 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
343
344 return default_register_reggroup_p (gdbarch, regnum, group);
345}
346
347
348/* Core file register sets. */
349
350int s390_regmap_gregset[S390_NUM_REGS] =
351{
352 /* Program Status Word. */
353 0x00, 0x04,
354 /* General Purpose Registers. */
355 0x08, 0x0c, 0x10, 0x14,
356 0x18, 0x1c, 0x20, 0x24,
357 0x28, 0x2c, 0x30, 0x34,
358 0x38, 0x3c, 0x40, 0x44,
359 /* Access Registers. */
360 0x48, 0x4c, 0x50, 0x54,
361 0x58, 0x5c, 0x60, 0x64,
362 0x68, 0x6c, 0x70, 0x74,
363 0x78, 0x7c, 0x80, 0x84,
364 /* Floating Point Control Word. */
365 -1,
366 /* Floating Point Registers. */
367 -1, -1, -1, -1, -1, -1, -1, -1,
368 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
369 /* GPR Uppper Halves. */
370 -1, -1, -1, -1, -1, -1, -1, -1,
371 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d
JB
372};
373
374int s390x_regmap_gregset[S390_NUM_REGS] =
375{
7803799a 376 /* Program Status Word. */
d0f54f9d
JB
377 0x00, 0x08,
378 /* General Purpose Registers. */
379 0x10, 0x18, 0x20, 0x28,
380 0x30, 0x38, 0x40, 0x48,
381 0x50, 0x58, 0x60, 0x68,
382 0x70, 0x78, 0x80, 0x88,
383 /* Access Registers. */
384 0x90, 0x94, 0x98, 0x9c,
385 0xa0, 0xa4, 0xa8, 0xac,
386 0xb0, 0xb4, 0xb8, 0xbc,
387 0xc0, 0xc4, 0xc8, 0xcc,
388 /* Floating Point Control Word. */
389 -1,
390 /* Floating Point Registers. */
391 -1, -1, -1, -1, -1, -1, -1, -1,
392 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
393 /* GPR Uppper Halves. */
394 0x10, 0x18, 0x20, 0x28,
395 0x30, 0x38, 0x40, 0x48,
396 0x50, 0x58, 0x60, 0x68,
397 0x70, 0x78, 0x80, 0x88,
d0f54f9d
JB
398};
399
400int s390_regmap_fpregset[S390_NUM_REGS] =
401{
402 /* Program Status Word. */
403 -1, -1,
404 /* General Purpose Registers. */
405 -1, -1, -1, -1, -1, -1, -1, -1,
406 -1, -1, -1, -1, -1, -1, -1, -1,
407 /* Access Registers. */
408 -1, -1, -1, -1, -1, -1, -1, -1,
409 -1, -1, -1, -1, -1, -1, -1, -1,
410 /* Floating Point Control Word. */
411 0x00,
412 /* Floating Point Registers. */
413 0x08, 0x10, 0x18, 0x20,
414 0x28, 0x30, 0x38, 0x40,
415 0x48, 0x50, 0x58, 0x60,
416 0x68, 0x70, 0x78, 0x80,
7803799a
UW
417 /* GPR Uppper Halves. */
418 -1, -1, -1, -1, -1, -1, -1, -1,
419 -1, -1, -1, -1, -1, -1, -1, -1,
420};
421
422int s390_regmap_upper[S390_NUM_REGS] =
423{
424 /* Program Status Word. */
425 -1, -1,
426 /* General Purpose Registers. */
427 -1, -1, -1, -1, -1, -1, -1, -1,
428 -1, -1, -1, -1, -1, -1, -1, -1,
429 /* Access Registers. */
430 -1, -1, -1, -1, -1, -1, -1, -1,
431 -1, -1, -1, -1, -1, -1, -1, -1,
432 /* Floating Point Control Word. */
433 -1,
434 /* Floating Point Registers. */
435 -1, -1, -1, -1, -1, -1, -1, -1,
436 -1, -1, -1, -1, -1, -1, -1, -1,
437 /* GPR Uppper Halves. */
438 0x00, 0x04, 0x08, 0x0c,
439 0x10, 0x14, 0x18, 0x1c,
440 0x20, 0x24, 0x28, 0x2c,
441 0x30, 0x34, 0x38, 0x3c,
d0f54f9d
JB
442};
443
444/* Supply register REGNUM from the register set REGSET to register cache
445 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
446static void
447s390_supply_regset (const struct regset *regset, struct regcache *regcache,
448 int regnum, const void *regs, size_t len)
449{
450 const int *offset = regset->descr;
451 int i;
452
453 for (i = 0; i < S390_NUM_REGS; i++)
454 {
455 if ((regnum == i || regnum == -1) && offset[i] != -1)
456 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
457 }
458}
459
92f38ec2
UW
460/* Collect register REGNUM from the register cache REGCACHE and store
461 it in the buffer specified by REGS and LEN as described by the
462 general-purpose register set REGSET. If REGNUM is -1, do this for
463 all registers in REGSET. */
464static void
465s390_collect_regset (const struct regset *regset,
466 const struct regcache *regcache,
467 int regnum, void *regs, size_t len)
468{
469 const int *offset = regset->descr;
470 int i;
471
472 for (i = 0; i < S390_NUM_REGS; i++)
473 {
474 if ((regnum == i || regnum == -1) && offset[i] != -1)
475 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
476 }
477}
478
d0f54f9d
JB
479static const struct regset s390_gregset = {
480 s390_regmap_gregset,
92f38ec2
UW
481 s390_supply_regset,
482 s390_collect_regset
d0f54f9d
JB
483};
484
485static const struct regset s390x_gregset = {
486 s390x_regmap_gregset,
92f38ec2
UW
487 s390_supply_regset,
488 s390_collect_regset
d0f54f9d
JB
489};
490
491static const struct regset s390_fpregset = {
492 s390_regmap_fpregset,
92f38ec2
UW
493 s390_supply_regset,
494 s390_collect_regset
d0f54f9d
JB
495};
496
7803799a
UW
497static const struct regset s390_upper_regset = {
498 s390_regmap_upper,
499 s390_supply_regset,
500 s390_collect_regset
501};
502
503static struct core_regset_section s390_upper_regset_sections[] =
504{
505 { ".reg", s390_sizeof_gregset, "general-purpose" },
506 { ".reg2", s390_sizeof_fpregset, "floating-point" },
507 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
508 { NULL, 0}
509};
510
d0f54f9d
JB
511/* Return the appropriate register set for the core section identified
512 by SECT_NAME and SECT_SIZE. */
63807e1d 513static const struct regset *
d0f54f9d
JB
514s390_regset_from_core_section (struct gdbarch *gdbarch,
515 const char *sect_name, size_t sect_size)
516{
517 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
518
e31dcd20 519 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
520 return tdep->gregset;
521
e31dcd20 522 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
523 return tdep->fpregset;
524
7803799a
UW
525 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
526 return &s390_upper_regset;
527
d0f54f9d 528 return NULL;
5769d3cd
AC
529}
530
7803799a
UW
531static const struct target_desc *
532s390_core_read_description (struct gdbarch *gdbarch,
533 struct target_ops *target, bfd *abfd)
534{
535 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
536 asection *section = bfd_get_section_by_name (abfd, ".reg");
537 if (!section)
538 return NULL;
539
540 switch (bfd_section_size (abfd, section))
541 {
542 case s390_sizeof_gregset:
543 return high_gprs? tdesc_s390_linux64 : tdesc_s390_linux32;
544
545 case s390x_sizeof_gregset:
546 return tdesc_s390x_linux64;
547
548 default:
549 return NULL;
550 }
551}
552
d0f54f9d 553
4bc8c588
JB
554/* Decoding S/390 instructions. */
555
556/* Named opcode values for the S/390 instructions we recognize. Some
557 instructions have their opcode split across two fields; those are the
558 op1_* and op2_* enums. */
559enum
560 {
a8c99f38
JB
561 op1_lhi = 0xa7, op2_lhi = 0x08,
562 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 563 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 564 op_lr = 0x18,
a8c99f38
JB
565 op_lgr = 0xb904,
566 op_l = 0x58,
567 op1_ly = 0xe3, op2_ly = 0x58,
568 op1_lg = 0xe3, op2_lg = 0x04,
569 op_lm = 0x98,
570 op1_lmy = 0xeb, op2_lmy = 0x98,
571 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 572 op_st = 0x50,
a8c99f38 573 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 574 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 575 op_std = 0x60,
4bc8c588 576 op_stm = 0x90,
a8c99f38 577 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 578 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
579 op1_aghi = 0xa7, op2_aghi = 0x0b,
580 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
581 op1_agfi = 0xc2, op2_agfi = 0x08,
582 op1_afi = 0xc2, op2_afi = 0x09,
583 op1_algfi= 0xc2, op2_algfi= 0x0a,
584 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
585 op_ar = 0x1a,
586 op_agr = 0xb908,
587 op_a = 0x5a,
588 op1_ay = 0xe3, op2_ay = 0x5a,
589 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
590 op1_slgfi= 0xc2, op2_slgfi= 0x04,
591 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
592 op_sr = 0x1b,
593 op_sgr = 0xb909,
594 op_s = 0x5b,
595 op1_sy = 0xe3, op2_sy = 0x5b,
596 op1_sg = 0xe3, op2_sg = 0x09,
597 op_nr = 0x14,
598 op_ngr = 0xb980,
599 op_la = 0x41,
600 op1_lay = 0xe3, op2_lay = 0x71,
601 op1_larl = 0xc0, op2_larl = 0x00,
602 op_basr = 0x0d,
603 op_bas = 0x4d,
604 op_bcr = 0x07,
605 op_bc = 0x0d,
1db4e8a0
UW
606 op_bctr = 0x06,
607 op_bctgr = 0xb946,
608 op_bct = 0x46,
609 op1_bctg = 0xe3, op2_bctg = 0x46,
610 op_bxh = 0x86,
611 op1_bxhg = 0xeb, op2_bxhg = 0x44,
612 op_bxle = 0x87,
613 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
614 op1_bras = 0xa7, op2_bras = 0x05,
615 op1_brasl= 0xc0, op2_brasl= 0x05,
616 op1_brc = 0xa7, op2_brc = 0x04,
617 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
618 op1_brct = 0xa7, op2_brct = 0x06,
619 op1_brctg= 0xa7, op2_brctg= 0x07,
620 op_brxh = 0x84,
621 op1_brxhg= 0xec, op2_brxhg= 0x44,
622 op_brxle = 0x85,
623 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
624 };
625
626
a8c99f38
JB
627/* Read a single instruction from address AT. */
628
629#define S390_MAX_INSTR_SIZE 6
630static int
631s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
632{
633 static int s390_instrlen[] = { 2, 4, 4, 6 };
634 int instrlen;
635
8defab1a 636 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
637 return -1;
638 instrlen = s390_instrlen[instr[0] >> 6];
639 if (instrlen > 2)
640 {
8defab1a 641 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
642 return -1;
643 }
644 return instrlen;
645}
646
647
4bc8c588
JB
648/* The functions below are for recognizing and decoding S/390
649 instructions of various formats. Each of them checks whether INSN
650 is an instruction of the given format, with the specified opcodes.
651 If it is, it sets the remaining arguments to the values of the
652 instruction's fields, and returns a non-zero value; otherwise, it
653 returns zero.
654
655 These functions' arguments appear in the order they appear in the
656 instruction, not in the machine-language form. So, opcodes always
657 come first, even though they're sometimes scattered around the
658 instructions. And displacements appear before base and extension
659 registers, as they do in the assembly syntax, not at the end, as
660 they do in the machine language. */
a78f21af 661static int
4bc8c588
JB
662is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
663{
664 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
665 {
666 *r1 = (insn[1] >> 4) & 0xf;
667 /* i2 is a 16-bit signed quantity. */
668 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
669 return 1;
670 }
671 else
672 return 0;
673}
8ac0e65a 674
5769d3cd 675
4bc8c588
JB
676static int
677is_ril (bfd_byte *insn, int op1, int op2,
678 unsigned int *r1, int *i2)
679{
680 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
681 {
682 *r1 = (insn[1] >> 4) & 0xf;
683 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
684 no sign extension is necessary, but we don't want to assume
685 that. */
686 *i2 = (((insn[2] << 24)
687 | (insn[3] << 16)
688 | (insn[4] << 8)
689 | (insn[5])) ^ 0x80000000) - 0x80000000;
690 return 1;
691 }
692 else
693 return 0;
694}
695
696
697static int
698is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
699{
700 if (insn[0] == op)
701 {
702 *r1 = (insn[1] >> 4) & 0xf;
703 *r2 = insn[1] & 0xf;
704 return 1;
705 }
706 else
707 return 0;
708}
709
710
711static int
712is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
713{
714 if (((insn[0] << 8) | insn[1]) == op)
715 {
716 /* Yes, insn[3]. insn[2] is unused in RRE format. */
717 *r1 = (insn[3] >> 4) & 0xf;
718 *r2 = insn[3] & 0xf;
719 return 1;
720 }
721 else
722 return 0;
723}
724
725
726static int
727is_rs (bfd_byte *insn, int op,
728 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
729{
730 if (insn[0] == op)
731 {
732 *r1 = (insn[1] >> 4) & 0xf;
733 *r3 = insn[1] & 0xf;
734 *b2 = (insn[2] >> 4) & 0xf;
735 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
736 return 1;
737 }
738 else
739 return 0;
740}
741
742
743static int
a8c99f38 744is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
745 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
746{
747 if (insn[0] == op1
4bc8c588
JB
748 && insn[5] == op2)
749 {
750 *r1 = (insn[1] >> 4) & 0xf;
751 *r3 = insn[1] & 0xf;
752 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
753 /* The 'long displacement' is a 20-bit signed integer. */
754 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
755 ^ 0x80000) - 0x80000;
4bc8c588
JB
756 return 1;
757 }
758 else
759 return 0;
760}
761
762
1db4e8a0
UW
763static int
764is_rsi (bfd_byte *insn, int op,
765 unsigned int *r1, unsigned int *r3, int *i2)
766{
767 if (insn[0] == op)
768 {
769 *r1 = (insn[1] >> 4) & 0xf;
770 *r3 = insn[1] & 0xf;
771 /* i2 is a 16-bit signed quantity. */
772 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
773 return 1;
774 }
775 else
776 return 0;
777}
778
779
780static int
781is_rie (bfd_byte *insn, int op1, int op2,
782 unsigned int *r1, unsigned int *r3, int *i2)
783{
784 if (insn[0] == op1
785 && insn[5] == op2)
786 {
787 *r1 = (insn[1] >> 4) & 0xf;
788 *r3 = insn[1] & 0xf;
789 /* i2 is a 16-bit signed quantity. */
790 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
791 return 1;
792 }
793 else
794 return 0;
795}
796
797
4bc8c588
JB
798static int
799is_rx (bfd_byte *insn, int op,
800 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
801{
802 if (insn[0] == op)
803 {
804 *r1 = (insn[1] >> 4) & 0xf;
805 *x2 = insn[1] & 0xf;
806 *b2 = (insn[2] >> 4) & 0xf;
807 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
808 return 1;
809 }
810 else
811 return 0;
812}
813
814
815static int
a8c99f38 816is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
817 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
818{
819 if (insn[0] == op1
4bc8c588
JB
820 && insn[5] == op2)
821 {
822 *r1 = (insn[1] >> 4) & 0xf;
823 *x2 = insn[1] & 0xf;
824 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
825 /* The 'long displacement' is a 20-bit signed integer. */
826 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
827 ^ 0x80000) - 0x80000;
4bc8c588
JB
828 return 1;
829 }
830 else
831 return 0;
832}
833
834
3fc46200 835/* Prologue analysis. */
4bc8c588 836
d0f54f9d
JB
837#define S390_NUM_GPRS 16
838#define S390_NUM_FPRS 16
4bc8c588 839
a8c99f38
JB
840struct s390_prologue_data {
841
ee1b3323
UW
842 /* The stack. */
843 struct pv_area *stack;
844
e17a4113 845 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
846 int gpr_size;
847 int fpr_size;
e17a4113 848 enum bfd_endian byte_order;
a8c99f38
JB
849
850 /* The general-purpose registers. */
3fc46200 851 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
852
853 /* The floating-point registers. */
3fc46200 854 pv_t fpr[S390_NUM_FPRS];
a8c99f38 855
121d8485
UW
856 /* The offset relative to the CFA where the incoming GPR N was saved
857 by the function prologue. 0 if not saved or unknown. */
858 int gpr_slot[S390_NUM_GPRS];
4bc8c588 859
121d8485
UW
860 /* Likewise for FPRs. */
861 int fpr_slot[S390_NUM_FPRS];
4bc8c588 862
121d8485
UW
863 /* Nonzero if the backchain was saved. This is assumed to be the
864 case when the incoming SP is saved at the current SP location. */
865 int back_chain_saved_p;
866};
4bc8c588 867
3fc46200
UW
868/* Return the effective address for an X-style instruction, like:
869
870 L R1, D2(X2, B2)
871
872 Here, X2 and B2 are registers, and D2 is a signed 20-bit
873 constant; the effective address is the sum of all three. If either
874 X2 or B2 are zero, then it doesn't contribute to the sum --- this
875 means that r0 can't be used as either X2 or B2. */
876static pv_t
877s390_addr (struct s390_prologue_data *data,
878 int d2, unsigned int x2, unsigned int b2)
879{
880 pv_t result;
881
882 result = pv_constant (d2);
883 if (x2)
884 result = pv_add (result, data->gpr[x2]);
885 if (b2)
886 result = pv_add (result, data->gpr[b2]);
887
888 return result;
889}
890
891/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 892static void
3fc46200
UW
893s390_store (struct s390_prologue_data *data,
894 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
895 pv_t value)
4bc8c588 896{
3fc46200 897 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 898 pv_t offset;
121d8485
UW
899
900 /* Check whether we are storing the backchain. */
3fc46200 901 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 902
3fc46200 903 if (pv_is_constant (offset) && offset.k == 0)
121d8485 904 if (size == data->gpr_size
3fc46200 905 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
906 {
907 data->back_chain_saved_p = 1;
908 return;
909 }
910
911
912 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
913 if (!pv_area_store_would_trash (data->stack, addr))
914 pv_area_store (data->stack, addr, size, value);
4bc8c588 915
a8c99f38 916
121d8485
UW
917 /* Note: If this is some store we cannot identify, you might think we
918 should forget our cached values, as any of those might have been hit.
919
920 However, we make the assumption that the register save areas are only
921 ever stored to once in any given function, and we do recognize these
922 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 923}
4bc8c588 924
3fc46200
UW
925/* Do a SIZE-byte load from D2(X2,B2). */
926static pv_t
927s390_load (struct s390_prologue_data *data,
928 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
929
4bc8c588 930{
3fc46200 931 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 932 pv_t offset;
4bc8c588 933
a8c99f38
JB
934 /* If it's a load from an in-line constant pool, then we can
935 simulate that, under the assumption that the code isn't
936 going to change between the time the processor actually
937 executed it creating the current frame, and the time when
938 we're analyzing the code to unwind past that frame. */
3fc46200 939 if (pv_is_constant (addr))
4bc8c588 940 {
0542c86d 941 struct target_section *secp;
3fc46200 942 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38
JB
943 if (secp != NULL
944 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
945 & SEC_READONLY))
e17a4113
UW
946 return pv_constant (read_memory_integer (addr.k, size,
947 data->byte_order));
a8c99f38 948 }
7666f43c 949
121d8485 950 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
951 return pv_area_fetch (data->stack, addr, size);
952}
121d8485 953
ee1b3323
UW
954/* Function for finding saved registers in a 'struct pv_area'; we pass
955 this to pv_area_scan.
121d8485 956
ee1b3323
UW
957 If VALUE is a saved register, ADDR says it was saved at a constant
958 offset from the frame base, and SIZE indicates that the whole
959 register was saved, record its offset in the reg_offset table in
960 PROLOGUE_UNTYPED. */
961static void
962s390_check_for_saved (void *data_untyped, pv_t addr, CORE_ADDR size, pv_t value)
963{
964 struct s390_prologue_data *data = data_untyped;
965 int i, offset;
966
967 if (!pv_is_register (addr, S390_SP_REGNUM))
968 return;
969
970 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 971
ee1b3323
UW
972 /* If we are storing the original value of a register, we want to
973 record the CFA offset. If the same register is stored multiple
974 times, the stack slot with the highest address counts. */
975
976 for (i = 0; i < S390_NUM_GPRS; i++)
977 if (size == data->gpr_size
978 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
979 if (data->gpr_slot[i] == 0
980 || data->gpr_slot[i] > offset)
981 {
982 data->gpr_slot[i] = offset;
983 return;
984 }
985
986 for (i = 0; i < S390_NUM_FPRS; i++)
987 if (size == data->fpr_size
988 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
989 if (data->fpr_slot[i] == 0
990 || data->fpr_slot[i] > offset)
991 {
992 data->fpr_slot[i] = offset;
993 return;
994 }
a8c99f38 995}
4bc8c588 996
a8c99f38
JB
997/* Analyze the prologue of the function starting at START_PC,
998 continuing at most until CURRENT_PC. Initialize DATA to
999 hold all information we find out about the state of the registers
1000 and stack slots. Return the address of the instruction after
1001 the last one that changed the SP, FP, or back chain; or zero
1002 on error. */
1003static CORE_ADDR
1004s390_analyze_prologue (struct gdbarch *gdbarch,
1005 CORE_ADDR start_pc,
1006 CORE_ADDR current_pc,
1007 struct s390_prologue_data *data)
4bc8c588 1008{
a8c99f38
JB
1009 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1010
4bc8c588 1011 /* Our return value:
a8c99f38
JB
1012 The address of the instruction after the last one that changed
1013 the SP, FP, or back chain; zero if we got an error trying to
1014 read memory. */
1015 CORE_ADDR result = start_pc;
4bc8c588 1016
4bc8c588
JB
1017 /* The current PC for our abstract interpretation. */
1018 CORE_ADDR pc;
1019
1020 /* The address of the next instruction after that. */
1021 CORE_ADDR next_pc;
1022
4bc8c588
JB
1023 /* Set up everything's initial value. */
1024 {
1025 int i;
1026
55f960e1 1027 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1028
a8c99f38
JB
1029 /* For the purpose of prologue tracking, we consider the GPR size to
1030 be equal to the ABI word size, even if it is actually larger
1031 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1032 data->gpr_size = word_size;
1033 data->fpr_size = 8;
e17a4113 1034 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1035
4bc8c588 1036 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1037 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1038
1039 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1040 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1041
121d8485
UW
1042 for (i = 0; i < S390_NUM_GPRS; i++)
1043 data->gpr_slot[i] = 0;
1044
1045 for (i = 0; i < S390_NUM_FPRS; i++)
1046 data->fpr_slot[i] = 0;
4bc8c588 1047
121d8485 1048 data->back_chain_saved_p = 0;
4bc8c588
JB
1049 }
1050
a8c99f38
JB
1051 /* Start interpreting instructions, until we hit the frame's
1052 current PC or the first branch instruction. */
1053 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1054 {
4bc8c588 1055 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1056 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1057
3fc46200
UW
1058 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1059 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1060 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1061
4bc8c588 1062 /* Fields for various kinds of instructions. */
a8c99f38
JB
1063 unsigned int b2, r1, r2, x2, r3;
1064 int i2, d2;
4bc8c588 1065
121d8485 1066 /* The values of SP and FP before this instruction,
4bc8c588 1067 for detecting instructions that change them. */
3fc46200 1068 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1069 /* Likewise for the flag whether the back chain was saved. */
1070 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1071
1072 /* If we got an error trying to read the instruction, report it. */
1073 if (insn_len < 0)
8ac0e65a 1074 {
a8c99f38 1075 result = 0;
4bc8c588
JB
1076 break;
1077 }
1078
1079 next_pc = pc + insn_len;
1080
a8c99f38
JB
1081 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1082 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1083 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1084
4bc8c588 1085
3fc46200
UW
1086 /* LHI r1, i2 --- load halfword immediate. */
1087 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1088 /* LGFI r1, i2 --- load fullword immediate. */
1089 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1090 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1091 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1092 data->gpr[r1] = pv_constant (i2);
1093
1094 /* LR r1, r2 --- load from register. */
1095 /* LGR r1, r2 --- load from register (64-bit version). */
1096 else if (is_rr (insn32, op_lr, &r1, &r2)
1097 || is_rre (insn64, op_lgr, &r1, &r2))
1098 data->gpr[r1] = data->gpr[r2];
1099
1100 /* L r1, d2(x2, b2) --- load. */
1101 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1102 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1103 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1104 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1105 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1106 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1107
1108 /* ST r1, d2(x2, b2) --- store. */
1109 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1110 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1111 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1112 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1113 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1114 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1115
1116 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1117 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1118 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1119
1120 /* STM r1, r3, d2(b2) --- store multiple. */
1121 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version). */
1122 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1123 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1124 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1125 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1126 {
3fc46200
UW
1127 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1128 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1129 }
1130
3fc46200
UW
1131 /* AHI r1, i2 --- add halfword immediate. */
1132 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1133 /* AFI r1, i2 --- add fullword immediate. */
1134 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1135 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1136 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1137 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1138 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1139 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1140
1141 /* ALFI r1, i2 --- add logical immediate. */
1142 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1143 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1144 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1145 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1146 (CORE_ADDR)i2 & 0xffffffff);
1147
1148 /* AR r1, r2 -- add register. */
1149 /* AGR r1, r2 -- add register (64-bit version). */
1150 else if (is_rr (insn32, op_ar, &r1, &r2)
1151 || is_rre (insn64, op_agr, &r1, &r2))
1152 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1153
1154 /* A r1, d2(x2, b2) -- add. */
1155 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1156 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1157 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1158 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1159 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1160 data->gpr[r1] = pv_add (data->gpr[r1],
1161 s390_load (data, d2, x2, b2, data->gpr_size));
1162
1163 /* SLFI r1, i2 --- subtract logical immediate. */
1164 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1165 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1166 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1167 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1168 -((CORE_ADDR)i2 & 0xffffffff));
1169
1170 /* SR r1, r2 -- subtract register. */
1171 /* SGR r1, r2 -- subtract register (64-bit version). */
1172 else if (is_rr (insn32, op_sr, &r1, &r2)
1173 || is_rre (insn64, op_sgr, &r1, &r2))
1174 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1175
1176 /* S r1, d2(x2, b2) -- subtract. */
1177 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1178 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1179 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1180 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1181 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1182 data->gpr[r1] = pv_subtract (data->gpr[r1],
1183 s390_load (data, d2, x2, b2, data->gpr_size));
1184
1185 /* LA r1, d2(x2, b2) --- load address. */
1186 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1187 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1188 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1189 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1190
1191 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1192 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1193 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1194
3fc46200 1195 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1196 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1197 else if (is_rr (insn, op_basr, &r1, &r2)
1198 && r2 == 0)
3fc46200 1199 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1200
3fc46200 1201 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1202 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1203 {
3fc46200 1204 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1205 next_pc = pc + i2 * 2;
4bc8c588 1206
a8c99f38
JB
1207 /* We'd better not interpret any backward branches. We'll
1208 never terminate. */
1209 if (next_pc <= pc)
4bc8c588
JB
1210 break;
1211 }
1212
a8c99f38
JB
1213 /* Terminate search when hitting any other branch instruction. */
1214 else if (is_rr (insn, op_basr, &r1, &r2)
1215 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1216 || is_rr (insn, op_bcr, &r1, &r2)
1217 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1218 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1219 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1220 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1221 break;
1222
4bc8c588
JB
1223 else
1224 /* An instruction we don't know how to simulate. The only
1225 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1226 to 'unknown'. Instead, we'll be optimistic: we assume that
1227 we *can* interpret every instruction that the compiler uses
1228 to manipulate any of the data we're interested in here --
1229 then we can just ignore anything else. */
1230 ;
4bc8c588
JB
1231
1232 /* Record the address after the last instruction that changed
1233 the FP, SP, or backlink. Ignore instructions that changed
1234 them back to their original values --- those are probably
1235 restore instructions. (The back chain is never restored,
1236 just popped.) */
1237 {
3fc46200
UW
1238 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1239 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1240
3fc46200
UW
1241 if ((! pv_is_identical (pre_insn_sp, sp)
1242 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1243 && sp.kind != pvk_unknown)
1244 || (! pv_is_identical (pre_insn_fp, fp)
1245 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1246 && fp.kind != pvk_unknown)
121d8485 1247 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1248 result = next_pc;
4bc8c588 1249 }
5769d3cd 1250 }
4bc8c588 1251
ee1b3323
UW
1252 /* Record where all the registers were saved. */
1253 pv_area_scan (data->stack, s390_check_for_saved, data);
1254
1255 free_pv_area (data->stack);
1256 data->stack = NULL;
1257
4bc8c588 1258 return result;
5769d3cd
AC
1259}
1260
a8c99f38
JB
1261/* Advance PC across any function entry prologue instructions to reach
1262 some "real" code. */
1263static CORE_ADDR
6093d2eb 1264s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1265{
1266 struct s390_prologue_data data;
1267 CORE_ADDR skip_pc;
6093d2eb 1268 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1269 return skip_pc ? skip_pc : pc;
1270}
1271
d0f54f9d
JB
1272/* Return true if we are in the functin's epilogue, i.e. after the
1273 instruction that destroyed the function's stack frame. */
1274static int
1275s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1276{
1277 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1278
1279 /* In frameless functions, there's not frame to destroy and thus
1280 we don't care about the epilogue.
1281
1282 In functions with frame, the epilogue sequence is a pair of
1283 a LM-type instruction that restores (amongst others) the
1284 return register %r14 and the stack pointer %r15, followed
1285 by a branch 'br %r14' --or equivalent-- that effects the
1286 actual return.
1287
1288 In that situation, this function needs to return 'true' in
1289 exactly one case: when pc points to that branch instruction.
1290
1291 Thus we try to disassemble the one instructions immediately
1292 preceeding pc and check whether it is an LM-type instruction
1293 modifying the stack pointer.
1294
1295 Note that disassembling backwards is not reliable, so there
1296 is a slight chance of false positives here ... */
1297
1298 bfd_byte insn[6];
1299 unsigned int r1, r3, b2;
1300 int d2;
1301
1302 if (word_size == 4
8defab1a 1303 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1304 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1305 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1306 return 1;
1307
a8c99f38 1308 if (word_size == 4
8defab1a 1309 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1310 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1311 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1312 return 1;
1313
d0f54f9d 1314 if (word_size == 8
8defab1a 1315 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1316 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1317 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1318 return 1;
1319
1320 return 0;
1321}
5769d3cd 1322
1db4e8a0
UW
1323/* Displaced stepping. */
1324
1325/* Fix up the state of registers and memory after having single-stepped
1326 a displaced instruction. */
1327static void
1328s390_displaced_step_fixup (struct gdbarch *gdbarch,
1329 struct displaced_step_closure *closure,
1330 CORE_ADDR from, CORE_ADDR to,
1331 struct regcache *regs)
1332{
1333 /* Since we use simple_displaced_step_copy_insn, our closure is a
1334 copy of the instruction. */
1335 gdb_byte *insn = (gdb_byte *) closure;
1336 static int s390_instrlen[] = { 2, 4, 4, 6 };
1337 int insnlen = s390_instrlen[insn[0] >> 6];
1338
1339 /* Fields for various kinds of instructions. */
1340 unsigned int b2, r1, r2, x2, r3;
1341 int i2, d2;
1342
1343 /* Get current PC and addressing mode bit. */
1344 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1345 ULONGEST amode = 0;
1db4e8a0
UW
1346
1347 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1348 {
1349 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1350 amode &= 0x80000000;
1351 }
1352
1353 if (debug_displaced)
1354 fprintf_unfiltered (gdb_stdlog,
1355 "displaced: (s390) fixup (%s, %s) pc %s amode 0x%x\n",
1356 paddress (gdbarch, from), paddress (gdbarch, to),
1357 paddress (gdbarch, pc), (int) amode);
1358
1359 /* Handle absolute branch and save instructions. */
1360 if (is_rr (insn, op_basr, &r1, &r2)
1361 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1362 {
1363 /* Recompute saved return address in R1. */
1364 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1365 amode | (from + insnlen));
1366 }
1367
1368 /* Handle absolute branch instructions. */
1369 else if (is_rr (insn, op_bcr, &r1, &r2)
1370 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1371 || is_rr (insn, op_bctr, &r1, &r2)
1372 || is_rre (insn, op_bctgr, &r1, &r2)
1373 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1374 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1375 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1376 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1377 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1378 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1379 {
1380 /* Update PC iff branch was *not* taken. */
1381 if (pc == to + insnlen)
1382 regcache_write_pc (regs, from + insnlen);
1383 }
1384
1385 /* Handle PC-relative branch and save instructions. */
1386 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1387 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1388 {
1389 /* Update PC. */
1390 regcache_write_pc (regs, pc - to + from);
1391 /* Recompute saved return address in R1. */
1392 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1393 amode | (from + insnlen));
1394 }
1395
1396 /* Handle PC-relative branch instructions. */
1397 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1398 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1399 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1400 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1401 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1402 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1403 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1404 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1405 {
1406 /* Update PC. */
1407 regcache_write_pc (regs, pc - to + from);
1408 }
1409
1410 /* Handle LOAD ADDRESS RELATIVE LONG. */
1411 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1412 {
1413 /* Recompute output address in R1. */
1414 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1415 amode | (from + insnlen + i2*2));
1416 }
1417
1418 /* If we executed a breakpoint instruction, point PC right back at it. */
1419 else if (insn[0] == 0x0 && insn[1] == 0x1)
1420 regcache_write_pc (regs, from);
1421
1422 /* For any other insn, PC points right after the original instruction. */
1423 else
1424 regcache_write_pc (regs, from + insnlen);
1425}
a8c99f38
JB
1426
1427/* Normal stack frames. */
1428
1429struct s390_unwind_cache {
1430
1431 CORE_ADDR func;
1432 CORE_ADDR frame_base;
1433 CORE_ADDR local_base;
1434
1435 struct trad_frame_saved_reg *saved_regs;
1436};
1437
a78f21af 1438static int
f089c433 1439s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1440 struct s390_unwind_cache *info)
5769d3cd 1441{
f089c433 1442 struct gdbarch *gdbarch = get_frame_arch (this_frame);
121d8485 1443 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38
JB
1444 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1445 struct s390_prologue_data data;
3fc46200
UW
1446 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1447 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1448 int i;
1449 CORE_ADDR cfa;
a8c99f38
JB
1450 CORE_ADDR func;
1451 CORE_ADDR result;
1452 ULONGEST reg;
1453 CORE_ADDR prev_sp;
1454 int frame_pointer;
1455 int size;
edb3359d 1456 struct frame_info *next_frame;
a8c99f38
JB
1457
1458 /* Try to find the function start address. If we can't find it, we don't
1459 bother searching for it -- with modern compilers this would be mostly
1460 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1461 or else a valid backchain ... */
f089c433 1462 func = get_frame_func (this_frame);
a8c99f38
JB
1463 if (!func)
1464 return 0;
5769d3cd 1465
a8c99f38
JB
1466 /* Try to analyze the prologue. */
1467 result = s390_analyze_prologue (gdbarch, func,
f089c433 1468 get_frame_pc (this_frame), &data);
a8c99f38 1469 if (!result)
5769d3cd 1470 return 0;
5769d3cd 1471
a8c99f38
JB
1472 /* If this was successful, we should have found the instruction that
1473 sets the stack pointer register to the previous value of the stack
1474 pointer minus the frame size. */
3fc46200 1475 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1476 return 0;
a8c99f38
JB
1477
1478 /* A frame size of zero at this point can mean either a real
1479 frameless function, or else a failure to find the prologue.
1480 Perform some sanity checks to verify we really have a
1481 frameless function. */
1482 if (sp->k == 0)
5769d3cd 1483 {
a8c99f38
JB
1484 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1485 size zero. This is only possible if the next frame is a sentinel
1486 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1487 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1488 needed, instead the code should simpliy rely on its
1489 analysis. */
edb3359d
DJ
1490 next_frame = get_next_frame (this_frame);
1491 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1492 next_frame = get_next_frame (next_frame);
1493 if (next_frame
f089c433 1494 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1495 return 0;
5769d3cd 1496
a8c99f38
JB
1497 /* If we really have a frameless function, %r14 must be valid
1498 -- in particular, it must point to a different function. */
f089c433 1499 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1500 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1501 if (get_pc_function_start (reg) == func)
5769d3cd 1502 {
a8c99f38
JB
1503 /* However, there is one case where it *is* valid for %r14
1504 to point to the same function -- if this is a recursive
1505 call, and we have stopped in the prologue *before* the
1506 stack frame was allocated.
1507
1508 Recognize this case by looking ahead a bit ... */
5769d3cd 1509
a8c99f38 1510 struct s390_prologue_data data2;
3fc46200 1511 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1512
1513 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1514 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1515 && sp->k != 0))
1516 return 0;
5769d3cd 1517 }
5769d3cd 1518 }
5769d3cd
AC
1519
1520
a8c99f38
JB
1521 /* OK, we've found valid prologue data. */
1522 size = -sp->k;
5769d3cd 1523
a8c99f38
JB
1524 /* If the frame pointer originally also holds the same value
1525 as the stack pointer, we're probably using it. If it holds
1526 some other value -- even a constant offset -- it is most
1527 likely used as temp register. */
3fc46200 1528 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1529 frame_pointer = S390_FRAME_REGNUM;
1530 else
1531 frame_pointer = S390_SP_REGNUM;
1532
1533 /* If we've detected a function with stack frame, we'll still have to
1534 treat it as frameless if we're currently within the function epilog
1535 code at a point where the frame pointer has already been restored.
1536 This can only happen in an innermost frame. */
0e100dab
AC
1537 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1538 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1539 next_frame = get_next_frame (this_frame);
1540 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1541 next_frame = get_next_frame (next_frame);
f089c433 1542 if (size > 0
edb3359d 1543 && (next_frame == NULL
f089c433 1544 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1545 {
a8c99f38
JB
1546 /* See the comment in s390_in_function_epilogue_p on why this is
1547 not completely reliable ... */
f089c433 1548 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1549 {
a8c99f38
JB
1550 memset (&data, 0, sizeof (data));
1551 size = 0;
1552 frame_pointer = S390_SP_REGNUM;
5769d3cd 1553 }
5769d3cd 1554 }
5769d3cd 1555
a8c99f38
JB
1556 /* Once we know the frame register and the frame size, we can unwind
1557 the current value of the frame register from the next frame, and
1558 add back the frame size to arrive that the previous frame's
1559 stack pointer value. */
f089c433 1560 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1561 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1562
7803799a
UW
1563 /* Set up ABI call-saved/call-clobbered registers. */
1564 for (i = 0; i < S390_NUM_REGS; i++)
1565 if (!s390_register_call_saved (gdbarch, i))
1566 trad_frame_set_unknown (info->saved_regs, i);
1567
1568 /* CC is always call-clobbered. */
1569 trad_frame_set_unknown (info->saved_regs, tdep->cc_regnum);
1570
121d8485
UW
1571 /* Record the addresses of all register spill slots the prologue parser
1572 has recognized. Consider only registers defined as call-saved by the
1573 ABI; for call-clobbered registers the parser may have recognized
1574 spurious stores. */
5769d3cd 1575
7803799a
UW
1576 for (i = 0; i < 16; i++)
1577 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1578 && data.gpr_slot[i] != 0)
121d8485 1579 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1580
7803799a
UW
1581 for (i = 0; i < 16; i++)
1582 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1583 && data.fpr_slot[i] != 0)
1584 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1585
1586 /* Function return will set PC to %r14. */
7803799a 1587 info->saved_regs[tdep->pc_regnum] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1588
1589 /* In frameless functions, we unwind simply by moving the return
1590 address to the PC. However, if we actually stored to the
1591 save area, use that -- we might only think the function frameless
1592 because we're in the middle of the prologue ... */
1593 if (size == 0
7803799a 1594 && !trad_frame_addr_p (info->saved_regs, tdep->pc_regnum))
a8c99f38 1595 {
7803799a 1596 info->saved_regs[tdep->pc_regnum].realreg = S390_RETADDR_REGNUM;
5769d3cd 1597 }
a8c99f38
JB
1598
1599 /* Another sanity check: unless this is a frameless function,
1600 we should have found spill slots for SP and PC.
1601 If not, we cannot unwind further -- this happens e.g. in
1602 libc's thread_start routine. */
1603 if (size > 0)
5769d3cd 1604 {
a8c99f38 1605 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
7803799a 1606 || !trad_frame_addr_p (info->saved_regs, tdep->pc_regnum))
a8c99f38 1607 prev_sp = -1;
5769d3cd 1608 }
a8c99f38
JB
1609
1610 /* We use the current value of the frame register as local_base,
1611 and the top of the register save area as frame_base. */
1612 if (prev_sp != -1)
1613 {
1614 info->frame_base = prev_sp + 16*word_size + 32;
1615 info->local_base = prev_sp - size;
1616 }
1617
1618 info->func = func;
1619 return 1;
5769d3cd
AC
1620}
1621
a78f21af 1622static void
f089c433 1623s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1624 struct s390_unwind_cache *info)
5769d3cd 1625{
f089c433 1626 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 1627 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 1628 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1629 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1630 CORE_ADDR backchain;
1631 ULONGEST reg;
1632 LONGEST sp;
7803799a
UW
1633 int i;
1634
1635 /* Set up ABI call-saved/call-clobbered registers. */
1636 for (i = 0; i < S390_NUM_REGS; i++)
1637 if (!s390_register_call_saved (gdbarch, i))
1638 trad_frame_set_unknown (info->saved_regs, i);
1639
1640 /* CC is always call-clobbered. */
1641 trad_frame_set_unknown (info->saved_regs, tdep->cc_regnum);
a8c99f38
JB
1642
1643 /* Get the backchain. */
f089c433 1644 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1645 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1646
1647 /* A zero backchain terminates the frame chain. As additional
1648 sanity check, let's verify that the spill slot for SP in the
1649 save area pointed to by the backchain in fact links back to
1650 the save area. */
1651 if (backchain != 0
e17a4113
UW
1652 && safe_read_memory_integer (backchain + 15*word_size,
1653 word_size, byte_order, &sp)
a8c99f38
JB
1654 && (CORE_ADDR)sp == backchain)
1655 {
1656 /* We don't know which registers were saved, but it will have
1657 to be at least %r14 and %r15. This will allow us to continue
1658 unwinding, but other prev-frame registers may be incorrect ... */
1659 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1660 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1661
1662 /* Function return will set PC to %r14. */
7803799a
UW
1663 info->saved_regs[tdep->pc_regnum]
1664 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1665
1666 /* We use the current value of the frame register as local_base,
1667 and the top of the register save area as frame_base. */
1668 info->frame_base = backchain + 16*word_size + 32;
1669 info->local_base = reg;
1670 }
1671
f089c433 1672 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1673}
1674
a8c99f38 1675static struct s390_unwind_cache *
f089c433 1676s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1677 void **this_prologue_cache)
1678{
1679 struct s390_unwind_cache *info;
1680 if (*this_prologue_cache)
1681 return *this_prologue_cache;
1682
1683 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1684 *this_prologue_cache = info;
f089c433 1685 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1686 info->func = -1;
1687 info->frame_base = -1;
1688 info->local_base = -1;
1689
1690 /* Try to use prologue analysis to fill the unwind cache.
1691 If this fails, fall back to reading the stack backchain. */
f089c433
UW
1692 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1693 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
1694
1695 return info;
1696}
5769d3cd 1697
a78f21af 1698static void
f089c433 1699s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1700 void **this_prologue_cache,
1701 struct frame_id *this_id)
5769d3cd 1702{
a8c99f38 1703 struct s390_unwind_cache *info
f089c433 1704 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 1705
a8c99f38
JB
1706 if (info->frame_base == -1)
1707 return;
5769d3cd 1708
a8c99f38 1709 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
1710}
1711
f089c433
UW
1712static struct value *
1713s390_frame_prev_register (struct frame_info *this_frame,
1714 void **this_prologue_cache, int regnum)
a8c99f38 1715{
7803799a
UW
1716 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1717 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 1718 struct s390_unwind_cache *info
f089c433 1719 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a
UW
1720
1721 /* Unwind full GPRs to show at least the lower halves (as the
1722 upper halves are undefined). */
1723 if (tdep->gpr_full_regnum != -1
1724 && regnum >= tdep->gpr_full_regnum
1725 && regnum < tdep->gpr_full_regnum + 16)
1726 {
1727 int reg = regnum - tdep->gpr_full_regnum + S390_R0_REGNUM;
1728 struct value *val, *newval;
1729
1730 val = trad_frame_get_prev_register (this_frame, info->saved_regs, reg);
1731 newval = value_cast (register_type (gdbarch, regnum), val);
1732 if (value_optimized_out (val))
1733 set_value_optimized_out (newval, 1);
1734
1735 return newval;
1736 }
1737
f089c433 1738 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1739}
1740
1741static const struct frame_unwind s390_frame_unwind = {
1742 NORMAL_FRAME,
1743 s390_frame_this_id,
f089c433
UW
1744 s390_frame_prev_register,
1745 NULL,
1746 default_frame_sniffer
a8c99f38
JB
1747};
1748
5769d3cd 1749
8e645ae7
AC
1750/* Code stubs and their stack frames. For things like PLTs and NULL
1751 function calls (where there is no true frame and the return address
1752 is in the RETADDR register). */
a8c99f38 1753
8e645ae7
AC
1754struct s390_stub_unwind_cache
1755{
a8c99f38
JB
1756 CORE_ADDR frame_base;
1757 struct trad_frame_saved_reg *saved_regs;
1758};
1759
8e645ae7 1760static struct s390_stub_unwind_cache *
f089c433 1761s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 1762 void **this_prologue_cache)
5769d3cd 1763{
f089c433 1764 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 1765 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 1766 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 1767 struct s390_stub_unwind_cache *info;
a8c99f38 1768 ULONGEST reg;
5c3cf190 1769
a8c99f38
JB
1770 if (*this_prologue_cache)
1771 return *this_prologue_cache;
5c3cf190 1772
8e645ae7 1773 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 1774 *this_prologue_cache = info;
f089c433 1775 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1776
1777 /* The return address is in register %r14. */
7803799a 1778 info->saved_regs[tdep->pc_regnum].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
1779
1780 /* Retrieve stack pointer and determine our frame base. */
f089c433 1781 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
1782 info->frame_base = reg + 16*word_size + 32;
1783
1784 return info;
5769d3cd
AC
1785}
1786
a8c99f38 1787static void
f089c433 1788s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
1789 void **this_prologue_cache,
1790 struct frame_id *this_id)
5769d3cd 1791{
8e645ae7 1792 struct s390_stub_unwind_cache *info
f089c433
UW
1793 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1794 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 1795}
5769d3cd 1796
f089c433
UW
1797static struct value *
1798s390_stub_frame_prev_register (struct frame_info *this_frame,
1799 void **this_prologue_cache, int regnum)
8e645ae7
AC
1800{
1801 struct s390_stub_unwind_cache *info
f089c433
UW
1802 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1803 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1804}
1805
f089c433
UW
1806static int
1807s390_stub_frame_sniffer (const struct frame_unwind *self,
1808 struct frame_info *this_frame,
1809 void **this_prologue_cache)
a8c99f38 1810{
93d42b30 1811 CORE_ADDR addr_in_block;
8e645ae7
AC
1812 bfd_byte insn[S390_MAX_INSTR_SIZE];
1813
1814 /* If the current PC points to non-readable memory, we assume we
1815 have trapped due to an invalid function pointer call. We handle
1816 the non-existing current function like a PLT stub. */
f089c433 1817 addr_in_block = get_frame_address_in_block (this_frame);
93d42b30 1818 if (in_plt_section (addr_in_block, NULL)
f089c433
UW
1819 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
1820 return 1;
1821 return 0;
a8c99f38 1822}
5769d3cd 1823
f089c433
UW
1824static const struct frame_unwind s390_stub_frame_unwind = {
1825 NORMAL_FRAME,
1826 s390_stub_frame_this_id,
1827 s390_stub_frame_prev_register,
1828 NULL,
1829 s390_stub_frame_sniffer
1830};
1831
5769d3cd 1832
a8c99f38 1833/* Signal trampoline stack frames. */
5769d3cd 1834
a8c99f38
JB
1835struct s390_sigtramp_unwind_cache {
1836 CORE_ADDR frame_base;
1837 struct trad_frame_saved_reg *saved_regs;
1838};
5769d3cd 1839
a8c99f38 1840static struct s390_sigtramp_unwind_cache *
f089c433 1841s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1842 void **this_prologue_cache)
5769d3cd 1843{
f089c433 1844 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 1845 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 1846 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1847 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1848 struct s390_sigtramp_unwind_cache *info;
1849 ULONGEST this_sp, prev_sp;
7803799a
UW
1850 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
1851 ULONGEST pswm;
a8c99f38
JB
1852 int i;
1853
1854 if (*this_prologue_cache)
1855 return *this_prologue_cache;
5769d3cd 1856
a8c99f38
JB
1857 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
1858 *this_prologue_cache = info;
f089c433 1859 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 1860
f089c433
UW
1861 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1862 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
1863 next_cfa = this_sp + 16*word_size + 32;
1864
1865 /* New-style RT frame:
1866 retcode + alignment (8 bytes)
1867 siginfo (128 bytes)
1868 ucontext (contains sigregs at offset 5 words) */
1869 if (next_ra == next_cfa)
1870 {
f0f63663 1871 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
1872 /* sigregs are followed by uc_sigmask (8 bytes), then by the
1873 upper GPR halves if present. */
1874 sigreg_high_off = 8;
a8c99f38
JB
1875 }
1876
1877 /* Old-style RT frame and all non-RT frames:
1878 old signal mask (8 bytes)
1879 pointer to sigregs */
5769d3cd
AC
1880 else
1881 {
e17a4113
UW
1882 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
1883 word_size, byte_order);
7803799a
UW
1884 /* sigregs are followed by signo (4 bytes), then by the
1885 upper GPR halves if present. */
1886 sigreg_high_off = 4;
a8c99f38 1887 }
5769d3cd 1888
a8c99f38
JB
1889 /* The sigregs structure looks like this:
1890 long psw_mask;
1891 long psw_addr;
1892 long gprs[16];
1893 int acrs[16];
1894 int fpc;
1895 int __pad;
1896 double fprs[16]; */
5769d3cd 1897
7803799a
UW
1898 /* PSW mask and address. */
1899 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 1900 sigreg_ptr += word_size;
7803799a 1901 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
1902 sigreg_ptr += word_size;
1903
7803799a
UW
1904 /* Point PC to PSWA as well. */
1905 info->saved_regs[tdep->pc_regnum] = info->saved_regs[S390_PSWA_REGNUM];
1906
1907 /* Extract CC from PSWM. */
1908 pswm = read_memory_unsigned_integer (
1909 info->saved_regs[S390_PSWM_REGNUM].addr,
1910 word_size, byte_order);
1911 trad_frame_set_value (info->saved_regs, tdep->cc_regnum,
1912 (pswm >> (8 * word_size - 20)) & 3);
1913
a8c99f38
JB
1914 /* Then the GPRs. */
1915 for (i = 0; i < 16; i++)
1916 {
1917 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
1918 sigreg_ptr += word_size;
1919 }
1920
1921 /* Then the ACRs. */
1922 for (i = 0; i < 16; i++)
1923 {
1924 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
1925 sigreg_ptr += 4;
5769d3cd 1926 }
5769d3cd 1927
a8c99f38
JB
1928 /* The floating-point control word. */
1929 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
1930 sigreg_ptr += 8;
5769d3cd 1931
a8c99f38
JB
1932 /* And finally the FPRs. */
1933 for (i = 0; i < 16; i++)
1934 {
1935 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
1936 sigreg_ptr += 8;
1937 }
1938
7803799a
UW
1939 /* If we have them, the GPR upper halves are appended at the end. */
1940 sigreg_ptr += sigreg_high_off;
1941 if (tdep->gpr_full_regnum != -1)
1942 for (i = 0; i < 16; i++)
1943 {
1944 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
1945 sigreg_ptr += 4;
1946 }
1947
1948 /* Provide read-only copies of the full registers. */
1949 if (tdep->gpr_full_regnum != -1)
1950 for (i = 0; i < 16; i++)
1951 {
1952 ULONGEST low, high;
1953 low = read_memory_unsigned_integer (
1954 info->saved_regs[S390_R0_REGNUM + i].addr,
1955 4, byte_order);
1956 high = read_memory_unsigned_integer (
1957 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr,
1958 4, byte_order);
1959
1960 trad_frame_set_value (info->saved_regs, tdep->gpr_full_regnum + i,
1961 (high << 32) | low);
1962 }
1963
a8c99f38
JB
1964 /* Restore the previous frame's SP. */
1965 prev_sp = read_memory_unsigned_integer (
1966 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 1967 word_size, byte_order);
5769d3cd 1968
a8c99f38
JB
1969 /* Determine our frame base. */
1970 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 1971
a8c99f38 1972 return info;
5769d3cd
AC
1973}
1974
a8c99f38 1975static void
f089c433 1976s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1977 void **this_prologue_cache,
1978 struct frame_id *this_id)
5769d3cd 1979{
a8c99f38 1980 struct s390_sigtramp_unwind_cache *info
f089c433
UW
1981 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
1982 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
1983}
1984
f089c433
UW
1985static struct value *
1986s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
1987 void **this_prologue_cache, int regnum)
a8c99f38
JB
1988{
1989 struct s390_sigtramp_unwind_cache *info
f089c433
UW
1990 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
1991 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1992}
1993
f089c433
UW
1994static int
1995s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
1996 struct frame_info *this_frame,
1997 void **this_prologue_cache)
5769d3cd 1998{
f089c433 1999 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2000 bfd_byte sigreturn[2];
4c8287ac 2001
8defab1a 2002 if (target_read_memory (pc, sigreturn, 2))
f089c433 2003 return 0;
4c8287ac 2004
a8c99f38 2005 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2006 return 0;
5769d3cd 2007
a8c99f38
JB
2008 if (sigreturn[1] != 119 /* sigreturn */
2009 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2010 return 0;
a8c99f38 2011
f089c433 2012 return 1;
5769d3cd
AC
2013}
2014
f089c433
UW
2015static const struct frame_unwind s390_sigtramp_frame_unwind = {
2016 SIGTRAMP_FRAME,
2017 s390_sigtramp_frame_this_id,
2018 s390_sigtramp_frame_prev_register,
2019 NULL,
2020 s390_sigtramp_frame_sniffer
2021};
2022
4c8287ac 2023
a8c99f38
JB
2024/* Frame base handling. */
2025
2026static CORE_ADDR
f089c433 2027s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2028{
a8c99f38 2029 struct s390_unwind_cache *info
f089c433 2030 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2031 return info->frame_base;
2032}
2033
2034static CORE_ADDR
f089c433 2035s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2036{
2037 struct s390_unwind_cache *info
f089c433 2038 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2039 return info->local_base;
2040}
2041
2042static const struct frame_base s390_frame_base = {
2043 &s390_frame_unwind,
2044 s390_frame_base_address,
2045 s390_local_base_address,
2046 s390_local_base_address
2047};
2048
2049static CORE_ADDR
2050s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2051{
7803799a 2052 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2053 ULONGEST pc;
7803799a 2054 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2055 return gdbarch_addr_bits_remove (gdbarch, pc);
2056}
2057
2058static CORE_ADDR
2059s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2060{
2061 ULONGEST sp;
2062 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2063 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2064}
2065
2066
a431654a
AC
2067/* DWARF-2 frame support. */
2068
7803799a
UW
2069static struct value *
2070s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2071 int regnum)
2072{
2073 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2074 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2075 int reg = regnum - tdep->gpr_full_regnum;
2076 struct value *val, *newval;
2077
2078 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2079 newval = value_cast (register_type (gdbarch, regnum), val);
2080 if (value_optimized_out (val))
2081 set_value_optimized_out (newval, 1);
2082
2083 return newval;
2084}
2085
a431654a
AC
2086static void
2087s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2088 struct dwarf2_frame_state_reg *reg,
4a4e5149 2089 struct frame_info *this_frame)
a431654a
AC
2090{
2091 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2092
7803799a
UW
2093 /* Fixed registers are call-saved or call-clobbered
2094 depending on the ABI in use. */
2095 if (regnum >= 0 && regnum < S390_NUM_REGS)
a431654a 2096 {
7803799a 2097 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2098 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2099 else
a431654a 2100 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2101 }
a431654a 2102
7803799a
UW
2103 /* The CC pseudo register is call-clobbered. */
2104 else if (regnum == tdep->cc_regnum)
2105 reg->how = DWARF2_FRAME_REG_UNDEFINED;
a431654a 2106
7803799a
UW
2107 /* The PC register unwinds to the return address. */
2108 else if (regnum == tdep->pc_regnum)
2109 reg->how = DWARF2_FRAME_REG_RA;
a431654a 2110
7803799a
UW
2111 /* We install a special function to unwind full GPRs to show at
2112 least the lower halves (as the upper halves are undefined). */
2113 else if (tdep->gpr_full_regnum != -1
2114 && regnum >= tdep->gpr_full_regnum
2115 && regnum < tdep->gpr_full_regnum + 16)
2116 {
2117 reg->how = DWARF2_FRAME_REG_FN;
2118 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2119 }
2120}
2121
2122
b0cf273e
JB
2123/* Dummy function calls. */
2124
78f8b424
JB
2125/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2126 "Integer-like" types are those that should be passed the way
2127 integers are: integers, enums, ranges, characters, and booleans. */
2128static int
2129is_integer_like (struct type *type)
2130{
2131 enum type_code code = TYPE_CODE (type);
2132
2133 return (code == TYPE_CODE_INT
2134 || code == TYPE_CODE_ENUM
2135 || code == TYPE_CODE_RANGE
2136 || code == TYPE_CODE_CHAR
2137 || code == TYPE_CODE_BOOL);
2138}
2139
78f8b424
JB
2140/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2141 "Pointer-like" types are those that should be passed the way
2142 pointers are: pointers and references. */
2143static int
2144is_pointer_like (struct type *type)
2145{
2146 enum type_code code = TYPE_CODE (type);
2147
2148 return (code == TYPE_CODE_PTR
2149 || code == TYPE_CODE_REF);
2150}
2151
2152
20a940cc
JB
2153/* Return non-zero if TYPE is a `float singleton' or `double
2154 singleton', zero otherwise.
2155
2156 A `T singleton' is a struct type with one member, whose type is
2157 either T or a `T singleton'. So, the following are all float
2158 singletons:
2159
2160 struct { float x };
2161 struct { struct { float x; } x; };
2162 struct { struct { struct { float x; } x; } x; };
2163
2164 ... and so on.
2165
b0cf273e
JB
2166 All such structures are passed as if they were floats or doubles,
2167 as the (revised) ABI says. */
20a940cc
JB
2168static int
2169is_float_singleton (struct type *type)
2170{
b0cf273e
JB
2171 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2172 {
2173 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2174 CHECK_TYPEDEF (singleton_type);
2175
2176 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2177 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2178 || is_float_singleton (singleton_type));
2179 }
2180
2181 return 0;
20a940cc
JB
2182}
2183
2184
2185/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2186 "Struct-like" types are those that should be passed as structs are:
2187 structs and unions.
2188
2189 As an odd quirk, not mentioned in the ABI, GCC passes float and
2190 double singletons as if they were a plain float, double, etc. (The
2191 corresponding union types are handled normally.) So we exclude
2192 those types here. *shrug* */
2193static int
2194is_struct_like (struct type *type)
2195{
2196 enum type_code code = TYPE_CODE (type);
2197
2198 return (code == TYPE_CODE_UNION
2199 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2200}
2201
2202
2203/* Return non-zero if TYPE is a float-like type, zero otherwise.
2204 "Float-like" types are those that should be passed as
2205 floating-point values are.
2206
2207 You'd think this would just be floats, doubles, long doubles, etc.
2208 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2209 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2210 corresponding union types are handled normally.) So we include
20a940cc
JB
2211 those types here. *shrug* */
2212static int
2213is_float_like (struct type *type)
2214{
2215 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2216 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2217 || is_float_singleton (type));
2218}
2219
2220
78f8b424 2221static int
b0cf273e 2222is_power_of_two (unsigned int n)
78f8b424 2223{
b0cf273e 2224 return ((n & (n - 1)) == 0);
78f8b424
JB
2225}
2226
b0cf273e
JB
2227/* Return non-zero if TYPE should be passed as a pointer to a copy,
2228 zero otherwise. */
4d819d0e 2229static int
b0cf273e 2230s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
2231{
2232 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2233 if (length > 8)
2234 return 1;
4d819d0e 2235
b0cf273e
JB
2236 /* FIXME: All complex and vector types are also returned by reference. */
2237 return is_struct_like (type) && !is_power_of_two (length);
4d819d0e
JB
2238}
2239
b0cf273e
JB
2240/* Return non-zero if TYPE should be passed in a float register
2241 if possible. */
78f8b424 2242static int
b0cf273e 2243s390_function_arg_float (struct type *type)
78f8b424 2244{
78f8b424 2245 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2246 if (length > 8)
2247 return 0;
78f8b424 2248
b0cf273e 2249 return is_float_like (type);
4d819d0e
JB
2250}
2251
b0cf273e
JB
2252/* Return non-zero if TYPE should be passed in an integer register
2253 (or a pair of integer registers) if possible. */
78f8b424 2254static int
b0cf273e 2255s390_function_arg_integer (struct type *type)
78f8b424 2256{
78f8b424 2257 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2258 if (length > 8)
2259 return 0;
78f8b424 2260
b0cf273e
JB
2261 return is_integer_like (type)
2262 || is_pointer_like (type)
2263 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
2264}
2265
78f8b424
JB
2266/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2267 word as required for the ABI. */
2268static LONGEST
e17a4113 2269extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2270{
e17a4113 2271 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
4991999e 2272 struct type *type = value_type (arg);
78f8b424
JB
2273
2274 /* Even structs get passed in the least significant bits of the
2275 register / memory word. It's not really right to extract them as
2276 an integer, but it does take care of the extension. */
2277 if (TYPE_UNSIGNED (type))
0fd88904 2278 return extract_unsigned_integer (value_contents (arg),
e17a4113 2279 TYPE_LENGTH (type), byte_order);
78f8b424 2280 else
0fd88904 2281 return extract_signed_integer (value_contents (arg),
e17a4113 2282 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2283}
2284
2285
78f8b424
JB
2286/* Return the alignment required by TYPE. */
2287static int
2288alignment_of (struct type *type)
2289{
2290 int alignment;
2291
2292 if (is_integer_like (type)
2293 || is_pointer_like (type)
a16b8bcd
UW
2294 || TYPE_CODE (type) == TYPE_CODE_FLT
2295 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2296 alignment = TYPE_LENGTH (type);
2297 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2298 || TYPE_CODE (type) == TYPE_CODE_UNION)
2299 {
2300 int i;
2301
2302 alignment = 1;
2303 for (i = 0; i < TYPE_NFIELDS (type); i++)
2304 {
2305 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2306
2307 if (field_alignment > alignment)
2308 alignment = field_alignment;
2309 }
2310 }
2311 else
2312 alignment = 1;
2313
2314 /* Check that everything we ever return is a power of two. Lots of
2315 code doesn't want to deal with aligning things to arbitrary
2316 boundaries. */
2317 gdb_assert ((alignment & (alignment - 1)) == 0);
2318
2319 return alignment;
2320}
2321
2322
2323/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2324 place to be passed to a function, as specified by the "GNU/Linux
2325 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2326
2327 SP is the current stack pointer. We must put arguments, links,
2328 padding, etc. whereever they belong, and return the new stack
2329 pointer value.
2330
2331 If STRUCT_RETURN is non-zero, then the function we're calling is
2332 going to return a structure by value; STRUCT_ADDR is the address of
2333 a block we've allocated for it on the stack.
2334
2335 Our caller has taken care of any type promotions needed to satisfy
2336 prototypes or the old K&R argument-passing rules. */
a78f21af 2337static CORE_ADDR
7d9b040b 2338s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2339 struct regcache *regcache, CORE_ADDR bp_addr,
2340 int nargs, struct value **args, CORE_ADDR sp,
2341 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2342{
b0cf273e
JB
2343 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2344 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2345 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2346 int i;
5769d3cd 2347
78f8b424
JB
2348 /* If the i'th argument is passed as a reference to a copy, then
2349 copy_addr[i] is the address of the copy we made. */
2350 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2351
c0cc4c83 2352 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2353 for (i = 0; i < nargs; i++)
2354 {
2355 struct value *arg = args[i];
4991999e 2356 struct type *type = value_type (arg);
78f8b424 2357 unsigned length = TYPE_LENGTH (type);
5769d3cd 2358
b0cf273e 2359 if (s390_function_arg_pass_by_reference (type))
01c464e9 2360 {
78f8b424 2361 sp -= length;
5b03f266 2362 sp = align_down (sp, alignment_of (type));
78f8b424 2363 copy_addr[i] = sp;
01c464e9 2364 }
5769d3cd 2365 }
5769d3cd 2366
78f8b424
JB
2367 /* Reserve space for the parameter area. As a conservative
2368 simplification, we assume that everything will be passed on the
b0cf273e
JB
2369 stack. Since every argument larger than 8 bytes will be
2370 passed by reference, we use this simple upper bound. */
2371 sp -= nargs * 8;
78f8b424 2372
78f8b424
JB
2373 /* After all that, make sure it's still aligned on an eight-byte
2374 boundary. */
5b03f266 2375 sp = align_down (sp, 8);
78f8b424 2376
c0cc4c83
UW
2377 /* Allocate the standard frame areas: the register save area, the
2378 word reserved for the compiler (which seems kind of meaningless),
2379 and the back chain pointer. */
2380 sp -= 16*word_size + 32;
2381
2382 /* Now we have the final SP value. Make sure we didn't underflow;
2383 on 31-bit, this would result in addresses with the high bit set,
2384 which causes confusion elsewhere. Note that if we error out
2385 here, stack and registers remain untouched. */
2386 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2387 error (_("Stack overflow"));
2388
2389
78f8b424
JB
2390 /* Finally, place the actual parameters, working from SP towards
2391 higher addresses. The code above is supposed to reserve enough
2392 space for this. */
2393 {
2394 int fr = 0;
2395 int gr = 2;
c0cc4c83 2396 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2397
b0cf273e 2398 /* A struct is returned using general register 2. */
4d819d0e 2399 if (struct_return)
b0cf273e
JB
2400 {
2401 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2402 struct_addr);
2403 gr++;
2404 }
4d819d0e 2405
78f8b424
JB
2406 for (i = 0; i < nargs; i++)
2407 {
2408 struct value *arg = args[i];
4991999e 2409 struct type *type = value_type (arg);
b0cf273e
JB
2410 unsigned length = TYPE_LENGTH (type);
2411
2412 if (s390_function_arg_pass_by_reference (type))
2413 {
c0cc4c83
UW
2414 /* Actually copy the argument contents to the stack slot
2415 that was reserved above. */
2416 write_memory (copy_addr[i], value_contents (arg), length);
2417
b0cf273e
JB
2418 if (gr <= 6)
2419 {
2420 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2421 copy_addr[i]);
2422 gr++;
2423 }
2424 else
2425 {
e17a4113
UW
2426 write_memory_unsigned_integer (starg, word_size, byte_order,
2427 copy_addr[i]);
b0cf273e
JB
2428 starg += word_size;
2429 }
2430 }
2431 else if (s390_function_arg_float (type))
2432 {
2433 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2434 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2435 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2436 {
2437 /* When we store a single-precision value in an FP register,
2438 it occupies the leftmost bits. */
2439 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2440 0, length, value_contents (arg));
b0cf273e
JB
2441 fr += 2;
2442 }
2443 else
2444 {
2445 /* When we store a single-precision value in a stack slot,
2446 it occupies the rightmost bits. */
2447 starg = align_up (starg + length, word_size);
0fd88904 2448 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2449 }
2450 }
2451 else if (s390_function_arg_integer (type) && length <= word_size)
2452 {
2453 if (gr <= 6)
2454 {
2455 /* Integer arguments are always extended to word size. */
2456 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
e17a4113 2457 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2458 gr++;
2459 }
2460 else
2461 {
2462 /* Integer arguments are always extended to word size. */
e17a4113
UW
2463 write_memory_signed_integer (starg, word_size, byte_order,
2464 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2465 starg += word_size;
2466 }
2467 }
2468 else if (s390_function_arg_integer (type) && length == 2*word_size)
2469 {
2470 if (gr <= 5)
2471 {
2472 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2473 value_contents (arg));
b0cf273e 2474 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2475 value_contents (arg) + word_size);
b0cf273e
JB
2476 gr += 2;
2477 }
2478 else
2479 {
2480 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2481 in it, then don't go back and use it again later. */
2482 gr = 7;
2483
0fd88904 2484 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2485 starg += length;
2486 }
2487 }
2488 else
e2e0b3e5 2489 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2490 }
2491 }
2492
b0cf273e
JB
2493 /* Store return address. */
2494 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2495
2496 /* Store updated stack pointer. */
2497 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2498
a8c99f38 2499 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2500 which is actually the top of the register save area. */
2501 return sp + 16*word_size + 32;
5769d3cd
AC
2502}
2503
f089c433 2504/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2505 dummy frame. The frame ID's base needs to match the TOS value
2506 returned by push_dummy_call, and the PC match the dummy frame's
2507 breakpoint. */
2508static struct frame_id
f089c433 2509s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2510{
a8c99f38 2511 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2512 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2513 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2514
121d8485 2515 return frame_id_build (sp + 16*word_size + 32,
f089c433 2516 get_frame_pc (this_frame));
b0cf273e 2517}
c8f9d51c 2518
4074e13c
JB
2519static CORE_ADDR
2520s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2521{
2522 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2523 always be aligned on an eight-byte boundary. */
2524 return (addr & -8);
2525}
2526
2527
b0cf273e
JB
2528/* Function return value access. */
2529
2530static enum return_value_convention
2531s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2532{
b0cf273e
JB
2533 int length = TYPE_LENGTH (type);
2534 if (length > 8)
2535 return RETURN_VALUE_STRUCT_CONVENTION;
2536
2537 switch (TYPE_CODE (type))
2538 {
2539 case TYPE_CODE_STRUCT:
2540 case TYPE_CODE_UNION:
2541 case TYPE_CODE_ARRAY:
2542 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2543
b0cf273e
JB
2544 default:
2545 return RETURN_VALUE_REGISTER_CONVENTION;
2546 }
c8f9d51c
JB
2547}
2548
b0cf273e 2549static enum return_value_convention
c055b101
CV
2550s390_return_value (struct gdbarch *gdbarch, struct type *func_type,
2551 struct type *type, struct regcache *regcache,
2552 gdb_byte *out, const gdb_byte *in)
5769d3cd 2553{
e17a4113 2554 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e
JB
2555 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2556 int length = TYPE_LENGTH (type);
2557 enum return_value_convention rvc =
2558 s390_return_value_convention (gdbarch, type);
2559 if (in)
2560 {
2561 switch (rvc)
2562 {
2563 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2564 if (TYPE_CODE (type) == TYPE_CODE_FLT
2565 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2566 {
2567 /* When we store a single-precision value in an FP register,
2568 it occupies the leftmost bits. */
2569 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2570 0, length, in);
2571 }
2572 else if (length <= word_size)
2573 {
2574 /* Integer arguments are always extended to word size. */
2575 if (TYPE_UNSIGNED (type))
2576 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2577 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2578 else
2579 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2580 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2581 }
2582 else if (length == 2*word_size)
2583 {
2584 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2585 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2586 }
2587 else
e2e0b3e5 2588 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2589 break;
2590
2591 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2592 error (_("Cannot set function return value."));
b0cf273e
JB
2593 break;
2594 }
2595 }
2596 else if (out)
2597 {
2598 switch (rvc)
2599 {
2600 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2601 if (TYPE_CODE (type) == TYPE_CODE_FLT
2602 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2603 {
2604 /* When we store a single-precision value in an FP register,
2605 it occupies the leftmost bits. */
2606 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2607 0, length, out);
2608 }
2609 else if (length <= word_size)
2610 {
2611 /* Integer arguments occupy the rightmost bits. */
2612 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2613 word_size - length, length, out);
2614 }
2615 else if (length == 2*word_size)
2616 {
2617 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2618 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2619 }
2620 else
e2e0b3e5 2621 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2622 break;
5769d3cd 2623
b0cf273e 2624 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2625 error (_("Function return value unknown."));
b0cf273e
JB
2626 break;
2627 }
2628 }
2629
2630 return rvc;
2631}
5769d3cd
AC
2632
2633
a8c99f38
JB
2634/* Breakpoints. */
2635
43af2100 2636static const gdb_byte *
67d57894 2637s390_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2638{
43af2100 2639 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2640
2641 *lenptr = sizeof (breakpoint);
2642 return breakpoint;
2643}
2644
5769d3cd 2645
a8c99f38 2646/* Address handling. */
5769d3cd
AC
2647
2648static CORE_ADDR
24568a2c 2649s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2650{
a8c99f38 2651 return addr & 0x7fffffff;
5769d3cd
AC
2652}
2653
ffc65945
KB
2654static int
2655s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2656{
2657 if (byte_size == 4)
119ac181 2658 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2659 else
2660 return 0;
2661}
2662
2663static const char *
2664s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2665{
119ac181 2666 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2667 return "mode32";
2668 else
2669 return NULL;
2670}
2671
a78f21af 2672static int
ffc65945
KB
2673s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2674 int *type_flags_ptr)
2675{
2676 if (strcmp (name, "mode32") == 0)
2677 {
119ac181 2678 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2679 return 1;
2680 }
2681 else
2682 return 0;
2683}
2684
a8c99f38
JB
2685/* Set up gdbarch struct. */
2686
a78f21af 2687static struct gdbarch *
5769d3cd
AC
2688s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2689{
7803799a
UW
2690 const struct target_desc *tdesc = info.target_desc;
2691 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2692 struct gdbarch *gdbarch;
2693 struct gdbarch_tdep *tdep;
7803799a
UW
2694 int tdep_abi;
2695 int have_upper = 0;
2696 int first_pseudo_reg, last_pseudo_reg;
2697
2698 /* Default ABI and register size. */
2699 switch (info.bfd_arch_info->mach)
2700 {
2701 case bfd_mach_s390_31:
2702 tdep_abi = ABI_LINUX_S390;
2703 break;
2704
2705 case bfd_mach_s390_64:
2706 tdep_abi = ABI_LINUX_ZSERIES;
2707 break;
2708
2709 default:
2710 return NULL;
2711 }
2712
2713 /* Use default target description if none provided by the target. */
2714 if (!tdesc_has_registers (tdesc))
2715 {
2716 if (tdep_abi == ABI_LINUX_S390)
2717 tdesc = tdesc_s390_linux32;
2718 else
2719 tdesc = tdesc_s390x_linux64;
2720 }
2721
2722 /* Check any target description for validity. */
2723 if (tdesc_has_registers (tdesc))
2724 {
2725 static const char *const gprs[] = {
2726 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2727 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2728 };
2729 static const char *const fprs[] = {
2730 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2731 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
2732 };
2733 static const char *const acrs[] = {
2734 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
2735 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
2736 };
2737 static const char *const gprs_lower[] = {
2738 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
2739 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
2740 };
2741 static const char *const gprs_upper[] = {
2742 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
2743 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
2744 };
2745 const struct tdesc_feature *feature;
2746 int i, valid_p = 1;
2747
2748 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
2749 if (feature == NULL)
2750 return NULL;
2751
2752 tdesc_data = tdesc_data_alloc ();
2753
2754 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2755 S390_PSWM_REGNUM, "pswm");
2756 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2757 S390_PSWA_REGNUM, "pswa");
2758
2759 if (tdesc_unnumbered_register (feature, "r0"))
2760 {
2761 for (i = 0; i < 16; i++)
2762 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2763 S390_R0_REGNUM + i, gprs[i]);
2764 }
2765 else
2766 {
2767 have_upper = 1;
2768
2769 for (i = 0; i < 16; i++)
2770 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2771 S390_R0_REGNUM + i,
2772 gprs_lower[i]);
2773 for (i = 0; i < 16; i++)
2774 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2775 S390_R0_UPPER_REGNUM + i,
2776 gprs_upper[i]);
2777 }
2778
2779 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
2780 if (feature == NULL)
2781 {
2782 tdesc_data_cleanup (tdesc_data);
2783 return NULL;
2784 }
2785
2786 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2787 S390_FPC_REGNUM, "fpc");
2788 for (i = 0; i < 16; i++)
2789 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2790 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 2791
7803799a
UW
2792 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
2793 if (feature == NULL)
2794 {
2795 tdesc_data_cleanup (tdesc_data);
2796 return NULL;
2797 }
2798
2799 for (i = 0; i < 16; i++)
2800 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2801 S390_A0_REGNUM + i, acrs[i]);
2802
2803 if (!valid_p)
2804 {
2805 tdesc_data_cleanup (tdesc_data);
2806 return NULL;
2807 }
2808 }
5769d3cd 2809
7803799a
UW
2810 /* Find a candidate among extant architectures. */
2811 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2812 arches != NULL;
2813 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2814 {
2815 tdep = gdbarch_tdep (arches->gdbarch);
2816 if (!tdep)
2817 continue;
2818 if (tdep->abi != tdep_abi)
2819 continue;
2820 if ((tdep->gpr_full_regnum != -1) != have_upper)
2821 continue;
2822 if (tdesc_data != NULL)
2823 tdesc_data_cleanup (tdesc_data);
2824 return arches->gdbarch;
2825 }
5769d3cd 2826
7803799a 2827 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 2828 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 2829 tdep->abi = tdep_abi;
d0f54f9d 2830 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
2831
2832 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 2833 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 2834
1de90795
UW
2835 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
2836 We can safely let them default to 128-bit, since the debug info
2837 will give the size of type actually used in each case. */
2838 set_gdbarch_long_double_bit (gdbarch, 128);
2839 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
2840
aaab4dba 2841 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 2842 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 2843 always. */
5769d3cd 2844 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
2845 /* Stack grows downward. */
2846 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
2847 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2848 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 2849 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 2850
7803799a 2851 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 2852 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 2853 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 2854 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 2855 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 2856 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
2857 set_gdbarch_regset_from_core_section (gdbarch,
2858 s390_regset_from_core_section);
7803799a
UW
2859 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
2860 if (have_upper)
2861 set_gdbarch_core_regset_sections (gdbarch, s390_upper_regset_sections);
2862 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2863 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
2864 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
2865 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
2866 set_tdesc_pseudo_register_reggroup_p (gdbarch,
2867 s390_pseudo_register_reggroup_p);
2868 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
2869
2870 /* Assign pseudo register numbers. */
2871 first_pseudo_reg = gdbarch_num_regs (gdbarch);
2872 last_pseudo_reg = first_pseudo_reg;
2873 tdep->gpr_full_regnum = -1;
2874 if (have_upper)
2875 {
2876 tdep->gpr_full_regnum = last_pseudo_reg;
2877 last_pseudo_reg += 16;
2878 }
2879 tdep->pc_regnum = last_pseudo_reg++;
2880 tdep->cc_regnum = last_pseudo_reg++;
2881 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
2882 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 2883
b0cf273e
JB
2884 /* Inferior function calls. */
2885 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 2886 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 2887 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 2888 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 2889
a8c99f38 2890 /* Frame handling. */
a431654a 2891 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 2892 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 2893 dwarf2_append_unwinders (gdbarch);
a431654a 2894 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
2895 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
2896 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
2897 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
2898 frame_base_set_default (gdbarch, &s390_frame_base);
2899 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
2900 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
2901
1db4e8a0
UW
2902 /* Displaced stepping. */
2903 set_gdbarch_displaced_step_copy_insn (gdbarch,
2904 simple_displaced_step_copy_insn);
2905 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
2906 set_gdbarch_displaced_step_free_closure (gdbarch,
2907 simple_displaced_step_free_closure);
2908 set_gdbarch_displaced_step_location (gdbarch,
2909 displaced_step_at_entry_point);
2910 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
2911
70728992
PA
2912 /* Note that GNU/Linux is the only OS supported on this
2913 platform. */
2914 linux_init_abi (info, gdbarch);
2915
7803799a 2916 switch (tdep->abi)
5769d3cd 2917 {
7803799a 2918 case ABI_LINUX_S390:
d0f54f9d
JB
2919 tdep->gregset = &s390_gregset;
2920 tdep->sizeof_gregset = s390_sizeof_gregset;
2921 tdep->fpregset = &s390_fpregset;
2922 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2923
2924 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
2925 set_solib_svr4_fetch_link_map_offsets
2926 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
5769d3cd 2927 break;
b0cf273e 2928
7803799a 2929 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
2930 tdep->gregset = &s390x_gregset;
2931 tdep->sizeof_gregset = s390x_sizeof_gregset;
2932 tdep->fpregset = &s390_fpregset;
2933 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2934
2935 set_gdbarch_long_bit (gdbarch, 64);
2936 set_gdbarch_long_long_bit (gdbarch, 64);
2937 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
2938 set_solib_svr4_fetch_link_map_offsets
2939 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
2940 set_gdbarch_address_class_type_flags (gdbarch,
2941 s390_address_class_type_flags);
2942 set_gdbarch_address_class_type_flags_to_name (gdbarch,
2943 s390_address_class_type_flags_to_name);
2944 set_gdbarch_address_class_name_to_type_flags (gdbarch,
2945 s390_address_class_name_to_type_flags);
5769d3cd
AC
2946 break;
2947 }
2948
36482093
AC
2949 set_gdbarch_print_insn (gdbarch, print_insn_s390);
2950
982e9687
UW
2951 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
2952
b2756930
KB
2953 /* Enable TLS support. */
2954 set_gdbarch_fetch_tls_load_module_address (gdbarch,
2955 svr4_fetch_objfile_link_map);
2956
5769d3cd
AC
2957 return gdbarch;
2958}
2959
2960
a78f21af
AC
2961extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
2962
5769d3cd 2963void
5ae5f592 2964_initialize_s390_tdep (void)
5769d3cd 2965{
5769d3cd
AC
2966 /* Hook us into the gdbarch mechanism. */
2967 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a
UW
2968
2969 /* Initialize the Linux target descriptions. */
2970 initialize_tdesc_s390_linux32 ();
2971 initialize_tdesc_s390_linux64 ();
2972 initialize_tdesc_s390x_linux64 ();
5769d3cd 2973}
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