Commit | Line | Data |
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5769d3cd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ca557f44 | 2 | |
7b6bb8da JB |
3 | Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, |
4 | 2011 Free Software Foundation, Inc. | |
ca557f44 | 5 | |
5769d3cd AC |
6 | Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) |
7 | for IBM Deutschland Entwicklung GmbH, IBM Corporation. | |
8 | ||
9 | This file is part of GDB. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 13 | the Free Software Foundation; either version 3 of the License, or |
5769d3cd AC |
14 | (at your option) any later version. |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 22 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
5769d3cd | 23 | |
d0f54f9d | 24 | #include "defs.h" |
5769d3cd AC |
25 | #include "arch-utils.h" |
26 | #include "frame.h" | |
27 | #include "inferior.h" | |
28 | #include "symtab.h" | |
29 | #include "target.h" | |
30 | #include "gdbcore.h" | |
31 | #include "gdbcmd.h" | |
5769d3cd | 32 | #include "objfiles.h" |
5769d3cd AC |
33 | #include "floatformat.h" |
34 | #include "regcache.h" | |
a8c99f38 JB |
35 | #include "trad-frame.h" |
36 | #include "frame-base.h" | |
37 | #include "frame-unwind.h" | |
a431654a | 38 | #include "dwarf2-frame.h" |
d0f54f9d JB |
39 | #include "reggroups.h" |
40 | #include "regset.h" | |
fd0407d6 | 41 | #include "value.h" |
78f8b424 | 42 | #include "gdb_assert.h" |
a89aa300 | 43 | #include "dis-asm.h" |
76a9d10f | 44 | #include "solib-svr4.h" |
3fc46200 | 45 | #include "prologue-value.h" |
70728992 | 46 | #include "linux-tdep.h" |
d0f54f9d | 47 | #include "s390-tdep.h" |
5769d3cd | 48 | |
7803799a UW |
49 | #include "features/s390-linux32.c" |
50 | #include "features/s390-linux64.c" | |
51 | #include "features/s390x-linux64.c" | |
52 | ||
60e6cc42 | 53 | |
d0f54f9d JB |
54 | /* The tdep structure. */ |
55 | ||
56 | struct gdbarch_tdep | |
5769d3cd | 57 | { |
b0cf273e JB |
58 | /* ABI version. */ |
59 | enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; | |
60 | ||
7803799a UW |
61 | /* Pseudo register numbers. */ |
62 | int gpr_full_regnum; | |
63 | int pc_regnum; | |
64 | int cc_regnum; | |
65 | ||
d0f54f9d JB |
66 | /* Core file register sets. */ |
67 | const struct regset *gregset; | |
68 | int sizeof_gregset; | |
69 | ||
70 | const struct regset *fpregset; | |
71 | int sizeof_fpregset; | |
72 | }; | |
73 | ||
74 | ||
7803799a UW |
75 | /* ABI call-saved register information. */ |
76 | ||
77 | static int | |
78 | s390_register_call_saved (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 79 | { |
7803799a UW |
80 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
81 | ||
82 | switch (tdep->abi) | |
6707b003 | 83 | { |
7803799a UW |
84 | case ABI_LINUX_S390: |
85 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
86 | || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM | |
87 | || regnum == S390_A0_REGNUM) | |
88 | return 1; | |
6707b003 | 89 | |
7803799a UW |
90 | break; |
91 | ||
92 | case ABI_LINUX_ZSERIES: | |
93 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
94 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) | |
95 | || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) | |
96 | return 1; | |
97 | ||
98 | break; | |
99 | } | |
100 | ||
101 | return 0; | |
5769d3cd AC |
102 | } |
103 | ||
7803799a | 104 | |
d0f54f9d JB |
105 | /* DWARF Register Mapping. */ |
106 | ||
107 | static int s390_dwarf_regmap[] = | |
108 | { | |
109 | /* General Purpose Registers. */ | |
110 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
111 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
112 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
113 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
114 | ||
115 | /* Floating Point Registers. */ | |
116 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, | |
117 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, | |
118 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, | |
119 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, | |
120 | ||
121 | /* Control Registers (not mapped). */ | |
122 | -1, -1, -1, -1, -1, -1, -1, -1, | |
123 | -1, -1, -1, -1, -1, -1, -1, -1, | |
124 | ||
125 | /* Access Registers. */ | |
126 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, | |
127 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, | |
128 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, | |
129 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, | |
130 | ||
131 | /* Program Status Word. */ | |
132 | S390_PSWM_REGNUM, | |
7803799a UW |
133 | S390_PSWA_REGNUM, |
134 | ||
135 | /* GPR Lower Half Access. */ | |
136 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
137 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
138 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
139 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
d0f54f9d JB |
140 | }; |
141 | ||
142 | /* Convert DWARF register number REG to the appropriate register | |
143 | number used by GDB. */ | |
a78f21af | 144 | static int |
d3f73121 | 145 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
d0f54f9d | 146 | { |
7803799a UW |
147 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
148 | ||
149 | /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit | |
150 | GPRs. Note that call frame information still refers to the 32-bit | |
151 | lower halves, because s390_adjust_frame_regnum uses register numbers | |
152 | 66 .. 81 to access GPRs. */ | |
153 | if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) | |
154 | return tdep->gpr_full_regnum + reg; | |
d0f54f9d | 155 | |
16aff9a6 | 156 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
7803799a | 157 | return s390_dwarf_regmap[reg]; |
d0f54f9d | 158 | |
7803799a UW |
159 | warning (_("Unmapped DWARF Register #%d encountered."), reg); |
160 | return -1; | |
161 | } | |
d0f54f9d | 162 | |
7803799a UW |
163 | /* Translate a .eh_frame register to DWARF register, or adjust a |
164 | .debug_frame register. */ | |
165 | static int | |
166 | s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) | |
167 | { | |
168 | /* See s390_dwarf_reg_to_regnum for comments. */ | |
169 | return (num >= 0 && num < 16)? num + 66 : num; | |
d0f54f9d JB |
170 | } |
171 | ||
d0f54f9d | 172 | |
7803799a UW |
173 | /* Pseudo registers. */ |
174 | ||
175 | static const char * | |
176 | s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 177 | { |
7803799a | 178 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 179 | |
7803799a UW |
180 | if (regnum == tdep->pc_regnum) |
181 | return "pc"; | |
d0f54f9d | 182 | |
7803799a UW |
183 | if (regnum == tdep->cc_regnum) |
184 | return "cc"; | |
d0f54f9d | 185 | |
7803799a UW |
186 | if (tdep->gpr_full_regnum != -1 |
187 | && regnum >= tdep->gpr_full_regnum | |
188 | && regnum < tdep->gpr_full_regnum + 16) | |
189 | { | |
190 | static const char *full_name[] = { | |
191 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
192 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
193 | }; | |
194 | return full_name[regnum - tdep->gpr_full_regnum]; | |
d0f54f9d | 195 | } |
7803799a UW |
196 | |
197 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
198 | } |
199 | ||
7803799a UW |
200 | static struct type * |
201 | s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) | |
5769d3cd | 202 | { |
7803799a | 203 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 204 | |
7803799a UW |
205 | if (regnum == tdep->pc_regnum) |
206 | return builtin_type (gdbarch)->builtin_func_ptr; | |
d0f54f9d | 207 | |
7803799a UW |
208 | if (regnum == tdep->cc_regnum) |
209 | return builtin_type (gdbarch)->builtin_int; | |
d0f54f9d | 210 | |
7803799a UW |
211 | if (tdep->gpr_full_regnum != -1 |
212 | && regnum >= tdep->gpr_full_regnum | |
213 | && regnum < tdep->gpr_full_regnum + 16) | |
214 | return builtin_type (gdbarch)->builtin_uint64; | |
215 | ||
216 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
5769d3cd AC |
217 | } |
218 | ||
d0f54f9d | 219 | static void |
7803799a UW |
220 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
221 | int regnum, gdb_byte *buf) | |
d0f54f9d | 222 | { |
7803799a | 223 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 224 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 225 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
226 | ULONGEST val; |
227 | ||
7803799a | 228 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 229 | { |
7803799a UW |
230 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); |
231 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
232 | val &= 0x7fffffff; | |
233 | store_unsigned_integer (buf, regsize, byte_order, val); | |
234 | return; | |
235 | } | |
d0f54f9d | 236 | |
7803799a UW |
237 | if (regnum == tdep->cc_regnum) |
238 | { | |
d0f54f9d | 239 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); |
7803799a UW |
240 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
241 | val = (val >> 12) & 3; | |
242 | else | |
243 | val = (val >> 44) & 3; | |
244 | store_unsigned_integer (buf, regsize, byte_order, val); | |
245 | return; | |
246 | } | |
d0f54f9d | 247 | |
7803799a UW |
248 | if (tdep->gpr_full_regnum != -1 |
249 | && regnum >= tdep->gpr_full_regnum | |
250 | && regnum < tdep->gpr_full_regnum + 16) | |
251 | { | |
252 | ULONGEST val_upper; | |
253 | regnum -= tdep->gpr_full_regnum; | |
254 | ||
255 | regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val); | |
256 | regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
257 | &val_upper); | |
258 | val |= val_upper << 32; | |
259 | store_unsigned_integer (buf, regsize, byte_order, val); | |
260 | return; | |
d0f54f9d | 261 | } |
7803799a UW |
262 | |
263 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
264 | } |
265 | ||
266 | static void | |
7803799a UW |
267 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
268 | int regnum, const gdb_byte *buf) | |
d0f54f9d | 269 | { |
7803799a | 270 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 271 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 272 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
273 | ULONGEST val, psw; |
274 | ||
7803799a | 275 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 276 | { |
7803799a UW |
277 | val = extract_unsigned_integer (buf, regsize, byte_order); |
278 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
279 | { | |
280 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); | |
281 | val = (psw & 0x80000000) | (val & 0x7fffffff); | |
282 | } | |
283 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); | |
284 | return; | |
285 | } | |
d0f54f9d | 286 | |
7803799a UW |
287 | if (regnum == tdep->cc_regnum) |
288 | { | |
289 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
d0f54f9d | 290 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
7803799a UW |
291 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
292 | val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); | |
293 | else | |
294 | val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); | |
295 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); | |
296 | return; | |
297 | } | |
d0f54f9d | 298 | |
7803799a UW |
299 | if (tdep->gpr_full_regnum != -1 |
300 | && regnum >= tdep->gpr_full_regnum | |
301 | && regnum < tdep->gpr_full_regnum + 16) | |
302 | { | |
303 | regnum -= tdep->gpr_full_regnum; | |
304 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
305 | regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, | |
306 | val & 0xffffffff); | |
307 | regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
308 | val >> 32); | |
309 | return; | |
d0f54f9d | 310 | } |
7803799a UW |
311 | |
312 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
313 | } |
314 | ||
315 | /* 'float' values are stored in the upper half of floating-point | |
316 | registers, even though we are otherwise a big-endian platform. */ | |
317 | ||
9acbedc0 UW |
318 | static struct value * |
319 | s390_value_from_register (struct type *type, int regnum, | |
320 | struct frame_info *frame) | |
d0f54f9d | 321 | { |
9acbedc0 UW |
322 | struct value *value = default_value_from_register (type, regnum, frame); |
323 | int len = TYPE_LENGTH (type); | |
d0f54f9d | 324 | |
9acbedc0 UW |
325 | if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8) |
326 | set_value_offset (value, 0); | |
d0f54f9d | 327 | |
9acbedc0 | 328 | return value; |
d0f54f9d JB |
329 | } |
330 | ||
331 | /* Register groups. */ | |
332 | ||
a78f21af | 333 | static int |
7803799a UW |
334 | s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
335 | struct reggroup *group) | |
d0f54f9d JB |
336 | { |
337 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
338 | ||
7803799a | 339 | /* PC and CC pseudo registers need to be saved/restored in order to |
d0f54f9d JB |
340 | push or pop frames. */ |
341 | if (group == save_reggroup || group == restore_reggroup) | |
7803799a | 342 | return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; |
d0f54f9d JB |
343 | |
344 | return default_register_reggroup_p (gdbarch, regnum, group); | |
345 | } | |
346 | ||
347 | ||
348 | /* Core file register sets. */ | |
349 | ||
350 | int s390_regmap_gregset[S390_NUM_REGS] = | |
351 | { | |
352 | /* Program Status Word. */ | |
353 | 0x00, 0x04, | |
354 | /* General Purpose Registers. */ | |
355 | 0x08, 0x0c, 0x10, 0x14, | |
356 | 0x18, 0x1c, 0x20, 0x24, | |
357 | 0x28, 0x2c, 0x30, 0x34, | |
358 | 0x38, 0x3c, 0x40, 0x44, | |
359 | /* Access Registers. */ | |
360 | 0x48, 0x4c, 0x50, 0x54, | |
361 | 0x58, 0x5c, 0x60, 0x64, | |
362 | 0x68, 0x6c, 0x70, 0x74, | |
363 | 0x78, 0x7c, 0x80, 0x84, | |
364 | /* Floating Point Control Word. */ | |
365 | -1, | |
366 | /* Floating Point Registers. */ | |
367 | -1, -1, -1, -1, -1, -1, -1, -1, | |
368 | -1, -1, -1, -1, -1, -1, -1, -1, | |
7803799a UW |
369 | /* GPR Uppper Halves. */ |
370 | -1, -1, -1, -1, -1, -1, -1, -1, | |
371 | -1, -1, -1, -1, -1, -1, -1, -1, | |
d0f54f9d JB |
372 | }; |
373 | ||
374 | int s390x_regmap_gregset[S390_NUM_REGS] = | |
375 | { | |
7803799a | 376 | /* Program Status Word. */ |
d0f54f9d JB |
377 | 0x00, 0x08, |
378 | /* General Purpose Registers. */ | |
379 | 0x10, 0x18, 0x20, 0x28, | |
380 | 0x30, 0x38, 0x40, 0x48, | |
381 | 0x50, 0x58, 0x60, 0x68, | |
382 | 0x70, 0x78, 0x80, 0x88, | |
383 | /* Access Registers. */ | |
384 | 0x90, 0x94, 0x98, 0x9c, | |
385 | 0xa0, 0xa4, 0xa8, 0xac, | |
386 | 0xb0, 0xb4, 0xb8, 0xbc, | |
387 | 0xc0, 0xc4, 0xc8, 0xcc, | |
388 | /* Floating Point Control Word. */ | |
389 | -1, | |
390 | /* Floating Point Registers. */ | |
391 | -1, -1, -1, -1, -1, -1, -1, -1, | |
392 | -1, -1, -1, -1, -1, -1, -1, -1, | |
7803799a UW |
393 | /* GPR Uppper Halves. */ |
394 | 0x10, 0x18, 0x20, 0x28, | |
395 | 0x30, 0x38, 0x40, 0x48, | |
396 | 0x50, 0x58, 0x60, 0x68, | |
397 | 0x70, 0x78, 0x80, 0x88, | |
d0f54f9d JB |
398 | }; |
399 | ||
400 | int s390_regmap_fpregset[S390_NUM_REGS] = | |
401 | { | |
402 | /* Program Status Word. */ | |
403 | -1, -1, | |
404 | /* General Purpose Registers. */ | |
405 | -1, -1, -1, -1, -1, -1, -1, -1, | |
406 | -1, -1, -1, -1, -1, -1, -1, -1, | |
407 | /* Access Registers. */ | |
408 | -1, -1, -1, -1, -1, -1, -1, -1, | |
409 | -1, -1, -1, -1, -1, -1, -1, -1, | |
410 | /* Floating Point Control Word. */ | |
411 | 0x00, | |
412 | /* Floating Point Registers. */ | |
413 | 0x08, 0x10, 0x18, 0x20, | |
414 | 0x28, 0x30, 0x38, 0x40, | |
415 | 0x48, 0x50, 0x58, 0x60, | |
416 | 0x68, 0x70, 0x78, 0x80, | |
7803799a UW |
417 | /* GPR Uppper Halves. */ |
418 | -1, -1, -1, -1, -1, -1, -1, -1, | |
419 | -1, -1, -1, -1, -1, -1, -1, -1, | |
420 | }; | |
421 | ||
422 | int s390_regmap_upper[S390_NUM_REGS] = | |
423 | { | |
424 | /* Program Status Word. */ | |
425 | -1, -1, | |
426 | /* General Purpose Registers. */ | |
427 | -1, -1, -1, -1, -1, -1, -1, -1, | |
428 | -1, -1, -1, -1, -1, -1, -1, -1, | |
429 | /* Access Registers. */ | |
430 | -1, -1, -1, -1, -1, -1, -1, -1, | |
431 | -1, -1, -1, -1, -1, -1, -1, -1, | |
432 | /* Floating Point Control Word. */ | |
433 | -1, | |
434 | /* Floating Point Registers. */ | |
435 | -1, -1, -1, -1, -1, -1, -1, -1, | |
436 | -1, -1, -1, -1, -1, -1, -1, -1, | |
437 | /* GPR Uppper Halves. */ | |
438 | 0x00, 0x04, 0x08, 0x0c, | |
439 | 0x10, 0x14, 0x18, 0x1c, | |
440 | 0x20, 0x24, 0x28, 0x2c, | |
441 | 0x30, 0x34, 0x38, 0x3c, | |
d0f54f9d JB |
442 | }; |
443 | ||
444 | /* Supply register REGNUM from the register set REGSET to register cache | |
445 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
446 | static void | |
447 | s390_supply_regset (const struct regset *regset, struct regcache *regcache, | |
448 | int regnum, const void *regs, size_t len) | |
449 | { | |
450 | const int *offset = regset->descr; | |
451 | int i; | |
452 | ||
453 | for (i = 0; i < S390_NUM_REGS; i++) | |
454 | { | |
455 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
456 | regcache_raw_supply (regcache, i, (const char *)regs + offset[i]); | |
457 | } | |
458 | } | |
459 | ||
92f38ec2 UW |
460 | /* Collect register REGNUM from the register cache REGCACHE and store |
461 | it in the buffer specified by REGS and LEN as described by the | |
462 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
463 | all registers in REGSET. */ | |
464 | static void | |
465 | s390_collect_regset (const struct regset *regset, | |
466 | const struct regcache *regcache, | |
467 | int regnum, void *regs, size_t len) | |
468 | { | |
469 | const int *offset = regset->descr; | |
470 | int i; | |
471 | ||
472 | for (i = 0; i < S390_NUM_REGS; i++) | |
473 | { | |
474 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
475 | regcache_raw_collect (regcache, i, (char *)regs + offset[i]); | |
476 | } | |
477 | } | |
478 | ||
d0f54f9d JB |
479 | static const struct regset s390_gregset = { |
480 | s390_regmap_gregset, | |
92f38ec2 UW |
481 | s390_supply_regset, |
482 | s390_collect_regset | |
d0f54f9d JB |
483 | }; |
484 | ||
485 | static const struct regset s390x_gregset = { | |
486 | s390x_regmap_gregset, | |
92f38ec2 UW |
487 | s390_supply_regset, |
488 | s390_collect_regset | |
d0f54f9d JB |
489 | }; |
490 | ||
491 | static const struct regset s390_fpregset = { | |
492 | s390_regmap_fpregset, | |
92f38ec2 UW |
493 | s390_supply_regset, |
494 | s390_collect_regset | |
d0f54f9d JB |
495 | }; |
496 | ||
7803799a UW |
497 | static const struct regset s390_upper_regset = { |
498 | s390_regmap_upper, | |
499 | s390_supply_regset, | |
500 | s390_collect_regset | |
501 | }; | |
502 | ||
503 | static struct core_regset_section s390_upper_regset_sections[] = | |
504 | { | |
505 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
506 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
507 | { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, | |
508 | { NULL, 0} | |
509 | }; | |
510 | ||
d0f54f9d JB |
511 | /* Return the appropriate register set for the core section identified |
512 | by SECT_NAME and SECT_SIZE. */ | |
63807e1d | 513 | static const struct regset * |
d0f54f9d JB |
514 | s390_regset_from_core_section (struct gdbarch *gdbarch, |
515 | const char *sect_name, size_t sect_size) | |
516 | { | |
517 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
518 | ||
e31dcd20 | 519 | if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) |
d0f54f9d JB |
520 | return tdep->gregset; |
521 | ||
e31dcd20 | 522 | if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) |
d0f54f9d JB |
523 | return tdep->fpregset; |
524 | ||
7803799a UW |
525 | if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4) |
526 | return &s390_upper_regset; | |
527 | ||
d0f54f9d | 528 | return NULL; |
5769d3cd AC |
529 | } |
530 | ||
7803799a UW |
531 | static const struct target_desc * |
532 | s390_core_read_description (struct gdbarch *gdbarch, | |
533 | struct target_ops *target, bfd *abfd) | |
534 | { | |
535 | asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs"); | |
536 | asection *section = bfd_get_section_by_name (abfd, ".reg"); | |
537 | if (!section) | |
538 | return NULL; | |
539 | ||
540 | switch (bfd_section_size (abfd, section)) | |
541 | { | |
542 | case s390_sizeof_gregset: | |
543 | return high_gprs? tdesc_s390_linux64 : tdesc_s390_linux32; | |
544 | ||
545 | case s390x_sizeof_gregset: | |
546 | return tdesc_s390x_linux64; | |
547 | ||
548 | default: | |
549 | return NULL; | |
550 | } | |
551 | } | |
552 | ||
d0f54f9d | 553 | |
4bc8c588 JB |
554 | /* Decoding S/390 instructions. */ |
555 | ||
556 | /* Named opcode values for the S/390 instructions we recognize. Some | |
557 | instructions have their opcode split across two fields; those are the | |
558 | op1_* and op2_* enums. */ | |
559 | enum | |
560 | { | |
a8c99f38 JB |
561 | op1_lhi = 0xa7, op2_lhi = 0x08, |
562 | op1_lghi = 0xa7, op2_lghi = 0x09, | |
00ce08ef | 563 | op1_lgfi = 0xc0, op2_lgfi = 0x01, |
4bc8c588 | 564 | op_lr = 0x18, |
a8c99f38 JB |
565 | op_lgr = 0xb904, |
566 | op_l = 0x58, | |
567 | op1_ly = 0xe3, op2_ly = 0x58, | |
568 | op1_lg = 0xe3, op2_lg = 0x04, | |
569 | op_lm = 0x98, | |
570 | op1_lmy = 0xeb, op2_lmy = 0x98, | |
571 | op1_lmg = 0xeb, op2_lmg = 0x04, | |
4bc8c588 | 572 | op_st = 0x50, |
a8c99f38 | 573 | op1_sty = 0xe3, op2_sty = 0x50, |
4bc8c588 | 574 | op1_stg = 0xe3, op2_stg = 0x24, |
a8c99f38 | 575 | op_std = 0x60, |
4bc8c588 | 576 | op_stm = 0x90, |
a8c99f38 | 577 | op1_stmy = 0xeb, op2_stmy = 0x90, |
4bc8c588 | 578 | op1_stmg = 0xeb, op2_stmg = 0x24, |
a8c99f38 JB |
579 | op1_aghi = 0xa7, op2_aghi = 0x0b, |
580 | op1_ahi = 0xa7, op2_ahi = 0x0a, | |
00ce08ef UW |
581 | op1_agfi = 0xc2, op2_agfi = 0x08, |
582 | op1_afi = 0xc2, op2_afi = 0x09, | |
583 | op1_algfi= 0xc2, op2_algfi= 0x0a, | |
584 | op1_alfi = 0xc2, op2_alfi = 0x0b, | |
a8c99f38 JB |
585 | op_ar = 0x1a, |
586 | op_agr = 0xb908, | |
587 | op_a = 0x5a, | |
588 | op1_ay = 0xe3, op2_ay = 0x5a, | |
589 | op1_ag = 0xe3, op2_ag = 0x08, | |
00ce08ef UW |
590 | op1_slgfi= 0xc2, op2_slgfi= 0x04, |
591 | op1_slfi = 0xc2, op2_slfi = 0x05, | |
a8c99f38 JB |
592 | op_sr = 0x1b, |
593 | op_sgr = 0xb909, | |
594 | op_s = 0x5b, | |
595 | op1_sy = 0xe3, op2_sy = 0x5b, | |
596 | op1_sg = 0xe3, op2_sg = 0x09, | |
597 | op_nr = 0x14, | |
598 | op_ngr = 0xb980, | |
599 | op_la = 0x41, | |
600 | op1_lay = 0xe3, op2_lay = 0x71, | |
601 | op1_larl = 0xc0, op2_larl = 0x00, | |
602 | op_basr = 0x0d, | |
603 | op_bas = 0x4d, | |
604 | op_bcr = 0x07, | |
605 | op_bc = 0x0d, | |
1db4e8a0 UW |
606 | op_bctr = 0x06, |
607 | op_bctgr = 0xb946, | |
608 | op_bct = 0x46, | |
609 | op1_bctg = 0xe3, op2_bctg = 0x46, | |
610 | op_bxh = 0x86, | |
611 | op1_bxhg = 0xeb, op2_bxhg = 0x44, | |
612 | op_bxle = 0x87, | |
613 | op1_bxleg= 0xeb, op2_bxleg= 0x45, | |
a8c99f38 JB |
614 | op1_bras = 0xa7, op2_bras = 0x05, |
615 | op1_brasl= 0xc0, op2_brasl= 0x05, | |
616 | op1_brc = 0xa7, op2_brc = 0x04, | |
617 | op1_brcl = 0xc0, op2_brcl = 0x04, | |
1db4e8a0 UW |
618 | op1_brct = 0xa7, op2_brct = 0x06, |
619 | op1_brctg= 0xa7, op2_brctg= 0x07, | |
620 | op_brxh = 0x84, | |
621 | op1_brxhg= 0xec, op2_brxhg= 0x44, | |
622 | op_brxle = 0x85, | |
623 | op1_brxlg= 0xec, op2_brxlg= 0x45, | |
4bc8c588 JB |
624 | }; |
625 | ||
626 | ||
a8c99f38 JB |
627 | /* Read a single instruction from address AT. */ |
628 | ||
629 | #define S390_MAX_INSTR_SIZE 6 | |
630 | static int | |
631 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) | |
632 | { | |
633 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
634 | int instrlen; | |
635 | ||
8defab1a | 636 | if (target_read_memory (at, &instr[0], 2)) |
a8c99f38 JB |
637 | return -1; |
638 | instrlen = s390_instrlen[instr[0] >> 6]; | |
639 | if (instrlen > 2) | |
640 | { | |
8defab1a | 641 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
a8c99f38 JB |
642 | return -1; |
643 | } | |
644 | return instrlen; | |
645 | } | |
646 | ||
647 | ||
4bc8c588 JB |
648 | /* The functions below are for recognizing and decoding S/390 |
649 | instructions of various formats. Each of them checks whether INSN | |
650 | is an instruction of the given format, with the specified opcodes. | |
651 | If it is, it sets the remaining arguments to the values of the | |
652 | instruction's fields, and returns a non-zero value; otherwise, it | |
653 | returns zero. | |
654 | ||
655 | These functions' arguments appear in the order they appear in the | |
656 | instruction, not in the machine-language form. So, opcodes always | |
657 | come first, even though they're sometimes scattered around the | |
658 | instructions. And displacements appear before base and extension | |
659 | registers, as they do in the assembly syntax, not at the end, as | |
660 | they do in the machine language. */ | |
a78f21af | 661 | static int |
4bc8c588 JB |
662 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
663 | { | |
664 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
665 | { | |
666 | *r1 = (insn[1] >> 4) & 0xf; | |
667 | /* i2 is a 16-bit signed quantity. */ | |
668 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
669 | return 1; | |
670 | } | |
671 | else | |
672 | return 0; | |
673 | } | |
8ac0e65a | 674 | |
5769d3cd | 675 | |
4bc8c588 JB |
676 | static int |
677 | is_ril (bfd_byte *insn, int op1, int op2, | |
678 | unsigned int *r1, int *i2) | |
679 | { | |
680 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
681 | { | |
682 | *r1 = (insn[1] >> 4) & 0xf; | |
683 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, | |
684 | no sign extension is necessary, but we don't want to assume | |
685 | that. */ | |
686 | *i2 = (((insn[2] << 24) | |
687 | | (insn[3] << 16) | |
688 | | (insn[4] << 8) | |
689 | | (insn[5])) ^ 0x80000000) - 0x80000000; | |
690 | return 1; | |
691 | } | |
692 | else | |
693 | return 0; | |
694 | } | |
695 | ||
696 | ||
697 | static int | |
698 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
699 | { | |
700 | if (insn[0] == op) | |
701 | { | |
702 | *r1 = (insn[1] >> 4) & 0xf; | |
703 | *r2 = insn[1] & 0xf; | |
704 | return 1; | |
705 | } | |
706 | else | |
707 | return 0; | |
708 | } | |
709 | ||
710 | ||
711 | static int | |
712 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
713 | { | |
714 | if (((insn[0] << 8) | insn[1]) == op) | |
715 | { | |
716 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ | |
717 | *r1 = (insn[3] >> 4) & 0xf; | |
718 | *r2 = insn[3] & 0xf; | |
719 | return 1; | |
720 | } | |
721 | else | |
722 | return 0; | |
723 | } | |
724 | ||
725 | ||
726 | static int | |
727 | is_rs (bfd_byte *insn, int op, | |
728 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) | |
729 | { | |
730 | if (insn[0] == op) | |
731 | { | |
732 | *r1 = (insn[1] >> 4) & 0xf; | |
733 | *r3 = insn[1] & 0xf; | |
734 | *b2 = (insn[2] >> 4) & 0xf; | |
735 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
736 | return 1; | |
737 | } | |
738 | else | |
739 | return 0; | |
740 | } | |
741 | ||
742 | ||
743 | static int | |
a8c99f38 | 744 | is_rsy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
745 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) |
746 | { | |
747 | if (insn[0] == op1 | |
4bc8c588 JB |
748 | && insn[5] == op2) |
749 | { | |
750 | *r1 = (insn[1] >> 4) & 0xf; | |
751 | *r3 = insn[1] & 0xf; | |
752 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
753 | /* The 'long displacement' is a 20-bit signed integer. */ |
754 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
755 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
756 | return 1; |
757 | } | |
758 | else | |
759 | return 0; | |
760 | } | |
761 | ||
762 | ||
1db4e8a0 UW |
763 | static int |
764 | is_rsi (bfd_byte *insn, int op, | |
765 | unsigned int *r1, unsigned int *r3, int *i2) | |
766 | { | |
767 | if (insn[0] == op) | |
768 | { | |
769 | *r1 = (insn[1] >> 4) & 0xf; | |
770 | *r3 = insn[1] & 0xf; | |
771 | /* i2 is a 16-bit signed quantity. */ | |
772 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
773 | return 1; | |
774 | } | |
775 | else | |
776 | return 0; | |
777 | } | |
778 | ||
779 | ||
780 | static int | |
781 | is_rie (bfd_byte *insn, int op1, int op2, | |
782 | unsigned int *r1, unsigned int *r3, int *i2) | |
783 | { | |
784 | if (insn[0] == op1 | |
785 | && insn[5] == op2) | |
786 | { | |
787 | *r1 = (insn[1] >> 4) & 0xf; | |
788 | *r3 = insn[1] & 0xf; | |
789 | /* i2 is a 16-bit signed quantity. */ | |
790 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
791 | return 1; | |
792 | } | |
793 | else | |
794 | return 0; | |
795 | } | |
796 | ||
797 | ||
4bc8c588 JB |
798 | static int |
799 | is_rx (bfd_byte *insn, int op, | |
800 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) | |
801 | { | |
802 | if (insn[0] == op) | |
803 | { | |
804 | *r1 = (insn[1] >> 4) & 0xf; | |
805 | *x2 = insn[1] & 0xf; | |
806 | *b2 = (insn[2] >> 4) & 0xf; | |
807 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
808 | return 1; | |
809 | } | |
810 | else | |
811 | return 0; | |
812 | } | |
813 | ||
814 | ||
815 | static int | |
a8c99f38 | 816 | is_rxy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
817 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) |
818 | { | |
819 | if (insn[0] == op1 | |
4bc8c588 JB |
820 | && insn[5] == op2) |
821 | { | |
822 | *r1 = (insn[1] >> 4) & 0xf; | |
823 | *x2 = insn[1] & 0xf; | |
824 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
825 | /* The 'long displacement' is a 20-bit signed integer. */ |
826 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
827 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
828 | return 1; |
829 | } | |
830 | else | |
831 | return 0; | |
832 | } | |
833 | ||
834 | ||
3fc46200 | 835 | /* Prologue analysis. */ |
4bc8c588 | 836 | |
d0f54f9d JB |
837 | #define S390_NUM_GPRS 16 |
838 | #define S390_NUM_FPRS 16 | |
4bc8c588 | 839 | |
a8c99f38 JB |
840 | struct s390_prologue_data { |
841 | ||
ee1b3323 UW |
842 | /* The stack. */ |
843 | struct pv_area *stack; | |
844 | ||
e17a4113 | 845 | /* The size and byte-order of a GPR or FPR. */ |
a8c99f38 JB |
846 | int gpr_size; |
847 | int fpr_size; | |
e17a4113 | 848 | enum bfd_endian byte_order; |
a8c99f38 JB |
849 | |
850 | /* The general-purpose registers. */ | |
3fc46200 | 851 | pv_t gpr[S390_NUM_GPRS]; |
a8c99f38 JB |
852 | |
853 | /* The floating-point registers. */ | |
3fc46200 | 854 | pv_t fpr[S390_NUM_FPRS]; |
a8c99f38 | 855 | |
121d8485 UW |
856 | /* The offset relative to the CFA where the incoming GPR N was saved |
857 | by the function prologue. 0 if not saved or unknown. */ | |
858 | int gpr_slot[S390_NUM_GPRS]; | |
4bc8c588 | 859 | |
121d8485 UW |
860 | /* Likewise for FPRs. */ |
861 | int fpr_slot[S390_NUM_FPRS]; | |
4bc8c588 | 862 | |
121d8485 UW |
863 | /* Nonzero if the backchain was saved. This is assumed to be the |
864 | case when the incoming SP is saved at the current SP location. */ | |
865 | int back_chain_saved_p; | |
866 | }; | |
4bc8c588 | 867 | |
3fc46200 UW |
868 | /* Return the effective address for an X-style instruction, like: |
869 | ||
870 | L R1, D2(X2, B2) | |
871 | ||
872 | Here, X2 and B2 are registers, and D2 is a signed 20-bit | |
873 | constant; the effective address is the sum of all three. If either | |
874 | X2 or B2 are zero, then it doesn't contribute to the sum --- this | |
875 | means that r0 can't be used as either X2 or B2. */ | |
876 | static pv_t | |
877 | s390_addr (struct s390_prologue_data *data, | |
878 | int d2, unsigned int x2, unsigned int b2) | |
879 | { | |
880 | pv_t result; | |
881 | ||
882 | result = pv_constant (d2); | |
883 | if (x2) | |
884 | result = pv_add (result, data->gpr[x2]); | |
885 | if (b2) | |
886 | result = pv_add (result, data->gpr[b2]); | |
887 | ||
888 | return result; | |
889 | } | |
890 | ||
891 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ | |
a8c99f38 | 892 | static void |
3fc46200 UW |
893 | s390_store (struct s390_prologue_data *data, |
894 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, | |
895 | pv_t value) | |
4bc8c588 | 896 | { |
3fc46200 | 897 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 898 | pv_t offset; |
121d8485 UW |
899 | |
900 | /* Check whether we are storing the backchain. */ | |
3fc46200 | 901 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
121d8485 | 902 | |
3fc46200 | 903 | if (pv_is_constant (offset) && offset.k == 0) |
121d8485 | 904 | if (size == data->gpr_size |
3fc46200 | 905 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
121d8485 UW |
906 | { |
907 | data->back_chain_saved_p = 1; | |
908 | return; | |
909 | } | |
910 | ||
911 | ||
912 | /* Check whether we are storing a register into the stack. */ | |
ee1b3323 UW |
913 | if (!pv_area_store_would_trash (data->stack, addr)) |
914 | pv_area_store (data->stack, addr, size, value); | |
4bc8c588 | 915 | |
a8c99f38 | 916 | |
121d8485 UW |
917 | /* Note: If this is some store we cannot identify, you might think we |
918 | should forget our cached values, as any of those might have been hit. | |
919 | ||
920 | However, we make the assumption that the register save areas are only | |
921 | ever stored to once in any given function, and we do recognize these | |
922 | stores. Thus every store we cannot recognize does not hit our data. */ | |
4bc8c588 | 923 | } |
4bc8c588 | 924 | |
3fc46200 UW |
925 | /* Do a SIZE-byte load from D2(X2,B2). */ |
926 | static pv_t | |
927 | s390_load (struct s390_prologue_data *data, | |
928 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) | |
929 | ||
4bc8c588 | 930 | { |
3fc46200 | 931 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 932 | pv_t offset; |
4bc8c588 | 933 | |
a8c99f38 JB |
934 | /* If it's a load from an in-line constant pool, then we can |
935 | simulate that, under the assumption that the code isn't | |
936 | going to change between the time the processor actually | |
937 | executed it creating the current frame, and the time when | |
938 | we're analyzing the code to unwind past that frame. */ | |
3fc46200 | 939 | if (pv_is_constant (addr)) |
4bc8c588 | 940 | { |
0542c86d | 941 | struct target_section *secp; |
3fc46200 | 942 | secp = target_section_by_addr (¤t_target, addr.k); |
a8c99f38 JB |
943 | if (secp != NULL |
944 | && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section) | |
945 | & SEC_READONLY)) | |
e17a4113 UW |
946 | return pv_constant (read_memory_integer (addr.k, size, |
947 | data->byte_order)); | |
a8c99f38 | 948 | } |
7666f43c | 949 | |
121d8485 | 950 | /* Check whether we are accessing one of our save slots. */ |
ee1b3323 UW |
951 | return pv_area_fetch (data->stack, addr, size); |
952 | } | |
121d8485 | 953 | |
ee1b3323 UW |
954 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
955 | this to pv_area_scan. | |
121d8485 | 956 | |
ee1b3323 UW |
957 | If VALUE is a saved register, ADDR says it was saved at a constant |
958 | offset from the frame base, and SIZE indicates that the whole | |
959 | register was saved, record its offset in the reg_offset table in | |
960 | PROLOGUE_UNTYPED. */ | |
961 | static void | |
c378eb4e MS |
962 | s390_check_for_saved (void *data_untyped, pv_t addr, |
963 | CORE_ADDR size, pv_t value) | |
ee1b3323 UW |
964 | { |
965 | struct s390_prologue_data *data = data_untyped; | |
966 | int i, offset; | |
967 | ||
968 | if (!pv_is_register (addr, S390_SP_REGNUM)) | |
969 | return; | |
970 | ||
971 | offset = 16 * data->gpr_size + 32 - addr.k; | |
4bc8c588 | 972 | |
ee1b3323 UW |
973 | /* If we are storing the original value of a register, we want to |
974 | record the CFA offset. If the same register is stored multiple | |
975 | times, the stack slot with the highest address counts. */ | |
976 | ||
977 | for (i = 0; i < S390_NUM_GPRS; i++) | |
978 | if (size == data->gpr_size | |
979 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) | |
980 | if (data->gpr_slot[i] == 0 | |
981 | || data->gpr_slot[i] > offset) | |
982 | { | |
983 | data->gpr_slot[i] = offset; | |
984 | return; | |
985 | } | |
986 | ||
987 | for (i = 0; i < S390_NUM_FPRS; i++) | |
988 | if (size == data->fpr_size | |
989 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) | |
990 | if (data->fpr_slot[i] == 0 | |
991 | || data->fpr_slot[i] > offset) | |
992 | { | |
993 | data->fpr_slot[i] = offset; | |
994 | return; | |
995 | } | |
a8c99f38 | 996 | } |
4bc8c588 | 997 | |
a8c99f38 JB |
998 | /* Analyze the prologue of the function starting at START_PC, |
999 | continuing at most until CURRENT_PC. Initialize DATA to | |
1000 | hold all information we find out about the state of the registers | |
1001 | and stack slots. Return the address of the instruction after | |
1002 | the last one that changed the SP, FP, or back chain; or zero | |
1003 | on error. */ | |
1004 | static CORE_ADDR | |
1005 | s390_analyze_prologue (struct gdbarch *gdbarch, | |
1006 | CORE_ADDR start_pc, | |
1007 | CORE_ADDR current_pc, | |
1008 | struct s390_prologue_data *data) | |
4bc8c588 | 1009 | { |
a8c99f38 JB |
1010 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1011 | ||
4bc8c588 | 1012 | /* Our return value: |
a8c99f38 JB |
1013 | The address of the instruction after the last one that changed |
1014 | the SP, FP, or back chain; zero if we got an error trying to | |
1015 | read memory. */ | |
1016 | CORE_ADDR result = start_pc; | |
4bc8c588 | 1017 | |
4bc8c588 JB |
1018 | /* The current PC for our abstract interpretation. */ |
1019 | CORE_ADDR pc; | |
1020 | ||
1021 | /* The address of the next instruction after that. */ | |
1022 | CORE_ADDR next_pc; | |
1023 | ||
4bc8c588 JB |
1024 | /* Set up everything's initial value. */ |
1025 | { | |
1026 | int i; | |
1027 | ||
55f960e1 | 1028 | data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
ee1b3323 | 1029 | |
a8c99f38 JB |
1030 | /* For the purpose of prologue tracking, we consider the GPR size to |
1031 | be equal to the ABI word size, even if it is actually larger | |
1032 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ | |
1033 | data->gpr_size = word_size; | |
1034 | data->fpr_size = 8; | |
e17a4113 | 1035 | data->byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 | 1036 | |
4bc8c588 | 1037 | for (i = 0; i < S390_NUM_GPRS; i++) |
3fc46200 | 1038 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
4bc8c588 JB |
1039 | |
1040 | for (i = 0; i < S390_NUM_FPRS; i++) | |
3fc46200 | 1041 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
4bc8c588 | 1042 | |
121d8485 UW |
1043 | for (i = 0; i < S390_NUM_GPRS; i++) |
1044 | data->gpr_slot[i] = 0; | |
1045 | ||
1046 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1047 | data->fpr_slot[i] = 0; | |
4bc8c588 | 1048 | |
121d8485 | 1049 | data->back_chain_saved_p = 0; |
4bc8c588 JB |
1050 | } |
1051 | ||
a8c99f38 JB |
1052 | /* Start interpreting instructions, until we hit the frame's |
1053 | current PC or the first branch instruction. */ | |
1054 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) | |
5769d3cd | 1055 | { |
4bc8c588 | 1056 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
a788de9b | 1057 | int insn_len = s390_readinstruction (insn, pc); |
4bc8c588 | 1058 | |
3fc46200 UW |
1059 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
1060 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; | |
1061 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; | |
1062 | ||
4bc8c588 | 1063 | /* Fields for various kinds of instructions. */ |
a8c99f38 JB |
1064 | unsigned int b2, r1, r2, x2, r3; |
1065 | int i2, d2; | |
4bc8c588 | 1066 | |
121d8485 | 1067 | /* The values of SP and FP before this instruction, |
4bc8c588 | 1068 | for detecting instructions that change them. */ |
3fc46200 | 1069 | pv_t pre_insn_sp, pre_insn_fp; |
121d8485 UW |
1070 | /* Likewise for the flag whether the back chain was saved. */ |
1071 | int pre_insn_back_chain_saved_p; | |
4bc8c588 JB |
1072 | |
1073 | /* If we got an error trying to read the instruction, report it. */ | |
1074 | if (insn_len < 0) | |
8ac0e65a | 1075 | { |
a8c99f38 | 1076 | result = 0; |
4bc8c588 JB |
1077 | break; |
1078 | } | |
1079 | ||
1080 | next_pc = pc + insn_len; | |
1081 | ||
a8c99f38 JB |
1082 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1083 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
121d8485 | 1084 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
4bc8c588 | 1085 | |
4bc8c588 | 1086 | |
3fc46200 UW |
1087 | /* LHI r1, i2 --- load halfword immediate. */ |
1088 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ | |
1089 | /* LGFI r1, i2 --- load fullword immediate. */ | |
1090 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) | |
1091 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) | |
1092 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) | |
1093 | data->gpr[r1] = pv_constant (i2); | |
1094 | ||
1095 | /* LR r1, r2 --- load from register. */ | |
1096 | /* LGR r1, r2 --- load from register (64-bit version). */ | |
1097 | else if (is_rr (insn32, op_lr, &r1, &r2) | |
1098 | || is_rre (insn64, op_lgr, &r1, &r2)) | |
1099 | data->gpr[r1] = data->gpr[r2]; | |
1100 | ||
1101 | /* L r1, d2(x2, b2) --- load. */ | |
1102 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ | |
1103 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ | |
1104 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) | |
1105 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) | |
1106 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) | |
1107 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); | |
1108 | ||
1109 | /* ST r1, d2(x2, b2) --- store. */ | |
1110 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ | |
1111 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ | |
1112 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) | |
1113 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) | |
1114 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) | |
1115 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); | |
1116 | ||
1117 | /* STD r1, d2(x2,b2) --- store floating-point register. */ | |
4bc8c588 | 1118 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1119 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
1120 | ||
1121 | /* STM r1, r3, d2(b2) --- store multiple. */ | |
c378eb4e MS |
1122 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement |
1123 | version). */ | |
3fc46200 UW |
1124 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ |
1125 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) | |
1126 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) | |
1127 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) | |
4bc8c588 | 1128 | { |
3fc46200 UW |
1129 | for (; r1 <= r3; r1++, d2 += data->gpr_size) |
1130 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); | |
4bc8c588 JB |
1131 | } |
1132 | ||
3fc46200 UW |
1133 | /* AHI r1, i2 --- add halfword immediate. */ |
1134 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ | |
1135 | /* AFI r1, i2 --- add fullword immediate. */ | |
1136 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ | |
1137 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) | |
1138 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) | |
1139 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) | |
1140 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) | |
1141 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); | |
1142 | ||
1143 | /* ALFI r1, i2 --- add logical immediate. */ | |
1144 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ | |
1145 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) | |
1146 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) | |
1147 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1148 | (CORE_ADDR)i2 & 0xffffffff); | |
1149 | ||
1150 | /* AR r1, r2 -- add register. */ | |
1151 | /* AGR r1, r2 -- add register (64-bit version). */ | |
1152 | else if (is_rr (insn32, op_ar, &r1, &r2) | |
1153 | || is_rre (insn64, op_agr, &r1, &r2)) | |
1154 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); | |
1155 | ||
1156 | /* A r1, d2(x2, b2) -- add. */ | |
1157 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ | |
1158 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ | |
1159 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) | |
1160 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) | |
1161 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) | |
1162 | data->gpr[r1] = pv_add (data->gpr[r1], | |
1163 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1164 | ||
1165 | /* SLFI r1, i2 --- subtract logical immediate. */ | |
1166 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ | |
1167 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) | |
1168 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) | |
1169 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1170 | -((CORE_ADDR)i2 & 0xffffffff)); | |
1171 | ||
1172 | /* SR r1, r2 -- subtract register. */ | |
1173 | /* SGR r1, r2 -- subtract register (64-bit version). */ | |
1174 | else if (is_rr (insn32, op_sr, &r1, &r2) | |
1175 | || is_rre (insn64, op_sgr, &r1, &r2)) | |
1176 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); | |
1177 | ||
1178 | /* S r1, d2(x2, b2) -- subtract. */ | |
1179 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ | |
1180 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ | |
1181 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) | |
1182 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) | |
1183 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) | |
1184 | data->gpr[r1] = pv_subtract (data->gpr[r1], | |
1185 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1186 | ||
1187 | /* LA r1, d2(x2, b2) --- load address. */ | |
1188 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ | |
1189 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) | |
1190 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) | |
1191 | data->gpr[r1] = s390_addr (data, d2, x2, b2); | |
1192 | ||
1193 | /* LARL r1, i2 --- load address relative long. */ | |
a8c99f38 | 1194 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
3fc46200 | 1195 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
a8c99f38 | 1196 | |
3fc46200 | 1197 | /* BASR r1, 0 --- branch and save. |
a8c99f38 JB |
1198 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
1199 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1200 | && r2 == 0) | |
3fc46200 | 1201 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1202 | |
3fc46200 | 1203 | /* BRAS r1, i2 --- branch relative and save. */ |
a8c99f38 JB |
1204 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
1205 | { | |
3fc46200 | 1206 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1207 | next_pc = pc + i2 * 2; |
4bc8c588 | 1208 | |
a8c99f38 JB |
1209 | /* We'd better not interpret any backward branches. We'll |
1210 | never terminate. */ | |
1211 | if (next_pc <= pc) | |
4bc8c588 JB |
1212 | break; |
1213 | } | |
1214 | ||
a8c99f38 JB |
1215 | /* Terminate search when hitting any other branch instruction. */ |
1216 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1217 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) | |
1218 | || is_rr (insn, op_bcr, &r1, &r2) | |
1219 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1220 | || is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1221 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1222 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) | |
1223 | break; | |
1224 | ||
4bc8c588 JB |
1225 | else |
1226 | /* An instruction we don't know how to simulate. The only | |
1227 | safe thing to do would be to set every value we're tracking | |
a8c99f38 JB |
1228 | to 'unknown'. Instead, we'll be optimistic: we assume that |
1229 | we *can* interpret every instruction that the compiler uses | |
1230 | to manipulate any of the data we're interested in here -- | |
1231 | then we can just ignore anything else. */ | |
1232 | ; | |
4bc8c588 JB |
1233 | |
1234 | /* Record the address after the last instruction that changed | |
1235 | the FP, SP, or backlink. Ignore instructions that changed | |
1236 | them back to their original values --- those are probably | |
1237 | restore instructions. (The back chain is never restored, | |
1238 | just popped.) */ | |
1239 | { | |
3fc46200 UW |
1240 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1241 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
4bc8c588 | 1242 | |
3fc46200 UW |
1243 | if ((! pv_is_identical (pre_insn_sp, sp) |
1244 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) | |
1245 | && sp.kind != pvk_unknown) | |
1246 | || (! pv_is_identical (pre_insn_fp, fp) | |
1247 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) | |
1248 | && fp.kind != pvk_unknown) | |
121d8485 | 1249 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
a8c99f38 | 1250 | result = next_pc; |
4bc8c588 | 1251 | } |
5769d3cd | 1252 | } |
4bc8c588 | 1253 | |
ee1b3323 UW |
1254 | /* Record where all the registers were saved. */ |
1255 | pv_area_scan (data->stack, s390_check_for_saved, data); | |
1256 | ||
1257 | free_pv_area (data->stack); | |
1258 | data->stack = NULL; | |
1259 | ||
4bc8c588 | 1260 | return result; |
5769d3cd AC |
1261 | } |
1262 | ||
a8c99f38 JB |
1263 | /* Advance PC across any function entry prologue instructions to reach |
1264 | some "real" code. */ | |
1265 | static CORE_ADDR | |
6093d2eb | 1266 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
a8c99f38 JB |
1267 | { |
1268 | struct s390_prologue_data data; | |
1269 | CORE_ADDR skip_pc; | |
6093d2eb | 1270 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
a8c99f38 JB |
1271 | return skip_pc ? skip_pc : pc; |
1272 | } | |
1273 | ||
d0f54f9d JB |
1274 | /* Return true if we are in the functin's epilogue, i.e. after the |
1275 | instruction that destroyed the function's stack frame. */ | |
1276 | static int | |
1277 | s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1278 | { | |
1279 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
1280 | ||
1281 | /* In frameless functions, there's not frame to destroy and thus | |
1282 | we don't care about the epilogue. | |
1283 | ||
1284 | In functions with frame, the epilogue sequence is a pair of | |
1285 | a LM-type instruction that restores (amongst others) the | |
1286 | return register %r14 and the stack pointer %r15, followed | |
1287 | by a branch 'br %r14' --or equivalent-- that effects the | |
1288 | actual return. | |
1289 | ||
1290 | In that situation, this function needs to return 'true' in | |
1291 | exactly one case: when pc points to that branch instruction. | |
1292 | ||
1293 | Thus we try to disassemble the one instructions immediately | |
1294 | preceeding pc and check whether it is an LM-type instruction | |
1295 | modifying the stack pointer. | |
1296 | ||
1297 | Note that disassembling backwards is not reliable, so there | |
1298 | is a slight chance of false positives here ... */ | |
1299 | ||
1300 | bfd_byte insn[6]; | |
1301 | unsigned int r1, r3, b2; | |
1302 | int d2; | |
1303 | ||
1304 | if (word_size == 4 | |
8defab1a | 1305 | && !target_read_memory (pc - 4, insn, 4) |
d0f54f9d JB |
1306 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
1307 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1308 | return 1; | |
1309 | ||
a8c99f38 | 1310 | if (word_size == 4 |
8defab1a | 1311 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 JB |
1312 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
1313 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1314 | return 1; | |
1315 | ||
d0f54f9d | 1316 | if (word_size == 8 |
8defab1a | 1317 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 | 1318 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
d0f54f9d JB |
1319 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
1320 | return 1; | |
1321 | ||
1322 | return 0; | |
1323 | } | |
5769d3cd | 1324 | |
1db4e8a0 UW |
1325 | /* Displaced stepping. */ |
1326 | ||
1327 | /* Fix up the state of registers and memory after having single-stepped | |
1328 | a displaced instruction. */ | |
1329 | static void | |
1330 | s390_displaced_step_fixup (struct gdbarch *gdbarch, | |
1331 | struct displaced_step_closure *closure, | |
1332 | CORE_ADDR from, CORE_ADDR to, | |
1333 | struct regcache *regs) | |
1334 | { | |
1335 | /* Since we use simple_displaced_step_copy_insn, our closure is a | |
1336 | copy of the instruction. */ | |
1337 | gdb_byte *insn = (gdb_byte *) closure; | |
1338 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
1339 | int insnlen = s390_instrlen[insn[0] >> 6]; | |
1340 | ||
1341 | /* Fields for various kinds of instructions. */ | |
1342 | unsigned int b2, r1, r2, x2, r3; | |
1343 | int i2, d2; | |
1344 | ||
1345 | /* Get current PC and addressing mode bit. */ | |
1346 | CORE_ADDR pc = regcache_read_pc (regs); | |
beaabab2 | 1347 | ULONGEST amode = 0; |
1db4e8a0 UW |
1348 | |
1349 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
1350 | { | |
1351 | regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); | |
1352 | amode &= 0x80000000; | |
1353 | } | |
1354 | ||
1355 | if (debug_displaced) | |
1356 | fprintf_unfiltered (gdb_stdlog, | |
1357 | "displaced: (s390) fixup (%s, %s) pc %s amode 0x%x\n", | |
1358 | paddress (gdbarch, from), paddress (gdbarch, to), | |
1359 | paddress (gdbarch, pc), (int) amode); | |
1360 | ||
1361 | /* Handle absolute branch and save instructions. */ | |
1362 | if (is_rr (insn, op_basr, &r1, &r2) | |
1363 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) | |
1364 | { | |
1365 | /* Recompute saved return address in R1. */ | |
1366 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1367 | amode | (from + insnlen)); | |
1368 | } | |
1369 | ||
1370 | /* Handle absolute branch instructions. */ | |
1371 | else if (is_rr (insn, op_bcr, &r1, &r2) | |
1372 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1373 | || is_rr (insn, op_bctr, &r1, &r2) | |
1374 | || is_rre (insn, op_bctgr, &r1, &r2) | |
1375 | || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) | |
1376 | || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) | |
1377 | || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) | |
1378 | || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) | |
1379 | || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) | |
1380 | || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) | |
1381 | { | |
1382 | /* Update PC iff branch was *not* taken. */ | |
1383 | if (pc == to + insnlen) | |
1384 | regcache_write_pc (regs, from + insnlen); | |
1385 | } | |
1386 | ||
1387 | /* Handle PC-relative branch and save instructions. */ | |
1388 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) | |
1389 | || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) | |
1390 | { | |
1391 | /* Update PC. */ | |
1392 | regcache_write_pc (regs, pc - to + from); | |
1393 | /* Recompute saved return address in R1. */ | |
1394 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1395 | amode | (from + insnlen)); | |
1396 | } | |
1397 | ||
1398 | /* Handle PC-relative branch instructions. */ | |
1399 | else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1400 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1401 | || is_ri (insn, op1_brct, op2_brct, &r1, &i2) | |
1402 | || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2) | |
1403 | || is_rsi (insn, op_brxh, &r1, &r3, &i2) | |
1404 | || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2) | |
1405 | || is_rsi (insn, op_brxle, &r1, &r3, &i2) | |
1406 | || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2)) | |
1407 | { | |
1408 | /* Update PC. */ | |
1409 | regcache_write_pc (regs, pc - to + from); | |
1410 | } | |
1411 | ||
1412 | /* Handle LOAD ADDRESS RELATIVE LONG. */ | |
1413 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) | |
1414 | { | |
1415 | /* Recompute output address in R1. */ | |
1416 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1417 | amode | (from + insnlen + i2*2)); | |
1418 | } | |
1419 | ||
1420 | /* If we executed a breakpoint instruction, point PC right back at it. */ | |
1421 | else if (insn[0] == 0x0 && insn[1] == 0x1) | |
1422 | regcache_write_pc (regs, from); | |
1423 | ||
1424 | /* For any other insn, PC points right after the original instruction. */ | |
1425 | else | |
1426 | regcache_write_pc (regs, from + insnlen); | |
1427 | } | |
a8c99f38 JB |
1428 | |
1429 | /* Normal stack frames. */ | |
1430 | ||
1431 | struct s390_unwind_cache { | |
1432 | ||
1433 | CORE_ADDR func; | |
1434 | CORE_ADDR frame_base; | |
1435 | CORE_ADDR local_base; | |
1436 | ||
1437 | struct trad_frame_saved_reg *saved_regs; | |
1438 | }; | |
1439 | ||
a78f21af | 1440 | static int |
f089c433 | 1441 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1442 | struct s390_unwind_cache *info) |
5769d3cd | 1443 | { |
f089c433 | 1444 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
121d8485 | 1445 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 JB |
1446 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1447 | struct s390_prologue_data data; | |
3fc46200 UW |
1448 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
1449 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; | |
121d8485 UW |
1450 | int i; |
1451 | CORE_ADDR cfa; | |
a8c99f38 JB |
1452 | CORE_ADDR func; |
1453 | CORE_ADDR result; | |
1454 | ULONGEST reg; | |
1455 | CORE_ADDR prev_sp; | |
1456 | int frame_pointer; | |
1457 | int size; | |
edb3359d | 1458 | struct frame_info *next_frame; |
a8c99f38 JB |
1459 | |
1460 | /* Try to find the function start address. If we can't find it, we don't | |
1461 | bother searching for it -- with modern compilers this would be mostly | |
1462 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data | |
1463 | or else a valid backchain ... */ | |
f089c433 | 1464 | func = get_frame_func (this_frame); |
a8c99f38 JB |
1465 | if (!func) |
1466 | return 0; | |
5769d3cd | 1467 | |
a8c99f38 JB |
1468 | /* Try to analyze the prologue. */ |
1469 | result = s390_analyze_prologue (gdbarch, func, | |
f089c433 | 1470 | get_frame_pc (this_frame), &data); |
a8c99f38 | 1471 | if (!result) |
5769d3cd | 1472 | return 0; |
5769d3cd | 1473 | |
a8c99f38 JB |
1474 | /* If this was successful, we should have found the instruction that |
1475 | sets the stack pointer register to the previous value of the stack | |
1476 | pointer minus the frame size. */ | |
3fc46200 | 1477 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
5769d3cd | 1478 | return 0; |
a8c99f38 JB |
1479 | |
1480 | /* A frame size of zero at this point can mean either a real | |
1481 | frameless function, or else a failure to find the prologue. | |
1482 | Perform some sanity checks to verify we really have a | |
1483 | frameless function. */ | |
1484 | if (sp->k == 0) | |
5769d3cd | 1485 | { |
a8c99f38 JB |
1486 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
1487 | size zero. This is only possible if the next frame is a sentinel | |
1488 | frame, a dummy frame, or a signal trampoline frame. */ | |
0e100dab AC |
1489 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
1490 | needed, instead the code should simpliy rely on its | |
1491 | analysis. */ | |
edb3359d DJ |
1492 | next_frame = get_next_frame (this_frame); |
1493 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1494 | next_frame = get_next_frame (next_frame); | |
1495 | if (next_frame | |
f089c433 | 1496 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
5769d3cd | 1497 | return 0; |
5769d3cd | 1498 | |
a8c99f38 JB |
1499 | /* If we really have a frameless function, %r14 must be valid |
1500 | -- in particular, it must point to a different function. */ | |
f089c433 | 1501 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
a8c99f38 JB |
1502 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
1503 | if (get_pc_function_start (reg) == func) | |
5769d3cd | 1504 | { |
a8c99f38 JB |
1505 | /* However, there is one case where it *is* valid for %r14 |
1506 | to point to the same function -- if this is a recursive | |
1507 | call, and we have stopped in the prologue *before* the | |
1508 | stack frame was allocated. | |
1509 | ||
1510 | Recognize this case by looking ahead a bit ... */ | |
5769d3cd | 1511 | |
a8c99f38 | 1512 | struct s390_prologue_data data2; |
3fc46200 | 1513 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
a8c99f38 JB |
1514 | |
1515 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) | |
3fc46200 | 1516 | && pv_is_register (*sp, S390_SP_REGNUM) |
a8c99f38 JB |
1517 | && sp->k != 0)) |
1518 | return 0; | |
5769d3cd | 1519 | } |
5769d3cd | 1520 | } |
5769d3cd AC |
1521 | |
1522 | ||
a8c99f38 JB |
1523 | /* OK, we've found valid prologue data. */ |
1524 | size = -sp->k; | |
5769d3cd | 1525 | |
a8c99f38 JB |
1526 | /* If the frame pointer originally also holds the same value |
1527 | as the stack pointer, we're probably using it. If it holds | |
1528 | some other value -- even a constant offset -- it is most | |
1529 | likely used as temp register. */ | |
3fc46200 | 1530 | if (pv_is_identical (*sp, *fp)) |
a8c99f38 JB |
1531 | frame_pointer = S390_FRAME_REGNUM; |
1532 | else | |
1533 | frame_pointer = S390_SP_REGNUM; | |
1534 | ||
1535 | /* If we've detected a function with stack frame, we'll still have to | |
1536 | treat it as frameless if we're currently within the function epilog | |
c378eb4e | 1537 | code at a point where the frame pointer has already been restored. |
a8c99f38 | 1538 | This can only happen in an innermost frame. */ |
0e100dab AC |
1539 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
1540 | instead the code should simpliy rely on its analysis. */ | |
edb3359d DJ |
1541 | next_frame = get_next_frame (this_frame); |
1542 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1543 | next_frame = get_next_frame (next_frame); | |
f089c433 | 1544 | if (size > 0 |
edb3359d | 1545 | && (next_frame == NULL |
f089c433 | 1546 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
5769d3cd | 1547 | { |
a8c99f38 JB |
1548 | /* See the comment in s390_in_function_epilogue_p on why this is |
1549 | not completely reliable ... */ | |
f089c433 | 1550 | if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) |
5769d3cd | 1551 | { |
a8c99f38 JB |
1552 | memset (&data, 0, sizeof (data)); |
1553 | size = 0; | |
1554 | frame_pointer = S390_SP_REGNUM; | |
5769d3cd | 1555 | } |
5769d3cd | 1556 | } |
5769d3cd | 1557 | |
a8c99f38 JB |
1558 | /* Once we know the frame register and the frame size, we can unwind |
1559 | the current value of the frame register from the next frame, and | |
1560 | add back the frame size to arrive that the previous frame's | |
1561 | stack pointer value. */ | |
f089c433 | 1562 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
121d8485 | 1563 | cfa = prev_sp + 16*word_size + 32; |
5769d3cd | 1564 | |
7803799a UW |
1565 | /* Set up ABI call-saved/call-clobbered registers. */ |
1566 | for (i = 0; i < S390_NUM_REGS; i++) | |
1567 | if (!s390_register_call_saved (gdbarch, i)) | |
1568 | trad_frame_set_unknown (info->saved_regs, i); | |
1569 | ||
1570 | /* CC is always call-clobbered. */ | |
1571 | trad_frame_set_unknown (info->saved_regs, tdep->cc_regnum); | |
1572 | ||
121d8485 UW |
1573 | /* Record the addresses of all register spill slots the prologue parser |
1574 | has recognized. Consider only registers defined as call-saved by the | |
1575 | ABI; for call-clobbered registers the parser may have recognized | |
1576 | spurious stores. */ | |
5769d3cd | 1577 | |
7803799a UW |
1578 | for (i = 0; i < 16; i++) |
1579 | if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) | |
1580 | && data.gpr_slot[i] != 0) | |
121d8485 | 1581 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; |
a8c99f38 | 1582 | |
7803799a UW |
1583 | for (i = 0; i < 16; i++) |
1584 | if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) | |
1585 | && data.fpr_slot[i] != 0) | |
1586 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; | |
a8c99f38 JB |
1587 | |
1588 | /* Function return will set PC to %r14. */ | |
7803799a | 1589 | info->saved_regs[tdep->pc_regnum] = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1590 | |
1591 | /* In frameless functions, we unwind simply by moving the return | |
1592 | address to the PC. However, if we actually stored to the | |
1593 | save area, use that -- we might only think the function frameless | |
1594 | because we're in the middle of the prologue ... */ | |
1595 | if (size == 0 | |
7803799a | 1596 | && !trad_frame_addr_p (info->saved_regs, tdep->pc_regnum)) |
a8c99f38 | 1597 | { |
7803799a | 1598 | info->saved_regs[tdep->pc_regnum].realreg = S390_RETADDR_REGNUM; |
5769d3cd | 1599 | } |
a8c99f38 JB |
1600 | |
1601 | /* Another sanity check: unless this is a frameless function, | |
1602 | we should have found spill slots for SP and PC. | |
1603 | If not, we cannot unwind further -- this happens e.g. in | |
1604 | libc's thread_start routine. */ | |
1605 | if (size > 0) | |
5769d3cd | 1606 | { |
a8c99f38 | 1607 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
7803799a | 1608 | || !trad_frame_addr_p (info->saved_regs, tdep->pc_regnum)) |
a8c99f38 | 1609 | prev_sp = -1; |
5769d3cd | 1610 | } |
a8c99f38 JB |
1611 | |
1612 | /* We use the current value of the frame register as local_base, | |
1613 | and the top of the register save area as frame_base. */ | |
1614 | if (prev_sp != -1) | |
1615 | { | |
1616 | info->frame_base = prev_sp + 16*word_size + 32; | |
1617 | info->local_base = prev_sp - size; | |
1618 | } | |
1619 | ||
1620 | info->func = func; | |
1621 | return 1; | |
5769d3cd AC |
1622 | } |
1623 | ||
a78f21af | 1624 | static void |
f089c433 | 1625 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1626 | struct s390_unwind_cache *info) |
5769d3cd | 1627 | { |
f089c433 | 1628 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1629 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1630 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1631 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1632 | CORE_ADDR backchain; |
1633 | ULONGEST reg; | |
1634 | LONGEST sp; | |
7803799a UW |
1635 | int i; |
1636 | ||
1637 | /* Set up ABI call-saved/call-clobbered registers. */ | |
1638 | for (i = 0; i < S390_NUM_REGS; i++) | |
1639 | if (!s390_register_call_saved (gdbarch, i)) | |
1640 | trad_frame_set_unknown (info->saved_regs, i); | |
1641 | ||
1642 | /* CC is always call-clobbered. */ | |
1643 | trad_frame_set_unknown (info->saved_regs, tdep->cc_regnum); | |
a8c99f38 JB |
1644 | |
1645 | /* Get the backchain. */ | |
f089c433 | 1646 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
e17a4113 | 1647 | backchain = read_memory_unsigned_integer (reg, word_size, byte_order); |
a8c99f38 JB |
1648 | |
1649 | /* A zero backchain terminates the frame chain. As additional | |
1650 | sanity check, let's verify that the spill slot for SP in the | |
1651 | save area pointed to by the backchain in fact links back to | |
1652 | the save area. */ | |
1653 | if (backchain != 0 | |
e17a4113 UW |
1654 | && safe_read_memory_integer (backchain + 15*word_size, |
1655 | word_size, byte_order, &sp) | |
a8c99f38 JB |
1656 | && (CORE_ADDR)sp == backchain) |
1657 | { | |
1658 | /* We don't know which registers were saved, but it will have | |
1659 | to be at least %r14 and %r15. This will allow us to continue | |
1660 | unwinding, but other prev-frame registers may be incorrect ... */ | |
1661 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; | |
1662 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; | |
1663 | ||
1664 | /* Function return will set PC to %r14. */ | |
7803799a UW |
1665 | info->saved_regs[tdep->pc_regnum] |
1666 | = info->saved_regs[S390_RETADDR_REGNUM]; | |
a8c99f38 JB |
1667 | |
1668 | /* We use the current value of the frame register as local_base, | |
1669 | and the top of the register save area as frame_base. */ | |
1670 | info->frame_base = backchain + 16*word_size + 32; | |
1671 | info->local_base = reg; | |
1672 | } | |
1673 | ||
f089c433 | 1674 | info->func = get_frame_pc (this_frame); |
5769d3cd AC |
1675 | } |
1676 | ||
a8c99f38 | 1677 | static struct s390_unwind_cache * |
f089c433 | 1678 | s390_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 JB |
1679 | void **this_prologue_cache) |
1680 | { | |
1681 | struct s390_unwind_cache *info; | |
1682 | if (*this_prologue_cache) | |
1683 | return *this_prologue_cache; | |
1684 | ||
1685 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); | |
1686 | *this_prologue_cache = info; | |
f089c433 | 1687 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1688 | info->func = -1; |
1689 | info->frame_base = -1; | |
1690 | info->local_base = -1; | |
1691 | ||
1692 | /* Try to use prologue analysis to fill the unwind cache. | |
1693 | If this fails, fall back to reading the stack backchain. */ | |
f089c433 UW |
1694 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) |
1695 | s390_backchain_frame_unwind_cache (this_frame, info); | |
a8c99f38 JB |
1696 | |
1697 | return info; | |
1698 | } | |
5769d3cd | 1699 | |
a78f21af | 1700 | static void |
f089c433 | 1701 | s390_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1702 | void **this_prologue_cache, |
1703 | struct frame_id *this_id) | |
5769d3cd | 1704 | { |
a8c99f38 | 1705 | struct s390_unwind_cache *info |
f089c433 | 1706 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
5769d3cd | 1707 | |
a8c99f38 JB |
1708 | if (info->frame_base == -1) |
1709 | return; | |
5769d3cd | 1710 | |
a8c99f38 | 1711 | *this_id = frame_id_build (info->frame_base, info->func); |
5769d3cd AC |
1712 | } |
1713 | ||
f089c433 UW |
1714 | static struct value * |
1715 | s390_frame_prev_register (struct frame_info *this_frame, | |
1716 | void **this_prologue_cache, int regnum) | |
a8c99f38 | 1717 | { |
7803799a UW |
1718 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1719 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
a8c99f38 | 1720 | struct s390_unwind_cache *info |
f089c433 | 1721 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
7803799a UW |
1722 | |
1723 | /* Unwind full GPRs to show at least the lower halves (as the | |
1724 | upper halves are undefined). */ | |
1725 | if (tdep->gpr_full_regnum != -1 | |
1726 | && regnum >= tdep->gpr_full_regnum | |
1727 | && regnum < tdep->gpr_full_regnum + 16) | |
1728 | { | |
1729 | int reg = regnum - tdep->gpr_full_regnum + S390_R0_REGNUM; | |
1730 | struct value *val, *newval; | |
1731 | ||
1732 | val = trad_frame_get_prev_register (this_frame, info->saved_regs, reg); | |
1733 | newval = value_cast (register_type (gdbarch, regnum), val); | |
1734 | if (value_optimized_out (val)) | |
1735 | set_value_optimized_out (newval, 1); | |
1736 | ||
1737 | return newval; | |
1738 | } | |
1739 | ||
f089c433 | 1740 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
1741 | } |
1742 | ||
1743 | static const struct frame_unwind s390_frame_unwind = { | |
1744 | NORMAL_FRAME, | |
1745 | s390_frame_this_id, | |
f089c433 UW |
1746 | s390_frame_prev_register, |
1747 | NULL, | |
1748 | default_frame_sniffer | |
a8c99f38 JB |
1749 | }; |
1750 | ||
5769d3cd | 1751 | |
8e645ae7 AC |
1752 | /* Code stubs and their stack frames. For things like PLTs and NULL |
1753 | function calls (where there is no true frame and the return address | |
1754 | is in the RETADDR register). */ | |
a8c99f38 | 1755 | |
8e645ae7 AC |
1756 | struct s390_stub_unwind_cache |
1757 | { | |
a8c99f38 JB |
1758 | CORE_ADDR frame_base; |
1759 | struct trad_frame_saved_reg *saved_regs; | |
1760 | }; | |
1761 | ||
8e645ae7 | 1762 | static struct s390_stub_unwind_cache * |
f089c433 | 1763 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
8e645ae7 | 1764 | void **this_prologue_cache) |
5769d3cd | 1765 | { |
f089c433 | 1766 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1767 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1768 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
8e645ae7 | 1769 | struct s390_stub_unwind_cache *info; |
a8c99f38 | 1770 | ULONGEST reg; |
5c3cf190 | 1771 | |
a8c99f38 JB |
1772 | if (*this_prologue_cache) |
1773 | return *this_prologue_cache; | |
5c3cf190 | 1774 | |
8e645ae7 | 1775 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
a8c99f38 | 1776 | *this_prologue_cache = info; |
f089c433 | 1777 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1778 | |
1779 | /* The return address is in register %r14. */ | |
7803799a | 1780 | info->saved_regs[tdep->pc_regnum].realreg = S390_RETADDR_REGNUM; |
a8c99f38 JB |
1781 | |
1782 | /* Retrieve stack pointer and determine our frame base. */ | |
f089c433 | 1783 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
a8c99f38 JB |
1784 | info->frame_base = reg + 16*word_size + 32; |
1785 | ||
1786 | return info; | |
5769d3cd AC |
1787 | } |
1788 | ||
a8c99f38 | 1789 | static void |
f089c433 | 1790 | s390_stub_frame_this_id (struct frame_info *this_frame, |
8e645ae7 AC |
1791 | void **this_prologue_cache, |
1792 | struct frame_id *this_id) | |
5769d3cd | 1793 | { |
8e645ae7 | 1794 | struct s390_stub_unwind_cache *info |
f089c433 UW |
1795 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1796 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
a8c99f38 | 1797 | } |
5769d3cd | 1798 | |
f089c433 UW |
1799 | static struct value * |
1800 | s390_stub_frame_prev_register (struct frame_info *this_frame, | |
1801 | void **this_prologue_cache, int regnum) | |
8e645ae7 AC |
1802 | { |
1803 | struct s390_stub_unwind_cache *info | |
f089c433 UW |
1804 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1805 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
1806 | } |
1807 | ||
f089c433 UW |
1808 | static int |
1809 | s390_stub_frame_sniffer (const struct frame_unwind *self, | |
1810 | struct frame_info *this_frame, | |
1811 | void **this_prologue_cache) | |
a8c99f38 | 1812 | { |
93d42b30 | 1813 | CORE_ADDR addr_in_block; |
8e645ae7 AC |
1814 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
1815 | ||
1816 | /* If the current PC points to non-readable memory, we assume we | |
1817 | have trapped due to an invalid function pointer call. We handle | |
1818 | the non-existing current function like a PLT stub. */ | |
f089c433 | 1819 | addr_in_block = get_frame_address_in_block (this_frame); |
93d42b30 | 1820 | if (in_plt_section (addr_in_block, NULL) |
f089c433 UW |
1821 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
1822 | return 1; | |
1823 | return 0; | |
a8c99f38 | 1824 | } |
5769d3cd | 1825 | |
f089c433 UW |
1826 | static const struct frame_unwind s390_stub_frame_unwind = { |
1827 | NORMAL_FRAME, | |
1828 | s390_stub_frame_this_id, | |
1829 | s390_stub_frame_prev_register, | |
1830 | NULL, | |
1831 | s390_stub_frame_sniffer | |
1832 | }; | |
1833 | ||
5769d3cd | 1834 | |
a8c99f38 | 1835 | /* Signal trampoline stack frames. */ |
5769d3cd | 1836 | |
a8c99f38 JB |
1837 | struct s390_sigtramp_unwind_cache { |
1838 | CORE_ADDR frame_base; | |
1839 | struct trad_frame_saved_reg *saved_regs; | |
1840 | }; | |
5769d3cd | 1841 | |
a8c99f38 | 1842 | static struct s390_sigtramp_unwind_cache * |
f089c433 | 1843 | s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1844 | void **this_prologue_cache) |
5769d3cd | 1845 | { |
f089c433 | 1846 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1847 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1848 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1849 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1850 | struct s390_sigtramp_unwind_cache *info; |
1851 | ULONGEST this_sp, prev_sp; | |
7803799a UW |
1852 | CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off; |
1853 | ULONGEST pswm; | |
a8c99f38 JB |
1854 | int i; |
1855 | ||
1856 | if (*this_prologue_cache) | |
1857 | return *this_prologue_cache; | |
5769d3cd | 1858 | |
a8c99f38 JB |
1859 | info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); |
1860 | *this_prologue_cache = info; | |
f089c433 | 1861 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 | 1862 | |
f089c433 UW |
1863 | this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
1864 | next_ra = get_frame_pc (this_frame); | |
a8c99f38 JB |
1865 | next_cfa = this_sp + 16*word_size + 32; |
1866 | ||
1867 | /* New-style RT frame: | |
1868 | retcode + alignment (8 bytes) | |
1869 | siginfo (128 bytes) | |
c378eb4e | 1870 | ucontext (contains sigregs at offset 5 words). */ |
a8c99f38 JB |
1871 | if (next_ra == next_cfa) |
1872 | { | |
f0f63663 | 1873 | sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); |
7803799a UW |
1874 | /* sigregs are followed by uc_sigmask (8 bytes), then by the |
1875 | upper GPR halves if present. */ | |
1876 | sigreg_high_off = 8; | |
a8c99f38 JB |
1877 | } |
1878 | ||
1879 | /* Old-style RT frame and all non-RT frames: | |
1880 | old signal mask (8 bytes) | |
c378eb4e | 1881 | pointer to sigregs. */ |
5769d3cd AC |
1882 | else |
1883 | { | |
e17a4113 UW |
1884 | sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, |
1885 | word_size, byte_order); | |
7803799a UW |
1886 | /* sigregs are followed by signo (4 bytes), then by the |
1887 | upper GPR halves if present. */ | |
1888 | sigreg_high_off = 4; | |
a8c99f38 | 1889 | } |
5769d3cd | 1890 | |
a8c99f38 JB |
1891 | /* The sigregs structure looks like this: |
1892 | long psw_mask; | |
1893 | long psw_addr; | |
1894 | long gprs[16]; | |
1895 | int acrs[16]; | |
1896 | int fpc; | |
1897 | int __pad; | |
1898 | double fprs[16]; */ | |
5769d3cd | 1899 | |
7803799a UW |
1900 | /* PSW mask and address. */ |
1901 | info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr; | |
a8c99f38 | 1902 | sigreg_ptr += word_size; |
7803799a | 1903 | info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr; |
a8c99f38 JB |
1904 | sigreg_ptr += word_size; |
1905 | ||
7803799a UW |
1906 | /* Point PC to PSWA as well. */ |
1907 | info->saved_regs[tdep->pc_regnum] = info->saved_regs[S390_PSWA_REGNUM]; | |
1908 | ||
1909 | /* Extract CC from PSWM. */ | |
1910 | pswm = read_memory_unsigned_integer ( | |
1911 | info->saved_regs[S390_PSWM_REGNUM].addr, | |
1912 | word_size, byte_order); | |
1913 | trad_frame_set_value (info->saved_regs, tdep->cc_regnum, | |
1914 | (pswm >> (8 * word_size - 20)) & 3); | |
1915 | ||
a8c99f38 JB |
1916 | /* Then the GPRs. */ |
1917 | for (i = 0; i < 16; i++) | |
1918 | { | |
1919 | info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; | |
1920 | sigreg_ptr += word_size; | |
1921 | } | |
1922 | ||
1923 | /* Then the ACRs. */ | |
1924 | for (i = 0; i < 16; i++) | |
1925 | { | |
1926 | info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; | |
1927 | sigreg_ptr += 4; | |
5769d3cd | 1928 | } |
5769d3cd | 1929 | |
a8c99f38 JB |
1930 | /* The floating-point control word. */ |
1931 | info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; | |
1932 | sigreg_ptr += 8; | |
5769d3cd | 1933 | |
a8c99f38 JB |
1934 | /* And finally the FPRs. */ |
1935 | for (i = 0; i < 16; i++) | |
1936 | { | |
1937 | info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; | |
1938 | sigreg_ptr += 8; | |
1939 | } | |
1940 | ||
7803799a UW |
1941 | /* If we have them, the GPR upper halves are appended at the end. */ |
1942 | sigreg_ptr += sigreg_high_off; | |
1943 | if (tdep->gpr_full_regnum != -1) | |
1944 | for (i = 0; i < 16; i++) | |
1945 | { | |
1946 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr; | |
1947 | sigreg_ptr += 4; | |
1948 | } | |
1949 | ||
1950 | /* Provide read-only copies of the full registers. */ | |
1951 | if (tdep->gpr_full_regnum != -1) | |
1952 | for (i = 0; i < 16; i++) | |
1953 | { | |
1954 | ULONGEST low, high; | |
1955 | low = read_memory_unsigned_integer ( | |
1956 | info->saved_regs[S390_R0_REGNUM + i].addr, | |
1957 | 4, byte_order); | |
1958 | high = read_memory_unsigned_integer ( | |
1959 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr, | |
1960 | 4, byte_order); | |
1961 | ||
1962 | trad_frame_set_value (info->saved_regs, tdep->gpr_full_regnum + i, | |
1963 | (high << 32) | low); | |
1964 | } | |
1965 | ||
a8c99f38 JB |
1966 | /* Restore the previous frame's SP. */ |
1967 | prev_sp = read_memory_unsigned_integer ( | |
1968 | info->saved_regs[S390_SP_REGNUM].addr, | |
e17a4113 | 1969 | word_size, byte_order); |
5769d3cd | 1970 | |
a8c99f38 JB |
1971 | /* Determine our frame base. */ |
1972 | info->frame_base = prev_sp + 16*word_size + 32; | |
5769d3cd | 1973 | |
a8c99f38 | 1974 | return info; |
5769d3cd AC |
1975 | } |
1976 | ||
a8c99f38 | 1977 | static void |
f089c433 | 1978 | s390_sigtramp_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1979 | void **this_prologue_cache, |
1980 | struct frame_id *this_id) | |
5769d3cd | 1981 | { |
a8c99f38 | 1982 | struct s390_sigtramp_unwind_cache *info |
f089c433 UW |
1983 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
1984 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
5769d3cd AC |
1985 | } |
1986 | ||
f089c433 UW |
1987 | static struct value * |
1988 | s390_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
1989 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
1990 | { |
1991 | struct s390_sigtramp_unwind_cache *info | |
f089c433 UW |
1992 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
1993 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
1994 | } |
1995 | ||
f089c433 UW |
1996 | static int |
1997 | s390_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
1998 | struct frame_info *this_frame, | |
1999 | void **this_prologue_cache) | |
5769d3cd | 2000 | { |
f089c433 | 2001 | CORE_ADDR pc = get_frame_pc (this_frame); |
a8c99f38 | 2002 | bfd_byte sigreturn[2]; |
4c8287ac | 2003 | |
8defab1a | 2004 | if (target_read_memory (pc, sigreturn, 2)) |
f089c433 | 2005 | return 0; |
4c8287ac | 2006 | |
a8c99f38 | 2007 | if (sigreturn[0] != 0x0a /* svc */) |
f089c433 | 2008 | return 0; |
5769d3cd | 2009 | |
a8c99f38 JB |
2010 | if (sigreturn[1] != 119 /* sigreturn */ |
2011 | && sigreturn[1] != 173 /* rt_sigreturn */) | |
f089c433 | 2012 | return 0; |
a8c99f38 | 2013 | |
f089c433 | 2014 | return 1; |
5769d3cd AC |
2015 | } |
2016 | ||
f089c433 UW |
2017 | static const struct frame_unwind s390_sigtramp_frame_unwind = { |
2018 | SIGTRAMP_FRAME, | |
2019 | s390_sigtramp_frame_this_id, | |
2020 | s390_sigtramp_frame_prev_register, | |
2021 | NULL, | |
2022 | s390_sigtramp_frame_sniffer | |
2023 | }; | |
2024 | ||
4c8287ac | 2025 | |
a8c99f38 JB |
2026 | /* Frame base handling. */ |
2027 | ||
2028 | static CORE_ADDR | |
f089c433 | 2029 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
4c8287ac | 2030 | { |
a8c99f38 | 2031 | struct s390_unwind_cache *info |
f089c433 | 2032 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2033 | return info->frame_base; |
2034 | } | |
2035 | ||
2036 | static CORE_ADDR | |
f089c433 | 2037 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
a8c99f38 JB |
2038 | { |
2039 | struct s390_unwind_cache *info | |
f089c433 | 2040 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2041 | return info->local_base; |
2042 | } | |
2043 | ||
2044 | static const struct frame_base s390_frame_base = { | |
2045 | &s390_frame_unwind, | |
2046 | s390_frame_base_address, | |
2047 | s390_local_base_address, | |
2048 | s390_local_base_address | |
2049 | }; | |
2050 | ||
2051 | static CORE_ADDR | |
2052 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2053 | { | |
7803799a | 2054 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2055 | ULONGEST pc; |
7803799a | 2056 | pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); |
a8c99f38 JB |
2057 | return gdbarch_addr_bits_remove (gdbarch, pc); |
2058 | } | |
2059 | ||
2060 | static CORE_ADDR | |
2061 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2062 | { | |
2063 | ULONGEST sp; | |
2064 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); | |
2065 | return gdbarch_addr_bits_remove (gdbarch, sp); | |
4c8287ac JB |
2066 | } |
2067 | ||
2068 | ||
a431654a AC |
2069 | /* DWARF-2 frame support. */ |
2070 | ||
7803799a UW |
2071 | static struct value * |
2072 | s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, | |
2073 | int regnum) | |
2074 | { | |
2075 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
2076 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2077 | int reg = regnum - tdep->gpr_full_regnum; | |
2078 | struct value *val, *newval; | |
2079 | ||
2080 | val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); | |
2081 | newval = value_cast (register_type (gdbarch, regnum), val); | |
2082 | if (value_optimized_out (val)) | |
2083 | set_value_optimized_out (newval, 1); | |
2084 | ||
2085 | return newval; | |
2086 | } | |
2087 | ||
a431654a AC |
2088 | static void |
2089 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
aff37fc1 | 2090 | struct dwarf2_frame_state_reg *reg, |
4a4e5149 | 2091 | struct frame_info *this_frame) |
a431654a AC |
2092 | { |
2093 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2094 | ||
7803799a UW |
2095 | /* Fixed registers are call-saved or call-clobbered |
2096 | depending on the ABI in use. */ | |
2097 | if (regnum >= 0 && regnum < S390_NUM_REGS) | |
a431654a | 2098 | { |
7803799a | 2099 | if (s390_register_call_saved (gdbarch, regnum)) |
a431654a | 2100 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; |
7803799a | 2101 | else |
a431654a | 2102 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
7803799a | 2103 | } |
a431654a | 2104 | |
7803799a UW |
2105 | /* The CC pseudo register is call-clobbered. */ |
2106 | else if (regnum == tdep->cc_regnum) | |
2107 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
a431654a | 2108 | |
7803799a UW |
2109 | /* The PC register unwinds to the return address. */ |
2110 | else if (regnum == tdep->pc_regnum) | |
2111 | reg->how = DWARF2_FRAME_REG_RA; | |
a431654a | 2112 | |
7803799a UW |
2113 | /* We install a special function to unwind full GPRs to show at |
2114 | least the lower halves (as the upper halves are undefined). */ | |
2115 | else if (tdep->gpr_full_regnum != -1 | |
2116 | && regnum >= tdep->gpr_full_regnum | |
2117 | && regnum < tdep->gpr_full_regnum + 16) | |
2118 | { | |
2119 | reg->how = DWARF2_FRAME_REG_FN; | |
2120 | reg->loc.fn = s390_dwarf2_prev_register; | |
a431654a AC |
2121 | } |
2122 | } | |
2123 | ||
2124 | ||
b0cf273e JB |
2125 | /* Dummy function calls. */ |
2126 | ||
78f8b424 JB |
2127 | /* Return non-zero if TYPE is an integer-like type, zero otherwise. |
2128 | "Integer-like" types are those that should be passed the way | |
2129 | integers are: integers, enums, ranges, characters, and booleans. */ | |
2130 | static int | |
2131 | is_integer_like (struct type *type) | |
2132 | { | |
2133 | enum type_code code = TYPE_CODE (type); | |
2134 | ||
2135 | return (code == TYPE_CODE_INT | |
2136 | || code == TYPE_CODE_ENUM | |
2137 | || code == TYPE_CODE_RANGE | |
2138 | || code == TYPE_CODE_CHAR | |
2139 | || code == TYPE_CODE_BOOL); | |
2140 | } | |
2141 | ||
78f8b424 JB |
2142 | /* Return non-zero if TYPE is a pointer-like type, zero otherwise. |
2143 | "Pointer-like" types are those that should be passed the way | |
2144 | pointers are: pointers and references. */ | |
2145 | static int | |
2146 | is_pointer_like (struct type *type) | |
2147 | { | |
2148 | enum type_code code = TYPE_CODE (type); | |
2149 | ||
2150 | return (code == TYPE_CODE_PTR | |
2151 | || code == TYPE_CODE_REF); | |
2152 | } | |
2153 | ||
2154 | ||
20a940cc JB |
2155 | /* Return non-zero if TYPE is a `float singleton' or `double |
2156 | singleton', zero otherwise. | |
2157 | ||
2158 | A `T singleton' is a struct type with one member, whose type is | |
2159 | either T or a `T singleton'. So, the following are all float | |
2160 | singletons: | |
2161 | ||
2162 | struct { float x }; | |
2163 | struct { struct { float x; } x; }; | |
2164 | struct { struct { struct { float x; } x; } x; }; | |
2165 | ||
2166 | ... and so on. | |
2167 | ||
b0cf273e JB |
2168 | All such structures are passed as if they were floats or doubles, |
2169 | as the (revised) ABI says. */ | |
20a940cc JB |
2170 | static int |
2171 | is_float_singleton (struct type *type) | |
2172 | { | |
b0cf273e JB |
2173 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) |
2174 | { | |
2175 | struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); | |
2176 | CHECK_TYPEDEF (singleton_type); | |
2177 | ||
2178 | return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT | |
a16b8bcd | 2179 | || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT |
b0cf273e JB |
2180 | || is_float_singleton (singleton_type)); |
2181 | } | |
2182 | ||
2183 | return 0; | |
20a940cc JB |
2184 | } |
2185 | ||
2186 | ||
2187 | /* Return non-zero if TYPE is a struct-like type, zero otherwise. | |
2188 | "Struct-like" types are those that should be passed as structs are: | |
2189 | structs and unions. | |
2190 | ||
2191 | As an odd quirk, not mentioned in the ABI, GCC passes float and | |
2192 | double singletons as if they were a plain float, double, etc. (The | |
2193 | corresponding union types are handled normally.) So we exclude | |
2194 | those types here. *shrug* */ | |
2195 | static int | |
2196 | is_struct_like (struct type *type) | |
2197 | { | |
2198 | enum type_code code = TYPE_CODE (type); | |
2199 | ||
2200 | return (code == TYPE_CODE_UNION | |
2201 | || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); | |
2202 | } | |
2203 | ||
2204 | ||
2205 | /* Return non-zero if TYPE is a float-like type, zero otherwise. | |
2206 | "Float-like" types are those that should be passed as | |
2207 | floating-point values are. | |
2208 | ||
2209 | You'd think this would just be floats, doubles, long doubles, etc. | |
2210 | But as an odd quirk, not mentioned in the ABI, GCC passes float and | |
2211 | double singletons as if they were a plain float, double, etc. (The | |
4d819d0e | 2212 | corresponding union types are handled normally.) So we include |
20a940cc JB |
2213 | those types here. *shrug* */ |
2214 | static int | |
2215 | is_float_like (struct type *type) | |
2216 | { | |
2217 | return (TYPE_CODE (type) == TYPE_CODE_FLT | |
a16b8bcd | 2218 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
20a940cc JB |
2219 | || is_float_singleton (type)); |
2220 | } | |
2221 | ||
2222 | ||
78f8b424 | 2223 | static int |
b0cf273e | 2224 | is_power_of_two (unsigned int n) |
78f8b424 | 2225 | { |
b0cf273e | 2226 | return ((n & (n - 1)) == 0); |
78f8b424 JB |
2227 | } |
2228 | ||
b0cf273e JB |
2229 | /* Return non-zero if TYPE should be passed as a pointer to a copy, |
2230 | zero otherwise. */ | |
4d819d0e | 2231 | static int |
b0cf273e | 2232 | s390_function_arg_pass_by_reference (struct type *type) |
4d819d0e JB |
2233 | { |
2234 | unsigned length = TYPE_LENGTH (type); | |
b0cf273e JB |
2235 | if (length > 8) |
2236 | return 1; | |
4d819d0e | 2237 | |
b0cf273e JB |
2238 | /* FIXME: All complex and vector types are also returned by reference. */ |
2239 | return is_struct_like (type) && !is_power_of_two (length); | |
4d819d0e JB |
2240 | } |
2241 | ||
b0cf273e JB |
2242 | /* Return non-zero if TYPE should be passed in a float register |
2243 | if possible. */ | |
78f8b424 | 2244 | static int |
b0cf273e | 2245 | s390_function_arg_float (struct type *type) |
78f8b424 | 2246 | { |
78f8b424 | 2247 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
2248 | if (length > 8) |
2249 | return 0; | |
78f8b424 | 2250 | |
b0cf273e | 2251 | return is_float_like (type); |
4d819d0e JB |
2252 | } |
2253 | ||
b0cf273e JB |
2254 | /* Return non-zero if TYPE should be passed in an integer register |
2255 | (or a pair of integer registers) if possible. */ | |
78f8b424 | 2256 | static int |
b0cf273e | 2257 | s390_function_arg_integer (struct type *type) |
78f8b424 | 2258 | { |
78f8b424 | 2259 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
2260 | if (length > 8) |
2261 | return 0; | |
78f8b424 | 2262 | |
b0cf273e JB |
2263 | return is_integer_like (type) |
2264 | || is_pointer_like (type) | |
2265 | || (is_struct_like (type) && is_power_of_two (length)); | |
78f8b424 JB |
2266 | } |
2267 | ||
78f8b424 JB |
2268 | /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full |
2269 | word as required for the ABI. */ | |
2270 | static LONGEST | |
e17a4113 | 2271 | extend_simple_arg (struct gdbarch *gdbarch, struct value *arg) |
78f8b424 | 2272 | { |
e17a4113 | 2273 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
4991999e | 2274 | struct type *type = value_type (arg); |
78f8b424 JB |
2275 | |
2276 | /* Even structs get passed in the least significant bits of the | |
2277 | register / memory word. It's not really right to extract them as | |
2278 | an integer, but it does take care of the extension. */ | |
2279 | if (TYPE_UNSIGNED (type)) | |
0fd88904 | 2280 | return extract_unsigned_integer (value_contents (arg), |
e17a4113 | 2281 | TYPE_LENGTH (type), byte_order); |
78f8b424 | 2282 | else |
0fd88904 | 2283 | return extract_signed_integer (value_contents (arg), |
e17a4113 | 2284 | TYPE_LENGTH (type), byte_order); |
78f8b424 JB |
2285 | } |
2286 | ||
2287 | ||
78f8b424 JB |
2288 | /* Return the alignment required by TYPE. */ |
2289 | static int | |
2290 | alignment_of (struct type *type) | |
2291 | { | |
2292 | int alignment; | |
2293 | ||
2294 | if (is_integer_like (type) | |
2295 | || is_pointer_like (type) | |
a16b8bcd UW |
2296 | || TYPE_CODE (type) == TYPE_CODE_FLT |
2297 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
78f8b424 JB |
2298 | alignment = TYPE_LENGTH (type); |
2299 | else if (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
2300 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
2301 | { | |
2302 | int i; | |
2303 | ||
2304 | alignment = 1; | |
2305 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
2306 | { | |
2307 | int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i)); | |
2308 | ||
2309 | if (field_alignment > alignment) | |
2310 | alignment = field_alignment; | |
2311 | } | |
2312 | } | |
2313 | else | |
2314 | alignment = 1; | |
2315 | ||
2316 | /* Check that everything we ever return is a power of two. Lots of | |
2317 | code doesn't want to deal with aligning things to arbitrary | |
2318 | boundaries. */ | |
2319 | gdb_assert ((alignment & (alignment - 1)) == 0); | |
2320 | ||
2321 | return alignment; | |
2322 | } | |
2323 | ||
2324 | ||
2325 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in | |
ca557f44 AC |
2326 | place to be passed to a function, as specified by the "GNU/Linux |
2327 | for S/390 ELF Application Binary Interface Supplement". | |
78f8b424 JB |
2328 | |
2329 | SP is the current stack pointer. We must put arguments, links, | |
2330 | padding, etc. whereever they belong, and return the new stack | |
2331 | pointer value. | |
2332 | ||
2333 | If STRUCT_RETURN is non-zero, then the function we're calling is | |
2334 | going to return a structure by value; STRUCT_ADDR is the address of | |
2335 | a block we've allocated for it on the stack. | |
2336 | ||
2337 | Our caller has taken care of any type promotions needed to satisfy | |
2338 | prototypes or the old K&R argument-passing rules. */ | |
a78f21af | 2339 | static CORE_ADDR |
7d9b040b | 2340 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
b0cf273e JB |
2341 | struct regcache *regcache, CORE_ADDR bp_addr, |
2342 | int nargs, struct value **args, CORE_ADDR sp, | |
2343 | int struct_return, CORE_ADDR struct_addr) | |
5769d3cd | 2344 | { |
b0cf273e JB |
2345 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
2346 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
e17a4113 | 2347 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
78f8b424 | 2348 | int i; |
5769d3cd | 2349 | |
78f8b424 JB |
2350 | /* If the i'th argument is passed as a reference to a copy, then |
2351 | copy_addr[i] is the address of the copy we made. */ | |
2352 | CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); | |
5769d3cd | 2353 | |
c0cc4c83 | 2354 | /* Reserve space for the reference-to-copy area. */ |
78f8b424 JB |
2355 | for (i = 0; i < nargs; i++) |
2356 | { | |
2357 | struct value *arg = args[i]; | |
4991999e | 2358 | struct type *type = value_type (arg); |
78f8b424 | 2359 | unsigned length = TYPE_LENGTH (type); |
5769d3cd | 2360 | |
b0cf273e | 2361 | if (s390_function_arg_pass_by_reference (type)) |
01c464e9 | 2362 | { |
78f8b424 | 2363 | sp -= length; |
5b03f266 | 2364 | sp = align_down (sp, alignment_of (type)); |
78f8b424 | 2365 | copy_addr[i] = sp; |
01c464e9 | 2366 | } |
5769d3cd | 2367 | } |
5769d3cd | 2368 | |
78f8b424 JB |
2369 | /* Reserve space for the parameter area. As a conservative |
2370 | simplification, we assume that everything will be passed on the | |
b0cf273e JB |
2371 | stack. Since every argument larger than 8 bytes will be |
2372 | passed by reference, we use this simple upper bound. */ | |
2373 | sp -= nargs * 8; | |
78f8b424 | 2374 | |
78f8b424 JB |
2375 | /* After all that, make sure it's still aligned on an eight-byte |
2376 | boundary. */ | |
5b03f266 | 2377 | sp = align_down (sp, 8); |
78f8b424 | 2378 | |
c0cc4c83 UW |
2379 | /* Allocate the standard frame areas: the register save area, the |
2380 | word reserved for the compiler (which seems kind of meaningless), | |
2381 | and the back chain pointer. */ | |
2382 | sp -= 16*word_size + 32; | |
2383 | ||
2384 | /* Now we have the final SP value. Make sure we didn't underflow; | |
2385 | on 31-bit, this would result in addresses with the high bit set, | |
2386 | which causes confusion elsewhere. Note that if we error out | |
2387 | here, stack and registers remain untouched. */ | |
2388 | if (gdbarch_addr_bits_remove (gdbarch, sp) != sp) | |
2389 | error (_("Stack overflow")); | |
2390 | ||
2391 | ||
78f8b424 JB |
2392 | /* Finally, place the actual parameters, working from SP towards |
2393 | higher addresses. The code above is supposed to reserve enough | |
2394 | space for this. */ | |
2395 | { | |
2396 | int fr = 0; | |
2397 | int gr = 2; | |
c0cc4c83 | 2398 | CORE_ADDR starg = sp + 16*word_size + 32; |
78f8b424 | 2399 | |
b0cf273e | 2400 | /* A struct is returned using general register 2. */ |
4d819d0e | 2401 | if (struct_return) |
b0cf273e JB |
2402 | { |
2403 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2404 | struct_addr); | |
2405 | gr++; | |
2406 | } | |
4d819d0e | 2407 | |
78f8b424 JB |
2408 | for (i = 0; i < nargs; i++) |
2409 | { | |
2410 | struct value *arg = args[i]; | |
4991999e | 2411 | struct type *type = value_type (arg); |
b0cf273e JB |
2412 | unsigned length = TYPE_LENGTH (type); |
2413 | ||
2414 | if (s390_function_arg_pass_by_reference (type)) | |
2415 | { | |
c0cc4c83 UW |
2416 | /* Actually copy the argument contents to the stack slot |
2417 | that was reserved above. */ | |
2418 | write_memory (copy_addr[i], value_contents (arg), length); | |
2419 | ||
b0cf273e JB |
2420 | if (gr <= 6) |
2421 | { | |
2422 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2423 | copy_addr[i]); | |
2424 | gr++; | |
2425 | } | |
2426 | else | |
2427 | { | |
e17a4113 UW |
2428 | write_memory_unsigned_integer (starg, word_size, byte_order, |
2429 | copy_addr[i]); | |
b0cf273e JB |
2430 | starg += word_size; |
2431 | } | |
2432 | } | |
2433 | else if (s390_function_arg_float (type)) | |
2434 | { | |
2435 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, | |
2436 | the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ | |
2437 | if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) | |
2438 | { | |
2439 | /* When we store a single-precision value in an FP register, | |
2440 | it occupies the leftmost bits. */ | |
2441 | regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, | |
0fd88904 | 2442 | 0, length, value_contents (arg)); |
b0cf273e JB |
2443 | fr += 2; |
2444 | } | |
2445 | else | |
2446 | { | |
2447 | /* When we store a single-precision value in a stack slot, | |
2448 | it occupies the rightmost bits. */ | |
2449 | starg = align_up (starg + length, word_size); | |
0fd88904 | 2450 | write_memory (starg - length, value_contents (arg), length); |
b0cf273e JB |
2451 | } |
2452 | } | |
2453 | else if (s390_function_arg_integer (type) && length <= word_size) | |
2454 | { | |
2455 | if (gr <= 6) | |
2456 | { | |
2457 | /* Integer arguments are always extended to word size. */ | |
2458 | regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, | |
c378eb4e MS |
2459 | extend_simple_arg (gdbarch, |
2460 | arg)); | |
b0cf273e JB |
2461 | gr++; |
2462 | } | |
2463 | else | |
2464 | { | |
2465 | /* Integer arguments are always extended to word size. */ | |
e17a4113 UW |
2466 | write_memory_signed_integer (starg, word_size, byte_order, |
2467 | extend_simple_arg (gdbarch, arg)); | |
b0cf273e JB |
2468 | starg += word_size; |
2469 | } | |
2470 | } | |
2471 | else if (s390_function_arg_integer (type) && length == 2*word_size) | |
2472 | { | |
2473 | if (gr <= 5) | |
2474 | { | |
2475 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr, | |
0fd88904 | 2476 | value_contents (arg)); |
b0cf273e | 2477 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, |
0fd88904 | 2478 | value_contents (arg) + word_size); |
b0cf273e JB |
2479 | gr += 2; |
2480 | } | |
2481 | else | |
2482 | { | |
2483 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG | |
2484 | in it, then don't go back and use it again later. */ | |
2485 | gr = 7; | |
2486 | ||
0fd88904 | 2487 | write_memory (starg, value_contents (arg), length); |
b0cf273e JB |
2488 | starg += length; |
2489 | } | |
2490 | } | |
2491 | else | |
e2e0b3e5 | 2492 | internal_error (__FILE__, __LINE__, _("unknown argument type")); |
78f8b424 JB |
2493 | } |
2494 | } | |
2495 | ||
b0cf273e JB |
2496 | /* Store return address. */ |
2497 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); | |
2498 | ||
2499 | /* Store updated stack pointer. */ | |
2500 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); | |
78f8b424 | 2501 | |
a8c99f38 | 2502 | /* We need to return the 'stack part' of the frame ID, |
121d8485 UW |
2503 | which is actually the top of the register save area. */ |
2504 | return sp + 16*word_size + 32; | |
5769d3cd AC |
2505 | } |
2506 | ||
f089c433 | 2507 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
b0cf273e JB |
2508 | dummy frame. The frame ID's base needs to match the TOS value |
2509 | returned by push_dummy_call, and the PC match the dummy frame's | |
2510 | breakpoint. */ | |
2511 | static struct frame_id | |
f089c433 | 2512 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
b0cf273e | 2513 | { |
a8c99f38 | 2514 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
f089c433 UW |
2515 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2516 | sp = gdbarch_addr_bits_remove (gdbarch, sp); | |
a8c99f38 | 2517 | |
121d8485 | 2518 | return frame_id_build (sp + 16*word_size + 32, |
f089c433 | 2519 | get_frame_pc (this_frame)); |
b0cf273e | 2520 | } |
c8f9d51c | 2521 | |
4074e13c JB |
2522 | static CORE_ADDR |
2523 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
2524 | { | |
2525 | /* Both the 32- and 64-bit ABI's say that the stack pointer should | |
2526 | always be aligned on an eight-byte boundary. */ | |
2527 | return (addr & -8); | |
2528 | } | |
2529 | ||
2530 | ||
b0cf273e JB |
2531 | /* Function return value access. */ |
2532 | ||
2533 | static enum return_value_convention | |
2534 | s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) | |
c8f9d51c | 2535 | { |
b0cf273e JB |
2536 | int length = TYPE_LENGTH (type); |
2537 | if (length > 8) | |
2538 | return RETURN_VALUE_STRUCT_CONVENTION; | |
2539 | ||
2540 | switch (TYPE_CODE (type)) | |
2541 | { | |
2542 | case TYPE_CODE_STRUCT: | |
2543 | case TYPE_CODE_UNION: | |
2544 | case TYPE_CODE_ARRAY: | |
2545 | return RETURN_VALUE_STRUCT_CONVENTION; | |
c8f9d51c | 2546 | |
b0cf273e JB |
2547 | default: |
2548 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2549 | } | |
c8f9d51c JB |
2550 | } |
2551 | ||
b0cf273e | 2552 | static enum return_value_convention |
c055b101 CV |
2553 | s390_return_value (struct gdbarch *gdbarch, struct type *func_type, |
2554 | struct type *type, struct regcache *regcache, | |
2555 | gdb_byte *out, const gdb_byte *in) | |
5769d3cd | 2556 | { |
e17a4113 | 2557 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
b0cf273e JB |
2558 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
2559 | int length = TYPE_LENGTH (type); | |
2560 | enum return_value_convention rvc = | |
2561 | s390_return_value_convention (gdbarch, type); | |
2562 | if (in) | |
2563 | { | |
2564 | switch (rvc) | |
2565 | { | |
2566 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2567 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2568 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2569 | { |
2570 | /* When we store a single-precision value in an FP register, | |
2571 | it occupies the leftmost bits. */ | |
2572 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, | |
2573 | 0, length, in); | |
2574 | } | |
2575 | else if (length <= word_size) | |
2576 | { | |
2577 | /* Integer arguments are always extended to word size. */ | |
2578 | if (TYPE_UNSIGNED (type)) | |
2579 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, | |
e17a4113 | 2580 | extract_unsigned_integer (in, length, byte_order)); |
b0cf273e JB |
2581 | else |
2582 | regcache_cooked_write_signed (regcache, S390_R2_REGNUM, | |
e17a4113 | 2583 | extract_signed_integer (in, length, byte_order)); |
b0cf273e JB |
2584 | } |
2585 | else if (length == 2*word_size) | |
2586 | { | |
2587 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); | |
43af2100 | 2588 | regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size); |
b0cf273e JB |
2589 | } |
2590 | else | |
e2e0b3e5 | 2591 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e JB |
2592 | break; |
2593 | ||
2594 | case RETURN_VALUE_STRUCT_CONVENTION: | |
8a3fe4f8 | 2595 | error (_("Cannot set function return value.")); |
b0cf273e JB |
2596 | break; |
2597 | } | |
2598 | } | |
2599 | else if (out) | |
2600 | { | |
2601 | switch (rvc) | |
2602 | { | |
2603 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2604 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2605 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2606 | { |
2607 | /* When we store a single-precision value in an FP register, | |
2608 | it occupies the leftmost bits. */ | |
2609 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, | |
2610 | 0, length, out); | |
2611 | } | |
2612 | else if (length <= word_size) | |
2613 | { | |
2614 | /* Integer arguments occupy the rightmost bits. */ | |
2615 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, | |
2616 | word_size - length, length, out); | |
2617 | } | |
2618 | else if (length == 2*word_size) | |
2619 | { | |
2620 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); | |
43af2100 | 2621 | regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size); |
b0cf273e JB |
2622 | } |
2623 | else | |
e2e0b3e5 | 2624 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e | 2625 | break; |
5769d3cd | 2626 | |
b0cf273e | 2627 | case RETURN_VALUE_STRUCT_CONVENTION: |
8a3fe4f8 | 2628 | error (_("Function return value unknown.")); |
b0cf273e JB |
2629 | break; |
2630 | } | |
2631 | } | |
2632 | ||
2633 | return rvc; | |
2634 | } | |
5769d3cd AC |
2635 | |
2636 | ||
a8c99f38 JB |
2637 | /* Breakpoints. */ |
2638 | ||
43af2100 | 2639 | static const gdb_byte * |
c378eb4e MS |
2640 | s390_breakpoint_from_pc (struct gdbarch *gdbarch, |
2641 | CORE_ADDR *pcptr, int *lenptr) | |
5769d3cd | 2642 | { |
43af2100 | 2643 | static const gdb_byte breakpoint[] = { 0x0, 0x1 }; |
5769d3cd AC |
2644 | |
2645 | *lenptr = sizeof (breakpoint); | |
2646 | return breakpoint; | |
2647 | } | |
2648 | ||
5769d3cd | 2649 | |
a8c99f38 | 2650 | /* Address handling. */ |
5769d3cd AC |
2651 | |
2652 | static CORE_ADDR | |
24568a2c | 2653 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
5769d3cd | 2654 | { |
a8c99f38 | 2655 | return addr & 0x7fffffff; |
5769d3cd AC |
2656 | } |
2657 | ||
ffc65945 KB |
2658 | static int |
2659 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) | |
2660 | { | |
2661 | if (byte_size == 4) | |
119ac181 | 2662 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2663 | else |
2664 | return 0; | |
2665 | } | |
2666 | ||
2667 | static const char * | |
2668 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) | |
2669 | { | |
119ac181 | 2670 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
ffc65945 KB |
2671 | return "mode32"; |
2672 | else | |
2673 | return NULL; | |
2674 | } | |
2675 | ||
a78f21af | 2676 | static int |
c378eb4e MS |
2677 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
2678 | const char *name, | |
ffc65945 KB |
2679 | int *type_flags_ptr) |
2680 | { | |
2681 | if (strcmp (name, "mode32") == 0) | |
2682 | { | |
119ac181 | 2683 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2684 | return 1; |
2685 | } | |
2686 | else | |
2687 | return 0; | |
2688 | } | |
2689 | ||
a8c99f38 JB |
2690 | /* Set up gdbarch struct. */ |
2691 | ||
a78f21af | 2692 | static struct gdbarch * |
5769d3cd AC |
2693 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2694 | { | |
7803799a UW |
2695 | const struct target_desc *tdesc = info.target_desc; |
2696 | struct tdesc_arch_data *tdesc_data = NULL; | |
5769d3cd AC |
2697 | struct gdbarch *gdbarch; |
2698 | struct gdbarch_tdep *tdep; | |
7803799a UW |
2699 | int tdep_abi; |
2700 | int have_upper = 0; | |
2701 | int first_pseudo_reg, last_pseudo_reg; | |
2702 | ||
2703 | /* Default ABI and register size. */ | |
2704 | switch (info.bfd_arch_info->mach) | |
2705 | { | |
2706 | case bfd_mach_s390_31: | |
2707 | tdep_abi = ABI_LINUX_S390; | |
2708 | break; | |
2709 | ||
2710 | case bfd_mach_s390_64: | |
2711 | tdep_abi = ABI_LINUX_ZSERIES; | |
2712 | break; | |
2713 | ||
2714 | default: | |
2715 | return NULL; | |
2716 | } | |
2717 | ||
2718 | /* Use default target description if none provided by the target. */ | |
2719 | if (!tdesc_has_registers (tdesc)) | |
2720 | { | |
2721 | if (tdep_abi == ABI_LINUX_S390) | |
2722 | tdesc = tdesc_s390_linux32; | |
2723 | else | |
2724 | tdesc = tdesc_s390x_linux64; | |
2725 | } | |
2726 | ||
2727 | /* Check any target description for validity. */ | |
2728 | if (tdesc_has_registers (tdesc)) | |
2729 | { | |
2730 | static const char *const gprs[] = { | |
2731 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
2732 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
2733 | }; | |
2734 | static const char *const fprs[] = { | |
2735 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
2736 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" | |
2737 | }; | |
2738 | static const char *const acrs[] = { | |
2739 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", | |
2740 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" | |
2741 | }; | |
2742 | static const char *const gprs_lower[] = { | |
2743 | "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", | |
2744 | "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" | |
2745 | }; | |
2746 | static const char *const gprs_upper[] = { | |
2747 | "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", | |
2748 | "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" | |
2749 | }; | |
2750 | const struct tdesc_feature *feature; | |
2751 | int i, valid_p = 1; | |
2752 | ||
2753 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); | |
2754 | if (feature == NULL) | |
2755 | return NULL; | |
2756 | ||
2757 | tdesc_data = tdesc_data_alloc (); | |
2758 | ||
2759 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2760 | S390_PSWM_REGNUM, "pswm"); | |
2761 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2762 | S390_PSWA_REGNUM, "pswa"); | |
2763 | ||
2764 | if (tdesc_unnumbered_register (feature, "r0")) | |
2765 | { | |
2766 | for (i = 0; i < 16; i++) | |
2767 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2768 | S390_R0_REGNUM + i, gprs[i]); | |
2769 | } | |
2770 | else | |
2771 | { | |
2772 | have_upper = 1; | |
2773 | ||
2774 | for (i = 0; i < 16; i++) | |
2775 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2776 | S390_R0_REGNUM + i, | |
2777 | gprs_lower[i]); | |
2778 | for (i = 0; i < 16; i++) | |
2779 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2780 | S390_R0_UPPER_REGNUM + i, | |
2781 | gprs_upper[i]); | |
2782 | } | |
2783 | ||
2784 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); | |
2785 | if (feature == NULL) | |
2786 | { | |
2787 | tdesc_data_cleanup (tdesc_data); | |
2788 | return NULL; | |
2789 | } | |
2790 | ||
2791 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2792 | S390_FPC_REGNUM, "fpc"); | |
2793 | for (i = 0; i < 16; i++) | |
2794 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2795 | S390_F0_REGNUM + i, fprs[i]); | |
5769d3cd | 2796 | |
7803799a UW |
2797 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); |
2798 | if (feature == NULL) | |
2799 | { | |
2800 | tdesc_data_cleanup (tdesc_data); | |
2801 | return NULL; | |
2802 | } | |
2803 | ||
2804 | for (i = 0; i < 16; i++) | |
2805 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2806 | S390_A0_REGNUM + i, acrs[i]); | |
2807 | ||
2808 | if (!valid_p) | |
2809 | { | |
2810 | tdesc_data_cleanup (tdesc_data); | |
2811 | return NULL; | |
2812 | } | |
2813 | } | |
5769d3cd | 2814 | |
7803799a UW |
2815 | /* Find a candidate among extant architectures. */ |
2816 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
2817 | arches != NULL; | |
2818 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
2819 | { | |
2820 | tdep = gdbarch_tdep (arches->gdbarch); | |
2821 | if (!tdep) | |
2822 | continue; | |
2823 | if (tdep->abi != tdep_abi) | |
2824 | continue; | |
2825 | if ((tdep->gpr_full_regnum != -1) != have_upper) | |
2826 | continue; | |
2827 | if (tdesc_data != NULL) | |
2828 | tdesc_data_cleanup (tdesc_data); | |
2829 | return arches->gdbarch; | |
2830 | } | |
5769d3cd | 2831 | |
7803799a | 2832 | /* Otherwise create a new gdbarch for the specified machine type. */ |
d0f54f9d | 2833 | tdep = XCALLOC (1, struct gdbarch_tdep); |
7803799a | 2834 | tdep->abi = tdep_abi; |
d0f54f9d | 2835 | gdbarch = gdbarch_alloc (&info, tdep); |
5769d3cd AC |
2836 | |
2837 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); | |
4e409299 | 2838 | set_gdbarch_char_signed (gdbarch, 0); |
5769d3cd | 2839 | |
1de90795 UW |
2840 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
2841 | We can safely let them default to 128-bit, since the debug info | |
2842 | will give the size of type actually used in each case. */ | |
2843 | set_gdbarch_long_double_bit (gdbarch, 128); | |
2844 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
2845 | ||
aaab4dba | 2846 | /* Amount PC must be decremented by after a breakpoint. This is |
3b3b875c | 2847 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
aaab4dba | 2848 | always. */ |
5769d3cd | 2849 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
5769d3cd AC |
2850 | /* Stack grows downward. */ |
2851 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
5769d3cd AC |
2852 | set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); |
2853 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); | |
d0f54f9d | 2854 | set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); |
a8c99f38 | 2855 | |
7803799a | 2856 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
5769d3cd | 2857 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); |
d0f54f9d | 2858 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
d0f54f9d | 2859 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
d0f54f9d | 2860 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
9acbedc0 | 2861 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
d0f54f9d JB |
2862 | set_gdbarch_regset_from_core_section (gdbarch, |
2863 | s390_regset_from_core_section); | |
7803799a UW |
2864 | set_gdbarch_core_read_description (gdbarch, s390_core_read_description); |
2865 | if (have_upper) | |
2866 | set_gdbarch_core_regset_sections (gdbarch, s390_upper_regset_sections); | |
2867 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); | |
2868 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); | |
2869 | set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); | |
2870 | set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); | |
2871 | set_tdesc_pseudo_register_reggroup_p (gdbarch, | |
2872 | s390_pseudo_register_reggroup_p); | |
2873 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | |
2874 | ||
2875 | /* Assign pseudo register numbers. */ | |
2876 | first_pseudo_reg = gdbarch_num_regs (gdbarch); | |
2877 | last_pseudo_reg = first_pseudo_reg; | |
2878 | tdep->gpr_full_regnum = -1; | |
2879 | if (have_upper) | |
2880 | { | |
2881 | tdep->gpr_full_regnum = last_pseudo_reg; | |
2882 | last_pseudo_reg += 16; | |
2883 | } | |
2884 | tdep->pc_regnum = last_pseudo_reg++; | |
2885 | tdep->cc_regnum = last_pseudo_reg++; | |
2886 | set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); | |
2887 | set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); | |
5769d3cd | 2888 | |
b0cf273e JB |
2889 | /* Inferior function calls. */ |
2890 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); | |
f089c433 | 2891 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
4074e13c | 2892 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
b0cf273e | 2893 | set_gdbarch_return_value (gdbarch, s390_return_value); |
5769d3cd | 2894 | |
a8c99f38 | 2895 | /* Frame handling. */ |
a431654a | 2896 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
7803799a | 2897 | dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); |
f089c433 | 2898 | dwarf2_append_unwinders (gdbarch); |
a431654a | 2899 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
f089c433 UW |
2900 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
2901 | frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); | |
2902 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); | |
a8c99f38 JB |
2903 | frame_base_set_default (gdbarch, &s390_frame_base); |
2904 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); | |
2905 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); | |
2906 | ||
1db4e8a0 UW |
2907 | /* Displaced stepping. */ |
2908 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
2909 | simple_displaced_step_copy_insn); | |
2910 | set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); | |
2911 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
2912 | simple_displaced_step_free_closure); | |
2913 | set_gdbarch_displaced_step_location (gdbarch, | |
2914 | displaced_step_at_entry_point); | |
2915 | set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); | |
2916 | ||
70728992 PA |
2917 | /* Note that GNU/Linux is the only OS supported on this |
2918 | platform. */ | |
2919 | linux_init_abi (info, gdbarch); | |
2920 | ||
7803799a | 2921 | switch (tdep->abi) |
5769d3cd | 2922 | { |
7803799a | 2923 | case ABI_LINUX_S390: |
d0f54f9d JB |
2924 | tdep->gregset = &s390_gregset; |
2925 | tdep->sizeof_gregset = s390_sizeof_gregset; | |
2926 | tdep->fpregset = &s390_fpregset; | |
2927 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
2928 | |
2929 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); | |
76a9d10f MK |
2930 | set_solib_svr4_fetch_link_map_offsets |
2931 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); | |
5769d3cd | 2932 | break; |
b0cf273e | 2933 | |
7803799a | 2934 | case ABI_LINUX_ZSERIES: |
d0f54f9d JB |
2935 | tdep->gregset = &s390x_gregset; |
2936 | tdep->sizeof_gregset = s390x_sizeof_gregset; | |
2937 | tdep->fpregset = &s390_fpregset; | |
2938 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
2939 | |
2940 | set_gdbarch_long_bit (gdbarch, 64); | |
2941 | set_gdbarch_long_long_bit (gdbarch, 64); | |
2942 | set_gdbarch_ptr_bit (gdbarch, 64); | |
76a9d10f MK |
2943 | set_solib_svr4_fetch_link_map_offsets |
2944 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
ffc65945 KB |
2945 | set_gdbarch_address_class_type_flags (gdbarch, |
2946 | s390_address_class_type_flags); | |
2947 | set_gdbarch_address_class_type_flags_to_name (gdbarch, | |
2948 | s390_address_class_type_flags_to_name); | |
2949 | set_gdbarch_address_class_name_to_type_flags (gdbarch, | |
2950 | s390_address_class_name_to_type_flags); | |
5769d3cd AC |
2951 | break; |
2952 | } | |
2953 | ||
36482093 AC |
2954 | set_gdbarch_print_insn (gdbarch, print_insn_s390); |
2955 | ||
982e9687 UW |
2956 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
2957 | ||
b2756930 KB |
2958 | /* Enable TLS support. */ |
2959 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
2960 | svr4_fetch_objfile_link_map); | |
2961 | ||
5769d3cd AC |
2962 | return gdbarch; |
2963 | } | |
2964 | ||
2965 | ||
a78f21af AC |
2966 | extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ |
2967 | ||
5769d3cd | 2968 | void |
5ae5f592 | 2969 | _initialize_s390_tdep (void) |
5769d3cd | 2970 | { |
5769d3cd AC |
2971 | /* Hook us into the gdbarch mechanism. */ |
2972 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); | |
7803799a UW |
2973 | |
2974 | /* Initialize the Linux target descriptions. */ | |
2975 | initialize_tdesc_s390_linux32 (); | |
2976 | initialize_tdesc_s390_linux64 (); | |
2977 | initialize_tdesc_s390x_linux64 (); | |
5769d3cd | 2978 | } |