gdb/fortran: Don't include module symbols when searching for types
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
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1/* Target-dependent code for s390.
2
42a4f53d 3 Copyright (C) 2001-2019 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21
22#include "arch-utils.h"
23#include "ax-gdb.h"
24#include "dwarf2-frame.h"
25#include "elf/s390.h"
26#include "elf-bfd.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbarch.h"
30#include "gdbcore.h"
31#include "infrun.h"
32#include "linux-tdep.h"
33#include "objfiles.h"
34#include "osabi.h"
35#include "record-full.h"
36#include "regcache.h"
37#include "reggroups.h"
38#include "s390-tdep.h"
39#include "target-descriptions.h"
40#include "trad-frame.h"
41#include "value.h"
42
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43#include "features/s390-linux32.c"
44#include "features/s390x-linux64.c"
45
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46/* Holds the current set of options to be passed to the disassembler. */
47static char *s390_disassembler_options;
48
49/* Breakpoints. */
50
51constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
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55/* Types. */
56
57/* Implement the gdbarch type alignment method. */
58
59static ULONGEST
60s390_type_align (gdbarch *gdbarch, struct type *t)
61{
62 t = check_typedef (t);
63
64 if (TYPE_LENGTH (t) > 8)
65 {
66 switch (TYPE_CODE (t))
67 {
68 case TYPE_CODE_INT:
69 case TYPE_CODE_RANGE:
70 case TYPE_CODE_FLT:
71 case TYPE_CODE_ENUM:
72 case TYPE_CODE_CHAR:
73 case TYPE_CODE_BOOL:
74 case TYPE_CODE_DECFLOAT:
75 return 8;
76
77 case TYPE_CODE_ARRAY:
78 if (TYPE_VECTOR (t))
79 return 8;
80 break;
81 }
82 }
83 return 0;
84}
85
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86/* Decoding S/390 instructions. */
87
88/* Read a single instruction from address AT. */
89
90static int
91s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
92{
93 static int s390_instrlen[] = { 2, 4, 4, 6 };
94 int instrlen;
95
96 if (target_read_memory (at, &instr[0], 2))
97 return -1;
98 instrlen = s390_instrlen[instr[0] >> 6];
99 if (instrlen > 2)
100 {
101 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
102 return -1;
103 }
104 return instrlen;
105}
106
107/* The functions below are for recognizing and decoding S/390
108 instructions of various formats. Each of them checks whether INSN
109 is an instruction of the given format, with the specified opcodes.
110 If it is, it sets the remaining arguments to the values of the
111 instruction's fields, and returns a non-zero value; otherwise, it
112 returns zero.
113
114 These functions' arguments appear in the order they appear in the
115 instruction, not in the machine-language form. So, opcodes always
116 come first, even though they're sometimes scattered around the
117 instructions. And displacements appear before base and extension
118 registers, as they do in the assembly syntax, not at the end, as
119 they do in the machine language.
120
121 Test for RI instruction format. */
122
123static int
124is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
125{
126 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
127 {
128 *r1 = (insn[1] >> 4) & 0xf;
129 /* i2 is a 16-bit signed quantity. */
130 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
131 return 1;
132 }
133 else
134 return 0;
135}
136
137/* Test for RIL instruction format. See comment on is_ri for details. */
138
139static int
140is_ril (bfd_byte *insn, int op1, int op2,
141 unsigned int *r1, int *i2)
142{
143 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
144 {
145 *r1 = (insn[1] >> 4) & 0xf;
146 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
147 no sign extension is necessary, but we don't want to assume
148 that. */
149 *i2 = (((insn[2] << 24)
150 | (insn[3] << 16)
151 | (insn[4] << 8)
152 | (insn[5])) ^ 0x80000000) - 0x80000000;
153 return 1;
154 }
155 else
156 return 0;
157}
158
159/* Test for RR instruction format. See comment on is_ri for details. */
160
161static int
162is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
163{
164 if (insn[0] == op)
165 {
166 *r1 = (insn[1] >> 4) & 0xf;
167 *r2 = insn[1] & 0xf;
168 return 1;
169 }
170 else
171 return 0;
172}
173
174/* Test for RRE instruction format. See comment on is_ri for details. */
175
176static int
177is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
178{
179 if (((insn[0] << 8) | insn[1]) == op)
180 {
181 /* Yes, insn[3]. insn[2] is unused in RRE format. */
182 *r1 = (insn[3] >> 4) & 0xf;
183 *r2 = insn[3] & 0xf;
184 return 1;
185 }
186 else
187 return 0;
188}
189
190/* Test for RS instruction format. See comment on is_ri for details. */
191
192static int
193is_rs (bfd_byte *insn, int op,
194 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
195{
196 if (insn[0] == op)
197 {
198 *r1 = (insn[1] >> 4) & 0xf;
199 *r3 = insn[1] & 0xf;
200 *b2 = (insn[2] >> 4) & 0xf;
201 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
202 return 1;
203 }
204 else
205 return 0;
206}
207
208/* Test for RSY instruction format. See comment on is_ri for details. */
209
210static int
211is_rsy (bfd_byte *insn, int op1, int op2,
212 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
213{
214 if (insn[0] == op1
215 && insn[5] == op2)
216 {
217 *r1 = (insn[1] >> 4) & 0xf;
218 *r3 = insn[1] & 0xf;
219 *b2 = (insn[2] >> 4) & 0xf;
220 /* The 'long displacement' is a 20-bit signed integer. */
221 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
222 ^ 0x80000) - 0x80000;
223 return 1;
224 }
225 else
226 return 0;
227}
228
229/* Test for RX instruction format. See comment on is_ri for details. */
230
231static int
232is_rx (bfd_byte *insn, int op,
233 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
234{
235 if (insn[0] == op)
236 {
237 *r1 = (insn[1] >> 4) & 0xf;
238 *x2 = insn[1] & 0xf;
239 *b2 = (insn[2] >> 4) & 0xf;
240 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
241 return 1;
242 }
243 else
244 return 0;
245}
246
247/* Test for RXY instruction format. See comment on is_ri for details. */
248
249static int
250is_rxy (bfd_byte *insn, int op1, int op2,
251 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
252{
253 if (insn[0] == op1
254 && insn[5] == op2)
255 {
256 *r1 = (insn[1] >> 4) & 0xf;
257 *x2 = insn[1] & 0xf;
258 *b2 = (insn[2] >> 4) & 0xf;
259 /* The 'long displacement' is a 20-bit signed integer. */
260 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
261 ^ 0x80000) - 0x80000;
262 return 1;
263 }
264 else
265 return 0;
266}
267
268/* A helper for s390_software_single_step, decides if an instruction
269 is a partial-execution instruction that needs to be executed until
270 completion when in record mode. If it is, returns 1 and writes
271 instruction length to a pointer. */
272
273static int
274s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
275{
276 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
277 uint16_t insn;
278
279 insn = read_memory_integer (loc, 2, byte_order);
280
281 switch (insn >> 8)
282 {
283 case 0xa8: /* MVCLE */
284 *len = 4;
285 return 1;
286
287 case 0xeb:
288 {
289 insn = read_memory_integer (loc + 4, 2, byte_order);
290 if ((insn & 0xff) == 0x8e)
291 {
292 /* MVCLU */
293 *len = 6;
294 return 1;
295 }
296 }
297 break;
298 }
299
300 switch (insn)
301 {
302 case 0xb255: /* MVST */
303 case 0xb263: /* CMPSC */
304 case 0xb2a5: /* TRE */
305 case 0xb2a6: /* CU21 */
306 case 0xb2a7: /* CU12 */
307 case 0xb9b0: /* CU14 */
308 case 0xb9b1: /* CU24 */
309 case 0xb9b2: /* CU41 */
310 case 0xb9b3: /* CU42 */
311 case 0xb92a: /* KMF */
312 case 0xb92b: /* KMO */
313 case 0xb92f: /* KMC */
314 case 0xb92d: /* KMCTR */
315 case 0xb92e: /* KM */
316 case 0xb93c: /* PPNO */
317 case 0xb990: /* TRTT */
318 case 0xb991: /* TRTO */
319 case 0xb992: /* TROT */
320 case 0xb993: /* TROO */
321 *len = 4;
322 return 1;
323 }
324
325 return 0;
326}
327
328/* Implement the "software_single_step" gdbarch method, needed to single step
329 through instructions like MVCLE in record mode, to make sure they are
330 executed to completion. Without that, record will save the full length
331 of destination buffer on every iteration, even though the CPU will only
332 process about 4kiB of it each time, leading to O(n**2) memory and time
333 complexity. */
334
335static std::vector<CORE_ADDR>
336s390_software_single_step (struct regcache *regcache)
337{
338 struct gdbarch *gdbarch = regcache->arch ();
339 CORE_ADDR loc = regcache_read_pc (regcache);
340 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
341 int len;
342 uint16_t insn;
343
344 /* Special handling only if recording. */
345 if (!record_full_is_used ())
346 return {};
347
348 /* First, match a partial instruction. */
349 if (!s390_is_partial_instruction (gdbarch, loc, &len))
350 return {};
351
352 loc += len;
353
354 /* Second, look for a branch back to it. */
355 insn = read_memory_integer (loc, 2, byte_order);
356 if (insn != 0xa714) /* BRC with mask 1 */
357 return {};
358
359 insn = read_memory_integer (loc + 2, 2, byte_order);
360 if (insn != (uint16_t) -(len / 2))
361 return {};
362
363 loc += 4;
364
365 /* Found it, step past the whole thing. */
366 return {loc};
367}
368
369/* Displaced stepping. */
370
371/* Return true if INSN is a non-branch RIL-b or RIL-c format
372 instruction. */
373
374static int
375is_non_branch_ril (gdb_byte *insn)
376{
377 gdb_byte op1 = insn[0];
378
379 if (op1 == 0xc4)
380 {
381 gdb_byte op2 = insn[1] & 0x0f;
382
383 switch (op2)
384 {
385 case 0x02: /* llhrl */
386 case 0x04: /* lghrl */
387 case 0x05: /* lhrl */
388 case 0x06: /* llghrl */
389 case 0x07: /* sthrl */
390 case 0x08: /* lgrl */
391 case 0x0b: /* stgrl */
392 case 0x0c: /* lgfrl */
393 case 0x0d: /* lrl */
394 case 0x0e: /* llgfrl */
395 case 0x0f: /* strl */
396 return 1;
397 }
398 }
399 else if (op1 == 0xc6)
400 {
401 gdb_byte op2 = insn[1] & 0x0f;
402
403 switch (op2)
404 {
405 case 0x00: /* exrl */
406 case 0x02: /* pfdrl */
407 case 0x04: /* cghrl */
408 case 0x05: /* chrl */
409 case 0x06: /* clghrl */
410 case 0x07: /* clhrl */
411 case 0x08: /* cgrl */
412 case 0x0a: /* clgrl */
413 case 0x0c: /* cgfrl */
414 case 0x0d: /* crl */
415 case 0x0e: /* clgfrl */
416 case 0x0f: /* clrl */
417 return 1;
418 }
419 }
420
421 return 0;
422}
423
424typedef buf_displaced_step_closure s390_displaced_step_closure;
425
426/* Implementation of gdbarch_displaced_step_copy_insn. */
427
428static struct displaced_step_closure *
429s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
430 CORE_ADDR from, CORE_ADDR to,
431 struct regcache *regs)
432{
433 size_t len = gdbarch_max_insn_length (gdbarch);
434 std::unique_ptr<s390_displaced_step_closure> closure
435 (new s390_displaced_step_closure (len));
436 gdb_byte *buf = closure->buf.data ();
437
438 read_memory (from, buf, len);
439
440 /* Adjust the displacement field of PC-relative RIL instructions,
441 except branches. The latter are handled in the fixup hook. */
442 if (is_non_branch_ril (buf))
443 {
444 LONGEST offset;
445
446 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
447 offset = (from - to + offset * 2) / 2;
448
449 /* If the instruction is too far from the jump pad, punt. This
450 will usually happen with instructions in shared libraries.
451 We could probably support these by rewriting them to be
452 absolute or fully emulating them. */
453 if (offset < INT32_MIN || offset > INT32_MAX)
454 {
455 /* Let the core fall back to stepping over the breakpoint
456 in-line. */
457 if (debug_displaced)
458 {
459 fprintf_unfiltered (gdb_stdlog,
460 "displaced: can't displaced step "
461 "RIL instruction: offset %s out of range\n",
462 plongest (offset));
463 }
464
465 return NULL;
466 }
467
468 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
469 }
470
471 write_memory (to, buf, len);
472
473 if (debug_displaced)
474 {
475 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
476 paddress (gdbarch, from), paddress (gdbarch, to));
477 displaced_step_dump_bytes (gdb_stdlog, buf, len);
478 }
479
480 return closure.release ();
481}
482
483/* Fix up the state of registers and memory after having single-stepped
484 a displaced instruction. */
485
486static void
487s390_displaced_step_fixup (struct gdbarch *gdbarch,
488 struct displaced_step_closure *closure_,
489 CORE_ADDR from, CORE_ADDR to,
490 struct regcache *regs)
491{
492 /* Our closure is a copy of the instruction. */
493 s390_displaced_step_closure *closure
494 = (s390_displaced_step_closure *) closure_;
495 gdb_byte *insn = closure->buf.data ();
496 static int s390_instrlen[] = { 2, 4, 4, 6 };
497 int insnlen = s390_instrlen[insn[0] >> 6];
498
499 /* Fields for various kinds of instructions. */
500 unsigned int b2, r1, r2, x2, r3;
501 int i2, d2;
502
503 /* Get current PC and addressing mode bit. */
504 CORE_ADDR pc = regcache_read_pc (regs);
505 ULONGEST amode = 0;
506
507 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
508 {
509 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
510 amode &= 0x80000000;
511 }
512
513 if (debug_displaced)
514 fprintf_unfiltered (gdb_stdlog,
515 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
516 paddress (gdbarch, from), paddress (gdbarch, to),
517 paddress (gdbarch, pc), insnlen, (int) amode);
518
519 /* Handle absolute branch and save instructions. */
520 if (is_rr (insn, op_basr, &r1, &r2)
521 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
522 {
523 /* Recompute saved return address in R1. */
524 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
525 amode | (from + insnlen));
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526 /* Update PC iff the instruction doesn't actually branch. */
527 if (insn[0] == op_basr && r2 == 0)
528 regcache_write_pc (regs, from + insnlen);
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529 }
530
531 /* Handle absolute branch instructions. */
532 else if (is_rr (insn, op_bcr, &r1, &r2)
533 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
534 || is_rr (insn, op_bctr, &r1, &r2)
535 || is_rre (insn, op_bctgr, &r1, &r2)
536 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
537 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
538 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
539 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
540 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
541 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
542 {
543 /* Update PC iff branch was *not* taken. */
544 if (pc == to + insnlen)
545 regcache_write_pc (regs, from + insnlen);
546 }
547
548 /* Handle PC-relative branch and save instructions. */
549 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
550 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
551 {
552 /* Update PC. */
553 regcache_write_pc (regs, pc - to + from);
554 /* Recompute saved return address in R1. */
555 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
556 amode | (from + insnlen));
557 }
558
559 /* Handle LOAD ADDRESS RELATIVE LONG. */
560 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
561 {
562 /* Update PC. */
563 regcache_write_pc (regs, from + insnlen);
564 /* Recompute output address in R1. */
565 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
566 amode | (from + i2 * 2));
567 }
568
569 /* If we executed a breakpoint instruction, point PC right back at it. */
570 else if (insn[0] == 0x0 && insn[1] == 0x1)
571 regcache_write_pc (regs, from);
572
573 /* For any other insn, adjust PC by negated displacement. PC then
574 points right after the original instruction, except for PC-relative
575 branches, where it points to the adjusted branch target. */
576 else
577 regcache_write_pc (regs, pc - to + from);
578
579 if (debug_displaced)
580 fprintf_unfiltered (gdb_stdlog,
581 "displaced: (s390) pc is now %s\n",
582 paddress (gdbarch, regcache_read_pc (regs)));
583}
584
585/* Implement displaced_step_hw_singlestep gdbarch method. */
586
587static int
588s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
589 struct displaced_step_closure *closure)
590{
591 return 1;
592}
593
594/* Prologue analysis. */
595
596struct s390_prologue_data {
597
598 /* The stack. */
599 struct pv_area *stack;
600
601 /* The size and byte-order of a GPR or FPR. */
602 int gpr_size;
603 int fpr_size;
604 enum bfd_endian byte_order;
605
606 /* The general-purpose registers. */
607 pv_t gpr[S390_NUM_GPRS];
608
609 /* The floating-point registers. */
610 pv_t fpr[S390_NUM_FPRS];
611
612 /* The offset relative to the CFA where the incoming GPR N was saved
613 by the function prologue. 0 if not saved or unknown. */
614 int gpr_slot[S390_NUM_GPRS];
615
616 /* Likewise for FPRs. */
617 int fpr_slot[S390_NUM_FPRS];
618
619 /* Nonzero if the backchain was saved. This is assumed to be the
620 case when the incoming SP is saved at the current SP location. */
621 int back_chain_saved_p;
622};
623
624/* Return the effective address for an X-style instruction, like:
625
626 L R1, D2(X2, B2)
627
628 Here, X2 and B2 are registers, and D2 is a signed 20-bit
629 constant; the effective address is the sum of all three. If either
630 X2 or B2 are zero, then it doesn't contribute to the sum --- this
631 means that r0 can't be used as either X2 or B2. */
632
633static pv_t
634s390_addr (struct s390_prologue_data *data,
635 int d2, unsigned int x2, unsigned int b2)
636{
637 pv_t result;
638
639 result = pv_constant (d2);
640 if (x2)
641 result = pv_add (result, data->gpr[x2]);
642 if (b2)
643 result = pv_add (result, data->gpr[b2]);
644
645 return result;
646}
647
648/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
649
650static void
651s390_store (struct s390_prologue_data *data,
652 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
653 pv_t value)
654{
655 pv_t addr = s390_addr (data, d2, x2, b2);
656 pv_t offset;
657
658 /* Check whether we are storing the backchain. */
659 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
660
661 if (pv_is_constant (offset) && offset.k == 0)
662 if (size == data->gpr_size
663 && pv_is_register_k (value, S390_SP_REGNUM, 0))
664 {
665 data->back_chain_saved_p = 1;
666 return;
667 }
668
669 /* Check whether we are storing a register into the stack. */
670 if (!data->stack->store_would_trash (addr))
671 data->stack->store (addr, size, value);
672
673 /* Note: If this is some store we cannot identify, you might think we
674 should forget our cached values, as any of those might have been hit.
675
676 However, we make the assumption that the register save areas are only
677 ever stored to once in any given function, and we do recognize these
678 stores. Thus every store we cannot recognize does not hit our data. */
679}
680
681/* Do a SIZE-byte load from D2(X2,B2). */
682
683static pv_t
684s390_load (struct s390_prologue_data *data,
685 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
686
687{
688 pv_t addr = s390_addr (data, d2, x2, b2);
689
690 /* If it's a load from an in-line constant pool, then we can
691 simulate that, under the assumption that the code isn't
692 going to change between the time the processor actually
693 executed it creating the current frame, and the time when
694 we're analyzing the code to unwind past that frame. */
695 if (pv_is_constant (addr))
696 {
697 struct target_section *secp;
8b88a78e 698 secp = target_section_by_addr (current_top_target (), addr.k);
d6e58945
PR
699 if (secp != NULL
700 && (bfd_get_section_flags (secp->the_bfd_section->owner,
701 secp->the_bfd_section)
702 & SEC_READONLY))
703 return pv_constant (read_memory_integer (addr.k, size,
704 data->byte_order));
705 }
706
707 /* Check whether we are accessing one of our save slots. */
708 return data->stack->fetch (addr, size);
709}
710
711/* Function for finding saved registers in a 'struct pv_area'; we pass
712 this to pv_area::scan.
713
714 If VALUE is a saved register, ADDR says it was saved at a constant
715 offset from the frame base, and SIZE indicates that the whole
716 register was saved, record its offset in the reg_offset table in
717 PROLOGUE_UNTYPED. */
718
719static void
720s390_check_for_saved (void *data_untyped, pv_t addr,
721 CORE_ADDR size, pv_t value)
722{
723 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
724 int i, offset;
725
726 if (!pv_is_register (addr, S390_SP_REGNUM))
727 return;
728
729 offset = 16 * data->gpr_size + 32 - addr.k;
730
731 /* If we are storing the original value of a register, we want to
732 record the CFA offset. If the same register is stored multiple
733 times, the stack slot with the highest address counts. */
734
735 for (i = 0; i < S390_NUM_GPRS; i++)
736 if (size == data->gpr_size
737 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
738 if (data->gpr_slot[i] == 0
739 || data->gpr_slot[i] > offset)
740 {
741 data->gpr_slot[i] = offset;
742 return;
743 }
744
745 for (i = 0; i < S390_NUM_FPRS; i++)
746 if (size == data->fpr_size
747 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
748 if (data->fpr_slot[i] == 0
749 || data->fpr_slot[i] > offset)
750 {
751 data->fpr_slot[i] = offset;
752 return;
753 }
754}
755
756/* Analyze the prologue of the function starting at START_PC, continuing at
757 most until CURRENT_PC. Initialize DATA to hold all information we find
758 out about the state of the registers and stack slots. Return the address
759 of the instruction after the last one that changed the SP, FP, or back
760 chain; or zero on error. */
761
762static CORE_ADDR
763s390_analyze_prologue (struct gdbarch *gdbarch,
764 CORE_ADDR start_pc,
765 CORE_ADDR current_pc,
766 struct s390_prologue_data *data)
767{
768 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
769
770 /* Our return value:
771 The address of the instruction after the last one that changed
772 the SP, FP, or back chain; zero if we got an error trying to
773 read memory. */
774 CORE_ADDR result = start_pc;
775
776 /* The current PC for our abstract interpretation. */
777 CORE_ADDR pc;
778
779 /* The address of the next instruction after that. */
780 CORE_ADDR next_pc;
781
782 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
783 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
784
785 /* Set up everything's initial value. */
786 {
787 int i;
788
789 /* For the purpose of prologue tracking, we consider the GPR size to
790 be equal to the ABI word size, even if it is actually larger
791 (i.e. when running a 32-bit binary under a 64-bit kernel). */
792 data->gpr_size = word_size;
793 data->fpr_size = 8;
794 data->byte_order = gdbarch_byte_order (gdbarch);
795
796 for (i = 0; i < S390_NUM_GPRS; i++)
797 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
798
799 for (i = 0; i < S390_NUM_FPRS; i++)
800 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
801
802 for (i = 0; i < S390_NUM_GPRS; i++)
803 data->gpr_slot[i] = 0;
804
805 for (i = 0; i < S390_NUM_FPRS; i++)
806 data->fpr_slot[i] = 0;
807
808 data->back_chain_saved_p = 0;
809 }
810
811 /* Start interpreting instructions, until we hit the frame's
812 current PC or the first branch instruction. */
813 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
814 {
815 bfd_byte insn[S390_MAX_INSTR_SIZE];
816 int insn_len = s390_readinstruction (insn, pc);
817
818 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
819 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
820 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
821
822 /* Fields for various kinds of instructions. */
823 unsigned int b2, r1, r2, x2, r3;
824 int i2, d2;
825
826 /* The values of SP and FP before this instruction,
827 for detecting instructions that change them. */
828 pv_t pre_insn_sp, pre_insn_fp;
829 /* Likewise for the flag whether the back chain was saved. */
830 int pre_insn_back_chain_saved_p;
831
832 /* If we got an error trying to read the instruction, report it. */
833 if (insn_len < 0)
834 {
835 result = 0;
836 break;
837 }
838
839 next_pc = pc + insn_len;
840
841 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
842 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
843 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
844
845 /* LHI r1, i2 --- load halfword immediate. */
846 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
847 /* LGFI r1, i2 --- load fullword immediate. */
848 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
849 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
850 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
851 data->gpr[r1] = pv_constant (i2);
852
853 /* LR r1, r2 --- load from register. */
854 /* LGR r1, r2 --- load from register (64-bit version). */
855 else if (is_rr (insn32, op_lr, &r1, &r2)
856 || is_rre (insn64, op_lgr, &r1, &r2))
857 data->gpr[r1] = data->gpr[r2];
858
859 /* L r1, d2(x2, b2) --- load. */
860 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
861 /* LG r1, d2(x2, b2) --- load (64-bit version). */
862 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
863 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
864 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
865 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
866
867 /* ST r1, d2(x2, b2) --- store. */
868 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
869 /* STG r1, d2(x2, b2) --- store (64-bit version). */
870 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
871 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
872 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
873 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
874
875 /* STD r1, d2(x2,b2) --- store floating-point register. */
876 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
877 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
878
879 /* STM r1, r3, d2(b2) --- store multiple. */
880 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
881 version). */
882 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
883 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
884 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
885 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
886 {
887 for (; r1 <= r3; r1++, d2 += data->gpr_size)
888 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
889 }
890
891 /* AHI r1, i2 --- add halfword immediate. */
892 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
893 /* AFI r1, i2 --- add fullword immediate. */
894 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
895 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
896 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
897 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
898 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
899 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
900
901 /* ALFI r1, i2 --- add logical immediate. */
902 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
903 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
904 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
905 data->gpr[r1] = pv_add_constant (data->gpr[r1],
906 (CORE_ADDR)i2 & 0xffffffff);
907
908 /* AR r1, r2 -- add register. */
909 /* AGR r1, r2 -- add register (64-bit version). */
910 else if (is_rr (insn32, op_ar, &r1, &r2)
911 || is_rre (insn64, op_agr, &r1, &r2))
912 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
913
914 /* A r1, d2(x2, b2) -- add. */
915 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
916 /* AG r1, d2(x2, b2) -- add (64-bit version). */
917 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
918 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
919 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
920 data->gpr[r1] = pv_add (data->gpr[r1],
921 s390_load (data, d2, x2, b2, data->gpr_size));
922
923 /* SLFI r1, i2 --- subtract logical immediate. */
924 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
925 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
926 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
927 data->gpr[r1] = pv_add_constant (data->gpr[r1],
928 -((CORE_ADDR)i2 & 0xffffffff));
929
930 /* SR r1, r2 -- subtract register. */
931 /* SGR r1, r2 -- subtract register (64-bit version). */
932 else if (is_rr (insn32, op_sr, &r1, &r2)
933 || is_rre (insn64, op_sgr, &r1, &r2))
934 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
935
936 /* S r1, d2(x2, b2) -- subtract. */
937 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
938 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
939 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
940 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
941 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
942 data->gpr[r1] = pv_subtract (data->gpr[r1],
943 s390_load (data, d2, x2, b2, data->gpr_size));
944
945 /* LA r1, d2(x2, b2) --- load address. */
946 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
947 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
948 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
949 data->gpr[r1] = s390_addr (data, d2, x2, b2);
950
951 /* LARL r1, i2 --- load address relative long. */
952 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
953 data->gpr[r1] = pv_constant (pc + i2 * 2);
954
955 /* BASR r1, 0 --- branch and save.
956 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
957 else if (is_rr (insn, op_basr, &r1, &r2)
958 && r2 == 0)
959 data->gpr[r1] = pv_constant (next_pc);
960
961 /* BRAS r1, i2 --- branch relative and save. */
962 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
963 {
964 data->gpr[r1] = pv_constant (next_pc);
965 next_pc = pc + i2 * 2;
966
967 /* We'd better not interpret any backward branches. We'll
968 never terminate. */
969 if (next_pc <= pc)
970 break;
971 }
972
973 /* BRC/BRCL -- branch relative on condition. Ignore "branch
974 never", branch to following instruction, and "conditional
975 trap" (BRC +2). Otherwise terminate search. */
976 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
977 {
978 if (r1 != 0 && i2 != 1 && i2 != 2)
979 break;
980 }
981 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
982 {
983 if (r1 != 0 && i2 != 3)
984 break;
985 }
986
987 /* Terminate search when hitting any other branch instruction. */
988 else if (is_rr (insn, op_basr, &r1, &r2)
989 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
990 || is_rr (insn, op_bcr, &r1, &r2)
991 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
992 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
993 break;
994
995 else
996 {
997 /* An instruction we don't know how to simulate. The only
998 safe thing to do would be to set every value we're tracking
999 to 'unknown'. Instead, we'll be optimistic: we assume that
1000 we *can* interpret every instruction that the compiler uses
1001 to manipulate any of the data we're interested in here --
1002 then we can just ignore anything else. */
1003 }
1004
1005 /* Record the address after the last instruction that changed
1006 the FP, SP, or backlink. Ignore instructions that changed
1007 them back to their original values --- those are probably
1008 restore instructions. (The back chain is never restored,
1009 just popped.) */
1010 {
1011 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1012 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1013
1014 if ((! pv_is_identical (pre_insn_sp, sp)
1015 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1016 && sp.kind != pvk_unknown)
1017 || (! pv_is_identical (pre_insn_fp, fp)
1018 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1019 && fp.kind != pvk_unknown)
1020 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1021 result = next_pc;
1022 }
1023 }
1024
1025 /* Record where all the registers were saved. */
1026 data->stack->scan (s390_check_for_saved, data);
1027
1028 return result;
1029}
1030
1031/* Advance PC across any function entry prologue instructions to reach
1032 some "real" code. */
1033
1034static CORE_ADDR
1035s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1036{
1037 struct s390_prologue_data data;
1038 CORE_ADDR skip_pc, func_addr;
1039
1040 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1041 {
1042 CORE_ADDR post_prologue_pc
1043 = skip_prologue_using_sal (gdbarch, func_addr);
1044 if (post_prologue_pc != 0)
1045 return std::max (pc, post_prologue_pc);
1046 }
1047
1048 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1049 return skip_pc ? skip_pc : pc;
1050}
1051
1052/* Register handling. */
1053
1054/* ABI call-saved register information. */
1055
1056static int
1057s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1058{
1059 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1060
1061 switch (tdep->abi)
1062 {
1063 case ABI_LINUX_S390:
1064 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1065 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1066 || regnum == S390_A0_REGNUM)
1067 return 1;
1068
1069 break;
1070
1071 case ABI_LINUX_ZSERIES:
1072 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1073 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1074 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1075 return 1;
1076
1077 break;
1078 }
1079
1080 return 0;
1081}
1082
1083/* The "guess_tracepoint_registers" gdbarch method. */
1084
1085static void
1086s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1087 struct regcache *regcache,
1088 CORE_ADDR addr)
1089{
1090 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1091 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1092 gdb_byte *reg = (gdb_byte *) alloca (sz);
1093 ULONGEST pswm, pswa;
1094
1095 /* Set PSWA from the location and a default PSWM (the only part we're
1096 unlikely to get right is the CC). */
1097 if (tdep->abi == ABI_LINUX_S390)
1098 {
1099 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1100 was in 24-bit mode). */
1101 pswa = addr | 0x80000000UL;
1102 pswm = 0x070d0000UL;
1103 }
1104 else
1105 {
1106 pswa = addr;
1107 pswm = 0x0705000180000000ULL;
1108 }
1109
1110 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
73e1c03f 1111 regcache->raw_supply (S390_PSWA_REGNUM, reg);
d6e58945
PR
1112
1113 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
73e1c03f 1114 regcache->raw_supply (S390_PSWM_REGNUM, reg);
d6e58945
PR
1115}
1116
1117/* Return the name of register REGNO. Return the empty string for
1118 registers that shouldn't be visible. */
1119
1120static const char *
1121s390_register_name (struct gdbarch *gdbarch, int regnum)
1122{
1123 if (regnum >= S390_V0_LOWER_REGNUM
1124 && regnum <= S390_V15_LOWER_REGNUM)
1125 return "";
1126 return tdesc_register_name (gdbarch, regnum);
1127}
1128
1129/* DWARF Register Mapping. */
1130
1131static const short s390_dwarf_regmap[] =
1132{
1133 /* 0-15: General Purpose Registers. */
1134 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1135 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1136 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1137 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1138
1139 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1140 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1141 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1142 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1143 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1144
1145 /* 32-47: Control Registers (not mapped). */
1146 -1, -1, -1, -1, -1, -1, -1, -1,
1147 -1, -1, -1, -1, -1, -1, -1, -1,
1148
1149 /* 48-63: Access Registers. */
1150 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1151 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1152 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1153 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1154
1155 /* 64-65: Program Status Word. */
1156 S390_PSWM_REGNUM,
1157 S390_PSWA_REGNUM,
1158
1159 /* 66-67: Reserved. */
1160 -1, -1,
1161
1162 /* 68-83: Vector Registers 16-31. */
1163 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1164 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1165 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1166 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1167
1168 /* End of "official" DWARF registers. The remainder of the map is
1169 for GDB internal use only. */
1170
1171 /* GPR Lower Half Access. */
1172 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1173 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1174 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1175 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1176};
1177
1178enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1179
1180/* Convert DWARF register number REG to the appropriate register
1181 number used by GDB. */
1182
1183static int
1184s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1185{
1186 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1187 int gdb_reg = -1;
1188
1189 /* In a 32-on-64 debug scenario, debug info refers to the full
1190 64-bit GPRs. Note that call frame information still refers to
1191 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1192 special register numbers to access GPRs. */
1193 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1194 return tdep->gpr_full_regnum + reg;
1195
1196 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1197 gdb_reg = s390_dwarf_regmap[reg];
1198
1199 if (tdep->v0_full_regnum == -1)
1200 {
1201 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1202 gdb_reg = -1;
1203 }
1204 else
1205 {
1206 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1207 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1208 }
1209
1210 return gdb_reg;
1211}
1212
1213/* Pseudo registers. */
1214
1215/* Check whether REGNUM indicates a coupled general purpose register.
1216 These pseudo-registers are composed of two adjacent gprs. */
1217
1218static int
1219regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1220{
1221 return (tdep->gpr_full_regnum != -1
1222 && regnum >= tdep->gpr_full_regnum
1223 && regnum <= tdep->gpr_full_regnum + 15);
1224}
1225
1226/* Check whether REGNUM indicates a full vector register (v0-v15).
1227 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1228
1229static int
1230regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1231{
1232 return (tdep->v0_full_regnum != -1
1233 && regnum >= tdep->v0_full_regnum
1234 && regnum <= tdep->v0_full_regnum + 15);
1235}
1236
1237/* 'float' values are stored in the upper half of floating-point
1238 registers, even though we are otherwise a big-endian platform. The
1239 same applies to a 'float' value within a vector. */
1240
1241static struct value *
1242s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1243 int regnum, struct frame_id frame_id)
1244{
1245 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1246 struct value *value = default_value_from_register (gdbarch, type,
1247 regnum, frame_id);
1248 check_typedef (type);
1249
1250 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1251 && TYPE_LENGTH (type) < 8)
1252 || regnum_is_vxr_full (tdep, regnum)
1253 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1254 set_value_offset (value, 0);
1255
1256 return value;
1257}
1258
1259/* Implement pseudo_register_name tdesc method. */
1260
1261static const char *
1262s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1263{
1264 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1265
1266 if (regnum == tdep->pc_regnum)
1267 return "pc";
1268
1269 if (regnum == tdep->cc_regnum)
1270 return "cc";
1271
1272 if (regnum_is_gpr_full (tdep, regnum))
1273 {
1274 static const char *full_name[] = {
1275 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1276 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1277 };
1278 return full_name[regnum - tdep->gpr_full_regnum];
1279 }
1280
1281 if (regnum_is_vxr_full (tdep, regnum))
1282 {
1283 static const char *full_name[] = {
1284 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1285 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1286 };
1287 return full_name[regnum - tdep->v0_full_regnum];
1288 }
1289
1290 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1291}
1292
1293/* Implement pseudo_register_type tdesc method. */
1294
1295static struct type *
1296s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1297{
1298 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1299
1300 if (regnum == tdep->pc_regnum)
1301 return builtin_type (gdbarch)->builtin_func_ptr;
1302
1303 if (regnum == tdep->cc_regnum)
1304 return builtin_type (gdbarch)->builtin_int;
1305
1306 if (regnum_is_gpr_full (tdep, regnum))
1307 return builtin_type (gdbarch)->builtin_uint64;
1308
0667c506 1309 /* For the "concatenated" vector registers use the same type as v16. */
d6e58945 1310 if (regnum_is_vxr_full (tdep, regnum))
0667c506 1311 return tdesc_register_type (gdbarch, S390_V16_REGNUM);
d6e58945
PR
1312
1313 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1314}
1315
1316/* Implement pseudo_register_read gdbarch method. */
1317
1318static enum register_status
849d0ba8 1319s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
d6e58945
PR
1320 int regnum, gdb_byte *buf)
1321{
1322 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1323 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1324 int regsize = register_size (gdbarch, regnum);
1325 ULONGEST val;
1326
1327 if (regnum == tdep->pc_regnum)
1328 {
1329 enum register_status status;
1330
1331 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1332 if (status == REG_VALID)
1333 {
1334 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1335 val &= 0x7fffffff;
1336 store_unsigned_integer (buf, regsize, byte_order, val);
1337 }
1338 return status;
1339 }
1340
1341 if (regnum == tdep->cc_regnum)
1342 {
1343 enum register_status status;
1344
1345 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1346 if (status == REG_VALID)
1347 {
1348 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1349 val = (val >> 12) & 3;
1350 else
1351 val = (val >> 44) & 3;
1352 store_unsigned_integer (buf, regsize, byte_order, val);
1353 }
1354 return status;
1355 }
1356
1357 if (regnum_is_gpr_full (tdep, regnum))
1358 {
1359 enum register_status status;
1360 ULONGEST val_upper;
1361
1362 regnum -= tdep->gpr_full_regnum;
1363
1364 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1365 if (status == REG_VALID)
1366 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1367 &val_upper);
1368 if (status == REG_VALID)
1369 {
1370 val |= val_upper << 32;
1371 store_unsigned_integer (buf, regsize, byte_order, val);
1372 }
1373 return status;
1374 }
1375
1376 if (regnum_is_vxr_full (tdep, regnum))
1377 {
1378 enum register_status status;
1379
1380 regnum -= tdep->v0_full_regnum;
1381
1382 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1383 if (status == REG_VALID)
1384 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1385 return status;
1386 }
1387
1388 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1389}
1390
1391/* Implement pseudo_register_write gdbarch method. */
1392
1393static void
1394s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1395 int regnum, const gdb_byte *buf)
1396{
1397 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1398 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1399 int regsize = register_size (gdbarch, regnum);
1400 ULONGEST val, psw;
1401
1402 if (regnum == tdep->pc_regnum)
1403 {
1404 val = extract_unsigned_integer (buf, regsize, byte_order);
1405 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1406 {
1407 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1408 val = (psw & 0x80000000) | (val & 0x7fffffff);
1409 }
1410 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1411 return;
1412 }
1413
1414 if (regnum == tdep->cc_regnum)
1415 {
1416 val = extract_unsigned_integer (buf, regsize, byte_order);
1417 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1418 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1419 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1420 else
1421 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1422 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1423 return;
1424 }
1425
1426 if (regnum_is_gpr_full (tdep, regnum))
1427 {
1428 regnum -= tdep->gpr_full_regnum;
1429 val = extract_unsigned_integer (buf, regsize, byte_order);
1430 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1431 val & 0xffffffff);
1432 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1433 val >> 32);
1434 return;
1435 }
1436
1437 if (regnum_is_vxr_full (tdep, regnum))
1438 {
1439 regnum -= tdep->v0_full_regnum;
10eaee5f
SM
1440 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1441 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
d6e58945
PR
1442 return;
1443 }
1444
1445 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1446}
1447
1448/* Register groups. */
1449
1450/* Implement pseudo_register_reggroup_p tdesc method. */
1451
1452static int
1453s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1454 struct reggroup *group)
1455{
1456 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1457
1458 /* We usually save/restore the whole PSW, which includes PC and CC.
1459 However, some older gdbservers may not support saving/restoring
1460 the whole PSW yet, and will return an XML register description
1461 excluding those from the save/restore register groups. In those
1462 cases, we still need to explicitly save/restore PC and CC in order
1463 to push or pop frames. Since this doesn't hurt anything if we
1464 already save/restore the whole PSW (it's just redundant), we add
1465 PC and CC at this point unconditionally. */
1466 if (group == save_reggroup || group == restore_reggroup)
1467 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1468
1469 if (group == vector_reggroup)
1470 return regnum_is_vxr_full (tdep, regnum);
1471
1472 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1473 return 0;
1474
1475 return default_register_reggroup_p (gdbarch, regnum, group);
1476}
1477
1478/* The "ax_pseudo_register_collect" gdbarch method. */
1479
1480static int
1481s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1482 struct agent_expr *ax, int regnum)
1483{
1484 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1485 if (regnum == tdep->pc_regnum)
1486 {
1487 ax_reg_mask (ax, S390_PSWA_REGNUM);
1488 }
1489 else if (regnum == tdep->cc_regnum)
1490 {
1491 ax_reg_mask (ax, S390_PSWM_REGNUM);
1492 }
1493 else if (regnum_is_gpr_full (tdep, regnum))
1494 {
1495 regnum -= tdep->gpr_full_regnum;
1496 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1497 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1498 }
1499 else if (regnum_is_vxr_full (tdep, regnum))
1500 {
1501 regnum -= tdep->v0_full_regnum;
1502 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1503 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1504 }
1505 else
1506 {
1507 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1508 }
1509 return 0;
1510}
1511
1512/* The "ax_pseudo_register_push_stack" gdbarch method. */
1513
1514static int
1515s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1516 struct agent_expr *ax, int regnum)
1517{
1518 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1519 if (regnum == tdep->pc_regnum)
1520 {
1521 ax_reg (ax, S390_PSWA_REGNUM);
1522 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1523 {
1524 ax_zero_ext (ax, 31);
1525 }
1526 }
1527 else if (regnum == tdep->cc_regnum)
1528 {
1529 ax_reg (ax, S390_PSWM_REGNUM);
1530 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1531 ax_const_l (ax, 12);
1532 else
1533 ax_const_l (ax, 44);
1534 ax_simple (ax, aop_rsh_unsigned);
1535 ax_zero_ext (ax, 2);
1536 }
1537 else if (regnum_is_gpr_full (tdep, regnum))
1538 {
1539 regnum -= tdep->gpr_full_regnum;
1540 ax_reg (ax, S390_R0_REGNUM + regnum);
1541 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1542 ax_const_l (ax, 32);
1543 ax_simple (ax, aop_lsh);
1544 ax_simple (ax, aop_bit_or);
1545 }
1546 else if (regnum_is_vxr_full (tdep, regnum))
1547 {
1548 /* Too large to stuff on the stack. */
1549 return 1;
1550 }
1551 else
1552 {
1553 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1554 }
1555 return 0;
1556}
1557
1558/* The "gen_return_address" gdbarch method. Since this is supposed to be
1559 just a best-effort method, and we don't really have the means to run
1560 the full unwinder here, just collect the link register. */
1561
1562static void
1563s390_gen_return_address (struct gdbarch *gdbarch,
1564 struct agent_expr *ax, struct axs_value *value,
1565 CORE_ADDR scope)
1566{
1567 value->type = register_type (gdbarch, S390_R14_REGNUM);
1568 value->kind = axs_lvalue_register;
1569 value->u.reg = S390_R14_REGNUM;
1570}
1571
1572/* Address handling. */
1573
1574/* Implement addr_bits_remove gdbarch method.
1575 Only used for ABI_LINUX_S390. */
1576
1577static CORE_ADDR
1578s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1579{
1580 return addr & 0x7fffffff;
1581}
1582
1583/* Implement addr_class_type_flags gdbarch method.
1584 Only used for ABI_LINUX_ZSERIES. */
1585
1586static int
1587s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1588{
1589 if (byte_size == 4)
1590 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1591 else
1592 return 0;
1593}
1594
1595/* Implement addr_class_type_flags_to_name gdbarch method.
1596 Only used for ABI_LINUX_ZSERIES. */
1597
1598static const char *
1599s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1600{
1601 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1602 return "mode32";
1603 else
1604 return NULL;
1605}
1606
1607/* Implement addr_class_name_to_type_flags gdbarch method.
1608 Only used for ABI_LINUX_ZSERIES. */
1609
1610static int
1611s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1612 const char *name,
1613 int *type_flags_ptr)
1614{
1615 if (strcmp (name, "mode32") == 0)
1616 {
1617 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1618 return 1;
1619 }
1620 else
1621 return 0;
1622}
1623
1624/* Inferior function calls. */
1625
1626/* Dummy function calls. */
1627
1628/* Unwrap any single-field structs in TYPE and return the effective
1629 "inner" type. E.g., yield "float" for all these cases:
1630
1631 float x;
1632 struct { float x };
1633 struct { struct { float x; } x; };
1634 struct { struct { struct { float x; } x; } x; };
1635
1636 However, if an inner type is smaller than MIN_SIZE, abort the
1637 unwrapping. */
1638
1639static struct type *
1640s390_effective_inner_type (struct type *type, unsigned int min_size)
1641{
1642 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1643 && TYPE_NFIELDS (type) == 1)
1644 {
1645 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1646
1647 if (TYPE_LENGTH (inner) < min_size)
1648 break;
1649 type = inner;
1650 }
1651
1652 return type;
1653}
1654
1655/* Return non-zero if TYPE should be passed like "float" or
1656 "double". */
1657
1658static int
1659s390_function_arg_float (struct type *type)
1660{
1661 /* Note that long double as well as complex types are intentionally
1662 excluded. */
1663 if (TYPE_LENGTH (type) > 8)
1664 return 0;
1665
1666 /* A struct containing just a float or double is passed like a float
1667 or double. */
1668 type = s390_effective_inner_type (type, 0);
1669
1670 return (TYPE_CODE (type) == TYPE_CODE_FLT
1671 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1672}
1673
1674/* Return non-zero if TYPE should be passed like a vector. */
1675
1676static int
1677s390_function_arg_vector (struct type *type)
1678{
1679 if (TYPE_LENGTH (type) > 16)
1680 return 0;
1681
1682 /* Structs containing just a vector are passed like a vector. */
1683 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1684
1685 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1686}
1687
1688/* Determine whether N is a power of two. */
1689
1690static int
1691is_power_of_two (unsigned int n)
1692{
1693 return n && ((n & (n - 1)) == 0);
1694}
1695
1696/* For an argument whose type is TYPE and which is not passed like a
1697 float or vector, return non-zero if it should be passed like "int"
1698 or "long long". */
1699
1700static int
1701s390_function_arg_integer (struct type *type)
1702{
1703 enum type_code code = TYPE_CODE (type);
1704
1705 if (TYPE_LENGTH (type) > 8)
1706 return 0;
1707
1708 if (code == TYPE_CODE_INT
1709 || code == TYPE_CODE_ENUM
1710 || code == TYPE_CODE_RANGE
1711 || code == TYPE_CODE_CHAR
1712 || code == TYPE_CODE_BOOL
1713 || code == TYPE_CODE_PTR
1714 || TYPE_IS_REFERENCE (type))
1715 return 1;
1716
1717 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1718 && is_power_of_two (TYPE_LENGTH (type)));
1719}
1720
1721/* Argument passing state: Internal data structure passed to helper
1722 routines of s390_push_dummy_call. */
1723
1724struct s390_arg_state
1725 {
1726 /* Register cache, or NULL, if we are in "preparation mode". */
1727 struct regcache *regcache;
1728 /* Next available general/floating-point/vector register for
1729 argument passing. */
1730 int gr, fr, vr;
1731 /* Current pointer to copy area (grows downwards). */
1732 CORE_ADDR copy;
1733 /* Current pointer to parameter area (grows upwards). */
1734 CORE_ADDR argp;
1735 };
1736
1737/* Prepare one argument ARG for a dummy call and update the argument
1738 passing state AS accordingly. If the regcache field in AS is set,
1739 operate in "write mode" and write ARG into the inferior. Otherwise
1740 run "preparation mode" and skip all updates to the inferior. */
1741
1742static void
1743s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1744 struct gdbarch_tdep *tdep, int word_size,
1745 enum bfd_endian byte_order, int is_unnamed)
1746{
1747 struct type *type = check_typedef (value_type (arg));
1748 unsigned int length = TYPE_LENGTH (type);
1749 int write_mode = as->regcache != NULL;
1750
1751 if (s390_function_arg_float (type))
1752 {
1753 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1754 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1755 6. */
1756 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1757 {
1758 /* When we store a single-precision value in an FP register,
1759 it occupies the leftmost bits. */
1760 if (write_mode)
e4c4a59b
SM
1761 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1762 value_contents (arg));
d6e58945
PR
1763 as->fr += 2;
1764 }
1765 else
1766 {
1767 /* When we store a single-precision value in a stack slot,
1768 it occupies the rightmost bits. */
1769 as->argp = align_up (as->argp + length, word_size);
1770 if (write_mode)
1771 write_memory (as->argp - length, value_contents (arg),
1772 length);
1773 }
1774 }
1775 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1776 && s390_function_arg_vector (type))
1777 {
1778 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1779
1780 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1781 {
1782 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1783
1784 if (write_mode)
e4c4a59b
SM
1785 as->regcache->cooked_write_part (regnum, 0, length,
1786 value_contents (arg));
d6e58945
PR
1787 as->vr++;
1788 }
1789 else
1790 {
1791 if (write_mode)
1792 write_memory (as->argp, value_contents (arg), length);
1793 as->argp = align_up (as->argp + length, word_size);
1794 }
1795 }
1796 else if (s390_function_arg_integer (type) && length <= word_size)
1797 {
1798 /* Initialize it just to avoid a GCC false warning. */
1799 ULONGEST val = 0;
1800
1801 if (write_mode)
1802 {
1803 /* Place value in least significant bits of the register or
1804 memory word and sign- or zero-extend to full word size.
1805 This also applies to a struct or union. */
1806 val = TYPE_UNSIGNED (type)
1807 ? extract_unsigned_integer (value_contents (arg),
1808 length, byte_order)
1809 : extract_signed_integer (value_contents (arg),
1810 length, byte_order);
1811 }
1812
1813 if (as->gr <= 6)
1814 {
1815 if (write_mode)
1816 regcache_cooked_write_unsigned (as->regcache,
1817 S390_R0_REGNUM + as->gr,
1818 val);
1819 as->gr++;
1820 }
1821 else
1822 {
1823 if (write_mode)
1824 write_memory_unsigned_integer (as->argp, word_size,
1825 byte_order, val);
1826 as->argp += word_size;
1827 }
1828 }
1829 else if (s390_function_arg_integer (type) && length == 8)
1830 {
1831 if (as->gr <= 5)
1832 {
1833 if (write_mode)
1834 {
b66f5587
SM
1835 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1836 value_contents (arg));
1837 as->regcache->cooked_write (S390_R0_REGNUM + as->gr + 1,
1838 value_contents (arg) + word_size);
d6e58945
PR
1839 }
1840 as->gr += 2;
1841 }
1842 else
1843 {
1844 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1845 in it, then don't go back and use it again later. */
1846 as->gr = 7;
1847
1848 if (write_mode)
1849 write_memory (as->argp, value_contents (arg), length);
1850 as->argp += length;
1851 }
1852 }
1853 else
1854 {
1855 /* This argument type is never passed in registers. Place the
1856 value in the copy area and pass a pointer to it. Use 8-byte
1857 alignment as a conservative assumption. */
1858 as->copy = align_down (as->copy - length, 8);
1859 if (write_mode)
1860 write_memory (as->copy, value_contents (arg), length);
1861
1862 if (as->gr <= 6)
1863 {
1864 if (write_mode)
1865 regcache_cooked_write_unsigned (as->regcache,
1866 S390_R0_REGNUM + as->gr,
1867 as->copy);
1868 as->gr++;
1869 }
1870 else
1871 {
1872 if (write_mode)
1873 write_memory_unsigned_integer (as->argp, word_size,
1874 byte_order, as->copy);
1875 as->argp += word_size;
1876 }
1877 }
1878}
1879
1880/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1881 place to be passed to a function, as specified by the "GNU/Linux
1882 for S/390 ELF Application Binary Interface Supplement".
1883
1884 SP is the current stack pointer. We must put arguments, links,
1885 padding, etc. whereever they belong, and return the new stack
1886 pointer value.
1887
1888 If STRUCT_RETURN is non-zero, then the function we're calling is
1889 going to return a structure by value; STRUCT_ADDR is the address of
1890 a block we've allocated for it on the stack.
1891
1892 Our caller has taken care of any type promotions needed to satisfy
1893 prototypes or the old K&R argument-passing rules. */
1894
1895static CORE_ADDR
1896s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1897 struct regcache *regcache, CORE_ADDR bp_addr,
1898 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
1899 function_call_return_method return_method,
1900 CORE_ADDR struct_addr)
d6e58945
PR
1901{
1902 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1903 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1904 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1905 int i;
1906 struct s390_arg_state arg_state, arg_prep;
1907 CORE_ADDR param_area_start, new_sp;
1908 struct type *ftype = check_typedef (value_type (function));
1909
1910 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1911 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1912
1913 arg_prep.copy = sp;
cf84fa6b 1914 arg_prep.gr = (return_method == return_method_struct) ? 3 : 2;
d6e58945
PR
1915 arg_prep.fr = 0;
1916 arg_prep.vr = 0;
1917 arg_prep.argp = 0;
1918 arg_prep.regcache = NULL;
1919
1920 /* Initialize arg_state for "preparation mode". */
1921 arg_state = arg_prep;
1922
1923 /* Update arg_state.copy with the start of the reference-to-copy area
1924 and arg_state.argp with the size of the parameter area. */
1925 for (i = 0; i < nargs; i++)
1926 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1927 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1928
1929 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1930
1931 /* Allocate the standard frame areas: the register save area, the
1932 word reserved for the compiler, and the back chain pointer. */
1933 new_sp = param_area_start - (16 * word_size + 32);
1934
1935 /* Now we have the final stack pointer. Make sure we didn't
1936 underflow; on 31-bit, this would result in addresses with the
1937 high bit set, which causes confusion elsewhere. Note that if we
1938 error out here, stack and registers remain untouched. */
1939 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1940 error (_("Stack overflow"));
1941
1942 /* Pass the structure return address in general register 2. */
cf84fa6b 1943 if (return_method == return_method_struct)
d6e58945
PR
1944 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1945
1946 /* Initialize arg_state for "write mode". */
1947 arg_state = arg_prep;
1948 arg_state.argp = param_area_start;
1949 arg_state.regcache = regcache;
1950
1951 /* Write all parameters. */
1952 for (i = 0; i < nargs; i++)
1953 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1954 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1955
1956 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1957 if (word_size == 4)
1958 {
1959 ULONGEST pswa;
1960 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1961 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1962 }
1963 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1964
1965 /* Store updated stack pointer. */
1966 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1967
1968 /* We need to return the 'stack part' of the frame ID,
1969 which is actually the top of the register save area. */
1970 return param_area_start;
1971}
1972
1973/* Assuming THIS_FRAME is a dummy, return the frame ID of that
1974 dummy frame. The frame ID's base needs to match the TOS value
1975 returned by push_dummy_call, and the PC match the dummy frame's
1976 breakpoint. */
1977
1978static struct frame_id
1979s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1980{
1981 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1982 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1983 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1984
1985 return frame_id_build (sp + 16*word_size + 32,
1986 get_frame_pc (this_frame));
1987}
1988
1989/* Implement frame_align gdbarch method. */
1990
1991static CORE_ADDR
1992s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1993{
1994 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1995 always be aligned on an eight-byte boundary. */
1996 return (addr & -8);
1997}
1998
1999/* Helper for s390_return_value: Set or retrieve a function return
2000 value if it resides in a register. */
2001
2002static void
2003s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
2004 struct regcache *regcache,
2005 gdb_byte *out, const gdb_byte *in)
2006{
2007 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2008 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2009 int length = TYPE_LENGTH (type);
2010 int code = TYPE_CODE (type);
2011
2012 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
2013 {
2014 /* Float-like value: left-aligned in f0. */
2015 if (in != NULL)
e4c4a59b 2016 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
d6e58945 2017 else
73bb0000 2018 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
d6e58945
PR
2019 }
2020 else if (code == TYPE_CODE_ARRAY)
2021 {
2022 /* Vector: left-aligned in v24. */
2023 if (in != NULL)
e4c4a59b 2024 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
d6e58945 2025 else
73bb0000 2026 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
d6e58945
PR
2027 }
2028 else if (length <= word_size)
2029 {
2030 /* Integer: zero- or sign-extended in r2. */
2031 if (out != NULL)
73bb0000
SM
2032 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2033 out);
d6e58945
PR
2034 else if (TYPE_UNSIGNED (type))
2035 regcache_cooked_write_unsigned
2036 (regcache, S390_R2_REGNUM,
2037 extract_unsigned_integer (in, length, byte_order));
2038 else
2039 regcache_cooked_write_signed
2040 (regcache, S390_R2_REGNUM,
2041 extract_signed_integer (in, length, byte_order));
2042 }
2043 else if (length == 2 * word_size)
2044 {
2045 /* Double word: in r2 and r3. */
2046 if (in != NULL)
2047 {
b66f5587
SM
2048 regcache->cooked_write (S390_R2_REGNUM, in);
2049 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
d6e58945
PR
2050 }
2051 else
2052 {
dca08e1f
SM
2053 regcache->cooked_read (S390_R2_REGNUM, out);
2054 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
d6e58945
PR
2055 }
2056 }
2057 else
2058 internal_error (__FILE__, __LINE__, _("invalid return type"));
2059}
2060
2061/* Implement the 'return_value' gdbarch method. */
2062
2063static enum return_value_convention
2064s390_return_value (struct gdbarch *gdbarch, struct value *function,
2065 struct type *type, struct regcache *regcache,
2066 gdb_byte *out, const gdb_byte *in)
2067{
2068 enum return_value_convention rvc;
2069
2070 type = check_typedef (type);
2071
2072 switch (TYPE_CODE (type))
2073 {
2074 case TYPE_CODE_STRUCT:
2075 case TYPE_CODE_UNION:
2076 case TYPE_CODE_COMPLEX:
2077 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2078 break;
2079 case TYPE_CODE_ARRAY:
2080 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2081 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2082 ? RETURN_VALUE_REGISTER_CONVENTION
2083 : RETURN_VALUE_STRUCT_CONVENTION;
2084 break;
2085 default:
2086 rvc = TYPE_LENGTH (type) <= 8
2087 ? RETURN_VALUE_REGISTER_CONVENTION
2088 : RETURN_VALUE_STRUCT_CONVENTION;
2089 }
2090
2091 if (in != NULL || out != NULL)
2092 {
2093 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2094 s390_register_return_value (gdbarch, type, regcache, out, in);
2095 else if (in != NULL)
2096 error (_("Cannot set function return value."));
2097 else
2098 error (_("Function return value unknown."));
2099 }
2100
2101 return rvc;
2102}
2103
2104/* Frame unwinding. */
2105
2106/* Implmement the stack_frame_destroyed_p gdbarch method. */
2107
2108static int
2109s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2110{
2111 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2112
2113 /* In frameless functions, there's no frame to destroy and thus
2114 we don't care about the epilogue.
2115
2116 In functions with frame, the epilogue sequence is a pair of
2117 a LM-type instruction that restores (amongst others) the
2118 return register %r14 and the stack pointer %r15, followed
2119 by a branch 'br %r14' --or equivalent-- that effects the
2120 actual return.
2121
2122 In that situation, this function needs to return 'true' in
2123 exactly one case: when pc points to that branch instruction.
2124
2125 Thus we try to disassemble the one instructions immediately
2126 preceding pc and check whether it is an LM-type instruction
2127 modifying the stack pointer.
2128
2129 Note that disassembling backwards is not reliable, so there
2130 is a slight chance of false positives here ... */
2131
2132 bfd_byte insn[6];
2133 unsigned int r1, r3, b2;
2134 int d2;
2135
2136 if (word_size == 4
2137 && !target_read_memory (pc - 4, insn, 4)
2138 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2139 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2140 return 1;
2141
2142 if (word_size == 4
2143 && !target_read_memory (pc - 6, insn, 6)
2144 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2145 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2146 return 1;
2147
2148 if (word_size == 8
2149 && !target_read_memory (pc - 6, insn, 6)
2150 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2151 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2152 return 1;
2153
2154 return 0;
2155}
2156
2157/* Implement unwind_pc gdbarch method. */
2158
2159static CORE_ADDR
2160s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2161{
2162 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2163 ULONGEST pc;
2164 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2165 return gdbarch_addr_bits_remove (gdbarch, pc);
2166}
2167
2168/* Implement unwind_sp gdbarch method. */
2169
2170static CORE_ADDR
2171s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2172{
2173 ULONGEST sp;
2174 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2175 return gdbarch_addr_bits_remove (gdbarch, sp);
2176}
2177
2178/* Helper routine to unwind pseudo registers. */
2179
2180static struct value *
2181s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2182{
2183 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2184 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2185 struct type *type = register_type (gdbarch, regnum);
2186
2187 /* Unwind PC via PSW address. */
2188 if (regnum == tdep->pc_regnum)
2189 {
2190 struct value *val;
2191
2192 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2193 if (!value_optimized_out (val))
2194 {
2195 LONGEST pswa = value_as_long (val);
2196
2197 if (TYPE_LENGTH (type) == 4)
2198 return value_from_pointer (type, pswa & 0x7fffffff);
2199 else
2200 return value_from_pointer (type, pswa);
2201 }
2202 }
2203
2204 /* Unwind CC via PSW mask. */
2205 if (regnum == tdep->cc_regnum)
2206 {
2207 struct value *val;
2208
2209 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2210 if (!value_optimized_out (val))
2211 {
2212 LONGEST pswm = value_as_long (val);
2213
2214 if (TYPE_LENGTH (type) == 4)
2215 return value_from_longest (type, (pswm >> 12) & 3);
2216 else
2217 return value_from_longest (type, (pswm >> 44) & 3);
2218 }
2219 }
2220
2221 /* Unwind full GPRs to show at least the lower halves (as the
2222 upper halves are undefined). */
2223 if (regnum_is_gpr_full (tdep, regnum))
2224 {
2225 int reg = regnum - tdep->gpr_full_regnum;
2226 struct value *val;
2227
2228 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2229 if (!value_optimized_out (val))
2230 return value_cast (type, val);
2231 }
2232
2233 return allocate_optimized_out_value (type);
2234}
2235
2236/* Translate a .eh_frame register to DWARF register, or adjust a
2237 .debug_frame register. */
2238
2239static int
2240s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2241{
2242 /* See s390_dwarf_reg_to_regnum for comments. */
2243 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2244}
2245
2246/* DWARF-2 frame unwinding. */
2247
2248/* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2249 s390_dwarf2_frame_init_reg. */
2250
2251static struct value *
2252s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2253 int regnum)
2254{
2255 return s390_unwind_pseudo_register (this_frame, regnum);
2256}
2257
2258/* Implement init_reg dwarf2_frame method. */
2259
2260static void
2261s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2262 struct dwarf2_frame_state_reg *reg,
2263 struct frame_info *this_frame)
2264{
2265 /* The condition code (and thus PSW mask) is call-clobbered. */
2266 if (regnum == S390_PSWM_REGNUM)
2267 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2268
2269 /* The PSW address unwinds to the return address. */
2270 else if (regnum == S390_PSWA_REGNUM)
2271 reg->how = DWARF2_FRAME_REG_RA;
2272
2273 /* Fixed registers are call-saved or call-clobbered
2274 depending on the ABI in use. */
2275 else if (regnum < S390_NUM_REGS)
2276 {
2277 if (s390_register_call_saved (gdbarch, regnum))
2278 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2279 else
2280 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2281 }
2282
2283 /* We install a special function to unwind pseudos. */
2284 else
2285 {
2286 reg->how = DWARF2_FRAME_REG_FN;
2287 reg->loc.fn = s390_dwarf2_prev_register;
2288 }
2289}
2290
2291/* Frame unwinding. */
2292
2293/* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2294 register translation. */
2295
2296struct value *
2297s390_trad_frame_prev_register (struct frame_info *this_frame,
2298 struct trad_frame_saved_reg saved_regs[],
2299 int regnum)
2300{
2301 if (regnum < S390_NUM_REGS)
2302 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2303 else
2304 return s390_unwind_pseudo_register (this_frame, regnum);
2305}
2306
2307/* Normal stack frames. */
2308
2309struct s390_unwind_cache {
2310
2311 CORE_ADDR func;
2312 CORE_ADDR frame_base;
2313 CORE_ADDR local_base;
2314
2315 struct trad_frame_saved_reg *saved_regs;
2316};
2317
2318/* Unwind THIS_FRAME and write the information into unwind cache INFO using
2319 prologue analysis. Helper for s390_frame_unwind_cache. */
2320
2321static int
2322s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2323 struct s390_unwind_cache *info)
2324{
2325 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2326 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2327 struct s390_prologue_data data;
2328 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2329 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2330 int i;
2331 CORE_ADDR cfa;
2332 CORE_ADDR func;
2333 CORE_ADDR result;
2334 ULONGEST reg;
2335 CORE_ADDR prev_sp;
2336 int frame_pointer;
2337 int size;
2338 struct frame_info *next_frame;
2339
2340 /* Try to find the function start address. If we can't find it, we don't
2341 bother searching for it -- with modern compilers this would be mostly
2342 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2343 or else a valid backchain ... */
2344 if (!get_frame_func_if_available (this_frame, &info->func))
2345 {
2346 info->func = -1;
2347 return 0;
2348 }
2349 func = info->func;
2350
2351 /* Try to analyze the prologue. */
2352 result = s390_analyze_prologue (gdbarch, func,
2353 get_frame_pc (this_frame), &data);
2354 if (!result)
2355 return 0;
2356
2357 /* If this was successful, we should have found the instruction that
2358 sets the stack pointer register to the previous value of the stack
2359 pointer minus the frame size. */
2360 if (!pv_is_register (*sp, S390_SP_REGNUM))
2361 return 0;
2362
2363 /* A frame size of zero at this point can mean either a real
2364 frameless function, or else a failure to find the prologue.
2365 Perform some sanity checks to verify we really have a
2366 frameless function. */
2367 if (sp->k == 0)
2368 {
2369 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2370 size zero. This is only possible if the next frame is a sentinel
2371 frame, a dummy frame, or a signal trampoline frame. */
2372 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2373 needed, instead the code should simpliy rely on its
2374 analysis. */
2375 next_frame = get_next_frame (this_frame);
2376 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2377 next_frame = get_next_frame (next_frame);
2378 if (next_frame
2379 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2380 return 0;
2381
2382 /* If we really have a frameless function, %r14 must be valid
2383 -- in particular, it must point to a different function. */
2384 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2385 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2386 if (get_pc_function_start (reg) == func)
2387 {
2388 /* However, there is one case where it *is* valid for %r14
2389 to point to the same function -- if this is a recursive
2390 call, and we have stopped in the prologue *before* the
2391 stack frame was allocated.
2392
2393 Recognize this case by looking ahead a bit ... */
2394
2395 struct s390_prologue_data data2;
b926417a 2396 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
d6e58945
PR
2397
2398 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
b926417a
TT
2399 && pv_is_register (*sp2, S390_SP_REGNUM)
2400 && sp2->k != 0))
d6e58945
PR
2401 return 0;
2402 }
2403 }
2404
2405 /* OK, we've found valid prologue data. */
2406 size = -sp->k;
2407
2408 /* If the frame pointer originally also holds the same value
2409 as the stack pointer, we're probably using it. If it holds
2410 some other value -- even a constant offset -- it is most
2411 likely used as temp register. */
2412 if (pv_is_identical (*sp, *fp))
2413 frame_pointer = S390_FRAME_REGNUM;
2414 else
2415 frame_pointer = S390_SP_REGNUM;
2416
2417 /* If we've detected a function with stack frame, we'll still have to
2418 treat it as frameless if we're currently within the function epilog
2419 code at a point where the frame pointer has already been restored.
2420 This can only happen in an innermost frame. */
2421 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2422 instead the code should simpliy rely on its analysis. */
2423 next_frame = get_next_frame (this_frame);
2424 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2425 next_frame = get_next_frame (next_frame);
2426 if (size > 0
2427 && (next_frame == NULL
2428 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2429 {
2430 /* See the comment in s390_stack_frame_destroyed_p on why this is
2431 not completely reliable ... */
2432 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2433 {
2434 memset (&data, 0, sizeof (data));
2435 size = 0;
2436 frame_pointer = S390_SP_REGNUM;
2437 }
2438 }
2439
2440 /* Once we know the frame register and the frame size, we can unwind
2441 the current value of the frame register from the next frame, and
2442 add back the frame size to arrive that the previous frame's
2443 stack pointer value. */
2444 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2445 cfa = prev_sp + 16*word_size + 32;
2446
2447 /* Set up ABI call-saved/call-clobbered registers. */
2448 for (i = 0; i < S390_NUM_REGS; i++)
2449 if (!s390_register_call_saved (gdbarch, i))
2450 trad_frame_set_unknown (info->saved_regs, i);
2451
2452 /* CC is always call-clobbered. */
2453 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2454
2455 /* Record the addresses of all register spill slots the prologue parser
2456 has recognized. Consider only registers defined as call-saved by the
2457 ABI; for call-clobbered registers the parser may have recognized
2458 spurious stores. */
2459
2460 for (i = 0; i < 16; i++)
2461 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2462 && data.gpr_slot[i] != 0)
2463 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2464
2465 for (i = 0; i < 16; i++)
2466 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2467 && data.fpr_slot[i] != 0)
2468 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2469
2470 /* Function return will set PC to %r14. */
2471 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2472
2473 /* In frameless functions, we unwind simply by moving the return
2474 address to the PC. However, if we actually stored to the
2475 save area, use that -- we might only think the function frameless
2476 because we're in the middle of the prologue ... */
2477 if (size == 0
2478 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2479 {
2480 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2481 }
2482
2483 /* Another sanity check: unless this is a frameless function,
2484 we should have found spill slots for SP and PC.
2485 If not, we cannot unwind further -- this happens e.g. in
2486 libc's thread_start routine. */
2487 if (size > 0)
2488 {
2489 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2490 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2491 prev_sp = -1;
2492 }
2493
2494 /* We use the current value of the frame register as local_base,
2495 and the top of the register save area as frame_base. */
2496 if (prev_sp != -1)
2497 {
2498 info->frame_base = prev_sp + 16*word_size + 32;
2499 info->local_base = prev_sp - size;
2500 }
2501
2502 return 1;
2503}
2504
2505/* Unwind THIS_FRAME and write the information into unwind cache INFO using
2506 back chain unwinding. Helper for s390_frame_unwind_cache. */
2507
2508static void
2509s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2510 struct s390_unwind_cache *info)
2511{
2512 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2513 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2514 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2515 CORE_ADDR backchain;
2516 ULONGEST reg;
2517 LONGEST sp, tmp;
2518 int i;
2519
2520 /* Set up ABI call-saved/call-clobbered registers. */
2521 for (i = 0; i < S390_NUM_REGS; i++)
2522 if (!s390_register_call_saved (gdbarch, i))
2523 trad_frame_set_unknown (info->saved_regs, i);
2524
2525 /* CC is always call-clobbered. */
2526 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2527
2528 /* Get the backchain. */
2529 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2530 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2531 tmp = 0;
2532 backchain = (CORE_ADDR) tmp;
2533
2534 /* A zero backchain terminates the frame chain. As additional
2535 sanity check, let's verify that the spill slot for SP in the
2536 save area pointed to by the backchain in fact links back to
2537 the save area. */
2538 if (backchain != 0
2539 && safe_read_memory_integer (backchain + 15*word_size,
2540 word_size, byte_order, &sp)
2541 && (CORE_ADDR)sp == backchain)
2542 {
2543 /* We don't know which registers were saved, but it will have
2544 to be at least %r14 and %r15. This will allow us to continue
2545 unwinding, but other prev-frame registers may be incorrect ... */
2546 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2547 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2548
2549 /* Function return will set PC to %r14. */
2550 info->saved_regs[S390_PSWA_REGNUM]
2551 = info->saved_regs[S390_RETADDR_REGNUM];
2552
2553 /* We use the current value of the frame register as local_base,
2554 and the top of the register save area as frame_base. */
2555 info->frame_base = backchain + 16*word_size + 32;
2556 info->local_base = reg;
2557 }
2558
2559 info->func = get_frame_pc (this_frame);
2560}
2561
2562/* Unwind THIS_FRAME and return the corresponding unwind cache for
2563 s390_frame_unwind and s390_frame_base. */
2564
2565static struct s390_unwind_cache *
2566s390_frame_unwind_cache (struct frame_info *this_frame,
2567 void **this_prologue_cache)
2568{
2569 struct s390_unwind_cache *info;
2570
2571 if (*this_prologue_cache)
2572 return (struct s390_unwind_cache *) *this_prologue_cache;
2573
2574 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2575 *this_prologue_cache = info;
2576 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2577 info->func = -1;
2578 info->frame_base = -1;
2579 info->local_base = -1;
2580
a70b8144 2581 try
d6e58945
PR
2582 {
2583 /* Try to use prologue analysis to fill the unwind cache.
2584 If this fails, fall back to reading the stack backchain. */
2585 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2586 s390_backchain_frame_unwind_cache (this_frame, info);
2587 }
230d2906 2588 catch (const gdb_exception_error &ex)
d6e58945
PR
2589 {
2590 if (ex.error != NOT_AVAILABLE_ERROR)
eedc3f4f 2591 throw;
d6e58945 2592 }
d6e58945
PR
2593
2594 return info;
2595}
2596
2597/* Implement this_id frame_unwind method for s390_frame_unwind. */
2598
2599static void
2600s390_frame_this_id (struct frame_info *this_frame,
2601 void **this_prologue_cache,
2602 struct frame_id *this_id)
2603{
2604 struct s390_unwind_cache *info
2605 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2606
2607 if (info->frame_base == -1)
2608 {
2609 if (info->func != -1)
2610 *this_id = frame_id_build_unavailable_stack (info->func);
2611 return;
2612 }
2613
2614 *this_id = frame_id_build (info->frame_base, info->func);
2615}
2616
2617/* Implement prev_register frame_unwind method for s390_frame_unwind. */
2618
2619static struct value *
2620s390_frame_prev_register (struct frame_info *this_frame,
2621 void **this_prologue_cache, int regnum)
2622{
2623 struct s390_unwind_cache *info
2624 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2625
2626 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2627}
2628
2629/* Default S390 frame unwinder. */
2630
2631static const struct frame_unwind s390_frame_unwind = {
2632 NORMAL_FRAME,
2633 default_frame_unwind_stop_reason,
2634 s390_frame_this_id,
2635 s390_frame_prev_register,
2636 NULL,
2637 default_frame_sniffer
2638};
2639
2640/* Code stubs and their stack frames. For things like PLTs and NULL
2641 function calls (where there is no true frame and the return address
2642 is in the RETADDR register). */
2643
2644struct s390_stub_unwind_cache
2645{
2646 CORE_ADDR frame_base;
2647 struct trad_frame_saved_reg *saved_regs;
2648};
2649
2650/* Unwind THIS_FRAME and return the corresponding unwind cache for
2651 s390_stub_frame_unwind. */
2652
2653static struct s390_stub_unwind_cache *
2654s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2655 void **this_prologue_cache)
2656{
2657 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2658 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2659 struct s390_stub_unwind_cache *info;
2660 ULONGEST reg;
2661
2662 if (*this_prologue_cache)
2663 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2664
2665 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2666 *this_prologue_cache = info;
2667 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2668
2669 /* The return address is in register %r14. */
2670 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2671
2672 /* Retrieve stack pointer and determine our frame base. */
2673 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2674 info->frame_base = reg + 16*word_size + 32;
2675
2676 return info;
2677}
2678
2679/* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2680
2681static void
2682s390_stub_frame_this_id (struct frame_info *this_frame,
2683 void **this_prologue_cache,
2684 struct frame_id *this_id)
2685{
2686 struct s390_stub_unwind_cache *info
2687 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2688 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2689}
2690
2691/* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2692
2693static struct value *
2694s390_stub_frame_prev_register (struct frame_info *this_frame,
2695 void **this_prologue_cache, int regnum)
2696{
2697 struct s390_stub_unwind_cache *info
2698 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2699 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2700}
2701
2702/* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2703
2704static int
2705s390_stub_frame_sniffer (const struct frame_unwind *self,
2706 struct frame_info *this_frame,
2707 void **this_prologue_cache)
2708{
2709 CORE_ADDR addr_in_block;
2710 bfd_byte insn[S390_MAX_INSTR_SIZE];
2711
2712 /* If the current PC points to non-readable memory, we assume we
2713 have trapped due to an invalid function pointer call. We handle
2714 the non-existing current function like a PLT stub. */
2715 addr_in_block = get_frame_address_in_block (this_frame);
2716 if (in_plt_section (addr_in_block)
2717 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2718 return 1;
2719 return 0;
2720}
2721
2722/* S390 stub frame unwinder. */
2723
2724static const struct frame_unwind s390_stub_frame_unwind = {
2725 NORMAL_FRAME,
2726 default_frame_unwind_stop_reason,
2727 s390_stub_frame_this_id,
2728 s390_stub_frame_prev_register,
2729 NULL,
2730 s390_stub_frame_sniffer
2731};
2732
2733/* Frame base handling. */
2734
2735static CORE_ADDR
2736s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2737{
2738 struct s390_unwind_cache *info
2739 = s390_frame_unwind_cache (this_frame, this_cache);
2740 return info->frame_base;
2741}
2742
2743static CORE_ADDR
2744s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2745{
2746 struct s390_unwind_cache *info
2747 = s390_frame_unwind_cache (this_frame, this_cache);
2748 return info->local_base;
2749}
2750
2751static const struct frame_base s390_frame_base = {
2752 &s390_frame_unwind,
2753 s390_frame_base_address,
2754 s390_local_base_address,
2755 s390_local_base_address
2756};
2757
ef8914a4
PR
2758/* Process record-replay */
2759
2760/* Takes the intermediate sum of address calculations and masks off upper
2761 bits according to current addressing mode. */
2762
2763static CORE_ADDR
2764s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2765 CORE_ADDR val)
2766{
2767 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2768 ULONGEST pswm, pswa;
2769 int am;
2770 if (tdep->abi == ABI_LINUX_S390)
2771 {
2772 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2773 am = pswa >> 31 & 1;
2774 }
2775 else
2776 {
2777 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2778 am = pswm >> 31 & 3;
2779 }
2780 switch (am)
2781 {
2782 case 0:
2783 return val & 0xffffff;
2784 case 1:
2785 return val & 0x7fffffff;
2786 case 3:
2787 return val;
2788 default:
2789 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2790 return 0;
2791 }
2792}
2793
2794/* Calculates memory address using pre-calculated index, raw instruction word
2795 with b and d/dl fields, and raw instruction byte with dh field. Index and
2796 dh should be set to 0 if unused. */
2797
2798static CORE_ADDR
2799s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2800 ULONGEST x, uint16_t bd, int8_t dh)
2801{
2802 uint8_t rb = bd >> 12 & 0xf;
2803 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2804 ULONGEST b;
2805 CORE_ADDR res = d + x;
2806 if (rb)
2807 {
2808 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2809 res += b;
2810 }
2811 return s390_record_address_mask (gdbarch, regcache, res);
2812}
2813
2814/* Calculates memory address using raw x, b + d/dl, dh fields from
2815 instruction. rx and dh should be set to 0 if unused. */
2816
2817static CORE_ADDR
2818s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2819 uint8_t rx, uint16_t bd, int8_t dh)
2820{
2821 ULONGEST x = 0;
2822 if (rx)
2823 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2824 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2825}
2826
2827/* Calculates memory address for VSCE[GF] instructions. */
2828
2829static int
2830s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2831 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2832 int8_t dh, CORE_ADDR *res)
2833{
2834 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2835 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2836 ULONGEST x;
2837 gdb_byte buf[16];
2838 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2839 return -1;
2840 if (vx < 16)
dca08e1f 2841 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
ef8914a4 2842 else
0b883586 2843 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
ef8914a4
PR
2844 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2845 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2846 return 0;
2847}
2848
2849/* Calculates memory address for instructions with relative long addressing. */
2850
2851static CORE_ADDR
2852s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2853 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2854{
2855 int32_t ri = i1 << 16 | i2;
2856 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2857}
2858
2859/* Population count helper. */
2860
2861static int s390_popcnt (unsigned int x) {
2862 int res = 0;
2863 while (x)
2864 {
2865 if (x & 1)
2866 res++;
2867 x >>= 1;
2868 }
2869 return res;
2870}
2871
2872/* Record 64-bit register. */
2873
2874static int
2875s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2876{
2877 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2878 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2879 return -1;
2880 if (tdep->abi == ABI_LINUX_S390)
2881 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2882 return -1;
2883 return 0;
2884}
2885
2886/* Record high 32 bits of a register. */
2887
2888static int
2889s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2890{
2891 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2892 if (tdep->abi == ABI_LINUX_S390)
2893 {
2894 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2895 return -1;
2896 }
2897 else
2898 {
2899 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2900 return -1;
2901 }
2902 return 0;
2903}
2904
2905/* Record vector register. */
2906
2907static int
2908s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2909{
2910 if (i < 16)
2911 {
2912 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2913 return -1;
2914 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2915 return -1;
2916 }
2917 else
2918 {
2919 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2920 return -1;
2921 }
2922 return 0;
2923}
2924
2925/* Implement process_record gdbarch method. */
2926
2927static int
2928s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2929 CORE_ADDR addr)
2930{
2931 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2932 uint16_t insn[3] = {0};
2933 /* Instruction as bytes. */
2934 uint8_t ibyte[6];
2935 /* Instruction as nibbles. */
2936 uint8_t inib[12];
2937 /* Instruction vector registers. */
2938 uint8_t ivec[4];
2939 CORE_ADDR oaddr, oaddr2, oaddr3;
2940 ULONGEST tmp;
2941 int i, n;
2942 /* if EX/EXRL instruction used, here's the reg parameter */
2943 int ex = -1;
2944 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2945
2946 /* Attempting to use EX or EXRL jumps back here */
2947ex:
2948
2949 /* Read instruction. */
2950 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2951 /* If execute was involved, do the adjustment. */
2952 if (ex != -1)
2953 insn[0] |= ex & 0xff;
2954 /* Two highest bits determine instruction size. */
2955 if (insn[0] >= 0x4000)
2956 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2957 else
2958 /* Not necessary, but avoids uninitialized variable warnings. */
2959 insn[1] = 0;
2960 if (insn[0] >= 0xc000)
2961 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2962 else
2963 insn[2] = 0;
2964 /* Split instruction into bytes and nibbles. */
2965 for (i = 0; i < 3; i++)
2966 {
2967 ibyte[i*2] = insn[i] >> 8 & 0xff;
2968 ibyte[i*2+1] = insn[i] & 0xff;
2969 }
2970 for (i = 0; i < 6; i++)
2971 {
2972 inib[i*2] = ibyte[i] >> 4 & 0xf;
2973 inib[i*2+1] = ibyte[i] & 0xf;
2974 }
2975 /* Compute vector registers, if applicable. */
2976 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2977 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2978 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2979 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2980
2981 switch (ibyte[0])
2982 {
2983 /* 0x00 undefined */
2984
2985 case 0x01:
2986 /* E-format instruction */
2987 switch (ibyte[1])
2988 {
2989 /* 0x00 undefined */
2990 /* 0x01 unsupported: PR - program return */
2991 /* 0x02 unsupported: UPT */
2992 /* 0x03 undefined */
2993 /* 0x04 privileged: PTFF - perform timing facility function */
2994 /* 0x05-0x06 undefined */
2995 /* 0x07 privileged: SCKPF - set clock programmable field */
2996 /* 0x08-0x09 undefined */
2997
2998 case 0x0a: /* PFPO - perform floating point operation */
2999 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3000 if (!(tmp & 0x80000000u))
3001 {
3002 uint8_t ofc = tmp >> 16 & 0xff;
3003 switch (ofc)
3004 {
3005 case 0x00: /* HFP32 */
3006 case 0x01: /* HFP64 */
3007 case 0x05: /* BFP32 */
3008 case 0x06: /* BFP64 */
3009 case 0x08: /* DFP32 */
3010 case 0x09: /* DFP64 */
3011 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3012 return -1;
3013 break;
3014 case 0x02: /* HFP128 */
3015 case 0x07: /* BFP128 */
3016 case 0x0a: /* DFP128 */
3017 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3018 return -1;
3019 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3020 return -1;
3021 break;
3022 default:
3023 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3024 ofc, paddress (gdbarch, addr));
3025 return -1;
3026 }
3027
3028 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3029 return -1;
3030 }
3031 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3032 return -1;
3033 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3034 return -1;
3035 break;
3036
3037 case 0x0b: /* TAM - test address mode */
3038 case 0x0c: /* SAM24 - set address mode 24 */
3039 case 0x0d: /* SAM31 - set address mode 31 */
3040 case 0x0e: /* SAM64 - set address mode 64 */
3041 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3042 return -1;
3043 break;
3044
3045 /* 0x0f-0xfe undefined */
3046
3047 /* 0xff unsupported: TRAP */
3048
3049 default:
3050 goto UNKNOWN_OP;
3051 }
3052 break;
3053
3054 /* 0x02 undefined */
3055 /* 0x03 undefined */
3056
3057 case 0x04: /* SPM - set program mask */
3058 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3059 return -1;
3060 break;
3061
3062 case 0x05: /* BALR - branch and link */
3063 case 0x45: /* BAL - branch and link */
3064 case 0x06: /* BCTR - branch on count */
3065 case 0x46: /* BCT - branch on count */
3066 case 0x0d: /* BASR - branch and save */
3067 case 0x4d: /* BAS - branch and save */
3068 case 0x84: /* BRXH - branch relative on index high */
3069 case 0x85: /* BRXLE - branch relative on index low or equal */
3070 case 0x86: /* BXH - branch on index high */
3071 case 0x87: /* BXLE - branch on index low or equal */
3072 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3073 use 32-bit destination as counter. */
3074 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3075 return -1;
3076 break;
3077
3078 case 0x07: /* BCR - branch on condition */
3079 case 0x47: /* BC - branch on condition */
3080 /* No effect other than PC transfer. */
3081 break;
3082
3083 /* 0x08 undefined */
3084 /* 0x09 undefined */
3085
3086 case 0x0a:
3087 /* SVC - supervisor call */
3088 if (tdep->s390_syscall_record != NULL)
3089 {
3090 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3091 return -1;
3092 }
3093 else
3094 {
3095 printf_unfiltered (_("no syscall record support\n"));
3096 return -1;
3097 }
3098 break;
3099
3100 case 0x0b: /* BSM - branch and set mode */
3101 if (inib[2])
3102 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3103 return -1;
3104 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3105 return -1;
3106 break;
3107
3108 case 0x0c: /* BASSM - branch and save and set mode */
3109 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3110 return -1;
3111 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3112 return -1;
3113 break;
3114
3115 case 0x0e: /* MVCL - move long [interruptible] */
3116 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3117 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3118 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3119 tmp &= 0xffffff;
3120 if (record_full_arch_list_add_mem (oaddr, tmp))
3121 return -1;
3122 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3123 return -1;
3124 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3125 return -1;
3126 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3127 return -1;
3128 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3129 return -1;
3130 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3131 return -1;
3132 break;
3133
3134 case 0x0f: /* CLCL - compare logical long [interruptible] */
3135 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3136 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3137 return -1;
3138 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3139 return -1;
3140 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3141 return -1;
3142 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3143 return -1;
3144 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3145 return -1;
3146 break;
3147
3148 case 0x10: /* LPR - load positive */
3149 case 0x11: /* LNR - load negative */
3150 case 0x12: /* LTR - load and test */
3151 case 0x13: /* LCR - load complement */
3152 case 0x14: /* NR - and */
3153 case 0x16: /* OR - or */
3154 case 0x17: /* XR - xor */
3155 case 0x1a: /* AR - add */
3156 case 0x1b: /* SR - subtract */
3157 case 0x1e: /* ALR - add logical */
3158 case 0x1f: /* SLR - subtract logical */
3159 case 0x54: /* N - and */
3160 case 0x56: /* O - or */
3161 case 0x57: /* X - xor */
3162 case 0x5a: /* A - add */
3163 case 0x5b: /* S - subtract */
3164 case 0x5e: /* AL - add logical */
3165 case 0x5f: /* SL - subtract logical */
3166 case 0x4a: /* AH - add halfword */
3167 case 0x4b: /* SH - subtract halfword */
3168 case 0x8a: /* SRA - shift right single */
3169 case 0x8b: /* SLA - shift left single */
3170 case 0xbf: /* ICM - insert characters under mask */
3171 /* 32-bit destination + flags */
3172 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3173 return -1;
3174 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3175 return -1;
3176 break;
3177
3178 case 0x15: /* CLR - compare logical */
3179 case 0x55: /* CL - compare logical */
3180 case 0x19: /* CR - compare */
3181 case 0x29: /* CDR - compare */
3182 case 0x39: /* CER - compare */
3183 case 0x49: /* CH - compare halfword */
3184 case 0x59: /* C - compare */
3185 case 0x69: /* CD - compare */
3186 case 0x79: /* CE - compare */
3187 case 0x91: /* TM - test under mask */
3188 case 0x95: /* CLI - compare logical */
3189 case 0xbd: /* CLM - compare logical under mask */
3190 case 0xd5: /* CLC - compare logical */
3191 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3192 return -1;
3193 break;
3194
3195 case 0x18: /* LR - load */
3196 case 0x48: /* LH - load halfword */
3197 case 0x58: /* L - load */
3198 case 0x41: /* LA - load address */
3199 case 0x43: /* IC - insert character */
3200 case 0x4c: /* MH - multiply halfword */
3201 case 0x71: /* MS - multiply single */
3202 case 0x88: /* SRL - shift right single logical */
3203 case 0x89: /* SLL - shift left single logical */
3204 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3205 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3206 return -1;
3207 break;
3208
3209 case 0x1c: /* MR - multiply */
3210 case 0x5c: /* M - multiply */
3211 case 0x1d: /* DR - divide */
3212 case 0x5d: /* D - divide */
3213 case 0x8c: /* SRDL - shift right double logical */
3214 case 0x8d: /* SLDL - shift left double logical */
3215 /* 32-bit pair destination, no flags */
3216 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3217 return -1;
3218 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3219 return -1;
3220 break;
3221
3222 case 0x20: /* LPDR - load positive */
3223 case 0x30: /* LPER - load positive */
3224 case 0x21: /* LNDR - load negative */
3225 case 0x31: /* LNER - load negative */
3226 case 0x22: /* LTDR - load and test */
3227 case 0x32: /* LTER - load and test */
3228 case 0x23: /* LCDR - load complement */
3229 case 0x33: /* LCER - load complement */
3230 case 0x2a: /* ADR - add */
3231 case 0x3a: /* AER - add */
3232 case 0x6a: /* AD - add */
3233 case 0x7a: /* AE - add */
3234 case 0x2b: /* SDR - subtract */
3235 case 0x3b: /* SER - subtract */
3236 case 0x6b: /* SD - subtract */
3237 case 0x7b: /* SE - subtract */
3238 case 0x2e: /* AWR - add unnormalized */
3239 case 0x3e: /* AUR - add unnormalized */
3240 case 0x6e: /* AW - add unnormalized */
3241 case 0x7e: /* AU - add unnormalized */
3242 case 0x2f: /* SWR - subtract unnormalized */
3243 case 0x3f: /* SUR - subtract unnormalized */
3244 case 0x6f: /* SW - subtract unnormalized */
3245 case 0x7f: /* SU - subtract unnormalized */
3246 /* float destination + flags */
3247 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3248 return -1;
3249 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3250 return -1;
3251 break;
3252
3253 case 0x24: /* HDR - halve */
3254 case 0x34: /* HER - halve */
3255 case 0x25: /* LDXR - load rounded */
3256 case 0x35: /* LEDR - load rounded */
3257 case 0x28: /* LDR - load */
3258 case 0x38: /* LER - load */
3259 case 0x68: /* LD - load */
3260 case 0x78: /* LE - load */
3261 case 0x2c: /* MDR - multiply */
3262 case 0x3c: /* MDER - multiply */
3263 case 0x6c: /* MD - multiply */
3264 case 0x7c: /* MDE - multiply */
3265 case 0x2d: /* DDR - divide */
3266 case 0x3d: /* DER - divide */
3267 case 0x6d: /* DD - divide */
3268 case 0x7d: /* DE - divide */
3269 /* float destination, no flags */
3270 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3271 return -1;
3272 break;
3273
3274 case 0x26: /* MXR - multiply */
3275 case 0x27: /* MXDR - multiply */
3276 case 0x67: /* MXD - multiply */
3277 /* float pair destination, no flags */
3278 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3279 return -1;
3280 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3281 return -1;
3282 break;
3283
3284 case 0x36: /* AXR - add */
3285 case 0x37: /* SXR - subtract */
3286 /* float pair destination + flags */
3287 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3288 return -1;
3289 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3290 return -1;
3291 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3292 return -1;
3293 break;
3294
3295 case 0x40: /* STH - store halfword */
3296 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3297 if (record_full_arch_list_add_mem (oaddr, 2))
3298 return -1;
3299 break;
3300
3301 case 0x42: /* STC - store character */
3302 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3303 if (record_full_arch_list_add_mem (oaddr, 1))
3304 return -1;
3305 break;
3306
3307 case 0x44: /* EX - execute */
3308 if (ex != -1)
3309 {
3310 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3311 paddress (gdbarch, addr));
3312 return -1;
3313 }
3314 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3315 if (inib[2])
3316 {
3317 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3318 ex = tmp & 0xff;
3319 }
3320 else
3321 {
3322 ex = 0;
3323 }
3324 goto ex;
3325
3326 case 0x4e: /* CVD - convert to decimal */
3327 case 0x60: /* STD - store */
3328 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3329 if (record_full_arch_list_add_mem (oaddr, 8))
3330 return -1;
3331 break;
3332
3333 case 0x4f: /* CVB - convert to binary */
3334 /* 32-bit gpr destination + FPC (DXC write) */
3335 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3336 return -1;
3337 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3338 return -1;
3339 break;
3340
3341 case 0x50: /* ST - store */
3342 case 0x70: /* STE - store */
3343 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3344 if (record_full_arch_list_add_mem (oaddr, 4))
3345 return -1;
3346 break;
3347
3348 case 0x51: /* LAE - load address extended */
3349 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3350 return -1;
3351 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3352 return -1;
3353 break;
3354
3355 /* 0x52 undefined */
3356 /* 0x53 undefined */
3357
3358 /* 0x61-0x66 undefined */
3359
3360 /* 0x72-0x77 undefined */
3361
3362 /* 0x80 privileged: SSM - set system mask */
3363 /* 0x81 undefined */
3364 /* 0x82 privileged: LPSW - load PSW */
3365 /* 0x83 privileged: diagnose */
3366
3367 case 0x8e: /* SRDA - shift right double */
3368 case 0x8f: /* SLDA - shift left double */
3369 /* 32-bit pair destination + flags */
3370 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3371 return -1;
3372 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3373 return -1;
3374 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3375 return -1;
3376 break;
3377
3378 case 0x90: /* STM - store multiple */
3379 case 0x9b: /* STAM - store access multiple */
3380 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3381 if (inib[2] <= inib[3])
3382 n = inib[3] - inib[2] + 1;
3383 else
3384 n = inib[3] + 0x10 - inib[2] + 1;
3385 if (record_full_arch_list_add_mem (oaddr, n * 4))
3386 return -1;
3387 break;
3388
3389 case 0x92: /* MVI - move */
3390 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3391 if (record_full_arch_list_add_mem (oaddr, 1))
3392 return -1;
3393 break;
3394
3395 case 0x93: /* TS - test and set */
3396 case 0x94: /* NI - and */
3397 case 0x96: /* OI - or */
3398 case 0x97: /* XI - xor */
3399 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3400 if (record_full_arch_list_add_mem (oaddr, 1))
3401 return -1;
3402 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3403 return -1;
3404 break;
3405
3406 case 0x98: /* LM - load multiple */
3407 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3408 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3409 return -1;
3410 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3411 return -1;
3412 break;
3413
3414 /* 0x99 privileged: TRACE */
3415
3416 case 0x9a: /* LAM - load access multiple */
3417 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3418 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3419 return -1;
3420 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3421 return -1;
3422 break;
3423
3424 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3425 /* 0xa0-0xa4 undefined */
3426
3427 case 0xa5:
3428 case 0xa7:
3429 /* RI-format instruction */
3430 switch (ibyte[0] << 4 | inib[3])
3431 {
3432 case 0xa50: /* IIHH - insert immediate */
3433 case 0xa51: /* IIHL - insert immediate */
3434 /* high 32-bit destination */
3435 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3436 return -1;
3437 break;
3438
3439 case 0xa52: /* IILH - insert immediate */
3440 case 0xa53: /* IILL - insert immediate */
3441 case 0xa75: /* BRAS - branch relative and save */
3442 case 0xa76: /* BRCT - branch relative on count */
3443 case 0xa78: /* LHI - load halfword immediate */
3444 case 0xa7c: /* MHI - multiply halfword immediate */
3445 /* 32-bit or native destination */
3446 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3447 return -1;
3448 break;
3449
3450 case 0xa54: /* NIHH - and immediate */
3451 case 0xa55: /* NIHL - and immediate */
3452 case 0xa58: /* OIHH - or immediate */
3453 case 0xa59: /* OIHL - or immediate */
3454 /* high 32-bit destination + flags */
3455 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3456 return -1;
3457 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3458 return -1;
3459 break;
3460
3461 case 0xa56: /* NILH - and immediate */
3462 case 0xa57: /* NILL - and immediate */
3463 case 0xa5a: /* OILH - or immediate */
3464 case 0xa5b: /* OILL - or immediate */
3465 case 0xa7a: /* AHI - add halfword immediate */
3466 /* 32-bit destination + flags */
3467 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3468 return -1;
3469 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3470 return -1;
3471 break;
3472
3473 case 0xa5c: /* LLIHH - load logical immediate */
3474 case 0xa5d: /* LLIHL - load logical immediate */
3475 case 0xa5e: /* LLILH - load logical immediate */
3476 case 0xa5f: /* LLILL - load logical immediate */
3477 case 0xa77: /* BRCTG - branch relative on count */
3478 case 0xa79: /* LGHI - load halfword immediate */
3479 case 0xa7d: /* MGHI - multiply halfword immediate */
3480 /* 64-bit destination */
3481 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3482 return -1;
3483 break;
3484
3485 case 0xa70: /* TMLH - test under mask */
3486 case 0xa71: /* TMLL - test under mask */
3487 case 0xa72: /* TMHH - test under mask */
3488 case 0xa73: /* TMHL - test under mask */
3489 case 0xa7e: /* CHI - compare halfword immediate */
3490 case 0xa7f: /* CGHI - compare halfword immediate */
3491 /* flags only */
3492 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3493 return -1;
3494 break;
3495
3496 case 0xa74: /* BRC - branch relative on condition */
3497 /* no register change */
3498 break;
3499
3500 case 0xa7b: /* AGHI - add halfword immediate */
3501 /* 64-bit destination + flags */
3502 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3503 return -1;
3504 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3505 return -1;
3506 break;
3507
3508 default:
3509 goto UNKNOWN_OP;
3510 }
3511 break;
3512
3513 /* 0xa6 undefined */
3514
3515 case 0xa8: /* MVCLE - move long extended [partial] */
3516 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3517 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3518 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3519 if (record_full_arch_list_add_mem (oaddr, tmp))
3520 return -1;
3521 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3522 return -1;
3523 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3524 return -1;
3525 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3526 return -1;
3527 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3528 return -1;
3529 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3530 return -1;
3531 break;
3532
3533 /* 0xaa-0xab undefined */
3534 /* 0xac privileged: STNSM - store then and system mask */
3535 /* 0xad privileged: STOSM - store then or system mask */
3536 /* 0xae privileged: SIGP - signal processor */
3537 /* 0xaf unsupported: MC - monitor call */
3538 /* 0xb0 undefined */
3539 /* 0xb1 privileged: LRA - load real address */
3540
3541 case 0xb2:
3542 case 0xb3:
3543 case 0xb9:
3544 /* S/RRD/RRE/RRF/IE-format instruction */
3545 switch (insn[0])
3546 {
3547 /* 0xb200-0xb204 undefined or privileged */
3548
3549 case 0xb205: /* STCK - store clock */
3550 case 0xb27c: /* STCKF - store clock fast */
3551 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3552 if (record_full_arch_list_add_mem (oaddr, 8))
3553 return -1;
3554 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3555 return -1;
3556 break;
3557
3558 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3559 /* 0xb21a unsupported: CFC */
3560 /* 0xb21b-0xb221 undefined or privileged */
3561
3562 case 0xb222: /* IPM - insert program mask */
3563 case 0xb24f: /* EAR - extract access */
3564 case 0xb252: /* MSR - multiply single */
3565 case 0xb2ec: /* ETND - extract transaction nesting depth */
3566 case 0xb38c: /* EFPC - extract fpc */
3567 case 0xb91f: /* LRVR - load reversed */
3568 case 0xb926: /* LBR - load byte */
3569 case 0xb927: /* LHR - load halfword */
3570 case 0xb994: /* LLCR - load logical character */
3571 case 0xb995: /* LLHR - load logical halfword */
3572 case 0xb9f2: /* LOCR - load on condition */
3573 /* 32-bit gpr destination */
3574 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3575 return -1;
3576 break;
3577
3578 /* 0xb223-0xb22c privileged or unsupported */
3579
3580 case 0xb22d: /* DXR - divide */
3581 case 0xb325: /* LXDR - load lengthened */
3582 case 0xb326: /* LXER - load lengthened */
3583 case 0xb336: /* SQXR - square root */
3584 case 0xb365: /* LXR - load */
3585 case 0xb367: /* FIXR - load fp integer */
3586 case 0xb376: /* LZXR - load zero */
3587 case 0xb3b6: /* CXFR - convert from fixed */
3588 case 0xb3c6: /* CXGR - convert from fixed */
3589 case 0xb3fe: /* IEXTR - insert biased exponent */
3590 /* float pair destination */
3591 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3592 return -1;
3593 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3594 return -1;
3595 break;
3596
3597 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3598
3599 case 0xb241: /* CKSM - checksum [partial] */
3600 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3601 return -1;
3602 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3603 return -1;
3604 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3605 return -1;
3606 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3607 return -1;
3608 break;
3609
3610 /* 0xb242-0xb243 undefined */
3611
3612 case 0xb244: /* SQDR - square root */
3613 case 0xb245: /* SQER - square root */
3614 case 0xb324: /* LDER - load lengthened */
3615 case 0xb337: /* MEER - multiply */
3616 case 0xb366: /* LEXR - load rounded */
3617 case 0xb370: /* LPDFR - load positive */
3618 case 0xb371: /* LNDFR - load negative */
3619 case 0xb372: /* CSDFR - copy sign */
3620 case 0xb373: /* LCDFR - load complement */
3621 case 0xb374: /* LZER - load zero */
3622 case 0xb375: /* LZDR - load zero */
3623 case 0xb377: /* FIER - load fp integer */
3624 case 0xb37f: /* FIDR - load fp integer */
3625 case 0xb3b4: /* CEFR - convert from fixed */
3626 case 0xb3b5: /* CDFR - convert from fixed */
3627 case 0xb3c1: /* LDGR - load fpr from gr */
3628 case 0xb3c4: /* CEGR - convert from fixed */
3629 case 0xb3c5: /* CDGR - convert from fixed */
3630 case 0xb3f6: /* IEDTR - insert biased exponent */
3631 /* float destination */
3632 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3633 return -1;
3634 break;
3635
3636 /* 0xb246-0xb24c: privileged or unsupported */
3637
3638 case 0xb24d: /* CPYA - copy access */
3639 case 0xb24e: /* SAR - set access */
3640 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3641 return -1;
3642 break;
3643
3644 /* 0xb250-0xb251 undefined or privileged */
3645 /* 0xb253-0xb254 undefined or privileged */
3646
3647 case 0xb255: /* MVST - move string [partial] */
3648 {
3649 uint8_t end;
3650 gdb_byte cur;
3651 ULONGEST num = 0;
3652 /* Read ending byte. */
3653 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3654 end = tmp & 0xff;
3655 /* Get address of second operand. */
3656 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3657 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3658 /* Search for ending byte and compute length. */
3659 do {
3660 num++;
3661 if (target_read_memory (oaddr, &cur, 1))
3662 return -1;
3663 oaddr++;
3664 } while (cur != end);
3665 /* Get address of first operand and record it. */
3666 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3667 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3668 if (record_full_arch_list_add_mem (oaddr, num))
3669 return -1;
3670 /* Record the registers. */
3671 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3672 return -1;
3673 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3674 return -1;
3675 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3676 return -1;
3677 }
3678 break;
3679
3680 /* 0xb256 undefined */
3681
3682 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3683 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3684 return -1;
3685 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3686 return -1;
3687 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3688 return -1;
3689 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3690 return -1;
3691 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3692 return -1;
3693 break;
3694
3695 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3696
3697 case 0xb25d: /* CLST - compare logical string [partial] */
3698 case 0xb25e: /* SRST - search string [partial] */
3699 case 0xb9be: /* SRSTU - search string unicode [partial] */
3700 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3701 return -1;
3702 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3703 return -1;
3704 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3705 return -1;
3706 break;
3707
3708 /* 0xb25f-0xb262 undefined */
3709
3710 case 0xb263: /* CMPSC - compression call [interruptible] */
3711 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3712 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3713 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3714 if (record_full_arch_list_add_mem (oaddr, tmp))
3715 return -1;
3716 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3717 return -1;
3718 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3719 return -1;
3720 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3721 return -1;
3722 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3723 return -1;
3724 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3725 return -1;
3726 /* DXC may be written */
3727 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3728 return -1;
3729 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3730 return -1;
3731 break;
3732
3733 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3734
3735 case 0xb278: /* STCKE - store clock extended */
3736 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3737 if (record_full_arch_list_add_mem (oaddr, 16))
3738 return -1;
3739 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3740 return -1;
3741 break;
3742
3743 /* 0xb279-0xb27b undefined or unsupported */
3744 /* 0xb27d-0xb298 undefined or privileged */
3745
3746 case 0xb299: /* SRNM - set rounding mode */
3747 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3748 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3749 case 0xb29d: /* LFPC - load fpc */
3750 case 0xb2bd: /* LFAS - load fpc and signal */
3751 case 0xb384: /* SFPC - set fpc */
3752 case 0xb385: /* SFASR - set fpc and signal */
3753 case 0xb960: /* CGRT - compare and trap */
3754 case 0xb961: /* CLGRT - compare logical and trap */
3755 case 0xb972: /* CRT - compare and trap */
3756 case 0xb973: /* CLRT - compare logical and trap */
3757 /* fpc only - including possible DXC write for trapping insns */
3758 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3759 return -1;
3760 break;
3761
3762 /* 0xb29a-0xb29b undefined */
3763
3764 case 0xb29c: /* STFPC - store fpc */
3765 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3766 if (record_full_arch_list_add_mem (oaddr, 4))
3767 return -1;
3768 break;
3769
3770 /* 0xb29e-0xb2a4 undefined */
3771
3772 case 0xb2a5: /* TRE - translate extended [partial] */
3773 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3774 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3775 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3776 if (record_full_arch_list_add_mem (oaddr, tmp))
3777 return -1;
3778 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3779 return -1;
3780 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3781 return -1;
3782 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3783 return -1;
3784 break;
3785
3786 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3787 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3788 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3789 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3790 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3791 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3792 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3793 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3794 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3795 if (record_full_arch_list_add_mem (oaddr, tmp))
3796 return -1;
3797 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3798 return -1;
3799 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3800 return -1;
3801 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3802 return -1;
3803 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3804 return -1;
3805 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3806 return -1;
3807 break;
3808
3809 /* 0xb2a8-0xb2af undefined */
3810
3811 case 0xb2b0: /* STFLE - store facility list extended */
3812 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3813 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3814 tmp &= 0xff;
3815 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3816 return -1;
3817 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3818 return -1;
3819 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3820 return -1;
3821 break;
3822
3823 /* 0xb2b1-0xb2b7 undefined or privileged */
3824 /* 0xb2ba-0xb2bc undefined */
3825 /* 0xb2be-0xb2e7 undefined */
3826 /* 0xb2e9-0xb2eb undefined */
3827 /* 0xb2ed-0xb2f7 undefined */
3828 /* 0xb2f8 unsupported: TEND */
3829 /* 0xb2f9 undefined */
3830
3831 case 0xb2e8: /* PPA - perform processor assist */
3832 case 0xb2fa: /* NIAI - next instruction access intent */
3833 /* no visible effects */
3834 break;
3835
3836 /* 0xb2fb undefined */
3837 /* 0xb2fc unsupported: TABORT */
3838 /* 0xb2fd-0xb2fe undefined */
3839 /* 0xb2ff unsupported: TRAP */
3840
3841 case 0xb300: /* LPEBR - load positive */
3842 case 0xb301: /* LNEBR - load negative */
3843 case 0xb303: /* LCEBR - load complement */
3844 case 0xb310: /* LPDBR - load positive */
3845 case 0xb311: /* LNDBR - load negative */
3846 case 0xb313: /* LCDBR - load complement */
3847 case 0xb350: /* TBEDR - convert hfp to bfp */
3848 case 0xb351: /* TBDR - convert hfp to bfp */
3849 case 0xb358: /* THDER - convert bfp to hfp */
3850 case 0xb359: /* THDR - convert bfp to hfp */
3851 /* float destination + flags */
3852 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3853 return -1;
3854 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3855 return -1;
3856 break;
3857
3858 case 0xb304: /* LDEBR - load lengthened */
3859 case 0xb30c: /* MDEBR - multiply */
3860 case 0xb30d: /* DEBR - divide */
3861 case 0xb314: /* SQEBR - square root */
3862 case 0xb315: /* SQDBR - square root */
3863 case 0xb317: /* MEEBR - multiply */
3864 case 0xb31c: /* MDBR - multiply */
3865 case 0xb31d: /* DDBR - divide */
3866 case 0xb344: /* LEDBRA - load rounded */
3867 case 0xb345: /* LDXBRA - load rounded */
3868 case 0xb346: /* LEXBRA - load rounded */
3869 case 0xb357: /* FIEBRA - load fp integer */
3870 case 0xb35f: /* FIDBRA - load fp integer */
3871 case 0xb390: /* CELFBR - convert from logical */
3872 case 0xb391: /* CDLFBR - convert from logical */
3873 case 0xb394: /* CEFBR - convert from fixed */
3874 case 0xb395: /* CDFBR - convert from fixed */
3875 case 0xb3a0: /* CELGBR - convert from logical */
3876 case 0xb3a1: /* CDLGBR - convert from logical */
3877 case 0xb3a4: /* CEGBR - convert from fixed */
3878 case 0xb3a5: /* CDGBR - convert from fixed */
3879 case 0xb3d0: /* MDTR - multiply */
3880 case 0xb3d1: /* DDTR - divide */
3881 case 0xb3d4: /* LDETR - load lengthened */
3882 case 0xb3d5: /* LEDTR - load lengthened */
3883 case 0xb3d7: /* FIDTR - load fp integer */
3884 case 0xb3dd: /* LDXTR - load lengthened */
3885 case 0xb3f1: /* CDGTR - convert from fixed */
3886 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3887 case 0xb3f3: /* CDSTR - convert from signed packed */
3888 case 0xb3f5: /* QADTR - quantize */
3889 case 0xb3f7: /* RRDTR - reround */
3890 case 0xb951: /* CDFTR - convert from fixed */
3891 case 0xb952: /* CDLGTR - convert from logical */
3892 case 0xb953: /* CDLFTR - convert from logical */
3893 /* float destination + fpc */
3894 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3895 return -1;
3896 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3897 return -1;
3898 break;
3899
3900 case 0xb305: /* LXDBR - load lengthened */
3901 case 0xb306: /* LXEBR - load lengthened */
3902 case 0xb307: /* MXDBR - multiply */
3903 case 0xb316: /* SQXBR - square root */
3904 case 0xb34c: /* MXBR - multiply */
3905 case 0xb34d: /* DXBR - divide */
3906 case 0xb347: /* FIXBRA - load fp integer */
3907 case 0xb392: /* CXLFBR - convert from logical */
3908 case 0xb396: /* CXFBR - convert from fixed */
3909 case 0xb3a2: /* CXLGBR - convert from logical */
3910 case 0xb3a6: /* CXGBR - convert from fixed */
3911 case 0xb3d8: /* MXTR - multiply */
3912 case 0xb3d9: /* DXTR - divide */
3913 case 0xb3dc: /* LXDTR - load lengthened */
3914 case 0xb3df: /* FIXTR - load fp integer */
3915 case 0xb3f9: /* CXGTR - convert from fixed */
3916 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3917 case 0xb3fb: /* CXSTR - convert from signed packed */
3918 case 0xb3fd: /* QAXTR - quantize */
3919 case 0xb3ff: /* RRXTR - reround */
3920 case 0xb959: /* CXFTR - convert from fixed */
3921 case 0xb95a: /* CXLGTR - convert from logical */
3922 case 0xb95b: /* CXLFTR - convert from logical */
3923 /* float pair destination + fpc */
3924 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3925 return -1;
3926 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3927 return -1;
3928 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3929 return -1;
3930 break;
3931
3932 case 0xb308: /* KEBR - compare and signal */
3933 case 0xb309: /* CEBR - compare */
3934 case 0xb318: /* KDBR - compare and signal */
3935 case 0xb319: /* CDBR - compare */
3936 case 0xb348: /* KXBR - compare and signal */
3937 case 0xb349: /* CXBR - compare */
3938 case 0xb3e0: /* KDTR - compare and signal */
3939 case 0xb3e4: /* CDTR - compare */
3940 case 0xb3e8: /* KXTR - compare and signal */
3941 case 0xb3ec: /* CXTR - compare */
3942 /* flags + fpc only */
3943 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3944 return -1;
3945 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3946 return -1;
3947 break;
3948
3949 case 0xb302: /* LTEBR - load and test */
3950 case 0xb312: /* LTDBR - load and test */
3951 case 0xb30a: /* AEBR - add */
3952 case 0xb30b: /* SEBR - subtract */
3953 case 0xb31a: /* ADBR - add */
3954 case 0xb31b: /* SDBR - subtract */
3955 case 0xb3d2: /* ADTR - add */
3956 case 0xb3d3: /* SDTR - subtract */
3957 case 0xb3d6: /* LTDTR - load and test */
3958 /* float destination + flags + fpc */
3959 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3960 return -1;
3961 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3962 return -1;
3963 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3964 return -1;
3965 break;
3966
3967 case 0xb30e: /* MAEBR - multiply and add */
3968 case 0xb30f: /* MSEBR - multiply and subtract */
3969 case 0xb31e: /* MADBR - multiply and add */
3970 case 0xb31f: /* MSDBR - multiply and subtract */
3971 /* float destination [RRD] + fpc */
3972 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3973 return -1;
3974 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3975 return -1;
3976 break;
3977
3978 /* 0xb320-0xb323 undefined */
3979 /* 0xb327-0xb32d undefined */
3980
3981 case 0xb32e: /* MAER - multiply and add */
3982 case 0xb32f: /* MSER - multiply and subtract */
3983 case 0xb338: /* MAYLR - multiply and add unnormalized */
3984 case 0xb339: /* MYLR - multiply unnormalized */
3985 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3986 case 0xb33d: /* MYHR - multiply unnormalized */
3987 case 0xb33e: /* MADR - multiply and add */
3988 case 0xb33f: /* MSDR - multiply and subtract */
3989 /* float destination [RRD] */
3990 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3991 return -1;
3992 break;
3993
3994 /* 0xb330-0xb335 undefined */
3995
3996 case 0xb33a: /* MAYR - multiply and add unnormalized */
3997 case 0xb33b: /* MYR - multiply unnormalized */
3998 /* float pair destination [RRD] */
3999 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4000 return -1;
4001 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4002 return -1;
4003 break;
4004
4005 case 0xb340: /* LPXBR - load positive */
4006 case 0xb341: /* LNXBR - load negative */
4007 case 0xb343: /* LCXBR - load complement */
4008 case 0xb360: /* LPXR - load positive */
4009 case 0xb361: /* LNXR - load negative */
4010 case 0xb362: /* LTXR - load and test */
4011 case 0xb363: /* LCXR - load complement */
4012 /* float pair destination + flags */
4013 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4014 return -1;
4015 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4016 return -1;
4017 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4018 return -1;
4019 break;
4020
4021 case 0xb342: /* LTXBR - load and test */
4022 case 0xb34a: /* AXBR - add */
4023 case 0xb34b: /* SXBR - subtract */
4024 case 0xb3da: /* AXTR - add */
4025 case 0xb3db: /* SXTR - subtract */
4026 case 0xb3de: /* LTXTR - load and test */
4027 /* float pair destination + flags + fpc */
4028 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4029 return -1;
4030 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4031 return -1;
4032 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4033 return -1;
4034 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4035 return -1;
4036 break;
4037
4038 /* 0xb34e-0xb34f undefined */
4039 /* 0xb352 undefined */
4040
4041 case 0xb353: /* DIEBR - divide to integer */
4042 case 0xb35b: /* DIDBR - divide to integer */
4043 /* two float destinations + flags + fpc */
4044 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4045 return -1;
4046 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4047 return -1;
4048 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4049 return -1;
4050 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4051 return -1;
4052 break;
4053
4054 /* 0xb354-0xb356 undefined */
4055 /* 0xb35a undefined */
4056
4057 /* 0xb35c-0xb35e undefined */
4058 /* 0xb364 undefined */
4059 /* 0xb368 undefined */
4060
4061 case 0xb369: /* CXR - compare */
4062 case 0xb3f4: /* CEDTR - compare biased exponent */
4063 case 0xb3fc: /* CEXTR - compare biased exponent */
4064 case 0xb920: /* CGR - compare */
4065 case 0xb921: /* CLGR - compare logical */
4066 case 0xb930: /* CGFR - compare */
4067 case 0xb931: /* CLGFR - compare logical */
4068 case 0xb9cd: /* CHHR - compare high */
4069 case 0xb9cf: /* CLHHR - compare logical high */
4070 case 0xb9dd: /* CHLR - compare high */
4071 case 0xb9df: /* CLHLR - compare logical high */
4072 /* flags only */
4073 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4074 return -1;
4075 break;
4076
4077 /* 0xb36a-0xb36f undefined */
4078 /* 0xb377-0xb37e undefined */
4079 /* 0xb380-0xb383 undefined */
4080 /* 0xb386-0xb38b undefined */
4081 /* 0xb38d-0xb38f undefined */
4082 /* 0xb393 undefined */
4083 /* 0xb397 undefined */
4084
4085 case 0xb398: /* CFEBR - convert to fixed */
4086 case 0xb399: /* CFDBR - convert to fixed */
4087 case 0xb39a: /* CFXBR - convert to fixed */
4088 case 0xb39c: /* CLFEBR - convert to logical */
4089 case 0xb39d: /* CLFDBR - convert to logical */
4090 case 0xb39e: /* CLFXBR - convert to logical */
4091 case 0xb941: /* CFDTR - convert to fixed */
4092 case 0xb949: /* CFXTR - convert to fixed */
4093 case 0xb943: /* CLFDTR - convert to logical */
4094 case 0xb94b: /* CLFXTR - convert to logical */
4095 /* 32-bit gpr destination + flags + fpc */
4096 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4097 return -1;
4098 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4099 return -1;
4100 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4101 return -1;
4102 break;
4103
4104 /* 0xb39b undefined */
4105 /* 0xb39f undefined */
4106
4107 /* 0xb3a3 undefined */
4108 /* 0xb3a7 undefined */
4109
4110 case 0xb3a8: /* CGEBR - convert to fixed */
4111 case 0xb3a9: /* CGDBR - convert to fixed */
4112 case 0xb3aa: /* CGXBR - convert to fixed */
4113 case 0xb3ac: /* CLGEBR - convert to logical */
4114 case 0xb3ad: /* CLGDBR - convert to logical */
4115 case 0xb3ae: /* CLGXBR - convert to logical */
4116 case 0xb3e1: /* CGDTR - convert to fixed */
4117 case 0xb3e9: /* CGXTR - convert to fixed */
4118 case 0xb942: /* CLGDTR - convert to logical */
4119 case 0xb94a: /* CLGXTR - convert to logical */
4120 /* 64-bit gpr destination + flags + fpc */
4121 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4122 return -1;
4123 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4124 return -1;
4125 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4126 return -1;
4127 break;
4128
4129 /* 0xb3ab undefined */
4130 /* 0xb3af-0xb3b3 undefined */
4131 /* 0xb3b7 undefined */
4132
4133 case 0xb3b8: /* CFER - convert to fixed */
4134 case 0xb3b9: /* CFDR - convert to fixed */
4135 case 0xb3ba: /* CFXR - convert to fixed */
4136 case 0xb998: /* ALCR - add logical with carry */
4137 case 0xb999: /* SLBR - subtract logical with borrow */
4138 case 0xb9f4: /* NRK - and */
4139 case 0xb9f6: /* ORK - or */
4140 case 0xb9f7: /* XRK - xor */
4141 case 0xb9f8: /* ARK - add */
4142 case 0xb9f9: /* SRK - subtract */
4143 case 0xb9fa: /* ALRK - add logical */
4144 case 0xb9fb: /* SLRK - subtract logical */
4145 /* 32-bit gpr destination + flags */
4146 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4147 return -1;
4148 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4149 return -1;
4150 break;
4151
4152 case 0xb3c8: /* CGER - convert to fixed */
4153 case 0xb3c9: /* CGDR - convert to fixed */
4154 case 0xb3ca: /* CGXR - convert to fixed */
4155 case 0xb900: /* LPGR - load positive */
4156 case 0xb901: /* LNGR - load negative */
4157 case 0xb902: /* LTGR - load and test */
4158 case 0xb903: /* LCGR - load complement */
4159 case 0xb908: /* AGR - add */
4160 case 0xb909: /* SGR - subtract */
4161 case 0xb90a: /* ALGR - add logical */
4162 case 0xb90b: /* SLGR - subtract logical */
4163 case 0xb910: /* LPGFR - load positive */
4164 case 0xb911: /* LNGFR - load negative */
4165 case 0xb912: /* LTGFR - load and test */
4166 case 0xb913: /* LCGFR - load complement */
4167 case 0xb918: /* AGFR - add */
4168 case 0xb919: /* SGFR - subtract */
4169 case 0xb91a: /* ALGFR - add logical */
4170 case 0xb91b: /* SLGFR - subtract logical */
4171 case 0xb980: /* NGR - and */
4172 case 0xb981: /* OGR - or */
4173 case 0xb982: /* XGR - xor */
4174 case 0xb988: /* ALCGR - add logical with carry */
4175 case 0xb989: /* SLBGR - subtract logical with borrow */
4176 case 0xb9e1: /* POPCNT - population count */
4177 case 0xb9e4: /* NGRK - and */
4178 case 0xb9e6: /* OGRK - or */
4179 case 0xb9e7: /* XGRK - xor */
4180 case 0xb9e8: /* AGRK - add */
4181 case 0xb9e9: /* SGRK - subtract */
4182 case 0xb9ea: /* ALGRK - add logical */
4183 case 0xb9eb: /* SLGRK - subtract logical */
4184 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4185 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4186 /* 64-bit gpr destination + flags */
4187 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4188 return -1;
4189 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4190 return -1;
4191 break;
4192
4193 /* 0xb3bb-0xb3c0 undefined */
4194 /* 0xb3c2-0xb3c3 undefined */
4195 /* 0xb3c7 undefined */
4196 /* 0xb3cb-0xb3cc undefined */
4197
4198 case 0xb3cd: /* LGDR - load gr from fpr */
4199 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4200 case 0xb3e3: /* CSDTR - convert to signed packed */
4201 case 0xb3e5: /* EEDTR - extract biased exponent */
4202 case 0xb3e7: /* ESDTR - extract significance */
4203 case 0xb3ed: /* EEXTR - extract biased exponent */
4204 case 0xb3ef: /* ESXTR - extract significance */
4205 case 0xb904: /* LGR - load */
4206 case 0xb906: /* LGBR - load byte */
4207 case 0xb907: /* LGHR - load halfword */
4208 case 0xb90c: /* MSGR - multiply single */
4209 case 0xb90f: /* LRVGR - load reversed */
4210 case 0xb914: /* LGFR - load */
4211 case 0xb916: /* LLGFR - load logical */
4212 case 0xb917: /* LLGTR - load logical thirty one bits */
4213 case 0xb91c: /* MSGFR - multiply single 64<32 */
4214 case 0xb946: /* BCTGR - branch on count */
4215 case 0xb984: /* LLGCR - load logical character */
4216 case 0xb985: /* LLGHR - load logical halfword */
4217 case 0xb9e2: /* LOCGR - load on condition */
4218 /* 64-bit gpr destination */
4219 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4220 return -1;
4221 break;
4222
4223 /* 0xb3ce-0xb3cf undefined */
4224 /* 0xb3e6 undefined */
4225
4226 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4227 case 0xb3eb: /* CSXTR - convert to signed packed */
4228 case 0xb90d: /* DSGR - divide single */
4229 case 0xb91d: /* DSGFR - divide single */
4230 case 0xb986: /* MLGR - multiply logical */
4231 case 0xb987: /* DLGR - divide logical */
4232 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4233 /* 64-bit gpr pair destination */
4234 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4235 return -1;
4236 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4237 return -1;
4238 break;
4239
4240 /* 0xb3ee undefined */
4241 /* 0xb3f0 undefined */
4242 /* 0xb3f8 undefined */
4243
4244 /* 0xb905 privileged */
4245
4246 /* 0xb90e unsupported: EREGG */
4247
4248 /* 0xb915 undefined */
4249
4250 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4251 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4252 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4253 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4254 tmp &= 0xff;
4255 switch (tmp)
4256 {
4257 case 0x00: /* KMAC-Query */
4258 if (record_full_arch_list_add_mem (oaddr, 16))
4259 return -1;
4260 break;
4261
4262 case 0x01: /* KMAC-DEA */
4263 case 0x02: /* KMAC-TDEA-128 */
4264 case 0x03: /* KMAC-TDEA-192 */
4265 case 0x09: /* KMAC-Encrypted-DEA */
4266 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4267 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4268 if (record_full_arch_list_add_mem (oaddr, 8))
4269 return -1;
4270 break;
4271
4272 case 0x12: /* KMAC-AES-128 */
4273 case 0x13: /* KMAC-AES-192 */
4274 case 0x14: /* KMAC-AES-256 */
4275 case 0x1a: /* KMAC-Encrypted-AES-128 */
4276 case 0x1b: /* KMAC-Encrypted-AES-192 */
4277 case 0x1c: /* KMAC-Encrypted-AES-256 */
4278 if (record_full_arch_list_add_mem (oaddr, 16))
4279 return -1;
4280 break;
4281
4282 default:
4283 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4284 (int)tmp, paddress (gdbarch, addr));
4285 return -1;
4286 }
4287 if (tmp != 0)
4288 {
4289 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4290 return -1;
4291 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4292 return -1;
4293 }
4294 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4295 return -1;
4296 break;
4297
4298 /* 0xb922-0xb924 undefined */
4299 /* 0xb925 privileged */
4300 /* 0xb928 privileged */
4301
4302 case 0xb929: /* KMA - cipher message with authentication */
4303 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4304 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4305 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4306 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4307 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4308 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4309 tmp &= 0x7f;
4310 switch (tmp)
4311 {
4312 case 0x00: /* KM*-Query */
4313 if (record_full_arch_list_add_mem (oaddr, 16))
4314 return -1;
4315 break;
4316
4317 case 0x01: /* KM*-DEA */
4318 case 0x02: /* KM*-TDEA-128 */
4319 case 0x03: /* KM*-TDEA-192 */
4320 case 0x09: /* KM*-Encrypted-DEA */
4321 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4322 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4323 if (record_full_arch_list_add_mem (oaddr, 8))
4324 return -1;
4325 break;
4326
4327 case 0x12: /* KM*-AES-128 */
4328 case 0x13: /* KM*-AES-192 */
4329 case 0x14: /* KM*-AES-256 */
4330 case 0x1a: /* KM*-Encrypted-AES-128 */
4331 case 0x1b: /* KM*-Encrypted-AES-192 */
4332 case 0x1c: /* KM*-Encrypted-AES-256 */
4333 if (record_full_arch_list_add_mem (oaddr, 16))
4334 return -1;
4335 break;
4336
4337 case 0x43: /* KMC-PRNG */
4338 /* Only valid for KMC. */
4339 if (insn[0] == 0xb92f)
4340 {
4341 if (record_full_arch_list_add_mem (oaddr, 8))
4342 return -1;
4343 break;
4344 }
86a73007
TT
4345 /* For other instructions... */
4346 /* Fall through. */
ef8914a4
PR
4347 default:
4348 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4349 (int)tmp, paddress (gdbarch, addr));
4350 return -1;
4351 }
4352 if (tmp != 0)
4353 {
4354 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4355 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4356 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4357 if (record_full_arch_list_add_mem (oaddr2, tmp))
4358 return -1;
4359 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4360 return -1;
4361 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4362 return -1;
4363 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4364 return -1;
4365 }
4366 if (tmp != 0 && insn[0] == 0xb929)
4367 {
4368 if (record_full_arch_list_add_reg (regcache,
4369 S390_R0_REGNUM + inib[4]))
4370 return -1;
4371 if (record_full_arch_list_add_reg (regcache,
4372 S390_R0_REGNUM + (inib[4] | 1)))
4373 return -1;
4374 }
4375 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4376 return -1;
4377 break;
4378
4379 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4380 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4381 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4382 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4383 tmp &= 0x7f;
4384 switch (tmp)
4385 {
4386 case 0x00: /* PCC-Query */
4387 if (record_full_arch_list_add_mem (oaddr, 16))
4388 return -1;
4389 break;
4390
4391 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4392 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4393 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4394 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4395 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4396 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4397 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4398 return -1;
4399 break;
4400
4401 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4402 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4403 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4404 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4405 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4406 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4407 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4408 return -1;
4409 break;
4410
4411 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4412 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4413 return -1;
4414 break;
4415
4416 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4417 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4418 return -1;
4419 break;
4420
4421 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4422 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4423 return -1;
4424 break;
4425
4426 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4427 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4428 return -1;
4429 break;
4430
4431 default:
4432 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4433 (int)tmp, paddress (gdbarch, addr));
4434 return -1;
4435 }
4436 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4437 return -1;
4438 break;
4439
4440 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4441 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4442 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4443 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4444 tmp &= 0x7f;
4445 switch (tmp)
4446 {
4447 case 0x00: /* KMCTR-Query */
4448 if (record_full_arch_list_add_mem (oaddr, 16))
4449 return -1;
4450 break;
4451
4452 case 0x01: /* KMCTR-DEA */
4453 case 0x02: /* KMCTR-TDEA-128 */
4454 case 0x03: /* KMCTR-TDEA-192 */
4455 case 0x09: /* KMCTR-Encrypted-DEA */
4456 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4457 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4458 case 0x12: /* KMCTR-AES-128 */
4459 case 0x13: /* KMCTR-AES-192 */
4460 case 0x14: /* KMCTR-AES-256 */
4461 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4462 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4463 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4464 break;
4465
4466 default:
4467 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4468 (int)tmp, paddress (gdbarch, addr));
4469 return -1;
4470 }
4471 if (tmp != 0)
4472 {
4473 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4474 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4475 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4476 if (record_full_arch_list_add_mem (oaddr2, tmp))
4477 return -1;
4478 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4479 return -1;
4480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4481 return -1;
4482 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4483 return -1;
4484 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4485 return -1;
4486 }
4487 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4488 return -1;
4489 break;
4490
4491 case 0xb92e: /* KM - cipher message [partial] */
4492 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4493 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4494 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4495 tmp &= 0x7f;
4496 switch (tmp)
4497 {
4498 case 0x00: /* KM-Query */
4499 if (record_full_arch_list_add_mem (oaddr, 16))
4500 return -1;
4501 break;
4502
4503 case 0x01: /* KM-DEA */
4504 case 0x02: /* KM-TDEA-128 */
4505 case 0x03: /* KM-TDEA-192 */
4506 case 0x09: /* KM-Encrypted-DEA */
4507 case 0x0a: /* KM-Encrypted-TDEA-128 */
4508 case 0x0b: /* KM-Encrypted-TDEA-192 */
4509 case 0x12: /* KM-AES-128 */
4510 case 0x13: /* KM-AES-192 */
4511 case 0x14: /* KM-AES-256 */
4512 case 0x1a: /* KM-Encrypted-AES-128 */
4513 case 0x1b: /* KM-Encrypted-AES-192 */
4514 case 0x1c: /* KM-Encrypted-AES-256 */
4515 break;
4516
4517 case 0x32: /* KM-XTS-AES-128 */
4518 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4519 return -1;
4520 break;
4521
4522 case 0x34: /* KM-XTS-AES-256 */
4523 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4524 return -1;
4525 break;
4526
4527 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4528 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4529 return -1;
4530 break;
4531
4532 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4533 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4534 return -1;
4535 break;
4536
4537 default:
4538 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4539 (int)tmp, paddress (gdbarch, addr));
4540 return -1;
4541 }
4542 if (tmp != 0)
4543 {
4544 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4545 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4546 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4547 if (record_full_arch_list_add_mem (oaddr2, tmp))
4548 return -1;
4549 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4550 return -1;
4551 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4552 return -1;
4553 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4554 return -1;
4555 }
4556 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4557 return -1;
4558 break;
4559
4560 /* 0xb932-0xb93b undefined */
4561
4562 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4563 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4564 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4565 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4566 tmp &= 0xff;
4567 switch (tmp)
4568 {
4569 case 0x00: /* PPNO-Query */
4570 case 0x80: /* PPNO-Query */
4571 if (record_full_arch_list_add_mem (oaddr, 16))
4572 return -1;
4573 break;
4574
4575 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4576 if (record_full_arch_list_add_mem (oaddr, 240))
4577 return -1;
4578 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4579 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4580 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4581 if (record_full_arch_list_add_mem (oaddr2, tmp))
4582 return -1;
4583 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4584 return -1;
4585 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4586 return -1;
4587 break;
4588
4589 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4590 if (record_full_arch_list_add_mem (oaddr, 240))
4591 return -1;
4592 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4593 return -1;
4594 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4595 return -1;
4596 break;
4597
4598 default:
4599 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4600 (int)tmp, paddress (gdbarch, addr));
4601 return -1;
4602 }
4603 /* DXC may be written */
4604 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4605 return -1;
4606 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4607 return -1;
4608 break;
4609
4610 /* 0xb93d undefined */
4611
4612 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4613 case 0xb93f: /* KLMD - compute last message digest [partial] */
4614 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4615 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4616 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4617 tmp &= 0xff;
4618 switch (tmp)
4619 {
4620 case 0x00: /* K*MD-Query */
4621 if (record_full_arch_list_add_mem (oaddr, 16))
4622 return -1;
4623 break;
4624
4625 case 0x01: /* K*MD-SHA-1 */
4626 if (record_full_arch_list_add_mem (oaddr, 20))
4627 return -1;
4628 break;
4629
4630 case 0x02: /* K*MD-SHA-256 */
4631 if (record_full_arch_list_add_mem (oaddr, 32))
4632 return -1;
4633 break;
4634
4635 case 0x03: /* K*MD-SHA-512 */
4636 if (record_full_arch_list_add_mem (oaddr, 64))
4637 return -1;
4638 break;
4639
4640 case 0x41: /* KIMD-GHASH */
4641 /* Only valid for KIMD. */
4642 if (insn[0] == 0xb93e)
4643 {
4644 if (record_full_arch_list_add_mem (oaddr, 16))
4645 return -1;
4646 break;
4647 }
86a73007
TT
4648 /* For KLMD... */
4649 /* Fall through. */
ef8914a4
PR
4650 default:
4651 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4652 (int)tmp, paddress (gdbarch, addr));
4653 return -1;
4654 }
4655 if (tmp != 0)
4656 {
4657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4658 return -1;
4659 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4660 return -1;
4661 }
4662 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4663 return -1;
4664 break;
4665
4666 /* 0xb940 undefined */
4667 /* 0xb944-0xb945 undefined */
4668 /* 0xb947-0xb948 undefined */
4669 /* 0xb94c-0xb950 undefined */
4670 /* 0xb954-0xb958 undefined */
4671 /* 0xb95c-0xb95f undefined */
4672 /* 0xb962-0xb971 undefined */
4673 /* 0xb974-0xb97f undefined */
4674
4675 case 0xb983: /* FLOGR - find leftmost one */
4676 /* 64-bit gpr pair destination + flags */
4677 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4678 return -1;
4679 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4680 return -1;
4681 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4682 return -1;
4683 break;
4684
4685 /* 0xb98a privileged */
4686 /* 0xb98b-0xb98c undefined */
4687
4688 case 0xb98d: /* EPSW - extract psw */
4689 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4690 return -1;
4691 if (inib[7])
4692 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4693 return -1;
4694 break;
4695
4696 /* 0xb98e-0xb98f privileged */
4697
4698 case 0xb990: /* TRTT - translate two to two [partial] */
4699 case 0xb991: /* TRTO - translate two to one [partial] */
4700 case 0xb992: /* TROT - translate one to two [partial] */
4701 case 0xb993: /* TROO - translate one to one [partial] */
4702 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4703 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4704 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4705 /* tmp is source length, we want destination length. Adjust. */
4706 if (insn[0] == 0xb991)
4707 tmp >>= 1;
4708 if (insn[0] == 0xb992)
4709 tmp <<= 1;
4710 if (record_full_arch_list_add_mem (oaddr, tmp))
4711 return -1;
4712 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4713 return -1;
4714 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4715 return -1;
4716 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4717 return -1;
4718 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4719 return -1;
4720 break;
4721
4722 case 0xb996: /* MLR - multiply logical */
4723 case 0xb997: /* DLR - divide logical */
4724 /* 32-bit gpr pair destination */
4725 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4726 return -1;
4727 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4728 return -1;
4729 break;
4730
4731 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4732 /* 0xb9b4-0xb9bc undefined */
4733
4734 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4735 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4736 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4737 return -1;
4738 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4739 return -1;
4740 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4741 return -1;
4742 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4743 return -1;
4744 break;
4745
4746 /* 0xb9c0-0xb9c7 undefined */
4747
4748 case 0xb9c8: /* AHHHR - add high */
4749 case 0xb9c9: /* SHHHR - subtract high */
4750 case 0xb9ca: /* ALHHHR - add logical high */
4751 case 0xb9cb: /* SLHHHR - subtract logical high */
4752 case 0xb9d8: /* AHHLR - add high */
4753 case 0xb9d9: /* SHHLR - subtract high */
4754 case 0xb9da: /* ALHHLR - add logical high */
4755 case 0xb9db: /* SLHHLR - subtract logical high */
4756 /* 32-bit high gpr destination + flags */
4757 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4758 return -1;
4759 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4760 return -1;
4761 break;
4762
4763 /* 0xb9cc undefined */
4764 /* 0xb9ce undefined */
4765 /* 0xb9d0-0xb9d7 undefined */
4766 /* 0xb9dc undefined */
4767 /* 0xb9de undefined */
4768
4769 case 0xb9e0: /* LOCFHR - load high on condition */
4770 /* 32-bit high gpr destination */
4771 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4772 return -1;
4773 break;
4774
4775 /* 0xb9e3 undefined */
4776 /* 0xb9e5 undefined */
4777 /* 0xb9ee-0xb9f1 undefined */
4778 /* 0xb9f3 undefined */
4779 /* 0xb9f5 undefined */
4780 /* 0xb9fc undefined */
4781 /* 0xb9fe -0xb9ff undefined */
4782
4783 default:
4784 goto UNKNOWN_OP;
4785 }
4786 break;
4787
4788 /* 0xb4-0xb5 undefined */
4789 /* 0xb6 privileged: STCTL - store control */
4790 /* 0xb7 privileged: LCTL - load control */
4791 /* 0xb8 undefined */
4792
4793 case 0xba: /* CS - compare and swap */
4794 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4795 if (record_full_arch_list_add_mem (oaddr, 4))
4796 return -1;
4797 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4798 return -1;
4799 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4800 return -1;
4801 break;
4802
4803 case 0xbb: /* CDS - compare double and swap */
4804 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4805 if (record_full_arch_list_add_mem (oaddr, 8))
4806 return -1;
4807 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4808 return -1;
4809 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4810 return -1;
4811 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4812 return -1;
4813 break;
4814
4815 /* 0xbc undefined */
4816
4817 case 0xbe: /* STCM - store characters under mask */
4818 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4819 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4820 return -1;
4821 break;
4822
4823 case 0xc0:
4824 case 0xc2:
4825 case 0xc4:
4826 case 0xc6:
4827 case 0xcc:
4828 /* RIL-format instruction */
4829 switch (ibyte[0] << 4 | inib[3])
4830 {
4831 case 0xc00: /* LARL - load address relative long */
4832 case 0xc05: /* BRASL - branch relative and save long */
4833 case 0xc09: /* IILF - insert immediate */
4834 case 0xc21: /* MSFI - multiply single immediate */
4835 case 0xc42: /* LLHRL - load logical halfword relative long */
4836 case 0xc45: /* LHRL - load halfword relative long */
4837 case 0xc4d: /* LRL - load relative long */
4838 /* 32-bit or native gpr destination */
4839 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4840 return -1;
4841 break;
4842
4843 case 0xc01: /* LGFI - load immediate */
4844 case 0xc0e: /* LLIHF - load logical immediate */
4845 case 0xc0f: /* LLILF - load logical immediate */
4846 case 0xc20: /* MSGFI - multiply single immediate */
4847 case 0xc44: /* LGHRL - load halfword relative long */
4848 case 0xc46: /* LLGHRL - load logical halfword relative long */
4849 case 0xc48: /* LGRL - load relative long */
4850 case 0xc4c: /* LGFRL - load relative long */
4851 case 0xc4e: /* LLGFRL - load logical relative long */
4852 /* 64-bit gpr destination */
4853 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4854 return -1;
4855 break;
4856
4857 /* 0xc02-0xc03 undefined */
4858
4859 case 0xc04: /* BRCL - branch relative on condition long */
4860 case 0xc62: /* PFDRL - prefetch data relative long */
4861 break;
4862
4863 case 0xc06: /* XIHF - xor immediate */
4864 case 0xc0a: /* NIHF - and immediate */
4865 case 0xc0c: /* OIHF - or immediate */
4866 case 0xcc8: /* AIH - add immediate high */
4867 case 0xcca: /* ALSIH - add logical with signed immediate high */
4868 /* 32-bit high gpr destination + flags */
4869 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4870 return -1;
4871 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4872 return -1;
4873 break;
4874
4875 case 0xc07: /* XILF - xor immediate */
4876 case 0xc0b: /* NILF - and immediate */
4877 case 0xc0d: /* OILF - or immediate */
4878 case 0xc25: /* SLFI - subtract logical immediate */
4879 case 0xc29: /* AFI - add immediate */
4880 case 0xc2b: /* ALFI - add logical immediate */
4881 /* 32-bit gpr destination + flags */
4882 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4883 return -1;
4884 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4885 return -1;
4886 break;
4887
4888 case 0xc08: /* IIHF - insert immediate */
4889 case 0xcc6: /* BRCTH - branch relative on count high */
4890 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4891 /* 32-bit high gpr destination */
4892 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4893 return -1;
4894 break;
4895
4896 /* 0xc22-0xc23 undefined */
4897
4898 case 0xc24: /* SLGFI - subtract logical immediate */
4899 case 0xc28: /* AGFI - add immediate */
4900 case 0xc2a: /* ALGFI - add logical immediate */
4901 /* 64-bit gpr destination + flags */
4902 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4903 return -1;
4904 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4905 return -1;
4906 break;
4907
4908 /* 0xc26-0xc27 undefined */
4909
4910 case 0xc2c: /* CGFI - compare immediate */
4911 case 0xc2d: /* CFI - compare immediate */
4912 case 0xc2e: /* CLGFI - compare logical immediate */
4913 case 0xc2f: /* CLFI - compare logical immediate */
4914 case 0xc64: /* CGHRL - compare halfword relative long */
4915 case 0xc65: /* CHRL - compare halfword relative long */
4916 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4917 case 0xc67: /* CLHRL - compare logical halfword relative long */
4918 case 0xc68: /* CGRL - compare relative long */
4919 case 0xc6a: /* CLGRL - compare logical relative long */
4920 case 0xc6c: /* CGFRL - compare relative long */
4921 case 0xc6d: /* CRL - compare relative long */
4922 case 0xc6e: /* CLGFRL - compare logical relative long */
4923 case 0xc6f: /* CLRL - compare logical relative long */
4924 case 0xccd: /* CIH - compare immediate high */
4925 case 0xccf: /* CLIH - compare logical immediate high */
4926 /* flags only */
4927 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4928 return -1;
4929 break;
4930
4931 /* 0xc40-0xc41 undefined */
4932 /* 0xc43 undefined */
4933
4934 case 0xc47: /* STHRL - store halfword relative long */
4935 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4936 if (record_full_arch_list_add_mem (oaddr, 2))
4937 return -1;
4938 break;
4939
4940 /* 0xc49-0xc4a undefined */
4941
4942 case 0xc4b: /* STGRL - store relative long */
4943 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4944 if (record_full_arch_list_add_mem (oaddr, 8))
4945 return -1;
4946 break;
4947
4948 case 0xc4f: /* STRL - store relative long */
4949 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4950 if (record_full_arch_list_add_mem (oaddr, 4))
4951 return -1;
4952 break;
4953
4954 case 0xc60: /* EXRL - execute relative long */
4955 if (ex != -1)
4956 {
4957 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4958 paddress (gdbarch, addr));
4959 return -1;
4960 }
4961 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4962 if (inib[2])
4963 {
4964 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4965 ex = tmp & 0xff;
4966 }
4967 else
4968 {
4969 ex = 0;
4970 }
4971 goto ex;
4972
4973 /* 0xc61 undefined */
4974 /* 0xc63 undefined */
4975 /* 0xc69 undefined */
4976 /* 0xc6b undefined */
4977 /* 0xcc0-0xcc5 undefined */
4978 /* 0xcc7 undefined */
4979 /* 0xcc9 undefined */
4980 /* 0xccc undefined */
4981 /* 0xcce undefined */
4982
4983 default:
4984 goto UNKNOWN_OP;
4985 }
4986 break;
4987
4988 /* 0xc1 undefined */
4989 /* 0xc3 undefined */
4990
4991 case 0xc5: /* BPRP - branch prediction relative preload */
4992 case 0xc7: /* BPP - branch prediction preload */
4993 /* no visible effect */
4994 break;
4995
4996 case 0xc8:
4997 /* SSF-format instruction */
4998 switch (ibyte[0] << 4 | inib[3])
4999 {
5000 /* 0xc80 unsupported */
5001
5002 case 0xc81: /* ECTG - extract cpu time */
5003 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5004 return -1;
5005 if (s390_record_gpr_g (gdbarch, regcache, 0))
5006 return -1;
5007 if (s390_record_gpr_g (gdbarch, regcache, 1))
5008 return -1;
5009 break;
5010
5011 case 0xc82: /* CSST - compare and swap and store */
5012 {
5013 uint8_t fc, sc;
5014 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5015 fc = tmp & 0xff;
5016 sc = tmp >> 8 & 0xff;
5017
5018 /* First and third operands. */
5019 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5020 switch (fc)
5021 {
5022 case 0x00: /* 32-bit */
5023 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5024 return -1;
5025 if (record_full_arch_list_add_mem (oaddr, 4))
5026 return -1;
5027 break;
5028
5029 case 0x01: /* 64-bit */
5030 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5031 return -1;
5032 if (record_full_arch_list_add_mem (oaddr, 8))
5033 return -1;
5034 break;
5035
5036 case 0x02: /* 128-bit */
5037 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5038 return -1;
5039 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5040 return -1;
5041 if (record_full_arch_list_add_mem (oaddr, 16))
5042 return -1;
5043 break;
5044
5045 default:
5046 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5047 fc, paddress (gdbarch, addr));
5048 return -1;
5049 }
5050
5051 /* Second operand. */
5052 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5053 if (sc > 4)
5054 {
5055 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5056 sc, paddress (gdbarch, addr));
5057 return -1;
5058 }
5059
5060 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5061 return -1;
5062
5063 /* Flags. */
5064 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5065 return -1;
5066 }
5067 break;
5068
5069 /* 0xc83 undefined */
5070
5071 case 0xc84: /* LPD - load pair disjoint */
5072 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5073 return -1;
5074 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5075 return -1;
5076 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5077 return -1;
5078 break;
5079
5080 case 0xc85: /* LPDG - load pair disjoint */
5081 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5082 return -1;
5083 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5084 return -1;
5085 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5086 return -1;
5087 break;
5088
5089 /* 0xc86-0xc8f undefined */
5090
5091 default:
5092 goto UNKNOWN_OP;
5093 }
5094 break;
5095
5096 /* 0xc9-0xcb undefined */
5097 /* 0xcd-0xcf undefined */
5098
5099 case 0xd0: /* TRTR - translate and test reversed */
5100 case 0xdd: /* TRT - translate and test */
5101 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5102 return -1;
5103 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5104 return -1;
5105 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5106 return -1;
5107 break;
5108
5109 case 0xd1: /* MVN - move numbers */
5110 case 0xd2: /* MVC - move */
5111 case 0xd3: /* MVZ - move zones */
5112 case 0xdc: /* TR - translate */
5113 case 0xe8: /* MVCIN - move inverse */
5114 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5115 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5116 return -1;
5117 break;
5118
5119 case 0xd4: /* NC - and */
5120 case 0xd6: /* OC - or*/
5121 case 0xd7: /* XC - xor */
5122 case 0xe2: /* UNPKU - unpack unicode */
5123 case 0xea: /* UNPKA - unpack ASCII */
5124 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5125 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5126 return -1;
5127 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5128 return -1;
5129 break;
5130
5131 case 0xde: /* ED - edit */
5132 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5133 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5134 return -1;
5135 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5136 return -1;
5137 /* DXC may be written */
5138 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5139 return -1;
5140 break;
5141
5142 case 0xdf: /* EDMK - edit and mark */
5143 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5144 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5145 return -1;
5146 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5147 return -1;
5148 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5149 return -1;
5150 /* DXC may be written */
5151 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5152 return -1;
5153 break;
5154
5155 /* 0xd8 undefined */
5156 /* 0xd9 unsupported: MVCK - move with key */
5157 /* 0xda unsupported: MVCP - move to primary */
5158 /* 0xdb unsupported: MVCS - move to secondary */
5159 /* 0xe0 undefined */
5160
5161 case 0xe1: /* PKU - pack unicode */
5162 case 0xe9: /* PKA - pack ASCII */
5163 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5164 if (record_full_arch_list_add_mem (oaddr, 16))
5165 return -1;
5166 break;
5167
5168 case 0xe3:
5169 case 0xe6:
5170 case 0xe7:
5171 case 0xeb:
5172 case 0xed:
5173 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5174 switch (ibyte[0] << 8 | ibyte[5])
5175 {
5176 /* 0xe300-0xe301 undefined */
5177
5178 case 0xe302: /* LTG - load and test */
5179 case 0xe308: /* AG - add */
5180 case 0xe309: /* SG - subtract */
5181 case 0xe30a: /* ALG - add logical */
5182 case 0xe30b: /* SLG - subtract logical */
5183 case 0xe318: /* AGF - add */
5184 case 0xe319: /* SGF - subtract */
5185 case 0xe31a: /* ALGF - add logical */
5186 case 0xe31b: /* SLGF - subtract logical */
5187 case 0xe332: /* LTGF - load and test */
5188 case 0xe380: /* NG - and */
5189 case 0xe381: /* OG - or */
5190 case 0xe382: /* XG - xor */
5191 case 0xe388: /* ALCG - add logical with carry */
5192 case 0xe389: /* SLBG - subtract logical with borrow */
5193 case 0xeb0a: /* SRAG - shift right single */
5194 case 0xeb0b: /* SLAG - shift left single */
5195 /* 64-bit gpr destination + flags */
5196 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5197 return -1;
5198 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5199 return -1;
5200 break;
5201
5202 /* 0xe303 privileged */
5203
5204 case 0xe304: /* LG - load */
5205 case 0xe30c: /* MSG - multiply single */
5206 case 0xe30f: /* LRVG - load reversed */
5207 case 0xe314: /* LGF - load */
5208 case 0xe315: /* LGH - load halfword */
5209 case 0xe316: /* LLGF - load logical */
5210 case 0xe317: /* LLGT - load logical thirty one bits */
5211 case 0xe31c: /* MSGF - multiply single */
5212 case 0xe32a: /* LZRG - load and zero rightmost byte */
5213 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5214 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5215 case 0xe346: /* BCTG - branch on count */
5216 case 0xe377: /* LGB - load byte */
5217 case 0xe390: /* LLGC - load logical character */
5218 case 0xe391: /* LLGH - load logical halfword */
5219 case 0xeb0c: /* SRLG - shift right single logical */
5220 case 0xeb0d: /* SLLG - shift left single logical */
5221 case 0xeb1c: /* RLLG - rotate left single logical */
5222 case 0xeb44: /* BXHG - branch on index high */
5223 case 0xeb45: /* BXLEG - branch on index low or equal */
5224 case 0xeb4c: /* ECAG - extract cpu attribute */
5225 case 0xebe2: /* LOCG - load on condition */
5226 /* 64-bit gpr destination */
5227 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5228 return -1;
5229 break;
5230
5231 /* 0xe305 undefined */
5232
5233 case 0xe306: /* CVBY - convert to binary */
5234 /* 32-bit or native gpr destination + FPC (DXC write) */
5235 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5236 return -1;
5237 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5238 return -1;
5239 break;
5240
5241 /* 0xe307 undefined */
5242
5243 case 0xe30d: /* DSG - divide single */
5244 case 0xe31d: /* DSGF - divide single */
5245 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5246 case 0xe386: /* MLG - multiply logical */
5247 case 0xe387: /* DLG - divide logical */
5248 case 0xe38f: /* LPQ - load pair from quadword */
5249 /* 64-bit gpr pair destination */
5250 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5251 return -1;
5252 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5253 return -1;
5254 break;
5255
5256 case 0xe30e: /* CVBG - convert to binary */
5257 /* 64-bit gpr destination + FPC (DXC write) */
5258 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5259 return -1;
5260 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5261 return -1;
5262 break;
5263
5264 /* 0xe310-0xe311 undefined */
5265
5266 case 0xe312: /* LT - load and test */
5267 case 0xe338: /* AGH - add halfword to 64 bit value */
5268 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5269 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5270 case 0xe354: /* NY - and */
5271 case 0xe356: /* OY - or */
5272 case 0xe357: /* XY - xor */
5273 case 0xe35a: /* AY - add */
5274 case 0xe35b: /* SY - subtract */
5275 case 0xe35e: /* ALY - add logical */
5276 case 0xe35f: /* SLY - subtract logical */
5277 case 0xe37a: /* AHY - add halfword */
5278 case 0xe37b: /* SHY - subtract halfword */
5279 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5280 case 0xe398: /* ALC - add logical with carry */
5281 case 0xe399: /* SLB - subtract logical with borrow */
5282 case 0xe727: /* LCBB - load count to block bounduary */
5283 case 0xeb81: /* ICMY - insert characters under mask */
5284 case 0xebdc: /* SRAK - shift left single */
5285 case 0xebdd: /* SLAK - shift left single */
5286 /* 32/64-bit gpr destination + flags */
5287 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5288 return -1;
5289 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5290 return -1;
5291 break;
5292
5293 /* 0xe313 privileged */
5294
5295 case 0xe31e: /* LRV - load reversed */
5296 case 0xe31f: /* LRVH - load reversed */
5297 case 0xe33b: /* LZRF - load and zero rightmost byte */
5298 case 0xe351: /* MSY - multiply single */
5299 case 0xe358: /* LY - load */
5300 case 0xe371: /* LAY - load address */
5301 case 0xe373: /* ICY - insert character */
5302 case 0xe376: /* LB - load byte */
5303 case 0xe378: /* LHY - load */
5304 case 0xe37c: /* MHY - multiply halfword */
5305 case 0xe394: /* LLC - load logical character */
5306 case 0xe395: /* LLH - load logical halfword */
5307 case 0xeb1d: /* RLL - rotate left single logical */
5308 case 0xebde: /* SRLK - shift left single logical */
5309 case 0xebdf: /* SLLK - shift left single logical */
5310 case 0xebf2: /* LOC - load on condition */
5311 /* 32-bit or native gpr destination */
5312 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5313 return -1;
5314 break;
5315
5316 case 0xe320: /* CG - compare */
5317 case 0xe321: /* CLG - compare logical */
5318 case 0xe330: /* CGF - compare */
5319 case 0xe331: /* CLGF - compare logical */
5320 case 0xe334: /* CGH - compare halfword */
5321 case 0xe355: /* CLY - compare logical */
5322 case 0xe359: /* CY - compare */
5323 case 0xe379: /* CHY - compare halfword */
5324 case 0xe3cd: /* CHF - compare high */
5325 case 0xe3cf: /* CLHF - compare logical high */
5326 case 0xeb20: /* CLMH - compare logical under mask high */
5327 case 0xeb21: /* CLMY - compare logical under mask */
5328 case 0xeb51: /* TMY - test under mask */
5329 case 0xeb55: /* CLIY - compare logical */
5330 case 0xebc0: /* TP - test decimal */
5331 case 0xed10: /* TCEB - test data class */
5332 case 0xed11: /* TCDB - test data class */
5333 case 0xed12: /* TCXB - test data class */
5334 case 0xed50: /* TDCET - test data class */
5335 case 0xed51: /* TDGET - test data group */
5336 case 0xed54: /* TDCDT - test data class */
5337 case 0xed55: /* TDGDT - test data group */
5338 case 0xed58: /* TDCXT - test data class */
5339 case 0xed59: /* TDGXT - test data group */
5340 /* flags only */
5341 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5342 return -1;
5343 break;
5344
5345 /* 0xe322-0xe323 undefined */
5346
5347 case 0xe324: /* STG - store */
5348 case 0xe325: /* NTSTG - nontransactional store */
5349 case 0xe326: /* CVDY - convert to decimal */
5350 case 0xe32f: /* STRVG - store reversed */
5351 case 0xebe3: /* STOCG - store on condition */
5352 case 0xed67: /* STDY - store */
5353 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5354 if (record_full_arch_list_add_mem (oaddr, 8))
5355 return -1;
5356 break;
5357
5358 /* 0xe327-0xe329 undefined */
5359 /* 0xe32b-0xe32d undefined */
5360
5361 case 0xe32e: /* CVDG - convert to decimal */
5362 case 0xe38e: /* STPQ - store pair to quadword */
5363 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5364 if (record_full_arch_list_add_mem (oaddr, 16))
5365 return -1;
5366 break;
5367
5368 /* 0xe333 undefined */
5369 /* 0xe335 undefined */
5370
5371 case 0xe336: /* PFD - prefetch data */
5372 break;
5373
5374 /* 0xe337 undefined */
5375 /* 0xe33c-0xe33d undefined */
5376
5377 case 0xe33e: /* STRV - store reversed */
5378 case 0xe350: /* STY - store */
5379 case 0xe3cb: /* STFH - store high */
5380 case 0xebe1: /* STOCFH - store high on condition */
5381 case 0xebf3: /* STOC - store on condition */
5382 case 0xed66: /* STEY - store */
5383 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5384 if (record_full_arch_list_add_mem (oaddr, 4))
5385 return -1;
5386 break;
5387
5388 case 0xe33f: /* STRVH - store reversed */
5389 case 0xe370: /* STHY - store halfword */
5390 case 0xe3c7: /* STHH - store halfword high */
5391 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5392 if (record_full_arch_list_add_mem (oaddr, 2))
5393 return -1;
5394 break;
5395
5396 /* 0xe340-0xe345 undefined */
5397
5398 case 0xe347: /* BIC - branch indirect on condition */
5399 break;
5400
5401 /* 0xe348-0xe34f undefined */
5402 /* 0xe352 undefined */
5403
5404 case 0xe35c: /* MFY - multiply */
5405 case 0xe396: /* ML - multiply logical */
5406 case 0xe397: /* DL - divide logical */
5407 /* 32-bit gpr pair destination */
5408 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5409 return -1;
5410 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5411 return -1;
5412 break;
5413
5414 /* 0xe35d undefined */
5415 /* 0xe360-0xe36f undefined */
5416
5417 case 0xe372: /* STCY - store character */
5418 case 0xe3c3: /* STCH - store character high */
5419 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5420 if (record_full_arch_list_add_mem (oaddr, 1))
5421 return -1;
5422 break;
5423
5424 /* 0xe374 undefined */
5425
5426 case 0xe375: /* LAEY - load address extended */
5427 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5428 return -1;
5429 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5430 return -1;
5431 break;
5432
5433 /* 0xe37d-0xe37f undefined */
5434
5435 case 0xe385: /* LGAT - load and trap */
5436 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5437 case 0xe39d: /* LLGFAT - load logical and trap */
5438 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5439 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5440 case 0xe721: /* VLGV - vector load gr from vr element */
5441 /* 64-bit gpr destination + fpc for possible DXC write */
5442 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5443 return -1;
5444 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5445 return -1;
5446 break;
5447
5448 /* 0xe38a-0xe38d undefined */
5449 /* 0xe392-0xe393 undefined */
5450 /* 0xe39a-0xe39b undefined */
5451 /* 0xe39e undefined */
5452
5453 case 0xe39f: /* LAT - load and trap */
5454 /* 32-bit gpr destination + fpc for possible DXC write */
5455 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5456 return -1;
5457 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5458 return -1;
5459 break;
5460
5461 /* 0xe3a0-0xe3bf undefined */
5462
5463 case 0xe3c0: /* LBH - load byte high */
5464 case 0xe3c2: /* LLCH - load logical character high */
5465 case 0xe3c4: /* LHH - load halfword high */
5466 case 0xe3c6: /* LLHH - load logical halfword high */
5467 case 0xe3ca: /* LFH - load high */
5468 case 0xebe0: /* LOCFH - load high on condition */
5469 /* 32-bit high gpr destination */
5470 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5471 return -1;
5472 break;
5473
5474 /* 0xe3c1 undefined */
5475 /* 0xe3c5 undefined */
5476
5477 case 0xe3c8: /* LFHAT - load high and trap */
5478 /* 32-bit high gpr destination + fpc for possible DXC write */
5479 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5480 return -1;
5481 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5482 return -1;
5483 break;
5484
5485 /* 0xe3c9 undefined */
5486 /* 0xe3cc undefined */
5487 /* 0xe3ce undefined */
5488 /* 0xe3d0-0xe3ff undefined */
5489
5490 case 0xe634: /* VPKZ - vector pack zoned */
5491 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5492 case 0xe637: /* VLRLR - vector load rightmost with length */
5493 case 0xe649: /* VLIP - vector load immediate decimal */
5494 case 0xe700: /* VLEB - vector load element */
5495 case 0xe701: /* VLEH - vector load element */
5496 case 0xe702: /* VLEG - vector load element */
5497 case 0xe703: /* VLEF - vector load element */
5498 case 0xe704: /* VLLEZ - vector load logical element and zero */
5499 case 0xe705: /* VLREP - vector load and replicate */
5500 case 0xe706: /* VL - vector load */
5501 case 0xe707: /* VLBB - vector load to block bounduary */
5502 case 0xe712: /* VGEG - vector gather element */
5503 case 0xe713: /* VGEF - vector gather element */
5504 case 0xe722: /* VLVG - vector load vr element from gr */
5505 case 0xe730: /* VESL - vector element shift left */
5506 case 0xe733: /* VERLL - vector element rotate left logical */
5507 case 0xe737: /* VLL - vector load with length */
5508 case 0xe738: /* VESRL - vector element shift right logical */
5509 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5510 case 0xe740: /* VLEIB - vector load element immediate */
5511 case 0xe741: /* VLEIH - vector load element immediate */
5512 case 0xe742: /* VLEIG - vector load element immediate */
5513 case 0xe743: /* VLEIF - vector load element immediate */
5514 case 0xe744: /* VGBM - vector generate byte mask */
5515 case 0xe745: /* VREPI - vector replicate immediate */
5516 case 0xe746: /* VGM - vector generate mask */
5517 case 0xe74d: /* VREP - vector replicate */
5518 case 0xe750: /* VPOPCT - vector population count */
5519 case 0xe752: /* VCTZ - vector count trailing zeros */
5520 case 0xe753: /* VCLZ - vector count leading zeros */
5521 case 0xe756: /* VLR - vector load */
5522 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5523 case 0xe760: /* VMRL - vector merge low */
5524 case 0xe761: /* VMRH - vector merge high */
5525 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5526 case 0xe764: /* VSUM - vector sum across word */
5527 case 0xe765: /* VSUMG - vector sum across doubleword */
5528 case 0xe766: /* VCKSM - vector checksum */
5529 case 0xe767: /* VSUMQ - vector sum across quadword */
5530 case 0xe768: /* VN - vector and */
5531 case 0xe769: /* VNC - vector and with complement */
5532 case 0xe76a: /* VO - vector or */
5533 case 0xe76b: /* VNO - vector nor */
5534 case 0xe76c: /* VNX - vector not exclusive or */
5535 case 0xe76d: /* VX - vector xor */
5536 case 0xe76e: /* VNN - vector nand */
5537 case 0xe76f: /* VOC - vector or with complement */
5538 case 0xe770: /* VESLV - vector element shift left */
5539 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5540 case 0xe773: /* VERLLV - vector element rotate left logical */
5541 case 0xe774: /* VSL - vector shift left */
5542 case 0xe775: /* VSLB - vector shift left by byte */
5543 case 0xe777: /* VSLDB - vector shift left double by byte */
5544 case 0xe778: /* VESRLV - vector element shift right logical */
5545 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5546 case 0xe77c: /* VSRL - vector shift right logical */
5547 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5548 case 0xe77e: /* VSRA - vector shift right arithmetic */
5549 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5550 case 0xe784: /* VPDI - vector permute doubleword immediate */
5551 case 0xe785: /* VBPERM - vector bit permute */
5552 case 0xe78c: /* VPERM - vector permute */
5553 case 0xe78d: /* VSEL - vector select */
5554 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5555 case 0xe78f: /* VFMA - vector fp multiply and add */
5556 case 0xe794: /* VPK - vector pack */
5557 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5558 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5559 case 0xe7a1: /* VMLH - vector multiply logical high */
5560 case 0xe7a2: /* VML - vector multiply low */
5561 case 0xe7a3: /* VMH - vector multiply high */
5562 case 0xe7a4: /* VMLE - vector multiply logical even */
5563 case 0xe7a5: /* VMLO - vector multiply logical odd */
5564 case 0xe7a6: /* VME - vector multiply even */
5565 case 0xe7a7: /* VMO - vector multiply odd */
5566 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5567 case 0xe7aa: /* VMAL - vector multiply and add low */
5568 case 0xe7ab: /* VMAH - vector multiply and add high */
5569 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5570 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5571 case 0xe7ae: /* VMAE - vector multiply and add even */
5572 case 0xe7af: /* VMAO - vector multiply and add odd */
5573 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5574 case 0xe7b8: /* VMSL - vector multiply sum logical */
5575 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5576 case 0xe7bb: /* VAC - vector add with carry */
5577 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5578 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5579 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5580 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5581 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5582 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5583 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5584 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5585 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5586 case 0xe7c7: /* VFI - vector load fp integer */
5587 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5588 case 0xe7ce: /* VFSQ - vector fp square root */
5589 case 0xe7d4: /* VUPLL - vector unpack logical low */
5590 case 0xe7d6: /* VUPL - vector unpack low */
5591 case 0xe7d5: /* VUPLH - vector unpack logical high */
5592 case 0xe7d7: /* VUPH - vector unpack high */
5593 case 0xe7de: /* VLC - vector load complement */
5594 case 0xe7df: /* VLP - vector load positive */
5595 case 0xe7e2: /* VFA - vector fp subtract */
5596 case 0xe7e3: /* VFA - vector fp add */
5597 case 0xe7e5: /* VFD - vector fp divide */
5598 case 0xe7e7: /* VFM - vector fp multiply */
5599 case 0xe7ee: /* VFMIN - vector fp minimum */
5600 case 0xe7ef: /* VFMAX - vector fp maximum */
5601 case 0xe7f0: /* VAVGL - vector average logical */
5602 case 0xe7f1: /* VACC - vector add and compute carry */
5603 case 0xe7f2: /* VAVG - vector average */
5604 case 0xe7f3: /* VA - vector add */
5605 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5606 case 0xe7f7: /* VS - vector subtract */
5607 case 0xe7fc: /* VMNL - vector minimum logical */
5608 case 0xe7fd: /* VMXL - vector maximum logical */
5609 case 0xe7fe: /* VMN - vector minimum */
5610 case 0xe7ff: /* VMX - vector maximum */
5611 /* vector destination + FPC */
5612 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5613 return -1;
5614 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5615 return -1;
5616 break;
5617
5618 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5619 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5620 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5621 return -1;
5622 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5623 return -1;
5624 break;
5625
5626 case 0xe708: /* VSTEB - vector store element */
5627 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5628 if (record_full_arch_list_add_mem (oaddr, 1))
5629 return -1;
5630 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5631 return -1;
5632 break;
5633
5634 case 0xe709: /* VSTEH - vector store element */
5635 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5636 if (record_full_arch_list_add_mem (oaddr, 2))
5637 return -1;
5638 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5639 return -1;
5640 break;
5641
5642 case 0xe70a: /* VSTEG - vector store element */
5643 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5644 if (record_full_arch_list_add_mem (oaddr, 8))
5645 return -1;
5646 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5647 return -1;
5648 break;
5649
5650 case 0xe70b: /* VSTEF - vector store element */
5651 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5652 if (record_full_arch_list_add_mem (oaddr, 4))
5653 return -1;
5654 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5655 return -1;
5656 break;
5657
5658 /* 0xe70c-0xe70d undefined */
5659
5660 case 0xe70e: /* VST - vector store */
5661 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5662 if (record_full_arch_list_add_mem (oaddr, 16))
5663 return -1;
5664 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5665 return -1;
5666 break;
5667
5668 /* 0xe70f-0xe711 undefined */
5669 /* 0xe714-0xe719 undefined */
5670
5671 case 0xe71a: /* VSCEG - vector scatter element */
5672 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5673 return -1;
5674 if (record_full_arch_list_add_mem (oaddr, 8))
5675 return -1;
5676 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5677 return -1;
5678 break;
5679
5680 case 0xe71b: /* VSCEF - vector scatter element */
5681 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5682 return -1;
5683 if (record_full_arch_list_add_mem (oaddr, 4))
5684 return -1;
5685 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5686 return -1;
5687 break;
5688
5689 /* 0xe71c-0xe720 undefined */
5690 /* 0xe723-0xe726 undefined */
5691 /* 0xe728-0xe72f undefined */
5692 /* 0xe731-0xe732 undefined */
5693 /* 0xe734-0xe735 undefined */
5694
5695 case 0xe736: /* VLM - vector load multiple */
5696 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5697 if (s390_record_vr (gdbarch, regcache, i))
5698 return -1;
5699 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5700 return -1;
5701 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5702 return -1;
5703 break;
5704
5705 /* 0xe739 undefined */
5706 /* 0xe73b-0xe73d undefined */
5707
5708 case 0xe73e: /* VSTM - vector store multiple */
5709 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5710 if (ivec[0] <= ivec[1])
5711 n = ivec[1] - ivec[0] + 1;
5712 else
5713 n = ivec[1] + 0x20 - ivec[0] + 1;
5714 if (record_full_arch_list_add_mem (oaddr, n * 16))
5715 return -1;
5716 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5717 return -1;
5718 break;
5719
5720 case 0xe63c: /* VUPKZ - vector unpack zoned */
5721 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5722 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5723 return -1;
5724 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5725 return -1;
5726 break;
5727
5728 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5729 case 0xe73f: /* VSTL - vector store with length */
5730 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5731 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5732 tmp &= 0xffffffffu;
5733 if (tmp > 15)
5734 tmp = 15;
5735 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5736 return -1;
5737 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5738 return -1;
5739 break;
5740
5741 /* 0xe747-0xe749 undefined */
5742
5743 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5744 case 0xe659: /* VSRP - vector shift and round decimal */
5745 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5746 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5747 case 0xe671: /* VAP - vector add decimal */
5748 case 0xe673: /* VSP - vector subtract decimal */
5749 case 0xe678: /* VMP - vector multiply decimal */
5750 case 0xe679: /* VMSP - vector multiply decimal */
5751 case 0xe67a: /* VDP - vector divide decimal */
5752 case 0xe67b: /* VRP - vector remainder decimal */
5753 case 0xe67e: /* VSDP - vector shift and divide decimal */
5754 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5755 case 0xe75c: /* VISTR - vector isolate string */
5756 case 0xe780: /* VFEE - vector find element equal */
5757 case 0xe781: /* VFENE - vector find element not equal */
5758 case 0xe782: /* VFA - vector find any element equal */
5759 case 0xe78a: /* VSTRC - vector string range compare */
5760 case 0xe795: /* VPKLS - vector pack logical saturate */
5761 case 0xe797: /* VPKS - vector pack saturate */
5762 case 0xe7e8: /* VFCE - vector fp compare equal */
5763 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5764 case 0xe7eb: /* VFCH - vector fp compare high */
5765 case 0xe7f8: /* VCEQ - vector compare equal */
5766 case 0xe7f9: /* VCHL - vector compare high logical */
5767 case 0xe7fb: /* VCH - vector compare high */
5768 /* vector destination + flags + FPC */
5769 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5770 return -1;
5771 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5772 return -1;
5773 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5774 return -1;
5775 break;
5776
5777 case 0xe65f: /* VTP - vector test decimal */
5778 /* flags + FPC */
5779 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5780 return -1;
5781 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5782 return -1;
5783 break;
5784
5785 /* 0xe74b-0xe74c undefined */
5786 /* 0xe74e-0xe74f undefined */
5787 /* 0xe751 undefined */
5788 /* 0xe754-0xe755 undefined */
5789 /* 0xe757-0xe75b undefined */
5790 /* 0xe75d-0xe75e undefined */
5791 /* 0xe763 undefined */
5792 /* 0xe771 undefined */
5793 /* 0xe776 undefined */
5794 /* 0xe779 undefined */
5795 /* 0xe77b undefined */
5796 /* 0xe783 undefined */
5797 /* 0xe786-0xe789 undefined */
5798 /* 0xe78b undefined */
5799 /* 0xe790-0xe793 undefined */
5800 /* 0xe796 undefined */
5801 /* 0xe798-0xe79d undefined */
5802 /* 0xe7a0 undefined */
5803 /* 0xe7a8 undefined */
5804 /* 0xe7b0-0xe7b3 undefined */
5805 /* 0xe7b5-0xe7b7 undefined */
5806 /* 0xe7ba undefined */
5807 /* 0xe7be undefined */
5808 /* 0xe7c6 undefined */
5809 /* 0xe7c8-0xe7c9 undefined */
5810
5811 case 0xe677: /* VCP - vector compare decimal */
5812 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5813 case 0xe7cb: /* WFC - vector fp compare scalar */
5814 case 0xe7d8: /* VTM - vector test under mask */
5815 case 0xe7d9: /* VECL - vector element compare logical */
5816 case 0xe7db: /* VEC - vector element compare */
5817 case 0xed08: /* KEB - compare and signal */
5818 case 0xed09: /* CEB - compare */
5819 case 0xed18: /* KDB - compare and signal */
5820 case 0xed19: /* CDB - compare */
5821 /* flags + fpc only */
5822 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5823 return -1;
5824 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5825 return -1;
5826 break;
5827
5828 /* 0xe7cd undefined */
5829 /* 0xe7cf-0xe7d3 undefined */
5830 /* 0xe7da undefined */
5831 /* 0xe7dc-0xe7dd undefined */
5832 /* 0xe7e0-0xe7e1 undefined */
5833 /* 0xe7e4 undefined */
5834 /* 0xe7e6 undefined */
5835 /* 0xe7e9 undefined */
5836 /* 0xe7ec-0xe7ed undefined */
5837 /* 0xe7f4 undefined */
5838 /* 0xe7f6 undefined */
5839 /* 0xe7fa undefined */
5840
5841 /* 0xeb00-0xeb03 undefined */
5842
5843 case 0xeb04: /* LMG - load multiple */
5844 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5845 if (s390_record_gpr_g (gdbarch, regcache, i))
5846 return -1;
5847 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5848 return -1;
5849 break;
5850
5851 /* 0xeb05-0xeb09 undefined */
5852 /* 0xeb0e undefined */
5853 /* 0xeb0f privileged: TRACG */
5854 /* 0xeb10-0xeb13 undefined */
5855
5856 case 0xeb14: /* CSY - compare and swap */
5857 case 0xebf4: /* LAN - load and and */
5858 case 0xebf6: /* LAO - load and or */
5859 case 0xebf7: /* LAX - load and xor */
5860 case 0xebf8: /* LAA - load and add */
5861 case 0xebfa: /* LAAL - load and add logical */
5862 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5863 if (record_full_arch_list_add_mem (oaddr, 4))
5864 return -1;
5865 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5866 return -1;
5867 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5868 return -1;
5869 break;
5870
5871 /* 0xeb15-0xeb1b undefined */
5872 /* 0xeb1e-0xeb1f undefined */
5873 /* 0xeb22 undefined */
5874
5875 case 0xeb23: /* CLT - compare logical and trap */
5876 case 0xeb2b: /* CLGT - compare logical and trap */
5877 /* fpc only - including possible DXC write for trapping insns */
5878 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5879 return -1;
5880 break;
5881
5882 case 0xeb24: /* STMG - store multiple */
5883 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5884 if (inib[2] <= inib[3])
5885 n = inib[3] - inib[2] + 1;
5886 else
5887 n = inib[3] + 0x10 - inib[2] + 1;
5888 if (record_full_arch_list_add_mem (oaddr, n * 8))
5889 return -1;
5890 break;
5891
5892 /* 0xeb25 privileged */
5893
5894 case 0xeb26: /* STMH - store multiple high */
5895 case 0xeb90: /* STMY - store multiple */
5896 case 0xeb9b: /* STAMY - store access multiple */
5897 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5898 if (inib[2] <= inib[3])
5899 n = inib[3] - inib[2] + 1;
5900 else
5901 n = inib[3] + 0x10 - inib[2] + 1;
5902 if (record_full_arch_list_add_mem (oaddr, n * 4))
5903 return -1;
5904 break;
5905
5906 /* 0xeb27-0xeb2a undefined */
5907
5908 case 0xeb2c: /* STCMH - store characters under mask */
5909 case 0xeb2d: /* STCMY - store characters under mask */
5910 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5911 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5912 return -1;
5913 break;
5914
5915 /* 0xeb2e undefined */
5916 /* 0xeb2f privileged */
5917
5918 case 0xeb30: /* CSG - compare and swap */
5919 case 0xebe4: /* LANG - load and and */
5920 case 0xebe6: /* LAOG - load and or */
5921 case 0xebe7: /* LAXG - load and xor */
5922 case 0xebe8: /* LAAG - load and add */
5923 case 0xebea: /* LAALG - load and add logical */
5924 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5925 if (record_full_arch_list_add_mem (oaddr, 8))
5926 return -1;
5927 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5928 return -1;
5929 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5930 return -1;
5931 break;
5932
5933 case 0xeb31: /* CDSY - compare double and swap */
5934 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5935 if (record_full_arch_list_add_mem (oaddr, 8))
5936 return -1;
5937 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5938 return -1;
5939 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5940 return -1;
5941 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5942 return -1;
5943 break;
5944
5945 /* 0xeb32-0xeb3d undefined */
5946
5947 case 0xeb3e: /* CDSG - compare double and swap */
5948 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5949 if (record_full_arch_list_add_mem (oaddr, 16))
5950 return -1;
5951 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5952 return -1;
5953 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5954 return -1;
5955 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5956 return -1;
5957 break;
5958
5959 /* 0xeb3f-0xeb43 undefined */
5960 /* 0xeb46-0xeb4b undefined */
5961 /* 0xeb4d-0xeb50 undefined */
5962
5963 case 0xeb52: /* MVIY - move */
5964 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5965 if (record_full_arch_list_add_mem (oaddr, 1))
5966 return -1;
5967 break;
5968
5969 case 0xeb54: /* NIY - and */
5970 case 0xeb56: /* OIY - or */
5971 case 0xeb57: /* XIY - xor */
5972 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5973 if (record_full_arch_list_add_mem (oaddr, 1))
5974 return -1;
5975 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5976 return -1;
5977 break;
5978
5979 /* 0xeb53 undefined */
5980 /* 0xeb58-0xeb69 undefined */
5981
5982 case 0xeb6a: /* ASI - add immediate */
5983 case 0xeb6e: /* ALSI - add immediate */
5984 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5985 if (record_full_arch_list_add_mem (oaddr, 4))
5986 return -1;
5987 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5988 return -1;
5989 break;
5990
5991 /* 0xeb6b-0xeb6d undefined */
5992 /* 0xeb6f-0xeb79 undefined */
5993
5994 case 0xeb7a: /* AGSI - add immediate */
5995 case 0xeb7e: /* ALGSI - add immediate */
5996 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5997 if (record_full_arch_list_add_mem (oaddr, 8))
5998 return -1;
5999 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6000 return -1;
6001 break;
6002
6003 /* 0xeb7b-0xeb7d undefined */
6004 /* 0xeb7f undefined */
6005
6006 case 0xeb80: /* ICMH - insert characters under mask */
6007 /* 32-bit high gpr destination + flags */
6008 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6009 return -1;
6010 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6011 return -1;
6012 break;
6013
6014 /* 0xeb82-0xeb8d undefined */
6015
6016 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6017 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6018 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6019 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6020 if (record_full_arch_list_add_mem (oaddr, tmp))
6021 return -1;
6022 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6023 return -1;
6024 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6025 return -1;
6026 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6027 return -1;
6028 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6029 return -1;
6030 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6031 return -1;
6032 break;
6033
6034 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6035 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6036 return -1;
6037 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6038 return -1;
6039 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6040 return -1;
6041 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6042 return -1;
6043 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6044 return -1;
6045 break;
6046
6047 /* 0xeb91-0xeb95 undefined */
6048
6049 case 0xeb96: /* LMH - load multiple high */
6050 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6051 if (s390_record_gpr_h (gdbarch, regcache, i))
6052 return -1;
6053 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6054 return -1;
6055 break;
6056
6057 /* 0xeb97 undefined */
6058
6059 case 0xeb98: /* LMY - load multiple */
6060 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6061 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6062 return -1;
6063 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6064 return -1;
6065 break;
6066
6067 /* 0xeb99 undefined */
6068
6069 case 0xeb9a: /* LAMY - load access multiple */
6070 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6071 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6072 return -1;
6073 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6074 return -1;
6075 break;
6076
6077 /* 0xeb9c-0xebbf undefined */
6078 /* 0xebc1-0xebdb undefined */
6079 /* 0xebe5 undefined */
6080 /* 0xebe9 undefined */
6081 /* 0xebeb-0xebf1 undefined */
6082 /* 0xebf5 undefined */
6083 /* 0xebf9 undefined */
6084 /* 0xebfb-0xebff undefined */
6085
6086 /* 0xed00-0xed03 undefined */
6087
6088 case 0xed04: /* LDEB - load lengthened */
6089 case 0xed0c: /* MDEB - multiply */
6090 case 0xed0d: /* DEB - divide */
6091 case 0xed14: /* SQEB - square root */
6092 case 0xed15: /* SQDB - square root */
6093 case 0xed17: /* MEEB - multiply */
6094 case 0xed1c: /* MDB - multiply */
6095 case 0xed1d: /* DDB - divide */
6096 /* float destination + fpc */
6097 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6098 return -1;
6099 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6100 return -1;
6101 break;
6102
6103 case 0xed05: /* LXDB - load lengthened */
6104 case 0xed06: /* LXEB - load lengthened */
6105 case 0xed07: /* MXDB - multiply */
6106 /* float pair destination + fpc */
6107 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6108 return -1;
6109 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6110 return -1;
6111 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6112 return -1;
6113 break;
6114
6115 case 0xed0a: /* AEB - add */
6116 case 0xed0b: /* SEB - subtract */
6117 case 0xed1a: /* ADB - add */
6118 case 0xed1b: /* SDB - subtract */
6119 /* float destination + flags + fpc */
6120 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6121 return -1;
6122 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6123 return -1;
6124 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6125 return -1;
6126 break;
6127
6128 case 0xed0e: /* MAEB - multiply and add */
6129 case 0xed0f: /* MSEB - multiply and subtract */
6130 case 0xed1e: /* MADB - multiply and add */
6131 case 0xed1f: /* MSDB - multiply and subtract */
6132 case 0xed40: /* SLDT - shift significand left */
6133 case 0xed41: /* SRDT - shift significand right */
6134 case 0xedaa: /* CDZT - convert from zoned */
6135 case 0xedae: /* CDPT - convert from packed */
6136 /* float destination [RXF] + fpc */
6137 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6138 return -1;
6139 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6140 return -1;
6141 break;
6142
6143 /* 0xed13 undefined */
6144 /* 0xed16 undefined */
6145 /* 0xed20-0xed23 undefined */
6146
6147 case 0xed24: /* LDE - load lengthened */
6148 case 0xed34: /* SQE - square root */
6149 case 0xed35: /* SQD - square root */
6150 case 0xed37: /* MEE - multiply */
6151 case 0xed64: /* LEY - load */
6152 case 0xed65: /* LDY - load */
6153 /* float destination */
6154 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6155 return -1;
6156 break;
6157
6158 case 0xed25: /* LXD - load lengthened */
6159 case 0xed26: /* LXE - load lengthened */
6160 /* float pair destination */
6161 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6162 return -1;
6163 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6164 return -1;
6165 break;
6166
6167 /* 0xed27-0xed2d undefined */
6168
6169 case 0xed2e: /* MAE - multiply and add */
6170 case 0xed2f: /* MSE - multiply and subtract */
6171 case 0xed38: /* MAYL - multiply and add unnormalized */
6172 case 0xed39: /* MYL - multiply unnormalized */
6173 case 0xed3c: /* MAYH - multiply and add unnormalized */
6174 case 0xed3d: /* MYH - multiply unnormalized */
6175 case 0xed3e: /* MAD - multiply and add */
6176 case 0xed3f: /* MSD - multiply and subtract */
6177 /* float destination [RXF] */
6178 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6179 return -1;
6180 break;
6181
6182 /* 0xed30-0xed33 undefined */
6183 /* 0xed36 undefined */
6184
6185 case 0xed3a: /* MAY - multiply and add unnormalized */
6186 case 0xed3b: /* MY - multiply unnormalized */
6187 /* float pair destination [RXF] */
6188 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6189 return -1;
6190 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6191 return -1;
6192 break;
6193
6194 /* 0xed42-0xed47 undefind */
6195
6196 case 0xed48: /* SLXT - shift significand left */
6197 case 0xed49: /* SRXT - shift significand right */
6198 case 0xedab: /* CXZT - convert from zoned */
6199 case 0xedaf: /* CXPT - convert from packed */
6200 /* float pair destination [RXF] + fpc */
6201 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6202 return -1;
6203 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6204 return -1;
6205 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6206 return -1;
6207 break;
6208
6209 /* 0xed4a-0xed4f undefind */
6210 /* 0xed52-0xed53 undefind */
6211 /* 0xed56-0xed57 undefind */
6212 /* 0xed5a-0xed63 undefind */
6213 /* 0xed68-0xeda7 undefined */
6214
6215 case 0xeda8: /* CZDT - convert to zoned */
6216 case 0xeda9: /* CZXT - convert to zoned */
6217 case 0xedac: /* CPDT - convert to packed */
6218 case 0xedad: /* CPXT - convert to packed */
6219 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6220 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6221 return -1;
6222 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6223 return -1;
6224 break;
6225
6226 /* 0xedb0-0xedff undefined */
6227
6228 default:
6229 goto UNKNOWN_OP;
6230 }
6231 break;
6232
6233 /* 0xe4 undefined */
6234
6235 case 0xe5:
6236 /* SSE/SIL-format instruction */
6237 switch (insn[0])
6238 {
6239 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6240
6241 case 0xe544: /* MVHHI - move */
6242 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6243 if (record_full_arch_list_add_mem (oaddr, 2))
6244 return -1;
6245 break;
6246
6247 /* 0xe545-0xe547 undefined */
6248
6249 case 0xe548: /* MVGHI - move */
6250 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6251 if (record_full_arch_list_add_mem (oaddr, 8))
6252 return -1;
6253 break;
6254
6255 /* 0xe549-0xe54b undefined */
6256
6257 case 0xe54c: /* MVHI - move */
6258 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6259 if (record_full_arch_list_add_mem (oaddr, 4))
6260 return -1;
6261 break;
6262
6263 /* 0xe54d-0xe553 undefined */
6264
6265 case 0xe554: /* CHHSI - compare halfword immediate */
6266 case 0xe555: /* CLHHSI - compare logical immediate */
6267 case 0xe558: /* CGHSI - compare halfword immediate */
6268 case 0xe559: /* CLGHSI - compare logical immediate */
6269 case 0xe55c: /* CHSI - compare halfword immediate */
6270 case 0xe55d: /* CLFHSI - compare logical immediate */
6271 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6272 return -1;
6273 break;
6274
6275 /* 0xe556-0xe557 undefined */
6276 /* 0xe55a-0xe55b undefined */
6277 /* 0xe55e-0xe55f undefined */
6278
6279 case 0xe560: /* TBEGIN - transaction begin */
6280 /* The transaction will be immediately aborted after this
6281 instruction, due to single-stepping. This instruction is
6282 only supported so that the program can fail a few times
6283 and go to the non-transactional fallback. */
6284 if (inib[4])
6285 {
6286 /* Transaction diagnostic block - user. */
6287 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6288 if (record_full_arch_list_add_mem (oaddr, 256))
6289 return -1;
6290 }
6291 /* Transaction diagnostic block - supervisor. */
6292 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6293 return -1;
6294 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6295 return -1;
6296 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6297 return -1;
6298 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6299 return -1;
6300 for (i = 0; i < 16; i++)
6301 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6302 return -1;
6303 /* And flags. */
6304 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6305 return -1;
6306 break;
6307
6308 /* 0xe561 unsupported: TBEGINC */
6309 /* 0xe562-0xe5ff undefined */
6310
6311 default:
6312 goto UNKNOWN_OP;
6313 }
6314 break;
6315
6316 case 0xec:
6317 /* RIE/RIS/RRS-format instruction */
6318 switch (ibyte[0] << 8 | ibyte[5])
6319 {
6320 /* 0xec00-0xec41 undefined */
6321
6322 case 0xec42: /* LOCHI - load halfword immediate on condition */
6323 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6324 /* 32-bit or native gpr destination */
6325 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6326 return -1;
6327 break;
6328
6329 /* 0xec43 undefined */
6330
6331 case 0xec44: /* BRXHG - branch relative on index high */
6332 case 0xec45: /* BRXLG - branch relative on index low or equal */
6333 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6334 case 0xec59: /* RISBGN - rotate then insert selected bits */
6335 /* 64-bit gpr destination */
6336 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6337 return -1;
6338 break;
6339
6340 /* 0xec47-0xec4d undefined */
6341
6342 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6343 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6344 /* 32-bit high gpr destination */
6345 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6346 return -1;
6347 break;
6348
6349 /* 0xec4f-0xec50 undefined */
6350 /* 0xec52-0xec53 undefined */
6351
6352 case 0xec54: /* RNSBG - rotate then and selected bits */
6353 case 0xec55: /* RISBG - rotate then insert selected bits */
6354 case 0xec56: /* ROSBG - rotate then or selected bits */
6355 case 0xec57: /* RXSBG - rotate then xor selected bits */
6356 case 0xecd9: /* AGHIK - add immediate */
6357 case 0xecdb: /* ALGHSIK - add logical immediate */
6358 /* 64-bit gpr destination + flags */
6359 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6360 return -1;
6361 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6362 return -1;
6363 break;
6364
6365 /* 0xec58 undefined */
6366 /* 0xec5a-0xec5c undefined */
6367 /* 0xec5e-0xec63 undefined */
6368
6369 case 0xec64: /* CGRJ - compare and branch relative */
6370 case 0xec65: /* CLGRJ - compare logical and branch relative */
6371 case 0xec76: /* CRJ - compare and branch relative */
6372 case 0xec77: /* CLRJ - compare logical and branch relative */
6373 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6374 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6375 case 0xec7e: /* CIJ - compare immediate and branch relative */
6376 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6377 case 0xece4: /* CGRB - compare and branch */
6378 case 0xece5: /* CLGRB - compare logical and branch */
6379 case 0xecf6: /* CRB - compare and branch */
6380 case 0xecf7: /* CLRB - compare logical and branch */
6381 case 0xecfc: /* CGIB - compare immediate and branch */
6382 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6383 case 0xecfe: /* CIB - compare immediate and branch */
6384 case 0xecff: /* CLIB - compare logical immediate and branch */
6385 break;
6386
6387 /* 0xec66-0xec6f undefined */
6388
6389 case 0xec70: /* CGIT - compare immediate and trap */
6390 case 0xec71: /* CLGIT - compare logical immediate and trap */
6391 case 0xec72: /* CIT - compare immediate and trap */
6392 case 0xec73: /* CLFIT - compare logical immediate and trap */
6393 /* fpc only - including possible DXC write for trapping insns */
6394 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6395 return -1;
6396 break;
6397
6398 /* 0xec74-0xec75 undefined */
6399 /* 0xec78-0xec7b undefined */
6400
6401 /* 0xec80-0xecd7 undefined */
6402
6403 case 0xecd8: /* AHIK - add immediate */
6404 case 0xecda: /* ALHSIK - add logical immediate */
6405 /* 32-bit gpr destination + flags */
6406 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6407 return -1;
6408 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6409 return -1;
6410 break;
6411
6412 /* 0xecdc-0xece3 undefined */
6413 /* 0xece6-0xecf5 undefined */
6414 /* 0xecf8-0xecfb undefined */
6415
6416 default:
6417 goto UNKNOWN_OP;
6418 }
6419 break;
6420
6421 case 0xee: /* PLO - perform locked operation */
6422 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6423 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6424 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6425 if (!(tmp & 0x100))
6426 {
6427 uint8_t fc = tmp & 0xff;
6428 gdb_byte buf[8];
6429 switch (fc)
6430 {
6431 case 0x00: /* CL */
6432 /* op1c */
6433 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6434 return -1;
6435 /* op3 */
6436 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6437 return -1;
6438 break;
6439
6440 case 0x01: /* CLG */
6441 /* op1c */
6442 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6443 return -1;
6444 /* op3 */
6445 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6446 return -1;
6447 break;
6448
6449 case 0x02: /* CLGR */
6450 /* op1c */
6451 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6452 return -1;
6453 /* op3 */
6454 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6455 return -1;
6456 break;
6457
6458 case 0x03: /* CLX */
6459 /* op1c */
6460 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6461 return -1;
6462 /* op3 */
6463 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6464 return -1;
6465 break;
6466
6467 case 0x08: /* DCS */
6468 /* op3c */
6469 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6470 return -1;
6471 /* fallthru */
6472 case 0x0c: /* CSST */
6473 /* op4 */
6474 if (record_full_arch_list_add_mem (oaddr2, 4))
6475 return -1;
6476 goto CS;
6477
6478 case 0x14: /* CSTST */
6479 /* op8 */
6480 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6481 return -1;
6482 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6483 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6484 if (record_full_arch_list_add_mem (oaddr3, 4))
6485 return -1;
6486 /* fallthru */
6487 case 0x10: /* CSDST */
6488 /* op6 */
6489 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6490 return -1;
6491 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6492 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6493 if (record_full_arch_list_add_mem (oaddr3, 4))
6494 return -1;
6495 /* op4 */
6496 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6497 return -1;
6498 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6499 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6500 if (record_full_arch_list_add_mem (oaddr3, 4))
6501 return -1;
6502 /* fallthru */
6503 case 0x04: /* CS */
6504CS:
6505 /* op1c */
6506 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6507 return -1;
6508 /* op2 */
6509 if (record_full_arch_list_add_mem (oaddr, 4))
6510 return -1;
6511 break;
6512
6513 case 0x09: /* DCSG */
6514 /* op3c */
6515 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6516 return -1;
6517 goto CSSTG;
6518
6519 case 0x15: /* CSTSTG */
6520 /* op8 */
6521 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6522 return -1;
6523 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6524 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6525 if (record_full_arch_list_add_mem (oaddr3, 8))
6526 return -1;
6527 /* fallthru */
6528 case 0x11: /* CSDSTG */
6529 /* op6 */
6530 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6531 return -1;
6532 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6533 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6534 if (record_full_arch_list_add_mem (oaddr3, 8))
6535 return -1;
6536 /* fallthru */
6537 case 0x0d: /* CSSTG */
6538CSSTG:
6539 /* op4 */
6540 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6541 return -1;
6542 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6543 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6544 if (record_full_arch_list_add_mem (oaddr3, 8))
6545 return -1;
6546 /* fallthru */
6547 case 0x05: /* CSG */
6548 /* op1c */
6549 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6550 return -1;
6551 /* op2 */
6552 if (record_full_arch_list_add_mem (oaddr, 8))
6553 return -1;
6554 break;
6555
6556 case 0x0a: /* DCSGR */
6557 /* op3c */
6558 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6559 return -1;
6560 /* fallthru */
6561 case 0x0e: /* CSSTGR */
6562 /* op4 */
6563 if (record_full_arch_list_add_mem (oaddr2, 8))
6564 return -1;
6565 goto CSGR;
6566
6567 case 0x16: /* CSTSTGR */
6568 /* op8 */
6569 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6570 return -1;
6571 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6572 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6573 if (record_full_arch_list_add_mem (oaddr3, 8))
6574 return -1;
6575 /* fallthru */
6576 case 0x12: /* CSDSTGR */
6577 /* op6 */
6578 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6579 return -1;
6580 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6581 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6582 if (record_full_arch_list_add_mem (oaddr3, 8))
6583 return -1;
6584 /* op4 */
6585 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6586 return -1;
6587 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6588 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6589 if (record_full_arch_list_add_mem (oaddr3, 8))
6590 return -1;
6591 /* fallthru */
6592 case 0x06: /* CSGR */
6593CSGR:
6594 /* op1c */
6595 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6596 return -1;
6597 /* op2 */
6598 if (record_full_arch_list_add_mem (oaddr, 8))
6599 return -1;
6600 break;
6601
6602 case 0x0b: /* DCSX */
6603 /* op3c */
6604 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6605 return -1;
6606 goto CSSTX;
6607
6608 case 0x17: /* CSTSTX */
6609 /* op8 */
6610 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6611 return -1;
6612 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6613 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6614 if (record_full_arch_list_add_mem (oaddr3, 16))
6615 return -1;
6616 /* fallthru */
6617 case 0x13: /* CSDSTX */
6618 /* op6 */
6619 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6620 return -1;
6621 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6622 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6623 if (record_full_arch_list_add_mem (oaddr3, 16))
6624 return -1;
6625 /* fallthru */
6626 case 0x0f: /* CSSTX */
6627CSSTX:
6628 /* op4 */
6629 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6630 return -1;
6631 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6632 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6633 if (record_full_arch_list_add_mem (oaddr3, 16))
6634 return -1;
6635 /* fallthru */
6636 case 0x07: /* CSX */
6637 /* op1c */
6638 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6639 return -1;
6640 /* op2 */
6641 if (record_full_arch_list_add_mem (oaddr, 16))
6642 return -1;
6643 break;
6644
6645 default:
6646 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6647 fc, paddress (gdbarch, addr));
6648 return -1;
6649 }
6650 }
6651 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6652 return -1;
6653 break;
6654
6655 case 0xef: /* LMD - load multiple disjoint */
6656 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6657 if (s390_record_gpr_g (gdbarch, regcache, i))
6658 return -1;
6659 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6660 return -1;
6661 break;
6662
6663 case 0xf0: /* SRP - shift and round decimal */
6664 case 0xf8: /* ZAP - zero and add */
6665 case 0xfa: /* AP - add decimal */
6666 case 0xfb: /* SP - subtract decimal */
6667 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6668 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6669 return -1;
6670 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6671 return -1;
6672 /* DXC may be written */
6673 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6674 return -1;
6675 break;
6676
6677 case 0xf1: /* MVO - move with offset */
6678 case 0xf2: /* PACK - pack */
6679 case 0xf3: /* UNPK - unpack */
6680 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6681 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6682 return -1;
6683 break;
6684
6685 /* 0xf4-0xf7 undefined */
6686
6687 case 0xf9: /* CP - compare decimal */
6688 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6689 return -1;
6690 /* DXC may be written */
6691 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6692 return -1;
6693 break;
6694
6695 case 0xfc: /* MP - multiply decimal */
6696 case 0xfd: /* DP - divide decimal */
6697 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6698 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6699 return -1;
6700 /* DXC may be written */
6701 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6702 return -1;
6703 break;
6704
6705 /* 0xfe-0xff undefined */
6706
6707 default:
6708UNKNOWN_OP:
6709 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6710 "at %s.\n", insn[0], paddress (gdbarch, addr));
6711 return -1;
6712 }
6713
6714 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6715 return -1;
6716 if (record_full_arch_list_add_end ())
6717 return -1;
6718 return 0;
6719}
6720
d6e58945
PR
6721/* Miscellaneous. */
6722
6723/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6724 "-mcmodel=large". */
6725
6726static char *
6727s390_gcc_target_options (struct gdbarch *gdbarch)
6728{
6729 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6730}
6731
6732/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6733 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6734 always "s390". Note that an s390x compiler supports "-m31" as
6735 well. */
6736
6737static const char *
6738s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6739{
6740 return "s390x?";
6741}
6742
6743/* Implementation of `gdbarch_stap_is_single_operand', as defined in
6744 gdbarch.h. */
6745
6746static int
6747s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6748{
6749 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6750 or indirection. */
6751 || *s == '%' /* Register access. */
6752 || isdigit (*s)); /* Literal number. */
6753}
6754
6755/* gdbarch init. */
6756
6757/* Validate the range of registers. NAMES must be known at compile time. */
6758
6759#define s390_validate_reg_range(feature, tdesc_data, start, names) \
6760do \
6761{ \
6762 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6763 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6764 return false; \
6765} \
6766while (0)
6767
6768/* Validate the target description. Also numbers registers contained in
6769 tdesc. */
6770
6771static bool
6772s390_tdesc_valid (struct gdbarch_tdep *tdep,
6773 struct tdesc_arch_data *tdesc_data)
6774{
6775 static const char *const psw[] = {
6776 "pswm", "pswa"
6777 };
6778 static const char *const gprs[] = {
6779 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6780 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6781 };
6782 static const char *const fprs[] = {
6783 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6784 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6785 };
6786 static const char *const acrs[] = {
6787 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6788 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6789 };
6790 static const char *const gprs_lower[] = {
6791 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6792 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6793 };
6794 static const char *const gprs_upper[] = {
6795 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6796 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6797 };
6798 static const char *const tdb_regs[] = {
6799 "tdb0", "tac", "tct", "atia",
6800 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6801 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6802 };
6803 static const char *const vxrs_low[] = {
6804 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6805 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6806 };
6807 static const char *const vxrs_high[] = {
6808 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6809 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6810 };
6811 static const char *const gs_cb[] = {
6812 "gsd", "gssm", "gsepla",
6813 };
6814 static const char *const gs_bc[] = {
6815 "bc_gsd", "bc_gssm", "bc_gsepla",
6816 };
6817
6818 const struct target_desc *tdesc = tdep->tdesc;
6819 const struct tdesc_feature *feature;
6820
c81e8879
PR
6821 if (!tdesc_has_registers (tdesc))
6822 return false;
6823
d6e58945
PR
6824 /* Core registers, i.e. general purpose and PSW. */
6825 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6826 if (feature == NULL)
6827 return false;
6828
6829 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6830
6831 if (tdesc_unnumbered_register (feature, "r0"))
6832 {
6833 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6834 }
6835 else
6836 {
6837 tdep->have_upper = true;
6838 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6839 gprs_lower);
6840 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6841 gprs_upper);
6842 }
6843
6844 /* Floating point registers. */
6845 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6846 if (feature == NULL)
6847 return false;
6848
6849 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6850 return false;
6851
6852 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6853
6854 /* Access control registers. */
6855 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6856 if (feature == NULL)
6857 return false;
6858
6859 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6860
6861 /* Optional GNU/Linux-specific "registers". */
6862 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6863 if (feature)
6864 {
6865 tdesc_numbered_register (feature, tdesc_data,
6866 S390_ORIG_R2_REGNUM, "orig_r2");
6867
6868 if (tdesc_numbered_register (feature, tdesc_data,
6869 S390_LAST_BREAK_REGNUM, "last_break"))
6870 tdep->have_linux_v1 = true;
6871
6872 if (tdesc_numbered_register (feature, tdesc_data,
6873 S390_SYSTEM_CALL_REGNUM, "system_call"))
6874 tdep->have_linux_v2 = true;
6875
6876 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6877 return false;
6878 }
6879
6880 /* Transaction diagnostic block. */
6881 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6882 if (feature)
6883 {
6884 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6885 tdb_regs);
6886 tdep->have_tdb = true;
6887 }
6888
6889 /* Vector registers. */
6890 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6891 if (feature)
6892 {
6893 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6894 vxrs_low);
6895 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6896 vxrs_high);
6897 tdep->have_vx = true;
6898 }
6899
6900 /* Guarded-storage registers. */
6901 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6902 if (feature)
6903 {
6904 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6905 tdep->have_gs = true;
6906 }
6907
6908 /* Guarded-storage broadcast control. */
6909 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6910 if (feature)
6911 {
6912 if (!tdep->have_gs)
6913 return false;
6914 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6915 gs_bc);
6916 }
6917
6918 return true;
6919}
6920
6921/* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6922 memory after use. */
6923
6924static struct gdbarch_tdep *
6925s390_gdbarch_tdep_alloc ()
6926{
6927 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6928
6929 tdep->tdesc = NULL;
6930
6931 tdep->abi = ABI_NONE;
6932 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6933
6934 tdep->gpr_full_regnum = -1;
6935 tdep->v0_full_regnum = -1;
6936 tdep->pc_regnum = -1;
6937 tdep->cc_regnum = -1;
6938
6939 tdep->have_upper = false;
6940 tdep->have_linux_v1 = false;
6941 tdep->have_linux_v2 = false;
6942 tdep->have_tdb = false;
6943 tdep->have_vx = false;
6944 tdep->have_gs = false;
6945
6946 tdep->s390_syscall_record = NULL;
6947
6948 return tdep;
6949}
6950
6951/* Set up gdbarch struct. */
6952
6953static struct gdbarch *
6954s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6955{
6956 const struct target_desc *tdesc = info.target_desc;
6957 int first_pseudo_reg, last_pseudo_reg;
6958 static const char *const stap_register_prefixes[] = { "%", NULL };
6959 static const char *const stap_register_indirection_prefixes[] = { "(",
6960 NULL };
6961 static const char *const stap_register_indirection_suffixes[] = { ")",
6962 NULL };
6963
d6e58945
PR
6964 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6965 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6966 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6967 info.tdesc_data = tdesc_data;
6968
6969 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6970 set_gdbarch_char_signed (gdbarch, 0);
6971
6972 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6973 We can safely let them default to 128-bit, since the debug info
6974 will give the size of type actually used in each case. */
6975 set_gdbarch_long_double_bit (gdbarch, 128);
6976 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6977
1022c627
AA
6978 set_gdbarch_type_align (gdbarch, s390_type_align);
6979
d6e58945
PR
6980 /* Breakpoints. */
6981 /* Amount PC must be decremented by after a breakpoint. This is
6982 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6983 always. */
6984 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6985 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6986 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6987
6988 /* Displaced stepping. */
6989 set_gdbarch_displaced_step_copy_insn (gdbarch,
6990 s390_displaced_step_copy_insn);
6991 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6992 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6993 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6994 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6995 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6996
6997 /* Prologue analysis. */
6998 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6999
7000 /* Register handling. */
7001 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
7002 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
7003 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
7004 set_gdbarch_guess_tracepoint_registers (gdbarch,
7005 s390_guess_tracepoint_registers);
7006 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7007 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7008 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7009
7010 /* Pseudo registers. */
7011 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7012 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7013 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7014 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7015 set_tdesc_pseudo_register_reggroup_p (gdbarch,
7016 s390_pseudo_register_reggroup_p);
7017 set_gdbarch_ax_pseudo_register_collect (gdbarch,
7018 s390_ax_pseudo_register_collect);
7019 set_gdbarch_ax_pseudo_register_push_stack
7020 (gdbarch, s390_ax_pseudo_register_push_stack);
7021 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
7022
7023 /* Inferior function calls. */
7024 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
7025 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
7026 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7027 set_gdbarch_return_value (gdbarch, s390_return_value);
7028
7029 /* Frame handling. */
7030 /* Stack grows downward. */
7031 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7032 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7033 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7034 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7035 dwarf2_append_unwinders (gdbarch);
7036 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7037 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7038
7039 switch (info.bfd_arch_info->mach)
7040 {
7041 case bfd_mach_s390_31:
7042 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7043 break;
7044
7045 case bfd_mach_s390_64:
7046 set_gdbarch_long_bit (gdbarch, 64);
7047 set_gdbarch_long_long_bit (gdbarch, 64);
7048 set_gdbarch_ptr_bit (gdbarch, 64);
7049 set_gdbarch_address_class_type_flags (gdbarch,
7050 s390_address_class_type_flags);
7051 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7052 s390_address_class_type_flags_to_name);
7053 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7054 s390_address_class_name_to_type_flags);
7055 break;
7056 }
7057
7058 /* SystemTap functions. */
7059 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7060 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7061 stap_register_indirection_prefixes);
7062 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7063 stap_register_indirection_suffixes);
7064
7065 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7066 set_gdbarch_valid_disassembler_options (gdbarch,
7067 disassembler_options_s390 ());
7068
ef8914a4
PR
7069 /* Process record-replay */
7070 set_gdbarch_process_record (gdbarch, s390_process_record);
7071
d6e58945
PR
7072 /* Miscellaneous. */
7073 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7074 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7075 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7076
7077 /* Initialize the OSABI. */
7078 gdbarch_init_osabi (info, gdbarch);
7079
c81e8879
PR
7080 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7081 cause GDB to crash with an internal error when the user tries to set
7082 an unsupported OSABI. */
7083 if (!tdesc_has_registers (tdesc))
7084 {
7085 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7086 tdesc = tdesc_s390_linux32;
7087 else
7088 tdesc = tdesc_s390x_linux64;
7089 }
7090 tdep->tdesc = tdesc;
7091
d6e58945 7092 /* Check any target description for validity. */
d6e58945
PR
7093 if (!s390_tdesc_valid (tdep, tdesc_data))
7094 {
7095 tdesc_data_cleanup (tdesc_data);
7096 xfree (tdep);
7097 gdbarch_free (gdbarch);
7098 return NULL;
7099 }
7100
7101 /* Determine vector ABI. */
7102#ifdef HAVE_ELF
7103 if (tdep->have_vx
7104 && info.abfd != NULL
7105 && info.abfd->format == bfd_object
7106 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7107 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7108 Tag_GNU_S390_ABI_Vector) == 2)
7109 tdep->vector_abi = S390_VECTOR_ABI_128;
7110#endif
7111
7112 /* Find a candidate among extant architectures. */
7113 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7114 arches != NULL;
7115 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7116 {
7117 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7118 if (!tmp)
7119 continue;
7120 /* A program can 'choose' not to use the vector registers when they
7121 are present. Leading to the same tdesc but different tdep and
7122 thereby a different gdbarch. */
7123 if (tmp->vector_abi != tdep->vector_abi)
7124 continue;
7125
7126 tdesc_data_cleanup (tdesc_data);
7127 xfree (tdep);
7128 gdbarch_free (gdbarch);
7129 return arches->gdbarch;
7130 }
7131
7132 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7133 set_gdbarch_register_name (gdbarch, s390_register_name);
7134
7135 /* Assign pseudo register numbers. */
7136 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7137 last_pseudo_reg = first_pseudo_reg;
7138 if (tdep->have_upper)
7139 {
7140 tdep->gpr_full_regnum = last_pseudo_reg;
7141 last_pseudo_reg += 16;
7142 }
7143 if (tdep->have_vx)
7144 {
7145 tdep->v0_full_regnum = last_pseudo_reg;
7146 last_pseudo_reg += 16;
7147 }
7148 tdep->pc_regnum = last_pseudo_reg++;
7149 tdep->cc_regnum = last_pseudo_reg++;
7150 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7151 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7152
7153 /* Frame handling. */
7154 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7155 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7156 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7157 frame_base_set_default (gdbarch, &s390_frame_base);
7158
7159 return gdbarch;
7160}
7161
7162void
7163_initialize_s390_tdep (void)
7164{
7165 /* Hook us into the gdbarch mechanism. */
7166 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
c81e8879
PR
7167
7168 initialize_tdesc_s390_linux32 ();
7169 initialize_tdesc_s390x_linux64 ();
d6e58945 7170}
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