Commit | Line | Data |
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5769d3cd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ca557f44 | 2 | |
0fb0cc75 | 3 | Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 |
469db033 | 4 | Free Software Foundation, Inc. |
ca557f44 | 5 | |
5769d3cd AC |
6 | Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) |
7 | for IBM Deutschland Entwicklung GmbH, IBM Corporation. | |
8 | ||
9 | This file is part of GDB. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 13 | the Free Software Foundation; either version 3 of the License, or |
5769d3cd AC |
14 | (at your option) any later version. |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 22 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
5769d3cd | 23 | |
d0f54f9d | 24 | #include "defs.h" |
5769d3cd AC |
25 | #include "arch-utils.h" |
26 | #include "frame.h" | |
27 | #include "inferior.h" | |
28 | #include "symtab.h" | |
29 | #include "target.h" | |
30 | #include "gdbcore.h" | |
31 | #include "gdbcmd.h" | |
5769d3cd | 32 | #include "objfiles.h" |
5769d3cd AC |
33 | #include "floatformat.h" |
34 | #include "regcache.h" | |
a8c99f38 JB |
35 | #include "trad-frame.h" |
36 | #include "frame-base.h" | |
37 | #include "frame-unwind.h" | |
a431654a | 38 | #include "dwarf2-frame.h" |
d0f54f9d JB |
39 | #include "reggroups.h" |
40 | #include "regset.h" | |
fd0407d6 | 41 | #include "value.h" |
78f8b424 | 42 | #include "gdb_assert.h" |
a89aa300 | 43 | #include "dis-asm.h" |
76a9d10f | 44 | #include "solib-svr4.h" |
3fc46200 | 45 | #include "prologue-value.h" |
5769d3cd | 46 | |
d0f54f9d | 47 | #include "s390-tdep.h" |
5769d3cd | 48 | |
60e6cc42 | 49 | |
d0f54f9d JB |
50 | /* The tdep structure. */ |
51 | ||
52 | struct gdbarch_tdep | |
5769d3cd | 53 | { |
b0cf273e JB |
54 | /* ABI version. */ |
55 | enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; | |
56 | ||
d0f54f9d JB |
57 | /* Core file register sets. */ |
58 | const struct regset *gregset; | |
59 | int sizeof_gregset; | |
60 | ||
61 | const struct regset *fpregset; | |
62 | int sizeof_fpregset; | |
63 | }; | |
64 | ||
65 | ||
d0f54f9d JB |
66 | /* Return the name of register REGNUM. */ |
67 | static const char * | |
d93859e2 | 68 | s390_register_name (struct gdbarch *gdbarch, int regnum) |
d0f54f9d | 69 | { |
6707b003 UW |
70 | static const char *register_names[S390_NUM_TOTAL_REGS] = |
71 | { | |
72 | /* Program Status Word. */ | |
73 | "pswm", "pswa", | |
74 | /* General Purpose Registers. */ | |
75 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
76 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
77 | /* Access Registers. */ | |
78 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", | |
79 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15", | |
80 | /* Floating Point Control Word. */ | |
81 | "fpc", | |
82 | /* Floating Point Registers. */ | |
83 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
84 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
85 | /* Pseudo registers. */ | |
86 | "pc", "cc", | |
87 | }; | |
88 | ||
d0f54f9d | 89 | gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS); |
6707b003 | 90 | return register_names[regnum]; |
d0f54f9d JB |
91 | } |
92 | ||
93 | /* Return the GDB type object for the "standard" data type of data in | |
6707b003 | 94 | register REGNUM. */ |
d0f54f9d JB |
95 | static struct type * |
96 | s390_register_type (struct gdbarch *gdbarch, int regnum) | |
97 | { | |
6707b003 | 98 | if (regnum == S390_PSWM_REGNUM || regnum == S390_PSWA_REGNUM) |
0dfff4cb | 99 | return builtin_type (gdbarch)->builtin_long; |
6707b003 | 100 | if (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM) |
0dfff4cb | 101 | return builtin_type (gdbarch)->builtin_long; |
6707b003 | 102 | if (regnum >= S390_A0_REGNUM && regnum <= S390_A15_REGNUM) |
0dfff4cb | 103 | return builtin_type (gdbarch)->builtin_int; |
6707b003 | 104 | if (regnum == S390_FPC_REGNUM) |
0dfff4cb | 105 | return builtin_type (gdbarch)->builtin_int; |
6707b003 | 106 | if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM) |
0dfff4cb | 107 | return builtin_type (gdbarch)->builtin_double; |
6707b003 | 108 | if (regnum == S390_PC_REGNUM) |
0dfff4cb | 109 | return builtin_type (gdbarch)->builtin_func_ptr; |
6707b003 | 110 | if (regnum == S390_CC_REGNUM) |
0dfff4cb | 111 | return builtin_type (gdbarch)->builtin_int; |
6707b003 UW |
112 | |
113 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
5769d3cd AC |
114 | } |
115 | ||
d0f54f9d JB |
116 | /* DWARF Register Mapping. */ |
117 | ||
118 | static int s390_dwarf_regmap[] = | |
119 | { | |
120 | /* General Purpose Registers. */ | |
121 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
122 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
123 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
124 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
125 | ||
126 | /* Floating Point Registers. */ | |
127 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, | |
128 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, | |
129 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, | |
130 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, | |
131 | ||
132 | /* Control Registers (not mapped). */ | |
133 | -1, -1, -1, -1, -1, -1, -1, -1, | |
134 | -1, -1, -1, -1, -1, -1, -1, -1, | |
135 | ||
136 | /* Access Registers. */ | |
137 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, | |
138 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, | |
139 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, | |
140 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, | |
141 | ||
142 | /* Program Status Word. */ | |
143 | S390_PSWM_REGNUM, | |
144 | S390_PSWA_REGNUM | |
145 | }; | |
146 | ||
147 | /* Convert DWARF register number REG to the appropriate register | |
148 | number used by GDB. */ | |
a78f21af | 149 | static int |
d3f73121 | 150 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
d0f54f9d JB |
151 | { |
152 | int regnum = -1; | |
153 | ||
16aff9a6 | 154 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
d0f54f9d JB |
155 | regnum = s390_dwarf_regmap[reg]; |
156 | ||
157 | if (regnum == -1) | |
8a3fe4f8 | 158 | warning (_("Unmapped DWARF Register #%d encountered."), reg); |
d0f54f9d JB |
159 | |
160 | return regnum; | |
161 | } | |
162 | ||
163 | /* Pseudo registers - PC and condition code. */ | |
164 | ||
165 | static void | |
166 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
2e82d168 | 167 | int regnum, gdb_byte *buf) |
d0f54f9d | 168 | { |
e17a4113 | 169 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d0f54f9d JB |
170 | ULONGEST val; |
171 | ||
172 | switch (regnum) | |
173 | { | |
174 | case S390_PC_REGNUM: | |
175 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); | |
e17a4113 | 176 | store_unsigned_integer (buf, 4, byte_order, val & 0x7fffffff); |
d0f54f9d JB |
177 | break; |
178 | ||
179 | case S390_CC_REGNUM: | |
180 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); | |
e17a4113 | 181 | store_unsigned_integer (buf, 4, byte_order, (val >> 12) & 3); |
d0f54f9d JB |
182 | break; |
183 | ||
184 | default: | |
e2e0b3e5 | 185 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d JB |
186 | } |
187 | } | |
188 | ||
189 | static void | |
190 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
2e82d168 | 191 | int regnum, const gdb_byte *buf) |
5769d3cd | 192 | { |
e17a4113 | 193 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d0f54f9d JB |
194 | ULONGEST val, psw; |
195 | ||
196 | switch (regnum) | |
197 | { | |
198 | case S390_PC_REGNUM: | |
e17a4113 | 199 | val = extract_unsigned_integer (buf, 4, byte_order); |
d0f54f9d JB |
200 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); |
201 | psw = (psw & 0x80000000) | (val & 0x7fffffff); | |
202 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw); | |
203 | break; | |
204 | ||
205 | case S390_CC_REGNUM: | |
e17a4113 | 206 | val = extract_unsigned_integer (buf, 4, byte_order); |
d0f54f9d JB |
207 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
208 | psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); | |
209 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw); | |
210 | break; | |
211 | ||
212 | default: | |
e2e0b3e5 | 213 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d | 214 | } |
5769d3cd AC |
215 | } |
216 | ||
d0f54f9d JB |
217 | static void |
218 | s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, | |
2e82d168 | 219 | int regnum, gdb_byte *buf) |
d0f54f9d | 220 | { |
e17a4113 | 221 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d0f54f9d JB |
222 | ULONGEST val; |
223 | ||
224 | switch (regnum) | |
225 | { | |
226 | case S390_PC_REGNUM: | |
227 | regcache_raw_read (regcache, S390_PSWA_REGNUM, buf); | |
228 | break; | |
229 | ||
230 | case S390_CC_REGNUM: | |
231 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); | |
e17a4113 | 232 | store_unsigned_integer (buf, 4, byte_order, (val >> 44) & 3); |
d0f54f9d JB |
233 | break; |
234 | ||
235 | default: | |
e2e0b3e5 | 236 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d JB |
237 | } |
238 | } | |
239 | ||
240 | static void | |
241 | s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, | |
2e82d168 | 242 | int regnum, const gdb_byte *buf) |
d0f54f9d | 243 | { |
e17a4113 | 244 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d0f54f9d JB |
245 | ULONGEST val, psw; |
246 | ||
247 | switch (regnum) | |
248 | { | |
249 | case S390_PC_REGNUM: | |
250 | regcache_raw_write (regcache, S390_PSWA_REGNUM, buf); | |
251 | break; | |
252 | ||
253 | case S390_CC_REGNUM: | |
e17a4113 | 254 | val = extract_unsigned_integer (buf, 4, byte_order); |
d0f54f9d JB |
255 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
256 | psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); | |
257 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw); | |
258 | break; | |
259 | ||
260 | default: | |
e2e0b3e5 | 261 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d JB |
262 | } |
263 | } | |
264 | ||
265 | /* 'float' values are stored in the upper half of floating-point | |
266 | registers, even though we are otherwise a big-endian platform. */ | |
267 | ||
9acbedc0 UW |
268 | static struct value * |
269 | s390_value_from_register (struct type *type, int regnum, | |
270 | struct frame_info *frame) | |
d0f54f9d | 271 | { |
9acbedc0 UW |
272 | struct value *value = default_value_from_register (type, regnum, frame); |
273 | int len = TYPE_LENGTH (type); | |
d0f54f9d | 274 | |
9acbedc0 UW |
275 | if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8) |
276 | set_value_offset (value, 0); | |
d0f54f9d | 277 | |
9acbedc0 | 278 | return value; |
d0f54f9d JB |
279 | } |
280 | ||
281 | /* Register groups. */ | |
282 | ||
a78f21af | 283 | static int |
d0f54f9d JB |
284 | s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
285 | struct reggroup *group) | |
286 | { | |
287 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
288 | ||
289 | /* Registers displayed via 'info regs'. */ | |
290 | if (group == general_reggroup) | |
291 | return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM) | |
292 | || regnum == S390_PC_REGNUM | |
293 | || regnum == S390_CC_REGNUM; | |
294 | ||
295 | /* Registers displayed via 'info float'. */ | |
296 | if (group == float_reggroup) | |
297 | return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM) | |
298 | || regnum == S390_FPC_REGNUM; | |
299 | ||
300 | /* Registers that need to be saved/restored in order to | |
301 | push or pop frames. */ | |
302 | if (group == save_reggroup || group == restore_reggroup) | |
303 | return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM; | |
304 | ||
305 | return default_register_reggroup_p (gdbarch, regnum, group); | |
306 | } | |
307 | ||
308 | ||
309 | /* Core file register sets. */ | |
310 | ||
311 | int s390_regmap_gregset[S390_NUM_REGS] = | |
312 | { | |
313 | /* Program Status Word. */ | |
314 | 0x00, 0x04, | |
315 | /* General Purpose Registers. */ | |
316 | 0x08, 0x0c, 0x10, 0x14, | |
317 | 0x18, 0x1c, 0x20, 0x24, | |
318 | 0x28, 0x2c, 0x30, 0x34, | |
319 | 0x38, 0x3c, 0x40, 0x44, | |
320 | /* Access Registers. */ | |
321 | 0x48, 0x4c, 0x50, 0x54, | |
322 | 0x58, 0x5c, 0x60, 0x64, | |
323 | 0x68, 0x6c, 0x70, 0x74, | |
324 | 0x78, 0x7c, 0x80, 0x84, | |
325 | /* Floating Point Control Word. */ | |
326 | -1, | |
327 | /* Floating Point Registers. */ | |
328 | -1, -1, -1, -1, -1, -1, -1, -1, | |
329 | -1, -1, -1, -1, -1, -1, -1, -1, | |
330 | }; | |
331 | ||
332 | int s390x_regmap_gregset[S390_NUM_REGS] = | |
333 | { | |
334 | 0x00, 0x08, | |
335 | /* General Purpose Registers. */ | |
336 | 0x10, 0x18, 0x20, 0x28, | |
337 | 0x30, 0x38, 0x40, 0x48, | |
338 | 0x50, 0x58, 0x60, 0x68, | |
339 | 0x70, 0x78, 0x80, 0x88, | |
340 | /* Access Registers. */ | |
341 | 0x90, 0x94, 0x98, 0x9c, | |
342 | 0xa0, 0xa4, 0xa8, 0xac, | |
343 | 0xb0, 0xb4, 0xb8, 0xbc, | |
344 | 0xc0, 0xc4, 0xc8, 0xcc, | |
345 | /* Floating Point Control Word. */ | |
346 | -1, | |
347 | /* Floating Point Registers. */ | |
348 | -1, -1, -1, -1, -1, -1, -1, -1, | |
349 | -1, -1, -1, -1, -1, -1, -1, -1, | |
350 | }; | |
351 | ||
352 | int s390_regmap_fpregset[S390_NUM_REGS] = | |
353 | { | |
354 | /* Program Status Word. */ | |
355 | -1, -1, | |
356 | /* General Purpose Registers. */ | |
357 | -1, -1, -1, -1, -1, -1, -1, -1, | |
358 | -1, -1, -1, -1, -1, -1, -1, -1, | |
359 | /* Access Registers. */ | |
360 | -1, -1, -1, -1, -1, -1, -1, -1, | |
361 | -1, -1, -1, -1, -1, -1, -1, -1, | |
362 | /* Floating Point Control Word. */ | |
363 | 0x00, | |
364 | /* Floating Point Registers. */ | |
365 | 0x08, 0x10, 0x18, 0x20, | |
366 | 0x28, 0x30, 0x38, 0x40, | |
367 | 0x48, 0x50, 0x58, 0x60, | |
368 | 0x68, 0x70, 0x78, 0x80, | |
369 | }; | |
370 | ||
371 | /* Supply register REGNUM from the register set REGSET to register cache | |
372 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
373 | static void | |
374 | s390_supply_regset (const struct regset *regset, struct regcache *regcache, | |
375 | int regnum, const void *regs, size_t len) | |
376 | { | |
377 | const int *offset = regset->descr; | |
378 | int i; | |
379 | ||
380 | for (i = 0; i < S390_NUM_REGS; i++) | |
381 | { | |
382 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
383 | regcache_raw_supply (regcache, i, (const char *)regs + offset[i]); | |
384 | } | |
385 | } | |
386 | ||
92f38ec2 UW |
387 | /* Collect register REGNUM from the register cache REGCACHE and store |
388 | it in the buffer specified by REGS and LEN as described by the | |
389 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
390 | all registers in REGSET. */ | |
391 | static void | |
392 | s390_collect_regset (const struct regset *regset, | |
393 | const struct regcache *regcache, | |
394 | int regnum, void *regs, size_t len) | |
395 | { | |
396 | const int *offset = regset->descr; | |
397 | int i; | |
398 | ||
399 | for (i = 0; i < S390_NUM_REGS; i++) | |
400 | { | |
401 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
402 | regcache_raw_collect (regcache, i, (char *)regs + offset[i]); | |
403 | } | |
404 | } | |
405 | ||
d0f54f9d JB |
406 | static const struct regset s390_gregset = { |
407 | s390_regmap_gregset, | |
92f38ec2 UW |
408 | s390_supply_regset, |
409 | s390_collect_regset | |
d0f54f9d JB |
410 | }; |
411 | ||
412 | static const struct regset s390x_gregset = { | |
413 | s390x_regmap_gregset, | |
92f38ec2 UW |
414 | s390_supply_regset, |
415 | s390_collect_regset | |
d0f54f9d JB |
416 | }; |
417 | ||
418 | static const struct regset s390_fpregset = { | |
419 | s390_regmap_fpregset, | |
92f38ec2 UW |
420 | s390_supply_regset, |
421 | s390_collect_regset | |
d0f54f9d JB |
422 | }; |
423 | ||
424 | /* Return the appropriate register set for the core section identified | |
425 | by SECT_NAME and SECT_SIZE. */ | |
63807e1d | 426 | static const struct regset * |
d0f54f9d JB |
427 | s390_regset_from_core_section (struct gdbarch *gdbarch, |
428 | const char *sect_name, size_t sect_size) | |
429 | { | |
430 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
431 | ||
e31dcd20 | 432 | if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) |
d0f54f9d JB |
433 | return tdep->gregset; |
434 | ||
e31dcd20 | 435 | if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) |
d0f54f9d JB |
436 | return tdep->fpregset; |
437 | ||
438 | return NULL; | |
5769d3cd AC |
439 | } |
440 | ||
d0f54f9d | 441 | |
4bc8c588 JB |
442 | /* Decoding S/390 instructions. */ |
443 | ||
444 | /* Named opcode values for the S/390 instructions we recognize. Some | |
445 | instructions have their opcode split across two fields; those are the | |
446 | op1_* and op2_* enums. */ | |
447 | enum | |
448 | { | |
a8c99f38 JB |
449 | op1_lhi = 0xa7, op2_lhi = 0x08, |
450 | op1_lghi = 0xa7, op2_lghi = 0x09, | |
00ce08ef | 451 | op1_lgfi = 0xc0, op2_lgfi = 0x01, |
4bc8c588 | 452 | op_lr = 0x18, |
a8c99f38 JB |
453 | op_lgr = 0xb904, |
454 | op_l = 0x58, | |
455 | op1_ly = 0xe3, op2_ly = 0x58, | |
456 | op1_lg = 0xe3, op2_lg = 0x04, | |
457 | op_lm = 0x98, | |
458 | op1_lmy = 0xeb, op2_lmy = 0x98, | |
459 | op1_lmg = 0xeb, op2_lmg = 0x04, | |
4bc8c588 | 460 | op_st = 0x50, |
a8c99f38 | 461 | op1_sty = 0xe3, op2_sty = 0x50, |
4bc8c588 | 462 | op1_stg = 0xe3, op2_stg = 0x24, |
a8c99f38 | 463 | op_std = 0x60, |
4bc8c588 | 464 | op_stm = 0x90, |
a8c99f38 | 465 | op1_stmy = 0xeb, op2_stmy = 0x90, |
4bc8c588 | 466 | op1_stmg = 0xeb, op2_stmg = 0x24, |
a8c99f38 JB |
467 | op1_aghi = 0xa7, op2_aghi = 0x0b, |
468 | op1_ahi = 0xa7, op2_ahi = 0x0a, | |
00ce08ef UW |
469 | op1_agfi = 0xc2, op2_agfi = 0x08, |
470 | op1_afi = 0xc2, op2_afi = 0x09, | |
471 | op1_algfi= 0xc2, op2_algfi= 0x0a, | |
472 | op1_alfi = 0xc2, op2_alfi = 0x0b, | |
a8c99f38 JB |
473 | op_ar = 0x1a, |
474 | op_agr = 0xb908, | |
475 | op_a = 0x5a, | |
476 | op1_ay = 0xe3, op2_ay = 0x5a, | |
477 | op1_ag = 0xe3, op2_ag = 0x08, | |
00ce08ef UW |
478 | op1_slgfi= 0xc2, op2_slgfi= 0x04, |
479 | op1_slfi = 0xc2, op2_slfi = 0x05, | |
a8c99f38 JB |
480 | op_sr = 0x1b, |
481 | op_sgr = 0xb909, | |
482 | op_s = 0x5b, | |
483 | op1_sy = 0xe3, op2_sy = 0x5b, | |
484 | op1_sg = 0xe3, op2_sg = 0x09, | |
485 | op_nr = 0x14, | |
486 | op_ngr = 0xb980, | |
487 | op_la = 0x41, | |
488 | op1_lay = 0xe3, op2_lay = 0x71, | |
489 | op1_larl = 0xc0, op2_larl = 0x00, | |
490 | op_basr = 0x0d, | |
491 | op_bas = 0x4d, | |
492 | op_bcr = 0x07, | |
493 | op_bc = 0x0d, | |
494 | op1_bras = 0xa7, op2_bras = 0x05, | |
495 | op1_brasl= 0xc0, op2_brasl= 0x05, | |
496 | op1_brc = 0xa7, op2_brc = 0x04, | |
497 | op1_brcl = 0xc0, op2_brcl = 0x04, | |
4bc8c588 JB |
498 | }; |
499 | ||
500 | ||
a8c99f38 JB |
501 | /* Read a single instruction from address AT. */ |
502 | ||
503 | #define S390_MAX_INSTR_SIZE 6 | |
504 | static int | |
505 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) | |
506 | { | |
507 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
508 | int instrlen; | |
509 | ||
8defab1a | 510 | if (target_read_memory (at, &instr[0], 2)) |
a8c99f38 JB |
511 | return -1; |
512 | instrlen = s390_instrlen[instr[0] >> 6]; | |
513 | if (instrlen > 2) | |
514 | { | |
8defab1a | 515 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
a8c99f38 JB |
516 | return -1; |
517 | } | |
518 | return instrlen; | |
519 | } | |
520 | ||
521 | ||
4bc8c588 JB |
522 | /* The functions below are for recognizing and decoding S/390 |
523 | instructions of various formats. Each of them checks whether INSN | |
524 | is an instruction of the given format, with the specified opcodes. | |
525 | If it is, it sets the remaining arguments to the values of the | |
526 | instruction's fields, and returns a non-zero value; otherwise, it | |
527 | returns zero. | |
528 | ||
529 | These functions' arguments appear in the order they appear in the | |
530 | instruction, not in the machine-language form. So, opcodes always | |
531 | come first, even though they're sometimes scattered around the | |
532 | instructions. And displacements appear before base and extension | |
533 | registers, as they do in the assembly syntax, not at the end, as | |
534 | they do in the machine language. */ | |
a78f21af | 535 | static int |
4bc8c588 JB |
536 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
537 | { | |
538 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
539 | { | |
540 | *r1 = (insn[1] >> 4) & 0xf; | |
541 | /* i2 is a 16-bit signed quantity. */ | |
542 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
543 | return 1; | |
544 | } | |
545 | else | |
546 | return 0; | |
547 | } | |
8ac0e65a | 548 | |
5769d3cd | 549 | |
4bc8c588 JB |
550 | static int |
551 | is_ril (bfd_byte *insn, int op1, int op2, | |
552 | unsigned int *r1, int *i2) | |
553 | { | |
554 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
555 | { | |
556 | *r1 = (insn[1] >> 4) & 0xf; | |
557 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, | |
558 | no sign extension is necessary, but we don't want to assume | |
559 | that. */ | |
560 | *i2 = (((insn[2] << 24) | |
561 | | (insn[3] << 16) | |
562 | | (insn[4] << 8) | |
563 | | (insn[5])) ^ 0x80000000) - 0x80000000; | |
564 | return 1; | |
565 | } | |
566 | else | |
567 | return 0; | |
568 | } | |
569 | ||
570 | ||
571 | static int | |
572 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
573 | { | |
574 | if (insn[0] == op) | |
575 | { | |
576 | *r1 = (insn[1] >> 4) & 0xf; | |
577 | *r2 = insn[1] & 0xf; | |
578 | return 1; | |
579 | } | |
580 | else | |
581 | return 0; | |
582 | } | |
583 | ||
584 | ||
585 | static int | |
586 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
587 | { | |
588 | if (((insn[0] << 8) | insn[1]) == op) | |
589 | { | |
590 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ | |
591 | *r1 = (insn[3] >> 4) & 0xf; | |
592 | *r2 = insn[3] & 0xf; | |
593 | return 1; | |
594 | } | |
595 | else | |
596 | return 0; | |
597 | } | |
598 | ||
599 | ||
600 | static int | |
601 | is_rs (bfd_byte *insn, int op, | |
602 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) | |
603 | { | |
604 | if (insn[0] == op) | |
605 | { | |
606 | *r1 = (insn[1] >> 4) & 0xf; | |
607 | *r3 = insn[1] & 0xf; | |
608 | *b2 = (insn[2] >> 4) & 0xf; | |
609 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
610 | return 1; | |
611 | } | |
612 | else | |
613 | return 0; | |
614 | } | |
615 | ||
616 | ||
617 | static int | |
a8c99f38 | 618 | is_rsy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
619 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) |
620 | { | |
621 | if (insn[0] == op1 | |
4bc8c588 JB |
622 | && insn[5] == op2) |
623 | { | |
624 | *r1 = (insn[1] >> 4) & 0xf; | |
625 | *r3 = insn[1] & 0xf; | |
626 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
627 | /* The 'long displacement' is a 20-bit signed integer. */ |
628 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
629 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
630 | return 1; |
631 | } | |
632 | else | |
633 | return 0; | |
634 | } | |
635 | ||
636 | ||
637 | static int | |
638 | is_rx (bfd_byte *insn, int op, | |
639 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) | |
640 | { | |
641 | if (insn[0] == op) | |
642 | { | |
643 | *r1 = (insn[1] >> 4) & 0xf; | |
644 | *x2 = insn[1] & 0xf; | |
645 | *b2 = (insn[2] >> 4) & 0xf; | |
646 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
647 | return 1; | |
648 | } | |
649 | else | |
650 | return 0; | |
651 | } | |
652 | ||
653 | ||
654 | static int | |
a8c99f38 | 655 | is_rxy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
656 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) |
657 | { | |
658 | if (insn[0] == op1 | |
4bc8c588 JB |
659 | && insn[5] == op2) |
660 | { | |
661 | *r1 = (insn[1] >> 4) & 0xf; | |
662 | *x2 = insn[1] & 0xf; | |
663 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
664 | /* The 'long displacement' is a 20-bit signed integer. */ |
665 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
666 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
667 | return 1; |
668 | } | |
669 | else | |
670 | return 0; | |
671 | } | |
672 | ||
673 | ||
3fc46200 | 674 | /* Prologue analysis. */ |
4bc8c588 | 675 | |
d0f54f9d JB |
676 | #define S390_NUM_GPRS 16 |
677 | #define S390_NUM_FPRS 16 | |
4bc8c588 | 678 | |
a8c99f38 JB |
679 | struct s390_prologue_data { |
680 | ||
ee1b3323 UW |
681 | /* The stack. */ |
682 | struct pv_area *stack; | |
683 | ||
e17a4113 | 684 | /* The size and byte-order of a GPR or FPR. */ |
a8c99f38 JB |
685 | int gpr_size; |
686 | int fpr_size; | |
e17a4113 | 687 | enum bfd_endian byte_order; |
a8c99f38 JB |
688 | |
689 | /* The general-purpose registers. */ | |
3fc46200 | 690 | pv_t gpr[S390_NUM_GPRS]; |
a8c99f38 JB |
691 | |
692 | /* The floating-point registers. */ | |
3fc46200 | 693 | pv_t fpr[S390_NUM_FPRS]; |
a8c99f38 | 694 | |
121d8485 UW |
695 | /* The offset relative to the CFA where the incoming GPR N was saved |
696 | by the function prologue. 0 if not saved or unknown. */ | |
697 | int gpr_slot[S390_NUM_GPRS]; | |
4bc8c588 | 698 | |
121d8485 UW |
699 | /* Likewise for FPRs. */ |
700 | int fpr_slot[S390_NUM_FPRS]; | |
4bc8c588 | 701 | |
121d8485 UW |
702 | /* Nonzero if the backchain was saved. This is assumed to be the |
703 | case when the incoming SP is saved at the current SP location. */ | |
704 | int back_chain_saved_p; | |
705 | }; | |
4bc8c588 | 706 | |
3fc46200 UW |
707 | /* Return the effective address for an X-style instruction, like: |
708 | ||
709 | L R1, D2(X2, B2) | |
710 | ||
711 | Here, X2 and B2 are registers, and D2 is a signed 20-bit | |
712 | constant; the effective address is the sum of all three. If either | |
713 | X2 or B2 are zero, then it doesn't contribute to the sum --- this | |
714 | means that r0 can't be used as either X2 or B2. */ | |
715 | static pv_t | |
716 | s390_addr (struct s390_prologue_data *data, | |
717 | int d2, unsigned int x2, unsigned int b2) | |
718 | { | |
719 | pv_t result; | |
720 | ||
721 | result = pv_constant (d2); | |
722 | if (x2) | |
723 | result = pv_add (result, data->gpr[x2]); | |
724 | if (b2) | |
725 | result = pv_add (result, data->gpr[b2]); | |
726 | ||
727 | return result; | |
728 | } | |
729 | ||
730 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ | |
a8c99f38 | 731 | static void |
3fc46200 UW |
732 | s390_store (struct s390_prologue_data *data, |
733 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, | |
734 | pv_t value) | |
4bc8c588 | 735 | { |
3fc46200 | 736 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 737 | pv_t offset; |
121d8485 UW |
738 | |
739 | /* Check whether we are storing the backchain. */ | |
3fc46200 | 740 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
121d8485 | 741 | |
3fc46200 | 742 | if (pv_is_constant (offset) && offset.k == 0) |
121d8485 | 743 | if (size == data->gpr_size |
3fc46200 | 744 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
121d8485 UW |
745 | { |
746 | data->back_chain_saved_p = 1; | |
747 | return; | |
748 | } | |
749 | ||
750 | ||
751 | /* Check whether we are storing a register into the stack. */ | |
ee1b3323 UW |
752 | if (!pv_area_store_would_trash (data->stack, addr)) |
753 | pv_area_store (data->stack, addr, size, value); | |
4bc8c588 | 754 | |
a8c99f38 | 755 | |
121d8485 UW |
756 | /* Note: If this is some store we cannot identify, you might think we |
757 | should forget our cached values, as any of those might have been hit. | |
758 | ||
759 | However, we make the assumption that the register save areas are only | |
760 | ever stored to once in any given function, and we do recognize these | |
761 | stores. Thus every store we cannot recognize does not hit our data. */ | |
4bc8c588 | 762 | } |
4bc8c588 | 763 | |
3fc46200 UW |
764 | /* Do a SIZE-byte load from D2(X2,B2). */ |
765 | static pv_t | |
766 | s390_load (struct s390_prologue_data *data, | |
767 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) | |
768 | ||
4bc8c588 | 769 | { |
3fc46200 | 770 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 771 | pv_t offset; |
4bc8c588 | 772 | |
a8c99f38 JB |
773 | /* If it's a load from an in-line constant pool, then we can |
774 | simulate that, under the assumption that the code isn't | |
775 | going to change between the time the processor actually | |
776 | executed it creating the current frame, and the time when | |
777 | we're analyzing the code to unwind past that frame. */ | |
3fc46200 | 778 | if (pv_is_constant (addr)) |
4bc8c588 | 779 | { |
0542c86d | 780 | struct target_section *secp; |
3fc46200 | 781 | secp = target_section_by_addr (¤t_target, addr.k); |
a8c99f38 JB |
782 | if (secp != NULL |
783 | && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section) | |
784 | & SEC_READONLY)) | |
e17a4113 UW |
785 | return pv_constant (read_memory_integer (addr.k, size, |
786 | data->byte_order)); | |
a8c99f38 | 787 | } |
7666f43c | 788 | |
121d8485 | 789 | /* Check whether we are accessing one of our save slots. */ |
ee1b3323 UW |
790 | return pv_area_fetch (data->stack, addr, size); |
791 | } | |
121d8485 | 792 | |
ee1b3323 UW |
793 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
794 | this to pv_area_scan. | |
121d8485 | 795 | |
ee1b3323 UW |
796 | If VALUE is a saved register, ADDR says it was saved at a constant |
797 | offset from the frame base, and SIZE indicates that the whole | |
798 | register was saved, record its offset in the reg_offset table in | |
799 | PROLOGUE_UNTYPED. */ | |
800 | static void | |
801 | s390_check_for_saved (void *data_untyped, pv_t addr, CORE_ADDR size, pv_t value) | |
802 | { | |
803 | struct s390_prologue_data *data = data_untyped; | |
804 | int i, offset; | |
805 | ||
806 | if (!pv_is_register (addr, S390_SP_REGNUM)) | |
807 | return; | |
808 | ||
809 | offset = 16 * data->gpr_size + 32 - addr.k; | |
4bc8c588 | 810 | |
ee1b3323 UW |
811 | /* If we are storing the original value of a register, we want to |
812 | record the CFA offset. If the same register is stored multiple | |
813 | times, the stack slot with the highest address counts. */ | |
814 | ||
815 | for (i = 0; i < S390_NUM_GPRS; i++) | |
816 | if (size == data->gpr_size | |
817 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) | |
818 | if (data->gpr_slot[i] == 0 | |
819 | || data->gpr_slot[i] > offset) | |
820 | { | |
821 | data->gpr_slot[i] = offset; | |
822 | return; | |
823 | } | |
824 | ||
825 | for (i = 0; i < S390_NUM_FPRS; i++) | |
826 | if (size == data->fpr_size | |
827 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) | |
828 | if (data->fpr_slot[i] == 0 | |
829 | || data->fpr_slot[i] > offset) | |
830 | { | |
831 | data->fpr_slot[i] = offset; | |
832 | return; | |
833 | } | |
a8c99f38 | 834 | } |
4bc8c588 | 835 | |
a8c99f38 JB |
836 | /* Analyze the prologue of the function starting at START_PC, |
837 | continuing at most until CURRENT_PC. Initialize DATA to | |
838 | hold all information we find out about the state of the registers | |
839 | and stack slots. Return the address of the instruction after | |
840 | the last one that changed the SP, FP, or back chain; or zero | |
841 | on error. */ | |
842 | static CORE_ADDR | |
843 | s390_analyze_prologue (struct gdbarch *gdbarch, | |
844 | CORE_ADDR start_pc, | |
845 | CORE_ADDR current_pc, | |
846 | struct s390_prologue_data *data) | |
4bc8c588 | 847 | { |
a8c99f38 JB |
848 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
849 | ||
4bc8c588 | 850 | /* Our return value: |
a8c99f38 JB |
851 | The address of the instruction after the last one that changed |
852 | the SP, FP, or back chain; zero if we got an error trying to | |
853 | read memory. */ | |
854 | CORE_ADDR result = start_pc; | |
4bc8c588 | 855 | |
4bc8c588 JB |
856 | /* The current PC for our abstract interpretation. */ |
857 | CORE_ADDR pc; | |
858 | ||
859 | /* The address of the next instruction after that. */ | |
860 | CORE_ADDR next_pc; | |
861 | ||
4bc8c588 JB |
862 | /* Set up everything's initial value. */ |
863 | { | |
864 | int i; | |
865 | ||
55f960e1 | 866 | data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
ee1b3323 | 867 | |
a8c99f38 JB |
868 | /* For the purpose of prologue tracking, we consider the GPR size to |
869 | be equal to the ABI word size, even if it is actually larger | |
870 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ | |
871 | data->gpr_size = word_size; | |
872 | data->fpr_size = 8; | |
e17a4113 | 873 | data->byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 | 874 | |
4bc8c588 | 875 | for (i = 0; i < S390_NUM_GPRS; i++) |
3fc46200 | 876 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
4bc8c588 JB |
877 | |
878 | for (i = 0; i < S390_NUM_FPRS; i++) | |
3fc46200 | 879 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
4bc8c588 | 880 | |
121d8485 UW |
881 | for (i = 0; i < S390_NUM_GPRS; i++) |
882 | data->gpr_slot[i] = 0; | |
883 | ||
884 | for (i = 0; i < S390_NUM_FPRS; i++) | |
885 | data->fpr_slot[i] = 0; | |
4bc8c588 | 886 | |
121d8485 | 887 | data->back_chain_saved_p = 0; |
4bc8c588 JB |
888 | } |
889 | ||
a8c99f38 JB |
890 | /* Start interpreting instructions, until we hit the frame's |
891 | current PC or the first branch instruction. */ | |
892 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) | |
5769d3cd | 893 | { |
4bc8c588 | 894 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
a788de9b | 895 | int insn_len = s390_readinstruction (insn, pc); |
4bc8c588 | 896 | |
3fc46200 UW |
897 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
898 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; | |
899 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; | |
900 | ||
4bc8c588 | 901 | /* Fields for various kinds of instructions. */ |
a8c99f38 JB |
902 | unsigned int b2, r1, r2, x2, r3; |
903 | int i2, d2; | |
4bc8c588 | 904 | |
121d8485 | 905 | /* The values of SP and FP before this instruction, |
4bc8c588 | 906 | for detecting instructions that change them. */ |
3fc46200 | 907 | pv_t pre_insn_sp, pre_insn_fp; |
121d8485 UW |
908 | /* Likewise for the flag whether the back chain was saved. */ |
909 | int pre_insn_back_chain_saved_p; | |
4bc8c588 JB |
910 | |
911 | /* If we got an error trying to read the instruction, report it. */ | |
912 | if (insn_len < 0) | |
8ac0e65a | 913 | { |
a8c99f38 | 914 | result = 0; |
4bc8c588 JB |
915 | break; |
916 | } | |
917 | ||
918 | next_pc = pc + insn_len; | |
919 | ||
a8c99f38 JB |
920 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
921 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
121d8485 | 922 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
4bc8c588 | 923 | |
4bc8c588 | 924 | |
3fc46200 UW |
925 | /* LHI r1, i2 --- load halfword immediate. */ |
926 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ | |
927 | /* LGFI r1, i2 --- load fullword immediate. */ | |
928 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) | |
929 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) | |
930 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) | |
931 | data->gpr[r1] = pv_constant (i2); | |
932 | ||
933 | /* LR r1, r2 --- load from register. */ | |
934 | /* LGR r1, r2 --- load from register (64-bit version). */ | |
935 | else if (is_rr (insn32, op_lr, &r1, &r2) | |
936 | || is_rre (insn64, op_lgr, &r1, &r2)) | |
937 | data->gpr[r1] = data->gpr[r2]; | |
938 | ||
939 | /* L r1, d2(x2, b2) --- load. */ | |
940 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ | |
941 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ | |
942 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) | |
943 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) | |
944 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) | |
945 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); | |
946 | ||
947 | /* ST r1, d2(x2, b2) --- store. */ | |
948 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ | |
949 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ | |
950 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) | |
951 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) | |
952 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) | |
953 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); | |
954 | ||
955 | /* STD r1, d2(x2,b2) --- store floating-point register. */ | |
4bc8c588 | 956 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
957 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
958 | ||
959 | /* STM r1, r3, d2(b2) --- store multiple. */ | |
960 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version). */ | |
961 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ | |
962 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) | |
963 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) | |
964 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) | |
4bc8c588 | 965 | { |
3fc46200 UW |
966 | for (; r1 <= r3; r1++, d2 += data->gpr_size) |
967 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); | |
4bc8c588 JB |
968 | } |
969 | ||
3fc46200 UW |
970 | /* AHI r1, i2 --- add halfword immediate. */ |
971 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ | |
972 | /* AFI r1, i2 --- add fullword immediate. */ | |
973 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ | |
974 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) | |
975 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) | |
976 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) | |
977 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) | |
978 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); | |
979 | ||
980 | /* ALFI r1, i2 --- add logical immediate. */ | |
981 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ | |
982 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) | |
983 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) | |
984 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
985 | (CORE_ADDR)i2 & 0xffffffff); | |
986 | ||
987 | /* AR r1, r2 -- add register. */ | |
988 | /* AGR r1, r2 -- add register (64-bit version). */ | |
989 | else if (is_rr (insn32, op_ar, &r1, &r2) | |
990 | || is_rre (insn64, op_agr, &r1, &r2)) | |
991 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); | |
992 | ||
993 | /* A r1, d2(x2, b2) -- add. */ | |
994 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ | |
995 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ | |
996 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) | |
997 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) | |
998 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) | |
999 | data->gpr[r1] = pv_add (data->gpr[r1], | |
1000 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1001 | ||
1002 | /* SLFI r1, i2 --- subtract logical immediate. */ | |
1003 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ | |
1004 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) | |
1005 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) | |
1006 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1007 | -((CORE_ADDR)i2 & 0xffffffff)); | |
1008 | ||
1009 | /* SR r1, r2 -- subtract register. */ | |
1010 | /* SGR r1, r2 -- subtract register (64-bit version). */ | |
1011 | else if (is_rr (insn32, op_sr, &r1, &r2) | |
1012 | || is_rre (insn64, op_sgr, &r1, &r2)) | |
1013 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); | |
1014 | ||
1015 | /* S r1, d2(x2, b2) -- subtract. */ | |
1016 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ | |
1017 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ | |
1018 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) | |
1019 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) | |
1020 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) | |
1021 | data->gpr[r1] = pv_subtract (data->gpr[r1], | |
1022 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1023 | ||
1024 | /* LA r1, d2(x2, b2) --- load address. */ | |
1025 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ | |
1026 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) | |
1027 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) | |
1028 | data->gpr[r1] = s390_addr (data, d2, x2, b2); | |
1029 | ||
1030 | /* LARL r1, i2 --- load address relative long. */ | |
a8c99f38 | 1031 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
3fc46200 | 1032 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
a8c99f38 | 1033 | |
3fc46200 | 1034 | /* BASR r1, 0 --- branch and save. |
a8c99f38 JB |
1035 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
1036 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1037 | && r2 == 0) | |
3fc46200 | 1038 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1039 | |
3fc46200 | 1040 | /* BRAS r1, i2 --- branch relative and save. */ |
a8c99f38 JB |
1041 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
1042 | { | |
3fc46200 | 1043 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1044 | next_pc = pc + i2 * 2; |
4bc8c588 | 1045 | |
a8c99f38 JB |
1046 | /* We'd better not interpret any backward branches. We'll |
1047 | never terminate. */ | |
1048 | if (next_pc <= pc) | |
4bc8c588 JB |
1049 | break; |
1050 | } | |
1051 | ||
a8c99f38 JB |
1052 | /* Terminate search when hitting any other branch instruction. */ |
1053 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1054 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) | |
1055 | || is_rr (insn, op_bcr, &r1, &r2) | |
1056 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1057 | || is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1058 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1059 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) | |
1060 | break; | |
1061 | ||
4bc8c588 JB |
1062 | else |
1063 | /* An instruction we don't know how to simulate. The only | |
1064 | safe thing to do would be to set every value we're tracking | |
a8c99f38 JB |
1065 | to 'unknown'. Instead, we'll be optimistic: we assume that |
1066 | we *can* interpret every instruction that the compiler uses | |
1067 | to manipulate any of the data we're interested in here -- | |
1068 | then we can just ignore anything else. */ | |
1069 | ; | |
4bc8c588 JB |
1070 | |
1071 | /* Record the address after the last instruction that changed | |
1072 | the FP, SP, or backlink. Ignore instructions that changed | |
1073 | them back to their original values --- those are probably | |
1074 | restore instructions. (The back chain is never restored, | |
1075 | just popped.) */ | |
1076 | { | |
3fc46200 UW |
1077 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1078 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
4bc8c588 | 1079 | |
3fc46200 UW |
1080 | if ((! pv_is_identical (pre_insn_sp, sp) |
1081 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) | |
1082 | && sp.kind != pvk_unknown) | |
1083 | || (! pv_is_identical (pre_insn_fp, fp) | |
1084 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) | |
1085 | && fp.kind != pvk_unknown) | |
121d8485 | 1086 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
a8c99f38 | 1087 | result = next_pc; |
4bc8c588 | 1088 | } |
5769d3cd | 1089 | } |
4bc8c588 | 1090 | |
ee1b3323 UW |
1091 | /* Record where all the registers were saved. */ |
1092 | pv_area_scan (data->stack, s390_check_for_saved, data); | |
1093 | ||
1094 | free_pv_area (data->stack); | |
1095 | data->stack = NULL; | |
1096 | ||
4bc8c588 | 1097 | return result; |
5769d3cd AC |
1098 | } |
1099 | ||
a8c99f38 JB |
1100 | /* Advance PC across any function entry prologue instructions to reach |
1101 | some "real" code. */ | |
1102 | static CORE_ADDR | |
6093d2eb | 1103 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
a8c99f38 JB |
1104 | { |
1105 | struct s390_prologue_data data; | |
1106 | CORE_ADDR skip_pc; | |
6093d2eb | 1107 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
a8c99f38 JB |
1108 | return skip_pc ? skip_pc : pc; |
1109 | } | |
1110 | ||
d0f54f9d JB |
1111 | /* Return true if we are in the functin's epilogue, i.e. after the |
1112 | instruction that destroyed the function's stack frame. */ | |
1113 | static int | |
1114 | s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1115 | { | |
1116 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
1117 | ||
1118 | /* In frameless functions, there's not frame to destroy and thus | |
1119 | we don't care about the epilogue. | |
1120 | ||
1121 | In functions with frame, the epilogue sequence is a pair of | |
1122 | a LM-type instruction that restores (amongst others) the | |
1123 | return register %r14 and the stack pointer %r15, followed | |
1124 | by a branch 'br %r14' --or equivalent-- that effects the | |
1125 | actual return. | |
1126 | ||
1127 | In that situation, this function needs to return 'true' in | |
1128 | exactly one case: when pc points to that branch instruction. | |
1129 | ||
1130 | Thus we try to disassemble the one instructions immediately | |
1131 | preceeding pc and check whether it is an LM-type instruction | |
1132 | modifying the stack pointer. | |
1133 | ||
1134 | Note that disassembling backwards is not reliable, so there | |
1135 | is a slight chance of false positives here ... */ | |
1136 | ||
1137 | bfd_byte insn[6]; | |
1138 | unsigned int r1, r3, b2; | |
1139 | int d2; | |
1140 | ||
1141 | if (word_size == 4 | |
8defab1a | 1142 | && !target_read_memory (pc - 4, insn, 4) |
d0f54f9d JB |
1143 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
1144 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1145 | return 1; | |
1146 | ||
a8c99f38 | 1147 | if (word_size == 4 |
8defab1a | 1148 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 JB |
1149 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
1150 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1151 | return 1; | |
1152 | ||
d0f54f9d | 1153 | if (word_size == 8 |
8defab1a | 1154 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 | 1155 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
d0f54f9d JB |
1156 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
1157 | return 1; | |
1158 | ||
1159 | return 0; | |
1160 | } | |
5769d3cd | 1161 | |
a8c99f38 JB |
1162 | |
1163 | /* Normal stack frames. */ | |
1164 | ||
1165 | struct s390_unwind_cache { | |
1166 | ||
1167 | CORE_ADDR func; | |
1168 | CORE_ADDR frame_base; | |
1169 | CORE_ADDR local_base; | |
1170 | ||
1171 | struct trad_frame_saved_reg *saved_regs; | |
1172 | }; | |
1173 | ||
a78f21af | 1174 | static int |
f089c433 | 1175 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1176 | struct s390_unwind_cache *info) |
5769d3cd | 1177 | { |
f089c433 | 1178 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
121d8485 | 1179 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 JB |
1180 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1181 | struct s390_prologue_data data; | |
3fc46200 UW |
1182 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
1183 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; | |
121d8485 UW |
1184 | int i; |
1185 | CORE_ADDR cfa; | |
a8c99f38 JB |
1186 | CORE_ADDR func; |
1187 | CORE_ADDR result; | |
1188 | ULONGEST reg; | |
1189 | CORE_ADDR prev_sp; | |
1190 | int frame_pointer; | |
1191 | int size; | |
edb3359d | 1192 | struct frame_info *next_frame; |
a8c99f38 JB |
1193 | |
1194 | /* Try to find the function start address. If we can't find it, we don't | |
1195 | bother searching for it -- with modern compilers this would be mostly | |
1196 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data | |
1197 | or else a valid backchain ... */ | |
f089c433 | 1198 | func = get_frame_func (this_frame); |
a8c99f38 JB |
1199 | if (!func) |
1200 | return 0; | |
5769d3cd | 1201 | |
a8c99f38 JB |
1202 | /* Try to analyze the prologue. */ |
1203 | result = s390_analyze_prologue (gdbarch, func, | |
f089c433 | 1204 | get_frame_pc (this_frame), &data); |
a8c99f38 | 1205 | if (!result) |
5769d3cd | 1206 | return 0; |
5769d3cd | 1207 | |
a8c99f38 JB |
1208 | /* If this was successful, we should have found the instruction that |
1209 | sets the stack pointer register to the previous value of the stack | |
1210 | pointer minus the frame size. */ | |
3fc46200 | 1211 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
5769d3cd | 1212 | return 0; |
a8c99f38 JB |
1213 | |
1214 | /* A frame size of zero at this point can mean either a real | |
1215 | frameless function, or else a failure to find the prologue. | |
1216 | Perform some sanity checks to verify we really have a | |
1217 | frameless function. */ | |
1218 | if (sp->k == 0) | |
5769d3cd | 1219 | { |
a8c99f38 JB |
1220 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
1221 | size zero. This is only possible if the next frame is a sentinel | |
1222 | frame, a dummy frame, or a signal trampoline frame. */ | |
0e100dab AC |
1223 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
1224 | needed, instead the code should simpliy rely on its | |
1225 | analysis. */ | |
edb3359d DJ |
1226 | next_frame = get_next_frame (this_frame); |
1227 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1228 | next_frame = get_next_frame (next_frame); | |
1229 | if (next_frame | |
f089c433 | 1230 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
5769d3cd | 1231 | return 0; |
5769d3cd | 1232 | |
a8c99f38 JB |
1233 | /* If we really have a frameless function, %r14 must be valid |
1234 | -- in particular, it must point to a different function. */ | |
f089c433 | 1235 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
a8c99f38 JB |
1236 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
1237 | if (get_pc_function_start (reg) == func) | |
5769d3cd | 1238 | { |
a8c99f38 JB |
1239 | /* However, there is one case where it *is* valid for %r14 |
1240 | to point to the same function -- if this is a recursive | |
1241 | call, and we have stopped in the prologue *before* the | |
1242 | stack frame was allocated. | |
1243 | ||
1244 | Recognize this case by looking ahead a bit ... */ | |
5769d3cd | 1245 | |
a8c99f38 | 1246 | struct s390_prologue_data data2; |
3fc46200 | 1247 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
a8c99f38 JB |
1248 | |
1249 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) | |
3fc46200 | 1250 | && pv_is_register (*sp, S390_SP_REGNUM) |
a8c99f38 JB |
1251 | && sp->k != 0)) |
1252 | return 0; | |
5769d3cd | 1253 | } |
5769d3cd | 1254 | } |
5769d3cd AC |
1255 | |
1256 | ||
a8c99f38 JB |
1257 | /* OK, we've found valid prologue data. */ |
1258 | size = -sp->k; | |
5769d3cd | 1259 | |
a8c99f38 JB |
1260 | /* If the frame pointer originally also holds the same value |
1261 | as the stack pointer, we're probably using it. If it holds | |
1262 | some other value -- even a constant offset -- it is most | |
1263 | likely used as temp register. */ | |
3fc46200 | 1264 | if (pv_is_identical (*sp, *fp)) |
a8c99f38 JB |
1265 | frame_pointer = S390_FRAME_REGNUM; |
1266 | else | |
1267 | frame_pointer = S390_SP_REGNUM; | |
1268 | ||
1269 | /* If we've detected a function with stack frame, we'll still have to | |
1270 | treat it as frameless if we're currently within the function epilog | |
1271 | code at a point where the frame pointer has already been restored. | |
1272 | This can only happen in an innermost frame. */ | |
0e100dab AC |
1273 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
1274 | instead the code should simpliy rely on its analysis. */ | |
edb3359d DJ |
1275 | next_frame = get_next_frame (this_frame); |
1276 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1277 | next_frame = get_next_frame (next_frame); | |
f089c433 | 1278 | if (size > 0 |
edb3359d | 1279 | && (next_frame == NULL |
f089c433 | 1280 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
5769d3cd | 1281 | { |
a8c99f38 JB |
1282 | /* See the comment in s390_in_function_epilogue_p on why this is |
1283 | not completely reliable ... */ | |
f089c433 | 1284 | if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) |
5769d3cd | 1285 | { |
a8c99f38 JB |
1286 | memset (&data, 0, sizeof (data)); |
1287 | size = 0; | |
1288 | frame_pointer = S390_SP_REGNUM; | |
5769d3cd | 1289 | } |
5769d3cd | 1290 | } |
5769d3cd | 1291 | |
a8c99f38 JB |
1292 | /* Once we know the frame register and the frame size, we can unwind |
1293 | the current value of the frame register from the next frame, and | |
1294 | add back the frame size to arrive that the previous frame's | |
1295 | stack pointer value. */ | |
f089c433 | 1296 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
121d8485 | 1297 | cfa = prev_sp + 16*word_size + 32; |
5769d3cd | 1298 | |
121d8485 UW |
1299 | /* Record the addresses of all register spill slots the prologue parser |
1300 | has recognized. Consider only registers defined as call-saved by the | |
1301 | ABI; for call-clobbered registers the parser may have recognized | |
1302 | spurious stores. */ | |
5769d3cd | 1303 | |
121d8485 UW |
1304 | for (i = 6; i <= 15; i++) |
1305 | if (data.gpr_slot[i] != 0) | |
1306 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; | |
a8c99f38 | 1307 | |
121d8485 | 1308 | switch (tdep->abi) |
5769d3cd | 1309 | { |
121d8485 UW |
1310 | case ABI_LINUX_S390: |
1311 | if (data.fpr_slot[4] != 0) | |
1312 | info->saved_regs[S390_F4_REGNUM].addr = cfa - data.fpr_slot[4]; | |
1313 | if (data.fpr_slot[6] != 0) | |
1314 | info->saved_regs[S390_F6_REGNUM].addr = cfa - data.fpr_slot[6]; | |
1315 | break; | |
a8c99f38 | 1316 | |
121d8485 UW |
1317 | case ABI_LINUX_ZSERIES: |
1318 | for (i = 8; i <= 15; i++) | |
1319 | if (data.fpr_slot[i] != 0) | |
1320 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; | |
1321 | break; | |
a8c99f38 JB |
1322 | } |
1323 | ||
1324 | /* Function return will set PC to %r14. */ | |
1325 | info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; | |
1326 | ||
1327 | /* In frameless functions, we unwind simply by moving the return | |
1328 | address to the PC. However, if we actually stored to the | |
1329 | save area, use that -- we might only think the function frameless | |
1330 | because we're in the middle of the prologue ... */ | |
1331 | if (size == 0 | |
1332 | && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM)) | |
1333 | { | |
1334 | info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM; | |
5769d3cd | 1335 | } |
a8c99f38 JB |
1336 | |
1337 | /* Another sanity check: unless this is a frameless function, | |
1338 | we should have found spill slots for SP and PC. | |
1339 | If not, we cannot unwind further -- this happens e.g. in | |
1340 | libc's thread_start routine. */ | |
1341 | if (size > 0) | |
5769d3cd | 1342 | { |
a8c99f38 JB |
1343 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
1344 | || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM)) | |
1345 | prev_sp = -1; | |
5769d3cd | 1346 | } |
a8c99f38 JB |
1347 | |
1348 | /* We use the current value of the frame register as local_base, | |
1349 | and the top of the register save area as frame_base. */ | |
1350 | if (prev_sp != -1) | |
1351 | { | |
1352 | info->frame_base = prev_sp + 16*word_size + 32; | |
1353 | info->local_base = prev_sp - size; | |
1354 | } | |
1355 | ||
1356 | info->func = func; | |
1357 | return 1; | |
5769d3cd AC |
1358 | } |
1359 | ||
a78f21af | 1360 | static void |
f089c433 | 1361 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1362 | struct s390_unwind_cache *info) |
5769d3cd | 1363 | { |
f089c433 | 1364 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1365 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1366 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1367 | CORE_ADDR backchain; |
1368 | ULONGEST reg; | |
1369 | LONGEST sp; | |
1370 | ||
1371 | /* Get the backchain. */ | |
f089c433 | 1372 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
e17a4113 | 1373 | backchain = read_memory_unsigned_integer (reg, word_size, byte_order); |
a8c99f38 JB |
1374 | |
1375 | /* A zero backchain terminates the frame chain. As additional | |
1376 | sanity check, let's verify that the spill slot for SP in the | |
1377 | save area pointed to by the backchain in fact links back to | |
1378 | the save area. */ | |
1379 | if (backchain != 0 | |
e17a4113 UW |
1380 | && safe_read_memory_integer (backchain + 15*word_size, |
1381 | word_size, byte_order, &sp) | |
a8c99f38 JB |
1382 | && (CORE_ADDR)sp == backchain) |
1383 | { | |
1384 | /* We don't know which registers were saved, but it will have | |
1385 | to be at least %r14 and %r15. This will allow us to continue | |
1386 | unwinding, but other prev-frame registers may be incorrect ... */ | |
1387 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; | |
1388 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; | |
1389 | ||
1390 | /* Function return will set PC to %r14. */ | |
1391 | info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; | |
1392 | ||
1393 | /* We use the current value of the frame register as local_base, | |
1394 | and the top of the register save area as frame_base. */ | |
1395 | info->frame_base = backchain + 16*word_size + 32; | |
1396 | info->local_base = reg; | |
1397 | } | |
1398 | ||
f089c433 | 1399 | info->func = get_frame_pc (this_frame); |
5769d3cd AC |
1400 | } |
1401 | ||
a8c99f38 | 1402 | static struct s390_unwind_cache * |
f089c433 | 1403 | s390_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 JB |
1404 | void **this_prologue_cache) |
1405 | { | |
1406 | struct s390_unwind_cache *info; | |
1407 | if (*this_prologue_cache) | |
1408 | return *this_prologue_cache; | |
1409 | ||
1410 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); | |
1411 | *this_prologue_cache = info; | |
f089c433 | 1412 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1413 | info->func = -1; |
1414 | info->frame_base = -1; | |
1415 | info->local_base = -1; | |
1416 | ||
1417 | /* Try to use prologue analysis to fill the unwind cache. | |
1418 | If this fails, fall back to reading the stack backchain. */ | |
f089c433 UW |
1419 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) |
1420 | s390_backchain_frame_unwind_cache (this_frame, info); | |
a8c99f38 JB |
1421 | |
1422 | return info; | |
1423 | } | |
5769d3cd | 1424 | |
a78f21af | 1425 | static void |
f089c433 | 1426 | s390_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1427 | void **this_prologue_cache, |
1428 | struct frame_id *this_id) | |
5769d3cd | 1429 | { |
a8c99f38 | 1430 | struct s390_unwind_cache *info |
f089c433 | 1431 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
5769d3cd | 1432 | |
a8c99f38 JB |
1433 | if (info->frame_base == -1) |
1434 | return; | |
5769d3cd | 1435 | |
a8c99f38 | 1436 | *this_id = frame_id_build (info->frame_base, info->func); |
5769d3cd AC |
1437 | } |
1438 | ||
f089c433 UW |
1439 | static struct value * |
1440 | s390_frame_prev_register (struct frame_info *this_frame, | |
1441 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
1442 | { |
1443 | struct s390_unwind_cache *info | |
f089c433 UW |
1444 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
1445 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
1446 | } |
1447 | ||
1448 | static const struct frame_unwind s390_frame_unwind = { | |
1449 | NORMAL_FRAME, | |
1450 | s390_frame_this_id, | |
f089c433 UW |
1451 | s390_frame_prev_register, |
1452 | NULL, | |
1453 | default_frame_sniffer | |
a8c99f38 JB |
1454 | }; |
1455 | ||
5769d3cd | 1456 | |
8e645ae7 AC |
1457 | /* Code stubs and their stack frames. For things like PLTs and NULL |
1458 | function calls (where there is no true frame and the return address | |
1459 | is in the RETADDR register). */ | |
a8c99f38 | 1460 | |
8e645ae7 AC |
1461 | struct s390_stub_unwind_cache |
1462 | { | |
a8c99f38 JB |
1463 | CORE_ADDR frame_base; |
1464 | struct trad_frame_saved_reg *saved_regs; | |
1465 | }; | |
1466 | ||
8e645ae7 | 1467 | static struct s390_stub_unwind_cache * |
f089c433 | 1468 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
8e645ae7 | 1469 | void **this_prologue_cache) |
5769d3cd | 1470 | { |
f089c433 | 1471 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1472 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
8e645ae7 | 1473 | struct s390_stub_unwind_cache *info; |
a8c99f38 | 1474 | ULONGEST reg; |
5c3cf190 | 1475 | |
a8c99f38 JB |
1476 | if (*this_prologue_cache) |
1477 | return *this_prologue_cache; | |
5c3cf190 | 1478 | |
8e645ae7 | 1479 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
a8c99f38 | 1480 | *this_prologue_cache = info; |
f089c433 | 1481 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1482 | |
1483 | /* The return address is in register %r14. */ | |
1484 | info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM; | |
1485 | ||
1486 | /* Retrieve stack pointer and determine our frame base. */ | |
f089c433 | 1487 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
a8c99f38 JB |
1488 | info->frame_base = reg + 16*word_size + 32; |
1489 | ||
1490 | return info; | |
5769d3cd AC |
1491 | } |
1492 | ||
a8c99f38 | 1493 | static void |
f089c433 | 1494 | s390_stub_frame_this_id (struct frame_info *this_frame, |
8e645ae7 AC |
1495 | void **this_prologue_cache, |
1496 | struct frame_id *this_id) | |
5769d3cd | 1497 | { |
8e645ae7 | 1498 | struct s390_stub_unwind_cache *info |
f089c433 UW |
1499 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1500 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
a8c99f38 | 1501 | } |
5769d3cd | 1502 | |
f089c433 UW |
1503 | static struct value * |
1504 | s390_stub_frame_prev_register (struct frame_info *this_frame, | |
1505 | void **this_prologue_cache, int regnum) | |
8e645ae7 AC |
1506 | { |
1507 | struct s390_stub_unwind_cache *info | |
f089c433 UW |
1508 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1509 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
1510 | } |
1511 | ||
f089c433 UW |
1512 | static int |
1513 | s390_stub_frame_sniffer (const struct frame_unwind *self, | |
1514 | struct frame_info *this_frame, | |
1515 | void **this_prologue_cache) | |
a8c99f38 | 1516 | { |
93d42b30 | 1517 | CORE_ADDR addr_in_block; |
8e645ae7 AC |
1518 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
1519 | ||
1520 | /* If the current PC points to non-readable memory, we assume we | |
1521 | have trapped due to an invalid function pointer call. We handle | |
1522 | the non-existing current function like a PLT stub. */ | |
f089c433 | 1523 | addr_in_block = get_frame_address_in_block (this_frame); |
93d42b30 | 1524 | if (in_plt_section (addr_in_block, NULL) |
f089c433 UW |
1525 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
1526 | return 1; | |
1527 | return 0; | |
a8c99f38 | 1528 | } |
5769d3cd | 1529 | |
f089c433 UW |
1530 | static const struct frame_unwind s390_stub_frame_unwind = { |
1531 | NORMAL_FRAME, | |
1532 | s390_stub_frame_this_id, | |
1533 | s390_stub_frame_prev_register, | |
1534 | NULL, | |
1535 | s390_stub_frame_sniffer | |
1536 | }; | |
1537 | ||
5769d3cd | 1538 | |
a8c99f38 | 1539 | /* Signal trampoline stack frames. */ |
5769d3cd | 1540 | |
a8c99f38 JB |
1541 | struct s390_sigtramp_unwind_cache { |
1542 | CORE_ADDR frame_base; | |
1543 | struct trad_frame_saved_reg *saved_regs; | |
1544 | }; | |
5769d3cd | 1545 | |
a8c99f38 | 1546 | static struct s390_sigtramp_unwind_cache * |
f089c433 | 1547 | s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1548 | void **this_prologue_cache) |
5769d3cd | 1549 | { |
f089c433 | 1550 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1551 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1552 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1553 | struct s390_sigtramp_unwind_cache *info; |
1554 | ULONGEST this_sp, prev_sp; | |
1555 | CORE_ADDR next_ra, next_cfa, sigreg_ptr; | |
1556 | int i; | |
1557 | ||
1558 | if (*this_prologue_cache) | |
1559 | return *this_prologue_cache; | |
5769d3cd | 1560 | |
a8c99f38 JB |
1561 | info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); |
1562 | *this_prologue_cache = info; | |
f089c433 | 1563 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 | 1564 | |
f089c433 UW |
1565 | this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
1566 | next_ra = get_frame_pc (this_frame); | |
a8c99f38 JB |
1567 | next_cfa = this_sp + 16*word_size + 32; |
1568 | ||
1569 | /* New-style RT frame: | |
1570 | retcode + alignment (8 bytes) | |
1571 | siginfo (128 bytes) | |
1572 | ucontext (contains sigregs at offset 5 words) */ | |
1573 | if (next_ra == next_cfa) | |
1574 | { | |
f0f63663 | 1575 | sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); |
a8c99f38 JB |
1576 | } |
1577 | ||
1578 | /* Old-style RT frame and all non-RT frames: | |
1579 | old signal mask (8 bytes) | |
1580 | pointer to sigregs */ | |
5769d3cd AC |
1581 | else |
1582 | { | |
e17a4113 UW |
1583 | sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, |
1584 | word_size, byte_order); | |
a8c99f38 | 1585 | } |
5769d3cd | 1586 | |
a8c99f38 JB |
1587 | /* The sigregs structure looks like this: |
1588 | long psw_mask; | |
1589 | long psw_addr; | |
1590 | long gprs[16]; | |
1591 | int acrs[16]; | |
1592 | int fpc; | |
1593 | int __pad; | |
1594 | double fprs[16]; */ | |
5769d3cd | 1595 | |
a8c99f38 JB |
1596 | /* Let's ignore the PSW mask, it will not be restored anyway. */ |
1597 | sigreg_ptr += word_size; | |
1598 | ||
1599 | /* Next comes the PSW address. */ | |
1600 | info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr; | |
1601 | sigreg_ptr += word_size; | |
1602 | ||
1603 | /* Then the GPRs. */ | |
1604 | for (i = 0; i < 16; i++) | |
1605 | { | |
1606 | info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; | |
1607 | sigreg_ptr += word_size; | |
1608 | } | |
1609 | ||
1610 | /* Then the ACRs. */ | |
1611 | for (i = 0; i < 16; i++) | |
1612 | { | |
1613 | info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; | |
1614 | sigreg_ptr += 4; | |
5769d3cd | 1615 | } |
5769d3cd | 1616 | |
a8c99f38 JB |
1617 | /* The floating-point control word. */ |
1618 | info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; | |
1619 | sigreg_ptr += 8; | |
5769d3cd | 1620 | |
a8c99f38 JB |
1621 | /* And finally the FPRs. */ |
1622 | for (i = 0; i < 16; i++) | |
1623 | { | |
1624 | info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; | |
1625 | sigreg_ptr += 8; | |
1626 | } | |
1627 | ||
1628 | /* Restore the previous frame's SP. */ | |
1629 | prev_sp = read_memory_unsigned_integer ( | |
1630 | info->saved_regs[S390_SP_REGNUM].addr, | |
e17a4113 | 1631 | word_size, byte_order); |
5769d3cd | 1632 | |
a8c99f38 JB |
1633 | /* Determine our frame base. */ |
1634 | info->frame_base = prev_sp + 16*word_size + 32; | |
5769d3cd | 1635 | |
a8c99f38 | 1636 | return info; |
5769d3cd AC |
1637 | } |
1638 | ||
a8c99f38 | 1639 | static void |
f089c433 | 1640 | s390_sigtramp_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1641 | void **this_prologue_cache, |
1642 | struct frame_id *this_id) | |
5769d3cd | 1643 | { |
a8c99f38 | 1644 | struct s390_sigtramp_unwind_cache *info |
f089c433 UW |
1645 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
1646 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
5769d3cd AC |
1647 | } |
1648 | ||
f089c433 UW |
1649 | static struct value * |
1650 | s390_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
1651 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
1652 | { |
1653 | struct s390_sigtramp_unwind_cache *info | |
f089c433 UW |
1654 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
1655 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
1656 | } |
1657 | ||
f089c433 UW |
1658 | static int |
1659 | s390_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
1660 | struct frame_info *this_frame, | |
1661 | void **this_prologue_cache) | |
5769d3cd | 1662 | { |
f089c433 | 1663 | CORE_ADDR pc = get_frame_pc (this_frame); |
a8c99f38 | 1664 | bfd_byte sigreturn[2]; |
4c8287ac | 1665 | |
8defab1a | 1666 | if (target_read_memory (pc, sigreturn, 2)) |
f089c433 | 1667 | return 0; |
4c8287ac | 1668 | |
a8c99f38 | 1669 | if (sigreturn[0] != 0x0a /* svc */) |
f089c433 | 1670 | return 0; |
5769d3cd | 1671 | |
a8c99f38 JB |
1672 | if (sigreturn[1] != 119 /* sigreturn */ |
1673 | && sigreturn[1] != 173 /* rt_sigreturn */) | |
f089c433 | 1674 | return 0; |
a8c99f38 | 1675 | |
f089c433 | 1676 | return 1; |
5769d3cd AC |
1677 | } |
1678 | ||
f089c433 UW |
1679 | static const struct frame_unwind s390_sigtramp_frame_unwind = { |
1680 | SIGTRAMP_FRAME, | |
1681 | s390_sigtramp_frame_this_id, | |
1682 | s390_sigtramp_frame_prev_register, | |
1683 | NULL, | |
1684 | s390_sigtramp_frame_sniffer | |
1685 | }; | |
1686 | ||
4c8287ac | 1687 | |
a8c99f38 JB |
1688 | /* Frame base handling. */ |
1689 | ||
1690 | static CORE_ADDR | |
f089c433 | 1691 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
4c8287ac | 1692 | { |
a8c99f38 | 1693 | struct s390_unwind_cache *info |
f089c433 | 1694 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
1695 | return info->frame_base; |
1696 | } | |
1697 | ||
1698 | static CORE_ADDR | |
f089c433 | 1699 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
a8c99f38 JB |
1700 | { |
1701 | struct s390_unwind_cache *info | |
f089c433 | 1702 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
1703 | return info->local_base; |
1704 | } | |
1705 | ||
1706 | static const struct frame_base s390_frame_base = { | |
1707 | &s390_frame_unwind, | |
1708 | s390_frame_base_address, | |
1709 | s390_local_base_address, | |
1710 | s390_local_base_address | |
1711 | }; | |
1712 | ||
1713 | static CORE_ADDR | |
1714 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1715 | { | |
1716 | ULONGEST pc; | |
1717 | pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM); | |
1718 | return gdbarch_addr_bits_remove (gdbarch, pc); | |
1719 | } | |
1720 | ||
1721 | static CORE_ADDR | |
1722 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
1723 | { | |
1724 | ULONGEST sp; | |
1725 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); | |
1726 | return gdbarch_addr_bits_remove (gdbarch, sp); | |
4c8287ac JB |
1727 | } |
1728 | ||
1729 | ||
a431654a AC |
1730 | /* DWARF-2 frame support. */ |
1731 | ||
1732 | static void | |
1733 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
aff37fc1 | 1734 | struct dwarf2_frame_state_reg *reg, |
4a4e5149 | 1735 | struct frame_info *this_frame) |
a431654a AC |
1736 | { |
1737 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1738 | ||
1739 | switch (tdep->abi) | |
1740 | { | |
1741 | case ABI_LINUX_S390: | |
1742 | /* Call-saved registers. */ | |
1743 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
1744 | || regnum == S390_F4_REGNUM | |
1745 | || regnum == S390_F6_REGNUM) | |
1746 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; | |
1747 | ||
1748 | /* Call-clobbered registers. */ | |
1749 | else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM) | |
1750 | || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM | |
1751 | && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM)) | |
1752 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
1753 | ||
1754 | /* The return address column. */ | |
1755 | else if (regnum == S390_PC_REGNUM) | |
1756 | reg->how = DWARF2_FRAME_REG_RA; | |
1757 | break; | |
1758 | ||
1759 | case ABI_LINUX_ZSERIES: | |
1760 | /* Call-saved registers. */ | |
1761 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
1762 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)) | |
1763 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; | |
1764 | ||
1765 | /* Call-clobbered registers. */ | |
1766 | else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM) | |
1767 | || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM)) | |
1768 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
1769 | ||
1770 | /* The return address column. */ | |
1771 | else if (regnum == S390_PC_REGNUM) | |
1772 | reg->how = DWARF2_FRAME_REG_RA; | |
1773 | break; | |
1774 | } | |
1775 | } | |
1776 | ||
1777 | ||
b0cf273e JB |
1778 | /* Dummy function calls. */ |
1779 | ||
78f8b424 JB |
1780 | /* Return non-zero if TYPE is an integer-like type, zero otherwise. |
1781 | "Integer-like" types are those that should be passed the way | |
1782 | integers are: integers, enums, ranges, characters, and booleans. */ | |
1783 | static int | |
1784 | is_integer_like (struct type *type) | |
1785 | { | |
1786 | enum type_code code = TYPE_CODE (type); | |
1787 | ||
1788 | return (code == TYPE_CODE_INT | |
1789 | || code == TYPE_CODE_ENUM | |
1790 | || code == TYPE_CODE_RANGE | |
1791 | || code == TYPE_CODE_CHAR | |
1792 | || code == TYPE_CODE_BOOL); | |
1793 | } | |
1794 | ||
78f8b424 JB |
1795 | /* Return non-zero if TYPE is a pointer-like type, zero otherwise. |
1796 | "Pointer-like" types are those that should be passed the way | |
1797 | pointers are: pointers and references. */ | |
1798 | static int | |
1799 | is_pointer_like (struct type *type) | |
1800 | { | |
1801 | enum type_code code = TYPE_CODE (type); | |
1802 | ||
1803 | return (code == TYPE_CODE_PTR | |
1804 | || code == TYPE_CODE_REF); | |
1805 | } | |
1806 | ||
1807 | ||
20a940cc JB |
1808 | /* Return non-zero if TYPE is a `float singleton' or `double |
1809 | singleton', zero otherwise. | |
1810 | ||
1811 | A `T singleton' is a struct type with one member, whose type is | |
1812 | either T or a `T singleton'. So, the following are all float | |
1813 | singletons: | |
1814 | ||
1815 | struct { float x }; | |
1816 | struct { struct { float x; } x; }; | |
1817 | struct { struct { struct { float x; } x; } x; }; | |
1818 | ||
1819 | ... and so on. | |
1820 | ||
b0cf273e JB |
1821 | All such structures are passed as if they were floats or doubles, |
1822 | as the (revised) ABI says. */ | |
20a940cc JB |
1823 | static int |
1824 | is_float_singleton (struct type *type) | |
1825 | { | |
b0cf273e JB |
1826 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) |
1827 | { | |
1828 | struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); | |
1829 | CHECK_TYPEDEF (singleton_type); | |
1830 | ||
1831 | return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT | |
a16b8bcd | 1832 | || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT |
b0cf273e JB |
1833 | || is_float_singleton (singleton_type)); |
1834 | } | |
1835 | ||
1836 | return 0; | |
20a940cc JB |
1837 | } |
1838 | ||
1839 | ||
1840 | /* Return non-zero if TYPE is a struct-like type, zero otherwise. | |
1841 | "Struct-like" types are those that should be passed as structs are: | |
1842 | structs and unions. | |
1843 | ||
1844 | As an odd quirk, not mentioned in the ABI, GCC passes float and | |
1845 | double singletons as if they were a plain float, double, etc. (The | |
1846 | corresponding union types are handled normally.) So we exclude | |
1847 | those types here. *shrug* */ | |
1848 | static int | |
1849 | is_struct_like (struct type *type) | |
1850 | { | |
1851 | enum type_code code = TYPE_CODE (type); | |
1852 | ||
1853 | return (code == TYPE_CODE_UNION | |
1854 | || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); | |
1855 | } | |
1856 | ||
1857 | ||
1858 | /* Return non-zero if TYPE is a float-like type, zero otherwise. | |
1859 | "Float-like" types are those that should be passed as | |
1860 | floating-point values are. | |
1861 | ||
1862 | You'd think this would just be floats, doubles, long doubles, etc. | |
1863 | But as an odd quirk, not mentioned in the ABI, GCC passes float and | |
1864 | double singletons as if they were a plain float, double, etc. (The | |
4d819d0e | 1865 | corresponding union types are handled normally.) So we include |
20a940cc JB |
1866 | those types here. *shrug* */ |
1867 | static int | |
1868 | is_float_like (struct type *type) | |
1869 | { | |
1870 | return (TYPE_CODE (type) == TYPE_CODE_FLT | |
a16b8bcd | 1871 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
20a940cc JB |
1872 | || is_float_singleton (type)); |
1873 | } | |
1874 | ||
1875 | ||
78f8b424 | 1876 | static int |
b0cf273e | 1877 | is_power_of_two (unsigned int n) |
78f8b424 | 1878 | { |
b0cf273e | 1879 | return ((n & (n - 1)) == 0); |
78f8b424 JB |
1880 | } |
1881 | ||
b0cf273e JB |
1882 | /* Return non-zero if TYPE should be passed as a pointer to a copy, |
1883 | zero otherwise. */ | |
4d819d0e | 1884 | static int |
b0cf273e | 1885 | s390_function_arg_pass_by_reference (struct type *type) |
4d819d0e JB |
1886 | { |
1887 | unsigned length = TYPE_LENGTH (type); | |
b0cf273e JB |
1888 | if (length > 8) |
1889 | return 1; | |
4d819d0e | 1890 | |
b0cf273e JB |
1891 | /* FIXME: All complex and vector types are also returned by reference. */ |
1892 | return is_struct_like (type) && !is_power_of_two (length); | |
4d819d0e JB |
1893 | } |
1894 | ||
b0cf273e JB |
1895 | /* Return non-zero if TYPE should be passed in a float register |
1896 | if possible. */ | |
78f8b424 | 1897 | static int |
b0cf273e | 1898 | s390_function_arg_float (struct type *type) |
78f8b424 | 1899 | { |
78f8b424 | 1900 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
1901 | if (length > 8) |
1902 | return 0; | |
78f8b424 | 1903 | |
b0cf273e | 1904 | return is_float_like (type); |
4d819d0e JB |
1905 | } |
1906 | ||
b0cf273e JB |
1907 | /* Return non-zero if TYPE should be passed in an integer register |
1908 | (or a pair of integer registers) if possible. */ | |
78f8b424 | 1909 | static int |
b0cf273e | 1910 | s390_function_arg_integer (struct type *type) |
78f8b424 | 1911 | { |
78f8b424 | 1912 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
1913 | if (length > 8) |
1914 | return 0; | |
78f8b424 | 1915 | |
b0cf273e JB |
1916 | return is_integer_like (type) |
1917 | || is_pointer_like (type) | |
1918 | || (is_struct_like (type) && is_power_of_two (length)); | |
78f8b424 JB |
1919 | } |
1920 | ||
78f8b424 JB |
1921 | /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full |
1922 | word as required for the ABI. */ | |
1923 | static LONGEST | |
e17a4113 | 1924 | extend_simple_arg (struct gdbarch *gdbarch, struct value *arg) |
78f8b424 | 1925 | { |
e17a4113 | 1926 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
4991999e | 1927 | struct type *type = value_type (arg); |
78f8b424 JB |
1928 | |
1929 | /* Even structs get passed in the least significant bits of the | |
1930 | register / memory word. It's not really right to extract them as | |
1931 | an integer, but it does take care of the extension. */ | |
1932 | if (TYPE_UNSIGNED (type)) | |
0fd88904 | 1933 | return extract_unsigned_integer (value_contents (arg), |
e17a4113 | 1934 | TYPE_LENGTH (type), byte_order); |
78f8b424 | 1935 | else |
0fd88904 | 1936 | return extract_signed_integer (value_contents (arg), |
e17a4113 | 1937 | TYPE_LENGTH (type), byte_order); |
78f8b424 JB |
1938 | } |
1939 | ||
1940 | ||
78f8b424 JB |
1941 | /* Return the alignment required by TYPE. */ |
1942 | static int | |
1943 | alignment_of (struct type *type) | |
1944 | { | |
1945 | int alignment; | |
1946 | ||
1947 | if (is_integer_like (type) | |
1948 | || is_pointer_like (type) | |
a16b8bcd UW |
1949 | || TYPE_CODE (type) == TYPE_CODE_FLT |
1950 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
78f8b424 JB |
1951 | alignment = TYPE_LENGTH (type); |
1952 | else if (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
1953 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
1954 | { | |
1955 | int i; | |
1956 | ||
1957 | alignment = 1; | |
1958 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
1959 | { | |
1960 | int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i)); | |
1961 | ||
1962 | if (field_alignment > alignment) | |
1963 | alignment = field_alignment; | |
1964 | } | |
1965 | } | |
1966 | else | |
1967 | alignment = 1; | |
1968 | ||
1969 | /* Check that everything we ever return is a power of two. Lots of | |
1970 | code doesn't want to deal with aligning things to arbitrary | |
1971 | boundaries. */ | |
1972 | gdb_assert ((alignment & (alignment - 1)) == 0); | |
1973 | ||
1974 | return alignment; | |
1975 | } | |
1976 | ||
1977 | ||
1978 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in | |
ca557f44 AC |
1979 | place to be passed to a function, as specified by the "GNU/Linux |
1980 | for S/390 ELF Application Binary Interface Supplement". | |
78f8b424 JB |
1981 | |
1982 | SP is the current stack pointer. We must put arguments, links, | |
1983 | padding, etc. whereever they belong, and return the new stack | |
1984 | pointer value. | |
1985 | ||
1986 | If STRUCT_RETURN is non-zero, then the function we're calling is | |
1987 | going to return a structure by value; STRUCT_ADDR is the address of | |
1988 | a block we've allocated for it on the stack. | |
1989 | ||
1990 | Our caller has taken care of any type promotions needed to satisfy | |
1991 | prototypes or the old K&R argument-passing rules. */ | |
a78f21af | 1992 | static CORE_ADDR |
7d9b040b | 1993 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
b0cf273e JB |
1994 | struct regcache *regcache, CORE_ADDR bp_addr, |
1995 | int nargs, struct value **args, CORE_ADDR sp, | |
1996 | int struct_return, CORE_ADDR struct_addr) | |
5769d3cd | 1997 | { |
b0cf273e JB |
1998 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1999 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
e17a4113 | 2000 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
b0cf273e | 2001 | ULONGEST orig_sp; |
78f8b424 | 2002 | int i; |
5769d3cd | 2003 | |
78f8b424 JB |
2004 | /* If the i'th argument is passed as a reference to a copy, then |
2005 | copy_addr[i] is the address of the copy we made. */ | |
2006 | CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); | |
5769d3cd | 2007 | |
78f8b424 | 2008 | /* Build the reference-to-copy area. */ |
78f8b424 JB |
2009 | for (i = 0; i < nargs; i++) |
2010 | { | |
2011 | struct value *arg = args[i]; | |
4991999e | 2012 | struct type *type = value_type (arg); |
78f8b424 | 2013 | unsigned length = TYPE_LENGTH (type); |
5769d3cd | 2014 | |
b0cf273e | 2015 | if (s390_function_arg_pass_by_reference (type)) |
01c464e9 | 2016 | { |
78f8b424 | 2017 | sp -= length; |
5b03f266 | 2018 | sp = align_down (sp, alignment_of (type)); |
0fd88904 | 2019 | write_memory (sp, value_contents (arg), length); |
78f8b424 | 2020 | copy_addr[i] = sp; |
01c464e9 | 2021 | } |
5769d3cd | 2022 | } |
5769d3cd | 2023 | |
78f8b424 JB |
2024 | /* Reserve space for the parameter area. As a conservative |
2025 | simplification, we assume that everything will be passed on the | |
b0cf273e JB |
2026 | stack. Since every argument larger than 8 bytes will be |
2027 | passed by reference, we use this simple upper bound. */ | |
2028 | sp -= nargs * 8; | |
78f8b424 | 2029 | |
78f8b424 JB |
2030 | /* After all that, make sure it's still aligned on an eight-byte |
2031 | boundary. */ | |
5b03f266 | 2032 | sp = align_down (sp, 8); |
78f8b424 JB |
2033 | |
2034 | /* Finally, place the actual parameters, working from SP towards | |
2035 | higher addresses. The code above is supposed to reserve enough | |
2036 | space for this. */ | |
2037 | { | |
2038 | int fr = 0; | |
2039 | int gr = 2; | |
2040 | CORE_ADDR starg = sp; | |
2041 | ||
b0cf273e | 2042 | /* A struct is returned using general register 2. */ |
4d819d0e | 2043 | if (struct_return) |
b0cf273e JB |
2044 | { |
2045 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2046 | struct_addr); | |
2047 | gr++; | |
2048 | } | |
4d819d0e | 2049 | |
78f8b424 JB |
2050 | for (i = 0; i < nargs; i++) |
2051 | { | |
2052 | struct value *arg = args[i]; | |
4991999e | 2053 | struct type *type = value_type (arg); |
b0cf273e JB |
2054 | unsigned length = TYPE_LENGTH (type); |
2055 | ||
2056 | if (s390_function_arg_pass_by_reference (type)) | |
2057 | { | |
2058 | if (gr <= 6) | |
2059 | { | |
2060 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2061 | copy_addr[i]); | |
2062 | gr++; | |
2063 | } | |
2064 | else | |
2065 | { | |
e17a4113 UW |
2066 | write_memory_unsigned_integer (starg, word_size, byte_order, |
2067 | copy_addr[i]); | |
b0cf273e JB |
2068 | starg += word_size; |
2069 | } | |
2070 | } | |
2071 | else if (s390_function_arg_float (type)) | |
2072 | { | |
2073 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, | |
2074 | the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ | |
2075 | if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) | |
2076 | { | |
2077 | /* When we store a single-precision value in an FP register, | |
2078 | it occupies the leftmost bits. */ | |
2079 | regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, | |
0fd88904 | 2080 | 0, length, value_contents (arg)); |
b0cf273e JB |
2081 | fr += 2; |
2082 | } | |
2083 | else | |
2084 | { | |
2085 | /* When we store a single-precision value in a stack slot, | |
2086 | it occupies the rightmost bits. */ | |
2087 | starg = align_up (starg + length, word_size); | |
0fd88904 | 2088 | write_memory (starg - length, value_contents (arg), length); |
b0cf273e JB |
2089 | } |
2090 | } | |
2091 | else if (s390_function_arg_integer (type) && length <= word_size) | |
2092 | { | |
2093 | if (gr <= 6) | |
2094 | { | |
2095 | /* Integer arguments are always extended to word size. */ | |
2096 | regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, | |
e17a4113 | 2097 | extend_simple_arg (gdbarch, arg)); |
b0cf273e JB |
2098 | gr++; |
2099 | } | |
2100 | else | |
2101 | { | |
2102 | /* Integer arguments are always extended to word size. */ | |
e17a4113 UW |
2103 | write_memory_signed_integer (starg, word_size, byte_order, |
2104 | extend_simple_arg (gdbarch, arg)); | |
b0cf273e JB |
2105 | starg += word_size; |
2106 | } | |
2107 | } | |
2108 | else if (s390_function_arg_integer (type) && length == 2*word_size) | |
2109 | { | |
2110 | if (gr <= 5) | |
2111 | { | |
2112 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr, | |
0fd88904 | 2113 | value_contents (arg)); |
b0cf273e | 2114 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, |
0fd88904 | 2115 | value_contents (arg) + word_size); |
b0cf273e JB |
2116 | gr += 2; |
2117 | } | |
2118 | else | |
2119 | { | |
2120 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG | |
2121 | in it, then don't go back and use it again later. */ | |
2122 | gr = 7; | |
2123 | ||
0fd88904 | 2124 | write_memory (starg, value_contents (arg), length); |
b0cf273e JB |
2125 | starg += length; |
2126 | } | |
2127 | } | |
2128 | else | |
e2e0b3e5 | 2129 | internal_error (__FILE__, __LINE__, _("unknown argument type")); |
78f8b424 JB |
2130 | } |
2131 | } | |
2132 | ||
2133 | /* Allocate the standard frame areas: the register save area, the | |
2134 | word reserved for the compiler (which seems kind of meaningless), | |
2135 | and the back chain pointer. */ | |
b0cf273e | 2136 | sp -= 16*word_size + 32; |
78f8b424 | 2137 | |
b0cf273e JB |
2138 | /* Store return address. */ |
2139 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); | |
2140 | ||
2141 | /* Store updated stack pointer. */ | |
2142 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); | |
78f8b424 | 2143 | |
a8c99f38 | 2144 | /* We need to return the 'stack part' of the frame ID, |
121d8485 UW |
2145 | which is actually the top of the register save area. */ |
2146 | return sp + 16*word_size + 32; | |
5769d3cd AC |
2147 | } |
2148 | ||
f089c433 | 2149 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
b0cf273e JB |
2150 | dummy frame. The frame ID's base needs to match the TOS value |
2151 | returned by push_dummy_call, and the PC match the dummy frame's | |
2152 | breakpoint. */ | |
2153 | static struct frame_id | |
f089c433 | 2154 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
b0cf273e | 2155 | { |
a8c99f38 | 2156 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
f089c433 UW |
2157 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2158 | sp = gdbarch_addr_bits_remove (gdbarch, sp); | |
a8c99f38 | 2159 | |
121d8485 | 2160 | return frame_id_build (sp + 16*word_size + 32, |
f089c433 | 2161 | get_frame_pc (this_frame)); |
b0cf273e | 2162 | } |
c8f9d51c | 2163 | |
4074e13c JB |
2164 | static CORE_ADDR |
2165 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
2166 | { | |
2167 | /* Both the 32- and 64-bit ABI's say that the stack pointer should | |
2168 | always be aligned on an eight-byte boundary. */ | |
2169 | return (addr & -8); | |
2170 | } | |
2171 | ||
2172 | ||
b0cf273e JB |
2173 | /* Function return value access. */ |
2174 | ||
2175 | static enum return_value_convention | |
2176 | s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) | |
c8f9d51c | 2177 | { |
b0cf273e JB |
2178 | int length = TYPE_LENGTH (type); |
2179 | if (length > 8) | |
2180 | return RETURN_VALUE_STRUCT_CONVENTION; | |
2181 | ||
2182 | switch (TYPE_CODE (type)) | |
2183 | { | |
2184 | case TYPE_CODE_STRUCT: | |
2185 | case TYPE_CODE_UNION: | |
2186 | case TYPE_CODE_ARRAY: | |
2187 | return RETURN_VALUE_STRUCT_CONVENTION; | |
c8f9d51c | 2188 | |
b0cf273e JB |
2189 | default: |
2190 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2191 | } | |
c8f9d51c JB |
2192 | } |
2193 | ||
b0cf273e | 2194 | static enum return_value_convention |
c055b101 CV |
2195 | s390_return_value (struct gdbarch *gdbarch, struct type *func_type, |
2196 | struct type *type, struct regcache *regcache, | |
2197 | gdb_byte *out, const gdb_byte *in) | |
5769d3cd | 2198 | { |
e17a4113 | 2199 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
b0cf273e JB |
2200 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
2201 | int length = TYPE_LENGTH (type); | |
2202 | enum return_value_convention rvc = | |
2203 | s390_return_value_convention (gdbarch, type); | |
2204 | if (in) | |
2205 | { | |
2206 | switch (rvc) | |
2207 | { | |
2208 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2209 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2210 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2211 | { |
2212 | /* When we store a single-precision value in an FP register, | |
2213 | it occupies the leftmost bits. */ | |
2214 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, | |
2215 | 0, length, in); | |
2216 | } | |
2217 | else if (length <= word_size) | |
2218 | { | |
2219 | /* Integer arguments are always extended to word size. */ | |
2220 | if (TYPE_UNSIGNED (type)) | |
2221 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, | |
e17a4113 | 2222 | extract_unsigned_integer (in, length, byte_order)); |
b0cf273e JB |
2223 | else |
2224 | regcache_cooked_write_signed (regcache, S390_R2_REGNUM, | |
e17a4113 | 2225 | extract_signed_integer (in, length, byte_order)); |
b0cf273e JB |
2226 | } |
2227 | else if (length == 2*word_size) | |
2228 | { | |
2229 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); | |
43af2100 | 2230 | regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size); |
b0cf273e JB |
2231 | } |
2232 | else | |
e2e0b3e5 | 2233 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e JB |
2234 | break; |
2235 | ||
2236 | case RETURN_VALUE_STRUCT_CONVENTION: | |
8a3fe4f8 | 2237 | error (_("Cannot set function return value.")); |
b0cf273e JB |
2238 | break; |
2239 | } | |
2240 | } | |
2241 | else if (out) | |
2242 | { | |
2243 | switch (rvc) | |
2244 | { | |
2245 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2246 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2247 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2248 | { |
2249 | /* When we store a single-precision value in an FP register, | |
2250 | it occupies the leftmost bits. */ | |
2251 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, | |
2252 | 0, length, out); | |
2253 | } | |
2254 | else if (length <= word_size) | |
2255 | { | |
2256 | /* Integer arguments occupy the rightmost bits. */ | |
2257 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, | |
2258 | word_size - length, length, out); | |
2259 | } | |
2260 | else if (length == 2*word_size) | |
2261 | { | |
2262 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); | |
43af2100 | 2263 | regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size); |
b0cf273e JB |
2264 | } |
2265 | else | |
e2e0b3e5 | 2266 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e | 2267 | break; |
5769d3cd | 2268 | |
b0cf273e | 2269 | case RETURN_VALUE_STRUCT_CONVENTION: |
8a3fe4f8 | 2270 | error (_("Function return value unknown.")); |
b0cf273e JB |
2271 | break; |
2272 | } | |
2273 | } | |
2274 | ||
2275 | return rvc; | |
2276 | } | |
5769d3cd AC |
2277 | |
2278 | ||
a8c99f38 JB |
2279 | /* Breakpoints. */ |
2280 | ||
43af2100 | 2281 | static const gdb_byte * |
67d57894 | 2282 | s390_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr) |
5769d3cd | 2283 | { |
43af2100 | 2284 | static const gdb_byte breakpoint[] = { 0x0, 0x1 }; |
5769d3cd AC |
2285 | |
2286 | *lenptr = sizeof (breakpoint); | |
2287 | return breakpoint; | |
2288 | } | |
2289 | ||
5769d3cd | 2290 | |
a8c99f38 | 2291 | /* Address handling. */ |
5769d3cd AC |
2292 | |
2293 | static CORE_ADDR | |
24568a2c | 2294 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
5769d3cd | 2295 | { |
a8c99f38 | 2296 | return addr & 0x7fffffff; |
5769d3cd AC |
2297 | } |
2298 | ||
ffc65945 KB |
2299 | static int |
2300 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) | |
2301 | { | |
2302 | if (byte_size == 4) | |
119ac181 | 2303 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2304 | else |
2305 | return 0; | |
2306 | } | |
2307 | ||
2308 | static const char * | |
2309 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) | |
2310 | { | |
119ac181 | 2311 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
ffc65945 KB |
2312 | return "mode32"; |
2313 | else | |
2314 | return NULL; | |
2315 | } | |
2316 | ||
a78f21af | 2317 | static int |
ffc65945 KB |
2318 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name, |
2319 | int *type_flags_ptr) | |
2320 | { | |
2321 | if (strcmp (name, "mode32") == 0) | |
2322 | { | |
119ac181 | 2323 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2324 | return 1; |
2325 | } | |
2326 | else | |
2327 | return 0; | |
2328 | } | |
2329 | ||
a8c99f38 JB |
2330 | /* Set up gdbarch struct. */ |
2331 | ||
a78f21af | 2332 | static struct gdbarch * |
5769d3cd AC |
2333 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2334 | { | |
5769d3cd AC |
2335 | struct gdbarch *gdbarch; |
2336 | struct gdbarch_tdep *tdep; | |
5769d3cd AC |
2337 | |
2338 | /* First see if there is already a gdbarch that can satisfy the request. */ | |
2339 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
2340 | if (arches != NULL) | |
2341 | return arches->gdbarch; | |
2342 | ||
2343 | /* None found: is the request for a s390 architecture? */ | |
2344 | if (info.bfd_arch_info->arch != bfd_arch_s390) | |
2345 | return NULL; /* No; then it's not for us. */ | |
2346 | ||
2347 | /* Yes: create a new gdbarch for the specified machine type. */ | |
d0f54f9d JB |
2348 | tdep = XCALLOC (1, struct gdbarch_tdep); |
2349 | gdbarch = gdbarch_alloc (&info, tdep); | |
5769d3cd AC |
2350 | |
2351 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); | |
4e409299 | 2352 | set_gdbarch_char_signed (gdbarch, 0); |
5769d3cd | 2353 | |
1de90795 UW |
2354 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
2355 | We can safely let them default to 128-bit, since the debug info | |
2356 | will give the size of type actually used in each case. */ | |
2357 | set_gdbarch_long_double_bit (gdbarch, 128); | |
2358 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
2359 | ||
aaab4dba | 2360 | /* Amount PC must be decremented by after a breakpoint. This is |
3b3b875c | 2361 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
aaab4dba | 2362 | always. */ |
5769d3cd | 2363 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
5769d3cd AC |
2364 | /* Stack grows downward. */ |
2365 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
5769d3cd AC |
2366 | set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); |
2367 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); | |
d0f54f9d | 2368 | set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); |
a8c99f38 | 2369 | |
5769d3cd AC |
2370 | set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM); |
2371 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); | |
d0f54f9d | 2372 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
5769d3cd | 2373 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
d0f54f9d | 2374 | set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS); |
5769d3cd | 2375 | set_gdbarch_register_name (gdbarch, s390_register_name); |
d0f54f9d JB |
2376 | set_gdbarch_register_type (gdbarch, s390_register_type); |
2377 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); | |
d0f54f9d | 2378 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
9acbedc0 | 2379 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
d0f54f9d JB |
2380 | set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p); |
2381 | set_gdbarch_regset_from_core_section (gdbarch, | |
2382 | s390_regset_from_core_section); | |
5769d3cd | 2383 | |
b0cf273e JB |
2384 | /* Inferior function calls. */ |
2385 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); | |
f089c433 | 2386 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
4074e13c | 2387 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
b0cf273e | 2388 | set_gdbarch_return_value (gdbarch, s390_return_value); |
5769d3cd | 2389 | |
a8c99f38 | 2390 | /* Frame handling. */ |
a431654a | 2391 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
f089c433 | 2392 | dwarf2_append_unwinders (gdbarch); |
a431654a | 2393 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
f089c433 UW |
2394 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
2395 | frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); | |
2396 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); | |
a8c99f38 JB |
2397 | frame_base_set_default (gdbarch, &s390_frame_base); |
2398 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); | |
2399 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); | |
2400 | ||
5769d3cd AC |
2401 | switch (info.bfd_arch_info->mach) |
2402 | { | |
b8b8b047 | 2403 | case bfd_mach_s390_31: |
b0cf273e JB |
2404 | tdep->abi = ABI_LINUX_S390; |
2405 | ||
d0f54f9d JB |
2406 | tdep->gregset = &s390_gregset; |
2407 | tdep->sizeof_gregset = s390_sizeof_gregset; | |
2408 | tdep->fpregset = &s390_fpregset; | |
2409 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
2410 | |
2411 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); | |
d0f54f9d JB |
2412 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); |
2413 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); | |
76a9d10f MK |
2414 | set_solib_svr4_fetch_link_map_offsets |
2415 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); | |
9cbd5950 | 2416 | |
5769d3cd | 2417 | break; |
b8b8b047 | 2418 | case bfd_mach_s390_64: |
b0cf273e JB |
2419 | tdep->abi = ABI_LINUX_ZSERIES; |
2420 | ||
d0f54f9d JB |
2421 | tdep->gregset = &s390x_gregset; |
2422 | tdep->sizeof_gregset = s390x_sizeof_gregset; | |
2423 | tdep->fpregset = &s390_fpregset; | |
2424 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
2425 | |
2426 | set_gdbarch_long_bit (gdbarch, 64); | |
2427 | set_gdbarch_long_long_bit (gdbarch, 64); | |
2428 | set_gdbarch_ptr_bit (gdbarch, 64); | |
d0f54f9d JB |
2429 | set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read); |
2430 | set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write); | |
76a9d10f MK |
2431 | set_solib_svr4_fetch_link_map_offsets |
2432 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
ffc65945 KB |
2433 | set_gdbarch_address_class_type_flags (gdbarch, |
2434 | s390_address_class_type_flags); | |
2435 | set_gdbarch_address_class_type_flags_to_name (gdbarch, | |
2436 | s390_address_class_type_flags_to_name); | |
2437 | set_gdbarch_address_class_name_to_type_flags (gdbarch, | |
2438 | s390_address_class_name_to_type_flags); | |
5769d3cd AC |
2439 | break; |
2440 | } | |
2441 | ||
36482093 AC |
2442 | set_gdbarch_print_insn (gdbarch, print_insn_s390); |
2443 | ||
982e9687 UW |
2444 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
2445 | ||
b2756930 KB |
2446 | /* Enable TLS support. */ |
2447 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
2448 | svr4_fetch_objfile_link_map); | |
2449 | ||
5769d3cd AC |
2450 | return gdbarch; |
2451 | } | |
2452 | ||
2453 | ||
2454 | ||
a78f21af AC |
2455 | extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ |
2456 | ||
5769d3cd | 2457 | void |
5ae5f592 | 2458 | _initialize_s390_tdep (void) |
5769d3cd AC |
2459 | { |
2460 | ||
2461 | /* Hook us into the gdbarch mechanism. */ | |
2462 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); | |
5769d3cd | 2463 | } |