*** empty log message ***
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
0b302171 3 Copyright (C) 2001-2012 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
27#include "symtab.h"
28#include "target.h"
29#include "gdbcore.h"
30#include "gdbcmd.h"
5769d3cd 31#include "objfiles.h"
5769d3cd
AC
32#include "floatformat.h"
33#include "regcache.h"
a8c99f38
JB
34#include "trad-frame.h"
35#include "frame-base.h"
36#include "frame-unwind.h"
a431654a 37#include "dwarf2-frame.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
d0f54f9d 46#include "s390-tdep.h"
5769d3cd 47
7803799a 48#include "features/s390-linux32.c"
c642a434
UW
49#include "features/s390-linux32v1.c"
50#include "features/s390-linux32v2.c"
7803799a 51#include "features/s390-linux64.c"
c642a434
UW
52#include "features/s390-linux64v1.c"
53#include "features/s390-linux64v2.c"
7803799a 54#include "features/s390x-linux64.c"
c642a434
UW
55#include "features/s390x-linux64v1.c"
56#include "features/s390x-linux64v2.c"
7803799a 57
60e6cc42 58
d0f54f9d
JB
59/* The tdep structure. */
60
61struct gdbarch_tdep
5769d3cd 62{
b0cf273e
JB
63 /* ABI version. */
64 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
65
7803799a
UW
66 /* Pseudo register numbers. */
67 int gpr_full_regnum;
68 int pc_regnum;
69 int cc_regnum;
70
d0f54f9d
JB
71 /* Core file register sets. */
72 const struct regset *gregset;
73 int sizeof_gregset;
74
75 const struct regset *fpregset;
76 int sizeof_fpregset;
77};
78
79
7803799a
UW
80/* ABI call-saved register information. */
81
82static int
83s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 84{
7803799a
UW
85 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
86
87 switch (tdep->abi)
6707b003 88 {
7803799a
UW
89 case ABI_LINUX_S390:
90 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
91 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
92 || regnum == S390_A0_REGNUM)
93 return 1;
6707b003 94
7803799a
UW
95 break;
96
97 case ABI_LINUX_ZSERIES:
98 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
99 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
100 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
101 return 1;
102
103 break;
104 }
105
106 return 0;
5769d3cd
AC
107}
108
c642a434
UW
109static int
110s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
111{
112 /* The last-break address is read-only. */
113 return regnum == S390_LAST_BREAK_REGNUM;
114}
115
116static void
117s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
118{
119 struct gdbarch *gdbarch = get_regcache_arch (regcache);
120 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
121
122 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
123
124 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
125 messing with the PC we just installed, if we happen to be within
126 an interrupted system call that the kernel wants to restart.
127
128 Note that after we return from the dummy call, the SYSTEM_CALL and
129 ORIG_R2 registers will be automatically restored, and the kernel
130 continues to restart the system call at this point. */
131 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
132 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
133}
134
7803799a 135
d0f54f9d
JB
136/* DWARF Register Mapping. */
137
138static int s390_dwarf_regmap[] =
139{
140 /* General Purpose Registers. */
141 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
142 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
143 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
144 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
145
146 /* Floating Point Registers. */
147 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
148 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
149 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
150 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
151
152 /* Control Registers (not mapped). */
153 -1, -1, -1, -1, -1, -1, -1, -1,
154 -1, -1, -1, -1, -1, -1, -1, -1,
155
156 /* Access Registers. */
157 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
158 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
159 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
160 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
161
162 /* Program Status Word. */
163 S390_PSWM_REGNUM,
7803799a
UW
164 S390_PSWA_REGNUM,
165
166 /* GPR Lower Half Access. */
167 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
168 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
169 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
170 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 171
94eae614 172 /* GNU/Linux-specific registers (not mapped). */
c642a434 173 -1, -1, -1,
d0f54f9d
JB
174};
175
176/* Convert DWARF register number REG to the appropriate register
177 number used by GDB. */
a78f21af 178static int
d3f73121 179s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 180{
7803799a
UW
181 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
182
183 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
184 GPRs. Note that call frame information still refers to the 32-bit
185 lower halves, because s390_adjust_frame_regnum uses register numbers
186 66 .. 81 to access GPRs. */
187 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
188 return tdep->gpr_full_regnum + reg;
d0f54f9d 189
16aff9a6 190 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 191 return s390_dwarf_regmap[reg];
d0f54f9d 192
7803799a
UW
193 warning (_("Unmapped DWARF Register #%d encountered."), reg);
194 return -1;
195}
d0f54f9d 196
7803799a
UW
197/* Translate a .eh_frame register to DWARF register, or adjust a
198 .debug_frame register. */
199static int
200s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
201{
202 /* See s390_dwarf_reg_to_regnum for comments. */
203 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
204}
205
d0f54f9d 206
7803799a
UW
207/* Pseudo registers. */
208
209static const char *
210s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 211{
7803799a 212 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 213
7803799a
UW
214 if (regnum == tdep->pc_regnum)
215 return "pc";
d0f54f9d 216
7803799a
UW
217 if (regnum == tdep->cc_regnum)
218 return "cc";
d0f54f9d 219
7803799a
UW
220 if (tdep->gpr_full_regnum != -1
221 && regnum >= tdep->gpr_full_regnum
222 && regnum < tdep->gpr_full_regnum + 16)
223 {
224 static const char *full_name[] = {
225 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
226 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
227 };
228 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 229 }
7803799a
UW
230
231 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
232}
233
7803799a
UW
234static struct type *
235s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 236{
7803799a 237 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 238
7803799a
UW
239 if (regnum == tdep->pc_regnum)
240 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 241
7803799a
UW
242 if (regnum == tdep->cc_regnum)
243 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 244
7803799a
UW
245 if (tdep->gpr_full_regnum != -1
246 && regnum >= tdep->gpr_full_regnum
247 && regnum < tdep->gpr_full_regnum + 16)
248 return builtin_type (gdbarch)->builtin_uint64;
249
250 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
251}
252
05d1431c 253static enum register_status
7803799a
UW
254s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
255 int regnum, gdb_byte *buf)
d0f54f9d 256{
7803799a 257 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 258 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 259 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
260 ULONGEST val;
261
7803799a 262 if (regnum == tdep->pc_regnum)
d0f54f9d 263 {
05d1431c
PA
264 enum register_status status;
265
266 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
267 if (status == REG_VALID)
268 {
269 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
270 val &= 0x7fffffff;
271 store_unsigned_integer (buf, regsize, byte_order, val);
272 }
273 return status;
7803799a 274 }
d0f54f9d 275
7803799a
UW
276 if (regnum == tdep->cc_regnum)
277 {
05d1431c
PA
278 enum register_status status;
279
280 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
281 if (status == REG_VALID)
282 {
283 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
284 val = (val >> 12) & 3;
285 else
286 val = (val >> 44) & 3;
287 store_unsigned_integer (buf, regsize, byte_order, val);
288 }
289 return status;
7803799a 290 }
d0f54f9d 291
7803799a
UW
292 if (tdep->gpr_full_regnum != -1
293 && regnum >= tdep->gpr_full_regnum
294 && regnum < tdep->gpr_full_regnum + 16)
295 {
05d1431c 296 enum register_status status;
7803799a 297 ULONGEST val_upper;
05d1431c 298
7803799a
UW
299 regnum -= tdep->gpr_full_regnum;
300
05d1431c
PA
301 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
302 if (status == REG_VALID)
303 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
304 &val_upper);
305 if (status == REG_VALID)
306 {
307 val |= val_upper << 32;
308 store_unsigned_integer (buf, regsize, byte_order, val);
309 }
310 return status;
d0f54f9d 311 }
7803799a
UW
312
313 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
314}
315
316static void
7803799a
UW
317s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
318 int regnum, const gdb_byte *buf)
d0f54f9d 319{
7803799a 320 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 321 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 322 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
323 ULONGEST val, psw;
324
7803799a 325 if (regnum == tdep->pc_regnum)
d0f54f9d 326 {
7803799a
UW
327 val = extract_unsigned_integer (buf, regsize, byte_order);
328 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
329 {
330 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
331 val = (psw & 0x80000000) | (val & 0x7fffffff);
332 }
333 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
334 return;
335 }
d0f54f9d 336
7803799a
UW
337 if (regnum == tdep->cc_regnum)
338 {
339 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 340 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
341 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
342 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
343 else
344 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
345 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
346 return;
347 }
d0f54f9d 348
7803799a
UW
349 if (tdep->gpr_full_regnum != -1
350 && regnum >= tdep->gpr_full_regnum
351 && regnum < tdep->gpr_full_regnum + 16)
352 {
353 regnum -= tdep->gpr_full_regnum;
354 val = extract_unsigned_integer (buf, regsize, byte_order);
355 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
356 val & 0xffffffff);
357 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
358 val >> 32);
359 return;
d0f54f9d 360 }
7803799a
UW
361
362 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
363}
364
365/* 'float' values are stored in the upper half of floating-point
366 registers, even though we are otherwise a big-endian platform. */
367
9acbedc0
UW
368static struct value *
369s390_value_from_register (struct type *type, int regnum,
370 struct frame_info *frame)
d0f54f9d 371{
9acbedc0 372 struct value *value = default_value_from_register (type, regnum, frame);
56b9d9ac 373 int len = TYPE_LENGTH (check_typedef (type));
d0f54f9d 374
9acbedc0
UW
375 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8)
376 set_value_offset (value, 0);
d0f54f9d 377
9acbedc0 378 return value;
d0f54f9d
JB
379}
380
381/* Register groups. */
382
a78f21af 383static int
7803799a
UW
384s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
385 struct reggroup *group)
d0f54f9d
JB
386{
387 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
388
d6db1fab
UW
389 /* We usually save/restore the whole PSW, which includes PC and CC.
390 However, some older gdbservers may not support saving/restoring
391 the whole PSW yet, and will return an XML register description
392 excluding those from the save/restore register groups. In those
393 cases, we still need to explicitly save/restore PC and CC in order
394 to push or pop frames. Since this doesn't hurt anything if we
395 already save/restore the whole PSW (it's just redundant), we add
396 PC and CC at this point unconditionally. */
d0f54f9d 397 if (group == save_reggroup || group == restore_reggroup)
7803799a 398 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
399
400 return default_register_reggroup_p (gdbarch, regnum, group);
401}
402
403
404/* Core file register sets. */
405
406int s390_regmap_gregset[S390_NUM_REGS] =
407{
408 /* Program Status Word. */
409 0x00, 0x04,
410 /* General Purpose Registers. */
411 0x08, 0x0c, 0x10, 0x14,
412 0x18, 0x1c, 0x20, 0x24,
413 0x28, 0x2c, 0x30, 0x34,
414 0x38, 0x3c, 0x40, 0x44,
415 /* Access Registers. */
416 0x48, 0x4c, 0x50, 0x54,
417 0x58, 0x5c, 0x60, 0x64,
418 0x68, 0x6c, 0x70, 0x74,
419 0x78, 0x7c, 0x80, 0x84,
420 /* Floating Point Control Word. */
421 -1,
422 /* Floating Point Registers. */
423 -1, -1, -1, -1, -1, -1, -1, -1,
424 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
425 /* GPR Uppper Halves. */
426 -1, -1, -1, -1, -1, -1, -1, -1,
427 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 428 /* GNU/Linux-specific optional "registers". */
c642a434 429 0x88, -1, -1,
d0f54f9d
JB
430};
431
432int s390x_regmap_gregset[S390_NUM_REGS] =
433{
7803799a 434 /* Program Status Word. */
d0f54f9d
JB
435 0x00, 0x08,
436 /* General Purpose Registers. */
437 0x10, 0x18, 0x20, 0x28,
438 0x30, 0x38, 0x40, 0x48,
439 0x50, 0x58, 0x60, 0x68,
440 0x70, 0x78, 0x80, 0x88,
441 /* Access Registers. */
442 0x90, 0x94, 0x98, 0x9c,
443 0xa0, 0xa4, 0xa8, 0xac,
444 0xb0, 0xb4, 0xb8, 0xbc,
445 0xc0, 0xc4, 0xc8, 0xcc,
446 /* Floating Point Control Word. */
447 -1,
448 /* Floating Point Registers. */
449 -1, -1, -1, -1, -1, -1, -1, -1,
450 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
451 /* GPR Uppper Halves. */
452 0x10, 0x18, 0x20, 0x28,
453 0x30, 0x38, 0x40, 0x48,
454 0x50, 0x58, 0x60, 0x68,
455 0x70, 0x78, 0x80, 0x88,
94eae614 456 /* GNU/Linux-specific optional "registers". */
c642a434 457 0xd0, -1, -1,
d0f54f9d
JB
458};
459
460int s390_regmap_fpregset[S390_NUM_REGS] =
461{
462 /* Program Status Word. */
463 -1, -1,
464 /* General Purpose Registers. */
465 -1, -1, -1, -1, -1, -1, -1, -1,
466 -1, -1, -1, -1, -1, -1, -1, -1,
467 /* Access Registers. */
468 -1, -1, -1, -1, -1, -1, -1, -1,
469 -1, -1, -1, -1, -1, -1, -1, -1,
470 /* Floating Point Control Word. */
471 0x00,
472 /* Floating Point Registers. */
473 0x08, 0x10, 0x18, 0x20,
474 0x28, 0x30, 0x38, 0x40,
475 0x48, 0x50, 0x58, 0x60,
476 0x68, 0x70, 0x78, 0x80,
7803799a
UW
477 /* GPR Uppper Halves. */
478 -1, -1, -1, -1, -1, -1, -1, -1,
479 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 480 /* GNU/Linux-specific optional "registers". */
c642a434 481 -1, -1, -1,
7803799a
UW
482};
483
484int s390_regmap_upper[S390_NUM_REGS] =
485{
486 /* Program Status Word. */
487 -1, -1,
488 /* General Purpose Registers. */
489 -1, -1, -1, -1, -1, -1, -1, -1,
490 -1, -1, -1, -1, -1, -1, -1, -1,
491 /* Access Registers. */
492 -1, -1, -1, -1, -1, -1, -1, -1,
493 -1, -1, -1, -1, -1, -1, -1, -1,
494 /* Floating Point Control Word. */
495 -1,
496 /* Floating Point Registers. */
497 -1, -1, -1, -1, -1, -1, -1, -1,
498 -1, -1, -1, -1, -1, -1, -1, -1,
499 /* GPR Uppper Halves. */
500 0x00, 0x04, 0x08, 0x0c,
501 0x10, 0x14, 0x18, 0x1c,
502 0x20, 0x24, 0x28, 0x2c,
503 0x30, 0x34, 0x38, 0x3c,
94eae614 504 /* GNU/Linux-specific optional "registers". */
c642a434
UW
505 -1, -1, -1,
506};
507
508int s390_regmap_last_break[S390_NUM_REGS] =
509{
510 /* Program Status Word. */
511 -1, -1,
512 /* General Purpose Registers. */
513 -1, -1, -1, -1, -1, -1, -1, -1,
514 -1, -1, -1, -1, -1, -1, -1, -1,
515 /* Access Registers. */
516 -1, -1, -1, -1, -1, -1, -1, -1,
517 -1, -1, -1, -1, -1, -1, -1, -1,
518 /* Floating Point Control Word. */
519 -1,
520 /* Floating Point Registers. */
521 -1, -1, -1, -1, -1, -1, -1, -1,
522 -1, -1, -1, -1, -1, -1, -1, -1,
523 /* GPR Uppper Halves. */
524 -1, -1, -1, -1, -1, -1, -1, -1,
525 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 526 /* GNU/Linux-specific optional "registers". */
c642a434
UW
527 -1, 4, -1,
528};
529
530int s390x_regmap_last_break[S390_NUM_REGS] =
531{
532 /* Program Status Word. */
533 -1, -1,
534 /* General Purpose Registers. */
535 -1, -1, -1, -1, -1, -1, -1, -1,
536 -1, -1, -1, -1, -1, -1, -1, -1,
537 /* Access Registers. */
538 -1, -1, -1, -1, -1, -1, -1, -1,
539 -1, -1, -1, -1, -1, -1, -1, -1,
540 /* Floating Point Control Word. */
541 -1,
542 /* Floating Point Registers. */
543 -1, -1, -1, -1, -1, -1, -1, -1,
544 -1, -1, -1, -1, -1, -1, -1, -1,
545 /* GPR Uppper Halves. */
546 -1, -1, -1, -1, -1, -1, -1, -1,
547 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 548 /* GNU/Linux-specific optional "registers". */
c642a434
UW
549 -1, 0, -1,
550};
551
552int s390_regmap_system_call[S390_NUM_REGS] =
553{
554 /* Program Status Word. */
555 -1, -1,
556 /* General Purpose Registers. */
557 -1, -1, -1, -1, -1, -1, -1, -1,
558 -1, -1, -1, -1, -1, -1, -1, -1,
559 /* Access Registers. */
560 -1, -1, -1, -1, -1, -1, -1, -1,
561 -1, -1, -1, -1, -1, -1, -1, -1,
562 /* Floating Point Control Word. */
563 -1,
564 /* Floating Point Registers. */
565 -1, -1, -1, -1, -1, -1, -1, -1,
566 -1, -1, -1, -1, -1, -1, -1, -1,
567 /* GPR Uppper Halves. */
568 -1, -1, -1, -1, -1, -1, -1, -1,
569 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 570 /* GNU/Linux-specific optional "registers". */
c642a434 571 -1, -1, 0,
d0f54f9d
JB
572};
573
574/* Supply register REGNUM from the register set REGSET to register cache
575 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
576static void
577s390_supply_regset (const struct regset *regset, struct regcache *regcache,
578 int regnum, const void *regs, size_t len)
579{
580 const int *offset = regset->descr;
581 int i;
582
583 for (i = 0; i < S390_NUM_REGS; i++)
584 {
585 if ((regnum == i || regnum == -1) && offset[i] != -1)
586 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
587 }
588}
589
92f38ec2
UW
590/* Collect register REGNUM from the register cache REGCACHE and store
591 it in the buffer specified by REGS and LEN as described by the
592 general-purpose register set REGSET. If REGNUM is -1, do this for
593 all registers in REGSET. */
594static void
595s390_collect_regset (const struct regset *regset,
596 const struct regcache *regcache,
597 int regnum, void *regs, size_t len)
598{
599 const int *offset = regset->descr;
600 int i;
601
602 for (i = 0; i < S390_NUM_REGS; i++)
603 {
604 if ((regnum == i || regnum == -1) && offset[i] != -1)
605 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
606 }
607}
608
d0f54f9d
JB
609static const struct regset s390_gregset = {
610 s390_regmap_gregset,
92f38ec2
UW
611 s390_supply_regset,
612 s390_collect_regset
d0f54f9d
JB
613};
614
615static const struct regset s390x_gregset = {
616 s390x_regmap_gregset,
92f38ec2
UW
617 s390_supply_regset,
618 s390_collect_regset
d0f54f9d
JB
619};
620
621static const struct regset s390_fpregset = {
622 s390_regmap_fpregset,
92f38ec2
UW
623 s390_supply_regset,
624 s390_collect_regset
d0f54f9d
JB
625};
626
7803799a
UW
627static const struct regset s390_upper_regset = {
628 s390_regmap_upper,
629 s390_supply_regset,
630 s390_collect_regset
631};
632
c642a434
UW
633static const struct regset s390_last_break_regset = {
634 s390_regmap_last_break,
635 s390_supply_regset,
636 s390_collect_regset
637};
638
639static const struct regset s390x_last_break_regset = {
640 s390x_regmap_last_break,
641 s390_supply_regset,
642 s390_collect_regset
643};
644
645static const struct regset s390_system_call_regset = {
646 s390_regmap_system_call,
647 s390_supply_regset,
648 s390_collect_regset
649};
650
651static struct core_regset_section s390_linux32_regset_sections[] =
652{
653 { ".reg", s390_sizeof_gregset, "general-purpose" },
654 { ".reg2", s390_sizeof_fpregset, "floating-point" },
655 { NULL, 0}
656};
657
658static struct core_regset_section s390_linux32v1_regset_sections[] =
659{
660 { ".reg", s390_sizeof_gregset, "general-purpose" },
661 { ".reg2", s390_sizeof_fpregset, "floating-point" },
662 { ".reg-s390-last-break", 8, "s390 last-break address" },
663 { NULL, 0}
664};
665
666static struct core_regset_section s390_linux32v2_regset_sections[] =
667{
668 { ".reg", s390_sizeof_gregset, "general-purpose" },
669 { ".reg2", s390_sizeof_fpregset, "floating-point" },
670 { ".reg-s390-last-break", 8, "s390 last-break address" },
671 { ".reg-s390-system-call", 4, "s390 system-call" },
672 { NULL, 0}
673};
674
675static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
676{
677 { ".reg", s390_sizeof_gregset, "general-purpose" },
678 { ".reg2", s390_sizeof_fpregset, "floating-point" },
679 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
680 { NULL, 0}
681};
682
c642a434
UW
683static struct core_regset_section s390_linux64v1_regset_sections[] =
684{
685 { ".reg", s390_sizeof_gregset, "general-purpose" },
686 { ".reg2", s390_sizeof_fpregset, "floating-point" },
687 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
688 { ".reg-s390-last-break", 8, "s930 last-break address" },
689 { NULL, 0}
690};
691
692static struct core_regset_section s390_linux64v2_regset_sections[] =
693{
694 { ".reg", s390_sizeof_gregset, "general-purpose" },
695 { ".reg2", s390_sizeof_fpregset, "floating-point" },
696 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
697 { ".reg-s390-last-break", 8, "s930 last-break address" },
698 { ".reg-s390-system-call", 4, "s390 system-call" },
699 { NULL, 0}
700};
701
702static struct core_regset_section s390x_linux64_regset_sections[] =
703{
704 { ".reg", s390x_sizeof_gregset, "general-purpose" },
705 { ".reg2", s390_sizeof_fpregset, "floating-point" },
706 { NULL, 0}
707};
708
709static struct core_regset_section s390x_linux64v1_regset_sections[] =
710{
711 { ".reg", s390x_sizeof_gregset, "general-purpose" },
712 { ".reg2", s390_sizeof_fpregset, "floating-point" },
713 { ".reg-s390-last-break", 8, "s930 last-break address" },
714 { NULL, 0}
715};
716
717static struct core_regset_section s390x_linux64v2_regset_sections[] =
718{
719 { ".reg", s390x_sizeof_gregset, "general-purpose" },
720 { ".reg2", s390_sizeof_fpregset, "floating-point" },
721 { ".reg-s390-last-break", 8, "s930 last-break address" },
722 { ".reg-s390-system-call", 4, "s390 system-call" },
723 { NULL, 0}
724};
725
726
d0f54f9d
JB
727/* Return the appropriate register set for the core section identified
728 by SECT_NAME and SECT_SIZE. */
63807e1d 729static const struct regset *
d0f54f9d
JB
730s390_regset_from_core_section (struct gdbarch *gdbarch,
731 const char *sect_name, size_t sect_size)
732{
733 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
734
e31dcd20 735 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
736 return tdep->gregset;
737
e31dcd20 738 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
739 return tdep->fpregset;
740
7803799a
UW
741 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
742 return &s390_upper_regset;
743
c642a434
UW
744 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
745 return (gdbarch_ptr_bit (gdbarch) == 32
746 ? &s390_last_break_regset : &s390x_last_break_regset);
747
748 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
749 return &s390_system_call_regset;
750
d0f54f9d 751 return NULL;
5769d3cd
AC
752}
753
7803799a
UW
754static const struct target_desc *
755s390_core_read_description (struct gdbarch *gdbarch,
756 struct target_ops *target, bfd *abfd)
757{
758 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
759 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
760 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a
UW
761 asection *section = bfd_get_section_by_name (abfd, ".reg");
762 if (!section)
763 return NULL;
764
765 switch (bfd_section_size (abfd, section))
766 {
767 case s390_sizeof_gregset:
c642a434
UW
768 if (high_gprs)
769 return (v2? tdesc_s390_linux64v2 :
770 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
771 else
772 return (v2? tdesc_s390_linux32v2 :
773 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
774
775 case s390x_sizeof_gregset:
c642a434
UW
776 return (v2? tdesc_s390x_linux64v2 :
777 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
778
779 default:
780 return NULL;
781 }
782}
783
d0f54f9d 784
4bc8c588
JB
785/* Decoding S/390 instructions. */
786
787/* Named opcode values for the S/390 instructions we recognize. Some
788 instructions have their opcode split across two fields; those are the
789 op1_* and op2_* enums. */
790enum
791 {
a8c99f38
JB
792 op1_lhi = 0xa7, op2_lhi = 0x08,
793 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 794 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 795 op_lr = 0x18,
a8c99f38
JB
796 op_lgr = 0xb904,
797 op_l = 0x58,
798 op1_ly = 0xe3, op2_ly = 0x58,
799 op1_lg = 0xe3, op2_lg = 0x04,
800 op_lm = 0x98,
801 op1_lmy = 0xeb, op2_lmy = 0x98,
802 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 803 op_st = 0x50,
a8c99f38 804 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 805 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 806 op_std = 0x60,
4bc8c588 807 op_stm = 0x90,
a8c99f38 808 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 809 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
810 op1_aghi = 0xa7, op2_aghi = 0x0b,
811 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
812 op1_agfi = 0xc2, op2_agfi = 0x08,
813 op1_afi = 0xc2, op2_afi = 0x09,
814 op1_algfi= 0xc2, op2_algfi= 0x0a,
815 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
816 op_ar = 0x1a,
817 op_agr = 0xb908,
818 op_a = 0x5a,
819 op1_ay = 0xe3, op2_ay = 0x5a,
820 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
821 op1_slgfi= 0xc2, op2_slgfi= 0x04,
822 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
823 op_sr = 0x1b,
824 op_sgr = 0xb909,
825 op_s = 0x5b,
826 op1_sy = 0xe3, op2_sy = 0x5b,
827 op1_sg = 0xe3, op2_sg = 0x09,
828 op_nr = 0x14,
829 op_ngr = 0xb980,
830 op_la = 0x41,
831 op1_lay = 0xe3, op2_lay = 0x71,
832 op1_larl = 0xc0, op2_larl = 0x00,
833 op_basr = 0x0d,
834 op_bas = 0x4d,
835 op_bcr = 0x07,
836 op_bc = 0x0d,
1db4e8a0
UW
837 op_bctr = 0x06,
838 op_bctgr = 0xb946,
839 op_bct = 0x46,
840 op1_bctg = 0xe3, op2_bctg = 0x46,
841 op_bxh = 0x86,
842 op1_bxhg = 0xeb, op2_bxhg = 0x44,
843 op_bxle = 0x87,
844 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
845 op1_bras = 0xa7, op2_bras = 0x05,
846 op1_brasl= 0xc0, op2_brasl= 0x05,
847 op1_brc = 0xa7, op2_brc = 0x04,
848 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
849 op1_brct = 0xa7, op2_brct = 0x06,
850 op1_brctg= 0xa7, op2_brctg= 0x07,
851 op_brxh = 0x84,
852 op1_brxhg= 0xec, op2_brxhg= 0x44,
853 op_brxle = 0x85,
854 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
855 };
856
857
a8c99f38
JB
858/* Read a single instruction from address AT. */
859
860#define S390_MAX_INSTR_SIZE 6
861static int
862s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
863{
864 static int s390_instrlen[] = { 2, 4, 4, 6 };
865 int instrlen;
866
8defab1a 867 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
868 return -1;
869 instrlen = s390_instrlen[instr[0] >> 6];
870 if (instrlen > 2)
871 {
8defab1a 872 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
873 return -1;
874 }
875 return instrlen;
876}
877
878
4bc8c588
JB
879/* The functions below are for recognizing and decoding S/390
880 instructions of various formats. Each of them checks whether INSN
881 is an instruction of the given format, with the specified opcodes.
882 If it is, it sets the remaining arguments to the values of the
883 instruction's fields, and returns a non-zero value; otherwise, it
884 returns zero.
885
886 These functions' arguments appear in the order they appear in the
887 instruction, not in the machine-language form. So, opcodes always
888 come first, even though they're sometimes scattered around the
889 instructions. And displacements appear before base and extension
890 registers, as they do in the assembly syntax, not at the end, as
891 they do in the machine language. */
a78f21af 892static int
4bc8c588
JB
893is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
894{
895 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
896 {
897 *r1 = (insn[1] >> 4) & 0xf;
898 /* i2 is a 16-bit signed quantity. */
899 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
900 return 1;
901 }
902 else
903 return 0;
904}
8ac0e65a 905
5769d3cd 906
4bc8c588
JB
907static int
908is_ril (bfd_byte *insn, int op1, int op2,
909 unsigned int *r1, int *i2)
910{
911 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
912 {
913 *r1 = (insn[1] >> 4) & 0xf;
914 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
915 no sign extension is necessary, but we don't want to assume
916 that. */
917 *i2 = (((insn[2] << 24)
918 | (insn[3] << 16)
919 | (insn[4] << 8)
920 | (insn[5])) ^ 0x80000000) - 0x80000000;
921 return 1;
922 }
923 else
924 return 0;
925}
926
927
928static int
929is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
930{
931 if (insn[0] == op)
932 {
933 *r1 = (insn[1] >> 4) & 0xf;
934 *r2 = insn[1] & 0xf;
935 return 1;
936 }
937 else
938 return 0;
939}
940
941
942static int
943is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
944{
945 if (((insn[0] << 8) | insn[1]) == op)
946 {
947 /* Yes, insn[3]. insn[2] is unused in RRE format. */
948 *r1 = (insn[3] >> 4) & 0xf;
949 *r2 = insn[3] & 0xf;
950 return 1;
951 }
952 else
953 return 0;
954}
955
956
957static int
958is_rs (bfd_byte *insn, int op,
959 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
960{
961 if (insn[0] == op)
962 {
963 *r1 = (insn[1] >> 4) & 0xf;
964 *r3 = insn[1] & 0xf;
965 *b2 = (insn[2] >> 4) & 0xf;
966 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
967 return 1;
968 }
969 else
970 return 0;
971}
972
973
974static int
a8c99f38 975is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
976 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
977{
978 if (insn[0] == op1
4bc8c588
JB
979 && insn[5] == op2)
980 {
981 *r1 = (insn[1] >> 4) & 0xf;
982 *r3 = insn[1] & 0xf;
983 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
984 /* The 'long displacement' is a 20-bit signed integer. */
985 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
986 ^ 0x80000) - 0x80000;
4bc8c588
JB
987 return 1;
988 }
989 else
990 return 0;
991}
992
993
1db4e8a0
UW
994static int
995is_rsi (bfd_byte *insn, int op,
996 unsigned int *r1, unsigned int *r3, int *i2)
997{
998 if (insn[0] == op)
999 {
1000 *r1 = (insn[1] >> 4) & 0xf;
1001 *r3 = insn[1] & 0xf;
1002 /* i2 is a 16-bit signed quantity. */
1003 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1004 return 1;
1005 }
1006 else
1007 return 0;
1008}
1009
1010
1011static int
1012is_rie (bfd_byte *insn, int op1, int op2,
1013 unsigned int *r1, unsigned int *r3, int *i2)
1014{
1015 if (insn[0] == op1
1016 && insn[5] == op2)
1017 {
1018 *r1 = (insn[1] >> 4) & 0xf;
1019 *r3 = insn[1] & 0xf;
1020 /* i2 is a 16-bit signed quantity. */
1021 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1022 return 1;
1023 }
1024 else
1025 return 0;
1026}
1027
1028
4bc8c588
JB
1029static int
1030is_rx (bfd_byte *insn, int op,
1031 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1032{
1033 if (insn[0] == op)
1034 {
1035 *r1 = (insn[1] >> 4) & 0xf;
1036 *x2 = insn[1] & 0xf;
1037 *b2 = (insn[2] >> 4) & 0xf;
1038 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1039 return 1;
1040 }
1041 else
1042 return 0;
1043}
1044
1045
1046static int
a8c99f38 1047is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1048 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1049{
1050 if (insn[0] == op1
4bc8c588
JB
1051 && insn[5] == op2)
1052 {
1053 *r1 = (insn[1] >> 4) & 0xf;
1054 *x2 = insn[1] & 0xf;
1055 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1056 /* The 'long displacement' is a 20-bit signed integer. */
1057 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1058 ^ 0x80000) - 0x80000;
4bc8c588
JB
1059 return 1;
1060 }
1061 else
1062 return 0;
1063}
1064
1065
3fc46200 1066/* Prologue analysis. */
4bc8c588 1067
d0f54f9d
JB
1068#define S390_NUM_GPRS 16
1069#define S390_NUM_FPRS 16
4bc8c588 1070
a8c99f38
JB
1071struct s390_prologue_data {
1072
ee1b3323
UW
1073 /* The stack. */
1074 struct pv_area *stack;
1075
e17a4113 1076 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1077 int gpr_size;
1078 int fpr_size;
e17a4113 1079 enum bfd_endian byte_order;
a8c99f38
JB
1080
1081 /* The general-purpose registers. */
3fc46200 1082 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1083
1084 /* The floating-point registers. */
3fc46200 1085 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1086
121d8485
UW
1087 /* The offset relative to the CFA where the incoming GPR N was saved
1088 by the function prologue. 0 if not saved or unknown. */
1089 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1090
121d8485
UW
1091 /* Likewise for FPRs. */
1092 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1093
121d8485
UW
1094 /* Nonzero if the backchain was saved. This is assumed to be the
1095 case when the incoming SP is saved at the current SP location. */
1096 int back_chain_saved_p;
1097};
4bc8c588 1098
3fc46200
UW
1099/* Return the effective address for an X-style instruction, like:
1100
1101 L R1, D2(X2, B2)
1102
1103 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1104 constant; the effective address is the sum of all three. If either
1105 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1106 means that r0 can't be used as either X2 or B2. */
1107static pv_t
1108s390_addr (struct s390_prologue_data *data,
1109 int d2, unsigned int x2, unsigned int b2)
1110{
1111 pv_t result;
1112
1113 result = pv_constant (d2);
1114 if (x2)
1115 result = pv_add (result, data->gpr[x2]);
1116 if (b2)
1117 result = pv_add (result, data->gpr[b2]);
1118
1119 return result;
1120}
1121
1122/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1123static void
3fc46200
UW
1124s390_store (struct s390_prologue_data *data,
1125 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1126 pv_t value)
4bc8c588 1127{
3fc46200 1128 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1129 pv_t offset;
121d8485
UW
1130
1131 /* Check whether we are storing the backchain. */
3fc46200 1132 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1133
3fc46200 1134 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1135 if (size == data->gpr_size
3fc46200 1136 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1137 {
1138 data->back_chain_saved_p = 1;
1139 return;
1140 }
1141
1142
1143 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1144 if (!pv_area_store_would_trash (data->stack, addr))
1145 pv_area_store (data->stack, addr, size, value);
4bc8c588 1146
a8c99f38 1147
121d8485
UW
1148 /* Note: If this is some store we cannot identify, you might think we
1149 should forget our cached values, as any of those might have been hit.
1150
1151 However, we make the assumption that the register save areas are only
1152 ever stored to once in any given function, and we do recognize these
1153 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1154}
4bc8c588 1155
3fc46200
UW
1156/* Do a SIZE-byte load from D2(X2,B2). */
1157static pv_t
1158s390_load (struct s390_prologue_data *data,
1159 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1160
4bc8c588 1161{
3fc46200 1162 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1163 pv_t offset;
4bc8c588 1164
a8c99f38
JB
1165 /* If it's a load from an in-line constant pool, then we can
1166 simulate that, under the assumption that the code isn't
1167 going to change between the time the processor actually
1168 executed it creating the current frame, and the time when
1169 we're analyzing the code to unwind past that frame. */
3fc46200 1170 if (pv_is_constant (addr))
4bc8c588 1171 {
0542c86d 1172 struct target_section *secp;
3fc46200 1173 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38
JB
1174 if (secp != NULL
1175 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1176 & SEC_READONLY))
e17a4113
UW
1177 return pv_constant (read_memory_integer (addr.k, size,
1178 data->byte_order));
a8c99f38 1179 }
7666f43c 1180
121d8485 1181 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1182 return pv_area_fetch (data->stack, addr, size);
1183}
121d8485 1184
ee1b3323
UW
1185/* Function for finding saved registers in a 'struct pv_area'; we pass
1186 this to pv_area_scan.
121d8485 1187
ee1b3323
UW
1188 If VALUE is a saved register, ADDR says it was saved at a constant
1189 offset from the frame base, and SIZE indicates that the whole
1190 register was saved, record its offset in the reg_offset table in
1191 PROLOGUE_UNTYPED. */
1192static void
c378eb4e
MS
1193s390_check_for_saved (void *data_untyped, pv_t addr,
1194 CORE_ADDR size, pv_t value)
ee1b3323
UW
1195{
1196 struct s390_prologue_data *data = data_untyped;
1197 int i, offset;
1198
1199 if (!pv_is_register (addr, S390_SP_REGNUM))
1200 return;
1201
1202 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1203
ee1b3323
UW
1204 /* If we are storing the original value of a register, we want to
1205 record the CFA offset. If the same register is stored multiple
1206 times, the stack slot with the highest address counts. */
1207
1208 for (i = 0; i < S390_NUM_GPRS; i++)
1209 if (size == data->gpr_size
1210 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1211 if (data->gpr_slot[i] == 0
1212 || data->gpr_slot[i] > offset)
1213 {
1214 data->gpr_slot[i] = offset;
1215 return;
1216 }
1217
1218 for (i = 0; i < S390_NUM_FPRS; i++)
1219 if (size == data->fpr_size
1220 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1221 if (data->fpr_slot[i] == 0
1222 || data->fpr_slot[i] > offset)
1223 {
1224 data->fpr_slot[i] = offset;
1225 return;
1226 }
a8c99f38 1227}
4bc8c588 1228
a8c99f38
JB
1229/* Analyze the prologue of the function starting at START_PC,
1230 continuing at most until CURRENT_PC. Initialize DATA to
1231 hold all information we find out about the state of the registers
1232 and stack slots. Return the address of the instruction after
1233 the last one that changed the SP, FP, or back chain; or zero
1234 on error. */
1235static CORE_ADDR
1236s390_analyze_prologue (struct gdbarch *gdbarch,
1237 CORE_ADDR start_pc,
1238 CORE_ADDR current_pc,
1239 struct s390_prologue_data *data)
4bc8c588 1240{
a8c99f38
JB
1241 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1242
4bc8c588 1243 /* Our return value:
a8c99f38
JB
1244 The address of the instruction after the last one that changed
1245 the SP, FP, or back chain; zero if we got an error trying to
1246 read memory. */
1247 CORE_ADDR result = start_pc;
4bc8c588 1248
4bc8c588
JB
1249 /* The current PC for our abstract interpretation. */
1250 CORE_ADDR pc;
1251
1252 /* The address of the next instruction after that. */
1253 CORE_ADDR next_pc;
1254
4bc8c588
JB
1255 /* Set up everything's initial value. */
1256 {
1257 int i;
1258
55f960e1 1259 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1260
a8c99f38
JB
1261 /* For the purpose of prologue tracking, we consider the GPR size to
1262 be equal to the ABI word size, even if it is actually larger
1263 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1264 data->gpr_size = word_size;
1265 data->fpr_size = 8;
e17a4113 1266 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1267
4bc8c588 1268 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1269 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1270
1271 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1272 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1273
121d8485
UW
1274 for (i = 0; i < S390_NUM_GPRS; i++)
1275 data->gpr_slot[i] = 0;
1276
1277 for (i = 0; i < S390_NUM_FPRS; i++)
1278 data->fpr_slot[i] = 0;
4bc8c588 1279
121d8485 1280 data->back_chain_saved_p = 0;
4bc8c588
JB
1281 }
1282
a8c99f38
JB
1283 /* Start interpreting instructions, until we hit the frame's
1284 current PC or the first branch instruction. */
1285 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1286 {
4bc8c588 1287 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1288 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1289
3fc46200
UW
1290 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1291 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1292 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1293
4bc8c588 1294 /* Fields for various kinds of instructions. */
a8c99f38
JB
1295 unsigned int b2, r1, r2, x2, r3;
1296 int i2, d2;
4bc8c588 1297
121d8485 1298 /* The values of SP and FP before this instruction,
4bc8c588 1299 for detecting instructions that change them. */
3fc46200 1300 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1301 /* Likewise for the flag whether the back chain was saved. */
1302 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1303
1304 /* If we got an error trying to read the instruction, report it. */
1305 if (insn_len < 0)
8ac0e65a 1306 {
a8c99f38 1307 result = 0;
4bc8c588
JB
1308 break;
1309 }
1310
1311 next_pc = pc + insn_len;
1312
a8c99f38
JB
1313 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1314 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1315 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1316
4bc8c588 1317
3fc46200
UW
1318 /* LHI r1, i2 --- load halfword immediate. */
1319 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1320 /* LGFI r1, i2 --- load fullword immediate. */
1321 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1322 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1323 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1324 data->gpr[r1] = pv_constant (i2);
1325
1326 /* LR r1, r2 --- load from register. */
1327 /* LGR r1, r2 --- load from register (64-bit version). */
1328 else if (is_rr (insn32, op_lr, &r1, &r2)
1329 || is_rre (insn64, op_lgr, &r1, &r2))
1330 data->gpr[r1] = data->gpr[r2];
1331
1332 /* L r1, d2(x2, b2) --- load. */
1333 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1334 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1335 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1336 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1337 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1338 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1339
1340 /* ST r1, d2(x2, b2) --- store. */
1341 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1342 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1343 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1344 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1345 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1346 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1347
1348 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1349 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1350 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1351
1352 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1353 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1354 version). */
3fc46200
UW
1355 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1356 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1357 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1358 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1359 {
3fc46200
UW
1360 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1361 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1362 }
1363
3fc46200
UW
1364 /* AHI r1, i2 --- add halfword immediate. */
1365 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1366 /* AFI r1, i2 --- add fullword immediate. */
1367 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1368 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1369 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1370 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1371 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1372 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1373
1374 /* ALFI r1, i2 --- add logical immediate. */
1375 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1376 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1377 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1378 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1379 (CORE_ADDR)i2 & 0xffffffff);
1380
1381 /* AR r1, r2 -- add register. */
1382 /* AGR r1, r2 -- add register (64-bit version). */
1383 else if (is_rr (insn32, op_ar, &r1, &r2)
1384 || is_rre (insn64, op_agr, &r1, &r2))
1385 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1386
1387 /* A r1, d2(x2, b2) -- add. */
1388 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1389 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1390 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1391 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1392 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1393 data->gpr[r1] = pv_add (data->gpr[r1],
1394 s390_load (data, d2, x2, b2, data->gpr_size));
1395
1396 /* SLFI r1, i2 --- subtract logical immediate. */
1397 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1398 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1399 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1400 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1401 -((CORE_ADDR)i2 & 0xffffffff));
1402
1403 /* SR r1, r2 -- subtract register. */
1404 /* SGR r1, r2 -- subtract register (64-bit version). */
1405 else if (is_rr (insn32, op_sr, &r1, &r2)
1406 || is_rre (insn64, op_sgr, &r1, &r2))
1407 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1408
1409 /* S r1, d2(x2, b2) -- subtract. */
1410 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1411 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1412 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1413 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1414 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1415 data->gpr[r1] = pv_subtract (data->gpr[r1],
1416 s390_load (data, d2, x2, b2, data->gpr_size));
1417
1418 /* LA r1, d2(x2, b2) --- load address. */
1419 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1420 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1421 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1422 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1423
1424 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1425 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1426 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1427
3fc46200 1428 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1429 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1430 else if (is_rr (insn, op_basr, &r1, &r2)
1431 && r2 == 0)
3fc46200 1432 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1433
3fc46200 1434 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1435 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1436 {
3fc46200 1437 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1438 next_pc = pc + i2 * 2;
4bc8c588 1439
a8c99f38
JB
1440 /* We'd better not interpret any backward branches. We'll
1441 never terminate. */
1442 if (next_pc <= pc)
4bc8c588
JB
1443 break;
1444 }
1445
a8c99f38
JB
1446 /* Terminate search when hitting any other branch instruction. */
1447 else if (is_rr (insn, op_basr, &r1, &r2)
1448 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1449 || is_rr (insn, op_bcr, &r1, &r2)
1450 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1451 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1452 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1453 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1454 break;
1455
4bc8c588
JB
1456 else
1457 /* An instruction we don't know how to simulate. The only
1458 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1459 to 'unknown'. Instead, we'll be optimistic: we assume that
1460 we *can* interpret every instruction that the compiler uses
1461 to manipulate any of the data we're interested in here --
1462 then we can just ignore anything else. */
1463 ;
4bc8c588
JB
1464
1465 /* Record the address after the last instruction that changed
1466 the FP, SP, or backlink. Ignore instructions that changed
1467 them back to their original values --- those are probably
1468 restore instructions. (The back chain is never restored,
1469 just popped.) */
1470 {
3fc46200
UW
1471 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1472 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1473
3fc46200
UW
1474 if ((! pv_is_identical (pre_insn_sp, sp)
1475 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1476 && sp.kind != pvk_unknown)
1477 || (! pv_is_identical (pre_insn_fp, fp)
1478 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1479 && fp.kind != pvk_unknown)
121d8485 1480 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1481 result = next_pc;
4bc8c588 1482 }
5769d3cd 1483 }
4bc8c588 1484
ee1b3323
UW
1485 /* Record where all the registers were saved. */
1486 pv_area_scan (data->stack, s390_check_for_saved, data);
1487
1488 free_pv_area (data->stack);
1489 data->stack = NULL;
1490
4bc8c588 1491 return result;
5769d3cd
AC
1492}
1493
a8c99f38
JB
1494/* Advance PC across any function entry prologue instructions to reach
1495 some "real" code. */
1496static CORE_ADDR
6093d2eb 1497s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1498{
1499 struct s390_prologue_data data;
1500 CORE_ADDR skip_pc;
6093d2eb 1501 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1502 return skip_pc ? skip_pc : pc;
1503}
1504
d0f54f9d
JB
1505/* Return true if we are in the functin's epilogue, i.e. after the
1506 instruction that destroyed the function's stack frame. */
1507static int
1508s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1509{
1510 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1511
1512 /* In frameless functions, there's not frame to destroy and thus
1513 we don't care about the epilogue.
1514
1515 In functions with frame, the epilogue sequence is a pair of
1516 a LM-type instruction that restores (amongst others) the
1517 return register %r14 and the stack pointer %r15, followed
1518 by a branch 'br %r14' --or equivalent-- that effects the
1519 actual return.
1520
1521 In that situation, this function needs to return 'true' in
1522 exactly one case: when pc points to that branch instruction.
1523
1524 Thus we try to disassemble the one instructions immediately
177b42fe 1525 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1526 modifying the stack pointer.
1527
1528 Note that disassembling backwards is not reliable, so there
1529 is a slight chance of false positives here ... */
1530
1531 bfd_byte insn[6];
1532 unsigned int r1, r3, b2;
1533 int d2;
1534
1535 if (word_size == 4
8defab1a 1536 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1537 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1538 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1539 return 1;
1540
a8c99f38 1541 if (word_size == 4
8defab1a 1542 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1543 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1544 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1545 return 1;
1546
d0f54f9d 1547 if (word_size == 8
8defab1a 1548 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1549 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1550 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1551 return 1;
1552
1553 return 0;
1554}
5769d3cd 1555
1db4e8a0
UW
1556/* Displaced stepping. */
1557
1558/* Fix up the state of registers and memory after having single-stepped
1559 a displaced instruction. */
1560static void
1561s390_displaced_step_fixup (struct gdbarch *gdbarch,
1562 struct displaced_step_closure *closure,
1563 CORE_ADDR from, CORE_ADDR to,
1564 struct regcache *regs)
1565{
1566 /* Since we use simple_displaced_step_copy_insn, our closure is a
1567 copy of the instruction. */
1568 gdb_byte *insn = (gdb_byte *) closure;
1569 static int s390_instrlen[] = { 2, 4, 4, 6 };
1570 int insnlen = s390_instrlen[insn[0] >> 6];
1571
1572 /* Fields for various kinds of instructions. */
1573 unsigned int b2, r1, r2, x2, r3;
1574 int i2, d2;
1575
1576 /* Get current PC and addressing mode bit. */
1577 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1578 ULONGEST amode = 0;
1db4e8a0
UW
1579
1580 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1581 {
1582 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1583 amode &= 0x80000000;
1584 }
1585
1586 if (debug_displaced)
1587 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1588 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1589 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1590 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1591
1592 /* Handle absolute branch and save instructions. */
1593 if (is_rr (insn, op_basr, &r1, &r2)
1594 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1595 {
1596 /* Recompute saved return address in R1. */
1597 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1598 amode | (from + insnlen));
1599 }
1600
1601 /* Handle absolute branch instructions. */
1602 else if (is_rr (insn, op_bcr, &r1, &r2)
1603 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1604 || is_rr (insn, op_bctr, &r1, &r2)
1605 || is_rre (insn, op_bctgr, &r1, &r2)
1606 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1607 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1608 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1609 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1610 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1611 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1612 {
1613 /* Update PC iff branch was *not* taken. */
1614 if (pc == to + insnlen)
1615 regcache_write_pc (regs, from + insnlen);
1616 }
1617
1618 /* Handle PC-relative branch and save instructions. */
1619 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1620 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1621 {
1622 /* Update PC. */
1623 regcache_write_pc (regs, pc - to + from);
1624 /* Recompute saved return address in R1. */
1625 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1626 amode | (from + insnlen));
1627 }
1628
1629 /* Handle PC-relative branch instructions. */
1630 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1631 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1632 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1633 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1634 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1635 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1636 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1637 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1638 {
1639 /* Update PC. */
1640 regcache_write_pc (regs, pc - to + from);
1641 }
1642
1643 /* Handle LOAD ADDRESS RELATIVE LONG. */
1644 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1645 {
0161e4b9
UW
1646 /* Update PC. */
1647 regcache_write_pc (regs, from + insnlen);
1db4e8a0
UW
1648 /* Recompute output address in R1. */
1649 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1650 amode | (from + i2 * 2));
1db4e8a0
UW
1651 }
1652
1653 /* If we executed a breakpoint instruction, point PC right back at it. */
1654 else if (insn[0] == 0x0 && insn[1] == 0x1)
1655 regcache_write_pc (regs, from);
1656
1657 /* For any other insn, PC points right after the original instruction. */
1658 else
1659 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1660
1661 if (debug_displaced)
1662 fprintf_unfiltered (gdb_stdlog,
1663 "displaced: (s390) pc is now %s\n",
1664 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1665}
a8c99f38 1666
d6db1fab
UW
1667
1668/* Helper routine to unwind pseudo registers. */
1669
1670static struct value *
1671s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1672{
1673 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1674 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1675 struct type *type = register_type (gdbarch, regnum);
1676
1677 /* Unwind PC via PSW address. */
1678 if (regnum == tdep->pc_regnum)
1679 {
1680 struct value *val;
1681
1682 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1683 if (!value_optimized_out (val))
1684 {
1685 LONGEST pswa = value_as_long (val);
1686
1687 if (TYPE_LENGTH (type) == 4)
1688 return value_from_pointer (type, pswa & 0x7fffffff);
1689 else
1690 return value_from_pointer (type, pswa);
1691 }
1692 }
1693
1694 /* Unwind CC via PSW mask. */
1695 if (regnum == tdep->cc_regnum)
1696 {
1697 struct value *val;
1698
1699 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1700 if (!value_optimized_out (val))
1701 {
1702 LONGEST pswm = value_as_long (val);
1703
1704 if (TYPE_LENGTH (type) == 4)
1705 return value_from_longest (type, (pswm >> 12) & 3);
1706 else
1707 return value_from_longest (type, (pswm >> 44) & 3);
1708 }
1709 }
1710
1711 /* Unwind full GPRs to show at least the lower halves (as the
1712 upper halves are undefined). */
1713 if (tdep->gpr_full_regnum != -1
1714 && regnum >= tdep->gpr_full_regnum
1715 && regnum < tdep->gpr_full_regnum + 16)
1716 {
1717 int reg = regnum - tdep->gpr_full_regnum;
1718 struct value *val;
1719
1720 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1721 if (!value_optimized_out (val))
1722 return value_cast (type, val);
1723 }
1724
1725 return allocate_optimized_out_value (type);
1726}
1727
1728static struct value *
1729s390_trad_frame_prev_register (struct frame_info *this_frame,
1730 struct trad_frame_saved_reg saved_regs[],
1731 int regnum)
1732{
1733 if (regnum < S390_NUM_REGS)
1734 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1735 else
1736 return s390_unwind_pseudo_register (this_frame, regnum);
1737}
1738
1739
a8c99f38
JB
1740/* Normal stack frames. */
1741
1742struct s390_unwind_cache {
1743
1744 CORE_ADDR func;
1745 CORE_ADDR frame_base;
1746 CORE_ADDR local_base;
1747
1748 struct trad_frame_saved_reg *saved_regs;
1749};
1750
a78f21af 1751static int
f089c433 1752s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1753 struct s390_unwind_cache *info)
5769d3cd 1754{
f089c433 1755 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1756 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1757 struct s390_prologue_data data;
3fc46200
UW
1758 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1759 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1760 int i;
1761 CORE_ADDR cfa;
a8c99f38
JB
1762 CORE_ADDR func;
1763 CORE_ADDR result;
1764 ULONGEST reg;
1765 CORE_ADDR prev_sp;
1766 int frame_pointer;
1767 int size;
edb3359d 1768 struct frame_info *next_frame;
a8c99f38
JB
1769
1770 /* Try to find the function start address. If we can't find it, we don't
1771 bother searching for it -- with modern compilers this would be mostly
1772 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1773 or else a valid backchain ... */
f089c433 1774 func = get_frame_func (this_frame);
a8c99f38
JB
1775 if (!func)
1776 return 0;
5769d3cd 1777
a8c99f38
JB
1778 /* Try to analyze the prologue. */
1779 result = s390_analyze_prologue (gdbarch, func,
f089c433 1780 get_frame_pc (this_frame), &data);
a8c99f38 1781 if (!result)
5769d3cd 1782 return 0;
5769d3cd 1783
a8c99f38
JB
1784 /* If this was successful, we should have found the instruction that
1785 sets the stack pointer register to the previous value of the stack
1786 pointer minus the frame size. */
3fc46200 1787 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1788 return 0;
a8c99f38
JB
1789
1790 /* A frame size of zero at this point can mean either a real
1791 frameless function, or else a failure to find the prologue.
1792 Perform some sanity checks to verify we really have a
1793 frameless function. */
1794 if (sp->k == 0)
5769d3cd 1795 {
a8c99f38
JB
1796 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1797 size zero. This is only possible if the next frame is a sentinel
1798 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1799 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1800 needed, instead the code should simpliy rely on its
1801 analysis. */
edb3359d
DJ
1802 next_frame = get_next_frame (this_frame);
1803 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1804 next_frame = get_next_frame (next_frame);
1805 if (next_frame
f089c433 1806 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1807 return 0;
5769d3cd 1808
a8c99f38
JB
1809 /* If we really have a frameless function, %r14 must be valid
1810 -- in particular, it must point to a different function. */
f089c433 1811 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1812 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1813 if (get_pc_function_start (reg) == func)
5769d3cd 1814 {
a8c99f38
JB
1815 /* However, there is one case where it *is* valid for %r14
1816 to point to the same function -- if this is a recursive
1817 call, and we have stopped in the prologue *before* the
1818 stack frame was allocated.
1819
1820 Recognize this case by looking ahead a bit ... */
5769d3cd 1821
a8c99f38 1822 struct s390_prologue_data data2;
3fc46200 1823 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1824
1825 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1826 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1827 && sp->k != 0))
1828 return 0;
5769d3cd 1829 }
5769d3cd 1830 }
5769d3cd
AC
1831
1832
a8c99f38
JB
1833 /* OK, we've found valid prologue data. */
1834 size = -sp->k;
5769d3cd 1835
a8c99f38
JB
1836 /* If the frame pointer originally also holds the same value
1837 as the stack pointer, we're probably using it. If it holds
1838 some other value -- even a constant offset -- it is most
1839 likely used as temp register. */
3fc46200 1840 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1841 frame_pointer = S390_FRAME_REGNUM;
1842 else
1843 frame_pointer = S390_SP_REGNUM;
1844
1845 /* If we've detected a function with stack frame, we'll still have to
1846 treat it as frameless if we're currently within the function epilog
c378eb4e 1847 code at a point where the frame pointer has already been restored.
a8c99f38 1848 This can only happen in an innermost frame. */
0e100dab
AC
1849 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1850 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1851 next_frame = get_next_frame (this_frame);
1852 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1853 next_frame = get_next_frame (next_frame);
f089c433 1854 if (size > 0
edb3359d 1855 && (next_frame == NULL
f089c433 1856 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1857 {
a8c99f38
JB
1858 /* See the comment in s390_in_function_epilogue_p on why this is
1859 not completely reliable ... */
f089c433 1860 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1861 {
a8c99f38
JB
1862 memset (&data, 0, sizeof (data));
1863 size = 0;
1864 frame_pointer = S390_SP_REGNUM;
5769d3cd 1865 }
5769d3cd 1866 }
5769d3cd 1867
a8c99f38
JB
1868 /* Once we know the frame register and the frame size, we can unwind
1869 the current value of the frame register from the next frame, and
1870 add back the frame size to arrive that the previous frame's
1871 stack pointer value. */
f089c433 1872 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1873 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1874
7803799a
UW
1875 /* Set up ABI call-saved/call-clobbered registers. */
1876 for (i = 0; i < S390_NUM_REGS; i++)
1877 if (!s390_register_call_saved (gdbarch, i))
1878 trad_frame_set_unknown (info->saved_regs, i);
1879
1880 /* CC is always call-clobbered. */
d6db1fab 1881 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1882
121d8485
UW
1883 /* Record the addresses of all register spill slots the prologue parser
1884 has recognized. Consider only registers defined as call-saved by the
1885 ABI; for call-clobbered registers the parser may have recognized
1886 spurious stores. */
5769d3cd 1887
7803799a
UW
1888 for (i = 0; i < 16; i++)
1889 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1890 && data.gpr_slot[i] != 0)
121d8485 1891 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1892
7803799a
UW
1893 for (i = 0; i < 16; i++)
1894 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1895 && data.fpr_slot[i] != 0)
1896 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1897
1898 /* Function return will set PC to %r14. */
d6db1fab 1899 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1900
1901 /* In frameless functions, we unwind simply by moving the return
1902 address to the PC. However, if we actually stored to the
1903 save area, use that -- we might only think the function frameless
1904 because we're in the middle of the prologue ... */
1905 if (size == 0
d6db1fab 1906 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1907 {
d6db1fab 1908 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1909 }
a8c99f38
JB
1910
1911 /* Another sanity check: unless this is a frameless function,
1912 we should have found spill slots for SP and PC.
1913 If not, we cannot unwind further -- this happens e.g. in
1914 libc's thread_start routine. */
1915 if (size > 0)
5769d3cd 1916 {
a8c99f38 1917 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1918 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1919 prev_sp = -1;
5769d3cd 1920 }
a8c99f38
JB
1921
1922 /* We use the current value of the frame register as local_base,
1923 and the top of the register save area as frame_base. */
1924 if (prev_sp != -1)
1925 {
1926 info->frame_base = prev_sp + 16*word_size + 32;
1927 info->local_base = prev_sp - size;
1928 }
1929
1930 info->func = func;
1931 return 1;
5769d3cd
AC
1932}
1933
a78f21af 1934static void
f089c433 1935s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1936 struct s390_unwind_cache *info)
5769d3cd 1937{
f089c433 1938 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1939 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1940 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1941 CORE_ADDR backchain;
1942 ULONGEST reg;
1943 LONGEST sp;
7803799a
UW
1944 int i;
1945
1946 /* Set up ABI call-saved/call-clobbered registers. */
1947 for (i = 0; i < S390_NUM_REGS; i++)
1948 if (!s390_register_call_saved (gdbarch, i))
1949 trad_frame_set_unknown (info->saved_regs, i);
1950
1951 /* CC is always call-clobbered. */
d6db1fab 1952 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1953
1954 /* Get the backchain. */
f089c433 1955 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1956 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1957
1958 /* A zero backchain terminates the frame chain. As additional
1959 sanity check, let's verify that the spill slot for SP in the
1960 save area pointed to by the backchain in fact links back to
1961 the save area. */
1962 if (backchain != 0
e17a4113
UW
1963 && safe_read_memory_integer (backchain + 15*word_size,
1964 word_size, byte_order, &sp)
a8c99f38
JB
1965 && (CORE_ADDR)sp == backchain)
1966 {
1967 /* We don't know which registers were saved, but it will have
1968 to be at least %r14 and %r15. This will allow us to continue
1969 unwinding, but other prev-frame registers may be incorrect ... */
1970 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1971 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1972
1973 /* Function return will set PC to %r14. */
d6db1fab 1974 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1975 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1976
1977 /* We use the current value of the frame register as local_base,
1978 and the top of the register save area as frame_base. */
1979 info->frame_base = backchain + 16*word_size + 32;
1980 info->local_base = reg;
1981 }
1982
f089c433 1983 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1984}
1985
a8c99f38 1986static struct s390_unwind_cache *
f089c433 1987s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1988 void **this_prologue_cache)
1989{
1990 struct s390_unwind_cache *info;
1991 if (*this_prologue_cache)
1992 return *this_prologue_cache;
1993
1994 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1995 *this_prologue_cache = info;
f089c433 1996 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1997 info->func = -1;
1998 info->frame_base = -1;
1999 info->local_base = -1;
2000
2001 /* Try to use prologue analysis to fill the unwind cache.
2002 If this fails, fall back to reading the stack backchain. */
f089c433
UW
2003 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2004 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
2005
2006 return info;
2007}
5769d3cd 2008
a78f21af 2009static void
f089c433 2010s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2011 void **this_prologue_cache,
2012 struct frame_id *this_id)
5769d3cd 2013{
a8c99f38 2014 struct s390_unwind_cache *info
f089c433 2015 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2016
a8c99f38
JB
2017 if (info->frame_base == -1)
2018 return;
5769d3cd 2019
a8c99f38 2020 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2021}
2022
f089c433
UW
2023static struct value *
2024s390_frame_prev_register (struct frame_info *this_frame,
2025 void **this_prologue_cache, int regnum)
a8c99f38 2026{
7803799a 2027 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2028 struct s390_unwind_cache *info
f089c433 2029 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2030
d6db1fab 2031 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2032}
2033
2034static const struct frame_unwind s390_frame_unwind = {
2035 NORMAL_FRAME,
8fbca658 2036 default_frame_unwind_stop_reason,
a8c99f38 2037 s390_frame_this_id,
f089c433
UW
2038 s390_frame_prev_register,
2039 NULL,
2040 default_frame_sniffer
a8c99f38
JB
2041};
2042
5769d3cd 2043
8e645ae7
AC
2044/* Code stubs and their stack frames. For things like PLTs and NULL
2045 function calls (where there is no true frame and the return address
2046 is in the RETADDR register). */
a8c99f38 2047
8e645ae7
AC
2048struct s390_stub_unwind_cache
2049{
a8c99f38
JB
2050 CORE_ADDR frame_base;
2051 struct trad_frame_saved_reg *saved_regs;
2052};
2053
8e645ae7 2054static struct s390_stub_unwind_cache *
f089c433 2055s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2056 void **this_prologue_cache)
5769d3cd 2057{
f089c433 2058 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2059 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2060 struct s390_stub_unwind_cache *info;
a8c99f38 2061 ULONGEST reg;
5c3cf190 2062
a8c99f38
JB
2063 if (*this_prologue_cache)
2064 return *this_prologue_cache;
5c3cf190 2065
8e645ae7 2066 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2067 *this_prologue_cache = info;
f089c433 2068 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2069
2070 /* The return address is in register %r14. */
d6db1fab 2071 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2072
2073 /* Retrieve stack pointer and determine our frame base. */
f089c433 2074 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2075 info->frame_base = reg + 16*word_size + 32;
2076
2077 return info;
5769d3cd
AC
2078}
2079
a8c99f38 2080static void
f089c433 2081s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2082 void **this_prologue_cache,
2083 struct frame_id *this_id)
5769d3cd 2084{
8e645ae7 2085 struct s390_stub_unwind_cache *info
f089c433
UW
2086 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2087 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2088}
5769d3cd 2089
f089c433
UW
2090static struct value *
2091s390_stub_frame_prev_register (struct frame_info *this_frame,
2092 void **this_prologue_cache, int regnum)
8e645ae7
AC
2093{
2094 struct s390_stub_unwind_cache *info
f089c433 2095 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2096 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2097}
2098
f089c433
UW
2099static int
2100s390_stub_frame_sniffer (const struct frame_unwind *self,
2101 struct frame_info *this_frame,
2102 void **this_prologue_cache)
a8c99f38 2103{
93d42b30 2104 CORE_ADDR addr_in_block;
8e645ae7
AC
2105 bfd_byte insn[S390_MAX_INSTR_SIZE];
2106
2107 /* If the current PC points to non-readable memory, we assume we
2108 have trapped due to an invalid function pointer call. We handle
2109 the non-existing current function like a PLT stub. */
f089c433 2110 addr_in_block = get_frame_address_in_block (this_frame);
93d42b30 2111 if (in_plt_section (addr_in_block, NULL)
f089c433
UW
2112 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2113 return 1;
2114 return 0;
a8c99f38 2115}
5769d3cd 2116
f089c433
UW
2117static const struct frame_unwind s390_stub_frame_unwind = {
2118 NORMAL_FRAME,
8fbca658 2119 default_frame_unwind_stop_reason,
f089c433
UW
2120 s390_stub_frame_this_id,
2121 s390_stub_frame_prev_register,
2122 NULL,
2123 s390_stub_frame_sniffer
2124};
2125
5769d3cd 2126
a8c99f38 2127/* Signal trampoline stack frames. */
5769d3cd 2128
a8c99f38
JB
2129struct s390_sigtramp_unwind_cache {
2130 CORE_ADDR frame_base;
2131 struct trad_frame_saved_reg *saved_regs;
2132};
5769d3cd 2133
a8c99f38 2134static struct s390_sigtramp_unwind_cache *
f089c433 2135s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2136 void **this_prologue_cache)
5769d3cd 2137{
f089c433 2138 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2139 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2140 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2141 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2142 struct s390_sigtramp_unwind_cache *info;
2143 ULONGEST this_sp, prev_sp;
7803799a 2144 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2145 int i;
2146
2147 if (*this_prologue_cache)
2148 return *this_prologue_cache;
5769d3cd 2149
a8c99f38
JB
2150 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2151 *this_prologue_cache = info;
f089c433 2152 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2153
f089c433
UW
2154 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2155 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2156 next_cfa = this_sp + 16*word_size + 32;
2157
2158 /* New-style RT frame:
2159 retcode + alignment (8 bytes)
2160 siginfo (128 bytes)
c378eb4e 2161 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2162 if (next_ra == next_cfa)
2163 {
f0f63663 2164 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2165 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2166 upper GPR halves if present. */
2167 sigreg_high_off = 8;
a8c99f38
JB
2168 }
2169
2170 /* Old-style RT frame and all non-RT frames:
2171 old signal mask (8 bytes)
c378eb4e 2172 pointer to sigregs. */
5769d3cd
AC
2173 else
2174 {
e17a4113
UW
2175 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2176 word_size, byte_order);
7803799a
UW
2177 /* sigregs are followed by signo (4 bytes), then by the
2178 upper GPR halves if present. */
2179 sigreg_high_off = 4;
a8c99f38 2180 }
5769d3cd 2181
a8c99f38
JB
2182 /* The sigregs structure looks like this:
2183 long psw_mask;
2184 long psw_addr;
2185 long gprs[16];
2186 int acrs[16];
2187 int fpc;
2188 int __pad;
2189 double fprs[16]; */
5769d3cd 2190
7803799a
UW
2191 /* PSW mask and address. */
2192 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2193 sigreg_ptr += word_size;
7803799a 2194 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2195 sigreg_ptr += word_size;
2196
2197 /* Then the GPRs. */
2198 for (i = 0; i < 16; i++)
2199 {
2200 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2201 sigreg_ptr += word_size;
2202 }
2203
2204 /* Then the ACRs. */
2205 for (i = 0; i < 16; i++)
2206 {
2207 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2208 sigreg_ptr += 4;
5769d3cd 2209 }
5769d3cd 2210
a8c99f38
JB
2211 /* The floating-point control word. */
2212 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2213 sigreg_ptr += 8;
5769d3cd 2214
a8c99f38
JB
2215 /* And finally the FPRs. */
2216 for (i = 0; i < 16; i++)
2217 {
2218 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2219 sigreg_ptr += 8;
2220 }
2221
7803799a
UW
2222 /* If we have them, the GPR upper halves are appended at the end. */
2223 sigreg_ptr += sigreg_high_off;
2224 if (tdep->gpr_full_regnum != -1)
2225 for (i = 0; i < 16; i++)
2226 {
2227 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2228 sigreg_ptr += 4;
2229 }
2230
a8c99f38
JB
2231 /* Restore the previous frame's SP. */
2232 prev_sp = read_memory_unsigned_integer (
2233 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2234 word_size, byte_order);
5769d3cd 2235
a8c99f38
JB
2236 /* Determine our frame base. */
2237 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2238
a8c99f38 2239 return info;
5769d3cd
AC
2240}
2241
a8c99f38 2242static void
f089c433 2243s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2244 void **this_prologue_cache,
2245 struct frame_id *this_id)
5769d3cd 2246{
a8c99f38 2247 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2248 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2249 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2250}
2251
f089c433
UW
2252static struct value *
2253s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2254 void **this_prologue_cache, int regnum)
a8c99f38
JB
2255{
2256 struct s390_sigtramp_unwind_cache *info
f089c433 2257 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2258 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2259}
2260
f089c433
UW
2261static int
2262s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2263 struct frame_info *this_frame,
2264 void **this_prologue_cache)
5769d3cd 2265{
f089c433 2266 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2267 bfd_byte sigreturn[2];
4c8287ac 2268
8defab1a 2269 if (target_read_memory (pc, sigreturn, 2))
f089c433 2270 return 0;
4c8287ac 2271
a8c99f38 2272 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2273 return 0;
5769d3cd 2274
a8c99f38
JB
2275 if (sigreturn[1] != 119 /* sigreturn */
2276 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2277 return 0;
a8c99f38 2278
f089c433 2279 return 1;
5769d3cd
AC
2280}
2281
f089c433
UW
2282static const struct frame_unwind s390_sigtramp_frame_unwind = {
2283 SIGTRAMP_FRAME,
8fbca658 2284 default_frame_unwind_stop_reason,
f089c433
UW
2285 s390_sigtramp_frame_this_id,
2286 s390_sigtramp_frame_prev_register,
2287 NULL,
2288 s390_sigtramp_frame_sniffer
2289};
2290
4c8287ac 2291
a8c99f38
JB
2292/* Frame base handling. */
2293
2294static CORE_ADDR
f089c433 2295s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2296{
a8c99f38 2297 struct s390_unwind_cache *info
f089c433 2298 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2299 return info->frame_base;
2300}
2301
2302static CORE_ADDR
f089c433 2303s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2304{
2305 struct s390_unwind_cache *info
f089c433 2306 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2307 return info->local_base;
2308}
2309
2310static const struct frame_base s390_frame_base = {
2311 &s390_frame_unwind,
2312 s390_frame_base_address,
2313 s390_local_base_address,
2314 s390_local_base_address
2315};
2316
2317static CORE_ADDR
2318s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2319{
7803799a 2320 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2321 ULONGEST pc;
7803799a 2322 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2323 return gdbarch_addr_bits_remove (gdbarch, pc);
2324}
2325
2326static CORE_ADDR
2327s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2328{
2329 ULONGEST sp;
2330 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2331 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2332}
2333
2334
a431654a
AC
2335/* DWARF-2 frame support. */
2336
7803799a
UW
2337static struct value *
2338s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2339 int regnum)
2340{
d6db1fab 2341 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2342}
2343
a431654a
AC
2344static void
2345s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2346 struct dwarf2_frame_state_reg *reg,
4a4e5149 2347 struct frame_info *this_frame)
a431654a
AC
2348{
2349 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2350
d6db1fab
UW
2351 /* The condition code (and thus PSW mask) is call-clobbered. */
2352 if (regnum == S390_PSWM_REGNUM)
2353 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2354
2355 /* The PSW address unwinds to the return address. */
2356 else if (regnum == S390_PSWA_REGNUM)
2357 reg->how = DWARF2_FRAME_REG_RA;
2358
7803799a
UW
2359 /* Fixed registers are call-saved or call-clobbered
2360 depending on the ABI in use. */
d6db1fab 2361 else if (regnum < S390_NUM_REGS)
a431654a 2362 {
7803799a 2363 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2364 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2365 else
a431654a 2366 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2367 }
a431654a 2368
d6db1fab
UW
2369 /* We install a special function to unwind pseudos. */
2370 else
7803799a
UW
2371 {
2372 reg->how = DWARF2_FRAME_REG_FN;
2373 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2374 }
2375}
2376
2377
b0cf273e
JB
2378/* Dummy function calls. */
2379
78f8b424
JB
2380/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2381 "Integer-like" types are those that should be passed the way
2382 integers are: integers, enums, ranges, characters, and booleans. */
2383static int
2384is_integer_like (struct type *type)
2385{
2386 enum type_code code = TYPE_CODE (type);
2387
2388 return (code == TYPE_CODE_INT
2389 || code == TYPE_CODE_ENUM
2390 || code == TYPE_CODE_RANGE
2391 || code == TYPE_CODE_CHAR
2392 || code == TYPE_CODE_BOOL);
2393}
2394
78f8b424
JB
2395/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2396 "Pointer-like" types are those that should be passed the way
2397 pointers are: pointers and references. */
2398static int
2399is_pointer_like (struct type *type)
2400{
2401 enum type_code code = TYPE_CODE (type);
2402
2403 return (code == TYPE_CODE_PTR
2404 || code == TYPE_CODE_REF);
2405}
2406
2407
20a940cc
JB
2408/* Return non-zero if TYPE is a `float singleton' or `double
2409 singleton', zero otherwise.
2410
2411 A `T singleton' is a struct type with one member, whose type is
2412 either T or a `T singleton'. So, the following are all float
2413 singletons:
2414
2415 struct { float x };
2416 struct { struct { float x; } x; };
2417 struct { struct { struct { float x; } x; } x; };
2418
2419 ... and so on.
2420
b0cf273e
JB
2421 All such structures are passed as if they were floats or doubles,
2422 as the (revised) ABI says. */
20a940cc
JB
2423static int
2424is_float_singleton (struct type *type)
2425{
b0cf273e
JB
2426 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2427 {
2428 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2429 CHECK_TYPEDEF (singleton_type);
2430
2431 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2432 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2433 || is_float_singleton (singleton_type));
2434 }
2435
2436 return 0;
20a940cc
JB
2437}
2438
2439
2440/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2441 "Struct-like" types are those that should be passed as structs are:
2442 structs and unions.
2443
2444 As an odd quirk, not mentioned in the ABI, GCC passes float and
2445 double singletons as if they were a plain float, double, etc. (The
2446 corresponding union types are handled normally.) So we exclude
2447 those types here. *shrug* */
2448static int
2449is_struct_like (struct type *type)
2450{
2451 enum type_code code = TYPE_CODE (type);
2452
2453 return (code == TYPE_CODE_UNION
2454 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2455}
2456
2457
2458/* Return non-zero if TYPE is a float-like type, zero otherwise.
2459 "Float-like" types are those that should be passed as
2460 floating-point values are.
2461
2462 You'd think this would just be floats, doubles, long doubles, etc.
2463 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2464 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2465 corresponding union types are handled normally.) So we include
20a940cc
JB
2466 those types here. *shrug* */
2467static int
2468is_float_like (struct type *type)
2469{
2470 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2471 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2472 || is_float_singleton (type));
2473}
2474
2475
78f8b424 2476static int
b0cf273e 2477is_power_of_two (unsigned int n)
78f8b424 2478{
b0cf273e 2479 return ((n & (n - 1)) == 0);
78f8b424
JB
2480}
2481
b0cf273e
JB
2482/* Return non-zero if TYPE should be passed as a pointer to a copy,
2483 zero otherwise. */
4d819d0e 2484static int
b0cf273e 2485s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
2486{
2487 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2488 if (length > 8)
2489 return 1;
4d819d0e 2490
56b9d9ac
UW
2491 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2492 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2493 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2494}
2495
b0cf273e
JB
2496/* Return non-zero if TYPE should be passed in a float register
2497 if possible. */
78f8b424 2498static int
b0cf273e 2499s390_function_arg_float (struct type *type)
78f8b424 2500{
78f8b424 2501 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2502 if (length > 8)
2503 return 0;
78f8b424 2504
b0cf273e 2505 return is_float_like (type);
4d819d0e
JB
2506}
2507
b0cf273e
JB
2508/* Return non-zero if TYPE should be passed in an integer register
2509 (or a pair of integer registers) if possible. */
78f8b424 2510static int
b0cf273e 2511s390_function_arg_integer (struct type *type)
78f8b424 2512{
78f8b424 2513 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2514 if (length > 8)
2515 return 0;
78f8b424 2516
b0cf273e
JB
2517 return is_integer_like (type)
2518 || is_pointer_like (type)
2519 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
2520}
2521
78f8b424
JB
2522/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2523 word as required for the ABI. */
2524static LONGEST
e17a4113 2525extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2526{
e17a4113 2527 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2528 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2529
2530 /* Even structs get passed in the least significant bits of the
2531 register / memory word. It's not really right to extract them as
2532 an integer, but it does take care of the extension. */
2533 if (TYPE_UNSIGNED (type))
0fd88904 2534 return extract_unsigned_integer (value_contents (arg),
e17a4113 2535 TYPE_LENGTH (type), byte_order);
78f8b424 2536 else
0fd88904 2537 return extract_signed_integer (value_contents (arg),
e17a4113 2538 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2539}
2540
2541
78f8b424
JB
2542/* Return the alignment required by TYPE. */
2543static int
2544alignment_of (struct type *type)
2545{
2546 int alignment;
2547
2548 if (is_integer_like (type)
2549 || is_pointer_like (type)
a16b8bcd
UW
2550 || TYPE_CODE (type) == TYPE_CODE_FLT
2551 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2552 alignment = TYPE_LENGTH (type);
2553 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2554 || TYPE_CODE (type) == TYPE_CODE_UNION)
2555 {
2556 int i;
2557
2558 alignment = 1;
2559 for (i = 0; i < TYPE_NFIELDS (type); i++)
2560 {
56b9d9ac
UW
2561 int field_alignment
2562 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424
JB
2563
2564 if (field_alignment > alignment)
2565 alignment = field_alignment;
2566 }
2567 }
2568 else
2569 alignment = 1;
2570
2571 /* Check that everything we ever return is a power of two. Lots of
2572 code doesn't want to deal with aligning things to arbitrary
2573 boundaries. */
2574 gdb_assert ((alignment & (alignment - 1)) == 0);
2575
2576 return alignment;
2577}
2578
2579
2580/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2581 place to be passed to a function, as specified by the "GNU/Linux
2582 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2583
2584 SP is the current stack pointer. We must put arguments, links,
2585 padding, etc. whereever they belong, and return the new stack
2586 pointer value.
2587
2588 If STRUCT_RETURN is non-zero, then the function we're calling is
2589 going to return a structure by value; STRUCT_ADDR is the address of
2590 a block we've allocated for it on the stack.
2591
2592 Our caller has taken care of any type promotions needed to satisfy
2593 prototypes or the old K&R argument-passing rules. */
a78f21af 2594static CORE_ADDR
7d9b040b 2595s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2596 struct regcache *regcache, CORE_ADDR bp_addr,
2597 int nargs, struct value **args, CORE_ADDR sp,
2598 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2599{
b0cf273e
JB
2600 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2601 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2602 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2603 int i;
5769d3cd 2604
78f8b424
JB
2605 /* If the i'th argument is passed as a reference to a copy, then
2606 copy_addr[i] is the address of the copy we made. */
2607 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2608
c0cc4c83 2609 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2610 for (i = 0; i < nargs; i++)
2611 {
2612 struct value *arg = args[i];
56b9d9ac 2613 struct type *type = check_typedef (value_type (arg));
78f8b424 2614 unsigned length = TYPE_LENGTH (type);
5769d3cd 2615
b0cf273e 2616 if (s390_function_arg_pass_by_reference (type))
01c464e9 2617 {
78f8b424 2618 sp -= length;
5b03f266 2619 sp = align_down (sp, alignment_of (type));
78f8b424 2620 copy_addr[i] = sp;
01c464e9 2621 }
5769d3cd 2622 }
5769d3cd 2623
78f8b424
JB
2624 /* Reserve space for the parameter area. As a conservative
2625 simplification, we assume that everything will be passed on the
b0cf273e
JB
2626 stack. Since every argument larger than 8 bytes will be
2627 passed by reference, we use this simple upper bound. */
2628 sp -= nargs * 8;
78f8b424 2629
78f8b424
JB
2630 /* After all that, make sure it's still aligned on an eight-byte
2631 boundary. */
5b03f266 2632 sp = align_down (sp, 8);
78f8b424 2633
c0cc4c83
UW
2634 /* Allocate the standard frame areas: the register save area, the
2635 word reserved for the compiler (which seems kind of meaningless),
2636 and the back chain pointer. */
2637 sp -= 16*word_size + 32;
2638
2639 /* Now we have the final SP value. Make sure we didn't underflow;
2640 on 31-bit, this would result in addresses with the high bit set,
2641 which causes confusion elsewhere. Note that if we error out
2642 here, stack and registers remain untouched. */
2643 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2644 error (_("Stack overflow"));
2645
2646
78f8b424
JB
2647 /* Finally, place the actual parameters, working from SP towards
2648 higher addresses. The code above is supposed to reserve enough
2649 space for this. */
2650 {
2651 int fr = 0;
2652 int gr = 2;
c0cc4c83 2653 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2654
b0cf273e 2655 /* A struct is returned using general register 2. */
4d819d0e 2656 if (struct_return)
b0cf273e
JB
2657 {
2658 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2659 struct_addr);
2660 gr++;
2661 }
4d819d0e 2662
78f8b424
JB
2663 for (i = 0; i < nargs; i++)
2664 {
2665 struct value *arg = args[i];
56b9d9ac 2666 struct type *type = check_typedef (value_type (arg));
b0cf273e
JB
2667 unsigned length = TYPE_LENGTH (type);
2668
2669 if (s390_function_arg_pass_by_reference (type))
2670 {
c0cc4c83
UW
2671 /* Actually copy the argument contents to the stack slot
2672 that was reserved above. */
2673 write_memory (copy_addr[i], value_contents (arg), length);
2674
b0cf273e
JB
2675 if (gr <= 6)
2676 {
2677 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2678 copy_addr[i]);
2679 gr++;
2680 }
2681 else
2682 {
e17a4113
UW
2683 write_memory_unsigned_integer (starg, word_size, byte_order,
2684 copy_addr[i]);
b0cf273e
JB
2685 starg += word_size;
2686 }
2687 }
2688 else if (s390_function_arg_float (type))
2689 {
2690 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2691 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2692 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2693 {
2694 /* When we store a single-precision value in an FP register,
2695 it occupies the leftmost bits. */
2696 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2697 0, length, value_contents (arg));
b0cf273e
JB
2698 fr += 2;
2699 }
2700 else
2701 {
2702 /* When we store a single-precision value in a stack slot,
2703 it occupies the rightmost bits. */
2704 starg = align_up (starg + length, word_size);
0fd88904 2705 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2706 }
2707 }
2708 else if (s390_function_arg_integer (type) && length <= word_size)
2709 {
2710 if (gr <= 6)
2711 {
2712 /* Integer arguments are always extended to word size. */
2713 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2714 extend_simple_arg (gdbarch,
2715 arg));
b0cf273e
JB
2716 gr++;
2717 }
2718 else
2719 {
2720 /* Integer arguments are always extended to word size. */
e17a4113
UW
2721 write_memory_signed_integer (starg, word_size, byte_order,
2722 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2723 starg += word_size;
2724 }
2725 }
2726 else if (s390_function_arg_integer (type) && length == 2*word_size)
2727 {
2728 if (gr <= 5)
2729 {
2730 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2731 value_contents (arg));
b0cf273e 2732 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2733 value_contents (arg) + word_size);
b0cf273e
JB
2734 gr += 2;
2735 }
2736 else
2737 {
2738 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2739 in it, then don't go back and use it again later. */
2740 gr = 7;
2741
0fd88904 2742 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2743 starg += length;
2744 }
2745 }
2746 else
e2e0b3e5 2747 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2748 }
2749 }
2750
8de7d199
UW
2751 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2752 if (word_size == 4)
2753 {
2754 ULONGEST pswa;
2755 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2756 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2757 }
b0cf273e 2758 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2759
b0cf273e
JB
2760 /* Store updated stack pointer. */
2761 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2762
a8c99f38 2763 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2764 which is actually the top of the register save area. */
2765 return sp + 16*word_size + 32;
5769d3cd
AC
2766}
2767
f089c433 2768/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2769 dummy frame. The frame ID's base needs to match the TOS value
2770 returned by push_dummy_call, and the PC match the dummy frame's
2771 breakpoint. */
2772static struct frame_id
f089c433 2773s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2774{
a8c99f38 2775 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2776 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2777 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2778
121d8485 2779 return frame_id_build (sp + 16*word_size + 32,
f089c433 2780 get_frame_pc (this_frame));
b0cf273e 2781}
c8f9d51c 2782
4074e13c
JB
2783static CORE_ADDR
2784s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2785{
2786 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2787 always be aligned on an eight-byte boundary. */
2788 return (addr & -8);
2789}
2790
2791
b0cf273e
JB
2792/* Function return value access. */
2793
2794static enum return_value_convention
2795s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2796{
b0cf273e
JB
2797 int length = TYPE_LENGTH (type);
2798 if (length > 8)
2799 return RETURN_VALUE_STRUCT_CONVENTION;
2800
2801 switch (TYPE_CODE (type))
2802 {
2803 case TYPE_CODE_STRUCT:
2804 case TYPE_CODE_UNION:
2805 case TYPE_CODE_ARRAY:
56b9d9ac 2806 case TYPE_CODE_COMPLEX:
b0cf273e 2807 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2808
b0cf273e
JB
2809 default:
2810 return RETURN_VALUE_REGISTER_CONVENTION;
2811 }
c8f9d51c
JB
2812}
2813
b0cf273e 2814static enum return_value_convention
c055b101
CV
2815s390_return_value (struct gdbarch *gdbarch, struct type *func_type,
2816 struct type *type, struct regcache *regcache,
2817 gdb_byte *out, const gdb_byte *in)
5769d3cd 2818{
e17a4113 2819 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2820 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2821 enum return_value_convention rvc;
2822 int length;
2823
2824 type = check_typedef (type);
2825 rvc = s390_return_value_convention (gdbarch, type);
2826 length = TYPE_LENGTH (type);
2827
b0cf273e
JB
2828 if (in)
2829 {
2830 switch (rvc)
2831 {
2832 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2833 if (TYPE_CODE (type) == TYPE_CODE_FLT
2834 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2835 {
2836 /* When we store a single-precision value in an FP register,
2837 it occupies the leftmost bits. */
2838 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2839 0, length, in);
2840 }
2841 else if (length <= word_size)
2842 {
2843 /* Integer arguments are always extended to word size. */
2844 if (TYPE_UNSIGNED (type))
2845 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2846 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2847 else
2848 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2849 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2850 }
2851 else if (length == 2*word_size)
2852 {
2853 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2854 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2855 }
2856 else
e2e0b3e5 2857 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2858 break;
2859
2860 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2861 error (_("Cannot set function return value."));
b0cf273e
JB
2862 break;
2863 }
2864 }
2865 else if (out)
2866 {
2867 switch (rvc)
2868 {
2869 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2870 if (TYPE_CODE (type) == TYPE_CODE_FLT
2871 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2872 {
2873 /* When we store a single-precision value in an FP register,
2874 it occupies the leftmost bits. */
2875 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2876 0, length, out);
2877 }
2878 else if (length <= word_size)
2879 {
2880 /* Integer arguments occupy the rightmost bits. */
2881 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2882 word_size - length, length, out);
2883 }
2884 else if (length == 2*word_size)
2885 {
2886 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2887 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2888 }
2889 else
e2e0b3e5 2890 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2891 break;
5769d3cd 2892
b0cf273e 2893 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2894 error (_("Function return value unknown."));
b0cf273e
JB
2895 break;
2896 }
2897 }
2898
2899 return rvc;
2900}
5769d3cd
AC
2901
2902
a8c99f38
JB
2903/* Breakpoints. */
2904
43af2100 2905static const gdb_byte *
c378eb4e
MS
2906s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2907 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2908{
43af2100 2909 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2910
2911 *lenptr = sizeof (breakpoint);
2912 return breakpoint;
2913}
2914
5769d3cd 2915
a8c99f38 2916/* Address handling. */
5769d3cd
AC
2917
2918static CORE_ADDR
24568a2c 2919s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2920{
a8c99f38 2921 return addr & 0x7fffffff;
5769d3cd
AC
2922}
2923
ffc65945
KB
2924static int
2925s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2926{
2927 if (byte_size == 4)
119ac181 2928 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2929 else
2930 return 0;
2931}
2932
2933static const char *
2934s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2935{
119ac181 2936 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2937 return "mode32";
2938 else
2939 return NULL;
2940}
2941
a78f21af 2942static int
c378eb4e
MS
2943s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2944 const char *name,
ffc65945
KB
2945 int *type_flags_ptr)
2946{
2947 if (strcmp (name, "mode32") == 0)
2948 {
119ac181 2949 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2950 return 1;
2951 }
2952 else
2953 return 0;
2954}
2955
a8c99f38
JB
2956/* Set up gdbarch struct. */
2957
a78f21af 2958static struct gdbarch *
5769d3cd
AC
2959s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2960{
7803799a
UW
2961 const struct target_desc *tdesc = info.target_desc;
2962 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2963 struct gdbarch *gdbarch;
2964 struct gdbarch_tdep *tdep;
7803799a
UW
2965 int tdep_abi;
2966 int have_upper = 0;
c642a434
UW
2967 int have_linux_v1 = 0;
2968 int have_linux_v2 = 0;
7803799a
UW
2969 int first_pseudo_reg, last_pseudo_reg;
2970
2971 /* Default ABI and register size. */
2972 switch (info.bfd_arch_info->mach)
2973 {
2974 case bfd_mach_s390_31:
2975 tdep_abi = ABI_LINUX_S390;
2976 break;
2977
2978 case bfd_mach_s390_64:
2979 tdep_abi = ABI_LINUX_ZSERIES;
2980 break;
2981
2982 default:
2983 return NULL;
2984 }
2985
2986 /* Use default target description if none provided by the target. */
2987 if (!tdesc_has_registers (tdesc))
2988 {
2989 if (tdep_abi == ABI_LINUX_S390)
2990 tdesc = tdesc_s390_linux32;
2991 else
2992 tdesc = tdesc_s390x_linux64;
2993 }
2994
2995 /* Check any target description for validity. */
2996 if (tdesc_has_registers (tdesc))
2997 {
2998 static const char *const gprs[] = {
2999 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3000 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3001 };
3002 static const char *const fprs[] = {
3003 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3004 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3005 };
3006 static const char *const acrs[] = {
3007 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3008 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3009 };
3010 static const char *const gprs_lower[] = {
3011 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3012 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3013 };
3014 static const char *const gprs_upper[] = {
3015 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3016 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3017 };
3018 const struct tdesc_feature *feature;
3019 int i, valid_p = 1;
3020
3021 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3022 if (feature == NULL)
3023 return NULL;
3024
3025 tdesc_data = tdesc_data_alloc ();
3026
3027 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3028 S390_PSWM_REGNUM, "pswm");
3029 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3030 S390_PSWA_REGNUM, "pswa");
3031
3032 if (tdesc_unnumbered_register (feature, "r0"))
3033 {
3034 for (i = 0; i < 16; i++)
3035 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3036 S390_R0_REGNUM + i, gprs[i]);
3037 }
3038 else
3039 {
3040 have_upper = 1;
3041
3042 for (i = 0; i < 16; i++)
3043 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3044 S390_R0_REGNUM + i,
3045 gprs_lower[i]);
3046 for (i = 0; i < 16; i++)
3047 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3048 S390_R0_UPPER_REGNUM + i,
3049 gprs_upper[i]);
3050 }
3051
3052 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3053 if (feature == NULL)
3054 {
3055 tdesc_data_cleanup (tdesc_data);
3056 return NULL;
3057 }
3058
3059 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3060 S390_FPC_REGNUM, "fpc");
3061 for (i = 0; i < 16; i++)
3062 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3063 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3064
7803799a
UW
3065 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3066 if (feature == NULL)
3067 {
3068 tdesc_data_cleanup (tdesc_data);
3069 return NULL;
3070 }
3071
3072 for (i = 0; i < 16; i++)
3073 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3074 S390_A0_REGNUM + i, acrs[i]);
3075
94eae614 3076 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3077 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3078 if (feature)
3079 {
3080 tdesc_numbered_register (feature, tdesc_data,
3081 S390_ORIG_R2_REGNUM, "orig_r2");
3082
3083 if (tdesc_numbered_register (feature, tdesc_data,
3084 S390_LAST_BREAK_REGNUM, "last_break"))
3085 have_linux_v1 = 1;
3086
3087 if (tdesc_numbered_register (feature, tdesc_data,
3088 S390_SYSTEM_CALL_REGNUM, "system_call"))
3089 have_linux_v2 = 1;
3090
3091 if (have_linux_v2 > have_linux_v1)
3092 valid_p = 0;
3093 }
3094
7803799a
UW
3095 if (!valid_p)
3096 {
3097 tdesc_data_cleanup (tdesc_data);
3098 return NULL;
3099 }
3100 }
5769d3cd 3101
7803799a
UW
3102 /* Find a candidate among extant architectures. */
3103 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3104 arches != NULL;
3105 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3106 {
3107 tdep = gdbarch_tdep (arches->gdbarch);
3108 if (!tdep)
3109 continue;
3110 if (tdep->abi != tdep_abi)
3111 continue;
3112 if ((tdep->gpr_full_regnum != -1) != have_upper)
3113 continue;
3114 if (tdesc_data != NULL)
3115 tdesc_data_cleanup (tdesc_data);
3116 return arches->gdbarch;
3117 }
5769d3cd 3118
7803799a 3119 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 3120 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 3121 tdep->abi = tdep_abi;
d0f54f9d 3122 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3123
3124 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3125 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3126
1de90795
UW
3127 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3128 We can safely let them default to 128-bit, since the debug info
3129 will give the size of type actually used in each case. */
3130 set_gdbarch_long_double_bit (gdbarch, 128);
3131 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3132
aaab4dba 3133 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3134 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3135 always. */
5769d3cd 3136 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3137 /* Stack grows downward. */
3138 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3139 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3140 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3141 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3142
7803799a 3143 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3144 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3145 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3146 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3147 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3148 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
3149 set_gdbarch_regset_from_core_section (gdbarch,
3150 s390_regset_from_core_section);
7803799a 3151 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3152 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3153 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3154 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3155 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3156 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3157 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3158 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3159 s390_pseudo_register_reggroup_p);
3160 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3161
3162 /* Assign pseudo register numbers. */
3163 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3164 last_pseudo_reg = first_pseudo_reg;
3165 tdep->gpr_full_regnum = -1;
3166 if (have_upper)
3167 {
3168 tdep->gpr_full_regnum = last_pseudo_reg;
3169 last_pseudo_reg += 16;
3170 }
3171 tdep->pc_regnum = last_pseudo_reg++;
3172 tdep->cc_regnum = last_pseudo_reg++;
3173 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3174 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3175
b0cf273e
JB
3176 /* Inferior function calls. */
3177 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3178 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3179 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3180 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3181
a8c99f38 3182 /* Frame handling. */
a431654a 3183 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3184 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3185 dwarf2_append_unwinders (gdbarch);
a431654a 3186 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3187 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3188 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3189 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3190 frame_base_set_default (gdbarch, &s390_frame_base);
3191 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3192 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3193
1db4e8a0
UW
3194 /* Displaced stepping. */
3195 set_gdbarch_displaced_step_copy_insn (gdbarch,
3196 simple_displaced_step_copy_insn);
3197 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3198 set_gdbarch_displaced_step_free_closure (gdbarch,
3199 simple_displaced_step_free_closure);
3200 set_gdbarch_displaced_step_location (gdbarch,
3201 displaced_step_at_entry_point);
3202 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3203
70728992
PA
3204 /* Note that GNU/Linux is the only OS supported on this
3205 platform. */
3206 linux_init_abi (info, gdbarch);
3207
7803799a 3208 switch (tdep->abi)
5769d3cd 3209 {
7803799a 3210 case ABI_LINUX_S390:
d0f54f9d
JB
3211 tdep->gregset = &s390_gregset;
3212 tdep->sizeof_gregset = s390_sizeof_gregset;
3213 tdep->fpregset = &s390_fpregset;
3214 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3215
3216 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3217 set_solib_svr4_fetch_link_map_offsets
3218 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434
UW
3219
3220 if (have_upper)
3221 {
3222 if (have_linux_v2)
3223 set_gdbarch_core_regset_sections (gdbarch,
3224 s390_linux64v2_regset_sections);
3225 else if (have_linux_v1)
3226 set_gdbarch_core_regset_sections (gdbarch,
3227 s390_linux64v1_regset_sections);
3228 else
3229 set_gdbarch_core_regset_sections (gdbarch,
3230 s390_linux64_regset_sections);
3231 }
3232 else
3233 {
3234 if (have_linux_v2)
3235 set_gdbarch_core_regset_sections (gdbarch,
3236 s390_linux32v2_regset_sections);
3237 else if (have_linux_v1)
3238 set_gdbarch_core_regset_sections (gdbarch,
3239 s390_linux32v1_regset_sections);
3240 else
3241 set_gdbarch_core_regset_sections (gdbarch,
3242 s390_linux32_regset_sections);
3243 }
5769d3cd 3244 break;
b0cf273e 3245
7803799a 3246 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3247 tdep->gregset = &s390x_gregset;
3248 tdep->sizeof_gregset = s390x_sizeof_gregset;
3249 tdep->fpregset = &s390_fpregset;
3250 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3251
3252 set_gdbarch_long_bit (gdbarch, 64);
3253 set_gdbarch_long_long_bit (gdbarch, 64);
3254 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3255 set_solib_svr4_fetch_link_map_offsets
3256 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
3257 set_gdbarch_address_class_type_flags (gdbarch,
3258 s390_address_class_type_flags);
3259 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3260 s390_address_class_type_flags_to_name);
3261 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3262 s390_address_class_name_to_type_flags);
c642a434
UW
3263
3264 if (have_linux_v2)
3265 set_gdbarch_core_regset_sections (gdbarch,
3266 s390x_linux64v2_regset_sections);
3267 else if (have_linux_v1)
3268 set_gdbarch_core_regset_sections (gdbarch,
3269 s390x_linux64v1_regset_sections);
3270 else
3271 set_gdbarch_core_regset_sections (gdbarch,
3272 s390x_linux64_regset_sections);
5769d3cd
AC
3273 break;
3274 }
3275
36482093
AC
3276 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3277
982e9687
UW
3278 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3279
b2756930
KB
3280 /* Enable TLS support. */
3281 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3282 svr4_fetch_objfile_link_map);
3283
1dd635ac
UW
3284 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3285
5769d3cd
AC
3286 return gdbarch;
3287}
3288
3289
a78f21af
AC
3290extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3291
5769d3cd 3292void
5ae5f592 3293_initialize_s390_tdep (void)
5769d3cd 3294{
5769d3cd
AC
3295 /* Hook us into the gdbarch mechanism. */
3296 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3297
94eae614 3298 /* Initialize the GNU/Linux target descriptions. */
7803799a 3299 initialize_tdesc_s390_linux32 ();
c642a434
UW
3300 initialize_tdesc_s390_linux32v1 ();
3301 initialize_tdesc_s390_linux32v2 ();
7803799a 3302 initialize_tdesc_s390_linux64 ();
c642a434
UW
3303 initialize_tdesc_s390_linux64v1 ();
3304 initialize_tdesc_s390_linux64v2 ();
7803799a 3305 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3306 initialize_tdesc_s390x_linux64v1 ();
3307 initialize_tdesc_s390x_linux64v2 ();
5769d3cd 3308}
This page took 1.252442 seconds and 4 git commands to generate.