2004-07-20 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
9ab9195f 3 Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
23 02111-1307, USA. */
24
d0f54f9d 25#include "defs.h"
5769d3cd
AC
26#include "arch-utils.h"
27#include "frame.h"
28#include "inferior.h"
29#include "symtab.h"
30#include "target.h"
31#include "gdbcore.h"
32#include "gdbcmd.h"
5769d3cd
AC
33#include "objfiles.h"
34#include "tm.h"
35#include "../bfd/bfd.h"
36#include "floatformat.h"
37#include "regcache.h"
a8c99f38
JB
38#include "trad-frame.h"
39#include "frame-base.h"
40#include "frame-unwind.h"
a431654a 41#include "dwarf2-frame.h"
d0f54f9d
JB
42#include "reggroups.h"
43#include "regset.h"
fd0407d6 44#include "value.h"
78f8b424 45#include "gdb_assert.h"
a89aa300 46#include "dis-asm.h"
9cbd5950 47#include "solib-svr4.h" /* For struct link_map_offsets. */
5769d3cd 48
d0f54f9d 49#include "s390-tdep.h"
5769d3cd 50
60e6cc42 51
d0f54f9d
JB
52/* The tdep structure. */
53
54struct gdbarch_tdep
5769d3cd 55{
b0cf273e
JB
56 /* ABI version. */
57 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
58
d0f54f9d
JB
59 /* Core file register sets. */
60 const struct regset *gregset;
61 int sizeof_gregset;
62
63 const struct regset *fpregset;
64 int sizeof_fpregset;
65};
66
67
68/* Register information. */
69
70struct s390_register_info
71{
72 char *name;
73 struct type **type;
74};
75
76static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
77{
78 /* Program Status Word. */
79 { "pswm", &builtin_type_long },
80 { "pswa", &builtin_type_long },
81
82 /* General Purpose Registers. */
83 { "r0", &builtin_type_long },
84 { "r1", &builtin_type_long },
85 { "r2", &builtin_type_long },
86 { "r3", &builtin_type_long },
87 { "r4", &builtin_type_long },
88 { "r5", &builtin_type_long },
89 { "r6", &builtin_type_long },
90 { "r7", &builtin_type_long },
91 { "r8", &builtin_type_long },
92 { "r9", &builtin_type_long },
93 { "r10", &builtin_type_long },
94 { "r11", &builtin_type_long },
95 { "r12", &builtin_type_long },
96 { "r13", &builtin_type_long },
97 { "r14", &builtin_type_long },
98 { "r15", &builtin_type_long },
99
100 /* Access Registers. */
101 { "acr0", &builtin_type_int },
102 { "acr1", &builtin_type_int },
103 { "acr2", &builtin_type_int },
104 { "acr3", &builtin_type_int },
105 { "acr4", &builtin_type_int },
106 { "acr5", &builtin_type_int },
107 { "acr6", &builtin_type_int },
108 { "acr7", &builtin_type_int },
109 { "acr8", &builtin_type_int },
110 { "acr9", &builtin_type_int },
111 { "acr10", &builtin_type_int },
112 { "acr11", &builtin_type_int },
113 { "acr12", &builtin_type_int },
114 { "acr13", &builtin_type_int },
115 { "acr14", &builtin_type_int },
116 { "acr15", &builtin_type_int },
117
118 /* Floating Point Control Word. */
119 { "fpc", &builtin_type_int },
120
121 /* Floating Point Registers. */
122 { "f0", &builtin_type_double },
123 { "f1", &builtin_type_double },
124 { "f2", &builtin_type_double },
125 { "f3", &builtin_type_double },
126 { "f4", &builtin_type_double },
127 { "f5", &builtin_type_double },
128 { "f6", &builtin_type_double },
129 { "f7", &builtin_type_double },
130 { "f8", &builtin_type_double },
131 { "f9", &builtin_type_double },
132 { "f10", &builtin_type_double },
133 { "f11", &builtin_type_double },
134 { "f12", &builtin_type_double },
135 { "f13", &builtin_type_double },
136 { "f14", &builtin_type_double },
137 { "f15", &builtin_type_double },
138
139 /* Pseudo registers. */
140 { "pc", &builtin_type_void_func_ptr },
141 { "cc", &builtin_type_int },
142};
143
144/* Return the name of register REGNUM. */
145static const char *
146s390_register_name (int regnum)
147{
148 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
149 return s390_register_info[regnum].name;
150}
151
152/* Return the GDB type object for the "standard" data type of data in
153 register REGNUM. */
154static struct type *
155s390_register_type (struct gdbarch *gdbarch, int regnum)
156{
157 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
158 return *s390_register_info[regnum].type;
5769d3cd
AC
159}
160
d0f54f9d
JB
161/* DWARF Register Mapping. */
162
163static int s390_dwarf_regmap[] =
164{
165 /* General Purpose Registers. */
166 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
167 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
168 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
169 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
170
171 /* Floating Point Registers. */
172 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
173 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
174 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
175 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
176
177 /* Control Registers (not mapped). */
178 -1, -1, -1, -1, -1, -1, -1, -1,
179 -1, -1, -1, -1, -1, -1, -1, -1,
180
181 /* Access Registers. */
182 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
183 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
184 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
185 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
186
187 /* Program Status Word. */
188 S390_PSWM_REGNUM,
189 S390_PSWA_REGNUM
190};
191
192/* Convert DWARF register number REG to the appropriate register
193 number used by GDB. */
a78f21af 194static int
d0f54f9d
JB
195s390_dwarf_reg_to_regnum (int reg)
196{
197 int regnum = -1;
198
199 if (reg >= 0 || reg < ARRAY_SIZE (s390_dwarf_regmap))
200 regnum = s390_dwarf_regmap[reg];
201
202 if (regnum == -1)
203 warning ("Unmapped DWARF Register #%d encountered\n", reg);
204
205 return regnum;
206}
207
208/* Pseudo registers - PC and condition code. */
209
210static void
211s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
212 int regnum, void *buf)
213{
214 ULONGEST val;
215
216 switch (regnum)
217 {
218 case S390_PC_REGNUM:
219 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
220 store_unsigned_integer (buf, 4, val & 0x7fffffff);
221 break;
222
223 case S390_CC_REGNUM:
224 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
225 store_unsigned_integer (buf, 4, (val >> 12) & 3);
226 break;
227
228 default:
229 internal_error (__FILE__, __LINE__, "invalid regnum");
230 }
231}
232
233static void
234s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
235 int regnum, const void *buf)
5769d3cd 236{
d0f54f9d
JB
237 ULONGEST val, psw;
238
239 switch (regnum)
240 {
241 case S390_PC_REGNUM:
242 val = extract_unsigned_integer (buf, 4);
243 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
244 psw = (psw & 0x80000000) | (val & 0x7fffffff);
245 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
246 break;
247
248 case S390_CC_REGNUM:
249 val = extract_unsigned_integer (buf, 4);
250 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
251 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
252 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
253 break;
254
255 default:
256 internal_error (__FILE__, __LINE__, "invalid regnum");
257 }
5769d3cd
AC
258}
259
d0f54f9d
JB
260static void
261s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
262 int regnum, void *buf)
263{
264 ULONGEST val;
265
266 switch (regnum)
267 {
268 case S390_PC_REGNUM:
269 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
270 break;
271
272 case S390_CC_REGNUM:
273 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
274 store_unsigned_integer (buf, 4, (val >> 44) & 3);
275 break;
276
277 default:
278 internal_error (__FILE__, __LINE__, "invalid regnum");
279 }
280}
281
282static void
283s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
284 int regnum, const void *buf)
285{
286 ULONGEST val, psw;
287
288 switch (regnum)
289 {
290 case S390_PC_REGNUM:
291 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
292 break;
293
294 case S390_CC_REGNUM:
295 val = extract_unsigned_integer (buf, 4);
296 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
297 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
298 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
299 break;
300
301 default:
302 internal_error (__FILE__, __LINE__, "invalid regnum");
303 }
304}
305
306/* 'float' values are stored in the upper half of floating-point
307 registers, even though we are otherwise a big-endian platform. */
308
a78f21af 309static int
d0f54f9d 310s390_convert_register_p (int regno, struct type *type)
5769d3cd 311{
d0f54f9d
JB
312 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM)
313 && TYPE_LENGTH (type) < 8;
5769d3cd
AC
314}
315
d0f54f9d
JB
316static void
317s390_register_to_value (struct frame_info *frame, int regnum,
318 struct type *valtype, void *out)
319{
320 char in[8];
321 int len = TYPE_LENGTH (valtype);
322 gdb_assert (len < 8);
323
324 get_frame_register (frame, regnum, in);
325 memcpy (out, in, len);
326}
327
328static void
329s390_value_to_register (struct frame_info *frame, int regnum,
330 struct type *valtype, const void *in)
331{
332 char out[8];
333 int len = TYPE_LENGTH (valtype);
334 gdb_assert (len < 8);
335
336 memset (out, 0, 8);
337 memcpy (out, in, len);
338 put_frame_register (frame, regnum, out);
339}
340
341/* Register groups. */
342
a78f21af 343static int
d0f54f9d
JB
344s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
345 struct reggroup *group)
346{
347 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
348
349 /* Registers displayed via 'info regs'. */
350 if (group == general_reggroup)
351 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
352 || regnum == S390_PC_REGNUM
353 || regnum == S390_CC_REGNUM;
354
355 /* Registers displayed via 'info float'. */
356 if (group == float_reggroup)
357 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
358 || regnum == S390_FPC_REGNUM;
359
360 /* Registers that need to be saved/restored in order to
361 push or pop frames. */
362 if (group == save_reggroup || group == restore_reggroup)
363 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
364
365 return default_register_reggroup_p (gdbarch, regnum, group);
366}
367
368
369/* Core file register sets. */
370
371int s390_regmap_gregset[S390_NUM_REGS] =
372{
373 /* Program Status Word. */
374 0x00, 0x04,
375 /* General Purpose Registers. */
376 0x08, 0x0c, 0x10, 0x14,
377 0x18, 0x1c, 0x20, 0x24,
378 0x28, 0x2c, 0x30, 0x34,
379 0x38, 0x3c, 0x40, 0x44,
380 /* Access Registers. */
381 0x48, 0x4c, 0x50, 0x54,
382 0x58, 0x5c, 0x60, 0x64,
383 0x68, 0x6c, 0x70, 0x74,
384 0x78, 0x7c, 0x80, 0x84,
385 /* Floating Point Control Word. */
386 -1,
387 /* Floating Point Registers. */
388 -1, -1, -1, -1, -1, -1, -1, -1,
389 -1, -1, -1, -1, -1, -1, -1, -1,
390};
391
392int s390x_regmap_gregset[S390_NUM_REGS] =
393{
394 0x00, 0x08,
395 /* General Purpose Registers. */
396 0x10, 0x18, 0x20, 0x28,
397 0x30, 0x38, 0x40, 0x48,
398 0x50, 0x58, 0x60, 0x68,
399 0x70, 0x78, 0x80, 0x88,
400 /* Access Registers. */
401 0x90, 0x94, 0x98, 0x9c,
402 0xa0, 0xa4, 0xa8, 0xac,
403 0xb0, 0xb4, 0xb8, 0xbc,
404 0xc0, 0xc4, 0xc8, 0xcc,
405 /* Floating Point Control Word. */
406 -1,
407 /* Floating Point Registers. */
408 -1, -1, -1, -1, -1, -1, -1, -1,
409 -1, -1, -1, -1, -1, -1, -1, -1,
410};
411
412int s390_regmap_fpregset[S390_NUM_REGS] =
413{
414 /* Program Status Word. */
415 -1, -1,
416 /* General Purpose Registers. */
417 -1, -1, -1, -1, -1, -1, -1, -1,
418 -1, -1, -1, -1, -1, -1, -1, -1,
419 /* Access Registers. */
420 -1, -1, -1, -1, -1, -1, -1, -1,
421 -1, -1, -1, -1, -1, -1, -1, -1,
422 /* Floating Point Control Word. */
423 0x00,
424 /* Floating Point Registers. */
425 0x08, 0x10, 0x18, 0x20,
426 0x28, 0x30, 0x38, 0x40,
427 0x48, 0x50, 0x58, 0x60,
428 0x68, 0x70, 0x78, 0x80,
429};
430
431/* Supply register REGNUM from the register set REGSET to register cache
432 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
433static void
434s390_supply_regset (const struct regset *regset, struct regcache *regcache,
435 int regnum, const void *regs, size_t len)
436{
437 const int *offset = regset->descr;
438 int i;
439
440 for (i = 0; i < S390_NUM_REGS; i++)
441 {
442 if ((regnum == i || regnum == -1) && offset[i] != -1)
443 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
444 }
445}
446
447static const struct regset s390_gregset = {
448 s390_regmap_gregset,
449 s390_supply_regset
450};
451
452static const struct regset s390x_gregset = {
453 s390x_regmap_gregset,
454 s390_supply_regset
455};
456
457static const struct regset s390_fpregset = {
458 s390_regmap_fpregset,
459 s390_supply_regset
460};
461
462/* Return the appropriate register set for the core section identified
463 by SECT_NAME and SECT_SIZE. */
464const struct regset *
465s390_regset_from_core_section (struct gdbarch *gdbarch,
466 const char *sect_name, size_t sect_size)
467{
468 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
469
470 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
471 return tdep->gregset;
472
473 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
474 return tdep->fpregset;
475
476 return NULL;
5769d3cd
AC
477}
478
d0f54f9d 479
4bc8c588
JB
480/* Prologue analysis. */
481
482/* When we analyze a prologue, we're really doing 'abstract
483 interpretation' or 'pseudo-evaluation': running the function's code
484 in simulation, but using conservative approximations of the values
485 it would have when it actually runs. For example, if our function
486 starts with the instruction:
487
488 ahi r1, 42 # add halfword immediate 42 to r1
489
490 we don't know exactly what value will be in r1 after executing this
491 instruction, but we do know it'll be 42 greater than its original
492 value.
493
494 If we then see an instruction like:
495
496 ahi r1, 22 # add halfword immediate 22 to r1
497
498 we still don't know what r1's value is, but again, we can say it is
499 now 64 greater than its original value.
500
501 If the next instruction were:
502
503 lr r2, r1 # set r2 to r1's value
504
505 then we can say that r2's value is now the original value of r1
506 plus 64. And so on.
507
508 Of course, this can only go so far before it gets unreasonable. If
509 we wanted to be able to say anything about the value of r1 after
510 the instruction:
511
512 xr r1, r3 # exclusive-or r1 and r3, place result in r1
513
514 then things would get pretty complex. But remember, we're just
515 doing a conservative approximation; if exclusive-or instructions
516 aren't relevant to prologues, we can just say r1's value is now
517 'unknown'. We can ignore things that are too complex, if that loss
518 of information is acceptable for our application.
519
520 Once you've reached an instruction that you don't know how to
521 simulate, you stop. Now you examine the state of the registers and
522 stack slots you've kept track of. For example:
523
524 - To see how large your stack frame is, just check the value of sp;
525 if it's the original value of sp minus a constant, then that
526 constant is the stack frame's size. If the sp's value has been
527 marked as 'unknown', then that means the prologue has done
528 something too complex for us to track, and we don't know the
529 frame size.
530
531 - To see whether we've saved the SP in the current frame's back
532 chain slot, we just check whether the current value of the back
533 chain stack slot is the original value of the sp.
534
535 Sure, this takes some work. But prologue analyzers aren't
536 quick-and-simple pattern patching to recognize a few fixed prologue
537 forms any more; they're big, hairy functions. Along with inferior
538 function calls, prologue analysis accounts for a substantial
539 portion of the time needed to stabilize a GDB port. So I think
540 it's worthwhile to look for an approach that will be easier to
541 understand and maintain. In the approach used here:
542
543 - It's easier to see that the analyzer is correct: you just see
544 whether the analyzer properly (albiet conservatively) simulates
545 the effect of each instruction.
546
547 - It's easier to extend the analyzer: you can add support for new
548 instructions, and know that you haven't broken anything that
549 wasn't already broken before.
550
551 - It's orthogonal: to gather new information, you don't need to
552 complicate the code for each instruction. As long as your domain
553 of conservative values is already detailed enough to tell you
554 what you need, then all the existing instruction simulations are
555 already gathering the right data for you.
556
557 A 'struct prologue_value' is a conservative approximation of the
558 real value the register or stack slot will have. */
559
560struct prologue_value {
561
562 /* What sort of value is this? This determines the interpretation
563 of subsequent fields. */
564 enum {
565
566 /* We don't know anything about the value. This is also used for
567 values we could have kept track of, when doing so would have
568 been too complex and we don't want to bother. The bottom of
569 our lattice. */
570 pv_unknown,
571
572 /* A known constant. K is its value. */
573 pv_constant,
574
575 /* The value that register REG originally had *UPON ENTRY TO THE
576 FUNCTION*, plus K. If K is zero, this means, obviously, just
577 the value REG had upon entry to the function. REG is a GDB
578 register number. Before we start interpreting, we initialize
579 every register R to { pv_register, R, 0 }. */
580 pv_register,
581
582 } kind;
583
584 /* The meanings of the following fields depend on 'kind'; see the
585 comments for the specific 'kind' values. */
586 int reg;
587 CORE_ADDR k;
588};
589
590
591/* Set V to be unknown. */
592static void
593pv_set_to_unknown (struct prologue_value *v)
594{
595 v->kind = pv_unknown;
596}
597
598
599/* Set V to the constant K. */
600static void
601pv_set_to_constant (struct prologue_value *v, CORE_ADDR k)
602{
603 v->kind = pv_constant;
604 v->k = k;
605}
606
607
608/* Set V to the original value of register REG, plus K. */
609static void
610pv_set_to_register (struct prologue_value *v, int reg, CORE_ADDR k)
611{
612 v->kind = pv_register;
613 v->reg = reg;
614 v->k = k;
615}
616
617
618/* If one of *A and *B is a constant, and the other isn't, swap the
619 pointers as necessary to ensure that *B points to the constant.
620 This can reduce the number of cases we need to analyze in the
621 functions below. */
622static void
623pv_constant_last (struct prologue_value **a,
624 struct prologue_value **b)
625{
626 if ((*a)->kind == pv_constant
627 && (*b)->kind != pv_constant)
628 {
629 struct prologue_value *temp = *a;
630 *a = *b;
631 *b = temp;
632 }
633}
634
635
636/* Set SUM to the sum of A and B. SUM, A, and B may point to the same
637 'struct prologue_value' object. */
638static void
639pv_add (struct prologue_value *sum,
640 struct prologue_value *a,
641 struct prologue_value *b)
642{
643 pv_constant_last (&a, &b);
644
645 /* We can handle adding constants to registers, and other constants. */
646 if (b->kind == pv_constant
647 && (a->kind == pv_register
648 || a->kind == pv_constant))
649 {
650 sum->kind = a->kind;
651 sum->reg = a->reg; /* not meaningful if a is pv_constant, but
652 harmless */
653 sum->k = a->k + b->k;
654 }
655
656 /* Anything else we don't know how to add. We don't have a
657 representation for, say, the sum of two registers, or a multiple
658 of a register's value (adding a register to itself). */
659 else
660 sum->kind = pv_unknown;
661}
662
663
664/* Add the constant K to V. */
665static void
666pv_add_constant (struct prologue_value *v, CORE_ADDR k)
667{
668 struct prologue_value pv_k;
669
670 /* Rather than thinking of all the cases we can and can't handle,
671 we'll just let pv_add take care of that for us. */
672 pv_set_to_constant (&pv_k, k);
673 pv_add (v, v, &pv_k);
674}
675
676
677/* Subtract B from A, and put the result in DIFF.
678
679 This isn't quite the same as negating B and adding it to A, since
680 we don't have a representation for the negation of anything but a
681 constant. For example, we can't negate { pv_register, R1, 10 },
682 but we do know that { pv_register, R1, 10 } minus { pv_register,
683 R1, 5 } is { pv_constant, <ignored>, 5 }.
684
685 This means, for example, that we can subtract two stack addresses;
686 they're both relative to the original SP. Since the frame pointer
687 is set based on the SP, its value will be the original SP plus some
688 constant (probably zero), so we can use its value just fine. */
689static void
690pv_subtract (struct prologue_value *diff,
691 struct prologue_value *a,
692 struct prologue_value *b)
693{
694 pv_constant_last (&a, &b);
695
696 /* We can subtract a constant from another constant, or from a
697 register. */
698 if (b->kind == pv_constant
699 && (a->kind == pv_register
700 || a->kind == pv_constant))
701 {
702 diff->kind = a->kind;
703 diff->reg = a->reg; /* not always meaningful, but harmless */
704 diff->k = a->k - b->k;
705 }
706
707 /* We can subtract a register from itself, yielding a constant. */
708 else if (a->kind == pv_register
709 && b->kind == pv_register
710 && a->reg == b->reg)
711 {
712 diff->kind = pv_constant;
713 diff->k = a->k - b->k;
714 }
715
716 /* We don't know how to subtract anything else. */
717 else
718 diff->kind = pv_unknown;
719}
720
721
722/* Set AND to the logical and of A and B. */
723static void
724pv_logical_and (struct prologue_value *and,
725 struct prologue_value *a,
726 struct prologue_value *b)
727{
728 pv_constant_last (&a, &b);
729
730 /* We can 'and' two constants. */
731 if (a->kind == pv_constant
732 && b->kind == pv_constant)
733 {
734 and->kind = pv_constant;
735 and->k = a->k & b->k;
736 }
737
738 /* We can 'and' anything with the constant zero. */
739 else if (b->kind == pv_constant
740 && b->k == 0)
741 {
742 and->kind = pv_constant;
743 and->k = 0;
744 }
745
746 /* We can 'and' anything with ~0. */
747 else if (b->kind == pv_constant
748 && b->k == ~ (CORE_ADDR) 0)
749 *and = *a;
750
751 /* We can 'and' a register with itself. */
752 else if (a->kind == pv_register
753 && b->kind == pv_register
754 && a->reg == b->reg
755 && a->k == b->k)
756 *and = *a;
757
758 /* Otherwise, we don't know. */
759 else
760 pv_set_to_unknown (and);
761}
762
763
764/* Return non-zero iff A and B are identical expressions.
765
766 This is not the same as asking if the two values are equal; the
767 result of such a comparison would have to be a pv_boolean, and
768 asking whether two 'unknown' values were equal would give you
769 pv_maybe. Same for comparing, say, { pv_register, R1, 0 } and {
770 pv_register, R2, 0}. Instead, this is asking whether the two
771 representations are the same. */
12bffad7 772static int
4bc8c588
JB
773pv_is_identical (struct prologue_value *a,
774 struct prologue_value *b)
12bffad7 775{
4bc8c588
JB
776 if (a->kind != b->kind)
777 return 0;
778
779 switch (a->kind)
780 {
781 case pv_unknown:
782 return 1;
783 case pv_constant:
784 return (a->k == b->k);
785 case pv_register:
786 return (a->reg == b->reg && a->k == b->k);
787 default:
788 gdb_assert (0);
789 }
12bffad7
JB
790}
791
5769d3cd 792
4bc8c588
JB
793/* Return non-zero if A is the original value of register number R
794 plus K, zero otherwise. */
795static int
796pv_is_register (struct prologue_value *a, int r, CORE_ADDR k)
797{
798 return (a->kind == pv_register
799 && a->reg == r
800 && a->k == k);
801}
5769d3cd 802
5769d3cd 803
4bc8c588
JB
804/* A prologue-value-esque boolean type, including "maybe", when we
805 can't figure out whether something is true or not. */
806enum pv_boolean {
807 pv_maybe,
808 pv_definite_yes,
809 pv_definite_no,
810};
811
812
813/* Decide whether a reference to SIZE bytes at ADDR refers exactly to
814 an element of an array. The array starts at ARRAY_ADDR, and has
815 ARRAY_LEN values of ELT_SIZE bytes each. If ADDR definitely does
816 refer to an array element, set *I to the index of the referenced
817 element in the array, and return pv_definite_yes. If it definitely
818 doesn't, return pv_definite_no. If we can't tell, return pv_maybe.
819
820 If the reference does touch the array, but doesn't fall exactly on
821 an element boundary, or doesn't refer to the whole element, return
822 pv_maybe. */
823static enum pv_boolean
824pv_is_array_ref (struct prologue_value *addr,
825 CORE_ADDR size,
826 struct prologue_value *array_addr,
827 CORE_ADDR array_len,
828 CORE_ADDR elt_size,
829 int *i)
830{
831 struct prologue_value offset;
5769d3cd 832
4bc8c588
JB
833 /* Note that, since ->k is a CORE_ADDR, and CORE_ADDR is unsigned,
834 if addr is *before* the start of the array, then this isn't going
835 to be negative... */
836 pv_subtract (&offset, addr, array_addr);
837
838 if (offset.kind == pv_constant)
839 {
840 /* This is a rather odd test. We want to know if the SIZE bytes
841 at ADDR don't overlap the array at all, so you'd expect it to
842 be an || expression: "if we're completely before || we're
843 completely after". But with unsigned arithmetic, things are
844 different: since it's a number circle, not a number line, the
845 right values for offset.k are actually one contiguous range. */
846 if (offset.k <= -size
847 && offset.k >= array_len * elt_size)
848 return pv_definite_no;
849 else if (offset.k % elt_size != 0
850 || size != elt_size)
851 return pv_maybe;
852 else
853 {
854 *i = offset.k / elt_size;
855 return pv_definite_yes;
856 }
857 }
858 else
859 return pv_maybe;
860}
861
862
863
864/* Decoding S/390 instructions. */
865
866/* Named opcode values for the S/390 instructions we recognize. Some
867 instructions have their opcode split across two fields; those are the
868 op1_* and op2_* enums. */
869enum
870 {
a8c99f38
JB
871 op1_lhi = 0xa7, op2_lhi = 0x08,
872 op1_lghi = 0xa7, op2_lghi = 0x09,
4bc8c588 873 op_lr = 0x18,
a8c99f38
JB
874 op_lgr = 0xb904,
875 op_l = 0x58,
876 op1_ly = 0xe3, op2_ly = 0x58,
877 op1_lg = 0xe3, op2_lg = 0x04,
878 op_lm = 0x98,
879 op1_lmy = 0xeb, op2_lmy = 0x98,
880 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 881 op_st = 0x50,
a8c99f38 882 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 883 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 884 op_std = 0x60,
4bc8c588 885 op_stm = 0x90,
a8c99f38 886 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 887 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
888 op1_aghi = 0xa7, op2_aghi = 0x0b,
889 op1_ahi = 0xa7, op2_ahi = 0x0a,
890 op_ar = 0x1a,
891 op_agr = 0xb908,
892 op_a = 0x5a,
893 op1_ay = 0xe3, op2_ay = 0x5a,
894 op1_ag = 0xe3, op2_ag = 0x08,
895 op_sr = 0x1b,
896 op_sgr = 0xb909,
897 op_s = 0x5b,
898 op1_sy = 0xe3, op2_sy = 0x5b,
899 op1_sg = 0xe3, op2_sg = 0x09,
900 op_nr = 0x14,
901 op_ngr = 0xb980,
902 op_la = 0x41,
903 op1_lay = 0xe3, op2_lay = 0x71,
904 op1_larl = 0xc0, op2_larl = 0x00,
905 op_basr = 0x0d,
906 op_bas = 0x4d,
907 op_bcr = 0x07,
908 op_bc = 0x0d,
909 op1_bras = 0xa7, op2_bras = 0x05,
910 op1_brasl= 0xc0, op2_brasl= 0x05,
911 op1_brc = 0xa7, op2_brc = 0x04,
912 op1_brcl = 0xc0, op2_brcl = 0x04,
4bc8c588
JB
913 };
914
915
a8c99f38
JB
916/* Read a single instruction from address AT. */
917
918#define S390_MAX_INSTR_SIZE 6
919static int
920s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
921{
922 static int s390_instrlen[] = { 2, 4, 4, 6 };
923 int instrlen;
924
1f602b35 925 if (deprecated_read_memory_nobpt (at, &instr[0], 2))
a8c99f38
JB
926 return -1;
927 instrlen = s390_instrlen[instr[0] >> 6];
928 if (instrlen > 2)
929 {
1f602b35 930 if (deprecated_read_memory_nobpt (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
931 return -1;
932 }
933 return instrlen;
934}
935
936
4bc8c588
JB
937/* The functions below are for recognizing and decoding S/390
938 instructions of various formats. Each of them checks whether INSN
939 is an instruction of the given format, with the specified opcodes.
940 If it is, it sets the remaining arguments to the values of the
941 instruction's fields, and returns a non-zero value; otherwise, it
942 returns zero.
943
944 These functions' arguments appear in the order they appear in the
945 instruction, not in the machine-language form. So, opcodes always
946 come first, even though they're sometimes scattered around the
947 instructions. And displacements appear before base and extension
948 registers, as they do in the assembly syntax, not at the end, as
949 they do in the machine language. */
a78f21af 950static int
4bc8c588
JB
951is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
952{
953 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
954 {
955 *r1 = (insn[1] >> 4) & 0xf;
956 /* i2 is a 16-bit signed quantity. */
957 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
958 return 1;
959 }
960 else
961 return 0;
962}
8ac0e65a 963
5769d3cd 964
4bc8c588
JB
965static int
966is_ril (bfd_byte *insn, int op1, int op2,
967 unsigned int *r1, int *i2)
968{
969 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
970 {
971 *r1 = (insn[1] >> 4) & 0xf;
972 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
973 no sign extension is necessary, but we don't want to assume
974 that. */
975 *i2 = (((insn[2] << 24)
976 | (insn[3] << 16)
977 | (insn[4] << 8)
978 | (insn[5])) ^ 0x80000000) - 0x80000000;
979 return 1;
980 }
981 else
982 return 0;
983}
984
985
986static int
987is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
988{
989 if (insn[0] == op)
990 {
991 *r1 = (insn[1] >> 4) & 0xf;
992 *r2 = insn[1] & 0xf;
993 return 1;
994 }
995 else
996 return 0;
997}
998
999
1000static int
1001is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1002{
1003 if (((insn[0] << 8) | insn[1]) == op)
1004 {
1005 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1006 *r1 = (insn[3] >> 4) & 0xf;
1007 *r2 = insn[3] & 0xf;
1008 return 1;
1009 }
1010 else
1011 return 0;
1012}
1013
1014
1015static int
1016is_rs (bfd_byte *insn, int op,
1017 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
1018{
1019 if (insn[0] == op)
1020 {
1021 *r1 = (insn[1] >> 4) & 0xf;
1022 *r3 = insn[1] & 0xf;
1023 *b2 = (insn[2] >> 4) & 0xf;
1024 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1025 return 1;
1026 }
1027 else
1028 return 0;
1029}
1030
1031
1032static int
a8c99f38 1033is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1034 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
1035{
1036 if (insn[0] == op1
4bc8c588
JB
1037 && insn[5] == op2)
1038 {
1039 *r1 = (insn[1] >> 4) & 0xf;
1040 *r3 = insn[1] & 0xf;
1041 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1042 /* The 'long displacement' is a 20-bit signed integer. */
1043 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1044 ^ 0x80000) - 0x80000;
4bc8c588
JB
1045 return 1;
1046 }
1047 else
1048 return 0;
1049}
1050
1051
1052static int
1053is_rx (bfd_byte *insn, int op,
1054 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1055{
1056 if (insn[0] == op)
1057 {
1058 *r1 = (insn[1] >> 4) & 0xf;
1059 *x2 = insn[1] & 0xf;
1060 *b2 = (insn[2] >> 4) & 0xf;
1061 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1062 return 1;
1063 }
1064 else
1065 return 0;
1066}
1067
1068
1069static int
a8c99f38 1070is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1071 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1072{
1073 if (insn[0] == op1
4bc8c588
JB
1074 && insn[5] == op2)
1075 {
1076 *r1 = (insn[1] >> 4) & 0xf;
1077 *x2 = insn[1] & 0xf;
1078 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1079 /* The 'long displacement' is a 20-bit signed integer. */
1080 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1081 ^ 0x80000) - 0x80000;
4bc8c588
JB
1082 return 1;
1083 }
1084 else
1085 return 0;
1086}
1087
1088
1089/* Set ADDR to the effective address for an X-style instruction, like:
1090
1091 L R1, D2(X2, B2)
1092
a8c99f38 1093 Here, X2 and B2 are registers, and D2 is a signed 20-bit
4bc8c588
JB
1094 constant; the effective address is the sum of all three. If either
1095 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1096 means that r0 can't be used as either X2 or B2.
1097
1098 GPR is an array of general register values, indexed by GPR number,
1099 not GDB register number. */
1100static void
1101compute_x_addr (struct prologue_value *addr,
1102 struct prologue_value *gpr,
a8c99f38 1103 int d2, unsigned int x2, unsigned int b2)
4bc8c588
JB
1104{
1105 /* We can't just add stuff directly in addr; it might alias some of
1106 the registers we need to read. */
1107 struct prologue_value result;
1108
1109 pv_set_to_constant (&result, d2);
1110 if (x2)
1111 pv_add (&result, &result, &gpr[x2]);
1112 if (b2)
1113 pv_add (&result, &result, &gpr[b2]);
1114
1115 *addr = result;
1116}
1117
1118
1119/* The number of GPR and FPR spill slots in an S/390 stack frame. We
1120 track general-purpose registers r2 -- r15, and floating-point
1121 registers f0, f2, f4, and f6. */
1122#define S390_NUM_SPILL_SLOTS (14 + 4)
d0f54f9d
JB
1123#define S390_NUM_GPRS 16
1124#define S390_NUM_FPRS 16
4bc8c588 1125
a8c99f38
JB
1126struct s390_prologue_data {
1127
1128 /* The size of a GPR or FPR. */
1129 int gpr_size;
1130 int fpr_size;
1131
1132 /* The general-purpose registers. */
1133 struct prologue_value gpr[S390_NUM_GPRS];
1134
1135 /* The floating-point registers. */
1136 struct prologue_value fpr[S390_NUM_FPRS];
1137
1138 /* The register spill stack slots in the caller's frame ---
1139 general-purpose registers r2 through r15, and floating-point
1140 registers. spill[i] is where gpr i+2 gets spilled;
1141 spill[(14, 15, 16, 17)] is where (f0, f2, f4, f6) get spilled. */
1142 struct prologue_value spill[S390_NUM_SPILL_SLOTS];
1143
1144 /* The value of the back chain slot. This is only valid if the stack
1145 pointer is known to be less than its original value --- that is,
1146 if we have indeed allocated space on the stack. */
1147 struct prologue_value back_chain;
1148};
1149
4bc8c588
JB
1150
1151/* If the SIZE bytes at ADDR are a stack slot we're actually tracking,
1152 return pv_definite_yes and set *STACK to point to the slot. If
1153 we're sure that they are not any of our stack slots, then return
1154 pv_definite_no. Otherwise, return pv_maybe.
a8c99f38
JB
1155
1156 DATA describes our current state (registers and stack slots). */
4bc8c588
JB
1157static enum pv_boolean
1158s390_on_stack (struct prologue_value *addr,
1159 CORE_ADDR size,
a8c99f38 1160 struct s390_prologue_data *data,
4bc8c588
JB
1161 struct prologue_value **stack)
1162{
1163 struct prologue_value gpr_spill_addr;
1164 struct prologue_value fpr_spill_addr;
1165 struct prologue_value back_chain_addr;
1166 int i;
1167 enum pv_boolean b;
1168
1169 /* Construct the addresses of the spill arrays and the back chain. */
a8c99f38
JB
1170 pv_set_to_register (&gpr_spill_addr, S390_SP_REGNUM, 2 * data->gpr_size);
1171 pv_set_to_register (&fpr_spill_addr, S390_SP_REGNUM, 16 * data->gpr_size);
1172 back_chain_addr = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1173
1174 /* We have to check for GPR and FPR references using two separate
1175 calls to pv_is_array_ref, since the GPR and FPR spill slots are
1176 different sizes. (SPILL is an array, but the thing it tracks
1177 isn't really an array.) */
1178
1179 /* Was it a reference to the GPR spill array? */
a8c99f38 1180 b = pv_is_array_ref (addr, size, &gpr_spill_addr, 14, data->gpr_size, &i);
4bc8c588
JB
1181 if (b == pv_definite_yes)
1182 {
a8c99f38 1183 *stack = &data->spill[i];
4bc8c588
JB
1184 return pv_definite_yes;
1185 }
1186 if (b == pv_maybe)
1187 return pv_maybe;
1188
1189 /* Was it a reference to the FPR spill array? */
a8c99f38 1190 b = pv_is_array_ref (addr, size, &fpr_spill_addr, 4, data->fpr_size, &i);
4bc8c588 1191 if (b == pv_definite_yes)
5769d3cd 1192 {
a8c99f38 1193 *stack = &data->spill[14 + i];
4bc8c588 1194 return pv_definite_yes;
5769d3cd 1195 }
4bc8c588
JB
1196 if (b == pv_maybe)
1197 return pv_maybe;
1198
1199 /* Was it a reference to the back chain?
1200 This isn't quite right. We ought to check whether we have
1201 actually allocated any new frame at all. */
a8c99f38 1202 b = pv_is_array_ref (addr, size, &back_chain_addr, 1, data->gpr_size, &i);
4bc8c588 1203 if (b == pv_definite_yes)
5769d3cd 1204 {
a8c99f38 1205 *stack = &data->back_chain;
4bc8c588
JB
1206 return pv_definite_yes;
1207 }
1208 if (b == pv_maybe)
1209 return pv_maybe;
1210
1211 /* All the above queries returned definite 'no's. */
1212 return pv_definite_no;
1213}
1214
1215
a8c99f38
JB
1216/* Do a SIZE-byte store of VALUE to ADDR. */
1217static void
4bc8c588
JB
1218s390_store (struct prologue_value *addr,
1219 CORE_ADDR size,
1220 struct prologue_value *value,
a8c99f38 1221 struct s390_prologue_data *data)
4bc8c588
JB
1222{
1223 struct prologue_value *stack;
4bc8c588 1224
a8c99f38
JB
1225 /* We can do it if it's definitely a reference to something on the stack. */
1226 if (s390_on_stack (addr, size, data, &stack) == pv_definite_yes)
1227 {
1228 *stack = *value;
1229 return;
1230 }
4bc8c588 1231
a8c99f38
JB
1232 /* Note: If s390_on_stack returns pv_maybe, you might think we should
1233 forget our cached values, as any of those might have been hit.
1234
1235 However, we make the assumption that --since the fields we track
1236 are save areas private to compiler, and never directly exposed to
1237 the user-- every access to our data is explicit. Hence, every
1238 memory access we cannot follow can't hit our data. */
4bc8c588 1239}
4bc8c588 1240
a8c99f38 1241/* Do a SIZE-byte load from ADDR into VALUE. */
4bc8c588 1242static void
a8c99f38
JB
1243s390_load (struct prologue_value *addr,
1244 CORE_ADDR size,
1245 struct prologue_value *value,
1246 struct s390_prologue_data *data)
4bc8c588 1247{
a8c99f38 1248 struct prologue_value *stack;
4bc8c588 1249
a8c99f38
JB
1250 /* If it's a load from an in-line constant pool, then we can
1251 simulate that, under the assumption that the code isn't
1252 going to change between the time the processor actually
1253 executed it creating the current frame, and the time when
1254 we're analyzing the code to unwind past that frame. */
1255 if (addr->kind == pv_constant)
4bc8c588 1256 {
a8c99f38
JB
1257 struct section_table *secp;
1258 secp = target_section_by_addr (&current_target, addr->k);
1259 if (secp != NULL
1260 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1261 & SEC_READONLY))
1262 {
1263 pv_set_to_constant (value, read_memory_integer (addr->k, size));
1264 return;
1265 }
1266 }
7666f43c 1267
a8c99f38
JB
1268 /* If it's definitely a reference to something on the stack,
1269 we can do that. */
1270 if (s390_on_stack (addr, size, data, &stack) == pv_definite_yes)
1271 {
1272 *value = *stack;
1273 return;
5769d3cd 1274 }
4bc8c588 1275
a8c99f38
JB
1276 /* Otherwise, we don't know the value. */
1277 pv_set_to_unknown (value);
1278}
1279
4bc8c588 1280
a8c99f38
JB
1281/* Analyze the prologue of the function starting at START_PC,
1282 continuing at most until CURRENT_PC. Initialize DATA to
1283 hold all information we find out about the state of the registers
1284 and stack slots. Return the address of the instruction after
1285 the last one that changed the SP, FP, or back chain; or zero
1286 on error. */
1287static CORE_ADDR
1288s390_analyze_prologue (struct gdbarch *gdbarch,
1289 CORE_ADDR start_pc,
1290 CORE_ADDR current_pc,
1291 struct s390_prologue_data *data)
4bc8c588 1292{
a8c99f38
JB
1293 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1294
4bc8c588 1295 /* Our return value:
a8c99f38
JB
1296 The address of the instruction after the last one that changed
1297 the SP, FP, or back chain; zero if we got an error trying to
1298 read memory. */
1299 CORE_ADDR result = start_pc;
4bc8c588 1300
4bc8c588
JB
1301 /* The current PC for our abstract interpretation. */
1302 CORE_ADDR pc;
1303
1304 /* The address of the next instruction after that. */
1305 CORE_ADDR next_pc;
1306
4bc8c588
JB
1307 /* Set up everything's initial value. */
1308 {
1309 int i;
1310
a8c99f38
JB
1311 /* For the purpose of prologue tracking, we consider the GPR size to
1312 be equal to the ABI word size, even if it is actually larger
1313 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1314 data->gpr_size = word_size;
1315 data->fpr_size = 8;
1316
4bc8c588 1317 for (i = 0; i < S390_NUM_GPRS; i++)
a8c99f38 1318 pv_set_to_register (&data->gpr[i], S390_R0_REGNUM + i, 0);
4bc8c588
JB
1319
1320 for (i = 0; i < S390_NUM_FPRS; i++)
a8c99f38 1321 pv_set_to_register (&data->fpr[i], S390_F0_REGNUM + i, 0);
4bc8c588
JB
1322
1323 for (i = 0; i < S390_NUM_SPILL_SLOTS; i++)
a8c99f38 1324 pv_set_to_unknown (&data->spill[i]);
4bc8c588 1325
a8c99f38 1326 pv_set_to_unknown (&data->back_chain);
4bc8c588
JB
1327 }
1328
a8c99f38
JB
1329 /* Start interpreting instructions, until we hit the frame's
1330 current PC or the first branch instruction. */
1331 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1332 {
4bc8c588 1333 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1334 int insn_len = s390_readinstruction (insn, pc);
4bc8c588
JB
1335
1336 /* Fields for various kinds of instructions. */
a8c99f38
JB
1337 unsigned int b2, r1, r2, x2, r3;
1338 int i2, d2;
4bc8c588
JB
1339
1340 /* The values of SP, FP, and back chain before this instruction,
1341 for detecting instructions that change them. */
1342 struct prologue_value pre_insn_sp, pre_insn_fp, pre_insn_back_chain;
1343
1344 /* If we got an error trying to read the instruction, report it. */
1345 if (insn_len < 0)
8ac0e65a 1346 {
a8c99f38 1347 result = 0;
4bc8c588
JB
1348 break;
1349 }
1350
1351 next_pc = pc + insn_len;
1352
a8c99f38
JB
1353 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1354 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1355 pre_insn_back_chain = data->back_chain;
4bc8c588 1356
a8c99f38
JB
1357 /* LHI r1, i2 --- load halfword immediate */
1358 if (word_size == 4
1359 && is_ri (insn, op1_lhi, op2_lhi, &r1, &i2))
1360 pv_set_to_constant (&data->gpr[r1], i2);
4bc8c588 1361
a8c99f38
JB
1362 /* LGHI r1, i2 --- load halfword immediate (64-bit version) */
1363 else if (word_size == 8
1364 && is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
1365 pv_set_to_constant (&data->gpr[r1], i2);
4bc8c588 1366
a8c99f38
JB
1367 /* LR r1, r2 --- load from register */
1368 else if (word_size == 4
1369 && is_rr (insn, op_lr, &r1, &r2))
1370 data->gpr[r1] = data->gpr[r2];
4bc8c588 1371
a8c99f38
JB
1372 /* LGR r1, r2 --- load from register (64-bit version) */
1373 else if (word_size == 8
1374 && is_rre (insn, op_lgr, &r1, &r2))
1375 data->gpr[r1] = data->gpr[r2];
4bc8c588 1376
a8c99f38
JB
1377 /* L r1, d2(x2, b2) --- load */
1378 else if (word_size == 4
1379 && is_rx (insn, op_l, &r1, &d2, &x2, &b2))
4bc8c588 1380 {
a8c99f38 1381 struct prologue_value addr;
4bc8c588 1382
a8c99f38
JB
1383 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1384 s390_load (&addr, 4, &data->gpr[r1], data);
4bc8c588
JB
1385 }
1386
a8c99f38
JB
1387 /* LY r1, d2(x2, b2) --- load (long-displacement version) */
1388 else if (word_size == 4
1389 && is_rxy (insn, op1_ly, op2_ly, &r1, &d2, &x2, &b2))
4bc8c588
JB
1390 {
1391 struct prologue_value addr;
4bc8c588 1392
a8c99f38
JB
1393 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1394 s390_load (&addr, 4, &data->gpr[r1], data);
1395 }
4bc8c588 1396
a8c99f38
JB
1397 /* LG r1, d2(x2, b2) --- load (64-bit version) */
1398 else if (word_size == 8
1399 && is_rxy (insn, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1400 {
1401 struct prologue_value addr;
4bc8c588 1402
a8c99f38
JB
1403 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1404 s390_load (&addr, 8, &data->gpr[r1], data);
1405 }
4bc8c588 1406
a8c99f38
JB
1407 /* ST r1, d2(x2, b2) --- store */
1408 else if (word_size == 4
1409 && is_rx (insn, op_st, &r1, &d2, &x2, &b2))
1410 {
1411 struct prologue_value addr;
4bc8c588 1412
a8c99f38
JB
1413 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1414 s390_store (&addr, 4, &data->gpr[r1], data);
1415 }
4bc8c588 1416
a8c99f38
JB
1417 /* STY r1, d2(x2, b2) --- store (long-displacement version) */
1418 else if (word_size == 4
1419 && is_rxy (insn, op1_sty, op2_sty, &r1, &d2, &x2, &b2))
4bc8c588
JB
1420 {
1421 struct prologue_value addr;
a8c99f38
JB
1422
1423 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1424 s390_store (&addr, 4, &data->gpr[r1], data);
4bc8c588
JB
1425 }
1426
a8c99f38
JB
1427 /* STG r1, d2(x2, b2) --- store (64-bit version) */
1428 else if (word_size == 8
1429 && is_rxy (insn, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
4bc8c588
JB
1430 {
1431 struct prologue_value addr;
1432
a8c99f38
JB
1433 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1434 s390_store (&addr, 8, &data->gpr[r1], data);
4bc8c588
JB
1435 }
1436
1437 /* STD r1, d2(x2,b2) --- store floating-point register */
1438 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1439 {
1440 struct prologue_value addr;
1441
a8c99f38
JB
1442 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1443 s390_store (&addr, 8, &data->fpr[r1], data);
4bc8c588
JB
1444 }
1445
a8c99f38
JB
1446 /* STM r1, r3, d2(b2) --- store multiple */
1447 else if (word_size == 4
1448 && is_rs (insn, op_stm, &r1, &r3, &d2, &b2))
4bc8c588 1449 {
a8c99f38
JB
1450 int regnum;
1451 int offset;
4bc8c588
JB
1452 struct prologue_value addr;
1453
a8c99f38
JB
1454 for (regnum = r1, offset = 0;
1455 regnum <= r3;
1456 regnum++, offset += 4)
1457 {
1458 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1459 s390_store (&addr, 4, &data->gpr[regnum], data);
1460 }
4bc8c588
JB
1461 }
1462
a8c99f38
JB
1463 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version) */
1464 else if (word_size == 4
1465 && is_rsy (insn, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2))
4bc8c588
JB
1466 {
1467 int regnum;
1468 int offset;
1469 struct prologue_value addr;
1470
1471 for (regnum = r1, offset = 0;
1472 regnum <= r3;
1473 regnum++, offset += 4)
1474 {
a8c99f38
JB
1475 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1476 s390_store (&addr, 4, &data->gpr[regnum], data);
4bc8c588 1477 }
4bc8c588
JB
1478 }
1479
a8c99f38
JB
1480 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version) */
1481 else if (word_size == 8
1482 && is_rsy (insn, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588
JB
1483 {
1484 int regnum;
1485 int offset;
1486 struct prologue_value addr;
1487
1488 for (regnum = r1, offset = 0;
1489 regnum <= r3;
1490 regnum++, offset += 8)
1491 {
a8c99f38
JB
1492 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1493 s390_store (&addr, 8, &data->gpr[regnum], data);
4bc8c588 1494 }
a8c99f38
JB
1495 }
1496
1497 /* AHI r1, i2 --- add halfword immediate */
1498 else if (word_size == 4
1499 && is_ri (insn, op1_ahi, op2_ahi, &r1, &i2))
1500 pv_add_constant (&data->gpr[r1], i2);
1501
1502 /* AGHI r1, i2 --- add halfword immediate (64-bit version) */
1503 else if (word_size == 8
1504 && is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
1505 pv_add_constant (&data->gpr[r1], i2);
1506
1507 /* AR r1, r2 -- add register */
1508 else if (word_size == 4
1509 && is_rr (insn, op_ar, &r1, &r2))
1510 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1511
1512 /* AGR r1, r2 -- add register (64-bit version) */
1513 else if (word_size == 8
1514 && is_rre (insn, op_agr, &r1, &r2))
1515 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1516
1517 /* A r1, d2(x2, b2) -- add */
1518 else if (word_size == 4
1519 && is_rx (insn, op_a, &r1, &d2, &x2, &b2))
1520 {
1521 struct prologue_value addr;
1522 struct prologue_value value;
1523
1524 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1525 s390_load (&addr, 4, &value, data);
1526
1527 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1528 }
1529
1530 /* AY r1, d2(x2, b2) -- add (long-displacement version) */
1531 else if (word_size == 4
1532 && is_rxy (insn, op1_ay, op2_ay, &r1, &d2, &x2, &b2))
1533 {
1534 struct prologue_value addr;
1535 struct prologue_value value;
1536
1537 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1538 s390_load (&addr, 4, &value, data);
1539
1540 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1541 }
1542
1543 /* AG r1, d2(x2, b2) -- add (64-bit version) */
1544 else if (word_size == 8
1545 && is_rxy (insn, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1546 {
1547 struct prologue_value addr;
1548 struct prologue_value value;
1549
1550 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1551 s390_load (&addr, 8, &value, data);
1552
1553 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1554 }
1555
1556 /* SR r1, r2 -- subtract register */
1557 else if (word_size == 4
1558 && is_rr (insn, op_sr, &r1, &r2))
1559 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1560
1561 /* SGR r1, r2 -- subtract register (64-bit version) */
1562 else if (word_size == 8
1563 && is_rre (insn, op_sgr, &r1, &r2))
1564 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1565
1566 /* S r1, d2(x2, b2) -- subtract */
1567 else if (word_size == 4
1568 && is_rx (insn, op_s, &r1, &d2, &x2, &b2))
1569 {
1570 struct prologue_value addr;
1571 struct prologue_value value;
1572
1573 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1574 s390_load (&addr, 4, &value, data);
1575
1576 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1577 }
1578
1579 /* SY r1, d2(x2, b2) -- subtract (long-displacement version) */
1580 else if (word_size == 4
1581 && is_rxy (insn, op1_sy, op2_sy, &r1, &d2, &x2, &b2))
1582 {
1583 struct prologue_value addr;
1584 struct prologue_value value;
1585
1586 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1587 s390_load (&addr, 4, &value, data);
1588
1589 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1590 }
1591
1592 /* SG r1, d2(x2, b2) -- subtract (64-bit version) */
1593 else if (word_size == 8
1594 && is_rxy (insn, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1595 {
1596 struct prologue_value addr;
1597 struct prologue_value value;
1598
1599 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1600 s390_load (&addr, 8, &value, data);
1601
1602 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1603 }
1604
1605 /* NR r1, r2 --- logical and */
1606 else if (word_size == 4
1607 && is_rr (insn, op_nr, &r1, &r2))
1608 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1609
1610 /* NGR r1, r2 >--- logical and (64-bit version) */
1611 else if (word_size == 8
1612 && is_rre (insn, op_ngr, &r1, &r2))
1613 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1614
1615 /* LA r1, d2(x2, b2) --- load address */
1616 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2))
1617 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1618
1619 /* LAY r1, d2(x2, b2) --- load address (long-displacement version) */
1620 else if (is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1621 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1622
1623 /* LARL r1, i2 --- load address relative long */
1624 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1625 pv_set_to_constant (&data->gpr[r1], pc + i2 * 2);
1626
1627 /* BASR r1, 0 --- branch and save
1628 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1629 else if (is_rr (insn, op_basr, &r1, &r2)
1630 && r2 == 0)
1631 pv_set_to_constant (&data->gpr[r1], next_pc);
1632
1633 /* BRAS r1, i2 --- branch relative and save */
1634 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1635 {
1636 pv_set_to_constant (&data->gpr[r1], next_pc);
1637 next_pc = pc + i2 * 2;
4bc8c588 1638
a8c99f38
JB
1639 /* We'd better not interpret any backward branches. We'll
1640 never terminate. */
1641 if (next_pc <= pc)
4bc8c588
JB
1642 break;
1643 }
1644
a8c99f38
JB
1645 /* Terminate search when hitting any other branch instruction. */
1646 else if (is_rr (insn, op_basr, &r1, &r2)
1647 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1648 || is_rr (insn, op_bcr, &r1, &r2)
1649 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1650 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1651 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1652 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1653 break;
1654
4bc8c588
JB
1655 else
1656 /* An instruction we don't know how to simulate. The only
1657 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1658 to 'unknown'. Instead, we'll be optimistic: we assume that
1659 we *can* interpret every instruction that the compiler uses
1660 to manipulate any of the data we're interested in here --
1661 then we can just ignore anything else. */
1662 ;
4bc8c588
JB
1663
1664 /* Record the address after the last instruction that changed
1665 the FP, SP, or backlink. Ignore instructions that changed
1666 them back to their original values --- those are probably
1667 restore instructions. (The back chain is never restored,
1668 just popped.) */
1669 {
a8c99f38
JB
1670 struct prologue_value *sp = &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1671 struct prologue_value *fp = &data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1672
1673 if ((! pv_is_identical (&pre_insn_sp, sp)
1674 && ! pv_is_register (sp, S390_SP_REGNUM, 0))
1675 || (! pv_is_identical (&pre_insn_fp, fp)
1676 && ! pv_is_register (fp, S390_FRAME_REGNUM, 0))
a8c99f38
JB
1677 || ! pv_is_identical (&pre_insn_back_chain, &data->back_chain))
1678 result = next_pc;
4bc8c588 1679 }
5769d3cd 1680 }
4bc8c588 1681
4bc8c588 1682 return result;
5769d3cd
AC
1683}
1684
a8c99f38
JB
1685/* Advance PC across any function entry prologue instructions to reach
1686 some "real" code. */
1687static CORE_ADDR
1688s390_skip_prologue (CORE_ADDR pc)
1689{
1690 struct s390_prologue_data data;
1691 CORE_ADDR skip_pc;
1692 skip_pc = s390_analyze_prologue (current_gdbarch, pc, (CORE_ADDR)-1, &data);
1693 return skip_pc ? skip_pc : pc;
1694}
1695
d0f54f9d
JB
1696/* Return true if we are in the functin's epilogue, i.e. after the
1697 instruction that destroyed the function's stack frame. */
1698static int
1699s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1700{
1701 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1702
1703 /* In frameless functions, there's not frame to destroy and thus
1704 we don't care about the epilogue.
1705
1706 In functions with frame, the epilogue sequence is a pair of
1707 a LM-type instruction that restores (amongst others) the
1708 return register %r14 and the stack pointer %r15, followed
1709 by a branch 'br %r14' --or equivalent-- that effects the
1710 actual return.
1711
1712 In that situation, this function needs to return 'true' in
1713 exactly one case: when pc points to that branch instruction.
1714
1715 Thus we try to disassemble the one instructions immediately
1716 preceeding pc and check whether it is an LM-type instruction
1717 modifying the stack pointer.
1718
1719 Note that disassembling backwards is not reliable, so there
1720 is a slight chance of false positives here ... */
1721
1722 bfd_byte insn[6];
1723 unsigned int r1, r3, b2;
1724 int d2;
1725
1726 if (word_size == 4
1f602b35 1727 && !deprecated_read_memory_nobpt (pc - 4, insn, 4)
d0f54f9d
JB
1728 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1729 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1730 return 1;
1731
a8c99f38 1732 if (word_size == 4
1f602b35 1733 && !deprecated_read_memory_nobpt (pc - 6, insn, 6)
a8c99f38
JB
1734 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1735 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1736 return 1;
1737
d0f54f9d 1738 if (word_size == 8
1f602b35 1739 && !deprecated_read_memory_nobpt (pc - 6, insn, 6)
a8c99f38 1740 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1741 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1742 return 1;
1743
1744 return 0;
1745}
5769d3cd 1746
a8c99f38
JB
1747
1748/* Normal stack frames. */
1749
1750struct s390_unwind_cache {
1751
1752 CORE_ADDR func;
1753 CORE_ADDR frame_base;
1754 CORE_ADDR local_base;
1755
1756 struct trad_frame_saved_reg *saved_regs;
1757};
1758
a78f21af 1759static int
a8c99f38
JB
1760s390_prologue_frame_unwind_cache (struct frame_info *next_frame,
1761 struct s390_unwind_cache *info)
5769d3cd 1762{
a8c99f38
JB
1763 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1764 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1765 struct s390_prologue_data data;
1766 struct prologue_value *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1767 struct prologue_value *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1768 int slot_num;
1769 CORE_ADDR slot_addr;
1770 CORE_ADDR func;
1771 CORE_ADDR result;
1772 ULONGEST reg;
1773 CORE_ADDR prev_sp;
1774 int frame_pointer;
1775 int size;
1776
1777 /* Try to find the function start address. If we can't find it, we don't
1778 bother searching for it -- with modern compilers this would be mostly
1779 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1780 or else a valid backchain ... */
1781 func = frame_func_unwind (next_frame);
1782 if (!func)
1783 return 0;
5769d3cd 1784
a8c99f38
JB
1785 /* Try to analyze the prologue. */
1786 result = s390_analyze_prologue (gdbarch, func,
1787 frame_pc_unwind (next_frame), &data);
1788 if (!result)
5769d3cd 1789 return 0;
5769d3cd 1790
a8c99f38
JB
1791 /* If this was successful, we should have found the instruction that
1792 sets the stack pointer register to the previous value of the stack
1793 pointer minus the frame size. */
1794 if (sp->kind != pv_register || sp->reg != S390_SP_REGNUM)
5769d3cd 1795 return 0;
a8c99f38
JB
1796
1797 /* A frame size of zero at this point can mean either a real
1798 frameless function, or else a failure to find the prologue.
1799 Perform some sanity checks to verify we really have a
1800 frameless function. */
1801 if (sp->k == 0)
5769d3cd 1802 {
a8c99f38
JB
1803 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1804 size zero. This is only possible if the next frame is a sentinel
1805 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1806 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1807 needed, instead the code should simpliy rely on its
1808 analysis. */
1809 if (get_frame_type (next_frame) == NORMAL_FRAME)
5769d3cd 1810 return 0;
5769d3cd 1811
a8c99f38
JB
1812 /* If we really have a frameless function, %r14 must be valid
1813 -- in particular, it must point to a different function. */
1814 reg = frame_unwind_register_unsigned (next_frame, S390_RETADDR_REGNUM);
1815 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1816 if (get_pc_function_start (reg) == func)
5769d3cd 1817 {
a8c99f38
JB
1818 /* However, there is one case where it *is* valid for %r14
1819 to point to the same function -- if this is a recursive
1820 call, and we have stopped in the prologue *before* the
1821 stack frame was allocated.
1822
1823 Recognize this case by looking ahead a bit ... */
5769d3cd 1824
a8c99f38
JB
1825 struct s390_prologue_data data2;
1826 struct prologue_value *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1827
1828 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1829 && sp->kind == pv_register
1830 && sp->reg == S390_SP_REGNUM
1831 && sp->k != 0))
1832 return 0;
5769d3cd 1833 }
5769d3cd 1834 }
5769d3cd
AC
1835
1836
a8c99f38
JB
1837 /* OK, we've found valid prologue data. */
1838 size = -sp->k;
5769d3cd 1839
a8c99f38
JB
1840 /* If the frame pointer originally also holds the same value
1841 as the stack pointer, we're probably using it. If it holds
1842 some other value -- even a constant offset -- it is most
1843 likely used as temp register. */
1844 if (pv_is_identical (sp, fp))
1845 frame_pointer = S390_FRAME_REGNUM;
1846 else
1847 frame_pointer = S390_SP_REGNUM;
1848
1849 /* If we've detected a function with stack frame, we'll still have to
1850 treat it as frameless if we're currently within the function epilog
1851 code at a point where the frame pointer has already been restored.
1852 This can only happen in an innermost frame. */
0e100dab
AC
1853 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1854 instead the code should simpliy rely on its analysis. */
1855 if (size > 0 && get_frame_type (next_frame) != NORMAL_FRAME)
5769d3cd 1856 {
a8c99f38
JB
1857 /* See the comment in s390_in_function_epilogue_p on why this is
1858 not completely reliable ... */
1859 if (s390_in_function_epilogue_p (gdbarch, frame_pc_unwind (next_frame)))
5769d3cd 1860 {
a8c99f38
JB
1861 memset (&data, 0, sizeof (data));
1862 size = 0;
1863 frame_pointer = S390_SP_REGNUM;
5769d3cd 1864 }
5769d3cd 1865 }
5769d3cd 1866
a8c99f38
JB
1867 /* Once we know the frame register and the frame size, we can unwind
1868 the current value of the frame register from the next frame, and
1869 add back the frame size to arrive that the previous frame's
1870 stack pointer value. */
1871 prev_sp = frame_unwind_register_unsigned (next_frame, frame_pointer) + size;
5769d3cd 1872
a8c99f38
JB
1873 /* Scan the spill array; if a spill slot says it holds the
1874 original value of some register, then record that slot's
1875 address as the place that register was saved. */
5769d3cd 1876
a8c99f38
JB
1877 /* Slots for %r2 .. %r15. */
1878 for (slot_num = 0, slot_addr = prev_sp + 2 * data.gpr_size;
1879 slot_num < 14;
1880 slot_num++, slot_addr += data.gpr_size)
5769d3cd 1881 {
a8c99f38
JB
1882 struct prologue_value *slot = &data.spill[slot_num];
1883
1884 if (slot->kind == pv_register
1885 && slot->k == 0)
1886 info->saved_regs[slot->reg].addr = slot_addr;
5769d3cd 1887 }
5769d3cd 1888
a8c99f38
JB
1889 /* Slots for %f0 .. %f6. */
1890 for (slot_num = 14, slot_addr = prev_sp + 16 * data.gpr_size;
1891 slot_num < S390_NUM_SPILL_SLOTS;
1892 slot_num++, slot_addr += data.fpr_size)
5769d3cd 1893 {
a8c99f38
JB
1894 struct prologue_value *slot = &data.spill[slot_num];
1895
1896 if (slot->kind == pv_register
1897 && slot->k == 0)
1898 info->saved_regs[slot->reg].addr = slot_addr;
1899 }
1900
1901 /* Function return will set PC to %r14. */
1902 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1903
1904 /* In frameless functions, we unwind simply by moving the return
1905 address to the PC. However, if we actually stored to the
1906 save area, use that -- we might only think the function frameless
1907 because we're in the middle of the prologue ... */
1908 if (size == 0
1909 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1910 {
1911 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1912 }
a8c99f38
JB
1913
1914 /* Another sanity check: unless this is a frameless function,
1915 we should have found spill slots for SP and PC.
1916 If not, we cannot unwind further -- this happens e.g. in
1917 libc's thread_start routine. */
1918 if (size > 0)
5769d3cd 1919 {
a8c99f38
JB
1920 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1921 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1922 prev_sp = -1;
5769d3cd 1923 }
a8c99f38
JB
1924
1925 /* We use the current value of the frame register as local_base,
1926 and the top of the register save area as frame_base. */
1927 if (prev_sp != -1)
1928 {
1929 info->frame_base = prev_sp + 16*word_size + 32;
1930 info->local_base = prev_sp - size;
1931 }
1932
1933 info->func = func;
1934 return 1;
5769d3cd
AC
1935}
1936
a78f21af 1937static void
a8c99f38
JB
1938s390_backchain_frame_unwind_cache (struct frame_info *next_frame,
1939 struct s390_unwind_cache *info)
5769d3cd 1940{
a8c99f38
JB
1941 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1942 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1943 CORE_ADDR backchain;
1944 ULONGEST reg;
1945 LONGEST sp;
1946
1947 /* Get the backchain. */
1948 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1949 backchain = read_memory_unsigned_integer (reg, word_size);
1950
1951 /* A zero backchain terminates the frame chain. As additional
1952 sanity check, let's verify that the spill slot for SP in the
1953 save area pointed to by the backchain in fact links back to
1954 the save area. */
1955 if (backchain != 0
1956 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp)
1957 && (CORE_ADDR)sp == backchain)
1958 {
1959 /* We don't know which registers were saved, but it will have
1960 to be at least %r14 and %r15. This will allow us to continue
1961 unwinding, but other prev-frame registers may be incorrect ... */
1962 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1963 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1964
1965 /* Function return will set PC to %r14. */
1966 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1967
1968 /* We use the current value of the frame register as local_base,
1969 and the top of the register save area as frame_base. */
1970 info->frame_base = backchain + 16*word_size + 32;
1971 info->local_base = reg;
1972 }
1973
1974 info->func = frame_pc_unwind (next_frame);
5769d3cd
AC
1975}
1976
a8c99f38
JB
1977static struct s390_unwind_cache *
1978s390_frame_unwind_cache (struct frame_info *next_frame,
1979 void **this_prologue_cache)
1980{
1981 struct s390_unwind_cache *info;
1982 if (*this_prologue_cache)
1983 return *this_prologue_cache;
1984
1985 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1986 *this_prologue_cache = info;
1987 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1988 info->func = -1;
1989 info->frame_base = -1;
1990 info->local_base = -1;
1991
1992 /* Try to use prologue analysis to fill the unwind cache.
1993 If this fails, fall back to reading the stack backchain. */
1994 if (!s390_prologue_frame_unwind_cache (next_frame, info))
1995 s390_backchain_frame_unwind_cache (next_frame, info);
1996
1997 return info;
1998}
5769d3cd 1999
a78f21af 2000static void
a8c99f38
JB
2001s390_frame_this_id (struct frame_info *next_frame,
2002 void **this_prologue_cache,
2003 struct frame_id *this_id)
5769d3cd 2004{
a8c99f38
JB
2005 struct s390_unwind_cache *info
2006 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
5769d3cd 2007
a8c99f38
JB
2008 if (info->frame_base == -1)
2009 return;
5769d3cd 2010
a8c99f38 2011 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2012}
2013
a8c99f38
JB
2014static void
2015s390_frame_prev_register (struct frame_info *next_frame,
2016 void **this_prologue_cache,
2017 int regnum, int *optimizedp,
2018 enum lval_type *lvalp, CORE_ADDR *addrp,
2019 int *realnump, void *bufferp)
2020{
2021 struct s390_unwind_cache *info
2022 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
2023 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2024 optimizedp, lvalp, addrp, realnump, bufferp);
2025}
2026
2027static const struct frame_unwind s390_frame_unwind = {
2028 NORMAL_FRAME,
2029 s390_frame_this_id,
2030 s390_frame_prev_register
2031};
2032
2033static const struct frame_unwind *
2034s390_frame_sniffer (struct frame_info *next_frame)
2035{
2036 return &s390_frame_unwind;
2037}
5769d3cd
AC
2038
2039
8e645ae7
AC
2040/* Code stubs and their stack frames. For things like PLTs and NULL
2041 function calls (where there is no true frame and the return address
2042 is in the RETADDR register). */
a8c99f38 2043
8e645ae7
AC
2044struct s390_stub_unwind_cache
2045{
a8c99f38
JB
2046 CORE_ADDR frame_base;
2047 struct trad_frame_saved_reg *saved_regs;
2048};
2049
8e645ae7
AC
2050static struct s390_stub_unwind_cache *
2051s390_stub_frame_unwind_cache (struct frame_info *next_frame,
2052 void **this_prologue_cache)
5769d3cd 2053{
a8c99f38
JB
2054 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2055 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2056 struct s390_stub_unwind_cache *info;
a8c99f38 2057 ULONGEST reg;
5c3cf190 2058
a8c99f38
JB
2059 if (*this_prologue_cache)
2060 return *this_prologue_cache;
5c3cf190 2061
8e645ae7 2062 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38
JB
2063 *this_prologue_cache = info;
2064 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2065
2066 /* The return address is in register %r14. */
2067 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
2068
2069 /* Retrieve stack pointer and determine our frame base. */
2070 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2071 info->frame_base = reg + 16*word_size + 32;
2072
2073 return info;
5769d3cd
AC
2074}
2075
a8c99f38 2076static void
8e645ae7
AC
2077s390_stub_frame_this_id (struct frame_info *next_frame,
2078 void **this_prologue_cache,
2079 struct frame_id *this_id)
5769d3cd 2080{
8e645ae7
AC
2081 struct s390_stub_unwind_cache *info
2082 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
a8c99f38
JB
2083 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
2084}
5769d3cd 2085
a8c99f38 2086static void
8e645ae7
AC
2087s390_stub_frame_prev_register (struct frame_info *next_frame,
2088 void **this_prologue_cache,
2089 int regnum, int *optimizedp,
2090 enum lval_type *lvalp, CORE_ADDR *addrp,
2091 int *realnump, void *bufferp)
2092{
2093 struct s390_stub_unwind_cache *info
2094 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
a8c99f38
JB
2095 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2096 optimizedp, lvalp, addrp, realnump, bufferp);
2097}
2098
8e645ae7 2099static const struct frame_unwind s390_stub_frame_unwind = {
a8c99f38 2100 NORMAL_FRAME,
8e645ae7
AC
2101 s390_stub_frame_this_id,
2102 s390_stub_frame_prev_register
a8c99f38 2103};
5769d3cd 2104
a8c99f38 2105static const struct frame_unwind *
8e645ae7 2106s390_stub_frame_sniffer (struct frame_info *next_frame)
a8c99f38 2107{
8e645ae7
AC
2108 CORE_ADDR pc = frame_pc_unwind (next_frame);
2109 bfd_byte insn[S390_MAX_INSTR_SIZE];
2110
2111 /* If the current PC points to non-readable memory, we assume we
2112 have trapped due to an invalid function pointer call. We handle
2113 the non-existing current function like a PLT stub. */
2114 if (in_plt_section (pc, NULL)
2115 || s390_readinstruction (insn, pc) < 0)
2116 return &s390_stub_frame_unwind;
2117 return NULL;
a8c99f38 2118}
5769d3cd
AC
2119
2120
a8c99f38 2121/* Signal trampoline stack frames. */
5769d3cd 2122
a8c99f38
JB
2123struct s390_sigtramp_unwind_cache {
2124 CORE_ADDR frame_base;
2125 struct trad_frame_saved_reg *saved_regs;
2126};
5769d3cd 2127
a8c99f38
JB
2128static struct s390_sigtramp_unwind_cache *
2129s390_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
2130 void **this_prologue_cache)
5769d3cd 2131{
a8c99f38
JB
2132 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2133 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2134 struct s390_sigtramp_unwind_cache *info;
2135 ULONGEST this_sp, prev_sp;
2136 CORE_ADDR next_ra, next_cfa, sigreg_ptr;
2137 int i;
2138
2139 if (*this_prologue_cache)
2140 return *this_prologue_cache;
5769d3cd 2141
a8c99f38
JB
2142 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2143 *this_prologue_cache = info;
2144 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2145
2146 this_sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2147 next_ra = frame_pc_unwind (next_frame);
2148 next_cfa = this_sp + 16*word_size + 32;
2149
2150 /* New-style RT frame:
2151 retcode + alignment (8 bytes)
2152 siginfo (128 bytes)
2153 ucontext (contains sigregs at offset 5 words) */
2154 if (next_ra == next_cfa)
2155 {
f0f63663 2156 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
a8c99f38
JB
2157 }
2158
2159 /* Old-style RT frame and all non-RT frames:
2160 old signal mask (8 bytes)
2161 pointer to sigregs */
5769d3cd
AC
2162 else
2163 {
a8c99f38
JB
2164 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size);
2165 }
5769d3cd 2166
a8c99f38
JB
2167 /* The sigregs structure looks like this:
2168 long psw_mask;
2169 long psw_addr;
2170 long gprs[16];
2171 int acrs[16];
2172 int fpc;
2173 int __pad;
2174 double fprs[16]; */
5769d3cd 2175
a8c99f38
JB
2176 /* Let's ignore the PSW mask, it will not be restored anyway. */
2177 sigreg_ptr += word_size;
2178
2179 /* Next comes the PSW address. */
2180 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr;
2181 sigreg_ptr += word_size;
2182
2183 /* Then the GPRs. */
2184 for (i = 0; i < 16; i++)
2185 {
2186 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2187 sigreg_ptr += word_size;
2188 }
2189
2190 /* Then the ACRs. */
2191 for (i = 0; i < 16; i++)
2192 {
2193 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2194 sigreg_ptr += 4;
5769d3cd 2195 }
5769d3cd 2196
a8c99f38
JB
2197 /* The floating-point control word. */
2198 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2199 sigreg_ptr += 8;
5769d3cd 2200
a8c99f38
JB
2201 /* And finally the FPRs. */
2202 for (i = 0; i < 16; i++)
2203 {
2204 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2205 sigreg_ptr += 8;
2206 }
2207
2208 /* Restore the previous frame's SP. */
2209 prev_sp = read_memory_unsigned_integer (
2210 info->saved_regs[S390_SP_REGNUM].addr,
2211 word_size);
5769d3cd 2212
a8c99f38
JB
2213 /* Determine our frame base. */
2214 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2215
a8c99f38 2216 return info;
5769d3cd
AC
2217}
2218
a8c99f38
JB
2219static void
2220s390_sigtramp_frame_this_id (struct frame_info *next_frame,
2221 void **this_prologue_cache,
2222 struct frame_id *this_id)
5769d3cd 2223{
a8c99f38
JB
2224 struct s390_sigtramp_unwind_cache *info
2225 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2226 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
5769d3cd
AC
2227}
2228
4c8287ac 2229static void
a8c99f38
JB
2230s390_sigtramp_frame_prev_register (struct frame_info *next_frame,
2231 void **this_prologue_cache,
2232 int regnum, int *optimizedp,
2233 enum lval_type *lvalp, CORE_ADDR *addrp,
2234 int *realnump, void *bufferp)
2235{
2236 struct s390_sigtramp_unwind_cache *info
2237 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2238 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2239 optimizedp, lvalp, addrp, realnump, bufferp);
2240}
2241
2242static const struct frame_unwind s390_sigtramp_frame_unwind = {
2243 SIGTRAMP_FRAME,
2244 s390_sigtramp_frame_this_id,
2245 s390_sigtramp_frame_prev_register
2246};
2247
2248static const struct frame_unwind *
2249s390_sigtramp_frame_sniffer (struct frame_info *next_frame)
5769d3cd 2250{
a8c99f38
JB
2251 CORE_ADDR pc = frame_pc_unwind (next_frame);
2252 bfd_byte sigreturn[2];
4c8287ac 2253
1f602b35 2254 if (deprecated_read_memory_nobpt (pc, sigreturn, 2))
a8c99f38 2255 return NULL;
4c8287ac 2256
a8c99f38
JB
2257 if (sigreturn[0] != 0x0a /* svc */)
2258 return NULL;
5769d3cd 2259
a8c99f38
JB
2260 if (sigreturn[1] != 119 /* sigreturn */
2261 && sigreturn[1] != 173 /* rt_sigreturn */)
2262 return NULL;
2263
2264 return &s390_sigtramp_frame_unwind;
5769d3cd
AC
2265}
2266
4c8287ac 2267
a8c99f38
JB
2268/* Frame base handling. */
2269
2270static CORE_ADDR
2271s390_frame_base_address (struct frame_info *next_frame, void **this_cache)
4c8287ac 2272{
a8c99f38
JB
2273 struct s390_unwind_cache *info
2274 = s390_frame_unwind_cache (next_frame, this_cache);
2275 return info->frame_base;
2276}
2277
2278static CORE_ADDR
2279s390_local_base_address (struct frame_info *next_frame, void **this_cache)
2280{
2281 struct s390_unwind_cache *info
2282 = s390_frame_unwind_cache (next_frame, this_cache);
2283 return info->local_base;
2284}
2285
2286static const struct frame_base s390_frame_base = {
2287 &s390_frame_unwind,
2288 s390_frame_base_address,
2289 s390_local_base_address,
2290 s390_local_base_address
2291};
2292
2293static CORE_ADDR
2294s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2295{
2296 ULONGEST pc;
2297 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM);
2298 return gdbarch_addr_bits_remove (gdbarch, pc);
2299}
2300
2301static CORE_ADDR
2302s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2303{
2304 ULONGEST sp;
2305 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2306 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2307}
2308
2309
a431654a
AC
2310/* DWARF-2 frame support. */
2311
2312static void
2313s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2314 struct dwarf2_frame_state_reg *reg)
2315{
2316 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2317
2318 switch (tdep->abi)
2319 {
2320 case ABI_LINUX_S390:
2321 /* Call-saved registers. */
2322 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
2323 || regnum == S390_F4_REGNUM
2324 || regnum == S390_F6_REGNUM)
2325 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2326
2327 /* Call-clobbered registers. */
2328 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
2329 || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
2330 && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM))
2331 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2332
2333 /* The return address column. */
2334 else if (regnum == S390_PC_REGNUM)
2335 reg->how = DWARF2_FRAME_REG_RA;
2336 break;
2337
2338 case ABI_LINUX_ZSERIES:
2339 /* Call-saved registers. */
2340 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
2341 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM))
2342 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2343
2344 /* Call-clobbered registers. */
2345 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
2346 || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM))
2347 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2348
2349 /* The return address column. */
2350 else if (regnum == S390_PC_REGNUM)
2351 reg->how = DWARF2_FRAME_REG_RA;
2352 break;
2353 }
2354}
2355
2356
b0cf273e
JB
2357/* Dummy function calls. */
2358
78f8b424
JB
2359/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2360 "Integer-like" types are those that should be passed the way
2361 integers are: integers, enums, ranges, characters, and booleans. */
2362static int
2363is_integer_like (struct type *type)
2364{
2365 enum type_code code = TYPE_CODE (type);
2366
2367 return (code == TYPE_CODE_INT
2368 || code == TYPE_CODE_ENUM
2369 || code == TYPE_CODE_RANGE
2370 || code == TYPE_CODE_CHAR
2371 || code == TYPE_CODE_BOOL);
2372}
2373
78f8b424
JB
2374/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2375 "Pointer-like" types are those that should be passed the way
2376 pointers are: pointers and references. */
2377static int
2378is_pointer_like (struct type *type)
2379{
2380 enum type_code code = TYPE_CODE (type);
2381
2382 return (code == TYPE_CODE_PTR
2383 || code == TYPE_CODE_REF);
2384}
2385
2386
20a940cc
JB
2387/* Return non-zero if TYPE is a `float singleton' or `double
2388 singleton', zero otherwise.
2389
2390 A `T singleton' is a struct type with one member, whose type is
2391 either T or a `T singleton'. So, the following are all float
2392 singletons:
2393
2394 struct { float x };
2395 struct { struct { float x; } x; };
2396 struct { struct { struct { float x; } x; } x; };
2397
2398 ... and so on.
2399
b0cf273e
JB
2400 All such structures are passed as if they were floats or doubles,
2401 as the (revised) ABI says. */
20a940cc
JB
2402static int
2403is_float_singleton (struct type *type)
2404{
b0cf273e
JB
2405 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2406 {
2407 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2408 CHECK_TYPEDEF (singleton_type);
2409
2410 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
2411 || is_float_singleton (singleton_type));
2412 }
2413
2414 return 0;
20a940cc
JB
2415}
2416
2417
2418/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2419 "Struct-like" types are those that should be passed as structs are:
2420 structs and unions.
2421
2422 As an odd quirk, not mentioned in the ABI, GCC passes float and
2423 double singletons as if they were a plain float, double, etc. (The
2424 corresponding union types are handled normally.) So we exclude
2425 those types here. *shrug* */
2426static int
2427is_struct_like (struct type *type)
2428{
2429 enum type_code code = TYPE_CODE (type);
2430
2431 return (code == TYPE_CODE_UNION
2432 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2433}
2434
2435
2436/* Return non-zero if TYPE is a float-like type, zero otherwise.
2437 "Float-like" types are those that should be passed as
2438 floating-point values are.
2439
2440 You'd think this would just be floats, doubles, long doubles, etc.
2441 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2442 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2443 corresponding union types are handled normally.) So we include
20a940cc
JB
2444 those types here. *shrug* */
2445static int
2446is_float_like (struct type *type)
2447{
2448 return (TYPE_CODE (type) == TYPE_CODE_FLT
2449 || is_float_singleton (type));
2450}
2451
2452
78f8b424 2453static int
b0cf273e 2454is_power_of_two (unsigned int n)
78f8b424 2455{
b0cf273e 2456 return ((n & (n - 1)) == 0);
78f8b424
JB
2457}
2458
b0cf273e
JB
2459/* Return non-zero if TYPE should be passed as a pointer to a copy,
2460 zero otherwise. */
4d819d0e 2461static int
b0cf273e 2462s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
2463{
2464 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2465 if (length > 8)
2466 return 1;
4d819d0e 2467
b0cf273e
JB
2468 /* FIXME: All complex and vector types are also returned by reference. */
2469 return is_struct_like (type) && !is_power_of_two (length);
4d819d0e
JB
2470}
2471
b0cf273e
JB
2472/* Return non-zero if TYPE should be passed in a float register
2473 if possible. */
78f8b424 2474static int
b0cf273e 2475s390_function_arg_float (struct type *type)
78f8b424 2476{
78f8b424 2477 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2478 if (length > 8)
2479 return 0;
78f8b424 2480
b0cf273e 2481 return is_float_like (type);
4d819d0e
JB
2482}
2483
b0cf273e
JB
2484/* Return non-zero if TYPE should be passed in an integer register
2485 (or a pair of integer registers) if possible. */
78f8b424 2486static int
b0cf273e 2487s390_function_arg_integer (struct type *type)
78f8b424 2488{
78f8b424 2489 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2490 if (length > 8)
2491 return 0;
78f8b424 2492
b0cf273e
JB
2493 return is_integer_like (type)
2494 || is_pointer_like (type)
2495 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
2496}
2497
78f8b424
JB
2498/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2499 word as required for the ABI. */
2500static LONGEST
2501extend_simple_arg (struct value *arg)
2502{
2503 struct type *type = VALUE_TYPE (arg);
2504
2505 /* Even structs get passed in the least significant bits of the
2506 register / memory word. It's not really right to extract them as
2507 an integer, but it does take care of the extension. */
2508 if (TYPE_UNSIGNED (type))
2509 return extract_unsigned_integer (VALUE_CONTENTS (arg),
2510 TYPE_LENGTH (type));
2511 else
2512 return extract_signed_integer (VALUE_CONTENTS (arg),
2513 TYPE_LENGTH (type));
2514}
2515
2516
78f8b424
JB
2517/* Return the alignment required by TYPE. */
2518static int
2519alignment_of (struct type *type)
2520{
2521 int alignment;
2522
2523 if (is_integer_like (type)
2524 || is_pointer_like (type)
2525 || TYPE_CODE (type) == TYPE_CODE_FLT)
2526 alignment = TYPE_LENGTH (type);
2527 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2528 || TYPE_CODE (type) == TYPE_CODE_UNION)
2529 {
2530 int i;
2531
2532 alignment = 1;
2533 for (i = 0; i < TYPE_NFIELDS (type); i++)
2534 {
2535 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2536
2537 if (field_alignment > alignment)
2538 alignment = field_alignment;
2539 }
2540 }
2541 else
2542 alignment = 1;
2543
2544 /* Check that everything we ever return is a power of two. Lots of
2545 code doesn't want to deal with aligning things to arbitrary
2546 boundaries. */
2547 gdb_assert ((alignment & (alignment - 1)) == 0);
2548
2549 return alignment;
2550}
2551
2552
2553/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2554 place to be passed to a function, as specified by the "GNU/Linux
2555 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2556
2557 SP is the current stack pointer. We must put arguments, links,
2558 padding, etc. whereever they belong, and return the new stack
2559 pointer value.
2560
2561 If STRUCT_RETURN is non-zero, then the function we're calling is
2562 going to return a structure by value; STRUCT_ADDR is the address of
2563 a block we've allocated for it on the stack.
2564
2565 Our caller has taken care of any type promotions needed to satisfy
2566 prototypes or the old K&R argument-passing rules. */
a78f21af 2567static CORE_ADDR
7d9b040b 2568s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2569 struct regcache *regcache, CORE_ADDR bp_addr,
2570 int nargs, struct value **args, CORE_ADDR sp,
2571 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2572{
b0cf273e
JB
2573 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2574 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2575 ULONGEST orig_sp;
78f8b424 2576 int i;
5769d3cd 2577
78f8b424
JB
2578 /* If the i'th argument is passed as a reference to a copy, then
2579 copy_addr[i] is the address of the copy we made. */
2580 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2581
78f8b424 2582 /* Build the reference-to-copy area. */
78f8b424
JB
2583 for (i = 0; i < nargs; i++)
2584 {
2585 struct value *arg = args[i];
2586 struct type *type = VALUE_TYPE (arg);
2587 unsigned length = TYPE_LENGTH (type);
5769d3cd 2588
b0cf273e 2589 if (s390_function_arg_pass_by_reference (type))
01c464e9 2590 {
78f8b424 2591 sp -= length;
5b03f266 2592 sp = align_down (sp, alignment_of (type));
78f8b424
JB
2593 write_memory (sp, VALUE_CONTENTS (arg), length);
2594 copy_addr[i] = sp;
01c464e9 2595 }
5769d3cd 2596 }
5769d3cd 2597
78f8b424
JB
2598 /* Reserve space for the parameter area. As a conservative
2599 simplification, we assume that everything will be passed on the
b0cf273e
JB
2600 stack. Since every argument larger than 8 bytes will be
2601 passed by reference, we use this simple upper bound. */
2602 sp -= nargs * 8;
78f8b424 2603
78f8b424
JB
2604 /* After all that, make sure it's still aligned on an eight-byte
2605 boundary. */
5b03f266 2606 sp = align_down (sp, 8);
78f8b424
JB
2607
2608 /* Finally, place the actual parameters, working from SP towards
2609 higher addresses. The code above is supposed to reserve enough
2610 space for this. */
2611 {
2612 int fr = 0;
2613 int gr = 2;
2614 CORE_ADDR starg = sp;
2615
b0cf273e 2616 /* A struct is returned using general register 2. */
4d819d0e 2617 if (struct_return)
b0cf273e
JB
2618 {
2619 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2620 struct_addr);
2621 gr++;
2622 }
4d819d0e 2623
78f8b424
JB
2624 for (i = 0; i < nargs; i++)
2625 {
2626 struct value *arg = args[i];
2627 struct type *type = VALUE_TYPE (arg);
b0cf273e
JB
2628 unsigned length = TYPE_LENGTH (type);
2629
2630 if (s390_function_arg_pass_by_reference (type))
2631 {
2632 if (gr <= 6)
2633 {
2634 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2635 copy_addr[i]);
2636 gr++;
2637 }
2638 else
2639 {
2640 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2641 starg += word_size;
2642 }
2643 }
2644 else if (s390_function_arg_float (type))
2645 {
2646 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2647 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2648 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2649 {
2650 /* When we store a single-precision value in an FP register,
2651 it occupies the leftmost bits. */
2652 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2653 0, length, VALUE_CONTENTS (arg));
2654 fr += 2;
2655 }
2656 else
2657 {
2658 /* When we store a single-precision value in a stack slot,
2659 it occupies the rightmost bits. */
2660 starg = align_up (starg + length, word_size);
2661 write_memory (starg - length, VALUE_CONTENTS (arg), length);
2662 }
2663 }
2664 else if (s390_function_arg_integer (type) && length <= word_size)
2665 {
2666 if (gr <= 6)
2667 {
2668 /* Integer arguments are always extended to word size. */
2669 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2670 extend_simple_arg (arg));
2671 gr++;
2672 }
2673 else
2674 {
2675 /* Integer arguments are always extended to word size. */
2676 write_memory_signed_integer (starg, word_size,
2677 extend_simple_arg (arg));
2678 starg += word_size;
2679 }
2680 }
2681 else if (s390_function_arg_integer (type) && length == 2*word_size)
2682 {
2683 if (gr <= 5)
2684 {
2685 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2686 VALUE_CONTENTS (arg));
2687 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2688 VALUE_CONTENTS (arg) + word_size);
2689 gr += 2;
2690 }
2691 else
2692 {
2693 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2694 in it, then don't go back and use it again later. */
2695 gr = 7;
2696
2697 write_memory (starg, VALUE_CONTENTS (arg), length);
2698 starg += length;
2699 }
2700 }
2701 else
2702 internal_error (__FILE__, __LINE__, "unknown argument type");
78f8b424
JB
2703 }
2704 }
2705
2706 /* Allocate the standard frame areas: the register save area, the
2707 word reserved for the compiler (which seems kind of meaningless),
2708 and the back chain pointer. */
b0cf273e 2709 sp -= 16*word_size + 32;
78f8b424
JB
2710
2711 /* Write the back chain pointer into the first word of the stack
b0cf273e
JB
2712 frame. This is needed to unwind across a dummy frame. */
2713 regcache_cooked_read_unsigned (regcache, S390_SP_REGNUM, &orig_sp);
2714 write_memory_unsigned_integer (sp, word_size, orig_sp);
2715
2716 /* Store return address. */
2717 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2718
2719 /* Store updated stack pointer. */
2720 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2721
a8c99f38
JB
2722 /* We need to return the 'stack part' of the frame ID,
2723 which is actually the top of the register save area
2724 allocated on the original stack. */
2725 return orig_sp + 16*word_size + 32;
5769d3cd
AC
2726}
2727
b0cf273e
JB
2728/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
2729 dummy frame. The frame ID's base needs to match the TOS value
2730 returned by push_dummy_call, and the PC match the dummy frame's
2731 breakpoint. */
2732static struct frame_id
2733s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2734{
a8c99f38
JB
2735 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2736 CORE_ADDR this_sp = s390_unwind_sp (gdbarch, next_frame);
2737 CORE_ADDR prev_sp = read_memory_unsigned_integer (this_sp, word_size);
2738
2739 return frame_id_build (prev_sp + 16*word_size + 32,
2740 frame_pc_unwind (next_frame));
b0cf273e 2741}
c8f9d51c 2742
4074e13c
JB
2743static CORE_ADDR
2744s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2745{
2746 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2747 always be aligned on an eight-byte boundary. */
2748 return (addr & -8);
2749}
2750
2751
b0cf273e
JB
2752/* Function return value access. */
2753
2754static enum return_value_convention
2755s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2756{
b0cf273e
JB
2757 int length = TYPE_LENGTH (type);
2758 if (length > 8)
2759 return RETURN_VALUE_STRUCT_CONVENTION;
2760
2761 switch (TYPE_CODE (type))
2762 {
2763 case TYPE_CODE_STRUCT:
2764 case TYPE_CODE_UNION:
2765 case TYPE_CODE_ARRAY:
2766 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2767
b0cf273e
JB
2768 default:
2769 return RETURN_VALUE_REGISTER_CONVENTION;
2770 }
c8f9d51c
JB
2771}
2772
b0cf273e
JB
2773static enum return_value_convention
2774s390_return_value (struct gdbarch *gdbarch, struct type *type,
2775 struct regcache *regcache, void *out, const void *in)
5769d3cd 2776{
b0cf273e
JB
2777 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2778 int length = TYPE_LENGTH (type);
2779 enum return_value_convention rvc =
2780 s390_return_value_convention (gdbarch, type);
2781 if (in)
2782 {
2783 switch (rvc)
2784 {
2785 case RETURN_VALUE_REGISTER_CONVENTION:
2786 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2787 {
2788 /* When we store a single-precision value in an FP register,
2789 it occupies the leftmost bits. */
2790 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2791 0, length, in);
2792 }
2793 else if (length <= word_size)
2794 {
2795 /* Integer arguments are always extended to word size. */
2796 if (TYPE_UNSIGNED (type))
2797 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2798 extract_unsigned_integer (in, length));
2799 else
2800 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2801 extract_signed_integer (in, length));
2802 }
2803 else if (length == 2*word_size)
2804 {
2805 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2806 regcache_cooked_write (regcache, S390_R3_REGNUM,
2807 (const char *)in + word_size);
2808 }
2809 else
2810 internal_error (__FILE__, __LINE__, "invalid return type");
2811 break;
2812
2813 case RETURN_VALUE_STRUCT_CONVENTION:
2814 error ("Cannot set function return value.");
2815 break;
2816 }
2817 }
2818 else if (out)
2819 {
2820 switch (rvc)
2821 {
2822 case RETURN_VALUE_REGISTER_CONVENTION:
2823 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2824 {
2825 /* When we store a single-precision value in an FP register,
2826 it occupies the leftmost bits. */
2827 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2828 0, length, out);
2829 }
2830 else if (length <= word_size)
2831 {
2832 /* Integer arguments occupy the rightmost bits. */
2833 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2834 word_size - length, length, out);
2835 }
2836 else if (length == 2*word_size)
2837 {
2838 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2839 regcache_cooked_read (regcache, S390_R3_REGNUM,
2840 (char *)out + word_size);
2841 }
2842 else
2843 internal_error (__FILE__, __LINE__, "invalid return type");
2844 break;
5769d3cd 2845
b0cf273e
JB
2846 case RETURN_VALUE_STRUCT_CONVENTION:
2847 error ("Function return value unknown.");
2848 break;
2849 }
2850 }
2851
2852 return rvc;
2853}
5769d3cd
AC
2854
2855
a8c99f38
JB
2856/* Breakpoints. */
2857
a78f21af 2858static const unsigned char *
5769d3cd
AC
2859s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
2860{
2861 static unsigned char breakpoint[] = { 0x0, 0x1 };
2862
2863 *lenptr = sizeof (breakpoint);
2864 return breakpoint;
2865}
2866
5769d3cd 2867
a8c99f38 2868/* Address handling. */
5769d3cd
AC
2869
2870static CORE_ADDR
2871s390_addr_bits_remove (CORE_ADDR addr)
2872{
a8c99f38 2873 return addr & 0x7fffffff;
5769d3cd
AC
2874}
2875
ffc65945
KB
2876static int
2877s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2878{
2879 if (byte_size == 4)
2880 return TYPE_FLAG_ADDRESS_CLASS_1;
2881 else
2882 return 0;
2883}
2884
2885static const char *
2886s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2887{
2888 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1)
2889 return "mode32";
2890 else
2891 return NULL;
2892}
2893
a78f21af 2894static int
ffc65945
KB
2895s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2896 int *type_flags_ptr)
2897{
2898 if (strcmp (name, "mode32") == 0)
2899 {
2900 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1;
2901 return 1;
2902 }
2903 else
2904 return 0;
2905}
2906
a8c99f38 2907
9cbd5950
JB
2908/* Link map offsets. */
2909
2910static struct link_map_offsets *
2911s390_svr4_fetch_link_map_offsets (void)
2912{
2913 static struct link_map_offsets lmo;
2914 static struct link_map_offsets *lmp = NULL;
2915
2916 if (lmp == NULL)
2917 {
2918 lmp = &lmo;
2919
2920 lmo.r_debug_size = 8;
2921
2922 lmo.r_map_offset = 4;
2923 lmo.r_map_size = 4;
2924
2925 lmo.link_map_size = 20;
2926
2927 lmo.l_addr_offset = 0;
2928 lmo.l_addr_size = 4;
2929
2930 lmo.l_name_offset = 4;
2931 lmo.l_name_size = 4;
2932
2933 lmo.l_next_offset = 12;
2934 lmo.l_next_size = 4;
2935
2936 lmo.l_prev_offset = 16;
2937 lmo.l_prev_size = 4;
2938 }
2939
2940 return lmp;
2941}
2942
2943static struct link_map_offsets *
2944s390x_svr4_fetch_link_map_offsets (void)
2945{
2946 static struct link_map_offsets lmo;
2947 static struct link_map_offsets *lmp = NULL;
2948
2949 if (lmp == NULL)
2950 {
2951 lmp = &lmo;
2952
2953 lmo.r_debug_size = 16; /* All we need. */
2954
2955 lmo.r_map_offset = 8;
2956 lmo.r_map_size = 8;
2957
2958 lmo.link_map_size = 40; /* All we need. */
2959
2960 lmo.l_addr_offset = 0;
2961 lmo.l_addr_size = 8;
2962
2963 lmo.l_name_offset = 8;
2964 lmo.l_name_size = 8;
2965
2966 lmo.l_next_offset = 24;
2967 lmo.l_next_size = 8;
2968
2969 lmo.l_prev_offset = 32;
2970 lmo.l_prev_size = 8;
2971 }
2972
2973 return lmp;
2974}
2975
2976
a8c99f38
JB
2977/* Set up gdbarch struct. */
2978
a78f21af 2979static struct gdbarch *
5769d3cd
AC
2980s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2981{
5769d3cd
AC
2982 struct gdbarch *gdbarch;
2983 struct gdbarch_tdep *tdep;
5769d3cd
AC
2984
2985 /* First see if there is already a gdbarch that can satisfy the request. */
2986 arches = gdbarch_list_lookup_by_info (arches, &info);
2987 if (arches != NULL)
2988 return arches->gdbarch;
2989
2990 /* None found: is the request for a s390 architecture? */
2991 if (info.bfd_arch_info->arch != bfd_arch_s390)
2992 return NULL; /* No; then it's not for us. */
2993
2994 /* Yes: create a new gdbarch for the specified machine type. */
d0f54f9d
JB
2995 tdep = XCALLOC (1, struct gdbarch_tdep);
2996 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
2997
2998 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 2999 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3000
aaab4dba
AC
3001 /* Amount PC must be decremented by after a breakpoint. This is
3002 often the number of bytes returned by BREAKPOINT_FROM_PC but not
3003 always. */
5769d3cd 3004 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3005 /* Stack grows downward. */
3006 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3007 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3008 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3009 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3010
5769d3cd
AC
3011 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
3012 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3013 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
5769d3cd 3014 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
d0f54f9d 3015 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
5769d3cd 3016 set_gdbarch_register_name (gdbarch, s390_register_name);
d0f54f9d
JB
3017 set_gdbarch_register_type (gdbarch, s390_register_type);
3018 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
3019 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
3020 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
3021 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p);
3022 set_gdbarch_register_to_value (gdbarch, s390_register_to_value);
3023 set_gdbarch_value_to_register (gdbarch, s390_value_to_register);
3024 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
3025 set_gdbarch_regset_from_core_section (gdbarch,
3026 s390_regset_from_core_section);
5769d3cd 3027
b0cf273e
JB
3028 /* Inferior function calls. */
3029 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
3030 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id);
4074e13c 3031 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3032 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3033
a8c99f38
JB
3034 /* Frame handling. */
3035 set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
a431654a
AC
3036 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
3037 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
3038 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
8e645ae7 3039 frame_unwind_append_sniffer (gdbarch, s390_stub_frame_sniffer);
a8c99f38
JB
3040 frame_unwind_append_sniffer (gdbarch, s390_sigtramp_frame_sniffer);
3041 frame_unwind_append_sniffer (gdbarch, s390_frame_sniffer);
3042 frame_base_set_default (gdbarch, &s390_frame_base);
3043 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3044 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3045
5769d3cd
AC
3046 switch (info.bfd_arch_info->mach)
3047 {
b8b8b047 3048 case bfd_mach_s390_31:
b0cf273e
JB
3049 tdep->abi = ABI_LINUX_S390;
3050
d0f54f9d
JB
3051 tdep->gregset = &s390_gregset;
3052 tdep->sizeof_gregset = s390_sizeof_gregset;
3053 tdep->fpregset = &s390_fpregset;
3054 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3055
3056 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
d0f54f9d
JB
3057 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3058 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
9cbd5950
JB
3059 set_solib_svr4_fetch_link_map_offsets (gdbarch,
3060 s390_svr4_fetch_link_map_offsets);
3061
5769d3cd 3062 break;
b8b8b047 3063 case bfd_mach_s390_64:
b0cf273e
JB
3064 tdep->abi = ABI_LINUX_ZSERIES;
3065
d0f54f9d
JB
3066 tdep->gregset = &s390x_gregset;
3067 tdep->sizeof_gregset = s390x_sizeof_gregset;
3068 tdep->fpregset = &s390_fpregset;
3069 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3070
3071 set_gdbarch_long_bit (gdbarch, 64);
3072 set_gdbarch_long_long_bit (gdbarch, 64);
3073 set_gdbarch_ptr_bit (gdbarch, 64);
d0f54f9d
JB
3074 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
3075 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
9cbd5950
JB
3076 set_solib_svr4_fetch_link_map_offsets (gdbarch,
3077 s390x_svr4_fetch_link_map_offsets);
ffc65945
KB
3078 set_gdbarch_address_class_type_flags (gdbarch,
3079 s390_address_class_type_flags);
3080 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3081 s390_address_class_type_flags_to_name);
3082 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3083 s390_address_class_name_to_type_flags);
5769d3cd
AC
3084 break;
3085 }
3086
36482093
AC
3087 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3088
5769d3cd
AC
3089 return gdbarch;
3090}
3091
3092
3093
a78f21af
AC
3094extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3095
5769d3cd 3096void
5ae5f592 3097_initialize_s390_tdep (void)
5769d3cd
AC
3098{
3099
3100 /* Hook us into the gdbarch mechanism. */
3101 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
5769d3cd 3102}
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