2013-09-13 Andreas Arnez <arnez@linux.vnet.ibm.com>
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
28e7fd62 3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
27#include "symtab.h"
28#include "target.h"
29#include "gdbcore.h"
30#include "gdbcmd.h"
5769d3cd 31#include "objfiles.h"
5769d3cd
AC
32#include "floatformat.h"
33#include "regcache.h"
a8c99f38
JB
34#include "trad-frame.h"
35#include "frame-base.h"
36#include "frame-unwind.h"
a431654a 37#include "dwarf2-frame.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
d0f54f9d 46#include "s390-tdep.h"
5769d3cd 47
55aa24fb
SDJ
48#include "stap-probe.h"
49#include "ax.h"
50#include "ax-gdb.h"
51#include "user-regs.h"
52#include "cli/cli-utils.h"
53#include <ctype.h>
54
7803799a 55#include "features/s390-linux32.c"
c642a434
UW
56#include "features/s390-linux32v1.c"
57#include "features/s390-linux32v2.c"
7803799a 58#include "features/s390-linux64.c"
c642a434
UW
59#include "features/s390-linux64v1.c"
60#include "features/s390-linux64v2.c"
7803799a 61#include "features/s390x-linux64.c"
c642a434
UW
62#include "features/s390x-linux64v1.c"
63#include "features/s390x-linux64v2.c"
7803799a 64
d0f54f9d
JB
65/* The tdep structure. */
66
67struct gdbarch_tdep
5769d3cd 68{
b0cf273e
JB
69 /* ABI version. */
70 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
71
7803799a
UW
72 /* Pseudo register numbers. */
73 int gpr_full_regnum;
74 int pc_regnum;
75 int cc_regnum;
76
d0f54f9d
JB
77 /* Core file register sets. */
78 const struct regset *gregset;
79 int sizeof_gregset;
80
81 const struct regset *fpregset;
82 int sizeof_fpregset;
83};
84
85
7803799a
UW
86/* ABI call-saved register information. */
87
88static int
89s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 90{
7803799a
UW
91 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
92
93 switch (tdep->abi)
6707b003 94 {
7803799a
UW
95 case ABI_LINUX_S390:
96 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
97 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
98 || regnum == S390_A0_REGNUM)
99 return 1;
6707b003 100
7803799a
UW
101 break;
102
103 case ABI_LINUX_ZSERIES:
104 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
105 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
106 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
107 return 1;
108
109 break;
110 }
111
112 return 0;
5769d3cd
AC
113}
114
c642a434
UW
115static int
116s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
117{
118 /* The last-break address is read-only. */
119 return regnum == S390_LAST_BREAK_REGNUM;
120}
121
122static void
123s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
124{
125 struct gdbarch *gdbarch = get_regcache_arch (regcache);
126 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
127
128 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
129
130 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
131 messing with the PC we just installed, if we happen to be within
132 an interrupted system call that the kernel wants to restart.
133
134 Note that after we return from the dummy call, the SYSTEM_CALL and
135 ORIG_R2 registers will be automatically restored, and the kernel
136 continues to restart the system call at this point. */
137 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
138 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
139}
140
7803799a 141
d0f54f9d
JB
142/* DWARF Register Mapping. */
143
2ccd1468 144static const short s390_dwarf_regmap[] =
d0f54f9d
JB
145{
146 /* General Purpose Registers. */
147 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
148 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
149 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
150 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
151
152 /* Floating Point Registers. */
153 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
154 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
155 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
156 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
157
158 /* Control Registers (not mapped). */
159 -1, -1, -1, -1, -1, -1, -1, -1,
160 -1, -1, -1, -1, -1, -1, -1, -1,
161
162 /* Access Registers. */
163 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
164 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
165 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
166 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
167
168 /* Program Status Word. */
169 S390_PSWM_REGNUM,
7803799a
UW
170 S390_PSWA_REGNUM,
171
172 /* GPR Lower Half Access. */
173 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
174 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
175 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
176 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 177
94eae614 178 /* GNU/Linux-specific registers (not mapped). */
c642a434 179 -1, -1, -1,
d0f54f9d
JB
180};
181
182/* Convert DWARF register number REG to the appropriate register
183 number used by GDB. */
a78f21af 184static int
d3f73121 185s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 186{
7803799a
UW
187 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
188
189 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
190 GPRs. Note that call frame information still refers to the 32-bit
191 lower halves, because s390_adjust_frame_regnum uses register numbers
192 66 .. 81 to access GPRs. */
193 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
194 return tdep->gpr_full_regnum + reg;
d0f54f9d 195
16aff9a6 196 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 197 return s390_dwarf_regmap[reg];
d0f54f9d 198
7803799a
UW
199 warning (_("Unmapped DWARF Register #%d encountered."), reg);
200 return -1;
201}
d0f54f9d 202
7803799a
UW
203/* Translate a .eh_frame register to DWARF register, or adjust a
204 .debug_frame register. */
205static int
206s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
207{
208 /* See s390_dwarf_reg_to_regnum for comments. */
209 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
210}
211
d0f54f9d 212
7803799a
UW
213/* Pseudo registers. */
214
2ccd1468
UW
215static int
216regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
217{
218 return (tdep->gpr_full_regnum != -1
219 && regnum >= tdep->gpr_full_regnum
220 && regnum <= tdep->gpr_full_regnum + 15);
221}
222
7803799a
UW
223static const char *
224s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 225{
7803799a 226 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 227
7803799a
UW
228 if (regnum == tdep->pc_regnum)
229 return "pc";
d0f54f9d 230
7803799a
UW
231 if (regnum == tdep->cc_regnum)
232 return "cc";
d0f54f9d 233
2ccd1468 234 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
235 {
236 static const char *full_name[] = {
237 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
238 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
239 };
240 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 241 }
7803799a
UW
242
243 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
244}
245
7803799a
UW
246static struct type *
247s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 248{
7803799a 249 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 250
7803799a
UW
251 if (regnum == tdep->pc_regnum)
252 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 253
7803799a
UW
254 if (regnum == tdep->cc_regnum)
255 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 256
2ccd1468 257 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
258 return builtin_type (gdbarch)->builtin_uint64;
259
260 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
261}
262
05d1431c 263static enum register_status
7803799a
UW
264s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
265 int regnum, gdb_byte *buf)
d0f54f9d 266{
7803799a 267 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 268 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 269 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
270 ULONGEST val;
271
7803799a 272 if (regnum == tdep->pc_regnum)
d0f54f9d 273 {
05d1431c
PA
274 enum register_status status;
275
276 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
277 if (status == REG_VALID)
278 {
279 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
280 val &= 0x7fffffff;
281 store_unsigned_integer (buf, regsize, byte_order, val);
282 }
283 return status;
7803799a 284 }
d0f54f9d 285
7803799a
UW
286 if (regnum == tdep->cc_regnum)
287 {
05d1431c
PA
288 enum register_status status;
289
290 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
291 if (status == REG_VALID)
292 {
293 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
294 val = (val >> 12) & 3;
295 else
296 val = (val >> 44) & 3;
297 store_unsigned_integer (buf, regsize, byte_order, val);
298 }
299 return status;
7803799a 300 }
d0f54f9d 301
2ccd1468 302 if (regnum_is_gpr_full (tdep, regnum))
7803799a 303 {
05d1431c 304 enum register_status status;
7803799a 305 ULONGEST val_upper;
05d1431c 306
7803799a
UW
307 regnum -= tdep->gpr_full_regnum;
308
05d1431c
PA
309 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
310 if (status == REG_VALID)
311 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
312 &val_upper);
313 if (status == REG_VALID)
314 {
315 val |= val_upper << 32;
316 store_unsigned_integer (buf, regsize, byte_order, val);
317 }
318 return status;
d0f54f9d 319 }
7803799a
UW
320
321 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
322}
323
324static void
7803799a
UW
325s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
326 int regnum, const gdb_byte *buf)
d0f54f9d 327{
7803799a 328 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 329 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 330 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
331 ULONGEST val, psw;
332
7803799a 333 if (regnum == tdep->pc_regnum)
d0f54f9d 334 {
7803799a
UW
335 val = extract_unsigned_integer (buf, regsize, byte_order);
336 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
337 {
338 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
339 val = (psw & 0x80000000) | (val & 0x7fffffff);
340 }
341 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
342 return;
343 }
d0f54f9d 344
7803799a
UW
345 if (regnum == tdep->cc_regnum)
346 {
347 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 348 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
349 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
350 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
351 else
352 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
353 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
354 return;
355 }
d0f54f9d 356
2ccd1468 357 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
358 {
359 regnum -= tdep->gpr_full_regnum;
360 val = extract_unsigned_integer (buf, regsize, byte_order);
361 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
362 val & 0xffffffff);
363 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
364 val >> 32);
365 return;
d0f54f9d 366 }
7803799a
UW
367
368 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
369}
370
371/* 'float' values are stored in the upper half of floating-point
372 registers, even though we are otherwise a big-endian platform. */
373
9acbedc0
UW
374static struct value *
375s390_value_from_register (struct type *type, int regnum,
376 struct frame_info *frame)
d0f54f9d 377{
9acbedc0 378 struct value *value = default_value_from_register (type, regnum, frame);
d0f54f9d 379
744a8059
SP
380 check_typedef (type);
381
382 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
383 && TYPE_LENGTH (type) < 8)
9acbedc0 384 set_value_offset (value, 0);
d0f54f9d 385
9acbedc0 386 return value;
d0f54f9d
JB
387}
388
389/* Register groups. */
390
a78f21af 391static int
7803799a
UW
392s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
393 struct reggroup *group)
d0f54f9d
JB
394{
395 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
396
d6db1fab
UW
397 /* We usually save/restore the whole PSW, which includes PC and CC.
398 However, some older gdbservers may not support saving/restoring
399 the whole PSW yet, and will return an XML register description
400 excluding those from the save/restore register groups. In those
401 cases, we still need to explicitly save/restore PC and CC in order
402 to push or pop frames. Since this doesn't hurt anything if we
403 already save/restore the whole PSW (it's just redundant), we add
404 PC and CC at this point unconditionally. */
d0f54f9d 405 if (group == save_reggroup || group == restore_reggroup)
7803799a 406 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
407
408 return default_register_reggroup_p (gdbarch, regnum, group);
409}
410
411
2ccd1468 412/* Maps for register sets. */
d0f54f9d 413
2ccd1468
UW
414const short s390_regmap_gregset[] =
415 {
416 0x00, S390_PSWM_REGNUM,
417 0x04, S390_PSWA_REGNUM,
418 0x08, S390_R0_REGNUM,
419 0x0c, S390_R1_REGNUM,
420 0x10, S390_R2_REGNUM,
421 0x14, S390_R3_REGNUM,
422 0x18, S390_R4_REGNUM,
423 0x1c, S390_R5_REGNUM,
424 0x20, S390_R6_REGNUM,
425 0x24, S390_R7_REGNUM,
426 0x28, S390_R8_REGNUM,
427 0x2c, S390_R9_REGNUM,
428 0x30, S390_R10_REGNUM,
429 0x34, S390_R11_REGNUM,
430 0x38, S390_R12_REGNUM,
431 0x3c, S390_R13_REGNUM,
432 0x40, S390_R14_REGNUM,
433 0x44, S390_R15_REGNUM,
434 0x48, S390_A0_REGNUM,
435 0x4c, S390_A1_REGNUM,
436 0x50, S390_A2_REGNUM,
437 0x54, S390_A3_REGNUM,
438 0x58, S390_A4_REGNUM,
439 0x5c, S390_A5_REGNUM,
440 0x60, S390_A6_REGNUM,
441 0x64, S390_A7_REGNUM,
442 0x68, S390_A8_REGNUM,
443 0x6c, S390_A9_REGNUM,
444 0x70, S390_A10_REGNUM,
445 0x74, S390_A11_REGNUM,
446 0x78, S390_A12_REGNUM,
447 0x7c, S390_A13_REGNUM,
448 0x80, S390_A14_REGNUM,
449 0x84, S390_A15_REGNUM,
450 0x88, S390_ORIG_R2_REGNUM,
451 -1, -1
452 };
d0f54f9d 453
2ccd1468
UW
454const short s390x_regmap_gregset[] =
455 {
456 0x00, S390_PSWM_REGNUM,
457 0x08, S390_PSWA_REGNUM,
458 0x10, S390_R0_REGNUM,
459 0x18, S390_R1_REGNUM,
460 0x20, S390_R2_REGNUM,
461 0x28, S390_R3_REGNUM,
462 0x30, S390_R4_REGNUM,
463 0x38, S390_R5_REGNUM,
464 0x40, S390_R6_REGNUM,
465 0x48, S390_R7_REGNUM,
466 0x50, S390_R8_REGNUM,
467 0x58, S390_R9_REGNUM,
468 0x60, S390_R10_REGNUM,
469 0x68, S390_R11_REGNUM,
470 0x70, S390_R12_REGNUM,
471 0x78, S390_R13_REGNUM,
472 0x80, S390_R14_REGNUM,
473 0x88, S390_R15_REGNUM,
474 0x90, S390_A0_REGNUM,
475 0x94, S390_A1_REGNUM,
476 0x98, S390_A2_REGNUM,
477 0x9c, S390_A3_REGNUM,
478 0xa0, S390_A4_REGNUM,
479 0xa4, S390_A5_REGNUM,
480 0xa8, S390_A6_REGNUM,
481 0xac, S390_A7_REGNUM,
482 0xb0, S390_A8_REGNUM,
483 0xb4, S390_A9_REGNUM,
484 0xb8, S390_A10_REGNUM,
485 0xbc, S390_A11_REGNUM,
486 0xc0, S390_A12_REGNUM,
487 0xc4, S390_A13_REGNUM,
488 0xc8, S390_A14_REGNUM,
489 0xcc, S390_A15_REGNUM,
490 0x10, S390_R0_UPPER_REGNUM,
491 0x18, S390_R1_UPPER_REGNUM,
492 0x20, S390_R2_UPPER_REGNUM,
493 0x28, S390_R3_UPPER_REGNUM,
494 0x30, S390_R4_UPPER_REGNUM,
495 0x38, S390_R5_UPPER_REGNUM,
496 0x40, S390_R6_UPPER_REGNUM,
497 0x48, S390_R7_UPPER_REGNUM,
498 0x50, S390_R8_UPPER_REGNUM,
499 0x58, S390_R9_UPPER_REGNUM,
500 0x60, S390_R10_UPPER_REGNUM,
501 0x68, S390_R11_UPPER_REGNUM,
502 0x70, S390_R12_UPPER_REGNUM,
503 0x78, S390_R13_UPPER_REGNUM,
504 0x80, S390_R14_UPPER_REGNUM,
505 0x88, S390_R15_UPPER_REGNUM,
506 0xd0, S390_ORIG_R2_REGNUM,
507 -1, -1
508 };
d0f54f9d 509
2ccd1468
UW
510const short s390_regmap_fpregset[] =
511 {
512 0x00, S390_FPC_REGNUM,
513 0x08, S390_F0_REGNUM,
514 0x10, S390_F1_REGNUM,
515 0x18, S390_F2_REGNUM,
516 0x20, S390_F3_REGNUM,
517 0x28, S390_F4_REGNUM,
518 0x30, S390_F5_REGNUM,
519 0x38, S390_F6_REGNUM,
520 0x40, S390_F7_REGNUM,
521 0x48, S390_F8_REGNUM,
522 0x50, S390_F9_REGNUM,
523 0x58, S390_F10_REGNUM,
524 0x60, S390_F11_REGNUM,
525 0x68, S390_F12_REGNUM,
526 0x70, S390_F13_REGNUM,
527 0x78, S390_F14_REGNUM,
528 0x80, S390_F15_REGNUM,
529 -1, -1
530 };
7803799a 531
2ccd1468
UW
532const short s390_regmap_upper[] =
533 {
534 0x00, S390_R0_UPPER_REGNUM,
535 0x04, S390_R1_UPPER_REGNUM,
536 0x08, S390_R2_UPPER_REGNUM,
537 0x0c, S390_R3_UPPER_REGNUM,
538 0x10, S390_R4_UPPER_REGNUM,
539 0x14, S390_R5_UPPER_REGNUM,
540 0x18, S390_R6_UPPER_REGNUM,
541 0x1c, S390_R7_UPPER_REGNUM,
542 0x20, S390_R8_UPPER_REGNUM,
543 0x24, S390_R9_UPPER_REGNUM,
544 0x28, S390_R10_UPPER_REGNUM,
545 0x2c, S390_R11_UPPER_REGNUM,
546 0x30, S390_R12_UPPER_REGNUM,
547 0x34, S390_R13_UPPER_REGNUM,
548 0x38, S390_R14_UPPER_REGNUM,
549 0x3c, S390_R15_UPPER_REGNUM,
550 -1, -1
551 };
c642a434 552
2ccd1468
UW
553const short s390_regmap_last_break[] =
554 {
555 0x04, S390_LAST_BREAK_REGNUM,
556 -1, -1
557 };
558
559const short s390x_regmap_last_break[] =
560 {
561 0x00, S390_LAST_BREAK_REGNUM,
562 -1, -1
563 };
564
565const short s390_regmap_system_call[] =
566 {
567 0x00, S390_SYSTEM_CALL_REGNUM,
568 -1, -1
569 };
c642a434 570
c642a434 571
d0f54f9d
JB
572
573/* Supply register REGNUM from the register set REGSET to register cache
574 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
575static void
576s390_supply_regset (const struct regset *regset, struct regcache *regcache,
577 int regnum, const void *regs, size_t len)
578{
2ccd1468
UW
579 const short *map;
580 for (map = regset->descr; map[0] >= 0; map += 2)
581 if (regnum == -1 || regnum == map[1])
582 regcache_raw_supply (regcache, map[1], (const char *)regs + map[0]);
d0f54f9d
JB
583}
584
92f38ec2
UW
585/* Collect register REGNUM from the register cache REGCACHE and store
586 it in the buffer specified by REGS and LEN as described by the
587 general-purpose register set REGSET. If REGNUM is -1, do this for
588 all registers in REGSET. */
589static void
590s390_collect_regset (const struct regset *regset,
591 const struct regcache *regcache,
592 int regnum, void *regs, size_t len)
593{
2ccd1468
UW
594 const short *map;
595 for (map = regset->descr; map[0] >= 0; map += 2)
596 if (regnum == -1 || regnum == map[1])
597 regcache_raw_collect (regcache, map[1], (char *)regs + map[0]);
92f38ec2
UW
598}
599
d0f54f9d
JB
600static const struct regset s390_gregset = {
601 s390_regmap_gregset,
92f38ec2
UW
602 s390_supply_regset,
603 s390_collect_regset
d0f54f9d
JB
604};
605
606static const struct regset s390x_gregset = {
607 s390x_regmap_gregset,
92f38ec2
UW
608 s390_supply_regset,
609 s390_collect_regset
d0f54f9d
JB
610};
611
612static const struct regset s390_fpregset = {
613 s390_regmap_fpregset,
92f38ec2
UW
614 s390_supply_regset,
615 s390_collect_regset
d0f54f9d
JB
616};
617
7803799a
UW
618static const struct regset s390_upper_regset = {
619 s390_regmap_upper,
620 s390_supply_regset,
621 s390_collect_regset
622};
623
c642a434
UW
624static const struct regset s390_last_break_regset = {
625 s390_regmap_last_break,
626 s390_supply_regset,
627 s390_collect_regset
628};
629
630static const struct regset s390x_last_break_regset = {
631 s390x_regmap_last_break,
632 s390_supply_regset,
633 s390_collect_regset
634};
635
636static const struct regset s390_system_call_regset = {
637 s390_regmap_system_call,
638 s390_supply_regset,
639 s390_collect_regset
640};
641
642static struct core_regset_section s390_linux32_regset_sections[] =
643{
644 { ".reg", s390_sizeof_gregset, "general-purpose" },
645 { ".reg2", s390_sizeof_fpregset, "floating-point" },
646 { NULL, 0}
647};
648
649static struct core_regset_section s390_linux32v1_regset_sections[] =
650{
651 { ".reg", s390_sizeof_gregset, "general-purpose" },
652 { ".reg2", s390_sizeof_fpregset, "floating-point" },
653 { ".reg-s390-last-break", 8, "s390 last-break address" },
654 { NULL, 0}
655};
656
657static struct core_regset_section s390_linux32v2_regset_sections[] =
658{
659 { ".reg", s390_sizeof_gregset, "general-purpose" },
660 { ".reg2", s390_sizeof_fpregset, "floating-point" },
661 { ".reg-s390-last-break", 8, "s390 last-break address" },
662 { ".reg-s390-system-call", 4, "s390 system-call" },
663 { NULL, 0}
664};
665
666static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
667{
668 { ".reg", s390_sizeof_gregset, "general-purpose" },
669 { ".reg2", s390_sizeof_fpregset, "floating-point" },
670 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
671 { NULL, 0}
672};
673
c642a434
UW
674static struct core_regset_section s390_linux64v1_regset_sections[] =
675{
676 { ".reg", s390_sizeof_gregset, "general-purpose" },
677 { ".reg2", s390_sizeof_fpregset, "floating-point" },
678 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
679 { ".reg-s390-last-break", 8, "s930 last-break address" },
680 { NULL, 0}
681};
682
683static struct core_regset_section s390_linux64v2_regset_sections[] =
684{
685 { ".reg", s390_sizeof_gregset, "general-purpose" },
686 { ".reg2", s390_sizeof_fpregset, "floating-point" },
687 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
688 { ".reg-s390-last-break", 8, "s930 last-break address" },
689 { ".reg-s390-system-call", 4, "s390 system-call" },
690 { NULL, 0}
691};
692
693static struct core_regset_section s390x_linux64_regset_sections[] =
694{
695 { ".reg", s390x_sizeof_gregset, "general-purpose" },
696 { ".reg2", s390_sizeof_fpregset, "floating-point" },
697 { NULL, 0}
698};
699
700static struct core_regset_section s390x_linux64v1_regset_sections[] =
701{
702 { ".reg", s390x_sizeof_gregset, "general-purpose" },
703 { ".reg2", s390_sizeof_fpregset, "floating-point" },
704 { ".reg-s390-last-break", 8, "s930 last-break address" },
705 { NULL, 0}
706};
707
708static struct core_regset_section s390x_linux64v2_regset_sections[] =
709{
710 { ".reg", s390x_sizeof_gregset, "general-purpose" },
711 { ".reg2", s390_sizeof_fpregset, "floating-point" },
712 { ".reg-s390-last-break", 8, "s930 last-break address" },
713 { ".reg-s390-system-call", 4, "s390 system-call" },
714 { NULL, 0}
715};
716
717
d0f54f9d
JB
718/* Return the appropriate register set for the core section identified
719 by SECT_NAME and SECT_SIZE. */
63807e1d 720static const struct regset *
d0f54f9d
JB
721s390_regset_from_core_section (struct gdbarch *gdbarch,
722 const char *sect_name, size_t sect_size)
723{
724 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
725
e31dcd20 726 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
727 return tdep->gregset;
728
e31dcd20 729 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
730 return tdep->fpregset;
731
7803799a
UW
732 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
733 return &s390_upper_regset;
734
c642a434
UW
735 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
736 return (gdbarch_ptr_bit (gdbarch) == 32
737 ? &s390_last_break_regset : &s390x_last_break_regset);
738
739 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
740 return &s390_system_call_regset;
741
d0f54f9d 742 return NULL;
5769d3cd
AC
743}
744
7803799a
UW
745static const struct target_desc *
746s390_core_read_description (struct gdbarch *gdbarch,
747 struct target_ops *target, bfd *abfd)
748{
749 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
750 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
751 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a
UW
752 asection *section = bfd_get_section_by_name (abfd, ".reg");
753 if (!section)
754 return NULL;
755
756 switch (bfd_section_size (abfd, section))
757 {
758 case s390_sizeof_gregset:
c642a434
UW
759 if (high_gprs)
760 return (v2? tdesc_s390_linux64v2 :
761 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
762 else
763 return (v2? tdesc_s390_linux32v2 :
764 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
765
766 case s390x_sizeof_gregset:
c642a434
UW
767 return (v2? tdesc_s390x_linux64v2 :
768 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
769
770 default:
771 return NULL;
772 }
773}
774
d0f54f9d 775
4bc8c588
JB
776/* Decoding S/390 instructions. */
777
778/* Named opcode values for the S/390 instructions we recognize. Some
779 instructions have their opcode split across two fields; those are the
780 op1_* and op2_* enums. */
781enum
782 {
a8c99f38
JB
783 op1_lhi = 0xa7, op2_lhi = 0x08,
784 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 785 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 786 op_lr = 0x18,
a8c99f38
JB
787 op_lgr = 0xb904,
788 op_l = 0x58,
789 op1_ly = 0xe3, op2_ly = 0x58,
790 op1_lg = 0xe3, op2_lg = 0x04,
791 op_lm = 0x98,
792 op1_lmy = 0xeb, op2_lmy = 0x98,
793 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 794 op_st = 0x50,
a8c99f38 795 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 796 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 797 op_std = 0x60,
4bc8c588 798 op_stm = 0x90,
a8c99f38 799 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 800 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
801 op1_aghi = 0xa7, op2_aghi = 0x0b,
802 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
803 op1_agfi = 0xc2, op2_agfi = 0x08,
804 op1_afi = 0xc2, op2_afi = 0x09,
805 op1_algfi= 0xc2, op2_algfi= 0x0a,
806 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
807 op_ar = 0x1a,
808 op_agr = 0xb908,
809 op_a = 0x5a,
810 op1_ay = 0xe3, op2_ay = 0x5a,
811 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
812 op1_slgfi= 0xc2, op2_slgfi= 0x04,
813 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
814 op_sr = 0x1b,
815 op_sgr = 0xb909,
816 op_s = 0x5b,
817 op1_sy = 0xe3, op2_sy = 0x5b,
818 op1_sg = 0xe3, op2_sg = 0x09,
819 op_nr = 0x14,
820 op_ngr = 0xb980,
821 op_la = 0x41,
822 op1_lay = 0xe3, op2_lay = 0x71,
823 op1_larl = 0xc0, op2_larl = 0x00,
824 op_basr = 0x0d,
825 op_bas = 0x4d,
826 op_bcr = 0x07,
827 op_bc = 0x0d,
1db4e8a0
UW
828 op_bctr = 0x06,
829 op_bctgr = 0xb946,
830 op_bct = 0x46,
831 op1_bctg = 0xe3, op2_bctg = 0x46,
832 op_bxh = 0x86,
833 op1_bxhg = 0xeb, op2_bxhg = 0x44,
834 op_bxle = 0x87,
835 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
836 op1_bras = 0xa7, op2_bras = 0x05,
837 op1_brasl= 0xc0, op2_brasl= 0x05,
838 op1_brc = 0xa7, op2_brc = 0x04,
839 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
840 op1_brct = 0xa7, op2_brct = 0x06,
841 op1_brctg= 0xa7, op2_brctg= 0x07,
842 op_brxh = 0x84,
843 op1_brxhg= 0xec, op2_brxhg= 0x44,
844 op_brxle = 0x85,
845 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
846 };
847
848
a8c99f38
JB
849/* Read a single instruction from address AT. */
850
851#define S390_MAX_INSTR_SIZE 6
852static int
853s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
854{
855 static int s390_instrlen[] = { 2, 4, 4, 6 };
856 int instrlen;
857
8defab1a 858 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
859 return -1;
860 instrlen = s390_instrlen[instr[0] >> 6];
861 if (instrlen > 2)
862 {
8defab1a 863 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
864 return -1;
865 }
866 return instrlen;
867}
868
869
4bc8c588
JB
870/* The functions below are for recognizing and decoding S/390
871 instructions of various formats. Each of them checks whether INSN
872 is an instruction of the given format, with the specified opcodes.
873 If it is, it sets the remaining arguments to the values of the
874 instruction's fields, and returns a non-zero value; otherwise, it
875 returns zero.
876
877 These functions' arguments appear in the order they appear in the
878 instruction, not in the machine-language form. So, opcodes always
879 come first, even though they're sometimes scattered around the
880 instructions. And displacements appear before base and extension
881 registers, as they do in the assembly syntax, not at the end, as
882 they do in the machine language. */
a78f21af 883static int
4bc8c588
JB
884is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
885{
886 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
887 {
888 *r1 = (insn[1] >> 4) & 0xf;
889 /* i2 is a 16-bit signed quantity. */
890 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
891 return 1;
892 }
893 else
894 return 0;
895}
8ac0e65a 896
5769d3cd 897
4bc8c588
JB
898static int
899is_ril (bfd_byte *insn, int op1, int op2,
900 unsigned int *r1, int *i2)
901{
902 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
903 {
904 *r1 = (insn[1] >> 4) & 0xf;
905 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
906 no sign extension is necessary, but we don't want to assume
907 that. */
908 *i2 = (((insn[2] << 24)
909 | (insn[3] << 16)
910 | (insn[4] << 8)
911 | (insn[5])) ^ 0x80000000) - 0x80000000;
912 return 1;
913 }
914 else
915 return 0;
916}
917
918
919static int
920is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
921{
922 if (insn[0] == op)
923 {
924 *r1 = (insn[1] >> 4) & 0xf;
925 *r2 = insn[1] & 0xf;
926 return 1;
927 }
928 else
929 return 0;
930}
931
932
933static int
934is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
935{
936 if (((insn[0] << 8) | insn[1]) == op)
937 {
938 /* Yes, insn[3]. insn[2] is unused in RRE format. */
939 *r1 = (insn[3] >> 4) & 0xf;
940 *r2 = insn[3] & 0xf;
941 return 1;
942 }
943 else
944 return 0;
945}
946
947
948static int
949is_rs (bfd_byte *insn, int op,
eb1bd1fb 950 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
951{
952 if (insn[0] == op)
953 {
954 *r1 = (insn[1] >> 4) & 0xf;
955 *r3 = insn[1] & 0xf;
956 *b2 = (insn[2] >> 4) & 0xf;
957 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
958 return 1;
959 }
960 else
961 return 0;
962}
963
964
965static int
a8c99f38 966is_rsy (bfd_byte *insn, int op1, int op2,
eb1bd1fb 967 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
968{
969 if (insn[0] == op1
4bc8c588
JB
970 && insn[5] == op2)
971 {
972 *r1 = (insn[1] >> 4) & 0xf;
973 *r3 = insn[1] & 0xf;
974 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
975 /* The 'long displacement' is a 20-bit signed integer. */
976 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
977 ^ 0x80000) - 0x80000;
4bc8c588
JB
978 return 1;
979 }
980 else
981 return 0;
982}
983
984
1db4e8a0
UW
985static int
986is_rsi (bfd_byte *insn, int op,
987 unsigned int *r1, unsigned int *r3, int *i2)
988{
989 if (insn[0] == op)
990 {
991 *r1 = (insn[1] >> 4) & 0xf;
992 *r3 = insn[1] & 0xf;
993 /* i2 is a 16-bit signed quantity. */
994 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
995 return 1;
996 }
997 else
998 return 0;
999}
1000
1001
1002static int
1003is_rie (bfd_byte *insn, int op1, int op2,
1004 unsigned int *r1, unsigned int *r3, int *i2)
1005{
1006 if (insn[0] == op1
1007 && insn[5] == op2)
1008 {
1009 *r1 = (insn[1] >> 4) & 0xf;
1010 *r3 = insn[1] & 0xf;
1011 /* i2 is a 16-bit signed quantity. */
1012 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1013 return 1;
1014 }
1015 else
1016 return 0;
1017}
1018
1019
4bc8c588
JB
1020static int
1021is_rx (bfd_byte *insn, int op,
eb1bd1fb 1022 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1023{
1024 if (insn[0] == op)
1025 {
1026 *r1 = (insn[1] >> 4) & 0xf;
1027 *x2 = insn[1] & 0xf;
1028 *b2 = (insn[2] >> 4) & 0xf;
1029 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1030 return 1;
1031 }
1032 else
1033 return 0;
1034}
1035
1036
1037static int
a8c99f38 1038is_rxy (bfd_byte *insn, int op1, int op2,
eb1bd1fb 1039 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1040{
1041 if (insn[0] == op1
4bc8c588
JB
1042 && insn[5] == op2)
1043 {
1044 *r1 = (insn[1] >> 4) & 0xf;
1045 *x2 = insn[1] & 0xf;
1046 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1047 /* The 'long displacement' is a 20-bit signed integer. */
1048 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1049 ^ 0x80000) - 0x80000;
4bc8c588
JB
1050 return 1;
1051 }
1052 else
1053 return 0;
1054}
1055
1056
3fc46200 1057/* Prologue analysis. */
4bc8c588 1058
d0f54f9d
JB
1059#define S390_NUM_GPRS 16
1060#define S390_NUM_FPRS 16
4bc8c588 1061
a8c99f38
JB
1062struct s390_prologue_data {
1063
ee1b3323
UW
1064 /* The stack. */
1065 struct pv_area *stack;
1066
e17a4113 1067 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1068 int gpr_size;
1069 int fpr_size;
e17a4113 1070 enum bfd_endian byte_order;
a8c99f38
JB
1071
1072 /* The general-purpose registers. */
3fc46200 1073 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1074
1075 /* The floating-point registers. */
3fc46200 1076 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1077
121d8485
UW
1078 /* The offset relative to the CFA where the incoming GPR N was saved
1079 by the function prologue. 0 if not saved or unknown. */
1080 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1081
121d8485
UW
1082 /* Likewise for FPRs. */
1083 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1084
121d8485
UW
1085 /* Nonzero if the backchain was saved. This is assumed to be the
1086 case when the incoming SP is saved at the current SP location. */
1087 int back_chain_saved_p;
1088};
4bc8c588 1089
3fc46200
UW
1090/* Return the effective address for an X-style instruction, like:
1091
1092 L R1, D2(X2, B2)
1093
1094 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1095 constant; the effective address is the sum of all three. If either
1096 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1097 means that r0 can't be used as either X2 or B2. */
1098static pv_t
1099s390_addr (struct s390_prologue_data *data,
1100 int d2, unsigned int x2, unsigned int b2)
1101{
1102 pv_t result;
1103
1104 result = pv_constant (d2);
1105 if (x2)
1106 result = pv_add (result, data->gpr[x2]);
1107 if (b2)
1108 result = pv_add (result, data->gpr[b2]);
1109
1110 return result;
1111}
1112
1113/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1114static void
3fc46200
UW
1115s390_store (struct s390_prologue_data *data,
1116 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1117 pv_t value)
4bc8c588 1118{
3fc46200 1119 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1120 pv_t offset;
121d8485
UW
1121
1122 /* Check whether we are storing the backchain. */
3fc46200 1123 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1124
3fc46200 1125 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1126 if (size == data->gpr_size
3fc46200 1127 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1128 {
1129 data->back_chain_saved_p = 1;
1130 return;
1131 }
1132
1133
1134 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1135 if (!pv_area_store_would_trash (data->stack, addr))
1136 pv_area_store (data->stack, addr, size, value);
4bc8c588 1137
a8c99f38 1138
121d8485
UW
1139 /* Note: If this is some store we cannot identify, you might think we
1140 should forget our cached values, as any of those might have been hit.
1141
1142 However, we make the assumption that the register save areas are only
1143 ever stored to once in any given function, and we do recognize these
1144 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1145}
4bc8c588 1146
3fc46200
UW
1147/* Do a SIZE-byte load from D2(X2,B2). */
1148static pv_t
1149s390_load (struct s390_prologue_data *data,
1150 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1151
4bc8c588 1152{
3fc46200 1153 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1154
a8c99f38
JB
1155 /* If it's a load from an in-line constant pool, then we can
1156 simulate that, under the assumption that the code isn't
1157 going to change between the time the processor actually
1158 executed it creating the current frame, and the time when
1159 we're analyzing the code to unwind past that frame. */
3fc46200 1160 if (pv_is_constant (addr))
4bc8c588 1161 {
0542c86d 1162 struct target_section *secp;
3fc46200 1163 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1164 if (secp != NULL
57e6060e
DE
1165 && (bfd_get_section_flags (secp->the_bfd_section->owner,
1166 secp->the_bfd_section)
a8c99f38 1167 & SEC_READONLY))
e17a4113
UW
1168 return pv_constant (read_memory_integer (addr.k, size,
1169 data->byte_order));
a8c99f38 1170 }
7666f43c 1171
121d8485 1172 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1173 return pv_area_fetch (data->stack, addr, size);
1174}
121d8485 1175
ee1b3323
UW
1176/* Function for finding saved registers in a 'struct pv_area'; we pass
1177 this to pv_area_scan.
121d8485 1178
ee1b3323
UW
1179 If VALUE is a saved register, ADDR says it was saved at a constant
1180 offset from the frame base, and SIZE indicates that the whole
1181 register was saved, record its offset in the reg_offset table in
1182 PROLOGUE_UNTYPED. */
1183static void
c378eb4e
MS
1184s390_check_for_saved (void *data_untyped, pv_t addr,
1185 CORE_ADDR size, pv_t value)
ee1b3323
UW
1186{
1187 struct s390_prologue_data *data = data_untyped;
1188 int i, offset;
1189
1190 if (!pv_is_register (addr, S390_SP_REGNUM))
1191 return;
1192
1193 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1194
ee1b3323
UW
1195 /* If we are storing the original value of a register, we want to
1196 record the CFA offset. If the same register is stored multiple
1197 times, the stack slot with the highest address counts. */
1198
1199 for (i = 0; i < S390_NUM_GPRS; i++)
1200 if (size == data->gpr_size
1201 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1202 if (data->gpr_slot[i] == 0
1203 || data->gpr_slot[i] > offset)
1204 {
1205 data->gpr_slot[i] = offset;
1206 return;
1207 }
1208
1209 for (i = 0; i < S390_NUM_FPRS; i++)
1210 if (size == data->fpr_size
1211 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1212 if (data->fpr_slot[i] == 0
1213 || data->fpr_slot[i] > offset)
1214 {
1215 data->fpr_slot[i] = offset;
1216 return;
1217 }
a8c99f38 1218}
4bc8c588 1219
a8c99f38
JB
1220/* Analyze the prologue of the function starting at START_PC,
1221 continuing at most until CURRENT_PC. Initialize DATA to
1222 hold all information we find out about the state of the registers
1223 and stack slots. Return the address of the instruction after
1224 the last one that changed the SP, FP, or back chain; or zero
1225 on error. */
1226static CORE_ADDR
1227s390_analyze_prologue (struct gdbarch *gdbarch,
1228 CORE_ADDR start_pc,
1229 CORE_ADDR current_pc,
1230 struct s390_prologue_data *data)
4bc8c588 1231{
a8c99f38
JB
1232 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1233
4bc8c588 1234 /* Our return value:
a8c99f38
JB
1235 The address of the instruction after the last one that changed
1236 the SP, FP, or back chain; zero if we got an error trying to
1237 read memory. */
1238 CORE_ADDR result = start_pc;
4bc8c588 1239
4bc8c588
JB
1240 /* The current PC for our abstract interpretation. */
1241 CORE_ADDR pc;
1242
1243 /* The address of the next instruction after that. */
1244 CORE_ADDR next_pc;
1245
4bc8c588
JB
1246 /* Set up everything's initial value. */
1247 {
1248 int i;
1249
55f960e1 1250 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1251
a8c99f38
JB
1252 /* For the purpose of prologue tracking, we consider the GPR size to
1253 be equal to the ABI word size, even if it is actually larger
1254 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1255 data->gpr_size = word_size;
1256 data->fpr_size = 8;
e17a4113 1257 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1258
4bc8c588 1259 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1260 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1261
1262 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1263 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1264
121d8485
UW
1265 for (i = 0; i < S390_NUM_GPRS; i++)
1266 data->gpr_slot[i] = 0;
1267
1268 for (i = 0; i < S390_NUM_FPRS; i++)
1269 data->fpr_slot[i] = 0;
4bc8c588 1270
121d8485 1271 data->back_chain_saved_p = 0;
4bc8c588
JB
1272 }
1273
a8c99f38
JB
1274 /* Start interpreting instructions, until we hit the frame's
1275 current PC or the first branch instruction. */
1276 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1277 {
4bc8c588 1278 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1279 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1280
3fc46200
UW
1281 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1282 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1283 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1284
4bc8c588 1285 /* Fields for various kinds of instructions. */
a8c99f38
JB
1286 unsigned int b2, r1, r2, x2, r3;
1287 int i2, d2;
4bc8c588 1288
121d8485 1289 /* The values of SP and FP before this instruction,
4bc8c588 1290 for detecting instructions that change them. */
3fc46200 1291 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1292 /* Likewise for the flag whether the back chain was saved. */
1293 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1294
1295 /* If we got an error trying to read the instruction, report it. */
1296 if (insn_len < 0)
8ac0e65a 1297 {
a8c99f38 1298 result = 0;
4bc8c588
JB
1299 break;
1300 }
1301
1302 next_pc = pc + insn_len;
1303
a8c99f38
JB
1304 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1305 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1306 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1307
4bc8c588 1308
3fc46200
UW
1309 /* LHI r1, i2 --- load halfword immediate. */
1310 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1311 /* LGFI r1, i2 --- load fullword immediate. */
1312 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1313 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1314 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1315 data->gpr[r1] = pv_constant (i2);
1316
1317 /* LR r1, r2 --- load from register. */
1318 /* LGR r1, r2 --- load from register (64-bit version). */
1319 else if (is_rr (insn32, op_lr, &r1, &r2)
1320 || is_rre (insn64, op_lgr, &r1, &r2))
1321 data->gpr[r1] = data->gpr[r2];
1322
1323 /* L r1, d2(x2, b2) --- load. */
1324 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1325 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1326 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1327 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1328 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1329 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1330
1331 /* ST r1, d2(x2, b2) --- store. */
1332 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1333 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1334 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1335 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1336 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1337 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1338
1339 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1340 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1341 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1342
1343 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1344 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1345 version). */
3fc46200
UW
1346 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1347 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1348 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1349 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1350 {
3fc46200
UW
1351 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1352 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1353 }
1354
3fc46200
UW
1355 /* AHI r1, i2 --- add halfword immediate. */
1356 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1357 /* AFI r1, i2 --- add fullword immediate. */
1358 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1359 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1360 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1361 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1362 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1363 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1364
1365 /* ALFI r1, i2 --- add logical immediate. */
1366 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1367 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1368 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1369 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1370 (CORE_ADDR)i2 & 0xffffffff);
1371
1372 /* AR r1, r2 -- add register. */
1373 /* AGR r1, r2 -- add register (64-bit version). */
1374 else if (is_rr (insn32, op_ar, &r1, &r2)
1375 || is_rre (insn64, op_agr, &r1, &r2))
1376 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1377
1378 /* A r1, d2(x2, b2) -- add. */
1379 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1380 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1381 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1382 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1383 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1384 data->gpr[r1] = pv_add (data->gpr[r1],
1385 s390_load (data, d2, x2, b2, data->gpr_size));
1386
1387 /* SLFI r1, i2 --- subtract logical immediate. */
1388 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1389 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1390 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1391 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1392 -((CORE_ADDR)i2 & 0xffffffff));
1393
1394 /* SR r1, r2 -- subtract register. */
1395 /* SGR r1, r2 -- subtract register (64-bit version). */
1396 else if (is_rr (insn32, op_sr, &r1, &r2)
1397 || is_rre (insn64, op_sgr, &r1, &r2))
1398 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1399
1400 /* S r1, d2(x2, b2) -- subtract. */
1401 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1402 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1403 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1404 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1405 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1406 data->gpr[r1] = pv_subtract (data->gpr[r1],
1407 s390_load (data, d2, x2, b2, data->gpr_size));
1408
1409 /* LA r1, d2(x2, b2) --- load address. */
1410 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1411 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1412 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1413 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1414
1415 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1416 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1417 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1418
3fc46200 1419 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1420 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1421 else if (is_rr (insn, op_basr, &r1, &r2)
1422 && r2 == 0)
3fc46200 1423 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1424
3fc46200 1425 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1426 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1427 {
3fc46200 1428 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1429 next_pc = pc + i2 * 2;
4bc8c588 1430
a8c99f38
JB
1431 /* We'd better not interpret any backward branches. We'll
1432 never terminate. */
1433 if (next_pc <= pc)
4bc8c588
JB
1434 break;
1435 }
1436
a8c99f38
JB
1437 /* Terminate search when hitting any other branch instruction. */
1438 else if (is_rr (insn, op_basr, &r1, &r2)
1439 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1440 || is_rr (insn, op_bcr, &r1, &r2)
1441 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1442 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1443 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1444 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1445 break;
1446
4bc8c588 1447 else
d4fb63e1
TT
1448 {
1449 /* An instruction we don't know how to simulate. The only
1450 safe thing to do would be to set every value we're tracking
1451 to 'unknown'. Instead, we'll be optimistic: we assume that
1452 we *can* interpret every instruction that the compiler uses
1453 to manipulate any of the data we're interested in here --
1454 then we can just ignore anything else. */
1455 }
4bc8c588
JB
1456
1457 /* Record the address after the last instruction that changed
1458 the FP, SP, or backlink. Ignore instructions that changed
1459 them back to their original values --- those are probably
1460 restore instructions. (The back chain is never restored,
1461 just popped.) */
1462 {
3fc46200
UW
1463 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1464 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1465
3fc46200
UW
1466 if ((! pv_is_identical (pre_insn_sp, sp)
1467 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1468 && sp.kind != pvk_unknown)
1469 || (! pv_is_identical (pre_insn_fp, fp)
1470 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1471 && fp.kind != pvk_unknown)
121d8485 1472 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1473 result = next_pc;
4bc8c588 1474 }
5769d3cd 1475 }
4bc8c588 1476
ee1b3323
UW
1477 /* Record where all the registers were saved. */
1478 pv_area_scan (data->stack, s390_check_for_saved, data);
1479
1480 free_pv_area (data->stack);
1481 data->stack = NULL;
1482
4bc8c588 1483 return result;
5769d3cd
AC
1484}
1485
a8c99f38
JB
1486/* Advance PC across any function entry prologue instructions to reach
1487 some "real" code. */
1488static CORE_ADDR
6093d2eb 1489s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1490{
1491 struct s390_prologue_data data;
1492 CORE_ADDR skip_pc;
6093d2eb 1493 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1494 return skip_pc ? skip_pc : pc;
1495}
1496
d0f54f9d
JB
1497/* Return true if we are in the functin's epilogue, i.e. after the
1498 instruction that destroyed the function's stack frame. */
1499static int
1500s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1501{
1502 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1503
1504 /* In frameless functions, there's not frame to destroy and thus
1505 we don't care about the epilogue.
1506
1507 In functions with frame, the epilogue sequence is a pair of
1508 a LM-type instruction that restores (amongst others) the
1509 return register %r14 and the stack pointer %r15, followed
1510 by a branch 'br %r14' --or equivalent-- that effects the
1511 actual return.
1512
1513 In that situation, this function needs to return 'true' in
1514 exactly one case: when pc points to that branch instruction.
1515
1516 Thus we try to disassemble the one instructions immediately
177b42fe 1517 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1518 modifying the stack pointer.
1519
1520 Note that disassembling backwards is not reliable, so there
1521 is a slight chance of false positives here ... */
1522
1523 bfd_byte insn[6];
1524 unsigned int r1, r3, b2;
1525 int d2;
1526
1527 if (word_size == 4
8defab1a 1528 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1529 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1530 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1531 return 1;
1532
a8c99f38 1533 if (word_size == 4
8defab1a 1534 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1535 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1536 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1537 return 1;
1538
d0f54f9d 1539 if (word_size == 8
8defab1a 1540 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1541 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1542 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1543 return 1;
1544
1545 return 0;
1546}
5769d3cd 1547
1db4e8a0
UW
1548/* Displaced stepping. */
1549
1550/* Fix up the state of registers and memory after having single-stepped
1551 a displaced instruction. */
1552static void
1553s390_displaced_step_fixup (struct gdbarch *gdbarch,
1554 struct displaced_step_closure *closure,
1555 CORE_ADDR from, CORE_ADDR to,
1556 struct regcache *regs)
1557{
1558 /* Since we use simple_displaced_step_copy_insn, our closure is a
1559 copy of the instruction. */
1560 gdb_byte *insn = (gdb_byte *) closure;
1561 static int s390_instrlen[] = { 2, 4, 4, 6 };
1562 int insnlen = s390_instrlen[insn[0] >> 6];
1563
1564 /* Fields for various kinds of instructions. */
1565 unsigned int b2, r1, r2, x2, r3;
1566 int i2, d2;
1567
1568 /* Get current PC and addressing mode bit. */
1569 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1570 ULONGEST amode = 0;
1db4e8a0
UW
1571
1572 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1573 {
1574 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1575 amode &= 0x80000000;
1576 }
1577
1578 if (debug_displaced)
1579 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1580 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1581 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1582 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1583
1584 /* Handle absolute branch and save instructions. */
1585 if (is_rr (insn, op_basr, &r1, &r2)
1586 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1587 {
1588 /* Recompute saved return address in R1. */
1589 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1590 amode | (from + insnlen));
1591 }
1592
1593 /* Handle absolute branch instructions. */
1594 else if (is_rr (insn, op_bcr, &r1, &r2)
1595 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1596 || is_rr (insn, op_bctr, &r1, &r2)
1597 || is_rre (insn, op_bctgr, &r1, &r2)
1598 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1599 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1600 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1601 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1602 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1603 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1604 {
1605 /* Update PC iff branch was *not* taken. */
1606 if (pc == to + insnlen)
1607 regcache_write_pc (regs, from + insnlen);
1608 }
1609
1610 /* Handle PC-relative branch and save instructions. */
1611 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1612 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1613 {
1614 /* Update PC. */
1615 regcache_write_pc (regs, pc - to + from);
1616 /* Recompute saved return address in R1. */
1617 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1618 amode | (from + insnlen));
1619 }
1620
1621 /* Handle PC-relative branch instructions. */
1622 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1623 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1624 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1625 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1626 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1627 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1628 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1629 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1630 {
1631 /* Update PC. */
1632 regcache_write_pc (regs, pc - to + from);
1633 }
1634
1635 /* Handle LOAD ADDRESS RELATIVE LONG. */
1636 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1637 {
0161e4b9
UW
1638 /* Update PC. */
1639 regcache_write_pc (regs, from + insnlen);
1db4e8a0
UW
1640 /* Recompute output address in R1. */
1641 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1642 amode | (from + i2 * 2));
1db4e8a0
UW
1643 }
1644
1645 /* If we executed a breakpoint instruction, point PC right back at it. */
1646 else if (insn[0] == 0x0 && insn[1] == 0x1)
1647 regcache_write_pc (regs, from);
1648
1649 /* For any other insn, PC points right after the original instruction. */
1650 else
1651 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1652
1653 if (debug_displaced)
1654 fprintf_unfiltered (gdb_stdlog,
1655 "displaced: (s390) pc is now %s\n",
1656 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1657}
a8c99f38 1658
d6db1fab
UW
1659
1660/* Helper routine to unwind pseudo registers. */
1661
1662static struct value *
1663s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1664{
1665 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1666 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1667 struct type *type = register_type (gdbarch, regnum);
1668
1669 /* Unwind PC via PSW address. */
1670 if (regnum == tdep->pc_regnum)
1671 {
1672 struct value *val;
1673
1674 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1675 if (!value_optimized_out (val))
1676 {
1677 LONGEST pswa = value_as_long (val);
1678
1679 if (TYPE_LENGTH (type) == 4)
1680 return value_from_pointer (type, pswa & 0x7fffffff);
1681 else
1682 return value_from_pointer (type, pswa);
1683 }
1684 }
1685
1686 /* Unwind CC via PSW mask. */
1687 if (regnum == tdep->cc_regnum)
1688 {
1689 struct value *val;
1690
1691 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1692 if (!value_optimized_out (val))
1693 {
1694 LONGEST pswm = value_as_long (val);
1695
1696 if (TYPE_LENGTH (type) == 4)
1697 return value_from_longest (type, (pswm >> 12) & 3);
1698 else
1699 return value_from_longest (type, (pswm >> 44) & 3);
1700 }
1701 }
1702
1703 /* Unwind full GPRs to show at least the lower halves (as the
1704 upper halves are undefined). */
2ccd1468 1705 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1706 {
1707 int reg = regnum - tdep->gpr_full_regnum;
1708 struct value *val;
1709
1710 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1711 if (!value_optimized_out (val))
1712 return value_cast (type, val);
1713 }
1714
1715 return allocate_optimized_out_value (type);
1716}
1717
1718static struct value *
1719s390_trad_frame_prev_register (struct frame_info *this_frame,
1720 struct trad_frame_saved_reg saved_regs[],
1721 int regnum)
1722{
1723 if (regnum < S390_NUM_REGS)
1724 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1725 else
1726 return s390_unwind_pseudo_register (this_frame, regnum);
1727}
1728
1729
a8c99f38
JB
1730/* Normal stack frames. */
1731
1732struct s390_unwind_cache {
1733
1734 CORE_ADDR func;
1735 CORE_ADDR frame_base;
1736 CORE_ADDR local_base;
1737
1738 struct trad_frame_saved_reg *saved_regs;
1739};
1740
a78f21af 1741static int
f089c433 1742s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1743 struct s390_unwind_cache *info)
5769d3cd 1744{
f089c433 1745 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1746 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1747 struct s390_prologue_data data;
3fc46200
UW
1748 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1749 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1750 int i;
1751 CORE_ADDR cfa;
a8c99f38
JB
1752 CORE_ADDR func;
1753 CORE_ADDR result;
1754 ULONGEST reg;
1755 CORE_ADDR prev_sp;
1756 int frame_pointer;
1757 int size;
edb3359d 1758 struct frame_info *next_frame;
a8c99f38
JB
1759
1760 /* Try to find the function start address. If we can't find it, we don't
1761 bother searching for it -- with modern compilers this would be mostly
1762 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1763 or else a valid backchain ... */
f089c433 1764 func = get_frame_func (this_frame);
a8c99f38
JB
1765 if (!func)
1766 return 0;
5769d3cd 1767
a8c99f38
JB
1768 /* Try to analyze the prologue. */
1769 result = s390_analyze_prologue (gdbarch, func,
f089c433 1770 get_frame_pc (this_frame), &data);
a8c99f38 1771 if (!result)
5769d3cd 1772 return 0;
5769d3cd 1773
a8c99f38
JB
1774 /* If this was successful, we should have found the instruction that
1775 sets the stack pointer register to the previous value of the stack
1776 pointer minus the frame size. */
3fc46200 1777 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1778 return 0;
a8c99f38
JB
1779
1780 /* A frame size of zero at this point can mean either a real
1781 frameless function, or else a failure to find the prologue.
1782 Perform some sanity checks to verify we really have a
1783 frameless function. */
1784 if (sp->k == 0)
5769d3cd 1785 {
a8c99f38
JB
1786 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1787 size zero. This is only possible if the next frame is a sentinel
1788 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1789 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1790 needed, instead the code should simpliy rely on its
1791 analysis. */
edb3359d
DJ
1792 next_frame = get_next_frame (this_frame);
1793 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1794 next_frame = get_next_frame (next_frame);
1795 if (next_frame
f089c433 1796 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1797 return 0;
5769d3cd 1798
a8c99f38
JB
1799 /* If we really have a frameless function, %r14 must be valid
1800 -- in particular, it must point to a different function. */
f089c433 1801 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1802 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1803 if (get_pc_function_start (reg) == func)
5769d3cd 1804 {
a8c99f38
JB
1805 /* However, there is one case where it *is* valid for %r14
1806 to point to the same function -- if this is a recursive
1807 call, and we have stopped in the prologue *before* the
1808 stack frame was allocated.
1809
1810 Recognize this case by looking ahead a bit ... */
5769d3cd 1811
a8c99f38 1812 struct s390_prologue_data data2;
3fc46200 1813 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1814
1815 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1816 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1817 && sp->k != 0))
1818 return 0;
5769d3cd 1819 }
5769d3cd 1820 }
5769d3cd
AC
1821
1822
a8c99f38
JB
1823 /* OK, we've found valid prologue data. */
1824 size = -sp->k;
5769d3cd 1825
a8c99f38
JB
1826 /* If the frame pointer originally also holds the same value
1827 as the stack pointer, we're probably using it. If it holds
1828 some other value -- even a constant offset -- it is most
1829 likely used as temp register. */
3fc46200 1830 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1831 frame_pointer = S390_FRAME_REGNUM;
1832 else
1833 frame_pointer = S390_SP_REGNUM;
1834
1835 /* If we've detected a function with stack frame, we'll still have to
1836 treat it as frameless if we're currently within the function epilog
c378eb4e 1837 code at a point where the frame pointer has already been restored.
a8c99f38 1838 This can only happen in an innermost frame. */
0e100dab
AC
1839 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1840 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1841 next_frame = get_next_frame (this_frame);
1842 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1843 next_frame = get_next_frame (next_frame);
f089c433 1844 if (size > 0
edb3359d 1845 && (next_frame == NULL
f089c433 1846 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1847 {
a8c99f38
JB
1848 /* See the comment in s390_in_function_epilogue_p on why this is
1849 not completely reliable ... */
f089c433 1850 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1851 {
a8c99f38
JB
1852 memset (&data, 0, sizeof (data));
1853 size = 0;
1854 frame_pointer = S390_SP_REGNUM;
5769d3cd 1855 }
5769d3cd 1856 }
5769d3cd 1857
a8c99f38
JB
1858 /* Once we know the frame register and the frame size, we can unwind
1859 the current value of the frame register from the next frame, and
1860 add back the frame size to arrive that the previous frame's
1861 stack pointer value. */
f089c433 1862 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1863 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1864
7803799a
UW
1865 /* Set up ABI call-saved/call-clobbered registers. */
1866 for (i = 0; i < S390_NUM_REGS; i++)
1867 if (!s390_register_call_saved (gdbarch, i))
1868 trad_frame_set_unknown (info->saved_regs, i);
1869
1870 /* CC is always call-clobbered. */
d6db1fab 1871 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1872
121d8485
UW
1873 /* Record the addresses of all register spill slots the prologue parser
1874 has recognized. Consider only registers defined as call-saved by the
1875 ABI; for call-clobbered registers the parser may have recognized
1876 spurious stores. */
5769d3cd 1877
7803799a
UW
1878 for (i = 0; i < 16; i++)
1879 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1880 && data.gpr_slot[i] != 0)
121d8485 1881 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1882
7803799a
UW
1883 for (i = 0; i < 16; i++)
1884 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1885 && data.fpr_slot[i] != 0)
1886 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1887
1888 /* Function return will set PC to %r14. */
d6db1fab 1889 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1890
1891 /* In frameless functions, we unwind simply by moving the return
1892 address to the PC. However, if we actually stored to the
1893 save area, use that -- we might only think the function frameless
1894 because we're in the middle of the prologue ... */
1895 if (size == 0
d6db1fab 1896 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1897 {
d6db1fab 1898 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1899 }
a8c99f38
JB
1900
1901 /* Another sanity check: unless this is a frameless function,
1902 we should have found spill slots for SP and PC.
1903 If not, we cannot unwind further -- this happens e.g. in
1904 libc's thread_start routine. */
1905 if (size > 0)
5769d3cd 1906 {
a8c99f38 1907 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1908 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1909 prev_sp = -1;
5769d3cd 1910 }
a8c99f38
JB
1911
1912 /* We use the current value of the frame register as local_base,
1913 and the top of the register save area as frame_base. */
1914 if (prev_sp != -1)
1915 {
1916 info->frame_base = prev_sp + 16*word_size + 32;
1917 info->local_base = prev_sp - size;
1918 }
1919
1920 info->func = func;
1921 return 1;
5769d3cd
AC
1922}
1923
a78f21af 1924static void
f089c433 1925s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1926 struct s390_unwind_cache *info)
5769d3cd 1927{
f089c433 1928 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1929 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1930 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1931 CORE_ADDR backchain;
1932 ULONGEST reg;
1933 LONGEST sp;
7803799a
UW
1934 int i;
1935
1936 /* Set up ABI call-saved/call-clobbered registers. */
1937 for (i = 0; i < S390_NUM_REGS; i++)
1938 if (!s390_register_call_saved (gdbarch, i))
1939 trad_frame_set_unknown (info->saved_regs, i);
1940
1941 /* CC is always call-clobbered. */
d6db1fab 1942 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1943
1944 /* Get the backchain. */
f089c433 1945 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1946 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1947
1948 /* A zero backchain terminates the frame chain. As additional
1949 sanity check, let's verify that the spill slot for SP in the
1950 save area pointed to by the backchain in fact links back to
1951 the save area. */
1952 if (backchain != 0
e17a4113
UW
1953 && safe_read_memory_integer (backchain + 15*word_size,
1954 word_size, byte_order, &sp)
a8c99f38
JB
1955 && (CORE_ADDR)sp == backchain)
1956 {
1957 /* We don't know which registers were saved, but it will have
1958 to be at least %r14 and %r15. This will allow us to continue
1959 unwinding, but other prev-frame registers may be incorrect ... */
1960 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1961 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1962
1963 /* Function return will set PC to %r14. */
d6db1fab 1964 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1965 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1966
1967 /* We use the current value of the frame register as local_base,
1968 and the top of the register save area as frame_base. */
1969 info->frame_base = backchain + 16*word_size + 32;
1970 info->local_base = reg;
1971 }
1972
f089c433 1973 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1974}
1975
a8c99f38 1976static struct s390_unwind_cache *
f089c433 1977s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1978 void **this_prologue_cache)
1979{
1980 struct s390_unwind_cache *info;
1981 if (*this_prologue_cache)
1982 return *this_prologue_cache;
1983
1984 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1985 *this_prologue_cache = info;
f089c433 1986 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1987 info->func = -1;
1988 info->frame_base = -1;
1989 info->local_base = -1;
1990
1991 /* Try to use prologue analysis to fill the unwind cache.
1992 If this fails, fall back to reading the stack backchain. */
f089c433
UW
1993 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1994 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
1995
1996 return info;
1997}
5769d3cd 1998
a78f21af 1999static void
f089c433 2000s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2001 void **this_prologue_cache,
2002 struct frame_id *this_id)
5769d3cd 2003{
a8c99f38 2004 struct s390_unwind_cache *info
f089c433 2005 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2006
a8c99f38
JB
2007 if (info->frame_base == -1)
2008 return;
5769d3cd 2009
a8c99f38 2010 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2011}
2012
f089c433
UW
2013static struct value *
2014s390_frame_prev_register (struct frame_info *this_frame,
2015 void **this_prologue_cache, int regnum)
a8c99f38 2016{
7803799a 2017 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2018 struct s390_unwind_cache *info
f089c433 2019 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2020
d6db1fab 2021 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2022}
2023
2024static const struct frame_unwind s390_frame_unwind = {
2025 NORMAL_FRAME,
8fbca658 2026 default_frame_unwind_stop_reason,
a8c99f38 2027 s390_frame_this_id,
f089c433
UW
2028 s390_frame_prev_register,
2029 NULL,
2030 default_frame_sniffer
a8c99f38
JB
2031};
2032
5769d3cd 2033
8e645ae7
AC
2034/* Code stubs and their stack frames. For things like PLTs and NULL
2035 function calls (where there is no true frame and the return address
2036 is in the RETADDR register). */
a8c99f38 2037
8e645ae7
AC
2038struct s390_stub_unwind_cache
2039{
a8c99f38
JB
2040 CORE_ADDR frame_base;
2041 struct trad_frame_saved_reg *saved_regs;
2042};
2043
8e645ae7 2044static struct s390_stub_unwind_cache *
f089c433 2045s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2046 void **this_prologue_cache)
5769d3cd 2047{
f089c433 2048 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2049 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2050 struct s390_stub_unwind_cache *info;
a8c99f38 2051 ULONGEST reg;
5c3cf190 2052
a8c99f38
JB
2053 if (*this_prologue_cache)
2054 return *this_prologue_cache;
5c3cf190 2055
8e645ae7 2056 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2057 *this_prologue_cache = info;
f089c433 2058 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2059
2060 /* The return address is in register %r14. */
d6db1fab 2061 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2062
2063 /* Retrieve stack pointer and determine our frame base. */
f089c433 2064 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2065 info->frame_base = reg + 16*word_size + 32;
2066
2067 return info;
5769d3cd
AC
2068}
2069
a8c99f38 2070static void
f089c433 2071s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2072 void **this_prologue_cache,
2073 struct frame_id *this_id)
5769d3cd 2074{
8e645ae7 2075 struct s390_stub_unwind_cache *info
f089c433
UW
2076 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2077 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2078}
5769d3cd 2079
f089c433
UW
2080static struct value *
2081s390_stub_frame_prev_register (struct frame_info *this_frame,
2082 void **this_prologue_cache, int regnum)
8e645ae7
AC
2083{
2084 struct s390_stub_unwind_cache *info
f089c433 2085 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2086 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2087}
2088
f089c433
UW
2089static int
2090s390_stub_frame_sniffer (const struct frame_unwind *self,
2091 struct frame_info *this_frame,
2092 void **this_prologue_cache)
a8c99f38 2093{
93d42b30 2094 CORE_ADDR addr_in_block;
8e645ae7
AC
2095 bfd_byte insn[S390_MAX_INSTR_SIZE];
2096
2097 /* If the current PC points to non-readable memory, we assume we
2098 have trapped due to an invalid function pointer call. We handle
2099 the non-existing current function like a PLT stub. */
f089c433 2100 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2101 if (in_plt_section (addr_in_block)
f089c433
UW
2102 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2103 return 1;
2104 return 0;
a8c99f38 2105}
5769d3cd 2106
f089c433
UW
2107static const struct frame_unwind s390_stub_frame_unwind = {
2108 NORMAL_FRAME,
8fbca658 2109 default_frame_unwind_stop_reason,
f089c433
UW
2110 s390_stub_frame_this_id,
2111 s390_stub_frame_prev_register,
2112 NULL,
2113 s390_stub_frame_sniffer
2114};
2115
5769d3cd 2116
a8c99f38 2117/* Signal trampoline stack frames. */
5769d3cd 2118
a8c99f38
JB
2119struct s390_sigtramp_unwind_cache {
2120 CORE_ADDR frame_base;
2121 struct trad_frame_saved_reg *saved_regs;
2122};
5769d3cd 2123
a8c99f38 2124static struct s390_sigtramp_unwind_cache *
f089c433 2125s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2126 void **this_prologue_cache)
5769d3cd 2127{
f089c433 2128 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2129 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2130 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2131 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2132 struct s390_sigtramp_unwind_cache *info;
2133 ULONGEST this_sp, prev_sp;
7803799a 2134 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2135 int i;
2136
2137 if (*this_prologue_cache)
2138 return *this_prologue_cache;
5769d3cd 2139
a8c99f38
JB
2140 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2141 *this_prologue_cache = info;
f089c433 2142 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2143
f089c433
UW
2144 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2145 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2146 next_cfa = this_sp + 16*word_size + 32;
2147
2148 /* New-style RT frame:
2149 retcode + alignment (8 bytes)
2150 siginfo (128 bytes)
c378eb4e 2151 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2152 if (next_ra == next_cfa)
2153 {
f0f63663 2154 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2155 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2156 upper GPR halves if present. */
2157 sigreg_high_off = 8;
a8c99f38
JB
2158 }
2159
2160 /* Old-style RT frame and all non-RT frames:
2161 old signal mask (8 bytes)
c378eb4e 2162 pointer to sigregs. */
5769d3cd
AC
2163 else
2164 {
e17a4113
UW
2165 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2166 word_size, byte_order);
7803799a
UW
2167 /* sigregs are followed by signo (4 bytes), then by the
2168 upper GPR halves if present. */
2169 sigreg_high_off = 4;
a8c99f38 2170 }
5769d3cd 2171
a8c99f38
JB
2172 /* The sigregs structure looks like this:
2173 long psw_mask;
2174 long psw_addr;
2175 long gprs[16];
2176 int acrs[16];
2177 int fpc;
2178 int __pad;
2179 double fprs[16]; */
5769d3cd 2180
7803799a
UW
2181 /* PSW mask and address. */
2182 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2183 sigreg_ptr += word_size;
7803799a 2184 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2185 sigreg_ptr += word_size;
2186
2187 /* Then the GPRs. */
2188 for (i = 0; i < 16; i++)
2189 {
2190 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2191 sigreg_ptr += word_size;
2192 }
2193
2194 /* Then the ACRs. */
2195 for (i = 0; i < 16; i++)
2196 {
2197 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2198 sigreg_ptr += 4;
5769d3cd 2199 }
5769d3cd 2200
a8c99f38
JB
2201 /* The floating-point control word. */
2202 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2203 sigreg_ptr += 8;
5769d3cd 2204
a8c99f38
JB
2205 /* And finally the FPRs. */
2206 for (i = 0; i < 16; i++)
2207 {
2208 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2209 sigreg_ptr += 8;
2210 }
2211
7803799a
UW
2212 /* If we have them, the GPR upper halves are appended at the end. */
2213 sigreg_ptr += sigreg_high_off;
2214 if (tdep->gpr_full_regnum != -1)
2215 for (i = 0; i < 16; i++)
2216 {
2217 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2218 sigreg_ptr += 4;
2219 }
2220
a8c99f38
JB
2221 /* Restore the previous frame's SP. */
2222 prev_sp = read_memory_unsigned_integer (
2223 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2224 word_size, byte_order);
5769d3cd 2225
a8c99f38
JB
2226 /* Determine our frame base. */
2227 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2228
a8c99f38 2229 return info;
5769d3cd
AC
2230}
2231
a8c99f38 2232static void
f089c433 2233s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2234 void **this_prologue_cache,
2235 struct frame_id *this_id)
5769d3cd 2236{
a8c99f38 2237 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2238 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2239 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2240}
2241
f089c433
UW
2242static struct value *
2243s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2244 void **this_prologue_cache, int regnum)
a8c99f38
JB
2245{
2246 struct s390_sigtramp_unwind_cache *info
f089c433 2247 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2248 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2249}
2250
f089c433
UW
2251static int
2252s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2253 struct frame_info *this_frame,
2254 void **this_prologue_cache)
5769d3cd 2255{
f089c433 2256 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2257 bfd_byte sigreturn[2];
4c8287ac 2258
8defab1a 2259 if (target_read_memory (pc, sigreturn, 2))
f089c433 2260 return 0;
4c8287ac 2261
a8c99f38 2262 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2263 return 0;
5769d3cd 2264
a8c99f38
JB
2265 if (sigreturn[1] != 119 /* sigreturn */
2266 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2267 return 0;
a8c99f38 2268
f089c433 2269 return 1;
5769d3cd
AC
2270}
2271
f089c433
UW
2272static const struct frame_unwind s390_sigtramp_frame_unwind = {
2273 SIGTRAMP_FRAME,
8fbca658 2274 default_frame_unwind_stop_reason,
f089c433
UW
2275 s390_sigtramp_frame_this_id,
2276 s390_sigtramp_frame_prev_register,
2277 NULL,
2278 s390_sigtramp_frame_sniffer
2279};
2280
4c8287ac 2281
a8c99f38
JB
2282/* Frame base handling. */
2283
2284static CORE_ADDR
f089c433 2285s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2286{
a8c99f38 2287 struct s390_unwind_cache *info
f089c433 2288 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2289 return info->frame_base;
2290}
2291
2292static CORE_ADDR
f089c433 2293s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2294{
2295 struct s390_unwind_cache *info
f089c433 2296 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2297 return info->local_base;
2298}
2299
2300static const struct frame_base s390_frame_base = {
2301 &s390_frame_unwind,
2302 s390_frame_base_address,
2303 s390_local_base_address,
2304 s390_local_base_address
2305};
2306
2307static CORE_ADDR
2308s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2309{
7803799a 2310 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2311 ULONGEST pc;
7803799a 2312 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2313 return gdbarch_addr_bits_remove (gdbarch, pc);
2314}
2315
2316static CORE_ADDR
2317s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2318{
2319 ULONGEST sp;
2320 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2321 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2322}
2323
2324
a431654a
AC
2325/* DWARF-2 frame support. */
2326
7803799a
UW
2327static struct value *
2328s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2329 int regnum)
2330{
d6db1fab 2331 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2332}
2333
a431654a
AC
2334static void
2335s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2336 struct dwarf2_frame_state_reg *reg,
4a4e5149 2337 struct frame_info *this_frame)
a431654a
AC
2338{
2339 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2340
d6db1fab
UW
2341 /* The condition code (and thus PSW mask) is call-clobbered. */
2342 if (regnum == S390_PSWM_REGNUM)
2343 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2344
2345 /* The PSW address unwinds to the return address. */
2346 else if (regnum == S390_PSWA_REGNUM)
2347 reg->how = DWARF2_FRAME_REG_RA;
2348
7803799a
UW
2349 /* Fixed registers are call-saved or call-clobbered
2350 depending on the ABI in use. */
d6db1fab 2351 else if (regnum < S390_NUM_REGS)
a431654a 2352 {
7803799a 2353 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2354 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2355 else
a431654a 2356 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2357 }
a431654a 2358
d6db1fab
UW
2359 /* We install a special function to unwind pseudos. */
2360 else
7803799a
UW
2361 {
2362 reg->how = DWARF2_FRAME_REG_FN;
2363 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2364 }
2365}
2366
2367
b0cf273e
JB
2368/* Dummy function calls. */
2369
78f8b424
JB
2370/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2371 "Integer-like" types are those that should be passed the way
2372 integers are: integers, enums, ranges, characters, and booleans. */
2373static int
2374is_integer_like (struct type *type)
2375{
2376 enum type_code code = TYPE_CODE (type);
2377
2378 return (code == TYPE_CODE_INT
2379 || code == TYPE_CODE_ENUM
2380 || code == TYPE_CODE_RANGE
2381 || code == TYPE_CODE_CHAR
2382 || code == TYPE_CODE_BOOL);
2383}
2384
78f8b424
JB
2385/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2386 "Pointer-like" types are those that should be passed the way
2387 pointers are: pointers and references. */
2388static int
2389is_pointer_like (struct type *type)
2390{
2391 enum type_code code = TYPE_CODE (type);
2392
2393 return (code == TYPE_CODE_PTR
2394 || code == TYPE_CODE_REF);
2395}
2396
2397
20a940cc
JB
2398/* Return non-zero if TYPE is a `float singleton' or `double
2399 singleton', zero otherwise.
2400
2401 A `T singleton' is a struct type with one member, whose type is
2402 either T or a `T singleton'. So, the following are all float
2403 singletons:
2404
2405 struct { float x };
2406 struct { struct { float x; } x; };
2407 struct { struct { struct { float x; } x; } x; };
2408
2409 ... and so on.
2410
b0cf273e
JB
2411 All such structures are passed as if they were floats or doubles,
2412 as the (revised) ABI says. */
20a940cc
JB
2413static int
2414is_float_singleton (struct type *type)
2415{
b0cf273e
JB
2416 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2417 {
2418 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2419 CHECK_TYPEDEF (singleton_type);
2420
2421 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2422 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2423 || is_float_singleton (singleton_type));
2424 }
2425
2426 return 0;
20a940cc
JB
2427}
2428
2429
2430/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2431 "Struct-like" types are those that should be passed as structs are:
2432 structs and unions.
2433
2434 As an odd quirk, not mentioned in the ABI, GCC passes float and
2435 double singletons as if they were a plain float, double, etc. (The
2436 corresponding union types are handled normally.) So we exclude
2437 those types here. *shrug* */
2438static int
2439is_struct_like (struct type *type)
2440{
2441 enum type_code code = TYPE_CODE (type);
2442
2443 return (code == TYPE_CODE_UNION
2444 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2445}
2446
2447
2448/* Return non-zero if TYPE is a float-like type, zero otherwise.
2449 "Float-like" types are those that should be passed as
2450 floating-point values are.
2451
2452 You'd think this would just be floats, doubles, long doubles, etc.
2453 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2454 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2455 corresponding union types are handled normally.) So we include
20a940cc
JB
2456 those types here. *shrug* */
2457static int
2458is_float_like (struct type *type)
2459{
2460 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2461 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2462 || is_float_singleton (type));
2463}
2464
2465
78f8b424 2466static int
b0cf273e 2467is_power_of_two (unsigned int n)
78f8b424 2468{
b0cf273e 2469 return ((n & (n - 1)) == 0);
78f8b424
JB
2470}
2471
b0cf273e
JB
2472/* Return non-zero if TYPE should be passed as a pointer to a copy,
2473 zero otherwise. */
4d819d0e 2474static int
b0cf273e 2475s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2476{
354ecfd5 2477 if (TYPE_LENGTH (type) > 8)
b0cf273e 2478 return 1;
4d819d0e 2479
56b9d9ac
UW
2480 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2481 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2482 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2483}
2484
b0cf273e
JB
2485/* Return non-zero if TYPE should be passed in a float register
2486 if possible. */
78f8b424 2487static int
b0cf273e 2488s390_function_arg_float (struct type *type)
78f8b424 2489{
354ecfd5 2490 if (TYPE_LENGTH (type) > 8)
b0cf273e 2491 return 0;
78f8b424 2492
b0cf273e 2493 return is_float_like (type);
4d819d0e
JB
2494}
2495
b0cf273e
JB
2496/* Return non-zero if TYPE should be passed in an integer register
2497 (or a pair of integer registers) if possible. */
78f8b424 2498static int
b0cf273e 2499s390_function_arg_integer (struct type *type)
78f8b424 2500{
354ecfd5 2501 if (TYPE_LENGTH (type) > 8)
b0cf273e 2502 return 0;
78f8b424 2503
b0cf273e
JB
2504 return is_integer_like (type)
2505 || is_pointer_like (type)
354ecfd5 2506 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2507}
2508
78f8b424
JB
2509/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2510 word as required for the ABI. */
2511static LONGEST
e17a4113 2512extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2513{
e17a4113 2514 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2515 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2516
2517 /* Even structs get passed in the least significant bits of the
2518 register / memory word. It's not really right to extract them as
2519 an integer, but it does take care of the extension. */
2520 if (TYPE_UNSIGNED (type))
0fd88904 2521 return extract_unsigned_integer (value_contents (arg),
e17a4113 2522 TYPE_LENGTH (type), byte_order);
78f8b424 2523 else
0fd88904 2524 return extract_signed_integer (value_contents (arg),
e17a4113 2525 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2526}
2527
2528
78f8b424
JB
2529/* Return the alignment required by TYPE. */
2530static int
2531alignment_of (struct type *type)
2532{
2533 int alignment;
2534
2535 if (is_integer_like (type)
2536 || is_pointer_like (type)
a16b8bcd
UW
2537 || TYPE_CODE (type) == TYPE_CODE_FLT
2538 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2539 alignment = TYPE_LENGTH (type);
2540 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2541 || TYPE_CODE (type) == TYPE_CODE_UNION)
2542 {
2543 int i;
2544
2545 alignment = 1;
2546 for (i = 0; i < TYPE_NFIELDS (type); i++)
2547 {
56b9d9ac
UW
2548 int field_alignment
2549 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424
JB
2550
2551 if (field_alignment > alignment)
2552 alignment = field_alignment;
2553 }
2554 }
2555 else
2556 alignment = 1;
2557
2558 /* Check that everything we ever return is a power of two. Lots of
2559 code doesn't want to deal with aligning things to arbitrary
2560 boundaries. */
2561 gdb_assert ((alignment & (alignment - 1)) == 0);
2562
2563 return alignment;
2564}
2565
2566
2567/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2568 place to be passed to a function, as specified by the "GNU/Linux
2569 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2570
2571 SP is the current stack pointer. We must put arguments, links,
2572 padding, etc. whereever they belong, and return the new stack
2573 pointer value.
2574
2575 If STRUCT_RETURN is non-zero, then the function we're calling is
2576 going to return a structure by value; STRUCT_ADDR is the address of
2577 a block we've allocated for it on the stack.
2578
2579 Our caller has taken care of any type promotions needed to satisfy
2580 prototypes or the old K&R argument-passing rules. */
a78f21af 2581static CORE_ADDR
7d9b040b 2582s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2583 struct regcache *regcache, CORE_ADDR bp_addr,
2584 int nargs, struct value **args, CORE_ADDR sp,
2585 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2586{
b0cf273e
JB
2587 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2588 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2589 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2590 int i;
5769d3cd 2591
78f8b424
JB
2592 /* If the i'th argument is passed as a reference to a copy, then
2593 copy_addr[i] is the address of the copy we made. */
2594 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2595
c0cc4c83 2596 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2597 for (i = 0; i < nargs; i++)
2598 {
2599 struct value *arg = args[i];
56b9d9ac 2600 struct type *type = check_typedef (value_type (arg));
5769d3cd 2601
b0cf273e 2602 if (s390_function_arg_pass_by_reference (type))
01c464e9 2603 {
354ecfd5 2604 sp -= TYPE_LENGTH (type);
5b03f266 2605 sp = align_down (sp, alignment_of (type));
78f8b424 2606 copy_addr[i] = sp;
01c464e9 2607 }
5769d3cd 2608 }
5769d3cd 2609
78f8b424
JB
2610 /* Reserve space for the parameter area. As a conservative
2611 simplification, we assume that everything will be passed on the
b0cf273e
JB
2612 stack. Since every argument larger than 8 bytes will be
2613 passed by reference, we use this simple upper bound. */
2614 sp -= nargs * 8;
78f8b424 2615
78f8b424
JB
2616 /* After all that, make sure it's still aligned on an eight-byte
2617 boundary. */
5b03f266 2618 sp = align_down (sp, 8);
78f8b424 2619
c0cc4c83
UW
2620 /* Allocate the standard frame areas: the register save area, the
2621 word reserved for the compiler (which seems kind of meaningless),
2622 and the back chain pointer. */
2623 sp -= 16*word_size + 32;
2624
2625 /* Now we have the final SP value. Make sure we didn't underflow;
2626 on 31-bit, this would result in addresses with the high bit set,
2627 which causes confusion elsewhere. Note that if we error out
2628 here, stack and registers remain untouched. */
2629 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2630 error (_("Stack overflow"));
2631
2632
78f8b424
JB
2633 /* Finally, place the actual parameters, working from SP towards
2634 higher addresses. The code above is supposed to reserve enough
2635 space for this. */
2636 {
2637 int fr = 0;
2638 int gr = 2;
c0cc4c83 2639 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2640
b0cf273e 2641 /* A struct is returned using general register 2. */
4d819d0e 2642 if (struct_return)
b0cf273e
JB
2643 {
2644 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2645 struct_addr);
2646 gr++;
2647 }
4d819d0e 2648
78f8b424
JB
2649 for (i = 0; i < nargs; i++)
2650 {
2651 struct value *arg = args[i];
56b9d9ac 2652 struct type *type = check_typedef (value_type (arg));
b0cf273e
JB
2653 unsigned length = TYPE_LENGTH (type);
2654
2655 if (s390_function_arg_pass_by_reference (type))
2656 {
c0cc4c83
UW
2657 /* Actually copy the argument contents to the stack slot
2658 that was reserved above. */
2659 write_memory (copy_addr[i], value_contents (arg), length);
2660
b0cf273e
JB
2661 if (gr <= 6)
2662 {
2663 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2664 copy_addr[i]);
2665 gr++;
2666 }
2667 else
2668 {
e17a4113
UW
2669 write_memory_unsigned_integer (starg, word_size, byte_order,
2670 copy_addr[i]);
b0cf273e
JB
2671 starg += word_size;
2672 }
2673 }
2674 else if (s390_function_arg_float (type))
2675 {
2676 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2677 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2678 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2679 {
2680 /* When we store a single-precision value in an FP register,
2681 it occupies the leftmost bits. */
2682 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2683 0, length, value_contents (arg));
b0cf273e
JB
2684 fr += 2;
2685 }
2686 else
2687 {
2688 /* When we store a single-precision value in a stack slot,
2689 it occupies the rightmost bits. */
2690 starg = align_up (starg + length, word_size);
0fd88904 2691 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2692 }
2693 }
2694 else if (s390_function_arg_integer (type) && length <= word_size)
2695 {
2696 if (gr <= 6)
2697 {
2698 /* Integer arguments are always extended to word size. */
2699 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2700 extend_simple_arg (gdbarch,
2701 arg));
b0cf273e
JB
2702 gr++;
2703 }
2704 else
2705 {
2706 /* Integer arguments are always extended to word size. */
e17a4113
UW
2707 write_memory_signed_integer (starg, word_size, byte_order,
2708 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2709 starg += word_size;
2710 }
2711 }
2712 else if (s390_function_arg_integer (type) && length == 2*word_size)
2713 {
2714 if (gr <= 5)
2715 {
2716 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2717 value_contents (arg));
b0cf273e 2718 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2719 value_contents (arg) + word_size);
b0cf273e
JB
2720 gr += 2;
2721 }
2722 else
2723 {
2724 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2725 in it, then don't go back and use it again later. */
2726 gr = 7;
2727
0fd88904 2728 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2729 starg += length;
2730 }
2731 }
2732 else
e2e0b3e5 2733 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2734 }
2735 }
2736
8de7d199
UW
2737 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2738 if (word_size == 4)
2739 {
2740 ULONGEST pswa;
2741 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2742 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2743 }
b0cf273e 2744 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2745
b0cf273e
JB
2746 /* Store updated stack pointer. */
2747 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2748
a8c99f38 2749 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2750 which is actually the top of the register save area. */
2751 return sp + 16*word_size + 32;
5769d3cd
AC
2752}
2753
f089c433 2754/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2755 dummy frame. The frame ID's base needs to match the TOS value
2756 returned by push_dummy_call, and the PC match the dummy frame's
2757 breakpoint. */
2758static struct frame_id
f089c433 2759s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2760{
a8c99f38 2761 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2762 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2763 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2764
121d8485 2765 return frame_id_build (sp + 16*word_size + 32,
f089c433 2766 get_frame_pc (this_frame));
b0cf273e 2767}
c8f9d51c 2768
4074e13c
JB
2769static CORE_ADDR
2770s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2771{
2772 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2773 always be aligned on an eight-byte boundary. */
2774 return (addr & -8);
2775}
2776
2777
b0cf273e
JB
2778/* Function return value access. */
2779
2780static enum return_value_convention
2781s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2782{
354ecfd5 2783 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2784 return RETURN_VALUE_STRUCT_CONVENTION;
2785
2786 switch (TYPE_CODE (type))
2787 {
2788 case TYPE_CODE_STRUCT:
2789 case TYPE_CODE_UNION:
2790 case TYPE_CODE_ARRAY:
56b9d9ac 2791 case TYPE_CODE_COMPLEX:
b0cf273e 2792 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2793
b0cf273e
JB
2794 default:
2795 return RETURN_VALUE_REGISTER_CONVENTION;
2796 }
c8f9d51c
JB
2797}
2798
b0cf273e 2799static enum return_value_convention
6a3a010b 2800s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2801 struct type *type, struct regcache *regcache,
2802 gdb_byte *out, const gdb_byte *in)
5769d3cd 2803{
e17a4113 2804 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2805 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2806 enum return_value_convention rvc;
2807 int length;
2808
2809 type = check_typedef (type);
2810 rvc = s390_return_value_convention (gdbarch, type);
2811 length = TYPE_LENGTH (type);
2812
b0cf273e
JB
2813 if (in)
2814 {
2815 switch (rvc)
2816 {
2817 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2818 if (TYPE_CODE (type) == TYPE_CODE_FLT
2819 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2820 {
2821 /* When we store a single-precision value in an FP register,
2822 it occupies the leftmost bits. */
2823 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2824 0, length, in);
2825 }
2826 else if (length <= word_size)
2827 {
2828 /* Integer arguments are always extended to word size. */
2829 if (TYPE_UNSIGNED (type))
2830 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2831 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2832 else
2833 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2834 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2835 }
2836 else if (length == 2*word_size)
2837 {
2838 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2839 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2840 }
2841 else
e2e0b3e5 2842 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2843 break;
2844
2845 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2846 error (_("Cannot set function return value."));
b0cf273e
JB
2847 break;
2848 }
2849 }
2850 else if (out)
2851 {
2852 switch (rvc)
2853 {
2854 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2855 if (TYPE_CODE (type) == TYPE_CODE_FLT
2856 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2857 {
2858 /* When we store a single-precision value in an FP register,
2859 it occupies the leftmost bits. */
2860 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2861 0, length, out);
2862 }
2863 else if (length <= word_size)
2864 {
2865 /* Integer arguments occupy the rightmost bits. */
2866 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2867 word_size - length, length, out);
2868 }
2869 else if (length == 2*word_size)
2870 {
2871 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2872 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2873 }
2874 else
e2e0b3e5 2875 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2876 break;
5769d3cd 2877
b0cf273e 2878 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2879 error (_("Function return value unknown."));
b0cf273e
JB
2880 break;
2881 }
2882 }
2883
2884 return rvc;
2885}
5769d3cd
AC
2886
2887
a8c99f38
JB
2888/* Breakpoints. */
2889
43af2100 2890static const gdb_byte *
c378eb4e
MS
2891s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2892 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2893{
43af2100 2894 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2895
2896 *lenptr = sizeof (breakpoint);
2897 return breakpoint;
2898}
2899
5769d3cd 2900
a8c99f38 2901/* Address handling. */
5769d3cd
AC
2902
2903static CORE_ADDR
24568a2c 2904s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2905{
a8c99f38 2906 return addr & 0x7fffffff;
5769d3cd
AC
2907}
2908
ffc65945
KB
2909static int
2910s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2911{
2912 if (byte_size == 4)
119ac181 2913 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2914 else
2915 return 0;
2916}
2917
2918static const char *
2919s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2920{
119ac181 2921 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2922 return "mode32";
2923 else
2924 return NULL;
2925}
2926
a78f21af 2927static int
c378eb4e
MS
2928s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2929 const char *name,
ffc65945
KB
2930 int *type_flags_ptr)
2931{
2932 if (strcmp (name, "mode32") == 0)
2933 {
119ac181 2934 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2935 return 1;
2936 }
2937 else
2938 return 0;
2939}
2940
55aa24fb
SDJ
2941/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2942 gdbarch.h. */
2943
2944static int
2945s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2946{
2947 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2948 or indirection. */
2949 || *s == '%' /* Register access. */
2950 || isdigit (*s)); /* Literal number. */
2951}
2952
a8c99f38
JB
2953/* Set up gdbarch struct. */
2954
a78f21af 2955static struct gdbarch *
5769d3cd
AC
2956s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2957{
7803799a
UW
2958 const struct target_desc *tdesc = info.target_desc;
2959 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2960 struct gdbarch *gdbarch;
2961 struct gdbarch_tdep *tdep;
7803799a
UW
2962 int tdep_abi;
2963 int have_upper = 0;
c642a434
UW
2964 int have_linux_v1 = 0;
2965 int have_linux_v2 = 0;
7803799a
UW
2966 int first_pseudo_reg, last_pseudo_reg;
2967
2968 /* Default ABI and register size. */
2969 switch (info.bfd_arch_info->mach)
2970 {
2971 case bfd_mach_s390_31:
2972 tdep_abi = ABI_LINUX_S390;
2973 break;
2974
2975 case bfd_mach_s390_64:
2976 tdep_abi = ABI_LINUX_ZSERIES;
2977 break;
2978
2979 default:
2980 return NULL;
2981 }
2982
2983 /* Use default target description if none provided by the target. */
2984 if (!tdesc_has_registers (tdesc))
2985 {
2986 if (tdep_abi == ABI_LINUX_S390)
2987 tdesc = tdesc_s390_linux32;
2988 else
2989 tdesc = tdesc_s390x_linux64;
2990 }
2991
2992 /* Check any target description for validity. */
2993 if (tdesc_has_registers (tdesc))
2994 {
2995 static const char *const gprs[] = {
2996 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2997 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2998 };
2999 static const char *const fprs[] = {
3000 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3001 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3002 };
3003 static const char *const acrs[] = {
3004 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3005 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3006 };
3007 static const char *const gprs_lower[] = {
3008 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3009 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3010 };
3011 static const char *const gprs_upper[] = {
3012 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3013 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3014 };
3015 const struct tdesc_feature *feature;
3016 int i, valid_p = 1;
3017
3018 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3019 if (feature == NULL)
3020 return NULL;
3021
3022 tdesc_data = tdesc_data_alloc ();
3023
3024 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3025 S390_PSWM_REGNUM, "pswm");
3026 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3027 S390_PSWA_REGNUM, "pswa");
3028
3029 if (tdesc_unnumbered_register (feature, "r0"))
3030 {
3031 for (i = 0; i < 16; i++)
3032 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3033 S390_R0_REGNUM + i, gprs[i]);
3034 }
3035 else
3036 {
3037 have_upper = 1;
3038
3039 for (i = 0; i < 16; i++)
3040 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3041 S390_R0_REGNUM + i,
3042 gprs_lower[i]);
3043 for (i = 0; i < 16; i++)
3044 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3045 S390_R0_UPPER_REGNUM + i,
3046 gprs_upper[i]);
3047 }
3048
3049 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3050 if (feature == NULL)
3051 {
3052 tdesc_data_cleanup (tdesc_data);
3053 return NULL;
3054 }
3055
3056 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3057 S390_FPC_REGNUM, "fpc");
3058 for (i = 0; i < 16; i++)
3059 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3060 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3061
7803799a
UW
3062 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3063 if (feature == NULL)
3064 {
3065 tdesc_data_cleanup (tdesc_data);
3066 return NULL;
3067 }
3068
3069 for (i = 0; i < 16; i++)
3070 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3071 S390_A0_REGNUM + i, acrs[i]);
3072
94eae614 3073 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3074 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3075 if (feature)
3076 {
3077 tdesc_numbered_register (feature, tdesc_data,
3078 S390_ORIG_R2_REGNUM, "orig_r2");
3079
3080 if (tdesc_numbered_register (feature, tdesc_data,
3081 S390_LAST_BREAK_REGNUM, "last_break"))
3082 have_linux_v1 = 1;
3083
3084 if (tdesc_numbered_register (feature, tdesc_data,
3085 S390_SYSTEM_CALL_REGNUM, "system_call"))
3086 have_linux_v2 = 1;
3087
3088 if (have_linux_v2 > have_linux_v1)
3089 valid_p = 0;
3090 }
3091
7803799a
UW
3092 if (!valid_p)
3093 {
3094 tdesc_data_cleanup (tdesc_data);
3095 return NULL;
3096 }
3097 }
5769d3cd 3098
7803799a
UW
3099 /* Find a candidate among extant architectures. */
3100 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3101 arches != NULL;
3102 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3103 {
3104 tdep = gdbarch_tdep (arches->gdbarch);
3105 if (!tdep)
3106 continue;
3107 if (tdep->abi != tdep_abi)
3108 continue;
3109 if ((tdep->gpr_full_regnum != -1) != have_upper)
3110 continue;
3111 if (tdesc_data != NULL)
3112 tdesc_data_cleanup (tdesc_data);
3113 return arches->gdbarch;
3114 }
5769d3cd 3115
7803799a 3116 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 3117 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 3118 tdep->abi = tdep_abi;
d0f54f9d 3119 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3120
3121 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3122 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3123
1de90795
UW
3124 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3125 We can safely let them default to 128-bit, since the debug info
3126 will give the size of type actually used in each case. */
3127 set_gdbarch_long_double_bit (gdbarch, 128);
3128 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3129
aaab4dba 3130 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3131 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3132 always. */
5769d3cd 3133 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3134 /* Stack grows downward. */
3135 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3136 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3137 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3138 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3139
7803799a 3140 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3141 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3142 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3143 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3144 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3145 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
3146 set_gdbarch_regset_from_core_section (gdbarch,
3147 s390_regset_from_core_section);
7803799a 3148 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3149 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3150 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3151 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3152 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3153 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3154 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3155 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3156 s390_pseudo_register_reggroup_p);
3157 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3158
3159 /* Assign pseudo register numbers. */
3160 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3161 last_pseudo_reg = first_pseudo_reg;
3162 tdep->gpr_full_regnum = -1;
3163 if (have_upper)
3164 {
3165 tdep->gpr_full_regnum = last_pseudo_reg;
3166 last_pseudo_reg += 16;
3167 }
3168 tdep->pc_regnum = last_pseudo_reg++;
3169 tdep->cc_regnum = last_pseudo_reg++;
3170 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3171 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3172
b0cf273e
JB
3173 /* Inferior function calls. */
3174 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3175 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3176 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3177 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3178
a8c99f38 3179 /* Frame handling. */
a431654a 3180 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3181 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3182 dwarf2_append_unwinders (gdbarch);
a431654a 3183 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3184 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3185 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3186 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3187 frame_base_set_default (gdbarch, &s390_frame_base);
3188 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3189 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3190
1db4e8a0
UW
3191 /* Displaced stepping. */
3192 set_gdbarch_displaced_step_copy_insn (gdbarch,
3193 simple_displaced_step_copy_insn);
3194 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3195 set_gdbarch_displaced_step_free_closure (gdbarch,
3196 simple_displaced_step_free_closure);
3197 set_gdbarch_displaced_step_location (gdbarch,
3198 displaced_step_at_entry_point);
3199 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3200
70728992
PA
3201 /* Note that GNU/Linux is the only OS supported on this
3202 platform. */
3203 linux_init_abi (info, gdbarch);
3204
7803799a 3205 switch (tdep->abi)
5769d3cd 3206 {
7803799a 3207 case ABI_LINUX_S390:
d0f54f9d
JB
3208 tdep->gregset = &s390_gregset;
3209 tdep->sizeof_gregset = s390_sizeof_gregset;
3210 tdep->fpregset = &s390_fpregset;
3211 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3212
3213 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3214 set_solib_svr4_fetch_link_map_offsets
3215 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434
UW
3216
3217 if (have_upper)
3218 {
3219 if (have_linux_v2)
3220 set_gdbarch_core_regset_sections (gdbarch,
3221 s390_linux64v2_regset_sections);
3222 else if (have_linux_v1)
3223 set_gdbarch_core_regset_sections (gdbarch,
3224 s390_linux64v1_regset_sections);
3225 else
3226 set_gdbarch_core_regset_sections (gdbarch,
3227 s390_linux64_regset_sections);
3228 }
3229 else
3230 {
3231 if (have_linux_v2)
3232 set_gdbarch_core_regset_sections (gdbarch,
3233 s390_linux32v2_regset_sections);
3234 else if (have_linux_v1)
3235 set_gdbarch_core_regset_sections (gdbarch,
3236 s390_linux32v1_regset_sections);
3237 else
3238 set_gdbarch_core_regset_sections (gdbarch,
3239 s390_linux32_regset_sections);
3240 }
5769d3cd 3241 break;
b0cf273e 3242
7803799a 3243 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3244 tdep->gregset = &s390x_gregset;
3245 tdep->sizeof_gregset = s390x_sizeof_gregset;
3246 tdep->fpregset = &s390_fpregset;
3247 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3248
3249 set_gdbarch_long_bit (gdbarch, 64);
3250 set_gdbarch_long_long_bit (gdbarch, 64);
3251 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3252 set_solib_svr4_fetch_link_map_offsets
3253 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
3254 set_gdbarch_address_class_type_flags (gdbarch,
3255 s390_address_class_type_flags);
3256 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3257 s390_address_class_type_flags_to_name);
3258 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3259 s390_address_class_name_to_type_flags);
c642a434
UW
3260
3261 if (have_linux_v2)
3262 set_gdbarch_core_regset_sections (gdbarch,
3263 s390x_linux64v2_regset_sections);
3264 else if (have_linux_v1)
3265 set_gdbarch_core_regset_sections (gdbarch,
3266 s390x_linux64v1_regset_sections);
3267 else
3268 set_gdbarch_core_regset_sections (gdbarch,
3269 s390x_linux64_regset_sections);
5769d3cd
AC
3270 break;
3271 }
3272
36482093
AC
3273 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3274
982e9687
UW
3275 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3276
b2756930
KB
3277 /* Enable TLS support. */
3278 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3279 svr4_fetch_objfile_link_map);
3280
1dd635ac
UW
3281 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3282
55aa24fb
SDJ
3283 /* SystemTap functions. */
3284 set_gdbarch_stap_register_prefix (gdbarch, "%");
3285 set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
3286 set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
3287 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3288
5769d3cd
AC
3289 return gdbarch;
3290}
3291
3292
a78f21af
AC
3293extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3294
5769d3cd 3295void
5ae5f592 3296_initialize_s390_tdep (void)
5769d3cd 3297{
5769d3cd
AC
3298 /* Hook us into the gdbarch mechanism. */
3299 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3300
94eae614 3301 /* Initialize the GNU/Linux target descriptions. */
7803799a 3302 initialize_tdesc_s390_linux32 ();
c642a434
UW
3303 initialize_tdesc_s390_linux32v1 ();
3304 initialize_tdesc_s390_linux32v2 ();
7803799a 3305 initialize_tdesc_s390_linux64 ();
c642a434
UW
3306 initialize_tdesc_s390_linux64v1 ();
3307 initialize_tdesc_s390_linux64v2 ();
7803799a 3308 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3309 initialize_tdesc_s390x_linux64v1 ();
3310 initialize_tdesc_s390x_linux64v2 ();
5769d3cd 3311}
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