PR25070, SEGV in function _bfd_dwarf2_find_nearest_line
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
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1/* Target-dependent code for s390.
2
42a4f53d 3 Copyright (C) 2001-2019 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21
22#include "arch-utils.h"
23#include "ax-gdb.h"
24#include "dwarf2-frame.h"
25#include "elf/s390.h"
26#include "elf-bfd.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbarch.h"
30#include "gdbcore.h"
31#include "infrun.h"
32#include "linux-tdep.h"
33#include "objfiles.h"
34#include "osabi.h"
35#include "record-full.h"
36#include "regcache.h"
37#include "reggroups.h"
38#include "s390-tdep.h"
39#include "target-descriptions.h"
40#include "trad-frame.h"
41#include "value.h"
42
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43#include "features/s390-linux32.c"
44#include "features/s390x-linux64.c"
45
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46/* Holds the current set of options to be passed to the disassembler. */
47static char *s390_disassembler_options;
48
49/* Breakpoints. */
50
51constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
1022c627
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55/* Types. */
56
57/* Implement the gdbarch type alignment method. */
58
59static ULONGEST
60s390_type_align (gdbarch *gdbarch, struct type *t)
61{
62 t = check_typedef (t);
63
64 if (TYPE_LENGTH (t) > 8)
65 {
66 switch (TYPE_CODE (t))
67 {
68 case TYPE_CODE_INT:
69 case TYPE_CODE_RANGE:
70 case TYPE_CODE_FLT:
71 case TYPE_CODE_ENUM:
72 case TYPE_CODE_CHAR:
73 case TYPE_CODE_BOOL:
74 case TYPE_CODE_DECFLOAT:
75 return 8;
76
77 case TYPE_CODE_ARRAY:
78 if (TYPE_VECTOR (t))
79 return 8;
80 break;
81 }
82 }
83 return 0;
84}
85
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86/* Decoding S/390 instructions. */
87
88/* Read a single instruction from address AT. */
89
90static int
91s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
92{
93 static int s390_instrlen[] = { 2, 4, 4, 6 };
94 int instrlen;
95
96 if (target_read_memory (at, &instr[0], 2))
97 return -1;
98 instrlen = s390_instrlen[instr[0] >> 6];
99 if (instrlen > 2)
100 {
101 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
102 return -1;
103 }
104 return instrlen;
105}
106
107/* The functions below are for recognizing and decoding S/390
108 instructions of various formats. Each of them checks whether INSN
109 is an instruction of the given format, with the specified opcodes.
110 If it is, it sets the remaining arguments to the values of the
111 instruction's fields, and returns a non-zero value; otherwise, it
112 returns zero.
113
114 These functions' arguments appear in the order they appear in the
115 instruction, not in the machine-language form. So, opcodes always
116 come first, even though they're sometimes scattered around the
117 instructions. And displacements appear before base and extension
118 registers, as they do in the assembly syntax, not at the end, as
119 they do in the machine language.
120
121 Test for RI instruction format. */
122
123static int
124is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
125{
126 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
127 {
128 *r1 = (insn[1] >> 4) & 0xf;
129 /* i2 is a 16-bit signed quantity. */
130 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
131 return 1;
132 }
133 else
134 return 0;
135}
136
137/* Test for RIL instruction format. See comment on is_ri for details. */
138
139static int
140is_ril (bfd_byte *insn, int op1, int op2,
141 unsigned int *r1, int *i2)
142{
143 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
144 {
145 *r1 = (insn[1] >> 4) & 0xf;
146 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
147 no sign extension is necessary, but we don't want to assume
148 that. */
149 *i2 = (((insn[2] << 24)
150 | (insn[3] << 16)
151 | (insn[4] << 8)
152 | (insn[5])) ^ 0x80000000) - 0x80000000;
153 return 1;
154 }
155 else
156 return 0;
157}
158
159/* Test for RR instruction format. See comment on is_ri for details. */
160
161static int
162is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
163{
164 if (insn[0] == op)
165 {
166 *r1 = (insn[1] >> 4) & 0xf;
167 *r2 = insn[1] & 0xf;
168 return 1;
169 }
170 else
171 return 0;
172}
173
174/* Test for RRE instruction format. See comment on is_ri for details. */
175
176static int
177is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
178{
179 if (((insn[0] << 8) | insn[1]) == op)
180 {
181 /* Yes, insn[3]. insn[2] is unused in RRE format. */
182 *r1 = (insn[3] >> 4) & 0xf;
183 *r2 = insn[3] & 0xf;
184 return 1;
185 }
186 else
187 return 0;
188}
189
190/* Test for RS instruction format. See comment on is_ri for details. */
191
192static int
193is_rs (bfd_byte *insn, int op,
194 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
195{
196 if (insn[0] == op)
197 {
198 *r1 = (insn[1] >> 4) & 0xf;
199 *r3 = insn[1] & 0xf;
200 *b2 = (insn[2] >> 4) & 0xf;
201 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
202 return 1;
203 }
204 else
205 return 0;
206}
207
208/* Test for RSY instruction format. See comment on is_ri for details. */
209
210static int
211is_rsy (bfd_byte *insn, int op1, int op2,
212 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
213{
214 if (insn[0] == op1
215 && insn[5] == op2)
216 {
217 *r1 = (insn[1] >> 4) & 0xf;
218 *r3 = insn[1] & 0xf;
219 *b2 = (insn[2] >> 4) & 0xf;
220 /* The 'long displacement' is a 20-bit signed integer. */
221 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
222 ^ 0x80000) - 0x80000;
223 return 1;
224 }
225 else
226 return 0;
227}
228
229/* Test for RX instruction format. See comment on is_ri for details. */
230
231static int
232is_rx (bfd_byte *insn, int op,
233 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
234{
235 if (insn[0] == op)
236 {
237 *r1 = (insn[1] >> 4) & 0xf;
238 *x2 = insn[1] & 0xf;
239 *b2 = (insn[2] >> 4) & 0xf;
240 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
241 return 1;
242 }
243 else
244 return 0;
245}
246
247/* Test for RXY instruction format. See comment on is_ri for details. */
248
249static int
250is_rxy (bfd_byte *insn, int op1, int op2,
251 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
252{
253 if (insn[0] == op1
254 && insn[5] == op2)
255 {
256 *r1 = (insn[1] >> 4) & 0xf;
257 *x2 = insn[1] & 0xf;
258 *b2 = (insn[2] >> 4) & 0xf;
259 /* The 'long displacement' is a 20-bit signed integer. */
260 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
261 ^ 0x80000) - 0x80000;
262 return 1;
263 }
264 else
265 return 0;
266}
267
268/* A helper for s390_software_single_step, decides if an instruction
269 is a partial-execution instruction that needs to be executed until
270 completion when in record mode. If it is, returns 1 and writes
271 instruction length to a pointer. */
272
273static int
274s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
275{
276 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
277 uint16_t insn;
278
279 insn = read_memory_integer (loc, 2, byte_order);
280
281 switch (insn >> 8)
282 {
283 case 0xa8: /* MVCLE */
284 *len = 4;
285 return 1;
286
287 case 0xeb:
288 {
289 insn = read_memory_integer (loc + 4, 2, byte_order);
290 if ((insn & 0xff) == 0x8e)
291 {
292 /* MVCLU */
293 *len = 6;
294 return 1;
295 }
296 }
297 break;
298 }
299
300 switch (insn)
301 {
302 case 0xb255: /* MVST */
303 case 0xb263: /* CMPSC */
304 case 0xb2a5: /* TRE */
305 case 0xb2a6: /* CU21 */
306 case 0xb2a7: /* CU12 */
307 case 0xb9b0: /* CU14 */
308 case 0xb9b1: /* CU24 */
309 case 0xb9b2: /* CU41 */
310 case 0xb9b3: /* CU42 */
311 case 0xb92a: /* KMF */
312 case 0xb92b: /* KMO */
313 case 0xb92f: /* KMC */
314 case 0xb92d: /* KMCTR */
315 case 0xb92e: /* KM */
316 case 0xb93c: /* PPNO */
317 case 0xb990: /* TRTT */
318 case 0xb991: /* TRTO */
319 case 0xb992: /* TROT */
320 case 0xb993: /* TROO */
321 *len = 4;
322 return 1;
323 }
324
325 return 0;
326}
327
328/* Implement the "software_single_step" gdbarch method, needed to single step
329 through instructions like MVCLE in record mode, to make sure they are
330 executed to completion. Without that, record will save the full length
331 of destination buffer on every iteration, even though the CPU will only
332 process about 4kiB of it each time, leading to O(n**2) memory and time
333 complexity. */
334
335static std::vector<CORE_ADDR>
336s390_software_single_step (struct regcache *regcache)
337{
338 struct gdbarch *gdbarch = regcache->arch ();
339 CORE_ADDR loc = regcache_read_pc (regcache);
340 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
341 int len;
342 uint16_t insn;
343
344 /* Special handling only if recording. */
345 if (!record_full_is_used ())
346 return {};
347
348 /* First, match a partial instruction. */
349 if (!s390_is_partial_instruction (gdbarch, loc, &len))
350 return {};
351
352 loc += len;
353
354 /* Second, look for a branch back to it. */
355 insn = read_memory_integer (loc, 2, byte_order);
356 if (insn != 0xa714) /* BRC with mask 1 */
357 return {};
358
359 insn = read_memory_integer (loc + 2, 2, byte_order);
360 if (insn != (uint16_t) -(len / 2))
361 return {};
362
363 loc += 4;
364
365 /* Found it, step past the whole thing. */
366 return {loc};
367}
368
369/* Displaced stepping. */
370
371/* Return true if INSN is a non-branch RIL-b or RIL-c format
372 instruction. */
373
374static int
375is_non_branch_ril (gdb_byte *insn)
376{
377 gdb_byte op1 = insn[0];
378
379 if (op1 == 0xc4)
380 {
381 gdb_byte op2 = insn[1] & 0x0f;
382
383 switch (op2)
384 {
385 case 0x02: /* llhrl */
386 case 0x04: /* lghrl */
387 case 0x05: /* lhrl */
388 case 0x06: /* llghrl */
389 case 0x07: /* sthrl */
390 case 0x08: /* lgrl */
391 case 0x0b: /* stgrl */
392 case 0x0c: /* lgfrl */
393 case 0x0d: /* lrl */
394 case 0x0e: /* llgfrl */
395 case 0x0f: /* strl */
396 return 1;
397 }
398 }
399 else if (op1 == 0xc6)
400 {
401 gdb_byte op2 = insn[1] & 0x0f;
402
403 switch (op2)
404 {
405 case 0x00: /* exrl */
406 case 0x02: /* pfdrl */
407 case 0x04: /* cghrl */
408 case 0x05: /* chrl */
409 case 0x06: /* clghrl */
410 case 0x07: /* clhrl */
411 case 0x08: /* cgrl */
412 case 0x0a: /* clgrl */
413 case 0x0c: /* cgfrl */
414 case 0x0d: /* crl */
415 case 0x0e: /* clgfrl */
416 case 0x0f: /* clrl */
417 return 1;
418 }
419 }
420
421 return 0;
422}
423
424typedef buf_displaced_step_closure s390_displaced_step_closure;
425
426/* Implementation of gdbarch_displaced_step_copy_insn. */
427
428static struct displaced_step_closure *
429s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
430 CORE_ADDR from, CORE_ADDR to,
431 struct regcache *regs)
432{
433 size_t len = gdbarch_max_insn_length (gdbarch);
434 std::unique_ptr<s390_displaced_step_closure> closure
435 (new s390_displaced_step_closure (len));
436 gdb_byte *buf = closure->buf.data ();
437
438 read_memory (from, buf, len);
439
440 /* Adjust the displacement field of PC-relative RIL instructions,
441 except branches. The latter are handled in the fixup hook. */
442 if (is_non_branch_ril (buf))
443 {
444 LONGEST offset;
445
446 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
447 offset = (from - to + offset * 2) / 2;
448
449 /* If the instruction is too far from the jump pad, punt. This
450 will usually happen with instructions in shared libraries.
451 We could probably support these by rewriting them to be
452 absolute or fully emulating them. */
453 if (offset < INT32_MIN || offset > INT32_MAX)
454 {
455 /* Let the core fall back to stepping over the breakpoint
456 in-line. */
457 if (debug_displaced)
458 {
459 fprintf_unfiltered (gdb_stdlog,
460 "displaced: can't displaced step "
461 "RIL instruction: offset %s out of range\n",
462 plongest (offset));
463 }
464
465 return NULL;
466 }
467
468 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
469 }
470
471 write_memory (to, buf, len);
472
473 if (debug_displaced)
474 {
475 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
476 paddress (gdbarch, from), paddress (gdbarch, to));
477 displaced_step_dump_bytes (gdb_stdlog, buf, len);
478 }
479
480 return closure.release ();
481}
482
483/* Fix up the state of registers and memory after having single-stepped
484 a displaced instruction. */
485
486static void
487s390_displaced_step_fixup (struct gdbarch *gdbarch,
488 struct displaced_step_closure *closure_,
489 CORE_ADDR from, CORE_ADDR to,
490 struct regcache *regs)
491{
492 /* Our closure is a copy of the instruction. */
493 s390_displaced_step_closure *closure
494 = (s390_displaced_step_closure *) closure_;
495 gdb_byte *insn = closure->buf.data ();
496 static int s390_instrlen[] = { 2, 4, 4, 6 };
497 int insnlen = s390_instrlen[insn[0] >> 6];
498
499 /* Fields for various kinds of instructions. */
500 unsigned int b2, r1, r2, x2, r3;
501 int i2, d2;
502
503 /* Get current PC and addressing mode bit. */
504 CORE_ADDR pc = regcache_read_pc (regs);
505 ULONGEST amode = 0;
506
507 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
508 {
509 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
510 amode &= 0x80000000;
511 }
512
513 if (debug_displaced)
514 fprintf_unfiltered (gdb_stdlog,
515 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
516 paddress (gdbarch, from), paddress (gdbarch, to),
517 paddress (gdbarch, pc), insnlen, (int) amode);
518
519 /* Handle absolute branch and save instructions. */
520 if (is_rr (insn, op_basr, &r1, &r2)
521 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
522 {
523 /* Recompute saved return address in R1. */
524 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
525 amode | (from + insnlen));
5c1eda30
AA
526 /* Update PC iff the instruction doesn't actually branch. */
527 if (insn[0] == op_basr && r2 == 0)
528 regcache_write_pc (regs, from + insnlen);
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529 }
530
531 /* Handle absolute branch instructions. */
532 else if (is_rr (insn, op_bcr, &r1, &r2)
533 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
534 || is_rr (insn, op_bctr, &r1, &r2)
535 || is_rre (insn, op_bctgr, &r1, &r2)
536 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
537 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
538 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
539 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
540 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
541 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
542 {
543 /* Update PC iff branch was *not* taken. */
544 if (pc == to + insnlen)
545 regcache_write_pc (regs, from + insnlen);
546 }
547
548 /* Handle PC-relative branch and save instructions. */
549 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
550 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
551 {
552 /* Update PC. */
553 regcache_write_pc (regs, pc - to + from);
554 /* Recompute saved return address in R1. */
555 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
556 amode | (from + insnlen));
557 }
558
559 /* Handle LOAD ADDRESS RELATIVE LONG. */
560 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
561 {
562 /* Update PC. */
563 regcache_write_pc (regs, from + insnlen);
564 /* Recompute output address in R1. */
565 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
566 amode | (from + i2 * 2));
567 }
568
569 /* If we executed a breakpoint instruction, point PC right back at it. */
570 else if (insn[0] == 0x0 && insn[1] == 0x1)
571 regcache_write_pc (regs, from);
572
573 /* For any other insn, adjust PC by negated displacement. PC then
574 points right after the original instruction, except for PC-relative
575 branches, where it points to the adjusted branch target. */
576 else
577 regcache_write_pc (regs, pc - to + from);
578
579 if (debug_displaced)
580 fprintf_unfiltered (gdb_stdlog,
581 "displaced: (s390) pc is now %s\n",
582 paddress (gdbarch, regcache_read_pc (regs)));
583}
584
585/* Implement displaced_step_hw_singlestep gdbarch method. */
586
587static int
588s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
589 struct displaced_step_closure *closure)
590{
591 return 1;
592}
593
594/* Prologue analysis. */
595
596struct s390_prologue_data {
597
598 /* The stack. */
599 struct pv_area *stack;
600
601 /* The size and byte-order of a GPR or FPR. */
602 int gpr_size;
603 int fpr_size;
604 enum bfd_endian byte_order;
605
606 /* The general-purpose registers. */
607 pv_t gpr[S390_NUM_GPRS];
608
609 /* The floating-point registers. */
610 pv_t fpr[S390_NUM_FPRS];
611
612 /* The offset relative to the CFA where the incoming GPR N was saved
613 by the function prologue. 0 if not saved or unknown. */
614 int gpr_slot[S390_NUM_GPRS];
615
616 /* Likewise for FPRs. */
617 int fpr_slot[S390_NUM_FPRS];
618
619 /* Nonzero if the backchain was saved. This is assumed to be the
620 case when the incoming SP is saved at the current SP location. */
621 int back_chain_saved_p;
622};
623
624/* Return the effective address for an X-style instruction, like:
625
626 L R1, D2(X2, B2)
627
628 Here, X2 and B2 are registers, and D2 is a signed 20-bit
629 constant; the effective address is the sum of all three. If either
630 X2 or B2 are zero, then it doesn't contribute to the sum --- this
631 means that r0 can't be used as either X2 or B2. */
632
633static pv_t
634s390_addr (struct s390_prologue_data *data,
635 int d2, unsigned int x2, unsigned int b2)
636{
637 pv_t result;
638
639 result = pv_constant (d2);
640 if (x2)
641 result = pv_add (result, data->gpr[x2]);
642 if (b2)
643 result = pv_add (result, data->gpr[b2]);
644
645 return result;
646}
647
648/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
649
650static void
651s390_store (struct s390_prologue_data *data,
652 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
653 pv_t value)
654{
655 pv_t addr = s390_addr (data, d2, x2, b2);
656 pv_t offset;
657
658 /* Check whether we are storing the backchain. */
659 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
660
661 if (pv_is_constant (offset) && offset.k == 0)
662 if (size == data->gpr_size
663 && pv_is_register_k (value, S390_SP_REGNUM, 0))
664 {
665 data->back_chain_saved_p = 1;
666 return;
667 }
668
669 /* Check whether we are storing a register into the stack. */
670 if (!data->stack->store_would_trash (addr))
671 data->stack->store (addr, size, value);
672
673 /* Note: If this is some store we cannot identify, you might think we
674 should forget our cached values, as any of those might have been hit.
675
676 However, we make the assumption that the register save areas are only
677 ever stored to once in any given function, and we do recognize these
678 stores. Thus every store we cannot recognize does not hit our data. */
679}
680
681/* Do a SIZE-byte load from D2(X2,B2). */
682
683static pv_t
684s390_load (struct s390_prologue_data *data,
685 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
686
687{
688 pv_t addr = s390_addr (data, d2, x2, b2);
689
690 /* If it's a load from an in-line constant pool, then we can
691 simulate that, under the assumption that the code isn't
692 going to change between the time the processor actually
693 executed it creating the current frame, and the time when
694 we're analyzing the code to unwind past that frame. */
695 if (pv_is_constant (addr))
696 {
697 struct target_section *secp;
8b88a78e 698 secp = target_section_by_addr (current_top_target (), addr.k);
d6e58945 699 if (secp != NULL
fd361982 700 && (bfd_section_flags (secp->the_bfd_section) & SEC_READONLY))
d6e58945
PR
701 return pv_constant (read_memory_integer (addr.k, size,
702 data->byte_order));
703 }
704
705 /* Check whether we are accessing one of our save slots. */
706 return data->stack->fetch (addr, size);
707}
708
709/* Function for finding saved registers in a 'struct pv_area'; we pass
710 this to pv_area::scan.
711
712 If VALUE is a saved register, ADDR says it was saved at a constant
713 offset from the frame base, and SIZE indicates that the whole
714 register was saved, record its offset in the reg_offset table in
715 PROLOGUE_UNTYPED. */
716
717static void
718s390_check_for_saved (void *data_untyped, pv_t addr,
719 CORE_ADDR size, pv_t value)
720{
721 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
722 int i, offset;
723
724 if (!pv_is_register (addr, S390_SP_REGNUM))
725 return;
726
727 offset = 16 * data->gpr_size + 32 - addr.k;
728
729 /* If we are storing the original value of a register, we want to
730 record the CFA offset. If the same register is stored multiple
731 times, the stack slot with the highest address counts. */
732
733 for (i = 0; i < S390_NUM_GPRS; i++)
734 if (size == data->gpr_size
735 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
736 if (data->gpr_slot[i] == 0
737 || data->gpr_slot[i] > offset)
738 {
739 data->gpr_slot[i] = offset;
740 return;
741 }
742
743 for (i = 0; i < S390_NUM_FPRS; i++)
744 if (size == data->fpr_size
745 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
746 if (data->fpr_slot[i] == 0
747 || data->fpr_slot[i] > offset)
748 {
749 data->fpr_slot[i] = offset;
750 return;
751 }
752}
753
754/* Analyze the prologue of the function starting at START_PC, continuing at
755 most until CURRENT_PC. Initialize DATA to hold all information we find
756 out about the state of the registers and stack slots. Return the address
757 of the instruction after the last one that changed the SP, FP, or back
758 chain; or zero on error. */
759
760static CORE_ADDR
761s390_analyze_prologue (struct gdbarch *gdbarch,
762 CORE_ADDR start_pc,
763 CORE_ADDR current_pc,
764 struct s390_prologue_data *data)
765{
766 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
767
768 /* Our return value:
769 The address of the instruction after the last one that changed
770 the SP, FP, or back chain; zero if we got an error trying to
771 read memory. */
772 CORE_ADDR result = start_pc;
773
774 /* The current PC for our abstract interpretation. */
775 CORE_ADDR pc;
776
777 /* The address of the next instruction after that. */
778 CORE_ADDR next_pc;
779
780 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
781 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
782
783 /* Set up everything's initial value. */
784 {
785 int i;
786
787 /* For the purpose of prologue tracking, we consider the GPR size to
788 be equal to the ABI word size, even if it is actually larger
789 (i.e. when running a 32-bit binary under a 64-bit kernel). */
790 data->gpr_size = word_size;
791 data->fpr_size = 8;
792 data->byte_order = gdbarch_byte_order (gdbarch);
793
794 for (i = 0; i < S390_NUM_GPRS; i++)
795 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
796
797 for (i = 0; i < S390_NUM_FPRS; i++)
798 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
799
800 for (i = 0; i < S390_NUM_GPRS; i++)
801 data->gpr_slot[i] = 0;
802
803 for (i = 0; i < S390_NUM_FPRS; i++)
804 data->fpr_slot[i] = 0;
805
806 data->back_chain_saved_p = 0;
807 }
808
809 /* Start interpreting instructions, until we hit the frame's
810 current PC or the first branch instruction. */
811 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
812 {
813 bfd_byte insn[S390_MAX_INSTR_SIZE];
814 int insn_len = s390_readinstruction (insn, pc);
815
816 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
817 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
818 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
819
820 /* Fields for various kinds of instructions. */
821 unsigned int b2, r1, r2, x2, r3;
822 int i2, d2;
823
824 /* The values of SP and FP before this instruction,
825 for detecting instructions that change them. */
826 pv_t pre_insn_sp, pre_insn_fp;
827 /* Likewise for the flag whether the back chain was saved. */
828 int pre_insn_back_chain_saved_p;
829
830 /* If we got an error trying to read the instruction, report it. */
831 if (insn_len < 0)
832 {
833 result = 0;
834 break;
835 }
836
837 next_pc = pc + insn_len;
838
839 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
840 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
841 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
842
843 /* LHI r1, i2 --- load halfword immediate. */
844 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
845 /* LGFI r1, i2 --- load fullword immediate. */
846 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
847 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
848 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
849 data->gpr[r1] = pv_constant (i2);
850
851 /* LR r1, r2 --- load from register. */
852 /* LGR r1, r2 --- load from register (64-bit version). */
853 else if (is_rr (insn32, op_lr, &r1, &r2)
854 || is_rre (insn64, op_lgr, &r1, &r2))
855 data->gpr[r1] = data->gpr[r2];
856
857 /* L r1, d2(x2, b2) --- load. */
858 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
859 /* LG r1, d2(x2, b2) --- load (64-bit version). */
860 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
861 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
862 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
863 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
864
865 /* ST r1, d2(x2, b2) --- store. */
866 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
867 /* STG r1, d2(x2, b2) --- store (64-bit version). */
868 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
869 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
870 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
871 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
872
873 /* STD r1, d2(x2,b2) --- store floating-point register. */
874 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
875 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
876
877 /* STM r1, r3, d2(b2) --- store multiple. */
878 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
879 version). */
880 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
881 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
882 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
883 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
884 {
885 for (; r1 <= r3; r1++, d2 += data->gpr_size)
886 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
887 }
888
889 /* AHI r1, i2 --- add halfword immediate. */
890 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
891 /* AFI r1, i2 --- add fullword immediate. */
892 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
893 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
894 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
895 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
896 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
897 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
898
899 /* ALFI r1, i2 --- add logical immediate. */
900 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
901 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
902 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
903 data->gpr[r1] = pv_add_constant (data->gpr[r1],
904 (CORE_ADDR)i2 & 0xffffffff);
905
906 /* AR r1, r2 -- add register. */
907 /* AGR r1, r2 -- add register (64-bit version). */
908 else if (is_rr (insn32, op_ar, &r1, &r2)
909 || is_rre (insn64, op_agr, &r1, &r2))
910 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
911
912 /* A r1, d2(x2, b2) -- add. */
913 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
914 /* AG r1, d2(x2, b2) -- add (64-bit version). */
915 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
916 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
917 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
918 data->gpr[r1] = pv_add (data->gpr[r1],
919 s390_load (data, d2, x2, b2, data->gpr_size));
920
921 /* SLFI r1, i2 --- subtract logical immediate. */
922 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
923 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
924 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
925 data->gpr[r1] = pv_add_constant (data->gpr[r1],
926 -((CORE_ADDR)i2 & 0xffffffff));
927
928 /* SR r1, r2 -- subtract register. */
929 /* SGR r1, r2 -- subtract register (64-bit version). */
930 else if (is_rr (insn32, op_sr, &r1, &r2)
931 || is_rre (insn64, op_sgr, &r1, &r2))
932 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
933
934 /* S r1, d2(x2, b2) -- subtract. */
935 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
936 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
937 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
938 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
939 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
940 data->gpr[r1] = pv_subtract (data->gpr[r1],
941 s390_load (data, d2, x2, b2, data->gpr_size));
942
943 /* LA r1, d2(x2, b2) --- load address. */
944 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
945 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
946 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
947 data->gpr[r1] = s390_addr (data, d2, x2, b2);
948
949 /* LARL r1, i2 --- load address relative long. */
950 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
951 data->gpr[r1] = pv_constant (pc + i2 * 2);
952
953 /* BASR r1, 0 --- branch and save.
954 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
955 else if (is_rr (insn, op_basr, &r1, &r2)
956 && r2 == 0)
957 data->gpr[r1] = pv_constant (next_pc);
958
959 /* BRAS r1, i2 --- branch relative and save. */
960 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
961 {
962 data->gpr[r1] = pv_constant (next_pc);
963 next_pc = pc + i2 * 2;
964
965 /* We'd better not interpret any backward branches. We'll
966 never terminate. */
967 if (next_pc <= pc)
968 break;
969 }
970
971 /* BRC/BRCL -- branch relative on condition. Ignore "branch
972 never", branch to following instruction, and "conditional
973 trap" (BRC +2). Otherwise terminate search. */
974 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
975 {
976 if (r1 != 0 && i2 != 1 && i2 != 2)
977 break;
978 }
979 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
980 {
981 if (r1 != 0 && i2 != 3)
982 break;
983 }
984
985 /* Terminate search when hitting any other branch instruction. */
986 else if (is_rr (insn, op_basr, &r1, &r2)
987 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
988 || is_rr (insn, op_bcr, &r1, &r2)
989 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
990 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
991 break;
992
993 else
994 {
995 /* An instruction we don't know how to simulate. The only
996 safe thing to do would be to set every value we're tracking
997 to 'unknown'. Instead, we'll be optimistic: we assume that
998 we *can* interpret every instruction that the compiler uses
999 to manipulate any of the data we're interested in here --
1000 then we can just ignore anything else. */
1001 }
1002
1003 /* Record the address after the last instruction that changed
1004 the FP, SP, or backlink. Ignore instructions that changed
1005 them back to their original values --- those are probably
1006 restore instructions. (The back chain is never restored,
1007 just popped.) */
1008 {
1009 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1010 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1011
1012 if ((! pv_is_identical (pre_insn_sp, sp)
1013 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1014 && sp.kind != pvk_unknown)
1015 || (! pv_is_identical (pre_insn_fp, fp)
1016 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1017 && fp.kind != pvk_unknown)
1018 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1019 result = next_pc;
1020 }
1021 }
1022
1023 /* Record where all the registers were saved. */
1024 data->stack->scan (s390_check_for_saved, data);
1025
1026 return result;
1027}
1028
1029/* Advance PC across any function entry prologue instructions to reach
1030 some "real" code. */
1031
1032static CORE_ADDR
1033s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1034{
1035 struct s390_prologue_data data;
1036 CORE_ADDR skip_pc, func_addr;
1037
1038 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1039 {
1040 CORE_ADDR post_prologue_pc
1041 = skip_prologue_using_sal (gdbarch, func_addr);
1042 if (post_prologue_pc != 0)
1043 return std::max (pc, post_prologue_pc);
1044 }
1045
1046 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1047 return skip_pc ? skip_pc : pc;
1048}
1049
1050/* Register handling. */
1051
1052/* ABI call-saved register information. */
1053
1054static int
1055s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1056{
1057 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1058
1059 switch (tdep->abi)
1060 {
1061 case ABI_LINUX_S390:
1062 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1063 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1064 || regnum == S390_A0_REGNUM)
1065 return 1;
1066
1067 break;
1068
1069 case ABI_LINUX_ZSERIES:
1070 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1071 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1072 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1073 return 1;
1074
1075 break;
1076 }
1077
1078 return 0;
1079}
1080
1081/* The "guess_tracepoint_registers" gdbarch method. */
1082
1083static void
1084s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1085 struct regcache *regcache,
1086 CORE_ADDR addr)
1087{
1088 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1089 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1090 gdb_byte *reg = (gdb_byte *) alloca (sz);
1091 ULONGEST pswm, pswa;
1092
1093 /* Set PSWA from the location and a default PSWM (the only part we're
1094 unlikely to get right is the CC). */
1095 if (tdep->abi == ABI_LINUX_S390)
1096 {
1097 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1098 was in 24-bit mode). */
1099 pswa = addr | 0x80000000UL;
1100 pswm = 0x070d0000UL;
1101 }
1102 else
1103 {
1104 pswa = addr;
1105 pswm = 0x0705000180000000ULL;
1106 }
1107
1108 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
73e1c03f 1109 regcache->raw_supply (S390_PSWA_REGNUM, reg);
d6e58945
PR
1110
1111 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
73e1c03f 1112 regcache->raw_supply (S390_PSWM_REGNUM, reg);
d6e58945
PR
1113}
1114
1115/* Return the name of register REGNO. Return the empty string for
1116 registers that shouldn't be visible. */
1117
1118static const char *
1119s390_register_name (struct gdbarch *gdbarch, int regnum)
1120{
1121 if (regnum >= S390_V0_LOWER_REGNUM
1122 && regnum <= S390_V15_LOWER_REGNUM)
1123 return "";
1124 return tdesc_register_name (gdbarch, regnum);
1125}
1126
1127/* DWARF Register Mapping. */
1128
1129static const short s390_dwarf_regmap[] =
1130{
1131 /* 0-15: General Purpose Registers. */
1132 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1133 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1134 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1135 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1136
1137 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1138 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1139 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1140 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1141 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1142
1143 /* 32-47: Control Registers (not mapped). */
1144 -1, -1, -1, -1, -1, -1, -1, -1,
1145 -1, -1, -1, -1, -1, -1, -1, -1,
1146
1147 /* 48-63: Access Registers. */
1148 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1149 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1150 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1151 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1152
1153 /* 64-65: Program Status Word. */
1154 S390_PSWM_REGNUM,
1155 S390_PSWA_REGNUM,
1156
1157 /* 66-67: Reserved. */
1158 -1, -1,
1159
1160 /* 68-83: Vector Registers 16-31. */
1161 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1162 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1163 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1164 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1165
1166 /* End of "official" DWARF registers. The remainder of the map is
1167 for GDB internal use only. */
1168
1169 /* GPR Lower Half Access. */
1170 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1171 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1172 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1173 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1174};
1175
1176enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1177
1178/* Convert DWARF register number REG to the appropriate register
1179 number used by GDB. */
1180
1181static int
1182s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1183{
1184 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1185 int gdb_reg = -1;
1186
1187 /* In a 32-on-64 debug scenario, debug info refers to the full
1188 64-bit GPRs. Note that call frame information still refers to
1189 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1190 special register numbers to access GPRs. */
1191 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1192 return tdep->gpr_full_regnum + reg;
1193
1194 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1195 gdb_reg = s390_dwarf_regmap[reg];
1196
1197 if (tdep->v0_full_regnum == -1)
1198 {
1199 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1200 gdb_reg = -1;
1201 }
1202 else
1203 {
1204 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1205 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1206 }
1207
1208 return gdb_reg;
1209}
1210
1211/* Pseudo registers. */
1212
1213/* Check whether REGNUM indicates a coupled general purpose register.
1214 These pseudo-registers are composed of two adjacent gprs. */
1215
1216static int
1217regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1218{
1219 return (tdep->gpr_full_regnum != -1
1220 && regnum >= tdep->gpr_full_regnum
1221 && regnum <= tdep->gpr_full_regnum + 15);
1222}
1223
1224/* Check whether REGNUM indicates a full vector register (v0-v15).
1225 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1226
1227static int
1228regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1229{
1230 return (tdep->v0_full_regnum != -1
1231 && regnum >= tdep->v0_full_regnum
1232 && regnum <= tdep->v0_full_regnum + 15);
1233}
1234
1235/* 'float' values are stored in the upper half of floating-point
1236 registers, even though we are otherwise a big-endian platform. The
1237 same applies to a 'float' value within a vector. */
1238
1239static struct value *
1240s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1241 int regnum, struct frame_id frame_id)
1242{
1243 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1244 struct value *value = default_value_from_register (gdbarch, type,
1245 regnum, frame_id);
1246 check_typedef (type);
1247
1248 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1249 && TYPE_LENGTH (type) < 8)
1250 || regnum_is_vxr_full (tdep, regnum)
1251 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1252 set_value_offset (value, 0);
1253
1254 return value;
1255}
1256
1257/* Implement pseudo_register_name tdesc method. */
1258
1259static const char *
1260s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1261{
1262 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1263
1264 if (regnum == tdep->pc_regnum)
1265 return "pc";
1266
1267 if (regnum == tdep->cc_regnum)
1268 return "cc";
1269
1270 if (regnum_is_gpr_full (tdep, regnum))
1271 {
1272 static const char *full_name[] = {
1273 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1274 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1275 };
1276 return full_name[regnum - tdep->gpr_full_regnum];
1277 }
1278
1279 if (regnum_is_vxr_full (tdep, regnum))
1280 {
1281 static const char *full_name[] = {
1282 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1283 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1284 };
1285 return full_name[regnum - tdep->v0_full_regnum];
1286 }
1287
1288 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1289}
1290
1291/* Implement pseudo_register_type tdesc method. */
1292
1293static struct type *
1294s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1295{
1296 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1297
1298 if (regnum == tdep->pc_regnum)
1299 return builtin_type (gdbarch)->builtin_func_ptr;
1300
1301 if (regnum == tdep->cc_regnum)
1302 return builtin_type (gdbarch)->builtin_int;
1303
1304 if (regnum_is_gpr_full (tdep, regnum))
1305 return builtin_type (gdbarch)->builtin_uint64;
1306
0667c506 1307 /* For the "concatenated" vector registers use the same type as v16. */
d6e58945 1308 if (regnum_is_vxr_full (tdep, regnum))
0667c506 1309 return tdesc_register_type (gdbarch, S390_V16_REGNUM);
d6e58945
PR
1310
1311 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1312}
1313
1314/* Implement pseudo_register_read gdbarch method. */
1315
1316static enum register_status
849d0ba8 1317s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
d6e58945
PR
1318 int regnum, gdb_byte *buf)
1319{
1320 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1321 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1322 int regsize = register_size (gdbarch, regnum);
1323 ULONGEST val;
1324
1325 if (regnum == tdep->pc_regnum)
1326 {
1327 enum register_status status;
1328
1329 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1330 if (status == REG_VALID)
1331 {
1332 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1333 val &= 0x7fffffff;
1334 store_unsigned_integer (buf, regsize, byte_order, val);
1335 }
1336 return status;
1337 }
1338
1339 if (regnum == tdep->cc_regnum)
1340 {
1341 enum register_status status;
1342
1343 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1344 if (status == REG_VALID)
1345 {
1346 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1347 val = (val >> 12) & 3;
1348 else
1349 val = (val >> 44) & 3;
1350 store_unsigned_integer (buf, regsize, byte_order, val);
1351 }
1352 return status;
1353 }
1354
1355 if (regnum_is_gpr_full (tdep, regnum))
1356 {
1357 enum register_status status;
1358 ULONGEST val_upper;
1359
1360 regnum -= tdep->gpr_full_regnum;
1361
1362 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1363 if (status == REG_VALID)
1364 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1365 &val_upper);
1366 if (status == REG_VALID)
1367 {
1368 val |= val_upper << 32;
1369 store_unsigned_integer (buf, regsize, byte_order, val);
1370 }
1371 return status;
1372 }
1373
1374 if (regnum_is_vxr_full (tdep, regnum))
1375 {
1376 enum register_status status;
1377
1378 regnum -= tdep->v0_full_regnum;
1379
1380 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1381 if (status == REG_VALID)
1382 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1383 return status;
1384 }
1385
1386 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1387}
1388
1389/* Implement pseudo_register_write gdbarch method. */
1390
1391static void
1392s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1393 int regnum, const gdb_byte *buf)
1394{
1395 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1396 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1397 int regsize = register_size (gdbarch, regnum);
1398 ULONGEST val, psw;
1399
1400 if (regnum == tdep->pc_regnum)
1401 {
1402 val = extract_unsigned_integer (buf, regsize, byte_order);
1403 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1404 {
1405 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1406 val = (psw & 0x80000000) | (val & 0x7fffffff);
1407 }
1408 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1409 return;
1410 }
1411
1412 if (regnum == tdep->cc_regnum)
1413 {
1414 val = extract_unsigned_integer (buf, regsize, byte_order);
1415 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1416 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1417 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1418 else
1419 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1420 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1421 return;
1422 }
1423
1424 if (regnum_is_gpr_full (tdep, regnum))
1425 {
1426 regnum -= tdep->gpr_full_regnum;
1427 val = extract_unsigned_integer (buf, regsize, byte_order);
1428 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1429 val & 0xffffffff);
1430 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1431 val >> 32);
1432 return;
1433 }
1434
1435 if (regnum_is_vxr_full (tdep, regnum))
1436 {
1437 regnum -= tdep->v0_full_regnum;
10eaee5f
SM
1438 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1439 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
d6e58945
PR
1440 return;
1441 }
1442
1443 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1444}
1445
1446/* Register groups. */
1447
1448/* Implement pseudo_register_reggroup_p tdesc method. */
1449
1450static int
1451s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1452 struct reggroup *group)
1453{
1454 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1455
1456 /* We usually save/restore the whole PSW, which includes PC and CC.
1457 However, some older gdbservers may not support saving/restoring
1458 the whole PSW yet, and will return an XML register description
1459 excluding those from the save/restore register groups. In those
1460 cases, we still need to explicitly save/restore PC and CC in order
1461 to push or pop frames. Since this doesn't hurt anything if we
1462 already save/restore the whole PSW (it's just redundant), we add
1463 PC and CC at this point unconditionally. */
1464 if (group == save_reggroup || group == restore_reggroup)
1465 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1466
1467 if (group == vector_reggroup)
1468 return regnum_is_vxr_full (tdep, regnum);
1469
1470 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1471 return 0;
1472
1473 return default_register_reggroup_p (gdbarch, regnum, group);
1474}
1475
1476/* The "ax_pseudo_register_collect" gdbarch method. */
1477
1478static int
1479s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1480 struct agent_expr *ax, int regnum)
1481{
1482 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1483 if (regnum == tdep->pc_regnum)
1484 {
1485 ax_reg_mask (ax, S390_PSWA_REGNUM);
1486 }
1487 else if (regnum == tdep->cc_regnum)
1488 {
1489 ax_reg_mask (ax, S390_PSWM_REGNUM);
1490 }
1491 else if (regnum_is_gpr_full (tdep, regnum))
1492 {
1493 regnum -= tdep->gpr_full_regnum;
1494 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1495 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1496 }
1497 else if (regnum_is_vxr_full (tdep, regnum))
1498 {
1499 regnum -= tdep->v0_full_regnum;
1500 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1501 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1502 }
1503 else
1504 {
1505 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1506 }
1507 return 0;
1508}
1509
1510/* The "ax_pseudo_register_push_stack" gdbarch method. */
1511
1512static int
1513s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1514 struct agent_expr *ax, int regnum)
1515{
1516 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1517 if (regnum == tdep->pc_regnum)
1518 {
1519 ax_reg (ax, S390_PSWA_REGNUM);
1520 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1521 {
1522 ax_zero_ext (ax, 31);
1523 }
1524 }
1525 else if (regnum == tdep->cc_regnum)
1526 {
1527 ax_reg (ax, S390_PSWM_REGNUM);
1528 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1529 ax_const_l (ax, 12);
1530 else
1531 ax_const_l (ax, 44);
1532 ax_simple (ax, aop_rsh_unsigned);
1533 ax_zero_ext (ax, 2);
1534 }
1535 else if (regnum_is_gpr_full (tdep, regnum))
1536 {
1537 regnum -= tdep->gpr_full_regnum;
1538 ax_reg (ax, S390_R0_REGNUM + regnum);
1539 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1540 ax_const_l (ax, 32);
1541 ax_simple (ax, aop_lsh);
1542 ax_simple (ax, aop_bit_or);
1543 }
1544 else if (regnum_is_vxr_full (tdep, regnum))
1545 {
1546 /* Too large to stuff on the stack. */
1547 return 1;
1548 }
1549 else
1550 {
1551 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1552 }
1553 return 0;
1554}
1555
1556/* The "gen_return_address" gdbarch method. Since this is supposed to be
1557 just a best-effort method, and we don't really have the means to run
1558 the full unwinder here, just collect the link register. */
1559
1560static void
1561s390_gen_return_address (struct gdbarch *gdbarch,
1562 struct agent_expr *ax, struct axs_value *value,
1563 CORE_ADDR scope)
1564{
1565 value->type = register_type (gdbarch, S390_R14_REGNUM);
1566 value->kind = axs_lvalue_register;
1567 value->u.reg = S390_R14_REGNUM;
1568}
1569
1570/* Address handling. */
1571
1572/* Implement addr_bits_remove gdbarch method.
1573 Only used for ABI_LINUX_S390. */
1574
1575static CORE_ADDR
1576s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1577{
1578 return addr & 0x7fffffff;
1579}
1580
1581/* Implement addr_class_type_flags gdbarch method.
1582 Only used for ABI_LINUX_ZSERIES. */
1583
1584static int
1585s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1586{
1587 if (byte_size == 4)
1588 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1589 else
1590 return 0;
1591}
1592
1593/* Implement addr_class_type_flags_to_name gdbarch method.
1594 Only used for ABI_LINUX_ZSERIES. */
1595
1596static const char *
1597s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1598{
1599 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1600 return "mode32";
1601 else
1602 return NULL;
1603}
1604
1605/* Implement addr_class_name_to_type_flags gdbarch method.
1606 Only used for ABI_LINUX_ZSERIES. */
1607
1608static int
1609s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1610 const char *name,
1611 int *type_flags_ptr)
1612{
1613 if (strcmp (name, "mode32") == 0)
1614 {
1615 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1616 return 1;
1617 }
1618 else
1619 return 0;
1620}
1621
1622/* Inferior function calls. */
1623
1624/* Dummy function calls. */
1625
1626/* Unwrap any single-field structs in TYPE and return the effective
1627 "inner" type. E.g., yield "float" for all these cases:
1628
1629 float x;
1630 struct { float x };
1631 struct { struct { float x; } x; };
1632 struct { struct { struct { float x; } x; } x; };
1633
1634 However, if an inner type is smaller than MIN_SIZE, abort the
1635 unwrapping. */
1636
1637static struct type *
1638s390_effective_inner_type (struct type *type, unsigned int min_size)
1639{
1640 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1641 && TYPE_NFIELDS (type) == 1)
1642 {
1643 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1644
1645 if (TYPE_LENGTH (inner) < min_size)
1646 break;
1647 type = inner;
1648 }
1649
1650 return type;
1651}
1652
1653/* Return non-zero if TYPE should be passed like "float" or
1654 "double". */
1655
1656static int
1657s390_function_arg_float (struct type *type)
1658{
1659 /* Note that long double as well as complex types are intentionally
1660 excluded. */
1661 if (TYPE_LENGTH (type) > 8)
1662 return 0;
1663
1664 /* A struct containing just a float or double is passed like a float
1665 or double. */
1666 type = s390_effective_inner_type (type, 0);
1667
1668 return (TYPE_CODE (type) == TYPE_CODE_FLT
1669 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1670}
1671
1672/* Return non-zero if TYPE should be passed like a vector. */
1673
1674static int
1675s390_function_arg_vector (struct type *type)
1676{
1677 if (TYPE_LENGTH (type) > 16)
1678 return 0;
1679
1680 /* Structs containing just a vector are passed like a vector. */
1681 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1682
1683 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1684}
1685
1686/* Determine whether N is a power of two. */
1687
1688static int
1689is_power_of_two (unsigned int n)
1690{
1691 return n && ((n & (n - 1)) == 0);
1692}
1693
1694/* For an argument whose type is TYPE and which is not passed like a
1695 float or vector, return non-zero if it should be passed like "int"
1696 or "long long". */
1697
1698static int
1699s390_function_arg_integer (struct type *type)
1700{
1701 enum type_code code = TYPE_CODE (type);
1702
1703 if (TYPE_LENGTH (type) > 8)
1704 return 0;
1705
1706 if (code == TYPE_CODE_INT
1707 || code == TYPE_CODE_ENUM
1708 || code == TYPE_CODE_RANGE
1709 || code == TYPE_CODE_CHAR
1710 || code == TYPE_CODE_BOOL
1711 || code == TYPE_CODE_PTR
1712 || TYPE_IS_REFERENCE (type))
1713 return 1;
1714
1715 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1716 && is_power_of_two (TYPE_LENGTH (type)));
1717}
1718
1719/* Argument passing state: Internal data structure passed to helper
1720 routines of s390_push_dummy_call. */
1721
1722struct s390_arg_state
1723 {
1724 /* Register cache, or NULL, if we are in "preparation mode". */
1725 struct regcache *regcache;
1726 /* Next available general/floating-point/vector register for
1727 argument passing. */
1728 int gr, fr, vr;
1729 /* Current pointer to copy area (grows downwards). */
1730 CORE_ADDR copy;
1731 /* Current pointer to parameter area (grows upwards). */
1732 CORE_ADDR argp;
1733 };
1734
1735/* Prepare one argument ARG for a dummy call and update the argument
1736 passing state AS accordingly. If the regcache field in AS is set,
1737 operate in "write mode" and write ARG into the inferior. Otherwise
1738 run "preparation mode" and skip all updates to the inferior. */
1739
1740static void
1741s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1742 struct gdbarch_tdep *tdep, int word_size,
1743 enum bfd_endian byte_order, int is_unnamed)
1744{
1745 struct type *type = check_typedef (value_type (arg));
1746 unsigned int length = TYPE_LENGTH (type);
1747 int write_mode = as->regcache != NULL;
1748
1749 if (s390_function_arg_float (type))
1750 {
1751 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1752 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1753 6. */
1754 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1755 {
1756 /* When we store a single-precision value in an FP register,
1757 it occupies the leftmost bits. */
1758 if (write_mode)
e4c4a59b
SM
1759 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1760 value_contents (arg));
d6e58945
PR
1761 as->fr += 2;
1762 }
1763 else
1764 {
1765 /* When we store a single-precision value in a stack slot,
1766 it occupies the rightmost bits. */
1767 as->argp = align_up (as->argp + length, word_size);
1768 if (write_mode)
1769 write_memory (as->argp - length, value_contents (arg),
1770 length);
1771 }
1772 }
1773 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1774 && s390_function_arg_vector (type))
1775 {
1776 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1777
1778 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1779 {
1780 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1781
1782 if (write_mode)
e4c4a59b
SM
1783 as->regcache->cooked_write_part (regnum, 0, length,
1784 value_contents (arg));
d6e58945
PR
1785 as->vr++;
1786 }
1787 else
1788 {
1789 if (write_mode)
1790 write_memory (as->argp, value_contents (arg), length);
1791 as->argp = align_up (as->argp + length, word_size);
1792 }
1793 }
1794 else if (s390_function_arg_integer (type) && length <= word_size)
1795 {
1796 /* Initialize it just to avoid a GCC false warning. */
1797 ULONGEST val = 0;
1798
1799 if (write_mode)
1800 {
1801 /* Place value in least significant bits of the register or
1802 memory word and sign- or zero-extend to full word size.
1803 This also applies to a struct or union. */
1804 val = TYPE_UNSIGNED (type)
1805 ? extract_unsigned_integer (value_contents (arg),
1806 length, byte_order)
1807 : extract_signed_integer (value_contents (arg),
1808 length, byte_order);
1809 }
1810
1811 if (as->gr <= 6)
1812 {
1813 if (write_mode)
1814 regcache_cooked_write_unsigned (as->regcache,
1815 S390_R0_REGNUM + as->gr,
1816 val);
1817 as->gr++;
1818 }
1819 else
1820 {
1821 if (write_mode)
1822 write_memory_unsigned_integer (as->argp, word_size,
1823 byte_order, val);
1824 as->argp += word_size;
1825 }
1826 }
1827 else if (s390_function_arg_integer (type) && length == 8)
1828 {
1829 if (as->gr <= 5)
1830 {
1831 if (write_mode)
1832 {
b66f5587
SM
1833 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1834 value_contents (arg));
1835 as->regcache->cooked_write (S390_R0_REGNUM + as->gr + 1,
1836 value_contents (arg) + word_size);
d6e58945
PR
1837 }
1838 as->gr += 2;
1839 }
1840 else
1841 {
1842 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1843 in it, then don't go back and use it again later. */
1844 as->gr = 7;
1845
1846 if (write_mode)
1847 write_memory (as->argp, value_contents (arg), length);
1848 as->argp += length;
1849 }
1850 }
1851 else
1852 {
1853 /* This argument type is never passed in registers. Place the
1854 value in the copy area and pass a pointer to it. Use 8-byte
1855 alignment as a conservative assumption. */
1856 as->copy = align_down (as->copy - length, 8);
1857 if (write_mode)
1858 write_memory (as->copy, value_contents (arg), length);
1859
1860 if (as->gr <= 6)
1861 {
1862 if (write_mode)
1863 regcache_cooked_write_unsigned (as->regcache,
1864 S390_R0_REGNUM + as->gr,
1865 as->copy);
1866 as->gr++;
1867 }
1868 else
1869 {
1870 if (write_mode)
1871 write_memory_unsigned_integer (as->argp, word_size,
1872 byte_order, as->copy);
1873 as->argp += word_size;
1874 }
1875 }
1876}
1877
1878/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1879 place to be passed to a function, as specified by the "GNU/Linux
1880 for S/390 ELF Application Binary Interface Supplement".
1881
1882 SP is the current stack pointer. We must put arguments, links,
1883 padding, etc. whereever they belong, and return the new stack
1884 pointer value.
1885
1886 If STRUCT_RETURN is non-zero, then the function we're calling is
1887 going to return a structure by value; STRUCT_ADDR is the address of
1888 a block we've allocated for it on the stack.
1889
1890 Our caller has taken care of any type promotions needed to satisfy
1891 prototypes or the old K&R argument-passing rules. */
1892
1893static CORE_ADDR
1894s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1895 struct regcache *regcache, CORE_ADDR bp_addr,
1896 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
1897 function_call_return_method return_method,
1898 CORE_ADDR struct_addr)
d6e58945
PR
1899{
1900 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1901 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1902 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1903 int i;
1904 struct s390_arg_state arg_state, arg_prep;
1905 CORE_ADDR param_area_start, new_sp;
1906 struct type *ftype = check_typedef (value_type (function));
1907
1908 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1909 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1910
1911 arg_prep.copy = sp;
cf84fa6b 1912 arg_prep.gr = (return_method == return_method_struct) ? 3 : 2;
d6e58945
PR
1913 arg_prep.fr = 0;
1914 arg_prep.vr = 0;
1915 arg_prep.argp = 0;
1916 arg_prep.regcache = NULL;
1917
1918 /* Initialize arg_state for "preparation mode". */
1919 arg_state = arg_prep;
1920
1921 /* Update arg_state.copy with the start of the reference-to-copy area
1922 and arg_state.argp with the size of the parameter area. */
1923 for (i = 0; i < nargs; i++)
1924 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1925 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1926
1927 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1928
1929 /* Allocate the standard frame areas: the register save area, the
1930 word reserved for the compiler, and the back chain pointer. */
1931 new_sp = param_area_start - (16 * word_size + 32);
1932
1933 /* Now we have the final stack pointer. Make sure we didn't
1934 underflow; on 31-bit, this would result in addresses with the
1935 high bit set, which causes confusion elsewhere. Note that if we
1936 error out here, stack and registers remain untouched. */
1937 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1938 error (_("Stack overflow"));
1939
1940 /* Pass the structure return address in general register 2. */
cf84fa6b 1941 if (return_method == return_method_struct)
d6e58945
PR
1942 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1943
1944 /* Initialize arg_state for "write mode". */
1945 arg_state = arg_prep;
1946 arg_state.argp = param_area_start;
1947 arg_state.regcache = regcache;
1948
1949 /* Write all parameters. */
1950 for (i = 0; i < nargs; i++)
1951 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1952 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1953
1954 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1955 if (word_size == 4)
1956 {
1957 ULONGEST pswa;
1958 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1959 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1960 }
1961 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1962
1963 /* Store updated stack pointer. */
1964 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1965
1966 /* We need to return the 'stack part' of the frame ID,
1967 which is actually the top of the register save area. */
1968 return param_area_start;
1969}
1970
1971/* Assuming THIS_FRAME is a dummy, return the frame ID of that
1972 dummy frame. The frame ID's base needs to match the TOS value
1973 returned by push_dummy_call, and the PC match the dummy frame's
1974 breakpoint. */
1975
1976static struct frame_id
1977s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1978{
1979 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1980 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1981 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1982
1983 return frame_id_build (sp + 16*word_size + 32,
1984 get_frame_pc (this_frame));
1985}
1986
1987/* Implement frame_align gdbarch method. */
1988
1989static CORE_ADDR
1990s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1991{
1992 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1993 always be aligned on an eight-byte boundary. */
1994 return (addr & -8);
1995}
1996
1997/* Helper for s390_return_value: Set or retrieve a function return
1998 value if it resides in a register. */
1999
2000static void
2001s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
2002 struct regcache *regcache,
2003 gdb_byte *out, const gdb_byte *in)
2004{
2005 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2006 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2007 int length = TYPE_LENGTH (type);
2008 int code = TYPE_CODE (type);
2009
2010 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
2011 {
2012 /* Float-like value: left-aligned in f0. */
2013 if (in != NULL)
e4c4a59b 2014 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
d6e58945 2015 else
73bb0000 2016 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
d6e58945
PR
2017 }
2018 else if (code == TYPE_CODE_ARRAY)
2019 {
2020 /* Vector: left-aligned in v24. */
2021 if (in != NULL)
e4c4a59b 2022 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
d6e58945 2023 else
73bb0000 2024 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
d6e58945
PR
2025 }
2026 else if (length <= word_size)
2027 {
2028 /* Integer: zero- or sign-extended in r2. */
2029 if (out != NULL)
73bb0000
SM
2030 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2031 out);
d6e58945
PR
2032 else if (TYPE_UNSIGNED (type))
2033 regcache_cooked_write_unsigned
2034 (regcache, S390_R2_REGNUM,
2035 extract_unsigned_integer (in, length, byte_order));
2036 else
2037 regcache_cooked_write_signed
2038 (regcache, S390_R2_REGNUM,
2039 extract_signed_integer (in, length, byte_order));
2040 }
2041 else if (length == 2 * word_size)
2042 {
2043 /* Double word: in r2 and r3. */
2044 if (in != NULL)
2045 {
b66f5587
SM
2046 regcache->cooked_write (S390_R2_REGNUM, in);
2047 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
d6e58945
PR
2048 }
2049 else
2050 {
dca08e1f
SM
2051 regcache->cooked_read (S390_R2_REGNUM, out);
2052 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
d6e58945
PR
2053 }
2054 }
2055 else
2056 internal_error (__FILE__, __LINE__, _("invalid return type"));
2057}
2058
2059/* Implement the 'return_value' gdbarch method. */
2060
2061static enum return_value_convention
2062s390_return_value (struct gdbarch *gdbarch, struct value *function,
2063 struct type *type, struct regcache *regcache,
2064 gdb_byte *out, const gdb_byte *in)
2065{
2066 enum return_value_convention rvc;
2067
2068 type = check_typedef (type);
2069
2070 switch (TYPE_CODE (type))
2071 {
2072 case TYPE_CODE_STRUCT:
2073 case TYPE_CODE_UNION:
2074 case TYPE_CODE_COMPLEX:
2075 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2076 break;
2077 case TYPE_CODE_ARRAY:
2078 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2079 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2080 ? RETURN_VALUE_REGISTER_CONVENTION
2081 : RETURN_VALUE_STRUCT_CONVENTION;
2082 break;
2083 default:
2084 rvc = TYPE_LENGTH (type) <= 8
2085 ? RETURN_VALUE_REGISTER_CONVENTION
2086 : RETURN_VALUE_STRUCT_CONVENTION;
2087 }
2088
2089 if (in != NULL || out != NULL)
2090 {
2091 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2092 s390_register_return_value (gdbarch, type, regcache, out, in);
2093 else if (in != NULL)
2094 error (_("Cannot set function return value."));
2095 else
2096 error (_("Function return value unknown."));
2097 }
2098
2099 return rvc;
2100}
2101
2102/* Frame unwinding. */
2103
2104/* Implmement the stack_frame_destroyed_p gdbarch method. */
2105
2106static int
2107s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2108{
2109 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2110
2111 /* In frameless functions, there's no frame to destroy and thus
2112 we don't care about the epilogue.
2113
2114 In functions with frame, the epilogue sequence is a pair of
2115 a LM-type instruction that restores (amongst others) the
2116 return register %r14 and the stack pointer %r15, followed
2117 by a branch 'br %r14' --or equivalent-- that effects the
2118 actual return.
2119
2120 In that situation, this function needs to return 'true' in
2121 exactly one case: when pc points to that branch instruction.
2122
2123 Thus we try to disassemble the one instructions immediately
2124 preceding pc and check whether it is an LM-type instruction
2125 modifying the stack pointer.
2126
2127 Note that disassembling backwards is not reliable, so there
2128 is a slight chance of false positives here ... */
2129
2130 bfd_byte insn[6];
2131 unsigned int r1, r3, b2;
2132 int d2;
2133
2134 if (word_size == 4
2135 && !target_read_memory (pc - 4, insn, 4)
2136 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2137 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2138 return 1;
2139
2140 if (word_size == 4
2141 && !target_read_memory (pc - 6, insn, 6)
2142 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2143 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2144 return 1;
2145
2146 if (word_size == 8
2147 && !target_read_memory (pc - 6, insn, 6)
2148 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2149 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2150 return 1;
2151
2152 return 0;
2153}
2154
2155/* Implement unwind_pc gdbarch method. */
2156
2157static CORE_ADDR
2158s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2159{
2160 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2161 ULONGEST pc;
2162 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2163 return gdbarch_addr_bits_remove (gdbarch, pc);
2164}
2165
2166/* Implement unwind_sp gdbarch method. */
2167
2168static CORE_ADDR
2169s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2170{
2171 ULONGEST sp;
2172 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2173 return gdbarch_addr_bits_remove (gdbarch, sp);
2174}
2175
2176/* Helper routine to unwind pseudo registers. */
2177
2178static struct value *
2179s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2180{
2181 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2182 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2183 struct type *type = register_type (gdbarch, regnum);
2184
2185 /* Unwind PC via PSW address. */
2186 if (regnum == tdep->pc_regnum)
2187 {
2188 struct value *val;
2189
2190 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2191 if (!value_optimized_out (val))
2192 {
2193 LONGEST pswa = value_as_long (val);
2194
2195 if (TYPE_LENGTH (type) == 4)
2196 return value_from_pointer (type, pswa & 0x7fffffff);
2197 else
2198 return value_from_pointer (type, pswa);
2199 }
2200 }
2201
2202 /* Unwind CC via PSW mask. */
2203 if (regnum == tdep->cc_regnum)
2204 {
2205 struct value *val;
2206
2207 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2208 if (!value_optimized_out (val))
2209 {
2210 LONGEST pswm = value_as_long (val);
2211
2212 if (TYPE_LENGTH (type) == 4)
2213 return value_from_longest (type, (pswm >> 12) & 3);
2214 else
2215 return value_from_longest (type, (pswm >> 44) & 3);
2216 }
2217 }
2218
2219 /* Unwind full GPRs to show at least the lower halves (as the
2220 upper halves are undefined). */
2221 if (regnum_is_gpr_full (tdep, regnum))
2222 {
2223 int reg = regnum - tdep->gpr_full_regnum;
2224 struct value *val;
2225
2226 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2227 if (!value_optimized_out (val))
2228 return value_cast (type, val);
2229 }
2230
2231 return allocate_optimized_out_value (type);
2232}
2233
2234/* Translate a .eh_frame register to DWARF register, or adjust a
2235 .debug_frame register. */
2236
2237static int
2238s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2239{
2240 /* See s390_dwarf_reg_to_regnum for comments. */
2241 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2242}
2243
2244/* DWARF-2 frame unwinding. */
2245
2246/* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2247 s390_dwarf2_frame_init_reg. */
2248
2249static struct value *
2250s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2251 int regnum)
2252{
2253 return s390_unwind_pseudo_register (this_frame, regnum);
2254}
2255
2256/* Implement init_reg dwarf2_frame method. */
2257
2258static void
2259s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2260 struct dwarf2_frame_state_reg *reg,
2261 struct frame_info *this_frame)
2262{
2263 /* The condition code (and thus PSW mask) is call-clobbered. */
2264 if (regnum == S390_PSWM_REGNUM)
2265 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2266
2267 /* The PSW address unwinds to the return address. */
2268 else if (regnum == S390_PSWA_REGNUM)
2269 reg->how = DWARF2_FRAME_REG_RA;
2270
2271 /* Fixed registers are call-saved or call-clobbered
2272 depending on the ABI in use. */
2273 else if (regnum < S390_NUM_REGS)
2274 {
2275 if (s390_register_call_saved (gdbarch, regnum))
2276 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2277 else
2278 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2279 }
2280
2281 /* We install a special function to unwind pseudos. */
2282 else
2283 {
2284 reg->how = DWARF2_FRAME_REG_FN;
2285 reg->loc.fn = s390_dwarf2_prev_register;
2286 }
2287}
2288
2289/* Frame unwinding. */
2290
2291/* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2292 register translation. */
2293
2294struct value *
2295s390_trad_frame_prev_register (struct frame_info *this_frame,
2296 struct trad_frame_saved_reg saved_regs[],
2297 int regnum)
2298{
2299 if (regnum < S390_NUM_REGS)
2300 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2301 else
2302 return s390_unwind_pseudo_register (this_frame, regnum);
2303}
2304
2305/* Normal stack frames. */
2306
2307struct s390_unwind_cache {
2308
2309 CORE_ADDR func;
2310 CORE_ADDR frame_base;
2311 CORE_ADDR local_base;
2312
2313 struct trad_frame_saved_reg *saved_regs;
2314};
2315
2316/* Unwind THIS_FRAME and write the information into unwind cache INFO using
2317 prologue analysis. Helper for s390_frame_unwind_cache. */
2318
2319static int
2320s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2321 struct s390_unwind_cache *info)
2322{
2323 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2324 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2325 struct s390_prologue_data data;
2326 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2327 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2328 int i;
2329 CORE_ADDR cfa;
2330 CORE_ADDR func;
2331 CORE_ADDR result;
2332 ULONGEST reg;
2333 CORE_ADDR prev_sp;
2334 int frame_pointer;
2335 int size;
2336 struct frame_info *next_frame;
2337
2338 /* Try to find the function start address. If we can't find it, we don't
2339 bother searching for it -- with modern compilers this would be mostly
2340 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2341 or else a valid backchain ... */
2342 if (!get_frame_func_if_available (this_frame, &info->func))
2343 {
2344 info->func = -1;
2345 return 0;
2346 }
2347 func = info->func;
2348
2349 /* Try to analyze the prologue. */
2350 result = s390_analyze_prologue (gdbarch, func,
2351 get_frame_pc (this_frame), &data);
2352 if (!result)
2353 return 0;
2354
2355 /* If this was successful, we should have found the instruction that
2356 sets the stack pointer register to the previous value of the stack
2357 pointer minus the frame size. */
2358 if (!pv_is_register (*sp, S390_SP_REGNUM))
2359 return 0;
2360
2361 /* A frame size of zero at this point can mean either a real
2362 frameless function, or else a failure to find the prologue.
2363 Perform some sanity checks to verify we really have a
2364 frameless function. */
2365 if (sp->k == 0)
2366 {
2367 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2368 size zero. This is only possible if the next frame is a sentinel
2369 frame, a dummy frame, or a signal trampoline frame. */
2370 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2371 needed, instead the code should simpliy rely on its
2372 analysis. */
2373 next_frame = get_next_frame (this_frame);
2374 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2375 next_frame = get_next_frame (next_frame);
2376 if (next_frame
2377 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2378 return 0;
2379
2380 /* If we really have a frameless function, %r14 must be valid
2381 -- in particular, it must point to a different function. */
2382 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2383 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2384 if (get_pc_function_start (reg) == func)
2385 {
2386 /* However, there is one case where it *is* valid for %r14
2387 to point to the same function -- if this is a recursive
2388 call, and we have stopped in the prologue *before* the
2389 stack frame was allocated.
2390
2391 Recognize this case by looking ahead a bit ... */
2392
2393 struct s390_prologue_data data2;
b926417a 2394 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
d6e58945
PR
2395
2396 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
b926417a
TT
2397 && pv_is_register (*sp2, S390_SP_REGNUM)
2398 && sp2->k != 0))
d6e58945
PR
2399 return 0;
2400 }
2401 }
2402
2403 /* OK, we've found valid prologue data. */
2404 size = -sp->k;
2405
2406 /* If the frame pointer originally also holds the same value
2407 as the stack pointer, we're probably using it. If it holds
2408 some other value -- even a constant offset -- it is most
2409 likely used as temp register. */
2410 if (pv_is_identical (*sp, *fp))
2411 frame_pointer = S390_FRAME_REGNUM;
2412 else
2413 frame_pointer = S390_SP_REGNUM;
2414
2415 /* If we've detected a function with stack frame, we'll still have to
2416 treat it as frameless if we're currently within the function epilog
2417 code at a point where the frame pointer has already been restored.
2418 This can only happen in an innermost frame. */
2419 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2420 instead the code should simpliy rely on its analysis. */
2421 next_frame = get_next_frame (this_frame);
2422 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2423 next_frame = get_next_frame (next_frame);
2424 if (size > 0
2425 && (next_frame == NULL
2426 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2427 {
2428 /* See the comment in s390_stack_frame_destroyed_p on why this is
2429 not completely reliable ... */
2430 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2431 {
2432 memset (&data, 0, sizeof (data));
2433 size = 0;
2434 frame_pointer = S390_SP_REGNUM;
2435 }
2436 }
2437
2438 /* Once we know the frame register and the frame size, we can unwind
2439 the current value of the frame register from the next frame, and
2440 add back the frame size to arrive that the previous frame's
2441 stack pointer value. */
2442 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2443 cfa = prev_sp + 16*word_size + 32;
2444
2445 /* Set up ABI call-saved/call-clobbered registers. */
2446 for (i = 0; i < S390_NUM_REGS; i++)
2447 if (!s390_register_call_saved (gdbarch, i))
2448 trad_frame_set_unknown (info->saved_regs, i);
2449
2450 /* CC is always call-clobbered. */
2451 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2452
2453 /* Record the addresses of all register spill slots the prologue parser
2454 has recognized. Consider only registers defined as call-saved by the
2455 ABI; for call-clobbered registers the parser may have recognized
2456 spurious stores. */
2457
2458 for (i = 0; i < 16; i++)
2459 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2460 && data.gpr_slot[i] != 0)
2461 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2462
2463 for (i = 0; i < 16; i++)
2464 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2465 && data.fpr_slot[i] != 0)
2466 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2467
2468 /* Function return will set PC to %r14. */
2469 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2470
2471 /* In frameless functions, we unwind simply by moving the return
2472 address to the PC. However, if we actually stored to the
2473 save area, use that -- we might only think the function frameless
2474 because we're in the middle of the prologue ... */
2475 if (size == 0
2476 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2477 {
2478 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2479 }
2480
2481 /* Another sanity check: unless this is a frameless function,
2482 we should have found spill slots for SP and PC.
2483 If not, we cannot unwind further -- this happens e.g. in
2484 libc's thread_start routine. */
2485 if (size > 0)
2486 {
2487 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2488 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2489 prev_sp = -1;
2490 }
2491
2492 /* We use the current value of the frame register as local_base,
2493 and the top of the register save area as frame_base. */
2494 if (prev_sp != -1)
2495 {
2496 info->frame_base = prev_sp + 16*word_size + 32;
2497 info->local_base = prev_sp - size;
2498 }
2499
2500 return 1;
2501}
2502
2503/* Unwind THIS_FRAME and write the information into unwind cache INFO using
2504 back chain unwinding. Helper for s390_frame_unwind_cache. */
2505
2506static void
2507s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2508 struct s390_unwind_cache *info)
2509{
2510 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2511 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2512 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2513 CORE_ADDR backchain;
2514 ULONGEST reg;
2515 LONGEST sp, tmp;
2516 int i;
2517
2518 /* Set up ABI call-saved/call-clobbered registers. */
2519 for (i = 0; i < S390_NUM_REGS; i++)
2520 if (!s390_register_call_saved (gdbarch, i))
2521 trad_frame_set_unknown (info->saved_regs, i);
2522
2523 /* CC is always call-clobbered. */
2524 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2525
2526 /* Get the backchain. */
2527 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2528 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2529 tmp = 0;
2530 backchain = (CORE_ADDR) tmp;
2531
2532 /* A zero backchain terminates the frame chain. As additional
2533 sanity check, let's verify that the spill slot for SP in the
2534 save area pointed to by the backchain in fact links back to
2535 the save area. */
2536 if (backchain != 0
2537 && safe_read_memory_integer (backchain + 15*word_size,
2538 word_size, byte_order, &sp)
2539 && (CORE_ADDR)sp == backchain)
2540 {
2541 /* We don't know which registers were saved, but it will have
2542 to be at least %r14 and %r15. This will allow us to continue
2543 unwinding, but other prev-frame registers may be incorrect ... */
2544 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2545 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2546
2547 /* Function return will set PC to %r14. */
2548 info->saved_regs[S390_PSWA_REGNUM]
2549 = info->saved_regs[S390_RETADDR_REGNUM];
2550
2551 /* We use the current value of the frame register as local_base,
2552 and the top of the register save area as frame_base. */
2553 info->frame_base = backchain + 16*word_size + 32;
2554 info->local_base = reg;
2555 }
2556
2557 info->func = get_frame_pc (this_frame);
2558}
2559
2560/* Unwind THIS_FRAME and return the corresponding unwind cache for
2561 s390_frame_unwind and s390_frame_base. */
2562
2563static struct s390_unwind_cache *
2564s390_frame_unwind_cache (struct frame_info *this_frame,
2565 void **this_prologue_cache)
2566{
2567 struct s390_unwind_cache *info;
2568
2569 if (*this_prologue_cache)
2570 return (struct s390_unwind_cache *) *this_prologue_cache;
2571
2572 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2573 *this_prologue_cache = info;
2574 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2575 info->func = -1;
2576 info->frame_base = -1;
2577 info->local_base = -1;
2578
a70b8144 2579 try
d6e58945
PR
2580 {
2581 /* Try to use prologue analysis to fill the unwind cache.
2582 If this fails, fall back to reading the stack backchain. */
2583 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2584 s390_backchain_frame_unwind_cache (this_frame, info);
2585 }
230d2906 2586 catch (const gdb_exception_error &ex)
d6e58945
PR
2587 {
2588 if (ex.error != NOT_AVAILABLE_ERROR)
eedc3f4f 2589 throw;
d6e58945 2590 }
d6e58945
PR
2591
2592 return info;
2593}
2594
2595/* Implement this_id frame_unwind method for s390_frame_unwind. */
2596
2597static void
2598s390_frame_this_id (struct frame_info *this_frame,
2599 void **this_prologue_cache,
2600 struct frame_id *this_id)
2601{
2602 struct s390_unwind_cache *info
2603 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2604
2605 if (info->frame_base == -1)
2606 {
2607 if (info->func != -1)
2608 *this_id = frame_id_build_unavailable_stack (info->func);
2609 return;
2610 }
2611
2612 *this_id = frame_id_build (info->frame_base, info->func);
2613}
2614
2615/* Implement prev_register frame_unwind method for s390_frame_unwind. */
2616
2617static struct value *
2618s390_frame_prev_register (struct frame_info *this_frame,
2619 void **this_prologue_cache, int regnum)
2620{
2621 struct s390_unwind_cache *info
2622 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2623
2624 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2625}
2626
2627/* Default S390 frame unwinder. */
2628
2629static const struct frame_unwind s390_frame_unwind = {
2630 NORMAL_FRAME,
2631 default_frame_unwind_stop_reason,
2632 s390_frame_this_id,
2633 s390_frame_prev_register,
2634 NULL,
2635 default_frame_sniffer
2636};
2637
2638/* Code stubs and their stack frames. For things like PLTs and NULL
2639 function calls (where there is no true frame and the return address
2640 is in the RETADDR register). */
2641
2642struct s390_stub_unwind_cache
2643{
2644 CORE_ADDR frame_base;
2645 struct trad_frame_saved_reg *saved_regs;
2646};
2647
2648/* Unwind THIS_FRAME and return the corresponding unwind cache for
2649 s390_stub_frame_unwind. */
2650
2651static struct s390_stub_unwind_cache *
2652s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2653 void **this_prologue_cache)
2654{
2655 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2656 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2657 struct s390_stub_unwind_cache *info;
2658 ULONGEST reg;
2659
2660 if (*this_prologue_cache)
2661 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2662
2663 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2664 *this_prologue_cache = info;
2665 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2666
2667 /* The return address is in register %r14. */
2668 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2669
2670 /* Retrieve stack pointer and determine our frame base. */
2671 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2672 info->frame_base = reg + 16*word_size + 32;
2673
2674 return info;
2675}
2676
2677/* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2678
2679static void
2680s390_stub_frame_this_id (struct frame_info *this_frame,
2681 void **this_prologue_cache,
2682 struct frame_id *this_id)
2683{
2684 struct s390_stub_unwind_cache *info
2685 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2686 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2687}
2688
2689/* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2690
2691static struct value *
2692s390_stub_frame_prev_register (struct frame_info *this_frame,
2693 void **this_prologue_cache, int regnum)
2694{
2695 struct s390_stub_unwind_cache *info
2696 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2697 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2698}
2699
2700/* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2701
2702static int
2703s390_stub_frame_sniffer (const struct frame_unwind *self,
2704 struct frame_info *this_frame,
2705 void **this_prologue_cache)
2706{
2707 CORE_ADDR addr_in_block;
2708 bfd_byte insn[S390_MAX_INSTR_SIZE];
2709
2710 /* If the current PC points to non-readable memory, we assume we
2711 have trapped due to an invalid function pointer call. We handle
2712 the non-existing current function like a PLT stub. */
2713 addr_in_block = get_frame_address_in_block (this_frame);
2714 if (in_plt_section (addr_in_block)
2715 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2716 return 1;
2717 return 0;
2718}
2719
2720/* S390 stub frame unwinder. */
2721
2722static const struct frame_unwind s390_stub_frame_unwind = {
2723 NORMAL_FRAME,
2724 default_frame_unwind_stop_reason,
2725 s390_stub_frame_this_id,
2726 s390_stub_frame_prev_register,
2727 NULL,
2728 s390_stub_frame_sniffer
2729};
2730
2731/* Frame base handling. */
2732
2733static CORE_ADDR
2734s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2735{
2736 struct s390_unwind_cache *info
2737 = s390_frame_unwind_cache (this_frame, this_cache);
2738 return info->frame_base;
2739}
2740
2741static CORE_ADDR
2742s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2743{
2744 struct s390_unwind_cache *info
2745 = s390_frame_unwind_cache (this_frame, this_cache);
2746 return info->local_base;
2747}
2748
2749static const struct frame_base s390_frame_base = {
2750 &s390_frame_unwind,
2751 s390_frame_base_address,
2752 s390_local_base_address,
2753 s390_local_base_address
2754};
2755
ef8914a4
PR
2756/* Process record-replay */
2757
2758/* Takes the intermediate sum of address calculations and masks off upper
2759 bits according to current addressing mode. */
2760
2761static CORE_ADDR
2762s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2763 CORE_ADDR val)
2764{
2765 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2766 ULONGEST pswm, pswa;
2767 int am;
2768 if (tdep->abi == ABI_LINUX_S390)
2769 {
2770 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2771 am = pswa >> 31 & 1;
2772 }
2773 else
2774 {
2775 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2776 am = pswm >> 31 & 3;
2777 }
2778 switch (am)
2779 {
2780 case 0:
2781 return val & 0xffffff;
2782 case 1:
2783 return val & 0x7fffffff;
2784 case 3:
2785 return val;
2786 default:
2787 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2788 return 0;
2789 }
2790}
2791
2792/* Calculates memory address using pre-calculated index, raw instruction word
2793 with b and d/dl fields, and raw instruction byte with dh field. Index and
2794 dh should be set to 0 if unused. */
2795
2796static CORE_ADDR
2797s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2798 ULONGEST x, uint16_t bd, int8_t dh)
2799{
2800 uint8_t rb = bd >> 12 & 0xf;
2801 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2802 ULONGEST b;
2803 CORE_ADDR res = d + x;
2804 if (rb)
2805 {
2806 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2807 res += b;
2808 }
2809 return s390_record_address_mask (gdbarch, regcache, res);
2810}
2811
2812/* Calculates memory address using raw x, b + d/dl, dh fields from
2813 instruction. rx and dh should be set to 0 if unused. */
2814
2815static CORE_ADDR
2816s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2817 uint8_t rx, uint16_t bd, int8_t dh)
2818{
2819 ULONGEST x = 0;
2820 if (rx)
2821 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2822 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2823}
2824
2825/* Calculates memory address for VSCE[GF] instructions. */
2826
2827static int
2828s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2829 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2830 int8_t dh, CORE_ADDR *res)
2831{
2832 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2833 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2834 ULONGEST x;
2835 gdb_byte buf[16];
2836 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2837 return -1;
2838 if (vx < 16)
dca08e1f 2839 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
ef8914a4 2840 else
0b883586 2841 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
ef8914a4
PR
2842 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2843 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2844 return 0;
2845}
2846
2847/* Calculates memory address for instructions with relative long addressing. */
2848
2849static CORE_ADDR
2850s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2851 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2852{
2853 int32_t ri = i1 << 16 | i2;
2854 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2855}
2856
2857/* Population count helper. */
2858
2859static int s390_popcnt (unsigned int x) {
2860 int res = 0;
2861 while (x)
2862 {
2863 if (x & 1)
2864 res++;
2865 x >>= 1;
2866 }
2867 return res;
2868}
2869
2870/* Record 64-bit register. */
2871
2872static int
2873s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2874{
2875 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2876 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2877 return -1;
2878 if (tdep->abi == ABI_LINUX_S390)
2879 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2880 return -1;
2881 return 0;
2882}
2883
2884/* Record high 32 bits of a register. */
2885
2886static int
2887s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2888{
2889 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2890 if (tdep->abi == ABI_LINUX_S390)
2891 {
2892 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2893 return -1;
2894 }
2895 else
2896 {
2897 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2898 return -1;
2899 }
2900 return 0;
2901}
2902
2903/* Record vector register. */
2904
2905static int
2906s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2907{
2908 if (i < 16)
2909 {
2910 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2911 return -1;
2912 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2913 return -1;
2914 }
2915 else
2916 {
2917 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2918 return -1;
2919 }
2920 return 0;
2921}
2922
2923/* Implement process_record gdbarch method. */
2924
2925static int
2926s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2927 CORE_ADDR addr)
2928{
2929 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2930 uint16_t insn[3] = {0};
2931 /* Instruction as bytes. */
2932 uint8_t ibyte[6];
2933 /* Instruction as nibbles. */
2934 uint8_t inib[12];
2935 /* Instruction vector registers. */
2936 uint8_t ivec[4];
2937 CORE_ADDR oaddr, oaddr2, oaddr3;
2938 ULONGEST tmp;
2939 int i, n;
2940 /* if EX/EXRL instruction used, here's the reg parameter */
2941 int ex = -1;
2942 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2943
2944 /* Attempting to use EX or EXRL jumps back here */
2945ex:
2946
2947 /* Read instruction. */
2948 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2949 /* If execute was involved, do the adjustment. */
2950 if (ex != -1)
2951 insn[0] |= ex & 0xff;
2952 /* Two highest bits determine instruction size. */
2953 if (insn[0] >= 0x4000)
2954 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2955 else
2956 /* Not necessary, but avoids uninitialized variable warnings. */
2957 insn[1] = 0;
2958 if (insn[0] >= 0xc000)
2959 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2960 else
2961 insn[2] = 0;
2962 /* Split instruction into bytes and nibbles. */
2963 for (i = 0; i < 3; i++)
2964 {
2965 ibyte[i*2] = insn[i] >> 8 & 0xff;
2966 ibyte[i*2+1] = insn[i] & 0xff;
2967 }
2968 for (i = 0; i < 6; i++)
2969 {
2970 inib[i*2] = ibyte[i] >> 4 & 0xf;
2971 inib[i*2+1] = ibyte[i] & 0xf;
2972 }
2973 /* Compute vector registers, if applicable. */
2974 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2975 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2976 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2977 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2978
2979 switch (ibyte[0])
2980 {
2981 /* 0x00 undefined */
2982
2983 case 0x01:
2984 /* E-format instruction */
2985 switch (ibyte[1])
2986 {
2987 /* 0x00 undefined */
2988 /* 0x01 unsupported: PR - program return */
2989 /* 0x02 unsupported: UPT */
2990 /* 0x03 undefined */
2991 /* 0x04 privileged: PTFF - perform timing facility function */
2992 /* 0x05-0x06 undefined */
2993 /* 0x07 privileged: SCKPF - set clock programmable field */
2994 /* 0x08-0x09 undefined */
2995
2996 case 0x0a: /* PFPO - perform floating point operation */
2997 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
2998 if (!(tmp & 0x80000000u))
2999 {
3000 uint8_t ofc = tmp >> 16 & 0xff;
3001 switch (ofc)
3002 {
3003 case 0x00: /* HFP32 */
3004 case 0x01: /* HFP64 */
3005 case 0x05: /* BFP32 */
3006 case 0x06: /* BFP64 */
3007 case 0x08: /* DFP32 */
3008 case 0x09: /* DFP64 */
3009 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3010 return -1;
3011 break;
3012 case 0x02: /* HFP128 */
3013 case 0x07: /* BFP128 */
3014 case 0x0a: /* DFP128 */
3015 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3016 return -1;
3017 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3018 return -1;
3019 break;
3020 default:
3021 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3022 ofc, paddress (gdbarch, addr));
3023 return -1;
3024 }
3025
3026 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3027 return -1;
3028 }
3029 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3030 return -1;
3031 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3032 return -1;
3033 break;
3034
3035 case 0x0b: /* TAM - test address mode */
3036 case 0x0c: /* SAM24 - set address mode 24 */
3037 case 0x0d: /* SAM31 - set address mode 31 */
3038 case 0x0e: /* SAM64 - set address mode 64 */
3039 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3040 return -1;
3041 break;
3042
3043 /* 0x0f-0xfe undefined */
3044
3045 /* 0xff unsupported: TRAP */
3046
3047 default:
3048 goto UNKNOWN_OP;
3049 }
3050 break;
3051
3052 /* 0x02 undefined */
3053 /* 0x03 undefined */
3054
3055 case 0x04: /* SPM - set program mask */
3056 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3057 return -1;
3058 break;
3059
3060 case 0x05: /* BALR - branch and link */
3061 case 0x45: /* BAL - branch and link */
3062 case 0x06: /* BCTR - branch on count */
3063 case 0x46: /* BCT - branch on count */
3064 case 0x0d: /* BASR - branch and save */
3065 case 0x4d: /* BAS - branch and save */
3066 case 0x84: /* BRXH - branch relative on index high */
3067 case 0x85: /* BRXLE - branch relative on index low or equal */
3068 case 0x86: /* BXH - branch on index high */
3069 case 0x87: /* BXLE - branch on index low or equal */
3070 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3071 use 32-bit destination as counter. */
3072 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3073 return -1;
3074 break;
3075
3076 case 0x07: /* BCR - branch on condition */
3077 case 0x47: /* BC - branch on condition */
3078 /* No effect other than PC transfer. */
3079 break;
3080
3081 /* 0x08 undefined */
3082 /* 0x09 undefined */
3083
3084 case 0x0a:
3085 /* SVC - supervisor call */
3086 if (tdep->s390_syscall_record != NULL)
3087 {
3088 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3089 return -1;
3090 }
3091 else
3092 {
3093 printf_unfiltered (_("no syscall record support\n"));
3094 return -1;
3095 }
3096 break;
3097
3098 case 0x0b: /* BSM - branch and set mode */
3099 if (inib[2])
3100 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3101 return -1;
3102 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3103 return -1;
3104 break;
3105
3106 case 0x0c: /* BASSM - branch and save and set mode */
3107 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3108 return -1;
3109 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3110 return -1;
3111 break;
3112
3113 case 0x0e: /* MVCL - move long [interruptible] */
3114 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3115 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3116 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3117 tmp &= 0xffffff;
3118 if (record_full_arch_list_add_mem (oaddr, tmp))
3119 return -1;
3120 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3121 return -1;
3122 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3123 return -1;
3124 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3125 return -1;
3126 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3127 return -1;
3128 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3129 return -1;
3130 break;
3131
3132 case 0x0f: /* CLCL - compare logical long [interruptible] */
3133 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3134 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3135 return -1;
3136 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3137 return -1;
3138 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3139 return -1;
3140 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3141 return -1;
3142 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3143 return -1;
3144 break;
3145
3146 case 0x10: /* LPR - load positive */
3147 case 0x11: /* LNR - load negative */
3148 case 0x12: /* LTR - load and test */
3149 case 0x13: /* LCR - load complement */
3150 case 0x14: /* NR - and */
3151 case 0x16: /* OR - or */
3152 case 0x17: /* XR - xor */
3153 case 0x1a: /* AR - add */
3154 case 0x1b: /* SR - subtract */
3155 case 0x1e: /* ALR - add logical */
3156 case 0x1f: /* SLR - subtract logical */
3157 case 0x54: /* N - and */
3158 case 0x56: /* O - or */
3159 case 0x57: /* X - xor */
3160 case 0x5a: /* A - add */
3161 case 0x5b: /* S - subtract */
3162 case 0x5e: /* AL - add logical */
3163 case 0x5f: /* SL - subtract logical */
3164 case 0x4a: /* AH - add halfword */
3165 case 0x4b: /* SH - subtract halfword */
3166 case 0x8a: /* SRA - shift right single */
3167 case 0x8b: /* SLA - shift left single */
3168 case 0xbf: /* ICM - insert characters under mask */
3169 /* 32-bit destination + flags */
3170 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3171 return -1;
3172 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3173 return -1;
3174 break;
3175
3176 case 0x15: /* CLR - compare logical */
3177 case 0x55: /* CL - compare logical */
3178 case 0x19: /* CR - compare */
3179 case 0x29: /* CDR - compare */
3180 case 0x39: /* CER - compare */
3181 case 0x49: /* CH - compare halfword */
3182 case 0x59: /* C - compare */
3183 case 0x69: /* CD - compare */
3184 case 0x79: /* CE - compare */
3185 case 0x91: /* TM - test under mask */
3186 case 0x95: /* CLI - compare logical */
3187 case 0xbd: /* CLM - compare logical under mask */
3188 case 0xd5: /* CLC - compare logical */
3189 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3190 return -1;
3191 break;
3192
3193 case 0x18: /* LR - load */
3194 case 0x48: /* LH - load halfword */
3195 case 0x58: /* L - load */
3196 case 0x41: /* LA - load address */
3197 case 0x43: /* IC - insert character */
3198 case 0x4c: /* MH - multiply halfword */
3199 case 0x71: /* MS - multiply single */
3200 case 0x88: /* SRL - shift right single logical */
3201 case 0x89: /* SLL - shift left single logical */
3202 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3203 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3204 return -1;
3205 break;
3206
3207 case 0x1c: /* MR - multiply */
3208 case 0x5c: /* M - multiply */
3209 case 0x1d: /* DR - divide */
3210 case 0x5d: /* D - divide */
3211 case 0x8c: /* SRDL - shift right double logical */
3212 case 0x8d: /* SLDL - shift left double logical */
3213 /* 32-bit pair destination, no flags */
3214 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3215 return -1;
3216 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3217 return -1;
3218 break;
3219
3220 case 0x20: /* LPDR - load positive */
3221 case 0x30: /* LPER - load positive */
3222 case 0x21: /* LNDR - load negative */
3223 case 0x31: /* LNER - load negative */
3224 case 0x22: /* LTDR - load and test */
3225 case 0x32: /* LTER - load and test */
3226 case 0x23: /* LCDR - load complement */
3227 case 0x33: /* LCER - load complement */
3228 case 0x2a: /* ADR - add */
3229 case 0x3a: /* AER - add */
3230 case 0x6a: /* AD - add */
3231 case 0x7a: /* AE - add */
3232 case 0x2b: /* SDR - subtract */
3233 case 0x3b: /* SER - subtract */
3234 case 0x6b: /* SD - subtract */
3235 case 0x7b: /* SE - subtract */
3236 case 0x2e: /* AWR - add unnormalized */
3237 case 0x3e: /* AUR - add unnormalized */
3238 case 0x6e: /* AW - add unnormalized */
3239 case 0x7e: /* AU - add unnormalized */
3240 case 0x2f: /* SWR - subtract unnormalized */
3241 case 0x3f: /* SUR - subtract unnormalized */
3242 case 0x6f: /* SW - subtract unnormalized */
3243 case 0x7f: /* SU - subtract unnormalized */
3244 /* float destination + flags */
3245 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3246 return -1;
3247 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3248 return -1;
3249 break;
3250
3251 case 0x24: /* HDR - halve */
3252 case 0x34: /* HER - halve */
3253 case 0x25: /* LDXR - load rounded */
3254 case 0x35: /* LEDR - load rounded */
3255 case 0x28: /* LDR - load */
3256 case 0x38: /* LER - load */
3257 case 0x68: /* LD - load */
3258 case 0x78: /* LE - load */
3259 case 0x2c: /* MDR - multiply */
3260 case 0x3c: /* MDER - multiply */
3261 case 0x6c: /* MD - multiply */
3262 case 0x7c: /* MDE - multiply */
3263 case 0x2d: /* DDR - divide */
3264 case 0x3d: /* DER - divide */
3265 case 0x6d: /* DD - divide */
3266 case 0x7d: /* DE - divide */
3267 /* float destination, no flags */
3268 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3269 return -1;
3270 break;
3271
3272 case 0x26: /* MXR - multiply */
3273 case 0x27: /* MXDR - multiply */
3274 case 0x67: /* MXD - multiply */
3275 /* float pair destination, no flags */
3276 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3277 return -1;
3278 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3279 return -1;
3280 break;
3281
3282 case 0x36: /* AXR - add */
3283 case 0x37: /* SXR - subtract */
3284 /* float pair destination + flags */
3285 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3286 return -1;
3287 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3288 return -1;
3289 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3290 return -1;
3291 break;
3292
3293 case 0x40: /* STH - store halfword */
3294 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3295 if (record_full_arch_list_add_mem (oaddr, 2))
3296 return -1;
3297 break;
3298
3299 case 0x42: /* STC - store character */
3300 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3301 if (record_full_arch_list_add_mem (oaddr, 1))
3302 return -1;
3303 break;
3304
3305 case 0x44: /* EX - execute */
3306 if (ex != -1)
3307 {
3308 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3309 paddress (gdbarch, addr));
3310 return -1;
3311 }
3312 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3313 if (inib[2])
3314 {
3315 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3316 ex = tmp & 0xff;
3317 }
3318 else
3319 {
3320 ex = 0;
3321 }
3322 goto ex;
3323
3324 case 0x4e: /* CVD - convert to decimal */
3325 case 0x60: /* STD - store */
3326 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3327 if (record_full_arch_list_add_mem (oaddr, 8))
3328 return -1;
3329 break;
3330
3331 case 0x4f: /* CVB - convert to binary */
3332 /* 32-bit gpr destination + FPC (DXC write) */
3333 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3334 return -1;
3335 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3336 return -1;
3337 break;
3338
3339 case 0x50: /* ST - store */
3340 case 0x70: /* STE - store */
3341 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3342 if (record_full_arch_list_add_mem (oaddr, 4))
3343 return -1;
3344 break;
3345
3346 case 0x51: /* LAE - load address extended */
3347 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3348 return -1;
3349 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3350 return -1;
3351 break;
3352
3353 /* 0x52 undefined */
3354 /* 0x53 undefined */
3355
3356 /* 0x61-0x66 undefined */
3357
3358 /* 0x72-0x77 undefined */
3359
3360 /* 0x80 privileged: SSM - set system mask */
3361 /* 0x81 undefined */
3362 /* 0x82 privileged: LPSW - load PSW */
3363 /* 0x83 privileged: diagnose */
3364
3365 case 0x8e: /* SRDA - shift right double */
3366 case 0x8f: /* SLDA - shift left double */
3367 /* 32-bit pair destination + flags */
3368 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3369 return -1;
3370 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3371 return -1;
3372 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3373 return -1;
3374 break;
3375
3376 case 0x90: /* STM - store multiple */
3377 case 0x9b: /* STAM - store access multiple */
3378 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3379 if (inib[2] <= inib[3])
3380 n = inib[3] - inib[2] + 1;
3381 else
3382 n = inib[3] + 0x10 - inib[2] + 1;
3383 if (record_full_arch_list_add_mem (oaddr, n * 4))
3384 return -1;
3385 break;
3386
3387 case 0x92: /* MVI - move */
3388 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3389 if (record_full_arch_list_add_mem (oaddr, 1))
3390 return -1;
3391 break;
3392
3393 case 0x93: /* TS - test and set */
3394 case 0x94: /* NI - and */
3395 case 0x96: /* OI - or */
3396 case 0x97: /* XI - xor */
3397 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3398 if (record_full_arch_list_add_mem (oaddr, 1))
3399 return -1;
3400 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3401 return -1;
3402 break;
3403
3404 case 0x98: /* LM - load multiple */
3405 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3406 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3407 return -1;
3408 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3409 return -1;
3410 break;
3411
3412 /* 0x99 privileged: TRACE */
3413
3414 case 0x9a: /* LAM - load access multiple */
3415 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3416 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3417 return -1;
3418 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3419 return -1;
3420 break;
3421
3422 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3423 /* 0xa0-0xa4 undefined */
3424
3425 case 0xa5:
3426 case 0xa7:
3427 /* RI-format instruction */
3428 switch (ibyte[0] << 4 | inib[3])
3429 {
3430 case 0xa50: /* IIHH - insert immediate */
3431 case 0xa51: /* IIHL - insert immediate */
3432 /* high 32-bit destination */
3433 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3434 return -1;
3435 break;
3436
3437 case 0xa52: /* IILH - insert immediate */
3438 case 0xa53: /* IILL - insert immediate */
3439 case 0xa75: /* BRAS - branch relative and save */
3440 case 0xa76: /* BRCT - branch relative on count */
3441 case 0xa78: /* LHI - load halfword immediate */
3442 case 0xa7c: /* MHI - multiply halfword immediate */
3443 /* 32-bit or native destination */
3444 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3445 return -1;
3446 break;
3447
3448 case 0xa54: /* NIHH - and immediate */
3449 case 0xa55: /* NIHL - and immediate */
3450 case 0xa58: /* OIHH - or immediate */
3451 case 0xa59: /* OIHL - or immediate */
3452 /* high 32-bit destination + flags */
3453 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3454 return -1;
3455 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3456 return -1;
3457 break;
3458
3459 case 0xa56: /* NILH - and immediate */
3460 case 0xa57: /* NILL - and immediate */
3461 case 0xa5a: /* OILH - or immediate */
3462 case 0xa5b: /* OILL - or immediate */
3463 case 0xa7a: /* AHI - add halfword immediate */
3464 /* 32-bit destination + flags */
3465 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3466 return -1;
3467 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3468 return -1;
3469 break;
3470
3471 case 0xa5c: /* LLIHH - load logical immediate */
3472 case 0xa5d: /* LLIHL - load logical immediate */
3473 case 0xa5e: /* LLILH - load logical immediate */
3474 case 0xa5f: /* LLILL - load logical immediate */
3475 case 0xa77: /* BRCTG - branch relative on count */
3476 case 0xa79: /* LGHI - load halfword immediate */
3477 case 0xa7d: /* MGHI - multiply halfword immediate */
3478 /* 64-bit destination */
3479 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3480 return -1;
3481 break;
3482
3483 case 0xa70: /* TMLH - test under mask */
3484 case 0xa71: /* TMLL - test under mask */
3485 case 0xa72: /* TMHH - test under mask */
3486 case 0xa73: /* TMHL - test under mask */
3487 case 0xa7e: /* CHI - compare halfword immediate */
3488 case 0xa7f: /* CGHI - compare halfword immediate */
3489 /* flags only */
3490 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3491 return -1;
3492 break;
3493
3494 case 0xa74: /* BRC - branch relative on condition */
3495 /* no register change */
3496 break;
3497
3498 case 0xa7b: /* AGHI - add halfword immediate */
3499 /* 64-bit destination + flags */
3500 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3501 return -1;
3502 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3503 return -1;
3504 break;
3505
3506 default:
3507 goto UNKNOWN_OP;
3508 }
3509 break;
3510
3511 /* 0xa6 undefined */
3512
3513 case 0xa8: /* MVCLE - move long extended [partial] */
3514 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3515 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3516 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3517 if (record_full_arch_list_add_mem (oaddr, tmp))
3518 return -1;
3519 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3520 return -1;
3521 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3522 return -1;
3523 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3524 return -1;
3525 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3526 return -1;
3527 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3528 return -1;
3529 break;
3530
3531 /* 0xaa-0xab undefined */
3532 /* 0xac privileged: STNSM - store then and system mask */
3533 /* 0xad privileged: STOSM - store then or system mask */
3534 /* 0xae privileged: SIGP - signal processor */
3535 /* 0xaf unsupported: MC - monitor call */
3536 /* 0xb0 undefined */
3537 /* 0xb1 privileged: LRA - load real address */
3538
3539 case 0xb2:
3540 case 0xb3:
3541 case 0xb9:
3542 /* S/RRD/RRE/RRF/IE-format instruction */
3543 switch (insn[0])
3544 {
3545 /* 0xb200-0xb204 undefined or privileged */
3546
3547 case 0xb205: /* STCK - store clock */
3548 case 0xb27c: /* STCKF - store clock fast */
3549 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3550 if (record_full_arch_list_add_mem (oaddr, 8))
3551 return -1;
3552 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3553 return -1;
3554 break;
3555
3556 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3557 /* 0xb21a unsupported: CFC */
3558 /* 0xb21b-0xb221 undefined or privileged */
3559
3560 case 0xb222: /* IPM - insert program mask */
3561 case 0xb24f: /* EAR - extract access */
3562 case 0xb252: /* MSR - multiply single */
3563 case 0xb2ec: /* ETND - extract transaction nesting depth */
3564 case 0xb38c: /* EFPC - extract fpc */
3565 case 0xb91f: /* LRVR - load reversed */
3566 case 0xb926: /* LBR - load byte */
3567 case 0xb927: /* LHR - load halfword */
3568 case 0xb994: /* LLCR - load logical character */
3569 case 0xb995: /* LLHR - load logical halfword */
3570 case 0xb9f2: /* LOCR - load on condition */
3571 /* 32-bit gpr destination */
3572 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3573 return -1;
3574 break;
3575
3576 /* 0xb223-0xb22c privileged or unsupported */
3577
3578 case 0xb22d: /* DXR - divide */
3579 case 0xb325: /* LXDR - load lengthened */
3580 case 0xb326: /* LXER - load lengthened */
3581 case 0xb336: /* SQXR - square root */
3582 case 0xb365: /* LXR - load */
3583 case 0xb367: /* FIXR - load fp integer */
3584 case 0xb376: /* LZXR - load zero */
3585 case 0xb3b6: /* CXFR - convert from fixed */
3586 case 0xb3c6: /* CXGR - convert from fixed */
3587 case 0xb3fe: /* IEXTR - insert biased exponent */
3588 /* float pair destination */
3589 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3590 return -1;
3591 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3592 return -1;
3593 break;
3594
3595 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3596
3597 case 0xb241: /* CKSM - checksum [partial] */
3598 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3599 return -1;
3600 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3601 return -1;
3602 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3603 return -1;
3604 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3605 return -1;
3606 break;
3607
3608 /* 0xb242-0xb243 undefined */
3609
3610 case 0xb244: /* SQDR - square root */
3611 case 0xb245: /* SQER - square root */
3612 case 0xb324: /* LDER - load lengthened */
3613 case 0xb337: /* MEER - multiply */
3614 case 0xb366: /* LEXR - load rounded */
3615 case 0xb370: /* LPDFR - load positive */
3616 case 0xb371: /* LNDFR - load negative */
3617 case 0xb372: /* CSDFR - copy sign */
3618 case 0xb373: /* LCDFR - load complement */
3619 case 0xb374: /* LZER - load zero */
3620 case 0xb375: /* LZDR - load zero */
3621 case 0xb377: /* FIER - load fp integer */
3622 case 0xb37f: /* FIDR - load fp integer */
3623 case 0xb3b4: /* CEFR - convert from fixed */
3624 case 0xb3b5: /* CDFR - convert from fixed */
3625 case 0xb3c1: /* LDGR - load fpr from gr */
3626 case 0xb3c4: /* CEGR - convert from fixed */
3627 case 0xb3c5: /* CDGR - convert from fixed */
3628 case 0xb3f6: /* IEDTR - insert biased exponent */
3629 /* float destination */
3630 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3631 return -1;
3632 break;
3633
3634 /* 0xb246-0xb24c: privileged or unsupported */
3635
3636 case 0xb24d: /* CPYA - copy access */
3637 case 0xb24e: /* SAR - set access */
3638 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3639 return -1;
3640 break;
3641
3642 /* 0xb250-0xb251 undefined or privileged */
3643 /* 0xb253-0xb254 undefined or privileged */
3644
3645 case 0xb255: /* MVST - move string [partial] */
3646 {
3647 uint8_t end;
3648 gdb_byte cur;
3649 ULONGEST num = 0;
3650 /* Read ending byte. */
3651 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3652 end = tmp & 0xff;
3653 /* Get address of second operand. */
3654 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3655 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3656 /* Search for ending byte and compute length. */
3657 do {
3658 num++;
3659 if (target_read_memory (oaddr, &cur, 1))
3660 return -1;
3661 oaddr++;
3662 } while (cur != end);
3663 /* Get address of first operand and record it. */
3664 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3665 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3666 if (record_full_arch_list_add_mem (oaddr, num))
3667 return -1;
3668 /* Record the registers. */
3669 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3670 return -1;
3671 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3672 return -1;
3673 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3674 return -1;
3675 }
3676 break;
3677
3678 /* 0xb256 undefined */
3679
3680 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3681 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3682 return -1;
3683 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3684 return -1;
3685 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3686 return -1;
3687 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3688 return -1;
3689 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3690 return -1;
3691 break;
3692
3693 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3694
3695 case 0xb25d: /* CLST - compare logical string [partial] */
3696 case 0xb25e: /* SRST - search string [partial] */
3697 case 0xb9be: /* SRSTU - search string unicode [partial] */
3698 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3699 return -1;
3700 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3701 return -1;
3702 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3703 return -1;
3704 break;
3705
3706 /* 0xb25f-0xb262 undefined */
3707
3708 case 0xb263: /* CMPSC - compression call [interruptible] */
3709 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3710 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3711 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3712 if (record_full_arch_list_add_mem (oaddr, tmp))
3713 return -1;
3714 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3715 return -1;
3716 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3717 return -1;
3718 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3719 return -1;
3720 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3721 return -1;
3722 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3723 return -1;
3724 /* DXC may be written */
3725 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3726 return -1;
3727 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3728 return -1;
3729 break;
3730
3731 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3732
3733 case 0xb278: /* STCKE - store clock extended */
3734 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3735 if (record_full_arch_list_add_mem (oaddr, 16))
3736 return -1;
3737 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3738 return -1;
3739 break;
3740
3741 /* 0xb279-0xb27b undefined or unsupported */
3742 /* 0xb27d-0xb298 undefined or privileged */
3743
3744 case 0xb299: /* SRNM - set rounding mode */
3745 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3746 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3747 case 0xb29d: /* LFPC - load fpc */
3748 case 0xb2bd: /* LFAS - load fpc and signal */
3749 case 0xb384: /* SFPC - set fpc */
3750 case 0xb385: /* SFASR - set fpc and signal */
3751 case 0xb960: /* CGRT - compare and trap */
3752 case 0xb961: /* CLGRT - compare logical and trap */
3753 case 0xb972: /* CRT - compare and trap */
3754 case 0xb973: /* CLRT - compare logical and trap */
3755 /* fpc only - including possible DXC write for trapping insns */
3756 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3757 return -1;
3758 break;
3759
3760 /* 0xb29a-0xb29b undefined */
3761
3762 case 0xb29c: /* STFPC - store fpc */
3763 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3764 if (record_full_arch_list_add_mem (oaddr, 4))
3765 return -1;
3766 break;
3767
3768 /* 0xb29e-0xb2a4 undefined */
3769
3770 case 0xb2a5: /* TRE - translate extended [partial] */
3771 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3772 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3773 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3774 if (record_full_arch_list_add_mem (oaddr, tmp))
3775 return -1;
3776 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3777 return -1;
3778 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3779 return -1;
3780 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3781 return -1;
3782 break;
3783
3784 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3785 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3786 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3787 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3788 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3789 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3790 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3791 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3792 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3793 if (record_full_arch_list_add_mem (oaddr, tmp))
3794 return -1;
3795 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3796 return -1;
3797 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3798 return -1;
3799 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3800 return -1;
3801 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3802 return -1;
3803 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3804 return -1;
3805 break;
3806
3807 /* 0xb2a8-0xb2af undefined */
3808
3809 case 0xb2b0: /* STFLE - store facility list extended */
3810 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3811 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3812 tmp &= 0xff;
3813 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3814 return -1;
3815 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3816 return -1;
3817 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3818 return -1;
3819 break;
3820
3821 /* 0xb2b1-0xb2b7 undefined or privileged */
3822 /* 0xb2ba-0xb2bc undefined */
3823 /* 0xb2be-0xb2e7 undefined */
3824 /* 0xb2e9-0xb2eb undefined */
3825 /* 0xb2ed-0xb2f7 undefined */
3826 /* 0xb2f8 unsupported: TEND */
3827 /* 0xb2f9 undefined */
3828
3829 case 0xb2e8: /* PPA - perform processor assist */
3830 case 0xb2fa: /* NIAI - next instruction access intent */
3831 /* no visible effects */
3832 break;
3833
3834 /* 0xb2fb undefined */
3835 /* 0xb2fc unsupported: TABORT */
3836 /* 0xb2fd-0xb2fe undefined */
3837 /* 0xb2ff unsupported: TRAP */
3838
3839 case 0xb300: /* LPEBR - load positive */
3840 case 0xb301: /* LNEBR - load negative */
3841 case 0xb303: /* LCEBR - load complement */
3842 case 0xb310: /* LPDBR - load positive */
3843 case 0xb311: /* LNDBR - load negative */
3844 case 0xb313: /* LCDBR - load complement */
3845 case 0xb350: /* TBEDR - convert hfp to bfp */
3846 case 0xb351: /* TBDR - convert hfp to bfp */
3847 case 0xb358: /* THDER - convert bfp to hfp */
3848 case 0xb359: /* THDR - convert bfp to hfp */
3849 /* float destination + flags */
3850 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3851 return -1;
3852 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3853 return -1;
3854 break;
3855
3856 case 0xb304: /* LDEBR - load lengthened */
3857 case 0xb30c: /* MDEBR - multiply */
3858 case 0xb30d: /* DEBR - divide */
3859 case 0xb314: /* SQEBR - square root */
3860 case 0xb315: /* SQDBR - square root */
3861 case 0xb317: /* MEEBR - multiply */
3862 case 0xb31c: /* MDBR - multiply */
3863 case 0xb31d: /* DDBR - divide */
3864 case 0xb344: /* LEDBRA - load rounded */
3865 case 0xb345: /* LDXBRA - load rounded */
3866 case 0xb346: /* LEXBRA - load rounded */
3867 case 0xb357: /* FIEBRA - load fp integer */
3868 case 0xb35f: /* FIDBRA - load fp integer */
3869 case 0xb390: /* CELFBR - convert from logical */
3870 case 0xb391: /* CDLFBR - convert from logical */
3871 case 0xb394: /* CEFBR - convert from fixed */
3872 case 0xb395: /* CDFBR - convert from fixed */
3873 case 0xb3a0: /* CELGBR - convert from logical */
3874 case 0xb3a1: /* CDLGBR - convert from logical */
3875 case 0xb3a4: /* CEGBR - convert from fixed */
3876 case 0xb3a5: /* CDGBR - convert from fixed */
3877 case 0xb3d0: /* MDTR - multiply */
3878 case 0xb3d1: /* DDTR - divide */
3879 case 0xb3d4: /* LDETR - load lengthened */
3880 case 0xb3d5: /* LEDTR - load lengthened */
3881 case 0xb3d7: /* FIDTR - load fp integer */
3882 case 0xb3dd: /* LDXTR - load lengthened */
3883 case 0xb3f1: /* CDGTR - convert from fixed */
3884 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3885 case 0xb3f3: /* CDSTR - convert from signed packed */
3886 case 0xb3f5: /* QADTR - quantize */
3887 case 0xb3f7: /* RRDTR - reround */
3888 case 0xb951: /* CDFTR - convert from fixed */
3889 case 0xb952: /* CDLGTR - convert from logical */
3890 case 0xb953: /* CDLFTR - convert from logical */
3891 /* float destination + fpc */
3892 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3893 return -1;
3894 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3895 return -1;
3896 break;
3897
3898 case 0xb305: /* LXDBR - load lengthened */
3899 case 0xb306: /* LXEBR - load lengthened */
3900 case 0xb307: /* MXDBR - multiply */
3901 case 0xb316: /* SQXBR - square root */
3902 case 0xb34c: /* MXBR - multiply */
3903 case 0xb34d: /* DXBR - divide */
3904 case 0xb347: /* FIXBRA - load fp integer */
3905 case 0xb392: /* CXLFBR - convert from logical */
3906 case 0xb396: /* CXFBR - convert from fixed */
3907 case 0xb3a2: /* CXLGBR - convert from logical */
3908 case 0xb3a6: /* CXGBR - convert from fixed */
3909 case 0xb3d8: /* MXTR - multiply */
3910 case 0xb3d9: /* DXTR - divide */
3911 case 0xb3dc: /* LXDTR - load lengthened */
3912 case 0xb3df: /* FIXTR - load fp integer */
3913 case 0xb3f9: /* CXGTR - convert from fixed */
3914 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3915 case 0xb3fb: /* CXSTR - convert from signed packed */
3916 case 0xb3fd: /* QAXTR - quantize */
3917 case 0xb3ff: /* RRXTR - reround */
3918 case 0xb959: /* CXFTR - convert from fixed */
3919 case 0xb95a: /* CXLGTR - convert from logical */
3920 case 0xb95b: /* CXLFTR - convert from logical */
3921 /* float pair destination + fpc */
3922 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3923 return -1;
3924 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3925 return -1;
3926 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3927 return -1;
3928 break;
3929
3930 case 0xb308: /* KEBR - compare and signal */
3931 case 0xb309: /* CEBR - compare */
3932 case 0xb318: /* KDBR - compare and signal */
3933 case 0xb319: /* CDBR - compare */
3934 case 0xb348: /* KXBR - compare and signal */
3935 case 0xb349: /* CXBR - compare */
3936 case 0xb3e0: /* KDTR - compare and signal */
3937 case 0xb3e4: /* CDTR - compare */
3938 case 0xb3e8: /* KXTR - compare and signal */
3939 case 0xb3ec: /* CXTR - compare */
3940 /* flags + fpc only */
3941 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3942 return -1;
3943 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3944 return -1;
3945 break;
3946
3947 case 0xb302: /* LTEBR - load and test */
3948 case 0xb312: /* LTDBR - load and test */
3949 case 0xb30a: /* AEBR - add */
3950 case 0xb30b: /* SEBR - subtract */
3951 case 0xb31a: /* ADBR - add */
3952 case 0xb31b: /* SDBR - subtract */
3953 case 0xb3d2: /* ADTR - add */
3954 case 0xb3d3: /* SDTR - subtract */
3955 case 0xb3d6: /* LTDTR - load and test */
3956 /* float destination + flags + fpc */
3957 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3958 return -1;
3959 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3960 return -1;
3961 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3962 return -1;
3963 break;
3964
3965 case 0xb30e: /* MAEBR - multiply and add */
3966 case 0xb30f: /* MSEBR - multiply and subtract */
3967 case 0xb31e: /* MADBR - multiply and add */
3968 case 0xb31f: /* MSDBR - multiply and subtract */
3969 /* float destination [RRD] + fpc */
3970 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3971 return -1;
3972 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3973 return -1;
3974 break;
3975
3976 /* 0xb320-0xb323 undefined */
3977 /* 0xb327-0xb32d undefined */
3978
3979 case 0xb32e: /* MAER - multiply and add */
3980 case 0xb32f: /* MSER - multiply and subtract */
3981 case 0xb338: /* MAYLR - multiply and add unnormalized */
3982 case 0xb339: /* MYLR - multiply unnormalized */
3983 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3984 case 0xb33d: /* MYHR - multiply unnormalized */
3985 case 0xb33e: /* MADR - multiply and add */
3986 case 0xb33f: /* MSDR - multiply and subtract */
3987 /* float destination [RRD] */
3988 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3989 return -1;
3990 break;
3991
3992 /* 0xb330-0xb335 undefined */
3993
3994 case 0xb33a: /* MAYR - multiply and add unnormalized */
3995 case 0xb33b: /* MYR - multiply unnormalized */
3996 /* float pair destination [RRD] */
3997 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3998 return -1;
3999 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4000 return -1;
4001 break;
4002
4003 case 0xb340: /* LPXBR - load positive */
4004 case 0xb341: /* LNXBR - load negative */
4005 case 0xb343: /* LCXBR - load complement */
4006 case 0xb360: /* LPXR - load positive */
4007 case 0xb361: /* LNXR - load negative */
4008 case 0xb362: /* LTXR - load and test */
4009 case 0xb363: /* LCXR - load complement */
4010 /* float pair destination + flags */
4011 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4012 return -1;
4013 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4014 return -1;
4015 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4016 return -1;
4017 break;
4018
4019 case 0xb342: /* LTXBR - load and test */
4020 case 0xb34a: /* AXBR - add */
4021 case 0xb34b: /* SXBR - subtract */
4022 case 0xb3da: /* AXTR - add */
4023 case 0xb3db: /* SXTR - subtract */
4024 case 0xb3de: /* LTXTR - load and test */
4025 /* float pair destination + flags + fpc */
4026 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4027 return -1;
4028 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4029 return -1;
4030 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4031 return -1;
4032 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4033 return -1;
4034 break;
4035
4036 /* 0xb34e-0xb34f undefined */
4037 /* 0xb352 undefined */
4038
4039 case 0xb353: /* DIEBR - divide to integer */
4040 case 0xb35b: /* DIDBR - divide to integer */
4041 /* two float destinations + flags + fpc */
4042 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4043 return -1;
4044 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4045 return -1;
4046 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4047 return -1;
4048 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4049 return -1;
4050 break;
4051
4052 /* 0xb354-0xb356 undefined */
4053 /* 0xb35a undefined */
4054
4055 /* 0xb35c-0xb35e undefined */
4056 /* 0xb364 undefined */
4057 /* 0xb368 undefined */
4058
4059 case 0xb369: /* CXR - compare */
4060 case 0xb3f4: /* CEDTR - compare biased exponent */
4061 case 0xb3fc: /* CEXTR - compare biased exponent */
4062 case 0xb920: /* CGR - compare */
4063 case 0xb921: /* CLGR - compare logical */
4064 case 0xb930: /* CGFR - compare */
4065 case 0xb931: /* CLGFR - compare logical */
4066 case 0xb9cd: /* CHHR - compare high */
4067 case 0xb9cf: /* CLHHR - compare logical high */
4068 case 0xb9dd: /* CHLR - compare high */
4069 case 0xb9df: /* CLHLR - compare logical high */
4070 /* flags only */
4071 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4072 return -1;
4073 break;
4074
4075 /* 0xb36a-0xb36f undefined */
4076 /* 0xb377-0xb37e undefined */
4077 /* 0xb380-0xb383 undefined */
4078 /* 0xb386-0xb38b undefined */
4079 /* 0xb38d-0xb38f undefined */
4080 /* 0xb393 undefined */
4081 /* 0xb397 undefined */
4082
4083 case 0xb398: /* CFEBR - convert to fixed */
4084 case 0xb399: /* CFDBR - convert to fixed */
4085 case 0xb39a: /* CFXBR - convert to fixed */
4086 case 0xb39c: /* CLFEBR - convert to logical */
4087 case 0xb39d: /* CLFDBR - convert to logical */
4088 case 0xb39e: /* CLFXBR - convert to logical */
4089 case 0xb941: /* CFDTR - convert to fixed */
4090 case 0xb949: /* CFXTR - convert to fixed */
4091 case 0xb943: /* CLFDTR - convert to logical */
4092 case 0xb94b: /* CLFXTR - convert to logical */
4093 /* 32-bit gpr destination + flags + fpc */
4094 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4095 return -1;
4096 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4097 return -1;
4098 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4099 return -1;
4100 break;
4101
4102 /* 0xb39b undefined */
4103 /* 0xb39f undefined */
4104
4105 /* 0xb3a3 undefined */
4106 /* 0xb3a7 undefined */
4107
4108 case 0xb3a8: /* CGEBR - convert to fixed */
4109 case 0xb3a9: /* CGDBR - convert to fixed */
4110 case 0xb3aa: /* CGXBR - convert to fixed */
4111 case 0xb3ac: /* CLGEBR - convert to logical */
4112 case 0xb3ad: /* CLGDBR - convert to logical */
4113 case 0xb3ae: /* CLGXBR - convert to logical */
4114 case 0xb3e1: /* CGDTR - convert to fixed */
4115 case 0xb3e9: /* CGXTR - convert to fixed */
4116 case 0xb942: /* CLGDTR - convert to logical */
4117 case 0xb94a: /* CLGXTR - convert to logical */
4118 /* 64-bit gpr destination + flags + fpc */
4119 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4120 return -1;
4121 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4122 return -1;
4123 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4124 return -1;
4125 break;
4126
4127 /* 0xb3ab undefined */
4128 /* 0xb3af-0xb3b3 undefined */
4129 /* 0xb3b7 undefined */
4130
4131 case 0xb3b8: /* CFER - convert to fixed */
4132 case 0xb3b9: /* CFDR - convert to fixed */
4133 case 0xb3ba: /* CFXR - convert to fixed */
4134 case 0xb998: /* ALCR - add logical with carry */
4135 case 0xb999: /* SLBR - subtract logical with borrow */
4136 case 0xb9f4: /* NRK - and */
4137 case 0xb9f6: /* ORK - or */
4138 case 0xb9f7: /* XRK - xor */
4139 case 0xb9f8: /* ARK - add */
4140 case 0xb9f9: /* SRK - subtract */
4141 case 0xb9fa: /* ALRK - add logical */
4142 case 0xb9fb: /* SLRK - subtract logical */
4143 /* 32-bit gpr destination + flags */
4144 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4145 return -1;
4146 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4147 return -1;
4148 break;
4149
4150 case 0xb3c8: /* CGER - convert to fixed */
4151 case 0xb3c9: /* CGDR - convert to fixed */
4152 case 0xb3ca: /* CGXR - convert to fixed */
4153 case 0xb900: /* LPGR - load positive */
4154 case 0xb901: /* LNGR - load negative */
4155 case 0xb902: /* LTGR - load and test */
4156 case 0xb903: /* LCGR - load complement */
4157 case 0xb908: /* AGR - add */
4158 case 0xb909: /* SGR - subtract */
4159 case 0xb90a: /* ALGR - add logical */
4160 case 0xb90b: /* SLGR - subtract logical */
4161 case 0xb910: /* LPGFR - load positive */
4162 case 0xb911: /* LNGFR - load negative */
4163 case 0xb912: /* LTGFR - load and test */
4164 case 0xb913: /* LCGFR - load complement */
4165 case 0xb918: /* AGFR - add */
4166 case 0xb919: /* SGFR - subtract */
4167 case 0xb91a: /* ALGFR - add logical */
4168 case 0xb91b: /* SLGFR - subtract logical */
4169 case 0xb980: /* NGR - and */
4170 case 0xb981: /* OGR - or */
4171 case 0xb982: /* XGR - xor */
4172 case 0xb988: /* ALCGR - add logical with carry */
4173 case 0xb989: /* SLBGR - subtract logical with borrow */
4174 case 0xb9e1: /* POPCNT - population count */
4175 case 0xb9e4: /* NGRK - and */
4176 case 0xb9e6: /* OGRK - or */
4177 case 0xb9e7: /* XGRK - xor */
4178 case 0xb9e8: /* AGRK - add */
4179 case 0xb9e9: /* SGRK - subtract */
4180 case 0xb9ea: /* ALGRK - add logical */
4181 case 0xb9eb: /* SLGRK - subtract logical */
4182 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4183 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4184 /* 64-bit gpr destination + flags */
4185 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4186 return -1;
4187 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4188 return -1;
4189 break;
4190
4191 /* 0xb3bb-0xb3c0 undefined */
4192 /* 0xb3c2-0xb3c3 undefined */
4193 /* 0xb3c7 undefined */
4194 /* 0xb3cb-0xb3cc undefined */
4195
4196 case 0xb3cd: /* LGDR - load gr from fpr */
4197 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4198 case 0xb3e3: /* CSDTR - convert to signed packed */
4199 case 0xb3e5: /* EEDTR - extract biased exponent */
4200 case 0xb3e7: /* ESDTR - extract significance */
4201 case 0xb3ed: /* EEXTR - extract biased exponent */
4202 case 0xb3ef: /* ESXTR - extract significance */
4203 case 0xb904: /* LGR - load */
4204 case 0xb906: /* LGBR - load byte */
4205 case 0xb907: /* LGHR - load halfword */
4206 case 0xb90c: /* MSGR - multiply single */
4207 case 0xb90f: /* LRVGR - load reversed */
4208 case 0xb914: /* LGFR - load */
4209 case 0xb916: /* LLGFR - load logical */
4210 case 0xb917: /* LLGTR - load logical thirty one bits */
4211 case 0xb91c: /* MSGFR - multiply single 64<32 */
4212 case 0xb946: /* BCTGR - branch on count */
4213 case 0xb984: /* LLGCR - load logical character */
4214 case 0xb985: /* LLGHR - load logical halfword */
4215 case 0xb9e2: /* LOCGR - load on condition */
4216 /* 64-bit gpr destination */
4217 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4218 return -1;
4219 break;
4220
4221 /* 0xb3ce-0xb3cf undefined */
4222 /* 0xb3e6 undefined */
4223
4224 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4225 case 0xb3eb: /* CSXTR - convert to signed packed */
4226 case 0xb90d: /* DSGR - divide single */
4227 case 0xb91d: /* DSGFR - divide single */
4228 case 0xb986: /* MLGR - multiply logical */
4229 case 0xb987: /* DLGR - divide logical */
4230 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4231 /* 64-bit gpr pair destination */
4232 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4233 return -1;
4234 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4235 return -1;
4236 break;
4237
4238 /* 0xb3ee undefined */
4239 /* 0xb3f0 undefined */
4240 /* 0xb3f8 undefined */
4241
4242 /* 0xb905 privileged */
4243
4244 /* 0xb90e unsupported: EREGG */
4245
4246 /* 0xb915 undefined */
4247
4248 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4249 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4250 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4251 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4252 tmp &= 0xff;
4253 switch (tmp)
4254 {
4255 case 0x00: /* KMAC-Query */
4256 if (record_full_arch_list_add_mem (oaddr, 16))
4257 return -1;
4258 break;
4259
4260 case 0x01: /* KMAC-DEA */
4261 case 0x02: /* KMAC-TDEA-128 */
4262 case 0x03: /* KMAC-TDEA-192 */
4263 case 0x09: /* KMAC-Encrypted-DEA */
4264 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4265 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4266 if (record_full_arch_list_add_mem (oaddr, 8))
4267 return -1;
4268 break;
4269
4270 case 0x12: /* KMAC-AES-128 */
4271 case 0x13: /* KMAC-AES-192 */
4272 case 0x14: /* KMAC-AES-256 */
4273 case 0x1a: /* KMAC-Encrypted-AES-128 */
4274 case 0x1b: /* KMAC-Encrypted-AES-192 */
4275 case 0x1c: /* KMAC-Encrypted-AES-256 */
4276 if (record_full_arch_list_add_mem (oaddr, 16))
4277 return -1;
4278 break;
4279
4280 default:
4281 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4282 (int)tmp, paddress (gdbarch, addr));
4283 return -1;
4284 }
4285 if (tmp != 0)
4286 {
4287 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4288 return -1;
4289 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4290 return -1;
4291 }
4292 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4293 return -1;
4294 break;
4295
4296 /* 0xb922-0xb924 undefined */
4297 /* 0xb925 privileged */
4298 /* 0xb928 privileged */
4299
4300 case 0xb929: /* KMA - cipher message with authentication */
4301 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4302 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4303 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4304 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4305 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4306 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4307 tmp &= 0x7f;
4308 switch (tmp)
4309 {
4310 case 0x00: /* KM*-Query */
4311 if (record_full_arch_list_add_mem (oaddr, 16))
4312 return -1;
4313 break;
4314
4315 case 0x01: /* KM*-DEA */
4316 case 0x02: /* KM*-TDEA-128 */
4317 case 0x03: /* KM*-TDEA-192 */
4318 case 0x09: /* KM*-Encrypted-DEA */
4319 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4320 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4321 if (record_full_arch_list_add_mem (oaddr, 8))
4322 return -1;
4323 break;
4324
4325 case 0x12: /* KM*-AES-128 */
4326 case 0x13: /* KM*-AES-192 */
4327 case 0x14: /* KM*-AES-256 */
4328 case 0x1a: /* KM*-Encrypted-AES-128 */
4329 case 0x1b: /* KM*-Encrypted-AES-192 */
4330 case 0x1c: /* KM*-Encrypted-AES-256 */
4331 if (record_full_arch_list_add_mem (oaddr, 16))
4332 return -1;
4333 break;
4334
4335 case 0x43: /* KMC-PRNG */
4336 /* Only valid for KMC. */
4337 if (insn[0] == 0xb92f)
4338 {
4339 if (record_full_arch_list_add_mem (oaddr, 8))
4340 return -1;
4341 break;
4342 }
86a73007
TT
4343 /* For other instructions... */
4344 /* Fall through. */
ef8914a4
PR
4345 default:
4346 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4347 (int)tmp, paddress (gdbarch, addr));
4348 return -1;
4349 }
4350 if (tmp != 0)
4351 {
4352 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4353 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4354 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4355 if (record_full_arch_list_add_mem (oaddr2, tmp))
4356 return -1;
4357 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4358 return -1;
4359 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4360 return -1;
4361 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4362 return -1;
4363 }
4364 if (tmp != 0 && insn[0] == 0xb929)
4365 {
4366 if (record_full_arch_list_add_reg (regcache,
4367 S390_R0_REGNUM + inib[4]))
4368 return -1;
4369 if (record_full_arch_list_add_reg (regcache,
4370 S390_R0_REGNUM + (inib[4] | 1)))
4371 return -1;
4372 }
4373 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4374 return -1;
4375 break;
4376
4377 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4378 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4379 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4380 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4381 tmp &= 0x7f;
4382 switch (tmp)
4383 {
4384 case 0x00: /* PCC-Query */
4385 if (record_full_arch_list_add_mem (oaddr, 16))
4386 return -1;
4387 break;
4388
4389 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4390 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4391 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4392 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4393 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4394 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4395 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4396 return -1;
4397 break;
4398
4399 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4400 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4401 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4402 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4403 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4404 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4405 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4406 return -1;
4407 break;
4408
4409 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4410 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4411 return -1;
4412 break;
4413
4414 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4415 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4416 return -1;
4417 break;
4418
4419 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4420 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4421 return -1;
4422 break;
4423
4424 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4425 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4426 return -1;
4427 break;
4428
4429 default:
4430 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4431 (int)tmp, paddress (gdbarch, addr));
4432 return -1;
4433 }
4434 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4435 return -1;
4436 break;
4437
4438 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4439 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4440 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4441 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4442 tmp &= 0x7f;
4443 switch (tmp)
4444 {
4445 case 0x00: /* KMCTR-Query */
4446 if (record_full_arch_list_add_mem (oaddr, 16))
4447 return -1;
4448 break;
4449
4450 case 0x01: /* KMCTR-DEA */
4451 case 0x02: /* KMCTR-TDEA-128 */
4452 case 0x03: /* KMCTR-TDEA-192 */
4453 case 0x09: /* KMCTR-Encrypted-DEA */
4454 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4455 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4456 case 0x12: /* KMCTR-AES-128 */
4457 case 0x13: /* KMCTR-AES-192 */
4458 case 0x14: /* KMCTR-AES-256 */
4459 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4460 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4461 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4462 break;
4463
4464 default:
4465 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4466 (int)tmp, paddress (gdbarch, addr));
4467 return -1;
4468 }
4469 if (tmp != 0)
4470 {
4471 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4472 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4473 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4474 if (record_full_arch_list_add_mem (oaddr2, tmp))
4475 return -1;
4476 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4477 return -1;
4478 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4479 return -1;
4480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4481 return -1;
4482 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4483 return -1;
4484 }
4485 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4486 return -1;
4487 break;
4488
4489 case 0xb92e: /* KM - cipher message [partial] */
4490 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4491 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4492 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4493 tmp &= 0x7f;
4494 switch (tmp)
4495 {
4496 case 0x00: /* KM-Query */
4497 if (record_full_arch_list_add_mem (oaddr, 16))
4498 return -1;
4499 break;
4500
4501 case 0x01: /* KM-DEA */
4502 case 0x02: /* KM-TDEA-128 */
4503 case 0x03: /* KM-TDEA-192 */
4504 case 0x09: /* KM-Encrypted-DEA */
4505 case 0x0a: /* KM-Encrypted-TDEA-128 */
4506 case 0x0b: /* KM-Encrypted-TDEA-192 */
4507 case 0x12: /* KM-AES-128 */
4508 case 0x13: /* KM-AES-192 */
4509 case 0x14: /* KM-AES-256 */
4510 case 0x1a: /* KM-Encrypted-AES-128 */
4511 case 0x1b: /* KM-Encrypted-AES-192 */
4512 case 0x1c: /* KM-Encrypted-AES-256 */
4513 break;
4514
4515 case 0x32: /* KM-XTS-AES-128 */
4516 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4517 return -1;
4518 break;
4519
4520 case 0x34: /* KM-XTS-AES-256 */
4521 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4522 return -1;
4523 break;
4524
4525 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4526 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4527 return -1;
4528 break;
4529
4530 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4531 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4532 return -1;
4533 break;
4534
4535 default:
4536 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4537 (int)tmp, paddress (gdbarch, addr));
4538 return -1;
4539 }
4540 if (tmp != 0)
4541 {
4542 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4543 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4544 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4545 if (record_full_arch_list_add_mem (oaddr2, tmp))
4546 return -1;
4547 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4548 return -1;
4549 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4550 return -1;
4551 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4552 return -1;
4553 }
4554 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4555 return -1;
4556 break;
4557
4558 /* 0xb932-0xb93b undefined */
4559
4560 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4561 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4562 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4563 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4564 tmp &= 0xff;
4565 switch (tmp)
4566 {
4567 case 0x00: /* PPNO-Query */
4568 case 0x80: /* PPNO-Query */
4569 if (record_full_arch_list_add_mem (oaddr, 16))
4570 return -1;
4571 break;
4572
4573 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4574 if (record_full_arch_list_add_mem (oaddr, 240))
4575 return -1;
4576 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4577 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4578 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4579 if (record_full_arch_list_add_mem (oaddr2, tmp))
4580 return -1;
4581 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4582 return -1;
4583 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4584 return -1;
4585 break;
4586
4587 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4588 if (record_full_arch_list_add_mem (oaddr, 240))
4589 return -1;
4590 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4591 return -1;
4592 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4593 return -1;
4594 break;
4595
4596 default:
4597 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4598 (int)tmp, paddress (gdbarch, addr));
4599 return -1;
4600 }
4601 /* DXC may be written */
4602 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4603 return -1;
4604 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4605 return -1;
4606 break;
4607
4608 /* 0xb93d undefined */
4609
4610 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4611 case 0xb93f: /* KLMD - compute last message digest [partial] */
4612 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4613 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4614 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4615 tmp &= 0xff;
4616 switch (tmp)
4617 {
4618 case 0x00: /* K*MD-Query */
4619 if (record_full_arch_list_add_mem (oaddr, 16))
4620 return -1;
4621 break;
4622
4623 case 0x01: /* K*MD-SHA-1 */
4624 if (record_full_arch_list_add_mem (oaddr, 20))
4625 return -1;
4626 break;
4627
4628 case 0x02: /* K*MD-SHA-256 */
4629 if (record_full_arch_list_add_mem (oaddr, 32))
4630 return -1;
4631 break;
4632
4633 case 0x03: /* K*MD-SHA-512 */
4634 if (record_full_arch_list_add_mem (oaddr, 64))
4635 return -1;
4636 break;
4637
4638 case 0x41: /* KIMD-GHASH */
4639 /* Only valid for KIMD. */
4640 if (insn[0] == 0xb93e)
4641 {
4642 if (record_full_arch_list_add_mem (oaddr, 16))
4643 return -1;
4644 break;
4645 }
86a73007
TT
4646 /* For KLMD... */
4647 /* Fall through. */
ef8914a4
PR
4648 default:
4649 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4650 (int)tmp, paddress (gdbarch, addr));
4651 return -1;
4652 }
4653 if (tmp != 0)
4654 {
4655 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4656 return -1;
4657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4658 return -1;
4659 }
4660 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4661 return -1;
4662 break;
4663
4664 /* 0xb940 undefined */
4665 /* 0xb944-0xb945 undefined */
4666 /* 0xb947-0xb948 undefined */
4667 /* 0xb94c-0xb950 undefined */
4668 /* 0xb954-0xb958 undefined */
4669 /* 0xb95c-0xb95f undefined */
4670 /* 0xb962-0xb971 undefined */
4671 /* 0xb974-0xb97f undefined */
4672
4673 case 0xb983: /* FLOGR - find leftmost one */
4674 /* 64-bit gpr pair destination + flags */
4675 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4676 return -1;
4677 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4678 return -1;
4679 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4680 return -1;
4681 break;
4682
4683 /* 0xb98a privileged */
4684 /* 0xb98b-0xb98c undefined */
4685
4686 case 0xb98d: /* EPSW - extract psw */
4687 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4688 return -1;
4689 if (inib[7])
4690 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4691 return -1;
4692 break;
4693
4694 /* 0xb98e-0xb98f privileged */
4695
4696 case 0xb990: /* TRTT - translate two to two [partial] */
4697 case 0xb991: /* TRTO - translate two to one [partial] */
4698 case 0xb992: /* TROT - translate one to two [partial] */
4699 case 0xb993: /* TROO - translate one to one [partial] */
4700 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4701 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4702 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4703 /* tmp is source length, we want destination length. Adjust. */
4704 if (insn[0] == 0xb991)
4705 tmp >>= 1;
4706 if (insn[0] == 0xb992)
4707 tmp <<= 1;
4708 if (record_full_arch_list_add_mem (oaddr, tmp))
4709 return -1;
4710 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4711 return -1;
4712 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4713 return -1;
4714 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4715 return -1;
4716 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4717 return -1;
4718 break;
4719
4720 case 0xb996: /* MLR - multiply logical */
4721 case 0xb997: /* DLR - divide logical */
4722 /* 32-bit gpr pair destination */
4723 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4724 return -1;
4725 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4726 return -1;
4727 break;
4728
4729 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4730 /* 0xb9b4-0xb9bc undefined */
4731
4732 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4733 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4734 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4735 return -1;
4736 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4737 return -1;
4738 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4739 return -1;
4740 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4741 return -1;
4742 break;
4743
4744 /* 0xb9c0-0xb9c7 undefined */
4745
4746 case 0xb9c8: /* AHHHR - add high */
4747 case 0xb9c9: /* SHHHR - subtract high */
4748 case 0xb9ca: /* ALHHHR - add logical high */
4749 case 0xb9cb: /* SLHHHR - subtract logical high */
4750 case 0xb9d8: /* AHHLR - add high */
4751 case 0xb9d9: /* SHHLR - subtract high */
4752 case 0xb9da: /* ALHHLR - add logical high */
4753 case 0xb9db: /* SLHHLR - subtract logical high */
4754 /* 32-bit high gpr destination + flags */
4755 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4756 return -1;
4757 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4758 return -1;
4759 break;
4760
4761 /* 0xb9cc undefined */
4762 /* 0xb9ce undefined */
4763 /* 0xb9d0-0xb9d7 undefined */
4764 /* 0xb9dc undefined */
4765 /* 0xb9de undefined */
4766
4767 case 0xb9e0: /* LOCFHR - load high on condition */
4768 /* 32-bit high gpr destination */
4769 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4770 return -1;
4771 break;
4772
4773 /* 0xb9e3 undefined */
4774 /* 0xb9e5 undefined */
4775 /* 0xb9ee-0xb9f1 undefined */
4776 /* 0xb9f3 undefined */
4777 /* 0xb9f5 undefined */
4778 /* 0xb9fc undefined */
4779 /* 0xb9fe -0xb9ff undefined */
4780
4781 default:
4782 goto UNKNOWN_OP;
4783 }
4784 break;
4785
4786 /* 0xb4-0xb5 undefined */
4787 /* 0xb6 privileged: STCTL - store control */
4788 /* 0xb7 privileged: LCTL - load control */
4789 /* 0xb8 undefined */
4790
4791 case 0xba: /* CS - compare and swap */
4792 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4793 if (record_full_arch_list_add_mem (oaddr, 4))
4794 return -1;
4795 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4796 return -1;
4797 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4798 return -1;
4799 break;
4800
4801 case 0xbb: /* CDS - compare double and swap */
4802 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4803 if (record_full_arch_list_add_mem (oaddr, 8))
4804 return -1;
4805 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4806 return -1;
4807 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4808 return -1;
4809 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4810 return -1;
4811 break;
4812
4813 /* 0xbc undefined */
4814
4815 case 0xbe: /* STCM - store characters under mask */
4816 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4817 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4818 return -1;
4819 break;
4820
4821 case 0xc0:
4822 case 0xc2:
4823 case 0xc4:
4824 case 0xc6:
4825 case 0xcc:
4826 /* RIL-format instruction */
4827 switch (ibyte[0] << 4 | inib[3])
4828 {
4829 case 0xc00: /* LARL - load address relative long */
4830 case 0xc05: /* BRASL - branch relative and save long */
4831 case 0xc09: /* IILF - insert immediate */
4832 case 0xc21: /* MSFI - multiply single immediate */
4833 case 0xc42: /* LLHRL - load logical halfword relative long */
4834 case 0xc45: /* LHRL - load halfword relative long */
4835 case 0xc4d: /* LRL - load relative long */
4836 /* 32-bit or native gpr destination */
4837 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4838 return -1;
4839 break;
4840
4841 case 0xc01: /* LGFI - load immediate */
4842 case 0xc0e: /* LLIHF - load logical immediate */
4843 case 0xc0f: /* LLILF - load logical immediate */
4844 case 0xc20: /* MSGFI - multiply single immediate */
4845 case 0xc44: /* LGHRL - load halfword relative long */
4846 case 0xc46: /* LLGHRL - load logical halfword relative long */
4847 case 0xc48: /* LGRL - load relative long */
4848 case 0xc4c: /* LGFRL - load relative long */
4849 case 0xc4e: /* LLGFRL - load logical relative long */
4850 /* 64-bit gpr destination */
4851 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4852 return -1;
4853 break;
4854
4855 /* 0xc02-0xc03 undefined */
4856
4857 case 0xc04: /* BRCL - branch relative on condition long */
4858 case 0xc62: /* PFDRL - prefetch data relative long */
4859 break;
4860
4861 case 0xc06: /* XIHF - xor immediate */
4862 case 0xc0a: /* NIHF - and immediate */
4863 case 0xc0c: /* OIHF - or immediate */
4864 case 0xcc8: /* AIH - add immediate high */
4865 case 0xcca: /* ALSIH - add logical with signed immediate high */
4866 /* 32-bit high gpr destination + flags */
4867 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4868 return -1;
4869 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4870 return -1;
4871 break;
4872
4873 case 0xc07: /* XILF - xor immediate */
4874 case 0xc0b: /* NILF - and immediate */
4875 case 0xc0d: /* OILF - or immediate */
4876 case 0xc25: /* SLFI - subtract logical immediate */
4877 case 0xc29: /* AFI - add immediate */
4878 case 0xc2b: /* ALFI - add logical immediate */
4879 /* 32-bit gpr destination + flags */
4880 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4881 return -1;
4882 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4883 return -1;
4884 break;
4885
4886 case 0xc08: /* IIHF - insert immediate */
4887 case 0xcc6: /* BRCTH - branch relative on count high */
4888 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4889 /* 32-bit high gpr destination */
4890 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4891 return -1;
4892 break;
4893
4894 /* 0xc22-0xc23 undefined */
4895
4896 case 0xc24: /* SLGFI - subtract logical immediate */
4897 case 0xc28: /* AGFI - add immediate */
4898 case 0xc2a: /* ALGFI - add logical immediate */
4899 /* 64-bit gpr destination + flags */
4900 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4901 return -1;
4902 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4903 return -1;
4904 break;
4905
4906 /* 0xc26-0xc27 undefined */
4907
4908 case 0xc2c: /* CGFI - compare immediate */
4909 case 0xc2d: /* CFI - compare immediate */
4910 case 0xc2e: /* CLGFI - compare logical immediate */
4911 case 0xc2f: /* CLFI - compare logical immediate */
4912 case 0xc64: /* CGHRL - compare halfword relative long */
4913 case 0xc65: /* CHRL - compare halfword relative long */
4914 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4915 case 0xc67: /* CLHRL - compare logical halfword relative long */
4916 case 0xc68: /* CGRL - compare relative long */
4917 case 0xc6a: /* CLGRL - compare logical relative long */
4918 case 0xc6c: /* CGFRL - compare relative long */
4919 case 0xc6d: /* CRL - compare relative long */
4920 case 0xc6e: /* CLGFRL - compare logical relative long */
4921 case 0xc6f: /* CLRL - compare logical relative long */
4922 case 0xccd: /* CIH - compare immediate high */
4923 case 0xccf: /* CLIH - compare logical immediate high */
4924 /* flags only */
4925 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4926 return -1;
4927 break;
4928
4929 /* 0xc40-0xc41 undefined */
4930 /* 0xc43 undefined */
4931
4932 case 0xc47: /* STHRL - store halfword relative long */
4933 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4934 if (record_full_arch_list_add_mem (oaddr, 2))
4935 return -1;
4936 break;
4937
4938 /* 0xc49-0xc4a undefined */
4939
4940 case 0xc4b: /* STGRL - store relative long */
4941 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4942 if (record_full_arch_list_add_mem (oaddr, 8))
4943 return -1;
4944 break;
4945
4946 case 0xc4f: /* STRL - store relative long */
4947 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4948 if (record_full_arch_list_add_mem (oaddr, 4))
4949 return -1;
4950 break;
4951
4952 case 0xc60: /* EXRL - execute relative long */
4953 if (ex != -1)
4954 {
4955 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4956 paddress (gdbarch, addr));
4957 return -1;
4958 }
4959 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4960 if (inib[2])
4961 {
4962 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4963 ex = tmp & 0xff;
4964 }
4965 else
4966 {
4967 ex = 0;
4968 }
4969 goto ex;
4970
4971 /* 0xc61 undefined */
4972 /* 0xc63 undefined */
4973 /* 0xc69 undefined */
4974 /* 0xc6b undefined */
4975 /* 0xcc0-0xcc5 undefined */
4976 /* 0xcc7 undefined */
4977 /* 0xcc9 undefined */
4978 /* 0xccc undefined */
4979 /* 0xcce undefined */
4980
4981 default:
4982 goto UNKNOWN_OP;
4983 }
4984 break;
4985
4986 /* 0xc1 undefined */
4987 /* 0xc3 undefined */
4988
4989 case 0xc5: /* BPRP - branch prediction relative preload */
4990 case 0xc7: /* BPP - branch prediction preload */
4991 /* no visible effect */
4992 break;
4993
4994 case 0xc8:
4995 /* SSF-format instruction */
4996 switch (ibyte[0] << 4 | inib[3])
4997 {
4998 /* 0xc80 unsupported */
4999
5000 case 0xc81: /* ECTG - extract cpu time */
5001 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5002 return -1;
5003 if (s390_record_gpr_g (gdbarch, regcache, 0))
5004 return -1;
5005 if (s390_record_gpr_g (gdbarch, regcache, 1))
5006 return -1;
5007 break;
5008
5009 case 0xc82: /* CSST - compare and swap and store */
5010 {
5011 uint8_t fc, sc;
5012 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5013 fc = tmp & 0xff;
5014 sc = tmp >> 8 & 0xff;
5015
5016 /* First and third operands. */
5017 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5018 switch (fc)
5019 {
5020 case 0x00: /* 32-bit */
5021 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5022 return -1;
5023 if (record_full_arch_list_add_mem (oaddr, 4))
5024 return -1;
5025 break;
5026
5027 case 0x01: /* 64-bit */
5028 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5029 return -1;
5030 if (record_full_arch_list_add_mem (oaddr, 8))
5031 return -1;
5032 break;
5033
5034 case 0x02: /* 128-bit */
5035 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5036 return -1;
5037 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5038 return -1;
5039 if (record_full_arch_list_add_mem (oaddr, 16))
5040 return -1;
5041 break;
5042
5043 default:
5044 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5045 fc, paddress (gdbarch, addr));
5046 return -1;
5047 }
5048
5049 /* Second operand. */
5050 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5051 if (sc > 4)
5052 {
5053 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5054 sc, paddress (gdbarch, addr));
5055 return -1;
5056 }
5057
5058 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5059 return -1;
5060
5061 /* Flags. */
5062 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5063 return -1;
5064 }
5065 break;
5066
5067 /* 0xc83 undefined */
5068
5069 case 0xc84: /* LPD - load pair disjoint */
5070 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5071 return -1;
5072 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5073 return -1;
5074 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5075 return -1;
5076 break;
5077
5078 case 0xc85: /* LPDG - load pair disjoint */
5079 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5080 return -1;
5081 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5082 return -1;
5083 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5084 return -1;
5085 break;
5086
5087 /* 0xc86-0xc8f undefined */
5088
5089 default:
5090 goto UNKNOWN_OP;
5091 }
5092 break;
5093
5094 /* 0xc9-0xcb undefined */
5095 /* 0xcd-0xcf undefined */
5096
5097 case 0xd0: /* TRTR - translate and test reversed */
5098 case 0xdd: /* TRT - translate and test */
5099 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5100 return -1;
5101 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5102 return -1;
5103 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5104 return -1;
5105 break;
5106
5107 case 0xd1: /* MVN - move numbers */
5108 case 0xd2: /* MVC - move */
5109 case 0xd3: /* MVZ - move zones */
5110 case 0xdc: /* TR - translate */
5111 case 0xe8: /* MVCIN - move inverse */
5112 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5113 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5114 return -1;
5115 break;
5116
5117 case 0xd4: /* NC - and */
5118 case 0xd6: /* OC - or*/
5119 case 0xd7: /* XC - xor */
5120 case 0xe2: /* UNPKU - unpack unicode */
5121 case 0xea: /* UNPKA - unpack ASCII */
5122 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5123 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5124 return -1;
5125 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5126 return -1;
5127 break;
5128
5129 case 0xde: /* ED - edit */
5130 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5131 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5132 return -1;
5133 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5134 return -1;
5135 /* DXC may be written */
5136 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5137 return -1;
5138 break;
5139
5140 case 0xdf: /* EDMK - edit and mark */
5141 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5142 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5143 return -1;
5144 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5145 return -1;
5146 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5147 return -1;
5148 /* DXC may be written */
5149 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5150 return -1;
5151 break;
5152
5153 /* 0xd8 undefined */
5154 /* 0xd9 unsupported: MVCK - move with key */
5155 /* 0xda unsupported: MVCP - move to primary */
5156 /* 0xdb unsupported: MVCS - move to secondary */
5157 /* 0xe0 undefined */
5158
5159 case 0xe1: /* PKU - pack unicode */
5160 case 0xe9: /* PKA - pack ASCII */
5161 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5162 if (record_full_arch_list_add_mem (oaddr, 16))
5163 return -1;
5164 break;
5165
5166 case 0xe3:
5167 case 0xe6:
5168 case 0xe7:
5169 case 0xeb:
5170 case 0xed:
5171 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5172 switch (ibyte[0] << 8 | ibyte[5])
5173 {
5174 /* 0xe300-0xe301 undefined */
5175
5176 case 0xe302: /* LTG - load and test */
5177 case 0xe308: /* AG - add */
5178 case 0xe309: /* SG - subtract */
5179 case 0xe30a: /* ALG - add logical */
5180 case 0xe30b: /* SLG - subtract logical */
5181 case 0xe318: /* AGF - add */
5182 case 0xe319: /* SGF - subtract */
5183 case 0xe31a: /* ALGF - add logical */
5184 case 0xe31b: /* SLGF - subtract logical */
5185 case 0xe332: /* LTGF - load and test */
5186 case 0xe380: /* NG - and */
5187 case 0xe381: /* OG - or */
5188 case 0xe382: /* XG - xor */
5189 case 0xe388: /* ALCG - add logical with carry */
5190 case 0xe389: /* SLBG - subtract logical with borrow */
5191 case 0xeb0a: /* SRAG - shift right single */
5192 case 0xeb0b: /* SLAG - shift left single */
5193 /* 64-bit gpr destination + flags */
5194 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5195 return -1;
5196 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5197 return -1;
5198 break;
5199
5200 /* 0xe303 privileged */
5201
5202 case 0xe304: /* LG - load */
5203 case 0xe30c: /* MSG - multiply single */
5204 case 0xe30f: /* LRVG - load reversed */
5205 case 0xe314: /* LGF - load */
5206 case 0xe315: /* LGH - load halfword */
5207 case 0xe316: /* LLGF - load logical */
5208 case 0xe317: /* LLGT - load logical thirty one bits */
5209 case 0xe31c: /* MSGF - multiply single */
5210 case 0xe32a: /* LZRG - load and zero rightmost byte */
5211 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5212 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5213 case 0xe346: /* BCTG - branch on count */
5214 case 0xe377: /* LGB - load byte */
5215 case 0xe390: /* LLGC - load logical character */
5216 case 0xe391: /* LLGH - load logical halfword */
5217 case 0xeb0c: /* SRLG - shift right single logical */
5218 case 0xeb0d: /* SLLG - shift left single logical */
5219 case 0xeb1c: /* RLLG - rotate left single logical */
5220 case 0xeb44: /* BXHG - branch on index high */
5221 case 0xeb45: /* BXLEG - branch on index low or equal */
5222 case 0xeb4c: /* ECAG - extract cpu attribute */
5223 case 0xebe2: /* LOCG - load on condition */
5224 /* 64-bit gpr destination */
5225 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5226 return -1;
5227 break;
5228
5229 /* 0xe305 undefined */
5230
5231 case 0xe306: /* CVBY - convert to binary */
5232 /* 32-bit or native gpr destination + FPC (DXC write) */
5233 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5234 return -1;
5235 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5236 return -1;
5237 break;
5238
5239 /* 0xe307 undefined */
5240
5241 case 0xe30d: /* DSG - divide single */
5242 case 0xe31d: /* DSGF - divide single */
5243 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5244 case 0xe386: /* MLG - multiply logical */
5245 case 0xe387: /* DLG - divide logical */
5246 case 0xe38f: /* LPQ - load pair from quadword */
5247 /* 64-bit gpr pair destination */
5248 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5249 return -1;
5250 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5251 return -1;
5252 break;
5253
5254 case 0xe30e: /* CVBG - convert to binary */
5255 /* 64-bit gpr destination + FPC (DXC write) */
5256 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5257 return -1;
5258 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5259 return -1;
5260 break;
5261
5262 /* 0xe310-0xe311 undefined */
5263
5264 case 0xe312: /* LT - load and test */
5265 case 0xe338: /* AGH - add halfword to 64 bit value */
5266 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5267 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5268 case 0xe354: /* NY - and */
5269 case 0xe356: /* OY - or */
5270 case 0xe357: /* XY - xor */
5271 case 0xe35a: /* AY - add */
5272 case 0xe35b: /* SY - subtract */
5273 case 0xe35e: /* ALY - add logical */
5274 case 0xe35f: /* SLY - subtract logical */
5275 case 0xe37a: /* AHY - add halfword */
5276 case 0xe37b: /* SHY - subtract halfword */
5277 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5278 case 0xe398: /* ALC - add logical with carry */
5279 case 0xe399: /* SLB - subtract logical with borrow */
5280 case 0xe727: /* LCBB - load count to block bounduary */
5281 case 0xeb81: /* ICMY - insert characters under mask */
5282 case 0xebdc: /* SRAK - shift left single */
5283 case 0xebdd: /* SLAK - shift left single */
5284 /* 32/64-bit gpr destination + flags */
5285 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5286 return -1;
5287 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5288 return -1;
5289 break;
5290
5291 /* 0xe313 privileged */
5292
5293 case 0xe31e: /* LRV - load reversed */
5294 case 0xe31f: /* LRVH - load reversed */
5295 case 0xe33b: /* LZRF - load and zero rightmost byte */
5296 case 0xe351: /* MSY - multiply single */
5297 case 0xe358: /* LY - load */
5298 case 0xe371: /* LAY - load address */
5299 case 0xe373: /* ICY - insert character */
5300 case 0xe376: /* LB - load byte */
5301 case 0xe378: /* LHY - load */
5302 case 0xe37c: /* MHY - multiply halfword */
5303 case 0xe394: /* LLC - load logical character */
5304 case 0xe395: /* LLH - load logical halfword */
5305 case 0xeb1d: /* RLL - rotate left single logical */
5306 case 0xebde: /* SRLK - shift left single logical */
5307 case 0xebdf: /* SLLK - shift left single logical */
5308 case 0xebf2: /* LOC - load on condition */
5309 /* 32-bit or native gpr destination */
5310 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5311 return -1;
5312 break;
5313
5314 case 0xe320: /* CG - compare */
5315 case 0xe321: /* CLG - compare logical */
5316 case 0xe330: /* CGF - compare */
5317 case 0xe331: /* CLGF - compare logical */
5318 case 0xe334: /* CGH - compare halfword */
5319 case 0xe355: /* CLY - compare logical */
5320 case 0xe359: /* CY - compare */
5321 case 0xe379: /* CHY - compare halfword */
5322 case 0xe3cd: /* CHF - compare high */
5323 case 0xe3cf: /* CLHF - compare logical high */
5324 case 0xeb20: /* CLMH - compare logical under mask high */
5325 case 0xeb21: /* CLMY - compare logical under mask */
5326 case 0xeb51: /* TMY - test under mask */
5327 case 0xeb55: /* CLIY - compare logical */
5328 case 0xebc0: /* TP - test decimal */
5329 case 0xed10: /* TCEB - test data class */
5330 case 0xed11: /* TCDB - test data class */
5331 case 0xed12: /* TCXB - test data class */
5332 case 0xed50: /* TDCET - test data class */
5333 case 0xed51: /* TDGET - test data group */
5334 case 0xed54: /* TDCDT - test data class */
5335 case 0xed55: /* TDGDT - test data group */
5336 case 0xed58: /* TDCXT - test data class */
5337 case 0xed59: /* TDGXT - test data group */
5338 /* flags only */
5339 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5340 return -1;
5341 break;
5342
5343 /* 0xe322-0xe323 undefined */
5344
5345 case 0xe324: /* STG - store */
5346 case 0xe325: /* NTSTG - nontransactional store */
5347 case 0xe326: /* CVDY - convert to decimal */
5348 case 0xe32f: /* STRVG - store reversed */
5349 case 0xebe3: /* STOCG - store on condition */
5350 case 0xed67: /* STDY - store */
5351 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5352 if (record_full_arch_list_add_mem (oaddr, 8))
5353 return -1;
5354 break;
5355
5356 /* 0xe327-0xe329 undefined */
5357 /* 0xe32b-0xe32d undefined */
5358
5359 case 0xe32e: /* CVDG - convert to decimal */
5360 case 0xe38e: /* STPQ - store pair to quadword */
5361 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5362 if (record_full_arch_list_add_mem (oaddr, 16))
5363 return -1;
5364 break;
5365
5366 /* 0xe333 undefined */
5367 /* 0xe335 undefined */
5368
5369 case 0xe336: /* PFD - prefetch data */
5370 break;
5371
5372 /* 0xe337 undefined */
5373 /* 0xe33c-0xe33d undefined */
5374
5375 case 0xe33e: /* STRV - store reversed */
5376 case 0xe350: /* STY - store */
5377 case 0xe3cb: /* STFH - store high */
5378 case 0xebe1: /* STOCFH - store high on condition */
5379 case 0xebf3: /* STOC - store on condition */
5380 case 0xed66: /* STEY - store */
5381 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5382 if (record_full_arch_list_add_mem (oaddr, 4))
5383 return -1;
5384 break;
5385
5386 case 0xe33f: /* STRVH - store reversed */
5387 case 0xe370: /* STHY - store halfword */
5388 case 0xe3c7: /* STHH - store halfword high */
5389 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5390 if (record_full_arch_list_add_mem (oaddr, 2))
5391 return -1;
5392 break;
5393
5394 /* 0xe340-0xe345 undefined */
5395
5396 case 0xe347: /* BIC - branch indirect on condition */
5397 break;
5398
5399 /* 0xe348-0xe34f undefined */
5400 /* 0xe352 undefined */
5401
5402 case 0xe35c: /* MFY - multiply */
5403 case 0xe396: /* ML - multiply logical */
5404 case 0xe397: /* DL - divide logical */
5405 /* 32-bit gpr pair destination */
5406 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5407 return -1;
5408 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5409 return -1;
5410 break;
5411
5412 /* 0xe35d undefined */
5413 /* 0xe360-0xe36f undefined */
5414
5415 case 0xe372: /* STCY - store character */
5416 case 0xe3c3: /* STCH - store character high */
5417 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5418 if (record_full_arch_list_add_mem (oaddr, 1))
5419 return -1;
5420 break;
5421
5422 /* 0xe374 undefined */
5423
5424 case 0xe375: /* LAEY - load address extended */
5425 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5426 return -1;
5427 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5428 return -1;
5429 break;
5430
5431 /* 0xe37d-0xe37f undefined */
5432
5433 case 0xe385: /* LGAT - load and trap */
5434 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5435 case 0xe39d: /* LLGFAT - load logical and trap */
5436 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5437 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5438 case 0xe721: /* VLGV - vector load gr from vr element */
5439 /* 64-bit gpr destination + fpc for possible DXC write */
5440 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5441 return -1;
5442 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5443 return -1;
5444 break;
5445
5446 /* 0xe38a-0xe38d undefined */
5447 /* 0xe392-0xe393 undefined */
5448 /* 0xe39a-0xe39b undefined */
5449 /* 0xe39e undefined */
5450
5451 case 0xe39f: /* LAT - load and trap */
5452 /* 32-bit gpr destination + fpc for possible DXC write */
5453 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5454 return -1;
5455 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5456 return -1;
5457 break;
5458
5459 /* 0xe3a0-0xe3bf undefined */
5460
5461 case 0xe3c0: /* LBH - load byte high */
5462 case 0xe3c2: /* LLCH - load logical character high */
5463 case 0xe3c4: /* LHH - load halfword high */
5464 case 0xe3c6: /* LLHH - load logical halfword high */
5465 case 0xe3ca: /* LFH - load high */
5466 case 0xebe0: /* LOCFH - load high on condition */
5467 /* 32-bit high gpr destination */
5468 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5469 return -1;
5470 break;
5471
5472 /* 0xe3c1 undefined */
5473 /* 0xe3c5 undefined */
5474
5475 case 0xe3c8: /* LFHAT - load high and trap */
5476 /* 32-bit high gpr destination + fpc for possible DXC write */
5477 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5478 return -1;
5479 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5480 return -1;
5481 break;
5482
5483 /* 0xe3c9 undefined */
5484 /* 0xe3cc undefined */
5485 /* 0xe3ce undefined */
5486 /* 0xe3d0-0xe3ff undefined */
5487
5488 case 0xe634: /* VPKZ - vector pack zoned */
5489 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5490 case 0xe637: /* VLRLR - vector load rightmost with length */
5491 case 0xe649: /* VLIP - vector load immediate decimal */
5492 case 0xe700: /* VLEB - vector load element */
5493 case 0xe701: /* VLEH - vector load element */
5494 case 0xe702: /* VLEG - vector load element */
5495 case 0xe703: /* VLEF - vector load element */
5496 case 0xe704: /* VLLEZ - vector load logical element and zero */
5497 case 0xe705: /* VLREP - vector load and replicate */
5498 case 0xe706: /* VL - vector load */
5499 case 0xe707: /* VLBB - vector load to block bounduary */
5500 case 0xe712: /* VGEG - vector gather element */
5501 case 0xe713: /* VGEF - vector gather element */
5502 case 0xe722: /* VLVG - vector load vr element from gr */
5503 case 0xe730: /* VESL - vector element shift left */
5504 case 0xe733: /* VERLL - vector element rotate left logical */
5505 case 0xe737: /* VLL - vector load with length */
5506 case 0xe738: /* VESRL - vector element shift right logical */
5507 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5508 case 0xe740: /* VLEIB - vector load element immediate */
5509 case 0xe741: /* VLEIH - vector load element immediate */
5510 case 0xe742: /* VLEIG - vector load element immediate */
5511 case 0xe743: /* VLEIF - vector load element immediate */
5512 case 0xe744: /* VGBM - vector generate byte mask */
5513 case 0xe745: /* VREPI - vector replicate immediate */
5514 case 0xe746: /* VGM - vector generate mask */
5515 case 0xe74d: /* VREP - vector replicate */
5516 case 0xe750: /* VPOPCT - vector population count */
5517 case 0xe752: /* VCTZ - vector count trailing zeros */
5518 case 0xe753: /* VCLZ - vector count leading zeros */
5519 case 0xe756: /* VLR - vector load */
5520 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5521 case 0xe760: /* VMRL - vector merge low */
5522 case 0xe761: /* VMRH - vector merge high */
5523 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5524 case 0xe764: /* VSUM - vector sum across word */
5525 case 0xe765: /* VSUMG - vector sum across doubleword */
5526 case 0xe766: /* VCKSM - vector checksum */
5527 case 0xe767: /* VSUMQ - vector sum across quadword */
5528 case 0xe768: /* VN - vector and */
5529 case 0xe769: /* VNC - vector and with complement */
5530 case 0xe76a: /* VO - vector or */
5531 case 0xe76b: /* VNO - vector nor */
5532 case 0xe76c: /* VNX - vector not exclusive or */
5533 case 0xe76d: /* VX - vector xor */
5534 case 0xe76e: /* VNN - vector nand */
5535 case 0xe76f: /* VOC - vector or with complement */
5536 case 0xe770: /* VESLV - vector element shift left */
5537 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5538 case 0xe773: /* VERLLV - vector element rotate left logical */
5539 case 0xe774: /* VSL - vector shift left */
5540 case 0xe775: /* VSLB - vector shift left by byte */
5541 case 0xe777: /* VSLDB - vector shift left double by byte */
5542 case 0xe778: /* VESRLV - vector element shift right logical */
5543 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5544 case 0xe77c: /* VSRL - vector shift right logical */
5545 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5546 case 0xe77e: /* VSRA - vector shift right arithmetic */
5547 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5548 case 0xe784: /* VPDI - vector permute doubleword immediate */
5549 case 0xe785: /* VBPERM - vector bit permute */
5550 case 0xe78c: /* VPERM - vector permute */
5551 case 0xe78d: /* VSEL - vector select */
5552 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5553 case 0xe78f: /* VFMA - vector fp multiply and add */
5554 case 0xe794: /* VPK - vector pack */
5555 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5556 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5557 case 0xe7a1: /* VMLH - vector multiply logical high */
5558 case 0xe7a2: /* VML - vector multiply low */
5559 case 0xe7a3: /* VMH - vector multiply high */
5560 case 0xe7a4: /* VMLE - vector multiply logical even */
5561 case 0xe7a5: /* VMLO - vector multiply logical odd */
5562 case 0xe7a6: /* VME - vector multiply even */
5563 case 0xe7a7: /* VMO - vector multiply odd */
5564 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5565 case 0xe7aa: /* VMAL - vector multiply and add low */
5566 case 0xe7ab: /* VMAH - vector multiply and add high */
5567 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5568 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5569 case 0xe7ae: /* VMAE - vector multiply and add even */
5570 case 0xe7af: /* VMAO - vector multiply and add odd */
5571 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5572 case 0xe7b8: /* VMSL - vector multiply sum logical */
5573 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5574 case 0xe7bb: /* VAC - vector add with carry */
5575 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5576 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5577 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5578 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5579 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5580 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5581 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5582 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5583 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5584 case 0xe7c7: /* VFI - vector load fp integer */
5585 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5586 case 0xe7ce: /* VFSQ - vector fp square root */
5587 case 0xe7d4: /* VUPLL - vector unpack logical low */
5588 case 0xe7d6: /* VUPL - vector unpack low */
5589 case 0xe7d5: /* VUPLH - vector unpack logical high */
5590 case 0xe7d7: /* VUPH - vector unpack high */
5591 case 0xe7de: /* VLC - vector load complement */
5592 case 0xe7df: /* VLP - vector load positive */
5593 case 0xe7e2: /* VFA - vector fp subtract */
5594 case 0xe7e3: /* VFA - vector fp add */
5595 case 0xe7e5: /* VFD - vector fp divide */
5596 case 0xe7e7: /* VFM - vector fp multiply */
5597 case 0xe7ee: /* VFMIN - vector fp minimum */
5598 case 0xe7ef: /* VFMAX - vector fp maximum */
5599 case 0xe7f0: /* VAVGL - vector average logical */
5600 case 0xe7f1: /* VACC - vector add and compute carry */
5601 case 0xe7f2: /* VAVG - vector average */
5602 case 0xe7f3: /* VA - vector add */
5603 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5604 case 0xe7f7: /* VS - vector subtract */
5605 case 0xe7fc: /* VMNL - vector minimum logical */
5606 case 0xe7fd: /* VMXL - vector maximum logical */
5607 case 0xe7fe: /* VMN - vector minimum */
5608 case 0xe7ff: /* VMX - vector maximum */
5609 /* vector destination + FPC */
5610 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5611 return -1;
5612 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5613 return -1;
5614 break;
5615
5616 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5617 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5618 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5619 return -1;
5620 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5621 return -1;
5622 break;
5623
5624 case 0xe708: /* VSTEB - vector store element */
5625 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5626 if (record_full_arch_list_add_mem (oaddr, 1))
5627 return -1;
5628 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5629 return -1;
5630 break;
5631
5632 case 0xe709: /* VSTEH - vector store element */
5633 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5634 if (record_full_arch_list_add_mem (oaddr, 2))
5635 return -1;
5636 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5637 return -1;
5638 break;
5639
5640 case 0xe70a: /* VSTEG - vector store element */
5641 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5642 if (record_full_arch_list_add_mem (oaddr, 8))
5643 return -1;
5644 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5645 return -1;
5646 break;
5647
5648 case 0xe70b: /* VSTEF - vector store element */
5649 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5650 if (record_full_arch_list_add_mem (oaddr, 4))
5651 return -1;
5652 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5653 return -1;
5654 break;
5655
5656 /* 0xe70c-0xe70d undefined */
5657
5658 case 0xe70e: /* VST - vector store */
5659 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5660 if (record_full_arch_list_add_mem (oaddr, 16))
5661 return -1;
5662 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5663 return -1;
5664 break;
5665
5666 /* 0xe70f-0xe711 undefined */
5667 /* 0xe714-0xe719 undefined */
5668
5669 case 0xe71a: /* VSCEG - vector scatter element */
5670 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5671 return -1;
5672 if (record_full_arch_list_add_mem (oaddr, 8))
5673 return -1;
5674 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5675 return -1;
5676 break;
5677
5678 case 0xe71b: /* VSCEF - vector scatter element */
5679 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5680 return -1;
5681 if (record_full_arch_list_add_mem (oaddr, 4))
5682 return -1;
5683 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5684 return -1;
5685 break;
5686
5687 /* 0xe71c-0xe720 undefined */
5688 /* 0xe723-0xe726 undefined */
5689 /* 0xe728-0xe72f undefined */
5690 /* 0xe731-0xe732 undefined */
5691 /* 0xe734-0xe735 undefined */
5692
5693 case 0xe736: /* VLM - vector load multiple */
5694 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5695 if (s390_record_vr (gdbarch, regcache, i))
5696 return -1;
5697 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5698 return -1;
5699 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5700 return -1;
5701 break;
5702
5703 /* 0xe739 undefined */
5704 /* 0xe73b-0xe73d undefined */
5705
5706 case 0xe73e: /* VSTM - vector store multiple */
5707 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5708 if (ivec[0] <= ivec[1])
5709 n = ivec[1] - ivec[0] + 1;
5710 else
5711 n = ivec[1] + 0x20 - ivec[0] + 1;
5712 if (record_full_arch_list_add_mem (oaddr, n * 16))
5713 return -1;
5714 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5715 return -1;
5716 break;
5717
5718 case 0xe63c: /* VUPKZ - vector unpack zoned */
5719 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5720 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5721 return -1;
5722 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5723 return -1;
5724 break;
5725
5726 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5727 case 0xe73f: /* VSTL - vector store with length */
5728 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5729 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5730 tmp &= 0xffffffffu;
5731 if (tmp > 15)
5732 tmp = 15;
5733 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5734 return -1;
5735 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5736 return -1;
5737 break;
5738
5739 /* 0xe747-0xe749 undefined */
5740
5741 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5742 case 0xe659: /* VSRP - vector shift and round decimal */
5743 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5744 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5745 case 0xe671: /* VAP - vector add decimal */
5746 case 0xe673: /* VSP - vector subtract decimal */
5747 case 0xe678: /* VMP - vector multiply decimal */
5748 case 0xe679: /* VMSP - vector multiply decimal */
5749 case 0xe67a: /* VDP - vector divide decimal */
5750 case 0xe67b: /* VRP - vector remainder decimal */
5751 case 0xe67e: /* VSDP - vector shift and divide decimal */
5752 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5753 case 0xe75c: /* VISTR - vector isolate string */
5754 case 0xe780: /* VFEE - vector find element equal */
5755 case 0xe781: /* VFENE - vector find element not equal */
5756 case 0xe782: /* VFA - vector find any element equal */
5757 case 0xe78a: /* VSTRC - vector string range compare */
5758 case 0xe795: /* VPKLS - vector pack logical saturate */
5759 case 0xe797: /* VPKS - vector pack saturate */
5760 case 0xe7e8: /* VFCE - vector fp compare equal */
5761 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5762 case 0xe7eb: /* VFCH - vector fp compare high */
5763 case 0xe7f8: /* VCEQ - vector compare equal */
5764 case 0xe7f9: /* VCHL - vector compare high logical */
5765 case 0xe7fb: /* VCH - vector compare high */
5766 /* vector destination + flags + FPC */
5767 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5768 return -1;
5769 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5770 return -1;
5771 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5772 return -1;
5773 break;
5774
5775 case 0xe65f: /* VTP - vector test decimal */
5776 /* flags + FPC */
5777 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5778 return -1;
5779 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5780 return -1;
5781 break;
5782
5783 /* 0xe74b-0xe74c undefined */
5784 /* 0xe74e-0xe74f undefined */
5785 /* 0xe751 undefined */
5786 /* 0xe754-0xe755 undefined */
5787 /* 0xe757-0xe75b undefined */
5788 /* 0xe75d-0xe75e undefined */
5789 /* 0xe763 undefined */
5790 /* 0xe771 undefined */
5791 /* 0xe776 undefined */
5792 /* 0xe779 undefined */
5793 /* 0xe77b undefined */
5794 /* 0xe783 undefined */
5795 /* 0xe786-0xe789 undefined */
5796 /* 0xe78b undefined */
5797 /* 0xe790-0xe793 undefined */
5798 /* 0xe796 undefined */
5799 /* 0xe798-0xe79d undefined */
5800 /* 0xe7a0 undefined */
5801 /* 0xe7a8 undefined */
5802 /* 0xe7b0-0xe7b3 undefined */
5803 /* 0xe7b5-0xe7b7 undefined */
5804 /* 0xe7ba undefined */
5805 /* 0xe7be undefined */
5806 /* 0xe7c6 undefined */
5807 /* 0xe7c8-0xe7c9 undefined */
5808
5809 case 0xe677: /* VCP - vector compare decimal */
5810 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5811 case 0xe7cb: /* WFC - vector fp compare scalar */
5812 case 0xe7d8: /* VTM - vector test under mask */
5813 case 0xe7d9: /* VECL - vector element compare logical */
5814 case 0xe7db: /* VEC - vector element compare */
5815 case 0xed08: /* KEB - compare and signal */
5816 case 0xed09: /* CEB - compare */
5817 case 0xed18: /* KDB - compare and signal */
5818 case 0xed19: /* CDB - compare */
5819 /* flags + fpc only */
5820 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5821 return -1;
5822 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5823 return -1;
5824 break;
5825
5826 /* 0xe7cd undefined */
5827 /* 0xe7cf-0xe7d3 undefined */
5828 /* 0xe7da undefined */
5829 /* 0xe7dc-0xe7dd undefined */
5830 /* 0xe7e0-0xe7e1 undefined */
5831 /* 0xe7e4 undefined */
5832 /* 0xe7e6 undefined */
5833 /* 0xe7e9 undefined */
5834 /* 0xe7ec-0xe7ed undefined */
5835 /* 0xe7f4 undefined */
5836 /* 0xe7f6 undefined */
5837 /* 0xe7fa undefined */
5838
5839 /* 0xeb00-0xeb03 undefined */
5840
5841 case 0xeb04: /* LMG - load multiple */
5842 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5843 if (s390_record_gpr_g (gdbarch, regcache, i))
5844 return -1;
5845 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5846 return -1;
5847 break;
5848
5849 /* 0xeb05-0xeb09 undefined */
5850 /* 0xeb0e undefined */
5851 /* 0xeb0f privileged: TRACG */
5852 /* 0xeb10-0xeb13 undefined */
5853
5854 case 0xeb14: /* CSY - compare and swap */
5855 case 0xebf4: /* LAN - load and and */
5856 case 0xebf6: /* LAO - load and or */
5857 case 0xebf7: /* LAX - load and xor */
5858 case 0xebf8: /* LAA - load and add */
5859 case 0xebfa: /* LAAL - load and add logical */
5860 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5861 if (record_full_arch_list_add_mem (oaddr, 4))
5862 return -1;
5863 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5864 return -1;
5865 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5866 return -1;
5867 break;
5868
5869 /* 0xeb15-0xeb1b undefined */
5870 /* 0xeb1e-0xeb1f undefined */
5871 /* 0xeb22 undefined */
5872
5873 case 0xeb23: /* CLT - compare logical and trap */
5874 case 0xeb2b: /* CLGT - compare logical and trap */
5875 /* fpc only - including possible DXC write for trapping insns */
5876 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5877 return -1;
5878 break;
5879
5880 case 0xeb24: /* STMG - store multiple */
5881 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5882 if (inib[2] <= inib[3])
5883 n = inib[3] - inib[2] + 1;
5884 else
5885 n = inib[3] + 0x10 - inib[2] + 1;
5886 if (record_full_arch_list_add_mem (oaddr, n * 8))
5887 return -1;
5888 break;
5889
5890 /* 0xeb25 privileged */
5891
5892 case 0xeb26: /* STMH - store multiple high */
5893 case 0xeb90: /* STMY - store multiple */
5894 case 0xeb9b: /* STAMY - store access multiple */
5895 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5896 if (inib[2] <= inib[3])
5897 n = inib[3] - inib[2] + 1;
5898 else
5899 n = inib[3] + 0x10 - inib[2] + 1;
5900 if (record_full_arch_list_add_mem (oaddr, n * 4))
5901 return -1;
5902 break;
5903
5904 /* 0xeb27-0xeb2a undefined */
5905
5906 case 0xeb2c: /* STCMH - store characters under mask */
5907 case 0xeb2d: /* STCMY - store characters under mask */
5908 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5909 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5910 return -1;
5911 break;
5912
5913 /* 0xeb2e undefined */
5914 /* 0xeb2f privileged */
5915
5916 case 0xeb30: /* CSG - compare and swap */
5917 case 0xebe4: /* LANG - load and and */
5918 case 0xebe6: /* LAOG - load and or */
5919 case 0xebe7: /* LAXG - load and xor */
5920 case 0xebe8: /* LAAG - load and add */
5921 case 0xebea: /* LAALG - load and add logical */
5922 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5923 if (record_full_arch_list_add_mem (oaddr, 8))
5924 return -1;
5925 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5926 return -1;
5927 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5928 return -1;
5929 break;
5930
5931 case 0xeb31: /* CDSY - compare double and swap */
5932 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5933 if (record_full_arch_list_add_mem (oaddr, 8))
5934 return -1;
5935 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5936 return -1;
5937 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5938 return -1;
5939 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5940 return -1;
5941 break;
5942
5943 /* 0xeb32-0xeb3d undefined */
5944
5945 case 0xeb3e: /* CDSG - compare double and swap */
5946 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5947 if (record_full_arch_list_add_mem (oaddr, 16))
5948 return -1;
5949 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5950 return -1;
5951 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5952 return -1;
5953 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5954 return -1;
5955 break;
5956
5957 /* 0xeb3f-0xeb43 undefined */
5958 /* 0xeb46-0xeb4b undefined */
5959 /* 0xeb4d-0xeb50 undefined */
5960
5961 case 0xeb52: /* MVIY - move */
5962 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5963 if (record_full_arch_list_add_mem (oaddr, 1))
5964 return -1;
5965 break;
5966
5967 case 0xeb54: /* NIY - and */
5968 case 0xeb56: /* OIY - or */
5969 case 0xeb57: /* XIY - xor */
5970 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5971 if (record_full_arch_list_add_mem (oaddr, 1))
5972 return -1;
5973 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5974 return -1;
5975 break;
5976
5977 /* 0xeb53 undefined */
5978 /* 0xeb58-0xeb69 undefined */
5979
5980 case 0xeb6a: /* ASI - add immediate */
5981 case 0xeb6e: /* ALSI - add immediate */
5982 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5983 if (record_full_arch_list_add_mem (oaddr, 4))
5984 return -1;
5985 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5986 return -1;
5987 break;
5988
5989 /* 0xeb6b-0xeb6d undefined */
5990 /* 0xeb6f-0xeb79 undefined */
5991
5992 case 0xeb7a: /* AGSI - add immediate */
5993 case 0xeb7e: /* ALGSI - add immediate */
5994 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5995 if (record_full_arch_list_add_mem (oaddr, 8))
5996 return -1;
5997 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5998 return -1;
5999 break;
6000
6001 /* 0xeb7b-0xeb7d undefined */
6002 /* 0xeb7f undefined */
6003
6004 case 0xeb80: /* ICMH - insert characters under mask */
6005 /* 32-bit high gpr destination + flags */
6006 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6007 return -1;
6008 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6009 return -1;
6010 break;
6011
6012 /* 0xeb82-0xeb8d undefined */
6013
6014 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6015 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6016 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6017 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6018 if (record_full_arch_list_add_mem (oaddr, tmp))
6019 return -1;
6020 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6021 return -1;
6022 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6023 return -1;
6024 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6025 return -1;
6026 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6027 return -1;
6028 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6029 return -1;
6030 break;
6031
6032 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6033 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6034 return -1;
6035 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6036 return -1;
6037 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6038 return -1;
6039 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6040 return -1;
6041 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6042 return -1;
6043 break;
6044
6045 /* 0xeb91-0xeb95 undefined */
6046
6047 case 0xeb96: /* LMH - load multiple high */
6048 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6049 if (s390_record_gpr_h (gdbarch, regcache, i))
6050 return -1;
6051 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6052 return -1;
6053 break;
6054
6055 /* 0xeb97 undefined */
6056
6057 case 0xeb98: /* LMY - load multiple */
6058 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6059 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6060 return -1;
6061 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6062 return -1;
6063 break;
6064
6065 /* 0xeb99 undefined */
6066
6067 case 0xeb9a: /* LAMY - load access multiple */
6068 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6069 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6070 return -1;
6071 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6072 return -1;
6073 break;
6074
6075 /* 0xeb9c-0xebbf undefined */
6076 /* 0xebc1-0xebdb undefined */
6077 /* 0xebe5 undefined */
6078 /* 0xebe9 undefined */
6079 /* 0xebeb-0xebf1 undefined */
6080 /* 0xebf5 undefined */
6081 /* 0xebf9 undefined */
6082 /* 0xebfb-0xebff undefined */
6083
6084 /* 0xed00-0xed03 undefined */
6085
6086 case 0xed04: /* LDEB - load lengthened */
6087 case 0xed0c: /* MDEB - multiply */
6088 case 0xed0d: /* DEB - divide */
6089 case 0xed14: /* SQEB - square root */
6090 case 0xed15: /* SQDB - square root */
6091 case 0xed17: /* MEEB - multiply */
6092 case 0xed1c: /* MDB - multiply */
6093 case 0xed1d: /* DDB - divide */
6094 /* float destination + fpc */
6095 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6096 return -1;
6097 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6098 return -1;
6099 break;
6100
6101 case 0xed05: /* LXDB - load lengthened */
6102 case 0xed06: /* LXEB - load lengthened */
6103 case 0xed07: /* MXDB - multiply */
6104 /* float pair destination + fpc */
6105 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6106 return -1;
6107 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6108 return -1;
6109 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6110 return -1;
6111 break;
6112
6113 case 0xed0a: /* AEB - add */
6114 case 0xed0b: /* SEB - subtract */
6115 case 0xed1a: /* ADB - add */
6116 case 0xed1b: /* SDB - subtract */
6117 /* float destination + flags + fpc */
6118 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6119 return -1;
6120 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6121 return -1;
6122 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6123 return -1;
6124 break;
6125
6126 case 0xed0e: /* MAEB - multiply and add */
6127 case 0xed0f: /* MSEB - multiply and subtract */
6128 case 0xed1e: /* MADB - multiply and add */
6129 case 0xed1f: /* MSDB - multiply and subtract */
6130 case 0xed40: /* SLDT - shift significand left */
6131 case 0xed41: /* SRDT - shift significand right */
6132 case 0xedaa: /* CDZT - convert from zoned */
6133 case 0xedae: /* CDPT - convert from packed */
6134 /* float destination [RXF] + fpc */
6135 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6136 return -1;
6137 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6138 return -1;
6139 break;
6140
6141 /* 0xed13 undefined */
6142 /* 0xed16 undefined */
6143 /* 0xed20-0xed23 undefined */
6144
6145 case 0xed24: /* LDE - load lengthened */
6146 case 0xed34: /* SQE - square root */
6147 case 0xed35: /* SQD - square root */
6148 case 0xed37: /* MEE - multiply */
6149 case 0xed64: /* LEY - load */
6150 case 0xed65: /* LDY - load */
6151 /* float destination */
6152 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6153 return -1;
6154 break;
6155
6156 case 0xed25: /* LXD - load lengthened */
6157 case 0xed26: /* LXE - load lengthened */
6158 /* float pair destination */
6159 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6160 return -1;
6161 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6162 return -1;
6163 break;
6164
6165 /* 0xed27-0xed2d undefined */
6166
6167 case 0xed2e: /* MAE - multiply and add */
6168 case 0xed2f: /* MSE - multiply and subtract */
6169 case 0xed38: /* MAYL - multiply and add unnormalized */
6170 case 0xed39: /* MYL - multiply unnormalized */
6171 case 0xed3c: /* MAYH - multiply and add unnormalized */
6172 case 0xed3d: /* MYH - multiply unnormalized */
6173 case 0xed3e: /* MAD - multiply and add */
6174 case 0xed3f: /* MSD - multiply and subtract */
6175 /* float destination [RXF] */
6176 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6177 return -1;
6178 break;
6179
6180 /* 0xed30-0xed33 undefined */
6181 /* 0xed36 undefined */
6182
6183 case 0xed3a: /* MAY - multiply and add unnormalized */
6184 case 0xed3b: /* MY - multiply unnormalized */
6185 /* float pair destination [RXF] */
6186 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6187 return -1;
6188 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6189 return -1;
6190 break;
6191
6192 /* 0xed42-0xed47 undefind */
6193
6194 case 0xed48: /* SLXT - shift significand left */
6195 case 0xed49: /* SRXT - shift significand right */
6196 case 0xedab: /* CXZT - convert from zoned */
6197 case 0xedaf: /* CXPT - convert from packed */
6198 /* float pair destination [RXF] + fpc */
6199 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6200 return -1;
6201 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6202 return -1;
6203 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6204 return -1;
6205 break;
6206
6207 /* 0xed4a-0xed4f undefind */
6208 /* 0xed52-0xed53 undefind */
6209 /* 0xed56-0xed57 undefind */
6210 /* 0xed5a-0xed63 undefind */
6211 /* 0xed68-0xeda7 undefined */
6212
6213 case 0xeda8: /* CZDT - convert to zoned */
6214 case 0xeda9: /* CZXT - convert to zoned */
6215 case 0xedac: /* CPDT - convert to packed */
6216 case 0xedad: /* CPXT - convert to packed */
6217 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6218 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6219 return -1;
6220 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6221 return -1;
6222 break;
6223
6224 /* 0xedb0-0xedff undefined */
6225
6226 default:
6227 goto UNKNOWN_OP;
6228 }
6229 break;
6230
6231 /* 0xe4 undefined */
6232
6233 case 0xe5:
6234 /* SSE/SIL-format instruction */
6235 switch (insn[0])
6236 {
6237 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6238
6239 case 0xe544: /* MVHHI - move */
6240 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6241 if (record_full_arch_list_add_mem (oaddr, 2))
6242 return -1;
6243 break;
6244
6245 /* 0xe545-0xe547 undefined */
6246
6247 case 0xe548: /* MVGHI - move */
6248 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6249 if (record_full_arch_list_add_mem (oaddr, 8))
6250 return -1;
6251 break;
6252
6253 /* 0xe549-0xe54b undefined */
6254
6255 case 0xe54c: /* MVHI - move */
6256 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6257 if (record_full_arch_list_add_mem (oaddr, 4))
6258 return -1;
6259 break;
6260
6261 /* 0xe54d-0xe553 undefined */
6262
6263 case 0xe554: /* CHHSI - compare halfword immediate */
6264 case 0xe555: /* CLHHSI - compare logical immediate */
6265 case 0xe558: /* CGHSI - compare halfword immediate */
6266 case 0xe559: /* CLGHSI - compare logical immediate */
6267 case 0xe55c: /* CHSI - compare halfword immediate */
6268 case 0xe55d: /* CLFHSI - compare logical immediate */
6269 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6270 return -1;
6271 break;
6272
6273 /* 0xe556-0xe557 undefined */
6274 /* 0xe55a-0xe55b undefined */
6275 /* 0xe55e-0xe55f undefined */
6276
6277 case 0xe560: /* TBEGIN - transaction begin */
6278 /* The transaction will be immediately aborted after this
6279 instruction, due to single-stepping. This instruction is
6280 only supported so that the program can fail a few times
6281 and go to the non-transactional fallback. */
6282 if (inib[4])
6283 {
6284 /* Transaction diagnostic block - user. */
6285 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6286 if (record_full_arch_list_add_mem (oaddr, 256))
6287 return -1;
6288 }
6289 /* Transaction diagnostic block - supervisor. */
6290 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6291 return -1;
6292 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6293 return -1;
6294 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6295 return -1;
6296 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6297 return -1;
6298 for (i = 0; i < 16; i++)
6299 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6300 return -1;
6301 /* And flags. */
6302 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6303 return -1;
6304 break;
6305
6306 /* 0xe561 unsupported: TBEGINC */
6307 /* 0xe562-0xe5ff undefined */
6308
6309 default:
6310 goto UNKNOWN_OP;
6311 }
6312 break;
6313
6314 case 0xec:
6315 /* RIE/RIS/RRS-format instruction */
6316 switch (ibyte[0] << 8 | ibyte[5])
6317 {
6318 /* 0xec00-0xec41 undefined */
6319
6320 case 0xec42: /* LOCHI - load halfword immediate on condition */
6321 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6322 /* 32-bit or native gpr destination */
6323 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6324 return -1;
6325 break;
6326
6327 /* 0xec43 undefined */
6328
6329 case 0xec44: /* BRXHG - branch relative on index high */
6330 case 0xec45: /* BRXLG - branch relative on index low or equal */
6331 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6332 case 0xec59: /* RISBGN - rotate then insert selected bits */
6333 /* 64-bit gpr destination */
6334 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6335 return -1;
6336 break;
6337
6338 /* 0xec47-0xec4d undefined */
6339
6340 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6341 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6342 /* 32-bit high gpr destination */
6343 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6344 return -1;
6345 break;
6346
6347 /* 0xec4f-0xec50 undefined */
6348 /* 0xec52-0xec53 undefined */
6349
6350 case 0xec54: /* RNSBG - rotate then and selected bits */
6351 case 0xec55: /* RISBG - rotate then insert selected bits */
6352 case 0xec56: /* ROSBG - rotate then or selected bits */
6353 case 0xec57: /* RXSBG - rotate then xor selected bits */
6354 case 0xecd9: /* AGHIK - add immediate */
6355 case 0xecdb: /* ALGHSIK - add logical immediate */
6356 /* 64-bit gpr destination + flags */
6357 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6358 return -1;
6359 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6360 return -1;
6361 break;
6362
6363 /* 0xec58 undefined */
6364 /* 0xec5a-0xec5c undefined */
6365 /* 0xec5e-0xec63 undefined */
6366
6367 case 0xec64: /* CGRJ - compare and branch relative */
6368 case 0xec65: /* CLGRJ - compare logical and branch relative */
6369 case 0xec76: /* CRJ - compare and branch relative */
6370 case 0xec77: /* CLRJ - compare logical and branch relative */
6371 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6372 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6373 case 0xec7e: /* CIJ - compare immediate and branch relative */
6374 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6375 case 0xece4: /* CGRB - compare and branch */
6376 case 0xece5: /* CLGRB - compare logical and branch */
6377 case 0xecf6: /* CRB - compare and branch */
6378 case 0xecf7: /* CLRB - compare logical and branch */
6379 case 0xecfc: /* CGIB - compare immediate and branch */
6380 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6381 case 0xecfe: /* CIB - compare immediate and branch */
6382 case 0xecff: /* CLIB - compare logical immediate and branch */
6383 break;
6384
6385 /* 0xec66-0xec6f undefined */
6386
6387 case 0xec70: /* CGIT - compare immediate and trap */
6388 case 0xec71: /* CLGIT - compare logical immediate and trap */
6389 case 0xec72: /* CIT - compare immediate and trap */
6390 case 0xec73: /* CLFIT - compare logical immediate and trap */
6391 /* fpc only - including possible DXC write for trapping insns */
6392 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6393 return -1;
6394 break;
6395
6396 /* 0xec74-0xec75 undefined */
6397 /* 0xec78-0xec7b undefined */
6398
6399 /* 0xec80-0xecd7 undefined */
6400
6401 case 0xecd8: /* AHIK - add immediate */
6402 case 0xecda: /* ALHSIK - add logical immediate */
6403 /* 32-bit gpr destination + flags */
6404 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6405 return -1;
6406 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6407 return -1;
6408 break;
6409
6410 /* 0xecdc-0xece3 undefined */
6411 /* 0xece6-0xecf5 undefined */
6412 /* 0xecf8-0xecfb undefined */
6413
6414 default:
6415 goto UNKNOWN_OP;
6416 }
6417 break;
6418
6419 case 0xee: /* PLO - perform locked operation */
6420 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6421 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6422 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6423 if (!(tmp & 0x100))
6424 {
6425 uint8_t fc = tmp & 0xff;
6426 gdb_byte buf[8];
6427 switch (fc)
6428 {
6429 case 0x00: /* CL */
6430 /* op1c */
6431 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6432 return -1;
6433 /* op3 */
6434 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6435 return -1;
6436 break;
6437
6438 case 0x01: /* CLG */
6439 /* op1c */
6440 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6441 return -1;
6442 /* op3 */
6443 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6444 return -1;
6445 break;
6446
6447 case 0x02: /* CLGR */
6448 /* op1c */
6449 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6450 return -1;
6451 /* op3 */
6452 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6453 return -1;
6454 break;
6455
6456 case 0x03: /* CLX */
6457 /* op1c */
6458 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6459 return -1;
6460 /* op3 */
6461 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6462 return -1;
6463 break;
6464
6465 case 0x08: /* DCS */
6466 /* op3c */
6467 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6468 return -1;
6469 /* fallthru */
6470 case 0x0c: /* CSST */
6471 /* op4 */
6472 if (record_full_arch_list_add_mem (oaddr2, 4))
6473 return -1;
6474 goto CS;
6475
6476 case 0x14: /* CSTST */
6477 /* op8 */
6478 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6479 return -1;
6480 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6481 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6482 if (record_full_arch_list_add_mem (oaddr3, 4))
6483 return -1;
6484 /* fallthru */
6485 case 0x10: /* CSDST */
6486 /* op6 */
6487 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6488 return -1;
6489 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6490 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6491 if (record_full_arch_list_add_mem (oaddr3, 4))
6492 return -1;
6493 /* op4 */
6494 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6495 return -1;
6496 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6497 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6498 if (record_full_arch_list_add_mem (oaddr3, 4))
6499 return -1;
6500 /* fallthru */
6501 case 0x04: /* CS */
6502CS:
6503 /* op1c */
6504 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6505 return -1;
6506 /* op2 */
6507 if (record_full_arch_list_add_mem (oaddr, 4))
6508 return -1;
6509 break;
6510
6511 case 0x09: /* DCSG */
6512 /* op3c */
6513 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6514 return -1;
6515 goto CSSTG;
6516
6517 case 0x15: /* CSTSTG */
6518 /* op8 */
6519 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6520 return -1;
6521 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6522 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6523 if (record_full_arch_list_add_mem (oaddr3, 8))
6524 return -1;
6525 /* fallthru */
6526 case 0x11: /* CSDSTG */
6527 /* op6 */
6528 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6529 return -1;
6530 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6531 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6532 if (record_full_arch_list_add_mem (oaddr3, 8))
6533 return -1;
6534 /* fallthru */
6535 case 0x0d: /* CSSTG */
6536CSSTG:
6537 /* op4 */
6538 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6539 return -1;
6540 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6541 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6542 if (record_full_arch_list_add_mem (oaddr3, 8))
6543 return -1;
6544 /* fallthru */
6545 case 0x05: /* CSG */
6546 /* op1c */
6547 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6548 return -1;
6549 /* op2 */
6550 if (record_full_arch_list_add_mem (oaddr, 8))
6551 return -1;
6552 break;
6553
6554 case 0x0a: /* DCSGR */
6555 /* op3c */
6556 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6557 return -1;
6558 /* fallthru */
6559 case 0x0e: /* CSSTGR */
6560 /* op4 */
6561 if (record_full_arch_list_add_mem (oaddr2, 8))
6562 return -1;
6563 goto CSGR;
6564
6565 case 0x16: /* CSTSTGR */
6566 /* op8 */
6567 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6568 return -1;
6569 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6570 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6571 if (record_full_arch_list_add_mem (oaddr3, 8))
6572 return -1;
6573 /* fallthru */
6574 case 0x12: /* CSDSTGR */
6575 /* op6 */
6576 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6577 return -1;
6578 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6579 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6580 if (record_full_arch_list_add_mem (oaddr3, 8))
6581 return -1;
6582 /* op4 */
6583 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6584 return -1;
6585 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6586 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6587 if (record_full_arch_list_add_mem (oaddr3, 8))
6588 return -1;
6589 /* fallthru */
6590 case 0x06: /* CSGR */
6591CSGR:
6592 /* op1c */
6593 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6594 return -1;
6595 /* op2 */
6596 if (record_full_arch_list_add_mem (oaddr, 8))
6597 return -1;
6598 break;
6599
6600 case 0x0b: /* DCSX */
6601 /* op3c */
6602 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6603 return -1;
6604 goto CSSTX;
6605
6606 case 0x17: /* CSTSTX */
6607 /* op8 */
6608 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6609 return -1;
6610 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6611 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6612 if (record_full_arch_list_add_mem (oaddr3, 16))
6613 return -1;
6614 /* fallthru */
6615 case 0x13: /* CSDSTX */
6616 /* op6 */
6617 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6618 return -1;
6619 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6620 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6621 if (record_full_arch_list_add_mem (oaddr3, 16))
6622 return -1;
6623 /* fallthru */
6624 case 0x0f: /* CSSTX */
6625CSSTX:
6626 /* op4 */
6627 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6628 return -1;
6629 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6630 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6631 if (record_full_arch_list_add_mem (oaddr3, 16))
6632 return -1;
6633 /* fallthru */
6634 case 0x07: /* CSX */
6635 /* op1c */
6636 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6637 return -1;
6638 /* op2 */
6639 if (record_full_arch_list_add_mem (oaddr, 16))
6640 return -1;
6641 break;
6642
6643 default:
6644 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6645 fc, paddress (gdbarch, addr));
6646 return -1;
6647 }
6648 }
6649 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6650 return -1;
6651 break;
6652
6653 case 0xef: /* LMD - load multiple disjoint */
6654 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6655 if (s390_record_gpr_g (gdbarch, regcache, i))
6656 return -1;
6657 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6658 return -1;
6659 break;
6660
6661 case 0xf0: /* SRP - shift and round decimal */
6662 case 0xf8: /* ZAP - zero and add */
6663 case 0xfa: /* AP - add decimal */
6664 case 0xfb: /* SP - subtract decimal */
6665 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6666 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6667 return -1;
6668 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6669 return -1;
6670 /* DXC may be written */
6671 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6672 return -1;
6673 break;
6674
6675 case 0xf1: /* MVO - move with offset */
6676 case 0xf2: /* PACK - pack */
6677 case 0xf3: /* UNPK - unpack */
6678 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6679 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6680 return -1;
6681 break;
6682
6683 /* 0xf4-0xf7 undefined */
6684
6685 case 0xf9: /* CP - compare decimal */
6686 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6687 return -1;
6688 /* DXC may be written */
6689 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6690 return -1;
6691 break;
6692
6693 case 0xfc: /* MP - multiply decimal */
6694 case 0xfd: /* DP - divide decimal */
6695 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6696 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6697 return -1;
6698 /* DXC may be written */
6699 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6700 return -1;
6701 break;
6702
6703 /* 0xfe-0xff undefined */
6704
6705 default:
6706UNKNOWN_OP:
6707 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6708 "at %s.\n", insn[0], paddress (gdbarch, addr));
6709 return -1;
6710 }
6711
6712 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6713 return -1;
6714 if (record_full_arch_list_add_end ())
6715 return -1;
6716 return 0;
6717}
6718
d6e58945
PR
6719/* Miscellaneous. */
6720
6721/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6722 "-mcmodel=large". */
6723
6724static char *
6725s390_gcc_target_options (struct gdbarch *gdbarch)
6726{
6727 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6728}
6729
6730/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6731 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6732 always "s390". Note that an s390x compiler supports "-m31" as
6733 well. */
6734
6735static const char *
6736s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6737{
6738 return "s390x?";
6739}
6740
6741/* Implementation of `gdbarch_stap_is_single_operand', as defined in
6742 gdbarch.h. */
6743
6744static int
6745s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6746{
6747 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6748 or indirection. */
6749 || *s == '%' /* Register access. */
6750 || isdigit (*s)); /* Literal number. */
6751}
6752
6753/* gdbarch init. */
6754
6755/* Validate the range of registers. NAMES must be known at compile time. */
6756
6757#define s390_validate_reg_range(feature, tdesc_data, start, names) \
6758do \
6759{ \
6760 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6761 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6762 return false; \
6763} \
6764while (0)
6765
6766/* Validate the target description. Also numbers registers contained in
6767 tdesc. */
6768
6769static bool
6770s390_tdesc_valid (struct gdbarch_tdep *tdep,
6771 struct tdesc_arch_data *tdesc_data)
6772{
6773 static const char *const psw[] = {
6774 "pswm", "pswa"
6775 };
6776 static const char *const gprs[] = {
6777 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6778 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6779 };
6780 static const char *const fprs[] = {
6781 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6782 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6783 };
6784 static const char *const acrs[] = {
6785 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6786 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6787 };
6788 static const char *const gprs_lower[] = {
6789 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6790 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6791 };
6792 static const char *const gprs_upper[] = {
6793 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6794 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6795 };
6796 static const char *const tdb_regs[] = {
6797 "tdb0", "tac", "tct", "atia",
6798 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6799 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6800 };
6801 static const char *const vxrs_low[] = {
6802 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6803 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6804 };
6805 static const char *const vxrs_high[] = {
6806 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6807 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6808 };
6809 static const char *const gs_cb[] = {
6810 "gsd", "gssm", "gsepla",
6811 };
6812 static const char *const gs_bc[] = {
6813 "bc_gsd", "bc_gssm", "bc_gsepla",
6814 };
6815
6816 const struct target_desc *tdesc = tdep->tdesc;
6817 const struct tdesc_feature *feature;
6818
c81e8879
PR
6819 if (!tdesc_has_registers (tdesc))
6820 return false;
6821
d6e58945
PR
6822 /* Core registers, i.e. general purpose and PSW. */
6823 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6824 if (feature == NULL)
6825 return false;
6826
6827 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6828
6829 if (tdesc_unnumbered_register (feature, "r0"))
6830 {
6831 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6832 }
6833 else
6834 {
6835 tdep->have_upper = true;
6836 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6837 gprs_lower);
6838 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6839 gprs_upper);
6840 }
6841
6842 /* Floating point registers. */
6843 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6844 if (feature == NULL)
6845 return false;
6846
6847 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6848 return false;
6849
6850 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6851
6852 /* Access control registers. */
6853 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6854 if (feature == NULL)
6855 return false;
6856
6857 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6858
6859 /* Optional GNU/Linux-specific "registers". */
6860 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6861 if (feature)
6862 {
6863 tdesc_numbered_register (feature, tdesc_data,
6864 S390_ORIG_R2_REGNUM, "orig_r2");
6865
6866 if (tdesc_numbered_register (feature, tdesc_data,
6867 S390_LAST_BREAK_REGNUM, "last_break"))
6868 tdep->have_linux_v1 = true;
6869
6870 if (tdesc_numbered_register (feature, tdesc_data,
6871 S390_SYSTEM_CALL_REGNUM, "system_call"))
6872 tdep->have_linux_v2 = true;
6873
6874 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6875 return false;
6876 }
6877
6878 /* Transaction diagnostic block. */
6879 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6880 if (feature)
6881 {
6882 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6883 tdb_regs);
6884 tdep->have_tdb = true;
6885 }
6886
6887 /* Vector registers. */
6888 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6889 if (feature)
6890 {
6891 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6892 vxrs_low);
6893 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6894 vxrs_high);
6895 tdep->have_vx = true;
6896 }
6897
6898 /* Guarded-storage registers. */
6899 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6900 if (feature)
6901 {
6902 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6903 tdep->have_gs = true;
6904 }
6905
6906 /* Guarded-storage broadcast control. */
6907 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6908 if (feature)
6909 {
6910 if (!tdep->have_gs)
6911 return false;
6912 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6913 gs_bc);
6914 }
6915
6916 return true;
6917}
6918
6919/* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6920 memory after use. */
6921
6922static struct gdbarch_tdep *
6923s390_gdbarch_tdep_alloc ()
6924{
6925 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6926
6927 tdep->tdesc = NULL;
6928
6929 tdep->abi = ABI_NONE;
6930 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6931
6932 tdep->gpr_full_regnum = -1;
6933 tdep->v0_full_regnum = -1;
6934 tdep->pc_regnum = -1;
6935 tdep->cc_regnum = -1;
6936
6937 tdep->have_upper = false;
6938 tdep->have_linux_v1 = false;
6939 tdep->have_linux_v2 = false;
6940 tdep->have_tdb = false;
6941 tdep->have_vx = false;
6942 tdep->have_gs = false;
6943
6944 tdep->s390_syscall_record = NULL;
6945
6946 return tdep;
6947}
6948
6949/* Set up gdbarch struct. */
6950
6951static struct gdbarch *
6952s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6953{
6954 const struct target_desc *tdesc = info.target_desc;
6955 int first_pseudo_reg, last_pseudo_reg;
6956 static const char *const stap_register_prefixes[] = { "%", NULL };
6957 static const char *const stap_register_indirection_prefixes[] = { "(",
6958 NULL };
6959 static const char *const stap_register_indirection_suffixes[] = { ")",
6960 NULL };
6961
d6e58945
PR
6962 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6963 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6964 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6965 info.tdesc_data = tdesc_data;
6966
6967 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6968 set_gdbarch_char_signed (gdbarch, 0);
6969
6970 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6971 We can safely let them default to 128-bit, since the debug info
6972 will give the size of type actually used in each case. */
6973 set_gdbarch_long_double_bit (gdbarch, 128);
6974 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6975
1022c627
AA
6976 set_gdbarch_type_align (gdbarch, s390_type_align);
6977
d6e58945
PR
6978 /* Breakpoints. */
6979 /* Amount PC must be decremented by after a breakpoint. This is
6980 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6981 always. */
6982 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6983 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6984 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6985
6986 /* Displaced stepping. */
6987 set_gdbarch_displaced_step_copy_insn (gdbarch,
6988 s390_displaced_step_copy_insn);
6989 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6990 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6991 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6992 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6993 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6994
6995 /* Prologue analysis. */
6996 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6997
6998 /* Register handling. */
6999 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
7000 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
7001 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
7002 set_gdbarch_guess_tracepoint_registers (gdbarch,
7003 s390_guess_tracepoint_registers);
7004 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7005 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7006 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7007
7008 /* Pseudo registers. */
7009 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7010 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7011 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7012 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7013 set_tdesc_pseudo_register_reggroup_p (gdbarch,
7014 s390_pseudo_register_reggroup_p);
7015 set_gdbarch_ax_pseudo_register_collect (gdbarch,
7016 s390_ax_pseudo_register_collect);
7017 set_gdbarch_ax_pseudo_register_push_stack
7018 (gdbarch, s390_ax_pseudo_register_push_stack);
7019 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
7020
7021 /* Inferior function calls. */
7022 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
7023 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
7024 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7025 set_gdbarch_return_value (gdbarch, s390_return_value);
7026
7027 /* Frame handling. */
7028 /* Stack grows downward. */
7029 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7030 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7031 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7032 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7033 dwarf2_append_unwinders (gdbarch);
7034 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7035 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7036
7037 switch (info.bfd_arch_info->mach)
7038 {
7039 case bfd_mach_s390_31:
7040 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7041 break;
7042
7043 case bfd_mach_s390_64:
7044 set_gdbarch_long_bit (gdbarch, 64);
7045 set_gdbarch_long_long_bit (gdbarch, 64);
7046 set_gdbarch_ptr_bit (gdbarch, 64);
7047 set_gdbarch_address_class_type_flags (gdbarch,
7048 s390_address_class_type_flags);
7049 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7050 s390_address_class_type_flags_to_name);
7051 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7052 s390_address_class_name_to_type_flags);
7053 break;
7054 }
7055
7056 /* SystemTap functions. */
7057 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7058 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7059 stap_register_indirection_prefixes);
7060 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7061 stap_register_indirection_suffixes);
7062
7063 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7064 set_gdbarch_valid_disassembler_options (gdbarch,
7065 disassembler_options_s390 ());
7066
ef8914a4
PR
7067 /* Process record-replay */
7068 set_gdbarch_process_record (gdbarch, s390_process_record);
7069
d6e58945
PR
7070 /* Miscellaneous. */
7071 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7072 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7073 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7074
7075 /* Initialize the OSABI. */
7076 gdbarch_init_osabi (info, gdbarch);
7077
c81e8879
PR
7078 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7079 cause GDB to crash with an internal error when the user tries to set
7080 an unsupported OSABI. */
7081 if (!tdesc_has_registers (tdesc))
7082 {
7083 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7084 tdesc = tdesc_s390_linux32;
7085 else
7086 tdesc = tdesc_s390x_linux64;
7087 }
7088 tdep->tdesc = tdesc;
7089
d6e58945 7090 /* Check any target description for validity. */
d6e58945
PR
7091 if (!s390_tdesc_valid (tdep, tdesc_data))
7092 {
7093 tdesc_data_cleanup (tdesc_data);
7094 xfree (tdep);
7095 gdbarch_free (gdbarch);
7096 return NULL;
7097 }
7098
7099 /* Determine vector ABI. */
7100#ifdef HAVE_ELF
7101 if (tdep->have_vx
7102 && info.abfd != NULL
7103 && info.abfd->format == bfd_object
7104 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7105 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7106 Tag_GNU_S390_ABI_Vector) == 2)
7107 tdep->vector_abi = S390_VECTOR_ABI_128;
7108#endif
7109
7110 /* Find a candidate among extant architectures. */
7111 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7112 arches != NULL;
7113 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7114 {
7115 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7116 if (!tmp)
7117 continue;
7118 /* A program can 'choose' not to use the vector registers when they
7119 are present. Leading to the same tdesc but different tdep and
7120 thereby a different gdbarch. */
7121 if (tmp->vector_abi != tdep->vector_abi)
7122 continue;
7123
7124 tdesc_data_cleanup (tdesc_data);
7125 xfree (tdep);
7126 gdbarch_free (gdbarch);
7127 return arches->gdbarch;
7128 }
7129
7130 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7131 set_gdbarch_register_name (gdbarch, s390_register_name);
7132
7133 /* Assign pseudo register numbers. */
7134 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7135 last_pseudo_reg = first_pseudo_reg;
7136 if (tdep->have_upper)
7137 {
7138 tdep->gpr_full_regnum = last_pseudo_reg;
7139 last_pseudo_reg += 16;
7140 }
7141 if (tdep->have_vx)
7142 {
7143 tdep->v0_full_regnum = last_pseudo_reg;
7144 last_pseudo_reg += 16;
7145 }
7146 tdep->pc_regnum = last_pseudo_reg++;
7147 tdep->cc_regnum = last_pseudo_reg++;
7148 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7149 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7150
7151 /* Frame handling. */
7152 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7153 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7154 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7155 frame_base_set_default (gdbarch, &s390_frame_base);
7156
7157 return gdbarch;
7158}
7159
7160void
7161_initialize_s390_tdep (void)
7162{
7163 /* Hook us into the gdbarch mechanism. */
7164 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
c81e8879
PR
7165
7166 initialize_tdesc_s390_linux32 ();
7167 initialize_tdesc_s390x_linux64 ();
d6e58945 7168}
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