ppc-linux-tdep.c: Wrong signness for buffer holding instructions.
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
28e7fd62 3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
27#include "symtab.h"
28#include "target.h"
29#include "gdbcore.h"
30#include "gdbcmd.h"
5769d3cd 31#include "objfiles.h"
5769d3cd
AC
32#include "floatformat.h"
33#include "regcache.h"
a8c99f38
JB
34#include "trad-frame.h"
35#include "frame-base.h"
36#include "frame-unwind.h"
a431654a 37#include "dwarf2-frame.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
d0f54f9d 46#include "s390-tdep.h"
5769d3cd 47
55aa24fb
SDJ
48#include "stap-probe.h"
49#include "ax.h"
50#include "ax-gdb.h"
51#include "user-regs.h"
52#include "cli/cli-utils.h"
53#include <ctype.h>
54
7803799a 55#include "features/s390-linux32.c"
c642a434
UW
56#include "features/s390-linux32v1.c"
57#include "features/s390-linux32v2.c"
7803799a 58#include "features/s390-linux64.c"
c642a434
UW
59#include "features/s390-linux64v1.c"
60#include "features/s390-linux64v2.c"
7803799a 61#include "features/s390x-linux64.c"
c642a434
UW
62#include "features/s390x-linux64v1.c"
63#include "features/s390x-linux64v2.c"
7803799a 64
d0f54f9d
JB
65/* The tdep structure. */
66
67struct gdbarch_tdep
5769d3cd 68{
b0cf273e
JB
69 /* ABI version. */
70 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
71
7803799a
UW
72 /* Pseudo register numbers. */
73 int gpr_full_regnum;
74 int pc_regnum;
75 int cc_regnum;
76
d0f54f9d
JB
77 /* Core file register sets. */
78 const struct regset *gregset;
79 int sizeof_gregset;
80
81 const struct regset *fpregset;
82 int sizeof_fpregset;
83};
84
85
7803799a
UW
86/* ABI call-saved register information. */
87
88static int
89s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 90{
7803799a
UW
91 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
92
93 switch (tdep->abi)
6707b003 94 {
7803799a
UW
95 case ABI_LINUX_S390:
96 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
97 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
98 || regnum == S390_A0_REGNUM)
99 return 1;
6707b003 100
7803799a
UW
101 break;
102
103 case ABI_LINUX_ZSERIES:
104 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
105 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
106 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
107 return 1;
108
109 break;
110 }
111
112 return 0;
5769d3cd
AC
113}
114
c642a434
UW
115static int
116s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
117{
118 /* The last-break address is read-only. */
119 return regnum == S390_LAST_BREAK_REGNUM;
120}
121
122static void
123s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
124{
125 struct gdbarch *gdbarch = get_regcache_arch (regcache);
126 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
127
128 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
129
130 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
131 messing with the PC we just installed, if we happen to be within
132 an interrupted system call that the kernel wants to restart.
133
134 Note that after we return from the dummy call, the SYSTEM_CALL and
135 ORIG_R2 registers will be automatically restored, and the kernel
136 continues to restart the system call at this point. */
137 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
138 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
139}
140
7803799a 141
d0f54f9d
JB
142/* DWARF Register Mapping. */
143
144static int s390_dwarf_regmap[] =
145{
146 /* General Purpose Registers. */
147 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
148 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
149 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
150 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
151
152 /* Floating Point Registers. */
153 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
154 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
155 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
156 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
157
158 /* Control Registers (not mapped). */
159 -1, -1, -1, -1, -1, -1, -1, -1,
160 -1, -1, -1, -1, -1, -1, -1, -1,
161
162 /* Access Registers. */
163 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
164 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
165 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
166 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
167
168 /* Program Status Word. */
169 S390_PSWM_REGNUM,
7803799a
UW
170 S390_PSWA_REGNUM,
171
172 /* GPR Lower Half Access. */
173 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
174 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
175 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
176 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 177
94eae614 178 /* GNU/Linux-specific registers (not mapped). */
c642a434 179 -1, -1, -1,
d0f54f9d
JB
180};
181
182/* Convert DWARF register number REG to the appropriate register
183 number used by GDB. */
a78f21af 184static int
d3f73121 185s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 186{
7803799a
UW
187 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
188
189 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
190 GPRs. Note that call frame information still refers to the 32-bit
191 lower halves, because s390_adjust_frame_regnum uses register numbers
192 66 .. 81 to access GPRs. */
193 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
194 return tdep->gpr_full_regnum + reg;
d0f54f9d 195
16aff9a6 196 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 197 return s390_dwarf_regmap[reg];
d0f54f9d 198
7803799a
UW
199 warning (_("Unmapped DWARF Register #%d encountered."), reg);
200 return -1;
201}
d0f54f9d 202
7803799a
UW
203/* Translate a .eh_frame register to DWARF register, or adjust a
204 .debug_frame register. */
205static int
206s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
207{
208 /* See s390_dwarf_reg_to_regnum for comments. */
209 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
210}
211
d0f54f9d 212
7803799a
UW
213/* Pseudo registers. */
214
215static const char *
216s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 217{
7803799a 218 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 219
7803799a
UW
220 if (regnum == tdep->pc_regnum)
221 return "pc";
d0f54f9d 222
7803799a
UW
223 if (regnum == tdep->cc_regnum)
224 return "cc";
d0f54f9d 225
7803799a
UW
226 if (tdep->gpr_full_regnum != -1
227 && regnum >= tdep->gpr_full_regnum
228 && regnum < tdep->gpr_full_regnum + 16)
229 {
230 static const char *full_name[] = {
231 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
232 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
233 };
234 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 235 }
7803799a
UW
236
237 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
238}
239
7803799a
UW
240static struct type *
241s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 242{
7803799a 243 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 244
7803799a
UW
245 if (regnum == tdep->pc_regnum)
246 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 247
7803799a
UW
248 if (regnum == tdep->cc_regnum)
249 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 250
7803799a
UW
251 if (tdep->gpr_full_regnum != -1
252 && regnum >= tdep->gpr_full_regnum
253 && regnum < tdep->gpr_full_regnum + 16)
254 return builtin_type (gdbarch)->builtin_uint64;
255
256 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
257}
258
05d1431c 259static enum register_status
7803799a
UW
260s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
261 int regnum, gdb_byte *buf)
d0f54f9d 262{
7803799a 263 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 264 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 265 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
266 ULONGEST val;
267
7803799a 268 if (regnum == tdep->pc_regnum)
d0f54f9d 269 {
05d1431c
PA
270 enum register_status status;
271
272 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
273 if (status == REG_VALID)
274 {
275 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
276 val &= 0x7fffffff;
277 store_unsigned_integer (buf, regsize, byte_order, val);
278 }
279 return status;
7803799a 280 }
d0f54f9d 281
7803799a
UW
282 if (regnum == tdep->cc_regnum)
283 {
05d1431c
PA
284 enum register_status status;
285
286 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
287 if (status == REG_VALID)
288 {
289 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
290 val = (val >> 12) & 3;
291 else
292 val = (val >> 44) & 3;
293 store_unsigned_integer (buf, regsize, byte_order, val);
294 }
295 return status;
7803799a 296 }
d0f54f9d 297
7803799a
UW
298 if (tdep->gpr_full_regnum != -1
299 && regnum >= tdep->gpr_full_regnum
300 && regnum < tdep->gpr_full_regnum + 16)
301 {
05d1431c 302 enum register_status status;
7803799a 303 ULONGEST val_upper;
05d1431c 304
7803799a
UW
305 regnum -= tdep->gpr_full_regnum;
306
05d1431c
PA
307 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
308 if (status == REG_VALID)
309 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
310 &val_upper);
311 if (status == REG_VALID)
312 {
313 val |= val_upper << 32;
314 store_unsigned_integer (buf, regsize, byte_order, val);
315 }
316 return status;
d0f54f9d 317 }
7803799a
UW
318
319 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
320}
321
322static void
7803799a
UW
323s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
324 int regnum, const gdb_byte *buf)
d0f54f9d 325{
7803799a 326 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 327 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 328 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
329 ULONGEST val, psw;
330
7803799a 331 if (regnum == tdep->pc_regnum)
d0f54f9d 332 {
7803799a
UW
333 val = extract_unsigned_integer (buf, regsize, byte_order);
334 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
335 {
336 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
337 val = (psw & 0x80000000) | (val & 0x7fffffff);
338 }
339 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
340 return;
341 }
d0f54f9d 342
7803799a
UW
343 if (regnum == tdep->cc_regnum)
344 {
345 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 346 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
347 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
348 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
349 else
350 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
351 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
352 return;
353 }
d0f54f9d 354
7803799a
UW
355 if (tdep->gpr_full_regnum != -1
356 && regnum >= tdep->gpr_full_regnum
357 && regnum < tdep->gpr_full_regnum + 16)
358 {
359 regnum -= tdep->gpr_full_regnum;
360 val = extract_unsigned_integer (buf, regsize, byte_order);
361 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
362 val & 0xffffffff);
363 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
364 val >> 32);
365 return;
d0f54f9d 366 }
7803799a
UW
367
368 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
369}
370
371/* 'float' values are stored in the upper half of floating-point
372 registers, even though we are otherwise a big-endian platform. */
373
9acbedc0
UW
374static struct value *
375s390_value_from_register (struct type *type, int regnum,
376 struct frame_info *frame)
d0f54f9d 377{
9acbedc0 378 struct value *value = default_value_from_register (type, regnum, frame);
d0f54f9d 379
744a8059
SP
380 check_typedef (type);
381
382 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
383 && TYPE_LENGTH (type) < 8)
9acbedc0 384 set_value_offset (value, 0);
d0f54f9d 385
9acbedc0 386 return value;
d0f54f9d
JB
387}
388
389/* Register groups. */
390
a78f21af 391static int
7803799a
UW
392s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
393 struct reggroup *group)
d0f54f9d
JB
394{
395 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
396
d6db1fab
UW
397 /* We usually save/restore the whole PSW, which includes PC and CC.
398 However, some older gdbservers may not support saving/restoring
399 the whole PSW yet, and will return an XML register description
400 excluding those from the save/restore register groups. In those
401 cases, we still need to explicitly save/restore PC and CC in order
402 to push or pop frames. Since this doesn't hurt anything if we
403 already save/restore the whole PSW (it's just redundant), we add
404 PC and CC at this point unconditionally. */
d0f54f9d 405 if (group == save_reggroup || group == restore_reggroup)
7803799a 406 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
407
408 return default_register_reggroup_p (gdbarch, regnum, group);
409}
410
411
412/* Core file register sets. */
413
414int s390_regmap_gregset[S390_NUM_REGS] =
415{
416 /* Program Status Word. */
417 0x00, 0x04,
418 /* General Purpose Registers. */
419 0x08, 0x0c, 0x10, 0x14,
420 0x18, 0x1c, 0x20, 0x24,
421 0x28, 0x2c, 0x30, 0x34,
422 0x38, 0x3c, 0x40, 0x44,
423 /* Access Registers. */
424 0x48, 0x4c, 0x50, 0x54,
425 0x58, 0x5c, 0x60, 0x64,
426 0x68, 0x6c, 0x70, 0x74,
427 0x78, 0x7c, 0x80, 0x84,
428 /* Floating Point Control Word. */
429 -1,
430 /* Floating Point Registers. */
431 -1, -1, -1, -1, -1, -1, -1, -1,
432 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
433 /* GPR Uppper Halves. */
434 -1, -1, -1, -1, -1, -1, -1, -1,
435 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 436 /* GNU/Linux-specific optional "registers". */
c642a434 437 0x88, -1, -1,
d0f54f9d
JB
438};
439
440int s390x_regmap_gregset[S390_NUM_REGS] =
441{
7803799a 442 /* Program Status Word. */
d0f54f9d
JB
443 0x00, 0x08,
444 /* General Purpose Registers. */
445 0x10, 0x18, 0x20, 0x28,
446 0x30, 0x38, 0x40, 0x48,
447 0x50, 0x58, 0x60, 0x68,
448 0x70, 0x78, 0x80, 0x88,
449 /* Access Registers. */
450 0x90, 0x94, 0x98, 0x9c,
451 0xa0, 0xa4, 0xa8, 0xac,
452 0xb0, 0xb4, 0xb8, 0xbc,
453 0xc0, 0xc4, 0xc8, 0xcc,
454 /* Floating Point Control Word. */
455 -1,
456 /* Floating Point Registers. */
457 -1, -1, -1, -1, -1, -1, -1, -1,
458 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
459 /* GPR Uppper Halves. */
460 0x10, 0x18, 0x20, 0x28,
461 0x30, 0x38, 0x40, 0x48,
462 0x50, 0x58, 0x60, 0x68,
463 0x70, 0x78, 0x80, 0x88,
94eae614 464 /* GNU/Linux-specific optional "registers". */
c642a434 465 0xd0, -1, -1,
d0f54f9d
JB
466};
467
468int s390_regmap_fpregset[S390_NUM_REGS] =
469{
470 /* Program Status Word. */
471 -1, -1,
472 /* General Purpose Registers. */
473 -1, -1, -1, -1, -1, -1, -1, -1,
474 -1, -1, -1, -1, -1, -1, -1, -1,
475 /* Access Registers. */
476 -1, -1, -1, -1, -1, -1, -1, -1,
477 -1, -1, -1, -1, -1, -1, -1, -1,
478 /* Floating Point Control Word. */
479 0x00,
480 /* Floating Point Registers. */
481 0x08, 0x10, 0x18, 0x20,
482 0x28, 0x30, 0x38, 0x40,
483 0x48, 0x50, 0x58, 0x60,
484 0x68, 0x70, 0x78, 0x80,
7803799a
UW
485 /* GPR Uppper Halves. */
486 -1, -1, -1, -1, -1, -1, -1, -1,
487 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 488 /* GNU/Linux-specific optional "registers". */
c642a434 489 -1, -1, -1,
7803799a
UW
490};
491
492int s390_regmap_upper[S390_NUM_REGS] =
493{
494 /* Program Status Word. */
495 -1, -1,
496 /* General Purpose Registers. */
497 -1, -1, -1, -1, -1, -1, -1, -1,
498 -1, -1, -1, -1, -1, -1, -1, -1,
499 /* Access Registers. */
500 -1, -1, -1, -1, -1, -1, -1, -1,
501 -1, -1, -1, -1, -1, -1, -1, -1,
502 /* Floating Point Control Word. */
503 -1,
504 /* Floating Point Registers. */
505 -1, -1, -1, -1, -1, -1, -1, -1,
506 -1, -1, -1, -1, -1, -1, -1, -1,
507 /* GPR Uppper Halves. */
508 0x00, 0x04, 0x08, 0x0c,
509 0x10, 0x14, 0x18, 0x1c,
510 0x20, 0x24, 0x28, 0x2c,
511 0x30, 0x34, 0x38, 0x3c,
94eae614 512 /* GNU/Linux-specific optional "registers". */
c642a434
UW
513 -1, -1, -1,
514};
515
516int s390_regmap_last_break[S390_NUM_REGS] =
517{
518 /* Program Status Word. */
519 -1, -1,
520 /* General Purpose Registers. */
521 -1, -1, -1, -1, -1, -1, -1, -1,
522 -1, -1, -1, -1, -1, -1, -1, -1,
523 /* Access Registers. */
524 -1, -1, -1, -1, -1, -1, -1, -1,
525 -1, -1, -1, -1, -1, -1, -1, -1,
526 /* Floating Point Control Word. */
527 -1,
528 /* Floating Point Registers. */
529 -1, -1, -1, -1, -1, -1, -1, -1,
530 -1, -1, -1, -1, -1, -1, -1, -1,
531 /* GPR Uppper Halves. */
532 -1, -1, -1, -1, -1, -1, -1, -1,
533 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 534 /* GNU/Linux-specific optional "registers". */
c642a434
UW
535 -1, 4, -1,
536};
537
538int s390x_regmap_last_break[S390_NUM_REGS] =
539{
540 /* Program Status Word. */
541 -1, -1,
542 /* General Purpose Registers. */
543 -1, -1, -1, -1, -1, -1, -1, -1,
544 -1, -1, -1, -1, -1, -1, -1, -1,
545 /* Access Registers. */
546 -1, -1, -1, -1, -1, -1, -1, -1,
547 -1, -1, -1, -1, -1, -1, -1, -1,
548 /* Floating Point Control Word. */
549 -1,
550 /* Floating Point Registers. */
551 -1, -1, -1, -1, -1, -1, -1, -1,
552 -1, -1, -1, -1, -1, -1, -1, -1,
553 /* GPR Uppper Halves. */
554 -1, -1, -1, -1, -1, -1, -1, -1,
555 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 556 /* GNU/Linux-specific optional "registers". */
c642a434
UW
557 -1, 0, -1,
558};
559
560int s390_regmap_system_call[S390_NUM_REGS] =
561{
562 /* Program Status Word. */
563 -1, -1,
564 /* General Purpose Registers. */
565 -1, -1, -1, -1, -1, -1, -1, -1,
566 -1, -1, -1, -1, -1, -1, -1, -1,
567 /* Access Registers. */
568 -1, -1, -1, -1, -1, -1, -1, -1,
569 -1, -1, -1, -1, -1, -1, -1, -1,
570 /* Floating Point Control Word. */
571 -1,
572 /* Floating Point Registers. */
573 -1, -1, -1, -1, -1, -1, -1, -1,
574 -1, -1, -1, -1, -1, -1, -1, -1,
575 /* GPR Uppper Halves. */
576 -1, -1, -1, -1, -1, -1, -1, -1,
577 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 578 /* GNU/Linux-specific optional "registers". */
c642a434 579 -1, -1, 0,
d0f54f9d
JB
580};
581
582/* Supply register REGNUM from the register set REGSET to register cache
583 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
584static void
585s390_supply_regset (const struct regset *regset, struct regcache *regcache,
586 int regnum, const void *regs, size_t len)
587{
588 const int *offset = regset->descr;
589 int i;
590
591 for (i = 0; i < S390_NUM_REGS; i++)
592 {
593 if ((regnum == i || regnum == -1) && offset[i] != -1)
594 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
595 }
596}
597
92f38ec2
UW
598/* Collect register REGNUM from the register cache REGCACHE and store
599 it in the buffer specified by REGS and LEN as described by the
600 general-purpose register set REGSET. If REGNUM is -1, do this for
601 all registers in REGSET. */
602static void
603s390_collect_regset (const struct regset *regset,
604 const struct regcache *regcache,
605 int regnum, void *regs, size_t len)
606{
607 const int *offset = regset->descr;
608 int i;
609
610 for (i = 0; i < S390_NUM_REGS; i++)
611 {
612 if ((regnum == i || regnum == -1) && offset[i] != -1)
613 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
614 }
615}
616
d0f54f9d
JB
617static const struct regset s390_gregset = {
618 s390_regmap_gregset,
92f38ec2
UW
619 s390_supply_regset,
620 s390_collect_regset
d0f54f9d
JB
621};
622
623static const struct regset s390x_gregset = {
624 s390x_regmap_gregset,
92f38ec2
UW
625 s390_supply_regset,
626 s390_collect_regset
d0f54f9d
JB
627};
628
629static const struct regset s390_fpregset = {
630 s390_regmap_fpregset,
92f38ec2
UW
631 s390_supply_regset,
632 s390_collect_regset
d0f54f9d
JB
633};
634
7803799a
UW
635static const struct regset s390_upper_regset = {
636 s390_regmap_upper,
637 s390_supply_regset,
638 s390_collect_regset
639};
640
c642a434
UW
641static const struct regset s390_last_break_regset = {
642 s390_regmap_last_break,
643 s390_supply_regset,
644 s390_collect_regset
645};
646
647static const struct regset s390x_last_break_regset = {
648 s390x_regmap_last_break,
649 s390_supply_regset,
650 s390_collect_regset
651};
652
653static const struct regset s390_system_call_regset = {
654 s390_regmap_system_call,
655 s390_supply_regset,
656 s390_collect_regset
657};
658
659static struct core_regset_section s390_linux32_regset_sections[] =
660{
661 { ".reg", s390_sizeof_gregset, "general-purpose" },
662 { ".reg2", s390_sizeof_fpregset, "floating-point" },
663 { NULL, 0}
664};
665
666static struct core_regset_section s390_linux32v1_regset_sections[] =
667{
668 { ".reg", s390_sizeof_gregset, "general-purpose" },
669 { ".reg2", s390_sizeof_fpregset, "floating-point" },
670 { ".reg-s390-last-break", 8, "s390 last-break address" },
671 { NULL, 0}
672};
673
674static struct core_regset_section s390_linux32v2_regset_sections[] =
675{
676 { ".reg", s390_sizeof_gregset, "general-purpose" },
677 { ".reg2", s390_sizeof_fpregset, "floating-point" },
678 { ".reg-s390-last-break", 8, "s390 last-break address" },
679 { ".reg-s390-system-call", 4, "s390 system-call" },
680 { NULL, 0}
681};
682
683static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
684{
685 { ".reg", s390_sizeof_gregset, "general-purpose" },
686 { ".reg2", s390_sizeof_fpregset, "floating-point" },
687 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
688 { NULL, 0}
689};
690
c642a434
UW
691static struct core_regset_section s390_linux64v1_regset_sections[] =
692{
693 { ".reg", s390_sizeof_gregset, "general-purpose" },
694 { ".reg2", s390_sizeof_fpregset, "floating-point" },
695 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
696 { ".reg-s390-last-break", 8, "s930 last-break address" },
697 { NULL, 0}
698};
699
700static struct core_regset_section s390_linux64v2_regset_sections[] =
701{
702 { ".reg", s390_sizeof_gregset, "general-purpose" },
703 { ".reg2", s390_sizeof_fpregset, "floating-point" },
704 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
705 { ".reg-s390-last-break", 8, "s930 last-break address" },
706 { ".reg-s390-system-call", 4, "s390 system-call" },
707 { NULL, 0}
708};
709
710static struct core_regset_section s390x_linux64_regset_sections[] =
711{
712 { ".reg", s390x_sizeof_gregset, "general-purpose" },
713 { ".reg2", s390_sizeof_fpregset, "floating-point" },
714 { NULL, 0}
715};
716
717static struct core_regset_section s390x_linux64v1_regset_sections[] =
718{
719 { ".reg", s390x_sizeof_gregset, "general-purpose" },
720 { ".reg2", s390_sizeof_fpregset, "floating-point" },
721 { ".reg-s390-last-break", 8, "s930 last-break address" },
722 { NULL, 0}
723};
724
725static struct core_regset_section s390x_linux64v2_regset_sections[] =
726{
727 { ".reg", s390x_sizeof_gregset, "general-purpose" },
728 { ".reg2", s390_sizeof_fpregset, "floating-point" },
729 { ".reg-s390-last-break", 8, "s930 last-break address" },
730 { ".reg-s390-system-call", 4, "s390 system-call" },
731 { NULL, 0}
732};
733
734
d0f54f9d
JB
735/* Return the appropriate register set for the core section identified
736 by SECT_NAME and SECT_SIZE. */
63807e1d 737static const struct regset *
d0f54f9d
JB
738s390_regset_from_core_section (struct gdbarch *gdbarch,
739 const char *sect_name, size_t sect_size)
740{
741 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
742
e31dcd20 743 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
744 return tdep->gregset;
745
e31dcd20 746 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
747 return tdep->fpregset;
748
7803799a
UW
749 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
750 return &s390_upper_regset;
751
c642a434
UW
752 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
753 return (gdbarch_ptr_bit (gdbarch) == 32
754 ? &s390_last_break_regset : &s390x_last_break_regset);
755
756 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
757 return &s390_system_call_regset;
758
d0f54f9d 759 return NULL;
5769d3cd
AC
760}
761
7803799a
UW
762static const struct target_desc *
763s390_core_read_description (struct gdbarch *gdbarch,
764 struct target_ops *target, bfd *abfd)
765{
766 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
767 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
768 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a
UW
769 asection *section = bfd_get_section_by_name (abfd, ".reg");
770 if (!section)
771 return NULL;
772
773 switch (bfd_section_size (abfd, section))
774 {
775 case s390_sizeof_gregset:
c642a434
UW
776 if (high_gprs)
777 return (v2? tdesc_s390_linux64v2 :
778 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
779 else
780 return (v2? tdesc_s390_linux32v2 :
781 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
782
783 case s390x_sizeof_gregset:
c642a434
UW
784 return (v2? tdesc_s390x_linux64v2 :
785 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
786
787 default:
788 return NULL;
789 }
790}
791
d0f54f9d 792
4bc8c588
JB
793/* Decoding S/390 instructions. */
794
795/* Named opcode values for the S/390 instructions we recognize. Some
796 instructions have their opcode split across two fields; those are the
797 op1_* and op2_* enums. */
798enum
799 {
a8c99f38
JB
800 op1_lhi = 0xa7, op2_lhi = 0x08,
801 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 802 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 803 op_lr = 0x18,
a8c99f38
JB
804 op_lgr = 0xb904,
805 op_l = 0x58,
806 op1_ly = 0xe3, op2_ly = 0x58,
807 op1_lg = 0xe3, op2_lg = 0x04,
808 op_lm = 0x98,
809 op1_lmy = 0xeb, op2_lmy = 0x98,
810 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 811 op_st = 0x50,
a8c99f38 812 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 813 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 814 op_std = 0x60,
4bc8c588 815 op_stm = 0x90,
a8c99f38 816 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 817 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
818 op1_aghi = 0xa7, op2_aghi = 0x0b,
819 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
820 op1_agfi = 0xc2, op2_agfi = 0x08,
821 op1_afi = 0xc2, op2_afi = 0x09,
822 op1_algfi= 0xc2, op2_algfi= 0x0a,
823 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
824 op_ar = 0x1a,
825 op_agr = 0xb908,
826 op_a = 0x5a,
827 op1_ay = 0xe3, op2_ay = 0x5a,
828 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
829 op1_slgfi= 0xc2, op2_slgfi= 0x04,
830 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
831 op_sr = 0x1b,
832 op_sgr = 0xb909,
833 op_s = 0x5b,
834 op1_sy = 0xe3, op2_sy = 0x5b,
835 op1_sg = 0xe3, op2_sg = 0x09,
836 op_nr = 0x14,
837 op_ngr = 0xb980,
838 op_la = 0x41,
839 op1_lay = 0xe3, op2_lay = 0x71,
840 op1_larl = 0xc0, op2_larl = 0x00,
841 op_basr = 0x0d,
842 op_bas = 0x4d,
843 op_bcr = 0x07,
844 op_bc = 0x0d,
1db4e8a0
UW
845 op_bctr = 0x06,
846 op_bctgr = 0xb946,
847 op_bct = 0x46,
848 op1_bctg = 0xe3, op2_bctg = 0x46,
849 op_bxh = 0x86,
850 op1_bxhg = 0xeb, op2_bxhg = 0x44,
851 op_bxle = 0x87,
852 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
853 op1_bras = 0xa7, op2_bras = 0x05,
854 op1_brasl= 0xc0, op2_brasl= 0x05,
855 op1_brc = 0xa7, op2_brc = 0x04,
856 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
857 op1_brct = 0xa7, op2_brct = 0x06,
858 op1_brctg= 0xa7, op2_brctg= 0x07,
859 op_brxh = 0x84,
860 op1_brxhg= 0xec, op2_brxhg= 0x44,
861 op_brxle = 0x85,
862 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
863 };
864
865
a8c99f38
JB
866/* Read a single instruction from address AT. */
867
868#define S390_MAX_INSTR_SIZE 6
869static int
870s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
871{
872 static int s390_instrlen[] = { 2, 4, 4, 6 };
873 int instrlen;
874
8defab1a 875 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
876 return -1;
877 instrlen = s390_instrlen[instr[0] >> 6];
878 if (instrlen > 2)
879 {
8defab1a 880 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
881 return -1;
882 }
883 return instrlen;
884}
885
886
4bc8c588
JB
887/* The functions below are for recognizing and decoding S/390
888 instructions of various formats. Each of them checks whether INSN
889 is an instruction of the given format, with the specified opcodes.
890 If it is, it sets the remaining arguments to the values of the
891 instruction's fields, and returns a non-zero value; otherwise, it
892 returns zero.
893
894 These functions' arguments appear in the order they appear in the
895 instruction, not in the machine-language form. So, opcodes always
896 come first, even though they're sometimes scattered around the
897 instructions. And displacements appear before base and extension
898 registers, as they do in the assembly syntax, not at the end, as
899 they do in the machine language. */
a78f21af 900static int
4bc8c588
JB
901is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
902{
903 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
904 {
905 *r1 = (insn[1] >> 4) & 0xf;
906 /* i2 is a 16-bit signed quantity. */
907 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
908 return 1;
909 }
910 else
911 return 0;
912}
8ac0e65a 913
5769d3cd 914
4bc8c588
JB
915static int
916is_ril (bfd_byte *insn, int op1, int op2,
917 unsigned int *r1, int *i2)
918{
919 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
920 {
921 *r1 = (insn[1] >> 4) & 0xf;
922 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
923 no sign extension is necessary, but we don't want to assume
924 that. */
925 *i2 = (((insn[2] << 24)
926 | (insn[3] << 16)
927 | (insn[4] << 8)
928 | (insn[5])) ^ 0x80000000) - 0x80000000;
929 return 1;
930 }
931 else
932 return 0;
933}
934
935
936static int
937is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
938{
939 if (insn[0] == op)
940 {
941 *r1 = (insn[1] >> 4) & 0xf;
942 *r2 = insn[1] & 0xf;
943 return 1;
944 }
945 else
946 return 0;
947}
948
949
950static int
951is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
952{
953 if (((insn[0] << 8) | insn[1]) == op)
954 {
955 /* Yes, insn[3]. insn[2] is unused in RRE format. */
956 *r1 = (insn[3] >> 4) & 0xf;
957 *r2 = insn[3] & 0xf;
958 return 1;
959 }
960 else
961 return 0;
962}
963
964
965static int
966is_rs (bfd_byte *insn, int op,
967 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
968{
969 if (insn[0] == op)
970 {
971 *r1 = (insn[1] >> 4) & 0xf;
972 *r3 = insn[1] & 0xf;
973 *b2 = (insn[2] >> 4) & 0xf;
974 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
975 return 1;
976 }
977 else
978 return 0;
979}
980
981
982static int
a8c99f38 983is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
984 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
985{
986 if (insn[0] == op1
4bc8c588
JB
987 && insn[5] == op2)
988 {
989 *r1 = (insn[1] >> 4) & 0xf;
990 *r3 = insn[1] & 0xf;
991 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
992 /* The 'long displacement' is a 20-bit signed integer. */
993 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
994 ^ 0x80000) - 0x80000;
4bc8c588
JB
995 return 1;
996 }
997 else
998 return 0;
999}
1000
1001
1db4e8a0
UW
1002static int
1003is_rsi (bfd_byte *insn, int op,
1004 unsigned int *r1, unsigned int *r3, int *i2)
1005{
1006 if (insn[0] == op)
1007 {
1008 *r1 = (insn[1] >> 4) & 0xf;
1009 *r3 = insn[1] & 0xf;
1010 /* i2 is a 16-bit signed quantity. */
1011 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1012 return 1;
1013 }
1014 else
1015 return 0;
1016}
1017
1018
1019static int
1020is_rie (bfd_byte *insn, int op1, int op2,
1021 unsigned int *r1, unsigned int *r3, int *i2)
1022{
1023 if (insn[0] == op1
1024 && insn[5] == op2)
1025 {
1026 *r1 = (insn[1] >> 4) & 0xf;
1027 *r3 = insn[1] & 0xf;
1028 /* i2 is a 16-bit signed quantity. */
1029 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1030 return 1;
1031 }
1032 else
1033 return 0;
1034}
1035
1036
4bc8c588
JB
1037static int
1038is_rx (bfd_byte *insn, int op,
1039 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1040{
1041 if (insn[0] == op)
1042 {
1043 *r1 = (insn[1] >> 4) & 0xf;
1044 *x2 = insn[1] & 0xf;
1045 *b2 = (insn[2] >> 4) & 0xf;
1046 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1047 return 1;
1048 }
1049 else
1050 return 0;
1051}
1052
1053
1054static int
a8c99f38 1055is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1056 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1057{
1058 if (insn[0] == op1
4bc8c588
JB
1059 && insn[5] == op2)
1060 {
1061 *r1 = (insn[1] >> 4) & 0xf;
1062 *x2 = insn[1] & 0xf;
1063 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1064 /* The 'long displacement' is a 20-bit signed integer. */
1065 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1066 ^ 0x80000) - 0x80000;
4bc8c588
JB
1067 return 1;
1068 }
1069 else
1070 return 0;
1071}
1072
1073
3fc46200 1074/* Prologue analysis. */
4bc8c588 1075
d0f54f9d
JB
1076#define S390_NUM_GPRS 16
1077#define S390_NUM_FPRS 16
4bc8c588 1078
a8c99f38
JB
1079struct s390_prologue_data {
1080
ee1b3323
UW
1081 /* The stack. */
1082 struct pv_area *stack;
1083
e17a4113 1084 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1085 int gpr_size;
1086 int fpr_size;
e17a4113 1087 enum bfd_endian byte_order;
a8c99f38
JB
1088
1089 /* The general-purpose registers. */
3fc46200 1090 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1091
1092 /* The floating-point registers. */
3fc46200 1093 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1094
121d8485
UW
1095 /* The offset relative to the CFA where the incoming GPR N was saved
1096 by the function prologue. 0 if not saved or unknown. */
1097 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1098
121d8485
UW
1099 /* Likewise for FPRs. */
1100 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1101
121d8485
UW
1102 /* Nonzero if the backchain was saved. This is assumed to be the
1103 case when the incoming SP is saved at the current SP location. */
1104 int back_chain_saved_p;
1105};
4bc8c588 1106
3fc46200
UW
1107/* Return the effective address for an X-style instruction, like:
1108
1109 L R1, D2(X2, B2)
1110
1111 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1112 constant; the effective address is the sum of all three. If either
1113 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1114 means that r0 can't be used as either X2 or B2. */
1115static pv_t
1116s390_addr (struct s390_prologue_data *data,
1117 int d2, unsigned int x2, unsigned int b2)
1118{
1119 pv_t result;
1120
1121 result = pv_constant (d2);
1122 if (x2)
1123 result = pv_add (result, data->gpr[x2]);
1124 if (b2)
1125 result = pv_add (result, data->gpr[b2]);
1126
1127 return result;
1128}
1129
1130/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1131static void
3fc46200
UW
1132s390_store (struct s390_prologue_data *data,
1133 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1134 pv_t value)
4bc8c588 1135{
3fc46200 1136 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1137 pv_t offset;
121d8485
UW
1138
1139 /* Check whether we are storing the backchain. */
3fc46200 1140 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1141
3fc46200 1142 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1143 if (size == data->gpr_size
3fc46200 1144 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1145 {
1146 data->back_chain_saved_p = 1;
1147 return;
1148 }
1149
1150
1151 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1152 if (!pv_area_store_would_trash (data->stack, addr))
1153 pv_area_store (data->stack, addr, size, value);
4bc8c588 1154
a8c99f38 1155
121d8485
UW
1156 /* Note: If this is some store we cannot identify, you might think we
1157 should forget our cached values, as any of those might have been hit.
1158
1159 However, we make the assumption that the register save areas are only
1160 ever stored to once in any given function, and we do recognize these
1161 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1162}
4bc8c588 1163
3fc46200
UW
1164/* Do a SIZE-byte load from D2(X2,B2). */
1165static pv_t
1166s390_load (struct s390_prologue_data *data,
1167 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1168
4bc8c588 1169{
3fc46200 1170 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1171
a8c99f38
JB
1172 /* If it's a load from an in-line constant pool, then we can
1173 simulate that, under the assumption that the code isn't
1174 going to change between the time the processor actually
1175 executed it creating the current frame, and the time when
1176 we're analyzing the code to unwind past that frame. */
3fc46200 1177 if (pv_is_constant (addr))
4bc8c588 1178 {
0542c86d 1179 struct target_section *secp;
3fc46200 1180 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38
JB
1181 if (secp != NULL
1182 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1183 & SEC_READONLY))
e17a4113
UW
1184 return pv_constant (read_memory_integer (addr.k, size,
1185 data->byte_order));
a8c99f38 1186 }
7666f43c 1187
121d8485 1188 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1189 return pv_area_fetch (data->stack, addr, size);
1190}
121d8485 1191
ee1b3323
UW
1192/* Function for finding saved registers in a 'struct pv_area'; we pass
1193 this to pv_area_scan.
121d8485 1194
ee1b3323
UW
1195 If VALUE is a saved register, ADDR says it was saved at a constant
1196 offset from the frame base, and SIZE indicates that the whole
1197 register was saved, record its offset in the reg_offset table in
1198 PROLOGUE_UNTYPED. */
1199static void
c378eb4e
MS
1200s390_check_for_saved (void *data_untyped, pv_t addr,
1201 CORE_ADDR size, pv_t value)
ee1b3323
UW
1202{
1203 struct s390_prologue_data *data = data_untyped;
1204 int i, offset;
1205
1206 if (!pv_is_register (addr, S390_SP_REGNUM))
1207 return;
1208
1209 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1210
ee1b3323
UW
1211 /* If we are storing the original value of a register, we want to
1212 record the CFA offset. If the same register is stored multiple
1213 times, the stack slot with the highest address counts. */
1214
1215 for (i = 0; i < S390_NUM_GPRS; i++)
1216 if (size == data->gpr_size
1217 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1218 if (data->gpr_slot[i] == 0
1219 || data->gpr_slot[i] > offset)
1220 {
1221 data->gpr_slot[i] = offset;
1222 return;
1223 }
1224
1225 for (i = 0; i < S390_NUM_FPRS; i++)
1226 if (size == data->fpr_size
1227 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1228 if (data->fpr_slot[i] == 0
1229 || data->fpr_slot[i] > offset)
1230 {
1231 data->fpr_slot[i] = offset;
1232 return;
1233 }
a8c99f38 1234}
4bc8c588 1235
a8c99f38
JB
1236/* Analyze the prologue of the function starting at START_PC,
1237 continuing at most until CURRENT_PC. Initialize DATA to
1238 hold all information we find out about the state of the registers
1239 and stack slots. Return the address of the instruction after
1240 the last one that changed the SP, FP, or back chain; or zero
1241 on error. */
1242static CORE_ADDR
1243s390_analyze_prologue (struct gdbarch *gdbarch,
1244 CORE_ADDR start_pc,
1245 CORE_ADDR current_pc,
1246 struct s390_prologue_data *data)
4bc8c588 1247{
a8c99f38
JB
1248 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1249
4bc8c588 1250 /* Our return value:
a8c99f38
JB
1251 The address of the instruction after the last one that changed
1252 the SP, FP, or back chain; zero if we got an error trying to
1253 read memory. */
1254 CORE_ADDR result = start_pc;
4bc8c588 1255
4bc8c588
JB
1256 /* The current PC for our abstract interpretation. */
1257 CORE_ADDR pc;
1258
1259 /* The address of the next instruction after that. */
1260 CORE_ADDR next_pc;
1261
4bc8c588
JB
1262 /* Set up everything's initial value. */
1263 {
1264 int i;
1265
55f960e1 1266 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1267
a8c99f38
JB
1268 /* For the purpose of prologue tracking, we consider the GPR size to
1269 be equal to the ABI word size, even if it is actually larger
1270 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1271 data->gpr_size = word_size;
1272 data->fpr_size = 8;
e17a4113 1273 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1274
4bc8c588 1275 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1276 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1277
1278 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1279 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1280
121d8485
UW
1281 for (i = 0; i < S390_NUM_GPRS; i++)
1282 data->gpr_slot[i] = 0;
1283
1284 for (i = 0; i < S390_NUM_FPRS; i++)
1285 data->fpr_slot[i] = 0;
4bc8c588 1286
121d8485 1287 data->back_chain_saved_p = 0;
4bc8c588
JB
1288 }
1289
a8c99f38
JB
1290 /* Start interpreting instructions, until we hit the frame's
1291 current PC or the first branch instruction. */
1292 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1293 {
4bc8c588 1294 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1295 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1296
3fc46200
UW
1297 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1298 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1299 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1300
4bc8c588 1301 /* Fields for various kinds of instructions. */
a8c99f38
JB
1302 unsigned int b2, r1, r2, x2, r3;
1303 int i2, d2;
4bc8c588 1304
121d8485 1305 /* The values of SP and FP before this instruction,
4bc8c588 1306 for detecting instructions that change them. */
3fc46200 1307 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1308 /* Likewise for the flag whether the back chain was saved. */
1309 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1310
1311 /* If we got an error trying to read the instruction, report it. */
1312 if (insn_len < 0)
8ac0e65a 1313 {
a8c99f38 1314 result = 0;
4bc8c588
JB
1315 break;
1316 }
1317
1318 next_pc = pc + insn_len;
1319
a8c99f38
JB
1320 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1321 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1322 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1323
4bc8c588 1324
3fc46200
UW
1325 /* LHI r1, i2 --- load halfword immediate. */
1326 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1327 /* LGFI r1, i2 --- load fullword immediate. */
1328 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1329 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1330 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1331 data->gpr[r1] = pv_constant (i2);
1332
1333 /* LR r1, r2 --- load from register. */
1334 /* LGR r1, r2 --- load from register (64-bit version). */
1335 else if (is_rr (insn32, op_lr, &r1, &r2)
1336 || is_rre (insn64, op_lgr, &r1, &r2))
1337 data->gpr[r1] = data->gpr[r2];
1338
1339 /* L r1, d2(x2, b2) --- load. */
1340 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1341 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1342 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1343 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1344 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1345 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1346
1347 /* ST r1, d2(x2, b2) --- store. */
1348 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1349 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1350 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1351 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1352 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1353 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1354
1355 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1356 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1357 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1358
1359 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1360 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1361 version). */
3fc46200
UW
1362 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1363 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1364 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1365 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1366 {
3fc46200
UW
1367 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1368 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1369 }
1370
3fc46200
UW
1371 /* AHI r1, i2 --- add halfword immediate. */
1372 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1373 /* AFI r1, i2 --- add fullword immediate. */
1374 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1375 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1376 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1377 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1378 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1379 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1380
1381 /* ALFI r1, i2 --- add logical immediate. */
1382 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1383 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1384 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1385 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1386 (CORE_ADDR)i2 & 0xffffffff);
1387
1388 /* AR r1, r2 -- add register. */
1389 /* AGR r1, r2 -- add register (64-bit version). */
1390 else if (is_rr (insn32, op_ar, &r1, &r2)
1391 || is_rre (insn64, op_agr, &r1, &r2))
1392 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1393
1394 /* A r1, d2(x2, b2) -- add. */
1395 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1396 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1397 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1398 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1399 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1400 data->gpr[r1] = pv_add (data->gpr[r1],
1401 s390_load (data, d2, x2, b2, data->gpr_size));
1402
1403 /* SLFI r1, i2 --- subtract logical immediate. */
1404 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1405 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1406 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1407 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1408 -((CORE_ADDR)i2 & 0xffffffff));
1409
1410 /* SR r1, r2 -- subtract register. */
1411 /* SGR r1, r2 -- subtract register (64-bit version). */
1412 else if (is_rr (insn32, op_sr, &r1, &r2)
1413 || is_rre (insn64, op_sgr, &r1, &r2))
1414 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1415
1416 /* S r1, d2(x2, b2) -- subtract. */
1417 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1418 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1419 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1420 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1421 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1422 data->gpr[r1] = pv_subtract (data->gpr[r1],
1423 s390_load (data, d2, x2, b2, data->gpr_size));
1424
1425 /* LA r1, d2(x2, b2) --- load address. */
1426 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1427 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1428 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1429 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1430
1431 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1432 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1433 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1434
3fc46200 1435 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1436 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1437 else if (is_rr (insn, op_basr, &r1, &r2)
1438 && r2 == 0)
3fc46200 1439 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1440
3fc46200 1441 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1442 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1443 {
3fc46200 1444 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1445 next_pc = pc + i2 * 2;
4bc8c588 1446
a8c99f38
JB
1447 /* We'd better not interpret any backward branches. We'll
1448 never terminate. */
1449 if (next_pc <= pc)
4bc8c588
JB
1450 break;
1451 }
1452
a8c99f38
JB
1453 /* Terminate search when hitting any other branch instruction. */
1454 else if (is_rr (insn, op_basr, &r1, &r2)
1455 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1456 || is_rr (insn, op_bcr, &r1, &r2)
1457 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1458 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1459 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1460 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1461 break;
1462
4bc8c588 1463 else
d4fb63e1
TT
1464 {
1465 /* An instruction we don't know how to simulate. The only
1466 safe thing to do would be to set every value we're tracking
1467 to 'unknown'. Instead, we'll be optimistic: we assume that
1468 we *can* interpret every instruction that the compiler uses
1469 to manipulate any of the data we're interested in here --
1470 then we can just ignore anything else. */
1471 }
4bc8c588
JB
1472
1473 /* Record the address after the last instruction that changed
1474 the FP, SP, or backlink. Ignore instructions that changed
1475 them back to their original values --- those are probably
1476 restore instructions. (The back chain is never restored,
1477 just popped.) */
1478 {
3fc46200
UW
1479 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1480 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1481
3fc46200
UW
1482 if ((! pv_is_identical (pre_insn_sp, sp)
1483 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1484 && sp.kind != pvk_unknown)
1485 || (! pv_is_identical (pre_insn_fp, fp)
1486 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1487 && fp.kind != pvk_unknown)
121d8485 1488 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1489 result = next_pc;
4bc8c588 1490 }
5769d3cd 1491 }
4bc8c588 1492
ee1b3323
UW
1493 /* Record where all the registers were saved. */
1494 pv_area_scan (data->stack, s390_check_for_saved, data);
1495
1496 free_pv_area (data->stack);
1497 data->stack = NULL;
1498
4bc8c588 1499 return result;
5769d3cd
AC
1500}
1501
a8c99f38
JB
1502/* Advance PC across any function entry prologue instructions to reach
1503 some "real" code. */
1504static CORE_ADDR
6093d2eb 1505s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1506{
1507 struct s390_prologue_data data;
1508 CORE_ADDR skip_pc;
6093d2eb 1509 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1510 return skip_pc ? skip_pc : pc;
1511}
1512
d0f54f9d
JB
1513/* Return true if we are in the functin's epilogue, i.e. after the
1514 instruction that destroyed the function's stack frame. */
1515static int
1516s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1517{
1518 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1519
1520 /* In frameless functions, there's not frame to destroy and thus
1521 we don't care about the epilogue.
1522
1523 In functions with frame, the epilogue sequence is a pair of
1524 a LM-type instruction that restores (amongst others) the
1525 return register %r14 and the stack pointer %r15, followed
1526 by a branch 'br %r14' --or equivalent-- that effects the
1527 actual return.
1528
1529 In that situation, this function needs to return 'true' in
1530 exactly one case: when pc points to that branch instruction.
1531
1532 Thus we try to disassemble the one instructions immediately
177b42fe 1533 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1534 modifying the stack pointer.
1535
1536 Note that disassembling backwards is not reliable, so there
1537 is a slight chance of false positives here ... */
1538
1539 bfd_byte insn[6];
1540 unsigned int r1, r3, b2;
1541 int d2;
1542
1543 if (word_size == 4
8defab1a 1544 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1545 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1546 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1547 return 1;
1548
a8c99f38 1549 if (word_size == 4
8defab1a 1550 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1551 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1552 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1553 return 1;
1554
d0f54f9d 1555 if (word_size == 8
8defab1a 1556 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1557 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1558 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1559 return 1;
1560
1561 return 0;
1562}
5769d3cd 1563
1db4e8a0
UW
1564/* Displaced stepping. */
1565
1566/* Fix up the state of registers and memory after having single-stepped
1567 a displaced instruction. */
1568static void
1569s390_displaced_step_fixup (struct gdbarch *gdbarch,
1570 struct displaced_step_closure *closure,
1571 CORE_ADDR from, CORE_ADDR to,
1572 struct regcache *regs)
1573{
1574 /* Since we use simple_displaced_step_copy_insn, our closure is a
1575 copy of the instruction. */
1576 gdb_byte *insn = (gdb_byte *) closure;
1577 static int s390_instrlen[] = { 2, 4, 4, 6 };
1578 int insnlen = s390_instrlen[insn[0] >> 6];
1579
1580 /* Fields for various kinds of instructions. */
1581 unsigned int b2, r1, r2, x2, r3;
1582 int i2, d2;
1583
1584 /* Get current PC and addressing mode bit. */
1585 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1586 ULONGEST amode = 0;
1db4e8a0
UW
1587
1588 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1589 {
1590 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1591 amode &= 0x80000000;
1592 }
1593
1594 if (debug_displaced)
1595 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1596 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1597 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1598 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1599
1600 /* Handle absolute branch and save instructions. */
1601 if (is_rr (insn, op_basr, &r1, &r2)
1602 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1603 {
1604 /* Recompute saved return address in R1. */
1605 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1606 amode | (from + insnlen));
1607 }
1608
1609 /* Handle absolute branch instructions. */
1610 else if (is_rr (insn, op_bcr, &r1, &r2)
1611 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1612 || is_rr (insn, op_bctr, &r1, &r2)
1613 || is_rre (insn, op_bctgr, &r1, &r2)
1614 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1615 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1616 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1617 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1618 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1619 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1620 {
1621 /* Update PC iff branch was *not* taken. */
1622 if (pc == to + insnlen)
1623 regcache_write_pc (regs, from + insnlen);
1624 }
1625
1626 /* Handle PC-relative branch and save instructions. */
1627 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1628 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1629 {
1630 /* Update PC. */
1631 regcache_write_pc (regs, pc - to + from);
1632 /* Recompute saved return address in R1. */
1633 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1634 amode | (from + insnlen));
1635 }
1636
1637 /* Handle PC-relative branch instructions. */
1638 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1639 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1640 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1641 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1642 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1643 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1644 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1645 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1646 {
1647 /* Update PC. */
1648 regcache_write_pc (regs, pc - to + from);
1649 }
1650
1651 /* Handle LOAD ADDRESS RELATIVE LONG. */
1652 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1653 {
0161e4b9
UW
1654 /* Update PC. */
1655 regcache_write_pc (regs, from + insnlen);
1db4e8a0
UW
1656 /* Recompute output address in R1. */
1657 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1658 amode | (from + i2 * 2));
1db4e8a0
UW
1659 }
1660
1661 /* If we executed a breakpoint instruction, point PC right back at it. */
1662 else if (insn[0] == 0x0 && insn[1] == 0x1)
1663 regcache_write_pc (regs, from);
1664
1665 /* For any other insn, PC points right after the original instruction. */
1666 else
1667 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1668
1669 if (debug_displaced)
1670 fprintf_unfiltered (gdb_stdlog,
1671 "displaced: (s390) pc is now %s\n",
1672 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1673}
a8c99f38 1674
d6db1fab
UW
1675
1676/* Helper routine to unwind pseudo registers. */
1677
1678static struct value *
1679s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1680{
1681 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1682 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1683 struct type *type = register_type (gdbarch, regnum);
1684
1685 /* Unwind PC via PSW address. */
1686 if (regnum == tdep->pc_regnum)
1687 {
1688 struct value *val;
1689
1690 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1691 if (!value_optimized_out (val))
1692 {
1693 LONGEST pswa = value_as_long (val);
1694
1695 if (TYPE_LENGTH (type) == 4)
1696 return value_from_pointer (type, pswa & 0x7fffffff);
1697 else
1698 return value_from_pointer (type, pswa);
1699 }
1700 }
1701
1702 /* Unwind CC via PSW mask. */
1703 if (regnum == tdep->cc_regnum)
1704 {
1705 struct value *val;
1706
1707 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1708 if (!value_optimized_out (val))
1709 {
1710 LONGEST pswm = value_as_long (val);
1711
1712 if (TYPE_LENGTH (type) == 4)
1713 return value_from_longest (type, (pswm >> 12) & 3);
1714 else
1715 return value_from_longest (type, (pswm >> 44) & 3);
1716 }
1717 }
1718
1719 /* Unwind full GPRs to show at least the lower halves (as the
1720 upper halves are undefined). */
1721 if (tdep->gpr_full_regnum != -1
1722 && regnum >= tdep->gpr_full_regnum
1723 && regnum < tdep->gpr_full_regnum + 16)
1724 {
1725 int reg = regnum - tdep->gpr_full_regnum;
1726 struct value *val;
1727
1728 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1729 if (!value_optimized_out (val))
1730 return value_cast (type, val);
1731 }
1732
1733 return allocate_optimized_out_value (type);
1734}
1735
1736static struct value *
1737s390_trad_frame_prev_register (struct frame_info *this_frame,
1738 struct trad_frame_saved_reg saved_regs[],
1739 int regnum)
1740{
1741 if (regnum < S390_NUM_REGS)
1742 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1743 else
1744 return s390_unwind_pseudo_register (this_frame, regnum);
1745}
1746
1747
a8c99f38
JB
1748/* Normal stack frames. */
1749
1750struct s390_unwind_cache {
1751
1752 CORE_ADDR func;
1753 CORE_ADDR frame_base;
1754 CORE_ADDR local_base;
1755
1756 struct trad_frame_saved_reg *saved_regs;
1757};
1758
a78f21af 1759static int
f089c433 1760s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1761 struct s390_unwind_cache *info)
5769d3cd 1762{
f089c433 1763 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1764 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1765 struct s390_prologue_data data;
3fc46200
UW
1766 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1767 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1768 int i;
1769 CORE_ADDR cfa;
a8c99f38
JB
1770 CORE_ADDR func;
1771 CORE_ADDR result;
1772 ULONGEST reg;
1773 CORE_ADDR prev_sp;
1774 int frame_pointer;
1775 int size;
edb3359d 1776 struct frame_info *next_frame;
a8c99f38
JB
1777
1778 /* Try to find the function start address. If we can't find it, we don't
1779 bother searching for it -- with modern compilers this would be mostly
1780 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1781 or else a valid backchain ... */
f089c433 1782 func = get_frame_func (this_frame);
a8c99f38
JB
1783 if (!func)
1784 return 0;
5769d3cd 1785
a8c99f38
JB
1786 /* Try to analyze the prologue. */
1787 result = s390_analyze_prologue (gdbarch, func,
f089c433 1788 get_frame_pc (this_frame), &data);
a8c99f38 1789 if (!result)
5769d3cd 1790 return 0;
5769d3cd 1791
a8c99f38
JB
1792 /* If this was successful, we should have found the instruction that
1793 sets the stack pointer register to the previous value of the stack
1794 pointer minus the frame size. */
3fc46200 1795 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1796 return 0;
a8c99f38
JB
1797
1798 /* A frame size of zero at this point can mean either a real
1799 frameless function, or else a failure to find the prologue.
1800 Perform some sanity checks to verify we really have a
1801 frameless function. */
1802 if (sp->k == 0)
5769d3cd 1803 {
a8c99f38
JB
1804 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1805 size zero. This is only possible if the next frame is a sentinel
1806 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1807 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1808 needed, instead the code should simpliy rely on its
1809 analysis. */
edb3359d
DJ
1810 next_frame = get_next_frame (this_frame);
1811 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1812 next_frame = get_next_frame (next_frame);
1813 if (next_frame
f089c433 1814 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1815 return 0;
5769d3cd 1816
a8c99f38
JB
1817 /* If we really have a frameless function, %r14 must be valid
1818 -- in particular, it must point to a different function. */
f089c433 1819 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1820 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1821 if (get_pc_function_start (reg) == func)
5769d3cd 1822 {
a8c99f38
JB
1823 /* However, there is one case where it *is* valid for %r14
1824 to point to the same function -- if this is a recursive
1825 call, and we have stopped in the prologue *before* the
1826 stack frame was allocated.
1827
1828 Recognize this case by looking ahead a bit ... */
5769d3cd 1829
a8c99f38 1830 struct s390_prologue_data data2;
3fc46200 1831 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1832
1833 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1834 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1835 && sp->k != 0))
1836 return 0;
5769d3cd 1837 }
5769d3cd 1838 }
5769d3cd
AC
1839
1840
a8c99f38
JB
1841 /* OK, we've found valid prologue data. */
1842 size = -sp->k;
5769d3cd 1843
a8c99f38
JB
1844 /* If the frame pointer originally also holds the same value
1845 as the stack pointer, we're probably using it. If it holds
1846 some other value -- even a constant offset -- it is most
1847 likely used as temp register. */
3fc46200 1848 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1849 frame_pointer = S390_FRAME_REGNUM;
1850 else
1851 frame_pointer = S390_SP_REGNUM;
1852
1853 /* If we've detected a function with stack frame, we'll still have to
1854 treat it as frameless if we're currently within the function epilog
c378eb4e 1855 code at a point where the frame pointer has already been restored.
a8c99f38 1856 This can only happen in an innermost frame. */
0e100dab
AC
1857 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1858 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1859 next_frame = get_next_frame (this_frame);
1860 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1861 next_frame = get_next_frame (next_frame);
f089c433 1862 if (size > 0
edb3359d 1863 && (next_frame == NULL
f089c433 1864 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1865 {
a8c99f38
JB
1866 /* See the comment in s390_in_function_epilogue_p on why this is
1867 not completely reliable ... */
f089c433 1868 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1869 {
a8c99f38
JB
1870 memset (&data, 0, sizeof (data));
1871 size = 0;
1872 frame_pointer = S390_SP_REGNUM;
5769d3cd 1873 }
5769d3cd 1874 }
5769d3cd 1875
a8c99f38
JB
1876 /* Once we know the frame register and the frame size, we can unwind
1877 the current value of the frame register from the next frame, and
1878 add back the frame size to arrive that the previous frame's
1879 stack pointer value. */
f089c433 1880 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1881 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1882
7803799a
UW
1883 /* Set up ABI call-saved/call-clobbered registers. */
1884 for (i = 0; i < S390_NUM_REGS; i++)
1885 if (!s390_register_call_saved (gdbarch, i))
1886 trad_frame_set_unknown (info->saved_regs, i);
1887
1888 /* CC is always call-clobbered. */
d6db1fab 1889 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1890
121d8485
UW
1891 /* Record the addresses of all register spill slots the prologue parser
1892 has recognized. Consider only registers defined as call-saved by the
1893 ABI; for call-clobbered registers the parser may have recognized
1894 spurious stores. */
5769d3cd 1895
7803799a
UW
1896 for (i = 0; i < 16; i++)
1897 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1898 && data.gpr_slot[i] != 0)
121d8485 1899 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1900
7803799a
UW
1901 for (i = 0; i < 16; i++)
1902 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1903 && data.fpr_slot[i] != 0)
1904 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1905
1906 /* Function return will set PC to %r14. */
d6db1fab 1907 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1908
1909 /* In frameless functions, we unwind simply by moving the return
1910 address to the PC. However, if we actually stored to the
1911 save area, use that -- we might only think the function frameless
1912 because we're in the middle of the prologue ... */
1913 if (size == 0
d6db1fab 1914 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1915 {
d6db1fab 1916 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1917 }
a8c99f38
JB
1918
1919 /* Another sanity check: unless this is a frameless function,
1920 we should have found spill slots for SP and PC.
1921 If not, we cannot unwind further -- this happens e.g. in
1922 libc's thread_start routine. */
1923 if (size > 0)
5769d3cd 1924 {
a8c99f38 1925 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1926 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1927 prev_sp = -1;
5769d3cd 1928 }
a8c99f38
JB
1929
1930 /* We use the current value of the frame register as local_base,
1931 and the top of the register save area as frame_base. */
1932 if (prev_sp != -1)
1933 {
1934 info->frame_base = prev_sp + 16*word_size + 32;
1935 info->local_base = prev_sp - size;
1936 }
1937
1938 info->func = func;
1939 return 1;
5769d3cd
AC
1940}
1941
a78f21af 1942static void
f089c433 1943s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1944 struct s390_unwind_cache *info)
5769d3cd 1945{
f089c433 1946 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1947 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1948 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1949 CORE_ADDR backchain;
1950 ULONGEST reg;
1951 LONGEST sp;
7803799a
UW
1952 int i;
1953
1954 /* Set up ABI call-saved/call-clobbered registers. */
1955 for (i = 0; i < S390_NUM_REGS; i++)
1956 if (!s390_register_call_saved (gdbarch, i))
1957 trad_frame_set_unknown (info->saved_regs, i);
1958
1959 /* CC is always call-clobbered. */
d6db1fab 1960 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1961
1962 /* Get the backchain. */
f089c433 1963 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1964 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1965
1966 /* A zero backchain terminates the frame chain. As additional
1967 sanity check, let's verify that the spill slot for SP in the
1968 save area pointed to by the backchain in fact links back to
1969 the save area. */
1970 if (backchain != 0
e17a4113
UW
1971 && safe_read_memory_integer (backchain + 15*word_size,
1972 word_size, byte_order, &sp)
a8c99f38
JB
1973 && (CORE_ADDR)sp == backchain)
1974 {
1975 /* We don't know which registers were saved, but it will have
1976 to be at least %r14 and %r15. This will allow us to continue
1977 unwinding, but other prev-frame registers may be incorrect ... */
1978 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1979 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1980
1981 /* Function return will set PC to %r14. */
d6db1fab 1982 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1983 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1984
1985 /* We use the current value of the frame register as local_base,
1986 and the top of the register save area as frame_base. */
1987 info->frame_base = backchain + 16*word_size + 32;
1988 info->local_base = reg;
1989 }
1990
f089c433 1991 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1992}
1993
a8c99f38 1994static struct s390_unwind_cache *
f089c433 1995s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1996 void **this_prologue_cache)
1997{
1998 struct s390_unwind_cache *info;
1999 if (*this_prologue_cache)
2000 return *this_prologue_cache;
2001
2002 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2003 *this_prologue_cache = info;
f089c433 2004 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2005 info->func = -1;
2006 info->frame_base = -1;
2007 info->local_base = -1;
2008
2009 /* Try to use prologue analysis to fill the unwind cache.
2010 If this fails, fall back to reading the stack backchain. */
f089c433
UW
2011 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2012 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
2013
2014 return info;
2015}
5769d3cd 2016
a78f21af 2017static void
f089c433 2018s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2019 void **this_prologue_cache,
2020 struct frame_id *this_id)
5769d3cd 2021{
a8c99f38 2022 struct s390_unwind_cache *info
f089c433 2023 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2024
a8c99f38
JB
2025 if (info->frame_base == -1)
2026 return;
5769d3cd 2027
a8c99f38 2028 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2029}
2030
f089c433
UW
2031static struct value *
2032s390_frame_prev_register (struct frame_info *this_frame,
2033 void **this_prologue_cache, int regnum)
a8c99f38 2034{
7803799a 2035 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2036 struct s390_unwind_cache *info
f089c433 2037 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2038
d6db1fab 2039 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2040}
2041
2042static const struct frame_unwind s390_frame_unwind = {
2043 NORMAL_FRAME,
8fbca658 2044 default_frame_unwind_stop_reason,
a8c99f38 2045 s390_frame_this_id,
f089c433
UW
2046 s390_frame_prev_register,
2047 NULL,
2048 default_frame_sniffer
a8c99f38
JB
2049};
2050
5769d3cd 2051
8e645ae7
AC
2052/* Code stubs and their stack frames. For things like PLTs and NULL
2053 function calls (where there is no true frame and the return address
2054 is in the RETADDR register). */
a8c99f38 2055
8e645ae7
AC
2056struct s390_stub_unwind_cache
2057{
a8c99f38
JB
2058 CORE_ADDR frame_base;
2059 struct trad_frame_saved_reg *saved_regs;
2060};
2061
8e645ae7 2062static struct s390_stub_unwind_cache *
f089c433 2063s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2064 void **this_prologue_cache)
5769d3cd 2065{
f089c433 2066 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2067 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2068 struct s390_stub_unwind_cache *info;
a8c99f38 2069 ULONGEST reg;
5c3cf190 2070
a8c99f38
JB
2071 if (*this_prologue_cache)
2072 return *this_prologue_cache;
5c3cf190 2073
8e645ae7 2074 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2075 *this_prologue_cache = info;
f089c433 2076 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2077
2078 /* The return address is in register %r14. */
d6db1fab 2079 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2080
2081 /* Retrieve stack pointer and determine our frame base. */
f089c433 2082 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2083 info->frame_base = reg + 16*word_size + 32;
2084
2085 return info;
5769d3cd
AC
2086}
2087
a8c99f38 2088static void
f089c433 2089s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2090 void **this_prologue_cache,
2091 struct frame_id *this_id)
5769d3cd 2092{
8e645ae7 2093 struct s390_stub_unwind_cache *info
f089c433
UW
2094 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2095 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2096}
5769d3cd 2097
f089c433
UW
2098static struct value *
2099s390_stub_frame_prev_register (struct frame_info *this_frame,
2100 void **this_prologue_cache, int regnum)
8e645ae7
AC
2101{
2102 struct s390_stub_unwind_cache *info
f089c433 2103 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2104 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2105}
2106
f089c433
UW
2107static int
2108s390_stub_frame_sniffer (const struct frame_unwind *self,
2109 struct frame_info *this_frame,
2110 void **this_prologue_cache)
a8c99f38 2111{
93d42b30 2112 CORE_ADDR addr_in_block;
8e645ae7
AC
2113 bfd_byte insn[S390_MAX_INSTR_SIZE];
2114
2115 /* If the current PC points to non-readable memory, we assume we
2116 have trapped due to an invalid function pointer call. We handle
2117 the non-existing current function like a PLT stub. */
f089c433 2118 addr_in_block = get_frame_address_in_block (this_frame);
93d42b30 2119 if (in_plt_section (addr_in_block, NULL)
f089c433
UW
2120 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2121 return 1;
2122 return 0;
a8c99f38 2123}
5769d3cd 2124
f089c433
UW
2125static const struct frame_unwind s390_stub_frame_unwind = {
2126 NORMAL_FRAME,
8fbca658 2127 default_frame_unwind_stop_reason,
f089c433
UW
2128 s390_stub_frame_this_id,
2129 s390_stub_frame_prev_register,
2130 NULL,
2131 s390_stub_frame_sniffer
2132};
2133
5769d3cd 2134
a8c99f38 2135/* Signal trampoline stack frames. */
5769d3cd 2136
a8c99f38
JB
2137struct s390_sigtramp_unwind_cache {
2138 CORE_ADDR frame_base;
2139 struct trad_frame_saved_reg *saved_regs;
2140};
5769d3cd 2141
a8c99f38 2142static struct s390_sigtramp_unwind_cache *
f089c433 2143s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2144 void **this_prologue_cache)
5769d3cd 2145{
f089c433 2146 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2147 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2148 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2149 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2150 struct s390_sigtramp_unwind_cache *info;
2151 ULONGEST this_sp, prev_sp;
7803799a 2152 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2153 int i;
2154
2155 if (*this_prologue_cache)
2156 return *this_prologue_cache;
5769d3cd 2157
a8c99f38
JB
2158 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2159 *this_prologue_cache = info;
f089c433 2160 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2161
f089c433
UW
2162 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2163 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2164 next_cfa = this_sp + 16*word_size + 32;
2165
2166 /* New-style RT frame:
2167 retcode + alignment (8 bytes)
2168 siginfo (128 bytes)
c378eb4e 2169 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2170 if (next_ra == next_cfa)
2171 {
f0f63663 2172 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2173 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2174 upper GPR halves if present. */
2175 sigreg_high_off = 8;
a8c99f38
JB
2176 }
2177
2178 /* Old-style RT frame and all non-RT frames:
2179 old signal mask (8 bytes)
c378eb4e 2180 pointer to sigregs. */
5769d3cd
AC
2181 else
2182 {
e17a4113
UW
2183 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2184 word_size, byte_order);
7803799a
UW
2185 /* sigregs are followed by signo (4 bytes), then by the
2186 upper GPR halves if present. */
2187 sigreg_high_off = 4;
a8c99f38 2188 }
5769d3cd 2189
a8c99f38
JB
2190 /* The sigregs structure looks like this:
2191 long psw_mask;
2192 long psw_addr;
2193 long gprs[16];
2194 int acrs[16];
2195 int fpc;
2196 int __pad;
2197 double fprs[16]; */
5769d3cd 2198
7803799a
UW
2199 /* PSW mask and address. */
2200 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2201 sigreg_ptr += word_size;
7803799a 2202 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2203 sigreg_ptr += word_size;
2204
2205 /* Then the GPRs. */
2206 for (i = 0; i < 16; i++)
2207 {
2208 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2209 sigreg_ptr += word_size;
2210 }
2211
2212 /* Then the ACRs. */
2213 for (i = 0; i < 16; i++)
2214 {
2215 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2216 sigreg_ptr += 4;
5769d3cd 2217 }
5769d3cd 2218
a8c99f38
JB
2219 /* The floating-point control word. */
2220 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2221 sigreg_ptr += 8;
5769d3cd 2222
a8c99f38
JB
2223 /* And finally the FPRs. */
2224 for (i = 0; i < 16; i++)
2225 {
2226 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2227 sigreg_ptr += 8;
2228 }
2229
7803799a
UW
2230 /* If we have them, the GPR upper halves are appended at the end. */
2231 sigreg_ptr += sigreg_high_off;
2232 if (tdep->gpr_full_regnum != -1)
2233 for (i = 0; i < 16; i++)
2234 {
2235 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2236 sigreg_ptr += 4;
2237 }
2238
a8c99f38
JB
2239 /* Restore the previous frame's SP. */
2240 prev_sp = read_memory_unsigned_integer (
2241 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2242 word_size, byte_order);
5769d3cd 2243
a8c99f38
JB
2244 /* Determine our frame base. */
2245 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2246
a8c99f38 2247 return info;
5769d3cd
AC
2248}
2249
a8c99f38 2250static void
f089c433 2251s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2252 void **this_prologue_cache,
2253 struct frame_id *this_id)
5769d3cd 2254{
a8c99f38 2255 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2256 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2257 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2258}
2259
f089c433
UW
2260static struct value *
2261s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2262 void **this_prologue_cache, int regnum)
a8c99f38
JB
2263{
2264 struct s390_sigtramp_unwind_cache *info
f089c433 2265 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2266 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2267}
2268
f089c433
UW
2269static int
2270s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2271 struct frame_info *this_frame,
2272 void **this_prologue_cache)
5769d3cd 2273{
f089c433 2274 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2275 bfd_byte sigreturn[2];
4c8287ac 2276
8defab1a 2277 if (target_read_memory (pc, sigreturn, 2))
f089c433 2278 return 0;
4c8287ac 2279
a8c99f38 2280 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2281 return 0;
5769d3cd 2282
a8c99f38
JB
2283 if (sigreturn[1] != 119 /* sigreturn */
2284 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2285 return 0;
a8c99f38 2286
f089c433 2287 return 1;
5769d3cd
AC
2288}
2289
f089c433
UW
2290static const struct frame_unwind s390_sigtramp_frame_unwind = {
2291 SIGTRAMP_FRAME,
8fbca658 2292 default_frame_unwind_stop_reason,
f089c433
UW
2293 s390_sigtramp_frame_this_id,
2294 s390_sigtramp_frame_prev_register,
2295 NULL,
2296 s390_sigtramp_frame_sniffer
2297};
2298
4c8287ac 2299
a8c99f38
JB
2300/* Frame base handling. */
2301
2302static CORE_ADDR
f089c433 2303s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2304{
a8c99f38 2305 struct s390_unwind_cache *info
f089c433 2306 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2307 return info->frame_base;
2308}
2309
2310static CORE_ADDR
f089c433 2311s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2312{
2313 struct s390_unwind_cache *info
f089c433 2314 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2315 return info->local_base;
2316}
2317
2318static const struct frame_base s390_frame_base = {
2319 &s390_frame_unwind,
2320 s390_frame_base_address,
2321 s390_local_base_address,
2322 s390_local_base_address
2323};
2324
2325static CORE_ADDR
2326s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2327{
7803799a 2328 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2329 ULONGEST pc;
7803799a 2330 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2331 return gdbarch_addr_bits_remove (gdbarch, pc);
2332}
2333
2334static CORE_ADDR
2335s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2336{
2337 ULONGEST sp;
2338 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2339 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2340}
2341
2342
a431654a
AC
2343/* DWARF-2 frame support. */
2344
7803799a
UW
2345static struct value *
2346s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2347 int regnum)
2348{
d6db1fab 2349 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2350}
2351
a431654a
AC
2352static void
2353s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2354 struct dwarf2_frame_state_reg *reg,
4a4e5149 2355 struct frame_info *this_frame)
a431654a
AC
2356{
2357 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2358
d6db1fab
UW
2359 /* The condition code (and thus PSW mask) is call-clobbered. */
2360 if (regnum == S390_PSWM_REGNUM)
2361 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2362
2363 /* The PSW address unwinds to the return address. */
2364 else if (regnum == S390_PSWA_REGNUM)
2365 reg->how = DWARF2_FRAME_REG_RA;
2366
7803799a
UW
2367 /* Fixed registers are call-saved or call-clobbered
2368 depending on the ABI in use. */
d6db1fab 2369 else if (regnum < S390_NUM_REGS)
a431654a 2370 {
7803799a 2371 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2372 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2373 else
a431654a 2374 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2375 }
a431654a 2376
d6db1fab
UW
2377 /* We install a special function to unwind pseudos. */
2378 else
7803799a
UW
2379 {
2380 reg->how = DWARF2_FRAME_REG_FN;
2381 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2382 }
2383}
2384
2385
b0cf273e
JB
2386/* Dummy function calls. */
2387
78f8b424
JB
2388/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2389 "Integer-like" types are those that should be passed the way
2390 integers are: integers, enums, ranges, characters, and booleans. */
2391static int
2392is_integer_like (struct type *type)
2393{
2394 enum type_code code = TYPE_CODE (type);
2395
2396 return (code == TYPE_CODE_INT
2397 || code == TYPE_CODE_ENUM
2398 || code == TYPE_CODE_RANGE
2399 || code == TYPE_CODE_CHAR
2400 || code == TYPE_CODE_BOOL);
2401}
2402
78f8b424
JB
2403/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2404 "Pointer-like" types are those that should be passed the way
2405 pointers are: pointers and references. */
2406static int
2407is_pointer_like (struct type *type)
2408{
2409 enum type_code code = TYPE_CODE (type);
2410
2411 return (code == TYPE_CODE_PTR
2412 || code == TYPE_CODE_REF);
2413}
2414
2415
20a940cc
JB
2416/* Return non-zero if TYPE is a `float singleton' or `double
2417 singleton', zero otherwise.
2418
2419 A `T singleton' is a struct type with one member, whose type is
2420 either T or a `T singleton'. So, the following are all float
2421 singletons:
2422
2423 struct { float x };
2424 struct { struct { float x; } x; };
2425 struct { struct { struct { float x; } x; } x; };
2426
2427 ... and so on.
2428
b0cf273e
JB
2429 All such structures are passed as if they were floats or doubles,
2430 as the (revised) ABI says. */
20a940cc
JB
2431static int
2432is_float_singleton (struct type *type)
2433{
b0cf273e
JB
2434 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2435 {
2436 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2437 CHECK_TYPEDEF (singleton_type);
2438
2439 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2440 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2441 || is_float_singleton (singleton_type));
2442 }
2443
2444 return 0;
20a940cc
JB
2445}
2446
2447
2448/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2449 "Struct-like" types are those that should be passed as structs are:
2450 structs and unions.
2451
2452 As an odd quirk, not mentioned in the ABI, GCC passes float and
2453 double singletons as if they were a plain float, double, etc. (The
2454 corresponding union types are handled normally.) So we exclude
2455 those types here. *shrug* */
2456static int
2457is_struct_like (struct type *type)
2458{
2459 enum type_code code = TYPE_CODE (type);
2460
2461 return (code == TYPE_CODE_UNION
2462 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2463}
2464
2465
2466/* Return non-zero if TYPE is a float-like type, zero otherwise.
2467 "Float-like" types are those that should be passed as
2468 floating-point values are.
2469
2470 You'd think this would just be floats, doubles, long doubles, etc.
2471 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2472 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2473 corresponding union types are handled normally.) So we include
20a940cc
JB
2474 those types here. *shrug* */
2475static int
2476is_float_like (struct type *type)
2477{
2478 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2479 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2480 || is_float_singleton (type));
2481}
2482
2483
78f8b424 2484static int
b0cf273e 2485is_power_of_two (unsigned int n)
78f8b424 2486{
b0cf273e 2487 return ((n & (n - 1)) == 0);
78f8b424
JB
2488}
2489
b0cf273e
JB
2490/* Return non-zero if TYPE should be passed as a pointer to a copy,
2491 zero otherwise. */
4d819d0e 2492static int
b0cf273e 2493s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2494{
354ecfd5 2495 if (TYPE_LENGTH (type) > 8)
b0cf273e 2496 return 1;
4d819d0e 2497
56b9d9ac
UW
2498 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2499 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2500 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2501}
2502
b0cf273e
JB
2503/* Return non-zero if TYPE should be passed in a float register
2504 if possible. */
78f8b424 2505static int
b0cf273e 2506s390_function_arg_float (struct type *type)
78f8b424 2507{
354ecfd5 2508 if (TYPE_LENGTH (type) > 8)
b0cf273e 2509 return 0;
78f8b424 2510
b0cf273e 2511 return is_float_like (type);
4d819d0e
JB
2512}
2513
b0cf273e
JB
2514/* Return non-zero if TYPE should be passed in an integer register
2515 (or a pair of integer registers) if possible. */
78f8b424 2516static int
b0cf273e 2517s390_function_arg_integer (struct type *type)
78f8b424 2518{
354ecfd5 2519 if (TYPE_LENGTH (type) > 8)
b0cf273e 2520 return 0;
78f8b424 2521
b0cf273e
JB
2522 return is_integer_like (type)
2523 || is_pointer_like (type)
354ecfd5 2524 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2525}
2526
78f8b424
JB
2527/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2528 word as required for the ABI. */
2529static LONGEST
e17a4113 2530extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2531{
e17a4113 2532 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2533 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2534
2535 /* Even structs get passed in the least significant bits of the
2536 register / memory word. It's not really right to extract them as
2537 an integer, but it does take care of the extension. */
2538 if (TYPE_UNSIGNED (type))
0fd88904 2539 return extract_unsigned_integer (value_contents (arg),
e17a4113 2540 TYPE_LENGTH (type), byte_order);
78f8b424 2541 else
0fd88904 2542 return extract_signed_integer (value_contents (arg),
e17a4113 2543 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2544}
2545
2546
78f8b424
JB
2547/* Return the alignment required by TYPE. */
2548static int
2549alignment_of (struct type *type)
2550{
2551 int alignment;
2552
2553 if (is_integer_like (type)
2554 || is_pointer_like (type)
a16b8bcd
UW
2555 || TYPE_CODE (type) == TYPE_CODE_FLT
2556 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2557 alignment = TYPE_LENGTH (type);
2558 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2559 || TYPE_CODE (type) == TYPE_CODE_UNION)
2560 {
2561 int i;
2562
2563 alignment = 1;
2564 for (i = 0; i < TYPE_NFIELDS (type); i++)
2565 {
56b9d9ac
UW
2566 int field_alignment
2567 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424
JB
2568
2569 if (field_alignment > alignment)
2570 alignment = field_alignment;
2571 }
2572 }
2573 else
2574 alignment = 1;
2575
2576 /* Check that everything we ever return is a power of two. Lots of
2577 code doesn't want to deal with aligning things to arbitrary
2578 boundaries. */
2579 gdb_assert ((alignment & (alignment - 1)) == 0);
2580
2581 return alignment;
2582}
2583
2584
2585/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2586 place to be passed to a function, as specified by the "GNU/Linux
2587 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2588
2589 SP is the current stack pointer. We must put arguments, links,
2590 padding, etc. whereever they belong, and return the new stack
2591 pointer value.
2592
2593 If STRUCT_RETURN is non-zero, then the function we're calling is
2594 going to return a structure by value; STRUCT_ADDR is the address of
2595 a block we've allocated for it on the stack.
2596
2597 Our caller has taken care of any type promotions needed to satisfy
2598 prototypes or the old K&R argument-passing rules. */
a78f21af 2599static CORE_ADDR
7d9b040b 2600s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2601 struct regcache *regcache, CORE_ADDR bp_addr,
2602 int nargs, struct value **args, CORE_ADDR sp,
2603 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2604{
b0cf273e
JB
2605 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2606 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2607 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2608 int i;
5769d3cd 2609
78f8b424
JB
2610 /* If the i'th argument is passed as a reference to a copy, then
2611 copy_addr[i] is the address of the copy we made. */
2612 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2613
c0cc4c83 2614 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2615 for (i = 0; i < nargs; i++)
2616 {
2617 struct value *arg = args[i];
56b9d9ac 2618 struct type *type = check_typedef (value_type (arg));
5769d3cd 2619
b0cf273e 2620 if (s390_function_arg_pass_by_reference (type))
01c464e9 2621 {
354ecfd5 2622 sp -= TYPE_LENGTH (type);
5b03f266 2623 sp = align_down (sp, alignment_of (type));
78f8b424 2624 copy_addr[i] = sp;
01c464e9 2625 }
5769d3cd 2626 }
5769d3cd 2627
78f8b424
JB
2628 /* Reserve space for the parameter area. As a conservative
2629 simplification, we assume that everything will be passed on the
b0cf273e
JB
2630 stack. Since every argument larger than 8 bytes will be
2631 passed by reference, we use this simple upper bound. */
2632 sp -= nargs * 8;
78f8b424 2633
78f8b424
JB
2634 /* After all that, make sure it's still aligned on an eight-byte
2635 boundary. */
5b03f266 2636 sp = align_down (sp, 8);
78f8b424 2637
c0cc4c83
UW
2638 /* Allocate the standard frame areas: the register save area, the
2639 word reserved for the compiler (which seems kind of meaningless),
2640 and the back chain pointer. */
2641 sp -= 16*word_size + 32;
2642
2643 /* Now we have the final SP value. Make sure we didn't underflow;
2644 on 31-bit, this would result in addresses with the high bit set,
2645 which causes confusion elsewhere. Note that if we error out
2646 here, stack and registers remain untouched. */
2647 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2648 error (_("Stack overflow"));
2649
2650
78f8b424
JB
2651 /* Finally, place the actual parameters, working from SP towards
2652 higher addresses. The code above is supposed to reserve enough
2653 space for this. */
2654 {
2655 int fr = 0;
2656 int gr = 2;
c0cc4c83 2657 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2658
b0cf273e 2659 /* A struct is returned using general register 2. */
4d819d0e 2660 if (struct_return)
b0cf273e
JB
2661 {
2662 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2663 struct_addr);
2664 gr++;
2665 }
4d819d0e 2666
78f8b424
JB
2667 for (i = 0; i < nargs; i++)
2668 {
2669 struct value *arg = args[i];
56b9d9ac 2670 struct type *type = check_typedef (value_type (arg));
b0cf273e
JB
2671 unsigned length = TYPE_LENGTH (type);
2672
2673 if (s390_function_arg_pass_by_reference (type))
2674 {
c0cc4c83
UW
2675 /* Actually copy the argument contents to the stack slot
2676 that was reserved above. */
2677 write_memory (copy_addr[i], value_contents (arg), length);
2678
b0cf273e
JB
2679 if (gr <= 6)
2680 {
2681 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2682 copy_addr[i]);
2683 gr++;
2684 }
2685 else
2686 {
e17a4113
UW
2687 write_memory_unsigned_integer (starg, word_size, byte_order,
2688 copy_addr[i]);
b0cf273e
JB
2689 starg += word_size;
2690 }
2691 }
2692 else if (s390_function_arg_float (type))
2693 {
2694 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2695 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2696 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2697 {
2698 /* When we store a single-precision value in an FP register,
2699 it occupies the leftmost bits. */
2700 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2701 0, length, value_contents (arg));
b0cf273e
JB
2702 fr += 2;
2703 }
2704 else
2705 {
2706 /* When we store a single-precision value in a stack slot,
2707 it occupies the rightmost bits. */
2708 starg = align_up (starg + length, word_size);
0fd88904 2709 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2710 }
2711 }
2712 else if (s390_function_arg_integer (type) && length <= word_size)
2713 {
2714 if (gr <= 6)
2715 {
2716 /* Integer arguments are always extended to word size. */
2717 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2718 extend_simple_arg (gdbarch,
2719 arg));
b0cf273e
JB
2720 gr++;
2721 }
2722 else
2723 {
2724 /* Integer arguments are always extended to word size. */
e17a4113
UW
2725 write_memory_signed_integer (starg, word_size, byte_order,
2726 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2727 starg += word_size;
2728 }
2729 }
2730 else if (s390_function_arg_integer (type) && length == 2*word_size)
2731 {
2732 if (gr <= 5)
2733 {
2734 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2735 value_contents (arg));
b0cf273e 2736 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2737 value_contents (arg) + word_size);
b0cf273e
JB
2738 gr += 2;
2739 }
2740 else
2741 {
2742 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2743 in it, then don't go back and use it again later. */
2744 gr = 7;
2745
0fd88904 2746 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2747 starg += length;
2748 }
2749 }
2750 else
e2e0b3e5 2751 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2752 }
2753 }
2754
8de7d199
UW
2755 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2756 if (word_size == 4)
2757 {
2758 ULONGEST pswa;
2759 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2760 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2761 }
b0cf273e 2762 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2763
b0cf273e
JB
2764 /* Store updated stack pointer. */
2765 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2766
a8c99f38 2767 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2768 which is actually the top of the register save area. */
2769 return sp + 16*word_size + 32;
5769d3cd
AC
2770}
2771
f089c433 2772/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2773 dummy frame. The frame ID's base needs to match the TOS value
2774 returned by push_dummy_call, and the PC match the dummy frame's
2775 breakpoint. */
2776static struct frame_id
f089c433 2777s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2778{
a8c99f38 2779 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2780 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2781 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2782
121d8485 2783 return frame_id_build (sp + 16*word_size + 32,
f089c433 2784 get_frame_pc (this_frame));
b0cf273e 2785}
c8f9d51c 2786
4074e13c
JB
2787static CORE_ADDR
2788s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2789{
2790 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2791 always be aligned on an eight-byte boundary. */
2792 return (addr & -8);
2793}
2794
2795
b0cf273e
JB
2796/* Function return value access. */
2797
2798static enum return_value_convention
2799s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2800{
354ecfd5 2801 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2802 return RETURN_VALUE_STRUCT_CONVENTION;
2803
2804 switch (TYPE_CODE (type))
2805 {
2806 case TYPE_CODE_STRUCT:
2807 case TYPE_CODE_UNION:
2808 case TYPE_CODE_ARRAY:
56b9d9ac 2809 case TYPE_CODE_COMPLEX:
b0cf273e 2810 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2811
b0cf273e
JB
2812 default:
2813 return RETURN_VALUE_REGISTER_CONVENTION;
2814 }
c8f9d51c
JB
2815}
2816
b0cf273e 2817static enum return_value_convention
6a3a010b 2818s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2819 struct type *type, struct regcache *regcache,
2820 gdb_byte *out, const gdb_byte *in)
5769d3cd 2821{
e17a4113 2822 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2823 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2824 enum return_value_convention rvc;
2825 int length;
2826
2827 type = check_typedef (type);
2828 rvc = s390_return_value_convention (gdbarch, type);
2829 length = TYPE_LENGTH (type);
2830
b0cf273e
JB
2831 if (in)
2832 {
2833 switch (rvc)
2834 {
2835 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2836 if (TYPE_CODE (type) == TYPE_CODE_FLT
2837 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2838 {
2839 /* When we store a single-precision value in an FP register,
2840 it occupies the leftmost bits. */
2841 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2842 0, length, in);
2843 }
2844 else if (length <= word_size)
2845 {
2846 /* Integer arguments are always extended to word size. */
2847 if (TYPE_UNSIGNED (type))
2848 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2849 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2850 else
2851 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2852 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2853 }
2854 else if (length == 2*word_size)
2855 {
2856 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2857 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2858 }
2859 else
e2e0b3e5 2860 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2861 break;
2862
2863 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2864 error (_("Cannot set function return value."));
b0cf273e
JB
2865 break;
2866 }
2867 }
2868 else if (out)
2869 {
2870 switch (rvc)
2871 {
2872 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2873 if (TYPE_CODE (type) == TYPE_CODE_FLT
2874 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2875 {
2876 /* When we store a single-precision value in an FP register,
2877 it occupies the leftmost bits. */
2878 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2879 0, length, out);
2880 }
2881 else if (length <= word_size)
2882 {
2883 /* Integer arguments occupy the rightmost bits. */
2884 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2885 word_size - length, length, out);
2886 }
2887 else if (length == 2*word_size)
2888 {
2889 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2890 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2891 }
2892 else
e2e0b3e5 2893 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2894 break;
5769d3cd 2895
b0cf273e 2896 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2897 error (_("Function return value unknown."));
b0cf273e
JB
2898 break;
2899 }
2900 }
2901
2902 return rvc;
2903}
5769d3cd
AC
2904
2905
a8c99f38
JB
2906/* Breakpoints. */
2907
43af2100 2908static const gdb_byte *
c378eb4e
MS
2909s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2910 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2911{
43af2100 2912 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2913
2914 *lenptr = sizeof (breakpoint);
2915 return breakpoint;
2916}
2917
5769d3cd 2918
a8c99f38 2919/* Address handling. */
5769d3cd
AC
2920
2921static CORE_ADDR
24568a2c 2922s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2923{
a8c99f38 2924 return addr & 0x7fffffff;
5769d3cd
AC
2925}
2926
ffc65945
KB
2927static int
2928s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2929{
2930 if (byte_size == 4)
119ac181 2931 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2932 else
2933 return 0;
2934}
2935
2936static const char *
2937s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2938{
119ac181 2939 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2940 return "mode32";
2941 else
2942 return NULL;
2943}
2944
a78f21af 2945static int
c378eb4e
MS
2946s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2947 const char *name,
ffc65945
KB
2948 int *type_flags_ptr)
2949{
2950 if (strcmp (name, "mode32") == 0)
2951 {
119ac181 2952 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2953 return 1;
2954 }
2955 else
2956 return 0;
2957}
2958
55aa24fb
SDJ
2959/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2960 gdbarch.h. */
2961
2962static int
2963s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2964{
2965 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2966 or indirection. */
2967 || *s == '%' /* Register access. */
2968 || isdigit (*s)); /* Literal number. */
2969}
2970
a8c99f38
JB
2971/* Set up gdbarch struct. */
2972
a78f21af 2973static struct gdbarch *
5769d3cd
AC
2974s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2975{
7803799a
UW
2976 const struct target_desc *tdesc = info.target_desc;
2977 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2978 struct gdbarch *gdbarch;
2979 struct gdbarch_tdep *tdep;
7803799a
UW
2980 int tdep_abi;
2981 int have_upper = 0;
c642a434
UW
2982 int have_linux_v1 = 0;
2983 int have_linux_v2 = 0;
7803799a
UW
2984 int first_pseudo_reg, last_pseudo_reg;
2985
2986 /* Default ABI and register size. */
2987 switch (info.bfd_arch_info->mach)
2988 {
2989 case bfd_mach_s390_31:
2990 tdep_abi = ABI_LINUX_S390;
2991 break;
2992
2993 case bfd_mach_s390_64:
2994 tdep_abi = ABI_LINUX_ZSERIES;
2995 break;
2996
2997 default:
2998 return NULL;
2999 }
3000
3001 /* Use default target description if none provided by the target. */
3002 if (!tdesc_has_registers (tdesc))
3003 {
3004 if (tdep_abi == ABI_LINUX_S390)
3005 tdesc = tdesc_s390_linux32;
3006 else
3007 tdesc = tdesc_s390x_linux64;
3008 }
3009
3010 /* Check any target description for validity. */
3011 if (tdesc_has_registers (tdesc))
3012 {
3013 static const char *const gprs[] = {
3014 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3015 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3016 };
3017 static const char *const fprs[] = {
3018 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3019 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3020 };
3021 static const char *const acrs[] = {
3022 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3023 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3024 };
3025 static const char *const gprs_lower[] = {
3026 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3027 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3028 };
3029 static const char *const gprs_upper[] = {
3030 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3031 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3032 };
3033 const struct tdesc_feature *feature;
3034 int i, valid_p = 1;
3035
3036 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3037 if (feature == NULL)
3038 return NULL;
3039
3040 tdesc_data = tdesc_data_alloc ();
3041
3042 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3043 S390_PSWM_REGNUM, "pswm");
3044 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3045 S390_PSWA_REGNUM, "pswa");
3046
3047 if (tdesc_unnumbered_register (feature, "r0"))
3048 {
3049 for (i = 0; i < 16; i++)
3050 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3051 S390_R0_REGNUM + i, gprs[i]);
3052 }
3053 else
3054 {
3055 have_upper = 1;
3056
3057 for (i = 0; i < 16; i++)
3058 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3059 S390_R0_REGNUM + i,
3060 gprs_lower[i]);
3061 for (i = 0; i < 16; i++)
3062 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3063 S390_R0_UPPER_REGNUM + i,
3064 gprs_upper[i]);
3065 }
3066
3067 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3068 if (feature == NULL)
3069 {
3070 tdesc_data_cleanup (tdesc_data);
3071 return NULL;
3072 }
3073
3074 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3075 S390_FPC_REGNUM, "fpc");
3076 for (i = 0; i < 16; i++)
3077 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3078 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3079
7803799a
UW
3080 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3081 if (feature == NULL)
3082 {
3083 tdesc_data_cleanup (tdesc_data);
3084 return NULL;
3085 }
3086
3087 for (i = 0; i < 16; i++)
3088 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3089 S390_A0_REGNUM + i, acrs[i]);
3090
94eae614 3091 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3092 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3093 if (feature)
3094 {
3095 tdesc_numbered_register (feature, tdesc_data,
3096 S390_ORIG_R2_REGNUM, "orig_r2");
3097
3098 if (tdesc_numbered_register (feature, tdesc_data,
3099 S390_LAST_BREAK_REGNUM, "last_break"))
3100 have_linux_v1 = 1;
3101
3102 if (tdesc_numbered_register (feature, tdesc_data,
3103 S390_SYSTEM_CALL_REGNUM, "system_call"))
3104 have_linux_v2 = 1;
3105
3106 if (have_linux_v2 > have_linux_v1)
3107 valid_p = 0;
3108 }
3109
7803799a
UW
3110 if (!valid_p)
3111 {
3112 tdesc_data_cleanup (tdesc_data);
3113 return NULL;
3114 }
3115 }
5769d3cd 3116
7803799a
UW
3117 /* Find a candidate among extant architectures. */
3118 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3119 arches != NULL;
3120 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3121 {
3122 tdep = gdbarch_tdep (arches->gdbarch);
3123 if (!tdep)
3124 continue;
3125 if (tdep->abi != tdep_abi)
3126 continue;
3127 if ((tdep->gpr_full_regnum != -1) != have_upper)
3128 continue;
3129 if (tdesc_data != NULL)
3130 tdesc_data_cleanup (tdesc_data);
3131 return arches->gdbarch;
3132 }
5769d3cd 3133
7803799a 3134 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 3135 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 3136 tdep->abi = tdep_abi;
d0f54f9d 3137 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3138
3139 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3140 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3141
1de90795
UW
3142 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3143 We can safely let them default to 128-bit, since the debug info
3144 will give the size of type actually used in each case. */
3145 set_gdbarch_long_double_bit (gdbarch, 128);
3146 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3147
aaab4dba 3148 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3149 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3150 always. */
5769d3cd 3151 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3152 /* Stack grows downward. */
3153 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3154 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3155 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3156 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3157
7803799a 3158 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3159 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3160 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3161 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3162 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3163 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
3164 set_gdbarch_regset_from_core_section (gdbarch,
3165 s390_regset_from_core_section);
7803799a 3166 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3167 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3168 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3169 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3170 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3171 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3172 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3173 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3174 s390_pseudo_register_reggroup_p);
3175 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3176
3177 /* Assign pseudo register numbers. */
3178 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3179 last_pseudo_reg = first_pseudo_reg;
3180 tdep->gpr_full_regnum = -1;
3181 if (have_upper)
3182 {
3183 tdep->gpr_full_regnum = last_pseudo_reg;
3184 last_pseudo_reg += 16;
3185 }
3186 tdep->pc_regnum = last_pseudo_reg++;
3187 tdep->cc_regnum = last_pseudo_reg++;
3188 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3189 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3190
b0cf273e
JB
3191 /* Inferior function calls. */
3192 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3193 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3194 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3195 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3196
a8c99f38 3197 /* Frame handling. */
a431654a 3198 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3199 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3200 dwarf2_append_unwinders (gdbarch);
a431654a 3201 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3202 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3203 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3204 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3205 frame_base_set_default (gdbarch, &s390_frame_base);
3206 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3207 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3208
1db4e8a0
UW
3209 /* Displaced stepping. */
3210 set_gdbarch_displaced_step_copy_insn (gdbarch,
3211 simple_displaced_step_copy_insn);
3212 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3213 set_gdbarch_displaced_step_free_closure (gdbarch,
3214 simple_displaced_step_free_closure);
3215 set_gdbarch_displaced_step_location (gdbarch,
3216 displaced_step_at_entry_point);
3217 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3218
70728992
PA
3219 /* Note that GNU/Linux is the only OS supported on this
3220 platform. */
3221 linux_init_abi (info, gdbarch);
3222
7803799a 3223 switch (tdep->abi)
5769d3cd 3224 {
7803799a 3225 case ABI_LINUX_S390:
d0f54f9d
JB
3226 tdep->gregset = &s390_gregset;
3227 tdep->sizeof_gregset = s390_sizeof_gregset;
3228 tdep->fpregset = &s390_fpregset;
3229 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3230
3231 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3232 set_solib_svr4_fetch_link_map_offsets
3233 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434
UW
3234
3235 if (have_upper)
3236 {
3237 if (have_linux_v2)
3238 set_gdbarch_core_regset_sections (gdbarch,
3239 s390_linux64v2_regset_sections);
3240 else if (have_linux_v1)
3241 set_gdbarch_core_regset_sections (gdbarch,
3242 s390_linux64v1_regset_sections);
3243 else
3244 set_gdbarch_core_regset_sections (gdbarch,
3245 s390_linux64_regset_sections);
3246 }
3247 else
3248 {
3249 if (have_linux_v2)
3250 set_gdbarch_core_regset_sections (gdbarch,
3251 s390_linux32v2_regset_sections);
3252 else if (have_linux_v1)
3253 set_gdbarch_core_regset_sections (gdbarch,
3254 s390_linux32v1_regset_sections);
3255 else
3256 set_gdbarch_core_regset_sections (gdbarch,
3257 s390_linux32_regset_sections);
3258 }
5769d3cd 3259 break;
b0cf273e 3260
7803799a 3261 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3262 tdep->gregset = &s390x_gregset;
3263 tdep->sizeof_gregset = s390x_sizeof_gregset;
3264 tdep->fpregset = &s390_fpregset;
3265 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3266
3267 set_gdbarch_long_bit (gdbarch, 64);
3268 set_gdbarch_long_long_bit (gdbarch, 64);
3269 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3270 set_solib_svr4_fetch_link_map_offsets
3271 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
3272 set_gdbarch_address_class_type_flags (gdbarch,
3273 s390_address_class_type_flags);
3274 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3275 s390_address_class_type_flags_to_name);
3276 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3277 s390_address_class_name_to_type_flags);
c642a434
UW
3278
3279 if (have_linux_v2)
3280 set_gdbarch_core_regset_sections (gdbarch,
3281 s390x_linux64v2_regset_sections);
3282 else if (have_linux_v1)
3283 set_gdbarch_core_regset_sections (gdbarch,
3284 s390x_linux64v1_regset_sections);
3285 else
3286 set_gdbarch_core_regset_sections (gdbarch,
3287 s390x_linux64_regset_sections);
5769d3cd
AC
3288 break;
3289 }
3290
36482093
AC
3291 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3292
982e9687
UW
3293 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3294
b2756930
KB
3295 /* Enable TLS support. */
3296 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3297 svr4_fetch_objfile_link_map);
3298
1dd635ac
UW
3299 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3300
55aa24fb
SDJ
3301 /* SystemTap functions. */
3302 set_gdbarch_stap_register_prefix (gdbarch, "%");
3303 set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
3304 set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
3305 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3306
5769d3cd
AC
3307 return gdbarch;
3308}
3309
3310
a78f21af
AC
3311extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3312
5769d3cd 3313void
5ae5f592 3314_initialize_s390_tdep (void)
5769d3cd 3315{
5769d3cd
AC
3316 /* Hook us into the gdbarch mechanism. */
3317 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3318
94eae614 3319 /* Initialize the GNU/Linux target descriptions. */
7803799a 3320 initialize_tdesc_s390_linux32 ();
c642a434
UW
3321 initialize_tdesc_s390_linux32v1 ();
3322 initialize_tdesc_s390_linux32v2 ();
7803799a 3323 initialize_tdesc_s390_linux64 ();
c642a434
UW
3324 initialize_tdesc_s390_linux64v1 ();
3325 initialize_tdesc_s390_linux64v2 ();
7803799a 3326 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3327 initialize_tdesc_s390x_linux64v1 ();
3328 initialize_tdesc_s390x_linux64v2 ();
5769d3cd 3329}
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