Remove regcache_invalidate
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
d6e58945
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1/* Target-dependent code for s390.
2
3 Copyright (C) 2001-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21
22#include "arch-utils.h"
23#include "ax-gdb.h"
24#include "dwarf2-frame.h"
25#include "elf/s390.h"
26#include "elf-bfd.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbarch.h"
30#include "gdbcore.h"
31#include "infrun.h"
32#include "linux-tdep.h"
33#include "objfiles.h"
34#include "osabi.h"
35#include "record-full.h"
36#include "regcache.h"
37#include "reggroups.h"
38#include "s390-tdep.h"
39#include "target-descriptions.h"
40#include "trad-frame.h"
41#include "value.h"
42
c81e8879
PR
43#include "features/s390-linux32.c"
44#include "features/s390x-linux64.c"
45
d6e58945
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46/* Holds the current set of options to be passed to the disassembler. */
47static char *s390_disassembler_options;
48
49/* Breakpoints. */
50
51constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
55/* Decoding S/390 instructions. */
56
57/* Read a single instruction from address AT. */
58
59static int
60s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
61{
62 static int s390_instrlen[] = { 2, 4, 4, 6 };
63 int instrlen;
64
65 if (target_read_memory (at, &instr[0], 2))
66 return -1;
67 instrlen = s390_instrlen[instr[0] >> 6];
68 if (instrlen > 2)
69 {
70 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
71 return -1;
72 }
73 return instrlen;
74}
75
76/* The functions below are for recognizing and decoding S/390
77 instructions of various formats. Each of them checks whether INSN
78 is an instruction of the given format, with the specified opcodes.
79 If it is, it sets the remaining arguments to the values of the
80 instruction's fields, and returns a non-zero value; otherwise, it
81 returns zero.
82
83 These functions' arguments appear in the order they appear in the
84 instruction, not in the machine-language form. So, opcodes always
85 come first, even though they're sometimes scattered around the
86 instructions. And displacements appear before base and extension
87 registers, as they do in the assembly syntax, not at the end, as
88 they do in the machine language.
89
90 Test for RI instruction format. */
91
92static int
93is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
94{
95 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
96 {
97 *r1 = (insn[1] >> 4) & 0xf;
98 /* i2 is a 16-bit signed quantity. */
99 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
100 return 1;
101 }
102 else
103 return 0;
104}
105
106/* Test for RIL instruction format. See comment on is_ri for details. */
107
108static int
109is_ril (bfd_byte *insn, int op1, int op2,
110 unsigned int *r1, int *i2)
111{
112 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
113 {
114 *r1 = (insn[1] >> 4) & 0xf;
115 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
116 no sign extension is necessary, but we don't want to assume
117 that. */
118 *i2 = (((insn[2] << 24)
119 | (insn[3] << 16)
120 | (insn[4] << 8)
121 | (insn[5])) ^ 0x80000000) - 0x80000000;
122 return 1;
123 }
124 else
125 return 0;
126}
127
128/* Test for RR instruction format. See comment on is_ri for details. */
129
130static int
131is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
132{
133 if (insn[0] == op)
134 {
135 *r1 = (insn[1] >> 4) & 0xf;
136 *r2 = insn[1] & 0xf;
137 return 1;
138 }
139 else
140 return 0;
141}
142
143/* Test for RRE instruction format. See comment on is_ri for details. */
144
145static int
146is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
147{
148 if (((insn[0] << 8) | insn[1]) == op)
149 {
150 /* Yes, insn[3]. insn[2] is unused in RRE format. */
151 *r1 = (insn[3] >> 4) & 0xf;
152 *r2 = insn[3] & 0xf;
153 return 1;
154 }
155 else
156 return 0;
157}
158
159/* Test for RS instruction format. See comment on is_ri for details. */
160
161static int
162is_rs (bfd_byte *insn, int op,
163 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
164{
165 if (insn[0] == op)
166 {
167 *r1 = (insn[1] >> 4) & 0xf;
168 *r3 = insn[1] & 0xf;
169 *b2 = (insn[2] >> 4) & 0xf;
170 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
171 return 1;
172 }
173 else
174 return 0;
175}
176
177/* Test for RSY instruction format. See comment on is_ri for details. */
178
179static int
180is_rsy (bfd_byte *insn, int op1, int op2,
181 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
182{
183 if (insn[0] == op1
184 && insn[5] == op2)
185 {
186 *r1 = (insn[1] >> 4) & 0xf;
187 *r3 = insn[1] & 0xf;
188 *b2 = (insn[2] >> 4) & 0xf;
189 /* The 'long displacement' is a 20-bit signed integer. */
190 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
191 ^ 0x80000) - 0x80000;
192 return 1;
193 }
194 else
195 return 0;
196}
197
198/* Test for RX instruction format. See comment on is_ri for details. */
199
200static int
201is_rx (bfd_byte *insn, int op,
202 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
203{
204 if (insn[0] == op)
205 {
206 *r1 = (insn[1] >> 4) & 0xf;
207 *x2 = insn[1] & 0xf;
208 *b2 = (insn[2] >> 4) & 0xf;
209 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
210 return 1;
211 }
212 else
213 return 0;
214}
215
216/* Test for RXY instruction format. See comment on is_ri for details. */
217
218static int
219is_rxy (bfd_byte *insn, int op1, int op2,
220 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
221{
222 if (insn[0] == op1
223 && insn[5] == op2)
224 {
225 *r1 = (insn[1] >> 4) & 0xf;
226 *x2 = insn[1] & 0xf;
227 *b2 = (insn[2] >> 4) & 0xf;
228 /* The 'long displacement' is a 20-bit signed integer. */
229 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
230 ^ 0x80000) - 0x80000;
231 return 1;
232 }
233 else
234 return 0;
235}
236
237/* A helper for s390_software_single_step, decides if an instruction
238 is a partial-execution instruction that needs to be executed until
239 completion when in record mode. If it is, returns 1 and writes
240 instruction length to a pointer. */
241
242static int
243s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
244{
245 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
246 uint16_t insn;
247
248 insn = read_memory_integer (loc, 2, byte_order);
249
250 switch (insn >> 8)
251 {
252 case 0xa8: /* MVCLE */
253 *len = 4;
254 return 1;
255
256 case 0xeb:
257 {
258 insn = read_memory_integer (loc + 4, 2, byte_order);
259 if ((insn & 0xff) == 0x8e)
260 {
261 /* MVCLU */
262 *len = 6;
263 return 1;
264 }
265 }
266 break;
267 }
268
269 switch (insn)
270 {
271 case 0xb255: /* MVST */
272 case 0xb263: /* CMPSC */
273 case 0xb2a5: /* TRE */
274 case 0xb2a6: /* CU21 */
275 case 0xb2a7: /* CU12 */
276 case 0xb9b0: /* CU14 */
277 case 0xb9b1: /* CU24 */
278 case 0xb9b2: /* CU41 */
279 case 0xb9b3: /* CU42 */
280 case 0xb92a: /* KMF */
281 case 0xb92b: /* KMO */
282 case 0xb92f: /* KMC */
283 case 0xb92d: /* KMCTR */
284 case 0xb92e: /* KM */
285 case 0xb93c: /* PPNO */
286 case 0xb990: /* TRTT */
287 case 0xb991: /* TRTO */
288 case 0xb992: /* TROT */
289 case 0xb993: /* TROO */
290 *len = 4;
291 return 1;
292 }
293
294 return 0;
295}
296
297/* Implement the "software_single_step" gdbarch method, needed to single step
298 through instructions like MVCLE in record mode, to make sure they are
299 executed to completion. Without that, record will save the full length
300 of destination buffer on every iteration, even though the CPU will only
301 process about 4kiB of it each time, leading to O(n**2) memory and time
302 complexity. */
303
304static std::vector<CORE_ADDR>
305s390_software_single_step (struct regcache *regcache)
306{
307 struct gdbarch *gdbarch = regcache->arch ();
308 CORE_ADDR loc = regcache_read_pc (regcache);
309 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
310 int len;
311 uint16_t insn;
312
313 /* Special handling only if recording. */
314 if (!record_full_is_used ())
315 return {};
316
317 /* First, match a partial instruction. */
318 if (!s390_is_partial_instruction (gdbarch, loc, &len))
319 return {};
320
321 loc += len;
322
323 /* Second, look for a branch back to it. */
324 insn = read_memory_integer (loc, 2, byte_order);
325 if (insn != 0xa714) /* BRC with mask 1 */
326 return {};
327
328 insn = read_memory_integer (loc + 2, 2, byte_order);
329 if (insn != (uint16_t) -(len / 2))
330 return {};
331
332 loc += 4;
333
334 /* Found it, step past the whole thing. */
335 return {loc};
336}
337
338/* Displaced stepping. */
339
340/* Return true if INSN is a non-branch RIL-b or RIL-c format
341 instruction. */
342
343static int
344is_non_branch_ril (gdb_byte *insn)
345{
346 gdb_byte op1 = insn[0];
347
348 if (op1 == 0xc4)
349 {
350 gdb_byte op2 = insn[1] & 0x0f;
351
352 switch (op2)
353 {
354 case 0x02: /* llhrl */
355 case 0x04: /* lghrl */
356 case 0x05: /* lhrl */
357 case 0x06: /* llghrl */
358 case 0x07: /* sthrl */
359 case 0x08: /* lgrl */
360 case 0x0b: /* stgrl */
361 case 0x0c: /* lgfrl */
362 case 0x0d: /* lrl */
363 case 0x0e: /* llgfrl */
364 case 0x0f: /* strl */
365 return 1;
366 }
367 }
368 else if (op1 == 0xc6)
369 {
370 gdb_byte op2 = insn[1] & 0x0f;
371
372 switch (op2)
373 {
374 case 0x00: /* exrl */
375 case 0x02: /* pfdrl */
376 case 0x04: /* cghrl */
377 case 0x05: /* chrl */
378 case 0x06: /* clghrl */
379 case 0x07: /* clhrl */
380 case 0x08: /* cgrl */
381 case 0x0a: /* clgrl */
382 case 0x0c: /* cgfrl */
383 case 0x0d: /* crl */
384 case 0x0e: /* clgfrl */
385 case 0x0f: /* clrl */
386 return 1;
387 }
388 }
389
390 return 0;
391}
392
393typedef buf_displaced_step_closure s390_displaced_step_closure;
394
395/* Implementation of gdbarch_displaced_step_copy_insn. */
396
397static struct displaced_step_closure *
398s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
399 CORE_ADDR from, CORE_ADDR to,
400 struct regcache *regs)
401{
402 size_t len = gdbarch_max_insn_length (gdbarch);
403 std::unique_ptr<s390_displaced_step_closure> closure
404 (new s390_displaced_step_closure (len));
405 gdb_byte *buf = closure->buf.data ();
406
407 read_memory (from, buf, len);
408
409 /* Adjust the displacement field of PC-relative RIL instructions,
410 except branches. The latter are handled in the fixup hook. */
411 if (is_non_branch_ril (buf))
412 {
413 LONGEST offset;
414
415 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
416 offset = (from - to + offset * 2) / 2;
417
418 /* If the instruction is too far from the jump pad, punt. This
419 will usually happen with instructions in shared libraries.
420 We could probably support these by rewriting them to be
421 absolute or fully emulating them. */
422 if (offset < INT32_MIN || offset > INT32_MAX)
423 {
424 /* Let the core fall back to stepping over the breakpoint
425 in-line. */
426 if (debug_displaced)
427 {
428 fprintf_unfiltered (gdb_stdlog,
429 "displaced: can't displaced step "
430 "RIL instruction: offset %s out of range\n",
431 plongest (offset));
432 }
433
434 return NULL;
435 }
436
437 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
438 }
439
440 write_memory (to, buf, len);
441
442 if (debug_displaced)
443 {
444 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
445 paddress (gdbarch, from), paddress (gdbarch, to));
446 displaced_step_dump_bytes (gdb_stdlog, buf, len);
447 }
448
449 return closure.release ();
450}
451
452/* Fix up the state of registers and memory after having single-stepped
453 a displaced instruction. */
454
455static void
456s390_displaced_step_fixup (struct gdbarch *gdbarch,
457 struct displaced_step_closure *closure_,
458 CORE_ADDR from, CORE_ADDR to,
459 struct regcache *regs)
460{
461 /* Our closure is a copy of the instruction. */
462 s390_displaced_step_closure *closure
463 = (s390_displaced_step_closure *) closure_;
464 gdb_byte *insn = closure->buf.data ();
465 static int s390_instrlen[] = { 2, 4, 4, 6 };
466 int insnlen = s390_instrlen[insn[0] >> 6];
467
468 /* Fields for various kinds of instructions. */
469 unsigned int b2, r1, r2, x2, r3;
470 int i2, d2;
471
472 /* Get current PC and addressing mode bit. */
473 CORE_ADDR pc = regcache_read_pc (regs);
474 ULONGEST amode = 0;
475
476 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
477 {
478 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
479 amode &= 0x80000000;
480 }
481
482 if (debug_displaced)
483 fprintf_unfiltered (gdb_stdlog,
484 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
485 paddress (gdbarch, from), paddress (gdbarch, to),
486 paddress (gdbarch, pc), insnlen, (int) amode);
487
488 /* Handle absolute branch and save instructions. */
489 if (is_rr (insn, op_basr, &r1, &r2)
490 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
491 {
492 /* Recompute saved return address in R1. */
493 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
494 amode | (from + insnlen));
495 }
496
497 /* Handle absolute branch instructions. */
498 else if (is_rr (insn, op_bcr, &r1, &r2)
499 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
500 || is_rr (insn, op_bctr, &r1, &r2)
501 || is_rre (insn, op_bctgr, &r1, &r2)
502 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
503 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
504 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
505 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
506 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
507 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
508 {
509 /* Update PC iff branch was *not* taken. */
510 if (pc == to + insnlen)
511 regcache_write_pc (regs, from + insnlen);
512 }
513
514 /* Handle PC-relative branch and save instructions. */
515 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
516 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
517 {
518 /* Update PC. */
519 regcache_write_pc (regs, pc - to + from);
520 /* Recompute saved return address in R1. */
521 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
522 amode | (from + insnlen));
523 }
524
525 /* Handle LOAD ADDRESS RELATIVE LONG. */
526 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
527 {
528 /* Update PC. */
529 regcache_write_pc (regs, from + insnlen);
530 /* Recompute output address in R1. */
531 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
532 amode | (from + i2 * 2));
533 }
534
535 /* If we executed a breakpoint instruction, point PC right back at it. */
536 else if (insn[0] == 0x0 && insn[1] == 0x1)
537 regcache_write_pc (regs, from);
538
539 /* For any other insn, adjust PC by negated displacement. PC then
540 points right after the original instruction, except for PC-relative
541 branches, where it points to the adjusted branch target. */
542 else
543 regcache_write_pc (regs, pc - to + from);
544
545 if (debug_displaced)
546 fprintf_unfiltered (gdb_stdlog,
547 "displaced: (s390) pc is now %s\n",
548 paddress (gdbarch, regcache_read_pc (regs)));
549}
550
551/* Implement displaced_step_hw_singlestep gdbarch method. */
552
553static int
554s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
555 struct displaced_step_closure *closure)
556{
557 return 1;
558}
559
560/* Prologue analysis. */
561
562struct s390_prologue_data {
563
564 /* The stack. */
565 struct pv_area *stack;
566
567 /* The size and byte-order of a GPR or FPR. */
568 int gpr_size;
569 int fpr_size;
570 enum bfd_endian byte_order;
571
572 /* The general-purpose registers. */
573 pv_t gpr[S390_NUM_GPRS];
574
575 /* The floating-point registers. */
576 pv_t fpr[S390_NUM_FPRS];
577
578 /* The offset relative to the CFA where the incoming GPR N was saved
579 by the function prologue. 0 if not saved or unknown. */
580 int gpr_slot[S390_NUM_GPRS];
581
582 /* Likewise for FPRs. */
583 int fpr_slot[S390_NUM_FPRS];
584
585 /* Nonzero if the backchain was saved. This is assumed to be the
586 case when the incoming SP is saved at the current SP location. */
587 int back_chain_saved_p;
588};
589
590/* Return the effective address for an X-style instruction, like:
591
592 L R1, D2(X2, B2)
593
594 Here, X2 and B2 are registers, and D2 is a signed 20-bit
595 constant; the effective address is the sum of all three. If either
596 X2 or B2 are zero, then it doesn't contribute to the sum --- this
597 means that r0 can't be used as either X2 or B2. */
598
599static pv_t
600s390_addr (struct s390_prologue_data *data,
601 int d2, unsigned int x2, unsigned int b2)
602{
603 pv_t result;
604
605 result = pv_constant (d2);
606 if (x2)
607 result = pv_add (result, data->gpr[x2]);
608 if (b2)
609 result = pv_add (result, data->gpr[b2]);
610
611 return result;
612}
613
614/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
615
616static void
617s390_store (struct s390_prologue_data *data,
618 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
619 pv_t value)
620{
621 pv_t addr = s390_addr (data, d2, x2, b2);
622 pv_t offset;
623
624 /* Check whether we are storing the backchain. */
625 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
626
627 if (pv_is_constant (offset) && offset.k == 0)
628 if (size == data->gpr_size
629 && pv_is_register_k (value, S390_SP_REGNUM, 0))
630 {
631 data->back_chain_saved_p = 1;
632 return;
633 }
634
635 /* Check whether we are storing a register into the stack. */
636 if (!data->stack->store_would_trash (addr))
637 data->stack->store (addr, size, value);
638
639 /* Note: If this is some store we cannot identify, you might think we
640 should forget our cached values, as any of those might have been hit.
641
642 However, we make the assumption that the register save areas are only
643 ever stored to once in any given function, and we do recognize these
644 stores. Thus every store we cannot recognize does not hit our data. */
645}
646
647/* Do a SIZE-byte load from D2(X2,B2). */
648
649static pv_t
650s390_load (struct s390_prologue_data *data,
651 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
652
653{
654 pv_t addr = s390_addr (data, d2, x2, b2);
655
656 /* If it's a load from an in-line constant pool, then we can
657 simulate that, under the assumption that the code isn't
658 going to change between the time the processor actually
659 executed it creating the current frame, and the time when
660 we're analyzing the code to unwind past that frame. */
661 if (pv_is_constant (addr))
662 {
663 struct target_section *secp;
f6ac5f3d 664 secp = target_section_by_addr (target_stack, addr.k);
d6e58945
PR
665 if (secp != NULL
666 && (bfd_get_section_flags (secp->the_bfd_section->owner,
667 secp->the_bfd_section)
668 & SEC_READONLY))
669 return pv_constant (read_memory_integer (addr.k, size,
670 data->byte_order));
671 }
672
673 /* Check whether we are accessing one of our save slots. */
674 return data->stack->fetch (addr, size);
675}
676
677/* Function for finding saved registers in a 'struct pv_area'; we pass
678 this to pv_area::scan.
679
680 If VALUE is a saved register, ADDR says it was saved at a constant
681 offset from the frame base, and SIZE indicates that the whole
682 register was saved, record its offset in the reg_offset table in
683 PROLOGUE_UNTYPED. */
684
685static void
686s390_check_for_saved (void *data_untyped, pv_t addr,
687 CORE_ADDR size, pv_t value)
688{
689 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
690 int i, offset;
691
692 if (!pv_is_register (addr, S390_SP_REGNUM))
693 return;
694
695 offset = 16 * data->gpr_size + 32 - addr.k;
696
697 /* If we are storing the original value of a register, we want to
698 record the CFA offset. If the same register is stored multiple
699 times, the stack slot with the highest address counts. */
700
701 for (i = 0; i < S390_NUM_GPRS; i++)
702 if (size == data->gpr_size
703 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
704 if (data->gpr_slot[i] == 0
705 || data->gpr_slot[i] > offset)
706 {
707 data->gpr_slot[i] = offset;
708 return;
709 }
710
711 for (i = 0; i < S390_NUM_FPRS; i++)
712 if (size == data->fpr_size
713 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
714 if (data->fpr_slot[i] == 0
715 || data->fpr_slot[i] > offset)
716 {
717 data->fpr_slot[i] = offset;
718 return;
719 }
720}
721
722/* Analyze the prologue of the function starting at START_PC, continuing at
723 most until CURRENT_PC. Initialize DATA to hold all information we find
724 out about the state of the registers and stack slots. Return the address
725 of the instruction after the last one that changed the SP, FP, or back
726 chain; or zero on error. */
727
728static CORE_ADDR
729s390_analyze_prologue (struct gdbarch *gdbarch,
730 CORE_ADDR start_pc,
731 CORE_ADDR current_pc,
732 struct s390_prologue_data *data)
733{
734 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
735
736 /* Our return value:
737 The address of the instruction after the last one that changed
738 the SP, FP, or back chain; zero if we got an error trying to
739 read memory. */
740 CORE_ADDR result = start_pc;
741
742 /* The current PC for our abstract interpretation. */
743 CORE_ADDR pc;
744
745 /* The address of the next instruction after that. */
746 CORE_ADDR next_pc;
747
748 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
749 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
750
751 /* Set up everything's initial value. */
752 {
753 int i;
754
755 /* For the purpose of prologue tracking, we consider the GPR size to
756 be equal to the ABI word size, even if it is actually larger
757 (i.e. when running a 32-bit binary under a 64-bit kernel). */
758 data->gpr_size = word_size;
759 data->fpr_size = 8;
760 data->byte_order = gdbarch_byte_order (gdbarch);
761
762 for (i = 0; i < S390_NUM_GPRS; i++)
763 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
764
765 for (i = 0; i < S390_NUM_FPRS; i++)
766 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
767
768 for (i = 0; i < S390_NUM_GPRS; i++)
769 data->gpr_slot[i] = 0;
770
771 for (i = 0; i < S390_NUM_FPRS; i++)
772 data->fpr_slot[i] = 0;
773
774 data->back_chain_saved_p = 0;
775 }
776
777 /* Start interpreting instructions, until we hit the frame's
778 current PC or the first branch instruction. */
779 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
780 {
781 bfd_byte insn[S390_MAX_INSTR_SIZE];
782 int insn_len = s390_readinstruction (insn, pc);
783
784 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
785 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
786 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
787
788 /* Fields for various kinds of instructions. */
789 unsigned int b2, r1, r2, x2, r3;
790 int i2, d2;
791
792 /* The values of SP and FP before this instruction,
793 for detecting instructions that change them. */
794 pv_t pre_insn_sp, pre_insn_fp;
795 /* Likewise for the flag whether the back chain was saved. */
796 int pre_insn_back_chain_saved_p;
797
798 /* If we got an error trying to read the instruction, report it. */
799 if (insn_len < 0)
800 {
801 result = 0;
802 break;
803 }
804
805 next_pc = pc + insn_len;
806
807 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
808 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
809 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
810
811 /* LHI r1, i2 --- load halfword immediate. */
812 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
813 /* LGFI r1, i2 --- load fullword immediate. */
814 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
815 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
816 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
817 data->gpr[r1] = pv_constant (i2);
818
819 /* LR r1, r2 --- load from register. */
820 /* LGR r1, r2 --- load from register (64-bit version). */
821 else if (is_rr (insn32, op_lr, &r1, &r2)
822 || is_rre (insn64, op_lgr, &r1, &r2))
823 data->gpr[r1] = data->gpr[r2];
824
825 /* L r1, d2(x2, b2) --- load. */
826 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
827 /* LG r1, d2(x2, b2) --- load (64-bit version). */
828 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
829 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
830 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
831 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
832
833 /* ST r1, d2(x2, b2) --- store. */
834 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
835 /* STG r1, d2(x2, b2) --- store (64-bit version). */
836 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
837 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
838 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
839 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
840
841 /* STD r1, d2(x2,b2) --- store floating-point register. */
842 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
843 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
844
845 /* STM r1, r3, d2(b2) --- store multiple. */
846 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
847 version). */
848 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
849 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
850 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
851 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
852 {
853 for (; r1 <= r3; r1++, d2 += data->gpr_size)
854 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
855 }
856
857 /* AHI r1, i2 --- add halfword immediate. */
858 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
859 /* AFI r1, i2 --- add fullword immediate. */
860 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
861 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
862 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
863 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
864 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
865 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
866
867 /* ALFI r1, i2 --- add logical immediate. */
868 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
869 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
870 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
871 data->gpr[r1] = pv_add_constant (data->gpr[r1],
872 (CORE_ADDR)i2 & 0xffffffff);
873
874 /* AR r1, r2 -- add register. */
875 /* AGR r1, r2 -- add register (64-bit version). */
876 else if (is_rr (insn32, op_ar, &r1, &r2)
877 || is_rre (insn64, op_agr, &r1, &r2))
878 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
879
880 /* A r1, d2(x2, b2) -- add. */
881 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
882 /* AG r1, d2(x2, b2) -- add (64-bit version). */
883 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
884 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
885 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
886 data->gpr[r1] = pv_add (data->gpr[r1],
887 s390_load (data, d2, x2, b2, data->gpr_size));
888
889 /* SLFI r1, i2 --- subtract logical immediate. */
890 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
891 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
892 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
893 data->gpr[r1] = pv_add_constant (data->gpr[r1],
894 -((CORE_ADDR)i2 & 0xffffffff));
895
896 /* SR r1, r2 -- subtract register. */
897 /* SGR r1, r2 -- subtract register (64-bit version). */
898 else if (is_rr (insn32, op_sr, &r1, &r2)
899 || is_rre (insn64, op_sgr, &r1, &r2))
900 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
901
902 /* S r1, d2(x2, b2) -- subtract. */
903 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
904 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
905 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
906 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
907 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
908 data->gpr[r1] = pv_subtract (data->gpr[r1],
909 s390_load (data, d2, x2, b2, data->gpr_size));
910
911 /* LA r1, d2(x2, b2) --- load address. */
912 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
913 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
914 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
915 data->gpr[r1] = s390_addr (data, d2, x2, b2);
916
917 /* LARL r1, i2 --- load address relative long. */
918 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
919 data->gpr[r1] = pv_constant (pc + i2 * 2);
920
921 /* BASR r1, 0 --- branch and save.
922 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
923 else if (is_rr (insn, op_basr, &r1, &r2)
924 && r2 == 0)
925 data->gpr[r1] = pv_constant (next_pc);
926
927 /* BRAS r1, i2 --- branch relative and save. */
928 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
929 {
930 data->gpr[r1] = pv_constant (next_pc);
931 next_pc = pc + i2 * 2;
932
933 /* We'd better not interpret any backward branches. We'll
934 never terminate. */
935 if (next_pc <= pc)
936 break;
937 }
938
939 /* BRC/BRCL -- branch relative on condition. Ignore "branch
940 never", branch to following instruction, and "conditional
941 trap" (BRC +2). Otherwise terminate search. */
942 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
943 {
944 if (r1 != 0 && i2 != 1 && i2 != 2)
945 break;
946 }
947 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
948 {
949 if (r1 != 0 && i2 != 3)
950 break;
951 }
952
953 /* Terminate search when hitting any other branch instruction. */
954 else if (is_rr (insn, op_basr, &r1, &r2)
955 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
956 || is_rr (insn, op_bcr, &r1, &r2)
957 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
958 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
959 break;
960
961 else
962 {
963 /* An instruction we don't know how to simulate. The only
964 safe thing to do would be to set every value we're tracking
965 to 'unknown'. Instead, we'll be optimistic: we assume that
966 we *can* interpret every instruction that the compiler uses
967 to manipulate any of the data we're interested in here --
968 then we can just ignore anything else. */
969 }
970
971 /* Record the address after the last instruction that changed
972 the FP, SP, or backlink. Ignore instructions that changed
973 them back to their original values --- those are probably
974 restore instructions. (The back chain is never restored,
975 just popped.) */
976 {
977 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
978 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
979
980 if ((! pv_is_identical (pre_insn_sp, sp)
981 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
982 && sp.kind != pvk_unknown)
983 || (! pv_is_identical (pre_insn_fp, fp)
984 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
985 && fp.kind != pvk_unknown)
986 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
987 result = next_pc;
988 }
989 }
990
991 /* Record where all the registers were saved. */
992 data->stack->scan (s390_check_for_saved, data);
993
994 return result;
995}
996
997/* Advance PC across any function entry prologue instructions to reach
998 some "real" code. */
999
1000static CORE_ADDR
1001s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1002{
1003 struct s390_prologue_data data;
1004 CORE_ADDR skip_pc, func_addr;
1005
1006 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1007 {
1008 CORE_ADDR post_prologue_pc
1009 = skip_prologue_using_sal (gdbarch, func_addr);
1010 if (post_prologue_pc != 0)
1011 return std::max (pc, post_prologue_pc);
1012 }
1013
1014 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1015 return skip_pc ? skip_pc : pc;
1016}
1017
1018/* Register handling. */
1019
1020/* ABI call-saved register information. */
1021
1022static int
1023s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1024{
1025 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1026
1027 switch (tdep->abi)
1028 {
1029 case ABI_LINUX_S390:
1030 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1031 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1032 || regnum == S390_A0_REGNUM)
1033 return 1;
1034
1035 break;
1036
1037 case ABI_LINUX_ZSERIES:
1038 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1039 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1040 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1041 return 1;
1042
1043 break;
1044 }
1045
1046 return 0;
1047}
1048
1049/* The "guess_tracepoint_registers" gdbarch method. */
1050
1051static void
1052s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1053 struct regcache *regcache,
1054 CORE_ADDR addr)
1055{
1056 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1057 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1058 gdb_byte *reg = (gdb_byte *) alloca (sz);
1059 ULONGEST pswm, pswa;
1060
1061 /* Set PSWA from the location and a default PSWM (the only part we're
1062 unlikely to get right is the CC). */
1063 if (tdep->abi == ABI_LINUX_S390)
1064 {
1065 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1066 was in 24-bit mode). */
1067 pswa = addr | 0x80000000UL;
1068 pswm = 0x070d0000UL;
1069 }
1070 else
1071 {
1072 pswa = addr;
1073 pswm = 0x0705000180000000ULL;
1074 }
1075
1076 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1077 regcache_raw_supply (regcache, S390_PSWA_REGNUM, reg);
1078
1079 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1080 regcache_raw_supply (regcache, S390_PSWM_REGNUM, reg);
1081}
1082
1083/* Return the name of register REGNO. Return the empty string for
1084 registers that shouldn't be visible. */
1085
1086static const char *
1087s390_register_name (struct gdbarch *gdbarch, int regnum)
1088{
1089 if (regnum >= S390_V0_LOWER_REGNUM
1090 && regnum <= S390_V15_LOWER_REGNUM)
1091 return "";
1092 return tdesc_register_name (gdbarch, regnum);
1093}
1094
1095/* DWARF Register Mapping. */
1096
1097static const short s390_dwarf_regmap[] =
1098{
1099 /* 0-15: General Purpose Registers. */
1100 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1101 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1102 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1103 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1104
1105 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1106 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1107 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1108 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1109 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1110
1111 /* 32-47: Control Registers (not mapped). */
1112 -1, -1, -1, -1, -1, -1, -1, -1,
1113 -1, -1, -1, -1, -1, -1, -1, -1,
1114
1115 /* 48-63: Access Registers. */
1116 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1117 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1118 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1119 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1120
1121 /* 64-65: Program Status Word. */
1122 S390_PSWM_REGNUM,
1123 S390_PSWA_REGNUM,
1124
1125 /* 66-67: Reserved. */
1126 -1, -1,
1127
1128 /* 68-83: Vector Registers 16-31. */
1129 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1130 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1131 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1132 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1133
1134 /* End of "official" DWARF registers. The remainder of the map is
1135 for GDB internal use only. */
1136
1137 /* GPR Lower Half Access. */
1138 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1139 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1140 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1141 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1142};
1143
1144enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1145
1146/* Convert DWARF register number REG to the appropriate register
1147 number used by GDB. */
1148
1149static int
1150s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1151{
1152 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1153 int gdb_reg = -1;
1154
1155 /* In a 32-on-64 debug scenario, debug info refers to the full
1156 64-bit GPRs. Note that call frame information still refers to
1157 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1158 special register numbers to access GPRs. */
1159 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1160 return tdep->gpr_full_regnum + reg;
1161
1162 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1163 gdb_reg = s390_dwarf_regmap[reg];
1164
1165 if (tdep->v0_full_regnum == -1)
1166 {
1167 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1168 gdb_reg = -1;
1169 }
1170 else
1171 {
1172 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1173 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1174 }
1175
1176 return gdb_reg;
1177}
1178
1179/* Pseudo registers. */
1180
1181/* Check whether REGNUM indicates a coupled general purpose register.
1182 These pseudo-registers are composed of two adjacent gprs. */
1183
1184static int
1185regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1186{
1187 return (tdep->gpr_full_regnum != -1
1188 && regnum >= tdep->gpr_full_regnum
1189 && regnum <= tdep->gpr_full_regnum + 15);
1190}
1191
1192/* Check whether REGNUM indicates a full vector register (v0-v15).
1193 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1194
1195static int
1196regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1197{
1198 return (tdep->v0_full_regnum != -1
1199 && regnum >= tdep->v0_full_regnum
1200 && regnum <= tdep->v0_full_regnum + 15);
1201}
1202
1203/* 'float' values are stored in the upper half of floating-point
1204 registers, even though we are otherwise a big-endian platform. The
1205 same applies to a 'float' value within a vector. */
1206
1207static struct value *
1208s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1209 int regnum, struct frame_id frame_id)
1210{
1211 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1212 struct value *value = default_value_from_register (gdbarch, type,
1213 regnum, frame_id);
1214 check_typedef (type);
1215
1216 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1217 && TYPE_LENGTH (type) < 8)
1218 || regnum_is_vxr_full (tdep, regnum)
1219 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1220 set_value_offset (value, 0);
1221
1222 return value;
1223}
1224
1225/* Implement pseudo_register_name tdesc method. */
1226
1227static const char *
1228s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1229{
1230 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1231
1232 if (regnum == tdep->pc_regnum)
1233 return "pc";
1234
1235 if (regnum == tdep->cc_regnum)
1236 return "cc";
1237
1238 if (regnum_is_gpr_full (tdep, regnum))
1239 {
1240 static const char *full_name[] = {
1241 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1242 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1243 };
1244 return full_name[regnum - tdep->gpr_full_regnum];
1245 }
1246
1247 if (regnum_is_vxr_full (tdep, regnum))
1248 {
1249 static const char *full_name[] = {
1250 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1251 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1252 };
1253 return full_name[regnum - tdep->v0_full_regnum];
1254 }
1255
1256 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1257}
1258
1259/* Implement pseudo_register_type tdesc method. */
1260
1261static struct type *
1262s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1263{
1264 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1265
1266 if (regnum == tdep->pc_regnum)
1267 return builtin_type (gdbarch)->builtin_func_ptr;
1268
1269 if (regnum == tdep->cc_regnum)
1270 return builtin_type (gdbarch)->builtin_int;
1271
1272 if (regnum_is_gpr_full (tdep, regnum))
1273 return builtin_type (gdbarch)->builtin_uint64;
1274
1275 if (regnum_is_vxr_full (tdep, regnum))
1276 return tdesc_find_type (gdbarch, "vec128");
1277
1278 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1279}
1280
1281/* Implement pseudo_register_read gdbarch method. */
1282
1283static enum register_status
849d0ba8 1284s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
d6e58945
PR
1285 int regnum, gdb_byte *buf)
1286{
1287 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1288 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1289 int regsize = register_size (gdbarch, regnum);
1290 ULONGEST val;
1291
1292 if (regnum == tdep->pc_regnum)
1293 {
1294 enum register_status status;
1295
1296 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1297 if (status == REG_VALID)
1298 {
1299 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1300 val &= 0x7fffffff;
1301 store_unsigned_integer (buf, regsize, byte_order, val);
1302 }
1303 return status;
1304 }
1305
1306 if (regnum == tdep->cc_regnum)
1307 {
1308 enum register_status status;
1309
1310 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1311 if (status == REG_VALID)
1312 {
1313 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1314 val = (val >> 12) & 3;
1315 else
1316 val = (val >> 44) & 3;
1317 store_unsigned_integer (buf, regsize, byte_order, val);
1318 }
1319 return status;
1320 }
1321
1322 if (regnum_is_gpr_full (tdep, regnum))
1323 {
1324 enum register_status status;
1325 ULONGEST val_upper;
1326
1327 regnum -= tdep->gpr_full_regnum;
1328
1329 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1330 if (status == REG_VALID)
1331 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1332 &val_upper);
1333 if (status == REG_VALID)
1334 {
1335 val |= val_upper << 32;
1336 store_unsigned_integer (buf, regsize, byte_order, val);
1337 }
1338 return status;
1339 }
1340
1341 if (regnum_is_vxr_full (tdep, regnum))
1342 {
1343 enum register_status status;
1344
1345 regnum -= tdep->v0_full_regnum;
1346
1347 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1348 if (status == REG_VALID)
1349 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1350 return status;
1351 }
1352
1353 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1354}
1355
1356/* Implement pseudo_register_write gdbarch method. */
1357
1358static void
1359s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1360 int regnum, const gdb_byte *buf)
1361{
1362 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1363 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1364 int regsize = register_size (gdbarch, regnum);
1365 ULONGEST val, psw;
1366
1367 if (regnum == tdep->pc_regnum)
1368 {
1369 val = extract_unsigned_integer (buf, regsize, byte_order);
1370 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1371 {
1372 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1373 val = (psw & 0x80000000) | (val & 0x7fffffff);
1374 }
1375 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1376 return;
1377 }
1378
1379 if (regnum == tdep->cc_regnum)
1380 {
1381 val = extract_unsigned_integer (buf, regsize, byte_order);
1382 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1383 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1384 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1385 else
1386 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1387 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1388 return;
1389 }
1390
1391 if (regnum_is_gpr_full (tdep, regnum))
1392 {
1393 regnum -= tdep->gpr_full_regnum;
1394 val = extract_unsigned_integer (buf, regsize, byte_order);
1395 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1396 val & 0xffffffff);
1397 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1398 val >> 32);
1399 return;
1400 }
1401
1402 if (regnum_is_vxr_full (tdep, regnum))
1403 {
1404 regnum -= tdep->v0_full_regnum;
10eaee5f
SM
1405 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1406 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
d6e58945
PR
1407 return;
1408 }
1409
1410 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1411}
1412
1413/* Register groups. */
1414
1415/* Implement pseudo_register_reggroup_p tdesc method. */
1416
1417static int
1418s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1419 struct reggroup *group)
1420{
1421 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1422
1423 /* We usually save/restore the whole PSW, which includes PC and CC.
1424 However, some older gdbservers may not support saving/restoring
1425 the whole PSW yet, and will return an XML register description
1426 excluding those from the save/restore register groups. In those
1427 cases, we still need to explicitly save/restore PC and CC in order
1428 to push or pop frames. Since this doesn't hurt anything if we
1429 already save/restore the whole PSW (it's just redundant), we add
1430 PC and CC at this point unconditionally. */
1431 if (group == save_reggroup || group == restore_reggroup)
1432 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1433
1434 if (group == vector_reggroup)
1435 return regnum_is_vxr_full (tdep, regnum);
1436
1437 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1438 return 0;
1439
1440 return default_register_reggroup_p (gdbarch, regnum, group);
1441}
1442
1443/* The "ax_pseudo_register_collect" gdbarch method. */
1444
1445static int
1446s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1447 struct agent_expr *ax, int regnum)
1448{
1449 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1450 if (regnum == tdep->pc_regnum)
1451 {
1452 ax_reg_mask (ax, S390_PSWA_REGNUM);
1453 }
1454 else if (regnum == tdep->cc_regnum)
1455 {
1456 ax_reg_mask (ax, S390_PSWM_REGNUM);
1457 }
1458 else if (regnum_is_gpr_full (tdep, regnum))
1459 {
1460 regnum -= tdep->gpr_full_regnum;
1461 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1462 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1463 }
1464 else if (regnum_is_vxr_full (tdep, regnum))
1465 {
1466 regnum -= tdep->v0_full_regnum;
1467 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1468 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1469 }
1470 else
1471 {
1472 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1473 }
1474 return 0;
1475}
1476
1477/* The "ax_pseudo_register_push_stack" gdbarch method. */
1478
1479static int
1480s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1481 struct agent_expr *ax, int regnum)
1482{
1483 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1484 if (regnum == tdep->pc_regnum)
1485 {
1486 ax_reg (ax, S390_PSWA_REGNUM);
1487 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1488 {
1489 ax_zero_ext (ax, 31);
1490 }
1491 }
1492 else if (regnum == tdep->cc_regnum)
1493 {
1494 ax_reg (ax, S390_PSWM_REGNUM);
1495 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1496 ax_const_l (ax, 12);
1497 else
1498 ax_const_l (ax, 44);
1499 ax_simple (ax, aop_rsh_unsigned);
1500 ax_zero_ext (ax, 2);
1501 }
1502 else if (regnum_is_gpr_full (tdep, regnum))
1503 {
1504 regnum -= tdep->gpr_full_regnum;
1505 ax_reg (ax, S390_R0_REGNUM + regnum);
1506 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1507 ax_const_l (ax, 32);
1508 ax_simple (ax, aop_lsh);
1509 ax_simple (ax, aop_bit_or);
1510 }
1511 else if (regnum_is_vxr_full (tdep, regnum))
1512 {
1513 /* Too large to stuff on the stack. */
1514 return 1;
1515 }
1516 else
1517 {
1518 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1519 }
1520 return 0;
1521}
1522
1523/* The "gen_return_address" gdbarch method. Since this is supposed to be
1524 just a best-effort method, and we don't really have the means to run
1525 the full unwinder here, just collect the link register. */
1526
1527static void
1528s390_gen_return_address (struct gdbarch *gdbarch,
1529 struct agent_expr *ax, struct axs_value *value,
1530 CORE_ADDR scope)
1531{
1532 value->type = register_type (gdbarch, S390_R14_REGNUM);
1533 value->kind = axs_lvalue_register;
1534 value->u.reg = S390_R14_REGNUM;
1535}
1536
1537/* Address handling. */
1538
1539/* Implement addr_bits_remove gdbarch method.
1540 Only used for ABI_LINUX_S390. */
1541
1542static CORE_ADDR
1543s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1544{
1545 return addr & 0x7fffffff;
1546}
1547
1548/* Implement addr_class_type_flags gdbarch method.
1549 Only used for ABI_LINUX_ZSERIES. */
1550
1551static int
1552s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1553{
1554 if (byte_size == 4)
1555 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1556 else
1557 return 0;
1558}
1559
1560/* Implement addr_class_type_flags_to_name gdbarch method.
1561 Only used for ABI_LINUX_ZSERIES. */
1562
1563static const char *
1564s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1565{
1566 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1567 return "mode32";
1568 else
1569 return NULL;
1570}
1571
1572/* Implement addr_class_name_to_type_flags gdbarch method.
1573 Only used for ABI_LINUX_ZSERIES. */
1574
1575static int
1576s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1577 const char *name,
1578 int *type_flags_ptr)
1579{
1580 if (strcmp (name, "mode32") == 0)
1581 {
1582 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1583 return 1;
1584 }
1585 else
1586 return 0;
1587}
1588
1589/* Inferior function calls. */
1590
1591/* Dummy function calls. */
1592
1593/* Unwrap any single-field structs in TYPE and return the effective
1594 "inner" type. E.g., yield "float" for all these cases:
1595
1596 float x;
1597 struct { float x };
1598 struct { struct { float x; } x; };
1599 struct { struct { struct { float x; } x; } x; };
1600
1601 However, if an inner type is smaller than MIN_SIZE, abort the
1602 unwrapping. */
1603
1604static struct type *
1605s390_effective_inner_type (struct type *type, unsigned int min_size)
1606{
1607 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1608 && TYPE_NFIELDS (type) == 1)
1609 {
1610 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1611
1612 if (TYPE_LENGTH (inner) < min_size)
1613 break;
1614 type = inner;
1615 }
1616
1617 return type;
1618}
1619
1620/* Return non-zero if TYPE should be passed like "float" or
1621 "double". */
1622
1623static int
1624s390_function_arg_float (struct type *type)
1625{
1626 /* Note that long double as well as complex types are intentionally
1627 excluded. */
1628 if (TYPE_LENGTH (type) > 8)
1629 return 0;
1630
1631 /* A struct containing just a float or double is passed like a float
1632 or double. */
1633 type = s390_effective_inner_type (type, 0);
1634
1635 return (TYPE_CODE (type) == TYPE_CODE_FLT
1636 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1637}
1638
1639/* Return non-zero if TYPE should be passed like a vector. */
1640
1641static int
1642s390_function_arg_vector (struct type *type)
1643{
1644 if (TYPE_LENGTH (type) > 16)
1645 return 0;
1646
1647 /* Structs containing just a vector are passed like a vector. */
1648 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1649
1650 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1651}
1652
1653/* Determine whether N is a power of two. */
1654
1655static int
1656is_power_of_two (unsigned int n)
1657{
1658 return n && ((n & (n - 1)) == 0);
1659}
1660
1661/* For an argument whose type is TYPE and which is not passed like a
1662 float or vector, return non-zero if it should be passed like "int"
1663 or "long long". */
1664
1665static int
1666s390_function_arg_integer (struct type *type)
1667{
1668 enum type_code code = TYPE_CODE (type);
1669
1670 if (TYPE_LENGTH (type) > 8)
1671 return 0;
1672
1673 if (code == TYPE_CODE_INT
1674 || code == TYPE_CODE_ENUM
1675 || code == TYPE_CODE_RANGE
1676 || code == TYPE_CODE_CHAR
1677 || code == TYPE_CODE_BOOL
1678 || code == TYPE_CODE_PTR
1679 || TYPE_IS_REFERENCE (type))
1680 return 1;
1681
1682 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1683 && is_power_of_two (TYPE_LENGTH (type)));
1684}
1685
1686/* Argument passing state: Internal data structure passed to helper
1687 routines of s390_push_dummy_call. */
1688
1689struct s390_arg_state
1690 {
1691 /* Register cache, or NULL, if we are in "preparation mode". */
1692 struct regcache *regcache;
1693 /* Next available general/floating-point/vector register for
1694 argument passing. */
1695 int gr, fr, vr;
1696 /* Current pointer to copy area (grows downwards). */
1697 CORE_ADDR copy;
1698 /* Current pointer to parameter area (grows upwards). */
1699 CORE_ADDR argp;
1700 };
1701
1702/* Prepare one argument ARG for a dummy call and update the argument
1703 passing state AS accordingly. If the regcache field in AS is set,
1704 operate in "write mode" and write ARG into the inferior. Otherwise
1705 run "preparation mode" and skip all updates to the inferior. */
1706
1707static void
1708s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1709 struct gdbarch_tdep *tdep, int word_size,
1710 enum bfd_endian byte_order, int is_unnamed)
1711{
1712 struct type *type = check_typedef (value_type (arg));
1713 unsigned int length = TYPE_LENGTH (type);
1714 int write_mode = as->regcache != NULL;
1715
1716 if (s390_function_arg_float (type))
1717 {
1718 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1719 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1720 6. */
1721 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1722 {
1723 /* When we store a single-precision value in an FP register,
1724 it occupies the leftmost bits. */
1725 if (write_mode)
1726 regcache_cooked_write_part (as->regcache,
1727 S390_F0_REGNUM + as->fr,
1728 0, length,
1729 value_contents (arg));
1730 as->fr += 2;
1731 }
1732 else
1733 {
1734 /* When we store a single-precision value in a stack slot,
1735 it occupies the rightmost bits. */
1736 as->argp = align_up (as->argp + length, word_size);
1737 if (write_mode)
1738 write_memory (as->argp - length, value_contents (arg),
1739 length);
1740 }
1741 }
1742 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1743 && s390_function_arg_vector (type))
1744 {
1745 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1746
1747 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1748 {
1749 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1750
1751 if (write_mode)
1752 regcache_cooked_write_part (as->regcache, regnum,
1753 0, length,
1754 value_contents (arg));
1755 as->vr++;
1756 }
1757 else
1758 {
1759 if (write_mode)
1760 write_memory (as->argp, value_contents (arg), length);
1761 as->argp = align_up (as->argp + length, word_size);
1762 }
1763 }
1764 else if (s390_function_arg_integer (type) && length <= word_size)
1765 {
1766 /* Initialize it just to avoid a GCC false warning. */
1767 ULONGEST val = 0;
1768
1769 if (write_mode)
1770 {
1771 /* Place value in least significant bits of the register or
1772 memory word and sign- or zero-extend to full word size.
1773 This also applies to a struct or union. */
1774 val = TYPE_UNSIGNED (type)
1775 ? extract_unsigned_integer (value_contents (arg),
1776 length, byte_order)
1777 : extract_signed_integer (value_contents (arg),
1778 length, byte_order);
1779 }
1780
1781 if (as->gr <= 6)
1782 {
1783 if (write_mode)
1784 regcache_cooked_write_unsigned (as->regcache,
1785 S390_R0_REGNUM + as->gr,
1786 val);
1787 as->gr++;
1788 }
1789 else
1790 {
1791 if (write_mode)
1792 write_memory_unsigned_integer (as->argp, word_size,
1793 byte_order, val);
1794 as->argp += word_size;
1795 }
1796 }
1797 else if (s390_function_arg_integer (type) && length == 8)
1798 {
1799 if (as->gr <= 5)
1800 {
1801 if (write_mode)
1802 {
1803 regcache_cooked_write (as->regcache,
1804 S390_R0_REGNUM + as->gr,
1805 value_contents (arg));
1806 regcache_cooked_write (as->regcache,
1807 S390_R0_REGNUM + as->gr + 1,
1808 value_contents (arg) + word_size);
1809 }
1810 as->gr += 2;
1811 }
1812 else
1813 {
1814 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1815 in it, then don't go back and use it again later. */
1816 as->gr = 7;
1817
1818 if (write_mode)
1819 write_memory (as->argp, value_contents (arg), length);
1820 as->argp += length;
1821 }
1822 }
1823 else
1824 {
1825 /* This argument type is never passed in registers. Place the
1826 value in the copy area and pass a pointer to it. Use 8-byte
1827 alignment as a conservative assumption. */
1828 as->copy = align_down (as->copy - length, 8);
1829 if (write_mode)
1830 write_memory (as->copy, value_contents (arg), length);
1831
1832 if (as->gr <= 6)
1833 {
1834 if (write_mode)
1835 regcache_cooked_write_unsigned (as->regcache,
1836 S390_R0_REGNUM + as->gr,
1837 as->copy);
1838 as->gr++;
1839 }
1840 else
1841 {
1842 if (write_mode)
1843 write_memory_unsigned_integer (as->argp, word_size,
1844 byte_order, as->copy);
1845 as->argp += word_size;
1846 }
1847 }
1848}
1849
1850/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1851 place to be passed to a function, as specified by the "GNU/Linux
1852 for S/390 ELF Application Binary Interface Supplement".
1853
1854 SP is the current stack pointer. We must put arguments, links,
1855 padding, etc. whereever they belong, and return the new stack
1856 pointer value.
1857
1858 If STRUCT_RETURN is non-zero, then the function we're calling is
1859 going to return a structure by value; STRUCT_ADDR is the address of
1860 a block we've allocated for it on the stack.
1861
1862 Our caller has taken care of any type promotions needed to satisfy
1863 prototypes or the old K&R argument-passing rules. */
1864
1865static CORE_ADDR
1866s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1867 struct regcache *regcache, CORE_ADDR bp_addr,
1868 int nargs, struct value **args, CORE_ADDR sp,
1869 int struct_return, CORE_ADDR struct_addr)
1870{
1871 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1872 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1873 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1874 int i;
1875 struct s390_arg_state arg_state, arg_prep;
1876 CORE_ADDR param_area_start, new_sp;
1877 struct type *ftype = check_typedef (value_type (function));
1878
1879 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1880 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1881
1882 arg_prep.copy = sp;
1883 arg_prep.gr = struct_return ? 3 : 2;
1884 arg_prep.fr = 0;
1885 arg_prep.vr = 0;
1886 arg_prep.argp = 0;
1887 arg_prep.regcache = NULL;
1888
1889 /* Initialize arg_state for "preparation mode". */
1890 arg_state = arg_prep;
1891
1892 /* Update arg_state.copy with the start of the reference-to-copy area
1893 and arg_state.argp with the size of the parameter area. */
1894 for (i = 0; i < nargs; i++)
1895 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1896 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1897
1898 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1899
1900 /* Allocate the standard frame areas: the register save area, the
1901 word reserved for the compiler, and the back chain pointer. */
1902 new_sp = param_area_start - (16 * word_size + 32);
1903
1904 /* Now we have the final stack pointer. Make sure we didn't
1905 underflow; on 31-bit, this would result in addresses with the
1906 high bit set, which causes confusion elsewhere. Note that if we
1907 error out here, stack and registers remain untouched. */
1908 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1909 error (_("Stack overflow"));
1910
1911 /* Pass the structure return address in general register 2. */
1912 if (struct_return)
1913 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1914
1915 /* Initialize arg_state for "write mode". */
1916 arg_state = arg_prep;
1917 arg_state.argp = param_area_start;
1918 arg_state.regcache = regcache;
1919
1920 /* Write all parameters. */
1921 for (i = 0; i < nargs; i++)
1922 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1923 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1924
1925 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1926 if (word_size == 4)
1927 {
1928 ULONGEST pswa;
1929 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1930 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1931 }
1932 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1933
1934 /* Store updated stack pointer. */
1935 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1936
1937 /* We need to return the 'stack part' of the frame ID,
1938 which is actually the top of the register save area. */
1939 return param_area_start;
1940}
1941
1942/* Assuming THIS_FRAME is a dummy, return the frame ID of that
1943 dummy frame. The frame ID's base needs to match the TOS value
1944 returned by push_dummy_call, and the PC match the dummy frame's
1945 breakpoint. */
1946
1947static struct frame_id
1948s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1949{
1950 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1951 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1952 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1953
1954 return frame_id_build (sp + 16*word_size + 32,
1955 get_frame_pc (this_frame));
1956}
1957
1958/* Implement frame_align gdbarch method. */
1959
1960static CORE_ADDR
1961s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1962{
1963 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1964 always be aligned on an eight-byte boundary. */
1965 return (addr & -8);
1966}
1967
1968/* Helper for s390_return_value: Set or retrieve a function return
1969 value if it resides in a register. */
1970
1971static void
1972s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
1973 struct regcache *regcache,
1974 gdb_byte *out, const gdb_byte *in)
1975{
1976 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1977 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1978 int length = TYPE_LENGTH (type);
1979 int code = TYPE_CODE (type);
1980
1981 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
1982 {
1983 /* Float-like value: left-aligned in f0. */
1984 if (in != NULL)
1985 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
1986 0, length, in);
1987 else
1988 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
1989 0, length, out);
1990 }
1991 else if (code == TYPE_CODE_ARRAY)
1992 {
1993 /* Vector: left-aligned in v24. */
1994 if (in != NULL)
1995 regcache_cooked_write_part (regcache, S390_V24_REGNUM,
1996 0, length, in);
1997 else
1998 regcache_cooked_read_part (regcache, S390_V24_REGNUM,
1999 0, length, out);
2000 }
2001 else if (length <= word_size)
2002 {
2003 /* Integer: zero- or sign-extended in r2. */
2004 if (out != NULL)
2005 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2006 word_size - length, length, out);
2007 else if (TYPE_UNSIGNED (type))
2008 regcache_cooked_write_unsigned
2009 (regcache, S390_R2_REGNUM,
2010 extract_unsigned_integer (in, length, byte_order));
2011 else
2012 regcache_cooked_write_signed
2013 (regcache, S390_R2_REGNUM,
2014 extract_signed_integer (in, length, byte_order));
2015 }
2016 else if (length == 2 * word_size)
2017 {
2018 /* Double word: in r2 and r3. */
2019 if (in != NULL)
2020 {
2021 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2022 regcache_cooked_write (regcache, S390_R3_REGNUM,
2023 in + word_size);
2024 }
2025 else
2026 {
dca08e1f
SM
2027 regcache->cooked_read (S390_R2_REGNUM, out);
2028 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
d6e58945
PR
2029 }
2030 }
2031 else
2032 internal_error (__FILE__, __LINE__, _("invalid return type"));
2033}
2034
2035/* Implement the 'return_value' gdbarch method. */
2036
2037static enum return_value_convention
2038s390_return_value (struct gdbarch *gdbarch, struct value *function,
2039 struct type *type, struct regcache *regcache,
2040 gdb_byte *out, const gdb_byte *in)
2041{
2042 enum return_value_convention rvc;
2043
2044 type = check_typedef (type);
2045
2046 switch (TYPE_CODE (type))
2047 {
2048 case TYPE_CODE_STRUCT:
2049 case TYPE_CODE_UNION:
2050 case TYPE_CODE_COMPLEX:
2051 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2052 break;
2053 case TYPE_CODE_ARRAY:
2054 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2055 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2056 ? RETURN_VALUE_REGISTER_CONVENTION
2057 : RETURN_VALUE_STRUCT_CONVENTION;
2058 break;
2059 default:
2060 rvc = TYPE_LENGTH (type) <= 8
2061 ? RETURN_VALUE_REGISTER_CONVENTION
2062 : RETURN_VALUE_STRUCT_CONVENTION;
2063 }
2064
2065 if (in != NULL || out != NULL)
2066 {
2067 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2068 s390_register_return_value (gdbarch, type, regcache, out, in);
2069 else if (in != NULL)
2070 error (_("Cannot set function return value."));
2071 else
2072 error (_("Function return value unknown."));
2073 }
2074
2075 return rvc;
2076}
2077
2078/* Frame unwinding. */
2079
2080/* Implmement the stack_frame_destroyed_p gdbarch method. */
2081
2082static int
2083s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2084{
2085 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2086
2087 /* In frameless functions, there's no frame to destroy and thus
2088 we don't care about the epilogue.
2089
2090 In functions with frame, the epilogue sequence is a pair of
2091 a LM-type instruction that restores (amongst others) the
2092 return register %r14 and the stack pointer %r15, followed
2093 by a branch 'br %r14' --or equivalent-- that effects the
2094 actual return.
2095
2096 In that situation, this function needs to return 'true' in
2097 exactly one case: when pc points to that branch instruction.
2098
2099 Thus we try to disassemble the one instructions immediately
2100 preceding pc and check whether it is an LM-type instruction
2101 modifying the stack pointer.
2102
2103 Note that disassembling backwards is not reliable, so there
2104 is a slight chance of false positives here ... */
2105
2106 bfd_byte insn[6];
2107 unsigned int r1, r3, b2;
2108 int d2;
2109
2110 if (word_size == 4
2111 && !target_read_memory (pc - 4, insn, 4)
2112 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2113 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2114 return 1;
2115
2116 if (word_size == 4
2117 && !target_read_memory (pc - 6, insn, 6)
2118 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2119 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2120 return 1;
2121
2122 if (word_size == 8
2123 && !target_read_memory (pc - 6, insn, 6)
2124 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2125 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2126 return 1;
2127
2128 return 0;
2129}
2130
2131/* Implement unwind_pc gdbarch method. */
2132
2133static CORE_ADDR
2134s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2135{
2136 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2137 ULONGEST pc;
2138 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2139 return gdbarch_addr_bits_remove (gdbarch, pc);
2140}
2141
2142/* Implement unwind_sp gdbarch method. */
2143
2144static CORE_ADDR
2145s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2146{
2147 ULONGEST sp;
2148 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2149 return gdbarch_addr_bits_remove (gdbarch, sp);
2150}
2151
2152/* Helper routine to unwind pseudo registers. */
2153
2154static struct value *
2155s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2156{
2157 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2158 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2159 struct type *type = register_type (gdbarch, regnum);
2160
2161 /* Unwind PC via PSW address. */
2162 if (regnum == tdep->pc_regnum)
2163 {
2164 struct value *val;
2165
2166 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2167 if (!value_optimized_out (val))
2168 {
2169 LONGEST pswa = value_as_long (val);
2170
2171 if (TYPE_LENGTH (type) == 4)
2172 return value_from_pointer (type, pswa & 0x7fffffff);
2173 else
2174 return value_from_pointer (type, pswa);
2175 }
2176 }
2177
2178 /* Unwind CC via PSW mask. */
2179 if (regnum == tdep->cc_regnum)
2180 {
2181 struct value *val;
2182
2183 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2184 if (!value_optimized_out (val))
2185 {
2186 LONGEST pswm = value_as_long (val);
2187
2188 if (TYPE_LENGTH (type) == 4)
2189 return value_from_longest (type, (pswm >> 12) & 3);
2190 else
2191 return value_from_longest (type, (pswm >> 44) & 3);
2192 }
2193 }
2194
2195 /* Unwind full GPRs to show at least the lower halves (as the
2196 upper halves are undefined). */
2197 if (regnum_is_gpr_full (tdep, regnum))
2198 {
2199 int reg = regnum - tdep->gpr_full_regnum;
2200 struct value *val;
2201
2202 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2203 if (!value_optimized_out (val))
2204 return value_cast (type, val);
2205 }
2206
2207 return allocate_optimized_out_value (type);
2208}
2209
2210/* Translate a .eh_frame register to DWARF register, or adjust a
2211 .debug_frame register. */
2212
2213static int
2214s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2215{
2216 /* See s390_dwarf_reg_to_regnum for comments. */
2217 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2218}
2219
2220/* DWARF-2 frame unwinding. */
2221
2222/* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2223 s390_dwarf2_frame_init_reg. */
2224
2225static struct value *
2226s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2227 int regnum)
2228{
2229 return s390_unwind_pseudo_register (this_frame, regnum);
2230}
2231
2232/* Implement init_reg dwarf2_frame method. */
2233
2234static void
2235s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2236 struct dwarf2_frame_state_reg *reg,
2237 struct frame_info *this_frame)
2238{
2239 /* The condition code (and thus PSW mask) is call-clobbered. */
2240 if (regnum == S390_PSWM_REGNUM)
2241 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2242
2243 /* The PSW address unwinds to the return address. */
2244 else if (regnum == S390_PSWA_REGNUM)
2245 reg->how = DWARF2_FRAME_REG_RA;
2246
2247 /* Fixed registers are call-saved or call-clobbered
2248 depending on the ABI in use. */
2249 else if (regnum < S390_NUM_REGS)
2250 {
2251 if (s390_register_call_saved (gdbarch, regnum))
2252 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2253 else
2254 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2255 }
2256
2257 /* We install a special function to unwind pseudos. */
2258 else
2259 {
2260 reg->how = DWARF2_FRAME_REG_FN;
2261 reg->loc.fn = s390_dwarf2_prev_register;
2262 }
2263}
2264
2265/* Frame unwinding. */
2266
2267/* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2268 register translation. */
2269
2270struct value *
2271s390_trad_frame_prev_register (struct frame_info *this_frame,
2272 struct trad_frame_saved_reg saved_regs[],
2273 int regnum)
2274{
2275 if (regnum < S390_NUM_REGS)
2276 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2277 else
2278 return s390_unwind_pseudo_register (this_frame, regnum);
2279}
2280
2281/* Normal stack frames. */
2282
2283struct s390_unwind_cache {
2284
2285 CORE_ADDR func;
2286 CORE_ADDR frame_base;
2287 CORE_ADDR local_base;
2288
2289 struct trad_frame_saved_reg *saved_regs;
2290};
2291
2292/* Unwind THIS_FRAME and write the information into unwind cache INFO using
2293 prologue analysis. Helper for s390_frame_unwind_cache. */
2294
2295static int
2296s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2297 struct s390_unwind_cache *info)
2298{
2299 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2300 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2301 struct s390_prologue_data data;
2302 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2303 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2304 int i;
2305 CORE_ADDR cfa;
2306 CORE_ADDR func;
2307 CORE_ADDR result;
2308 ULONGEST reg;
2309 CORE_ADDR prev_sp;
2310 int frame_pointer;
2311 int size;
2312 struct frame_info *next_frame;
2313
2314 /* Try to find the function start address. If we can't find it, we don't
2315 bother searching for it -- with modern compilers this would be mostly
2316 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2317 or else a valid backchain ... */
2318 if (!get_frame_func_if_available (this_frame, &info->func))
2319 {
2320 info->func = -1;
2321 return 0;
2322 }
2323 func = info->func;
2324
2325 /* Try to analyze the prologue. */
2326 result = s390_analyze_prologue (gdbarch, func,
2327 get_frame_pc (this_frame), &data);
2328 if (!result)
2329 return 0;
2330
2331 /* If this was successful, we should have found the instruction that
2332 sets the stack pointer register to the previous value of the stack
2333 pointer minus the frame size. */
2334 if (!pv_is_register (*sp, S390_SP_REGNUM))
2335 return 0;
2336
2337 /* A frame size of zero at this point can mean either a real
2338 frameless function, or else a failure to find the prologue.
2339 Perform some sanity checks to verify we really have a
2340 frameless function. */
2341 if (sp->k == 0)
2342 {
2343 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2344 size zero. This is only possible if the next frame is a sentinel
2345 frame, a dummy frame, or a signal trampoline frame. */
2346 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2347 needed, instead the code should simpliy rely on its
2348 analysis. */
2349 next_frame = get_next_frame (this_frame);
2350 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2351 next_frame = get_next_frame (next_frame);
2352 if (next_frame
2353 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2354 return 0;
2355
2356 /* If we really have a frameless function, %r14 must be valid
2357 -- in particular, it must point to a different function. */
2358 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2359 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2360 if (get_pc_function_start (reg) == func)
2361 {
2362 /* However, there is one case where it *is* valid for %r14
2363 to point to the same function -- if this is a recursive
2364 call, and we have stopped in the prologue *before* the
2365 stack frame was allocated.
2366
2367 Recognize this case by looking ahead a bit ... */
2368
2369 struct s390_prologue_data data2;
2370 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2371
2372 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2373 && pv_is_register (*sp, S390_SP_REGNUM)
2374 && sp->k != 0))
2375 return 0;
2376 }
2377 }
2378
2379 /* OK, we've found valid prologue data. */
2380 size = -sp->k;
2381
2382 /* If the frame pointer originally also holds the same value
2383 as the stack pointer, we're probably using it. If it holds
2384 some other value -- even a constant offset -- it is most
2385 likely used as temp register. */
2386 if (pv_is_identical (*sp, *fp))
2387 frame_pointer = S390_FRAME_REGNUM;
2388 else
2389 frame_pointer = S390_SP_REGNUM;
2390
2391 /* If we've detected a function with stack frame, we'll still have to
2392 treat it as frameless if we're currently within the function epilog
2393 code at a point where the frame pointer has already been restored.
2394 This can only happen in an innermost frame. */
2395 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2396 instead the code should simpliy rely on its analysis. */
2397 next_frame = get_next_frame (this_frame);
2398 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2399 next_frame = get_next_frame (next_frame);
2400 if (size > 0
2401 && (next_frame == NULL
2402 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2403 {
2404 /* See the comment in s390_stack_frame_destroyed_p on why this is
2405 not completely reliable ... */
2406 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2407 {
2408 memset (&data, 0, sizeof (data));
2409 size = 0;
2410 frame_pointer = S390_SP_REGNUM;
2411 }
2412 }
2413
2414 /* Once we know the frame register and the frame size, we can unwind
2415 the current value of the frame register from the next frame, and
2416 add back the frame size to arrive that the previous frame's
2417 stack pointer value. */
2418 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2419 cfa = prev_sp + 16*word_size + 32;
2420
2421 /* Set up ABI call-saved/call-clobbered registers. */
2422 for (i = 0; i < S390_NUM_REGS; i++)
2423 if (!s390_register_call_saved (gdbarch, i))
2424 trad_frame_set_unknown (info->saved_regs, i);
2425
2426 /* CC is always call-clobbered. */
2427 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2428
2429 /* Record the addresses of all register spill slots the prologue parser
2430 has recognized. Consider only registers defined as call-saved by the
2431 ABI; for call-clobbered registers the parser may have recognized
2432 spurious stores. */
2433
2434 for (i = 0; i < 16; i++)
2435 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2436 && data.gpr_slot[i] != 0)
2437 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2438
2439 for (i = 0; i < 16; i++)
2440 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2441 && data.fpr_slot[i] != 0)
2442 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2443
2444 /* Function return will set PC to %r14. */
2445 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2446
2447 /* In frameless functions, we unwind simply by moving the return
2448 address to the PC. However, if we actually stored to the
2449 save area, use that -- we might only think the function frameless
2450 because we're in the middle of the prologue ... */
2451 if (size == 0
2452 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2453 {
2454 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2455 }
2456
2457 /* Another sanity check: unless this is a frameless function,
2458 we should have found spill slots for SP and PC.
2459 If not, we cannot unwind further -- this happens e.g. in
2460 libc's thread_start routine. */
2461 if (size > 0)
2462 {
2463 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2464 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2465 prev_sp = -1;
2466 }
2467
2468 /* We use the current value of the frame register as local_base,
2469 and the top of the register save area as frame_base. */
2470 if (prev_sp != -1)
2471 {
2472 info->frame_base = prev_sp + 16*word_size + 32;
2473 info->local_base = prev_sp - size;
2474 }
2475
2476 return 1;
2477}
2478
2479/* Unwind THIS_FRAME and write the information into unwind cache INFO using
2480 back chain unwinding. Helper for s390_frame_unwind_cache. */
2481
2482static void
2483s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2484 struct s390_unwind_cache *info)
2485{
2486 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2487 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2488 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2489 CORE_ADDR backchain;
2490 ULONGEST reg;
2491 LONGEST sp, tmp;
2492 int i;
2493
2494 /* Set up ABI call-saved/call-clobbered registers. */
2495 for (i = 0; i < S390_NUM_REGS; i++)
2496 if (!s390_register_call_saved (gdbarch, i))
2497 trad_frame_set_unknown (info->saved_regs, i);
2498
2499 /* CC is always call-clobbered. */
2500 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2501
2502 /* Get the backchain. */
2503 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2504 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2505 tmp = 0;
2506 backchain = (CORE_ADDR) tmp;
2507
2508 /* A zero backchain terminates the frame chain. As additional
2509 sanity check, let's verify that the spill slot for SP in the
2510 save area pointed to by the backchain in fact links back to
2511 the save area. */
2512 if (backchain != 0
2513 && safe_read_memory_integer (backchain + 15*word_size,
2514 word_size, byte_order, &sp)
2515 && (CORE_ADDR)sp == backchain)
2516 {
2517 /* We don't know which registers were saved, but it will have
2518 to be at least %r14 and %r15. This will allow us to continue
2519 unwinding, but other prev-frame registers may be incorrect ... */
2520 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2521 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2522
2523 /* Function return will set PC to %r14. */
2524 info->saved_regs[S390_PSWA_REGNUM]
2525 = info->saved_regs[S390_RETADDR_REGNUM];
2526
2527 /* We use the current value of the frame register as local_base,
2528 and the top of the register save area as frame_base. */
2529 info->frame_base = backchain + 16*word_size + 32;
2530 info->local_base = reg;
2531 }
2532
2533 info->func = get_frame_pc (this_frame);
2534}
2535
2536/* Unwind THIS_FRAME and return the corresponding unwind cache for
2537 s390_frame_unwind and s390_frame_base. */
2538
2539static struct s390_unwind_cache *
2540s390_frame_unwind_cache (struct frame_info *this_frame,
2541 void **this_prologue_cache)
2542{
2543 struct s390_unwind_cache *info;
2544
2545 if (*this_prologue_cache)
2546 return (struct s390_unwind_cache *) *this_prologue_cache;
2547
2548 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2549 *this_prologue_cache = info;
2550 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2551 info->func = -1;
2552 info->frame_base = -1;
2553 info->local_base = -1;
2554
2555 TRY
2556 {
2557 /* Try to use prologue analysis to fill the unwind cache.
2558 If this fails, fall back to reading the stack backchain. */
2559 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2560 s390_backchain_frame_unwind_cache (this_frame, info);
2561 }
2562 CATCH (ex, RETURN_MASK_ERROR)
2563 {
2564 if (ex.error != NOT_AVAILABLE_ERROR)
2565 throw_exception (ex);
2566 }
2567 END_CATCH
2568
2569 return info;
2570}
2571
2572/* Implement this_id frame_unwind method for s390_frame_unwind. */
2573
2574static void
2575s390_frame_this_id (struct frame_info *this_frame,
2576 void **this_prologue_cache,
2577 struct frame_id *this_id)
2578{
2579 struct s390_unwind_cache *info
2580 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2581
2582 if (info->frame_base == -1)
2583 {
2584 if (info->func != -1)
2585 *this_id = frame_id_build_unavailable_stack (info->func);
2586 return;
2587 }
2588
2589 *this_id = frame_id_build (info->frame_base, info->func);
2590}
2591
2592/* Implement prev_register frame_unwind method for s390_frame_unwind. */
2593
2594static struct value *
2595s390_frame_prev_register (struct frame_info *this_frame,
2596 void **this_prologue_cache, int regnum)
2597{
2598 struct s390_unwind_cache *info
2599 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2600
2601 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2602}
2603
2604/* Default S390 frame unwinder. */
2605
2606static const struct frame_unwind s390_frame_unwind = {
2607 NORMAL_FRAME,
2608 default_frame_unwind_stop_reason,
2609 s390_frame_this_id,
2610 s390_frame_prev_register,
2611 NULL,
2612 default_frame_sniffer
2613};
2614
2615/* Code stubs and their stack frames. For things like PLTs and NULL
2616 function calls (where there is no true frame and the return address
2617 is in the RETADDR register). */
2618
2619struct s390_stub_unwind_cache
2620{
2621 CORE_ADDR frame_base;
2622 struct trad_frame_saved_reg *saved_regs;
2623};
2624
2625/* Unwind THIS_FRAME and return the corresponding unwind cache for
2626 s390_stub_frame_unwind. */
2627
2628static struct s390_stub_unwind_cache *
2629s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2630 void **this_prologue_cache)
2631{
2632 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2633 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2634 struct s390_stub_unwind_cache *info;
2635 ULONGEST reg;
2636
2637 if (*this_prologue_cache)
2638 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2639
2640 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2641 *this_prologue_cache = info;
2642 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2643
2644 /* The return address is in register %r14. */
2645 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2646
2647 /* Retrieve stack pointer and determine our frame base. */
2648 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2649 info->frame_base = reg + 16*word_size + 32;
2650
2651 return info;
2652}
2653
2654/* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2655
2656static void
2657s390_stub_frame_this_id (struct frame_info *this_frame,
2658 void **this_prologue_cache,
2659 struct frame_id *this_id)
2660{
2661 struct s390_stub_unwind_cache *info
2662 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2663 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2664}
2665
2666/* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2667
2668static struct value *
2669s390_stub_frame_prev_register (struct frame_info *this_frame,
2670 void **this_prologue_cache, int regnum)
2671{
2672 struct s390_stub_unwind_cache *info
2673 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2674 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2675}
2676
2677/* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2678
2679static int
2680s390_stub_frame_sniffer (const struct frame_unwind *self,
2681 struct frame_info *this_frame,
2682 void **this_prologue_cache)
2683{
2684 CORE_ADDR addr_in_block;
2685 bfd_byte insn[S390_MAX_INSTR_SIZE];
2686
2687 /* If the current PC points to non-readable memory, we assume we
2688 have trapped due to an invalid function pointer call. We handle
2689 the non-existing current function like a PLT stub. */
2690 addr_in_block = get_frame_address_in_block (this_frame);
2691 if (in_plt_section (addr_in_block)
2692 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2693 return 1;
2694 return 0;
2695}
2696
2697/* S390 stub frame unwinder. */
2698
2699static const struct frame_unwind s390_stub_frame_unwind = {
2700 NORMAL_FRAME,
2701 default_frame_unwind_stop_reason,
2702 s390_stub_frame_this_id,
2703 s390_stub_frame_prev_register,
2704 NULL,
2705 s390_stub_frame_sniffer
2706};
2707
2708/* Frame base handling. */
2709
2710static CORE_ADDR
2711s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2712{
2713 struct s390_unwind_cache *info
2714 = s390_frame_unwind_cache (this_frame, this_cache);
2715 return info->frame_base;
2716}
2717
2718static CORE_ADDR
2719s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2720{
2721 struct s390_unwind_cache *info
2722 = s390_frame_unwind_cache (this_frame, this_cache);
2723 return info->local_base;
2724}
2725
2726static const struct frame_base s390_frame_base = {
2727 &s390_frame_unwind,
2728 s390_frame_base_address,
2729 s390_local_base_address,
2730 s390_local_base_address
2731};
2732
ef8914a4
PR
2733/* Process record-replay */
2734
2735/* Takes the intermediate sum of address calculations and masks off upper
2736 bits according to current addressing mode. */
2737
2738static CORE_ADDR
2739s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2740 CORE_ADDR val)
2741{
2742 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2743 ULONGEST pswm, pswa;
2744 int am;
2745 if (tdep->abi == ABI_LINUX_S390)
2746 {
2747 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2748 am = pswa >> 31 & 1;
2749 }
2750 else
2751 {
2752 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2753 am = pswm >> 31 & 3;
2754 }
2755 switch (am)
2756 {
2757 case 0:
2758 return val & 0xffffff;
2759 case 1:
2760 return val & 0x7fffffff;
2761 case 3:
2762 return val;
2763 default:
2764 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2765 return 0;
2766 }
2767}
2768
2769/* Calculates memory address using pre-calculated index, raw instruction word
2770 with b and d/dl fields, and raw instruction byte with dh field. Index and
2771 dh should be set to 0 if unused. */
2772
2773static CORE_ADDR
2774s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2775 ULONGEST x, uint16_t bd, int8_t dh)
2776{
2777 uint8_t rb = bd >> 12 & 0xf;
2778 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2779 ULONGEST b;
2780 CORE_ADDR res = d + x;
2781 if (rb)
2782 {
2783 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2784 res += b;
2785 }
2786 return s390_record_address_mask (gdbarch, regcache, res);
2787}
2788
2789/* Calculates memory address using raw x, b + d/dl, dh fields from
2790 instruction. rx and dh should be set to 0 if unused. */
2791
2792static CORE_ADDR
2793s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2794 uint8_t rx, uint16_t bd, int8_t dh)
2795{
2796 ULONGEST x = 0;
2797 if (rx)
2798 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2799 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2800}
2801
2802/* Calculates memory address for VSCE[GF] instructions. */
2803
2804static int
2805s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2806 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2807 int8_t dh, CORE_ADDR *res)
2808{
2809 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2810 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2811 ULONGEST x;
2812 gdb_byte buf[16];
2813 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2814 return -1;
2815 if (vx < 16)
dca08e1f 2816 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
ef8914a4 2817 else
0b883586 2818 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
ef8914a4
PR
2819 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2820 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2821 return 0;
2822}
2823
2824/* Calculates memory address for instructions with relative long addressing. */
2825
2826static CORE_ADDR
2827s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2828 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2829{
2830 int32_t ri = i1 << 16 | i2;
2831 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2832}
2833
2834/* Population count helper. */
2835
2836static int s390_popcnt (unsigned int x) {
2837 int res = 0;
2838 while (x)
2839 {
2840 if (x & 1)
2841 res++;
2842 x >>= 1;
2843 }
2844 return res;
2845}
2846
2847/* Record 64-bit register. */
2848
2849static int
2850s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2851{
2852 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2853 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2854 return -1;
2855 if (tdep->abi == ABI_LINUX_S390)
2856 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2857 return -1;
2858 return 0;
2859}
2860
2861/* Record high 32 bits of a register. */
2862
2863static int
2864s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2865{
2866 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2867 if (tdep->abi == ABI_LINUX_S390)
2868 {
2869 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2870 return -1;
2871 }
2872 else
2873 {
2874 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2875 return -1;
2876 }
2877 return 0;
2878}
2879
2880/* Record vector register. */
2881
2882static int
2883s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2884{
2885 if (i < 16)
2886 {
2887 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2888 return -1;
2889 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2890 return -1;
2891 }
2892 else
2893 {
2894 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2895 return -1;
2896 }
2897 return 0;
2898}
2899
2900/* Implement process_record gdbarch method. */
2901
2902static int
2903s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2904 CORE_ADDR addr)
2905{
2906 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2907 uint16_t insn[3] = {0};
2908 /* Instruction as bytes. */
2909 uint8_t ibyte[6];
2910 /* Instruction as nibbles. */
2911 uint8_t inib[12];
2912 /* Instruction vector registers. */
2913 uint8_t ivec[4];
2914 CORE_ADDR oaddr, oaddr2, oaddr3;
2915 ULONGEST tmp;
2916 int i, n;
2917 /* if EX/EXRL instruction used, here's the reg parameter */
2918 int ex = -1;
2919 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2920
2921 /* Attempting to use EX or EXRL jumps back here */
2922ex:
2923
2924 /* Read instruction. */
2925 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2926 /* If execute was involved, do the adjustment. */
2927 if (ex != -1)
2928 insn[0] |= ex & 0xff;
2929 /* Two highest bits determine instruction size. */
2930 if (insn[0] >= 0x4000)
2931 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2932 else
2933 /* Not necessary, but avoids uninitialized variable warnings. */
2934 insn[1] = 0;
2935 if (insn[0] >= 0xc000)
2936 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2937 else
2938 insn[2] = 0;
2939 /* Split instruction into bytes and nibbles. */
2940 for (i = 0; i < 3; i++)
2941 {
2942 ibyte[i*2] = insn[i] >> 8 & 0xff;
2943 ibyte[i*2+1] = insn[i] & 0xff;
2944 }
2945 for (i = 0; i < 6; i++)
2946 {
2947 inib[i*2] = ibyte[i] >> 4 & 0xf;
2948 inib[i*2+1] = ibyte[i] & 0xf;
2949 }
2950 /* Compute vector registers, if applicable. */
2951 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2952 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2953 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2954 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2955
2956 switch (ibyte[0])
2957 {
2958 /* 0x00 undefined */
2959
2960 case 0x01:
2961 /* E-format instruction */
2962 switch (ibyte[1])
2963 {
2964 /* 0x00 undefined */
2965 /* 0x01 unsupported: PR - program return */
2966 /* 0x02 unsupported: UPT */
2967 /* 0x03 undefined */
2968 /* 0x04 privileged: PTFF - perform timing facility function */
2969 /* 0x05-0x06 undefined */
2970 /* 0x07 privileged: SCKPF - set clock programmable field */
2971 /* 0x08-0x09 undefined */
2972
2973 case 0x0a: /* PFPO - perform floating point operation */
2974 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
2975 if (!(tmp & 0x80000000u))
2976 {
2977 uint8_t ofc = tmp >> 16 & 0xff;
2978 switch (ofc)
2979 {
2980 case 0x00: /* HFP32 */
2981 case 0x01: /* HFP64 */
2982 case 0x05: /* BFP32 */
2983 case 0x06: /* BFP64 */
2984 case 0x08: /* DFP32 */
2985 case 0x09: /* DFP64 */
2986 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2987 return -1;
2988 break;
2989 case 0x02: /* HFP128 */
2990 case 0x07: /* BFP128 */
2991 case 0x0a: /* DFP128 */
2992 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2993 return -1;
2994 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
2995 return -1;
2996 break;
2997 default:
2998 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
2999 ofc, paddress (gdbarch, addr));
3000 return -1;
3001 }
3002
3003 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3004 return -1;
3005 }
3006 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3007 return -1;
3008 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3009 return -1;
3010 break;
3011
3012 case 0x0b: /* TAM - test address mode */
3013 case 0x0c: /* SAM24 - set address mode 24 */
3014 case 0x0d: /* SAM31 - set address mode 31 */
3015 case 0x0e: /* SAM64 - set address mode 64 */
3016 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3017 return -1;
3018 break;
3019
3020 /* 0x0f-0xfe undefined */
3021
3022 /* 0xff unsupported: TRAP */
3023
3024 default:
3025 goto UNKNOWN_OP;
3026 }
3027 break;
3028
3029 /* 0x02 undefined */
3030 /* 0x03 undefined */
3031
3032 case 0x04: /* SPM - set program mask */
3033 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3034 return -1;
3035 break;
3036
3037 case 0x05: /* BALR - branch and link */
3038 case 0x45: /* BAL - branch and link */
3039 case 0x06: /* BCTR - branch on count */
3040 case 0x46: /* BCT - branch on count */
3041 case 0x0d: /* BASR - branch and save */
3042 case 0x4d: /* BAS - branch and save */
3043 case 0x84: /* BRXH - branch relative on index high */
3044 case 0x85: /* BRXLE - branch relative on index low or equal */
3045 case 0x86: /* BXH - branch on index high */
3046 case 0x87: /* BXLE - branch on index low or equal */
3047 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3048 use 32-bit destination as counter. */
3049 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3050 return -1;
3051 break;
3052
3053 case 0x07: /* BCR - branch on condition */
3054 case 0x47: /* BC - branch on condition */
3055 /* No effect other than PC transfer. */
3056 break;
3057
3058 /* 0x08 undefined */
3059 /* 0x09 undefined */
3060
3061 case 0x0a:
3062 /* SVC - supervisor call */
3063 if (tdep->s390_syscall_record != NULL)
3064 {
3065 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3066 return -1;
3067 }
3068 else
3069 {
3070 printf_unfiltered (_("no syscall record support\n"));
3071 return -1;
3072 }
3073 break;
3074
3075 case 0x0b: /* BSM - branch and set mode */
3076 if (inib[2])
3077 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3078 return -1;
3079 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3080 return -1;
3081 break;
3082
3083 case 0x0c: /* BASSM - branch and save and set mode */
3084 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3085 return -1;
3086 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3087 return -1;
3088 break;
3089
3090 case 0x0e: /* MVCL - move long [interruptible] */
3091 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3092 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3093 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3094 tmp &= 0xffffff;
3095 if (record_full_arch_list_add_mem (oaddr, tmp))
3096 return -1;
3097 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3098 return -1;
3099 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3100 return -1;
3101 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3102 return -1;
3103 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3104 return -1;
3105 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3106 return -1;
3107 break;
3108
3109 case 0x0f: /* CLCL - compare logical long [interruptible] */
3110 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3111 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3112 return -1;
3113 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3114 return -1;
3115 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3116 return -1;
3117 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3118 return -1;
3119 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3120 return -1;
3121 break;
3122
3123 case 0x10: /* LPR - load positive */
3124 case 0x11: /* LNR - load negative */
3125 case 0x12: /* LTR - load and test */
3126 case 0x13: /* LCR - load complement */
3127 case 0x14: /* NR - and */
3128 case 0x16: /* OR - or */
3129 case 0x17: /* XR - xor */
3130 case 0x1a: /* AR - add */
3131 case 0x1b: /* SR - subtract */
3132 case 0x1e: /* ALR - add logical */
3133 case 0x1f: /* SLR - subtract logical */
3134 case 0x54: /* N - and */
3135 case 0x56: /* O - or */
3136 case 0x57: /* X - xor */
3137 case 0x5a: /* A - add */
3138 case 0x5b: /* S - subtract */
3139 case 0x5e: /* AL - add logical */
3140 case 0x5f: /* SL - subtract logical */
3141 case 0x4a: /* AH - add halfword */
3142 case 0x4b: /* SH - subtract halfword */
3143 case 0x8a: /* SRA - shift right single */
3144 case 0x8b: /* SLA - shift left single */
3145 case 0xbf: /* ICM - insert characters under mask */
3146 /* 32-bit destination + flags */
3147 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3148 return -1;
3149 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3150 return -1;
3151 break;
3152
3153 case 0x15: /* CLR - compare logical */
3154 case 0x55: /* CL - compare logical */
3155 case 0x19: /* CR - compare */
3156 case 0x29: /* CDR - compare */
3157 case 0x39: /* CER - compare */
3158 case 0x49: /* CH - compare halfword */
3159 case 0x59: /* C - compare */
3160 case 0x69: /* CD - compare */
3161 case 0x79: /* CE - compare */
3162 case 0x91: /* TM - test under mask */
3163 case 0x95: /* CLI - compare logical */
3164 case 0xbd: /* CLM - compare logical under mask */
3165 case 0xd5: /* CLC - compare logical */
3166 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3167 return -1;
3168 break;
3169
3170 case 0x18: /* LR - load */
3171 case 0x48: /* LH - load halfword */
3172 case 0x58: /* L - load */
3173 case 0x41: /* LA - load address */
3174 case 0x43: /* IC - insert character */
3175 case 0x4c: /* MH - multiply halfword */
3176 case 0x71: /* MS - multiply single */
3177 case 0x88: /* SRL - shift right single logical */
3178 case 0x89: /* SLL - shift left single logical */
3179 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3180 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3181 return -1;
3182 break;
3183
3184 case 0x1c: /* MR - multiply */
3185 case 0x5c: /* M - multiply */
3186 case 0x1d: /* DR - divide */
3187 case 0x5d: /* D - divide */
3188 case 0x8c: /* SRDL - shift right double logical */
3189 case 0x8d: /* SLDL - shift left double logical */
3190 /* 32-bit pair destination, no flags */
3191 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3192 return -1;
3193 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3194 return -1;
3195 break;
3196
3197 case 0x20: /* LPDR - load positive */
3198 case 0x30: /* LPER - load positive */
3199 case 0x21: /* LNDR - load negative */
3200 case 0x31: /* LNER - load negative */
3201 case 0x22: /* LTDR - load and test */
3202 case 0x32: /* LTER - load and test */
3203 case 0x23: /* LCDR - load complement */
3204 case 0x33: /* LCER - load complement */
3205 case 0x2a: /* ADR - add */
3206 case 0x3a: /* AER - add */
3207 case 0x6a: /* AD - add */
3208 case 0x7a: /* AE - add */
3209 case 0x2b: /* SDR - subtract */
3210 case 0x3b: /* SER - subtract */
3211 case 0x6b: /* SD - subtract */
3212 case 0x7b: /* SE - subtract */
3213 case 0x2e: /* AWR - add unnormalized */
3214 case 0x3e: /* AUR - add unnormalized */
3215 case 0x6e: /* AW - add unnormalized */
3216 case 0x7e: /* AU - add unnormalized */
3217 case 0x2f: /* SWR - subtract unnormalized */
3218 case 0x3f: /* SUR - subtract unnormalized */
3219 case 0x6f: /* SW - subtract unnormalized */
3220 case 0x7f: /* SU - subtract unnormalized */
3221 /* float destination + flags */
3222 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3223 return -1;
3224 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3225 return -1;
3226 break;
3227
3228 case 0x24: /* HDR - halve */
3229 case 0x34: /* HER - halve */
3230 case 0x25: /* LDXR - load rounded */
3231 case 0x35: /* LEDR - load rounded */
3232 case 0x28: /* LDR - load */
3233 case 0x38: /* LER - load */
3234 case 0x68: /* LD - load */
3235 case 0x78: /* LE - load */
3236 case 0x2c: /* MDR - multiply */
3237 case 0x3c: /* MDER - multiply */
3238 case 0x6c: /* MD - multiply */
3239 case 0x7c: /* MDE - multiply */
3240 case 0x2d: /* DDR - divide */
3241 case 0x3d: /* DER - divide */
3242 case 0x6d: /* DD - divide */
3243 case 0x7d: /* DE - divide */
3244 /* float destination, no flags */
3245 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3246 return -1;
3247 break;
3248
3249 case 0x26: /* MXR - multiply */
3250 case 0x27: /* MXDR - multiply */
3251 case 0x67: /* MXD - multiply */
3252 /* float pair destination, no flags */
3253 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3254 return -1;
3255 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3256 return -1;
3257 break;
3258
3259 case 0x36: /* AXR - add */
3260 case 0x37: /* SXR - subtract */
3261 /* float pair destination + flags */
3262 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3263 return -1;
3264 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3265 return -1;
3266 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3267 return -1;
3268 break;
3269
3270 case 0x40: /* STH - store halfword */
3271 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3272 if (record_full_arch_list_add_mem (oaddr, 2))
3273 return -1;
3274 break;
3275
3276 case 0x42: /* STC - store character */
3277 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3278 if (record_full_arch_list_add_mem (oaddr, 1))
3279 return -1;
3280 break;
3281
3282 case 0x44: /* EX - execute */
3283 if (ex != -1)
3284 {
3285 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3286 paddress (gdbarch, addr));
3287 return -1;
3288 }
3289 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3290 if (inib[2])
3291 {
3292 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3293 ex = tmp & 0xff;
3294 }
3295 else
3296 {
3297 ex = 0;
3298 }
3299 goto ex;
3300
3301 case 0x4e: /* CVD - convert to decimal */
3302 case 0x60: /* STD - store */
3303 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3304 if (record_full_arch_list_add_mem (oaddr, 8))
3305 return -1;
3306 break;
3307
3308 case 0x4f: /* CVB - convert to binary */
3309 /* 32-bit gpr destination + FPC (DXC write) */
3310 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3311 return -1;
3312 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3313 return -1;
3314 break;
3315
3316 case 0x50: /* ST - store */
3317 case 0x70: /* STE - store */
3318 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3319 if (record_full_arch_list_add_mem (oaddr, 4))
3320 return -1;
3321 break;
3322
3323 case 0x51: /* LAE - load address extended */
3324 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3325 return -1;
3326 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3327 return -1;
3328 break;
3329
3330 /* 0x52 undefined */
3331 /* 0x53 undefined */
3332
3333 /* 0x61-0x66 undefined */
3334
3335 /* 0x72-0x77 undefined */
3336
3337 /* 0x80 privileged: SSM - set system mask */
3338 /* 0x81 undefined */
3339 /* 0x82 privileged: LPSW - load PSW */
3340 /* 0x83 privileged: diagnose */
3341
3342 case 0x8e: /* SRDA - shift right double */
3343 case 0x8f: /* SLDA - shift left double */
3344 /* 32-bit pair destination + flags */
3345 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3346 return -1;
3347 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3348 return -1;
3349 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3350 return -1;
3351 break;
3352
3353 case 0x90: /* STM - store multiple */
3354 case 0x9b: /* STAM - store access multiple */
3355 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3356 if (inib[2] <= inib[3])
3357 n = inib[3] - inib[2] + 1;
3358 else
3359 n = inib[3] + 0x10 - inib[2] + 1;
3360 if (record_full_arch_list_add_mem (oaddr, n * 4))
3361 return -1;
3362 break;
3363
3364 case 0x92: /* MVI - move */
3365 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3366 if (record_full_arch_list_add_mem (oaddr, 1))
3367 return -1;
3368 break;
3369
3370 case 0x93: /* TS - test and set */
3371 case 0x94: /* NI - and */
3372 case 0x96: /* OI - or */
3373 case 0x97: /* XI - xor */
3374 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3375 if (record_full_arch_list_add_mem (oaddr, 1))
3376 return -1;
3377 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3378 return -1;
3379 break;
3380
3381 case 0x98: /* LM - load multiple */
3382 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3383 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3384 return -1;
3385 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3386 return -1;
3387 break;
3388
3389 /* 0x99 privileged: TRACE */
3390
3391 case 0x9a: /* LAM - load access multiple */
3392 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3393 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3394 return -1;
3395 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3396 return -1;
3397 break;
3398
3399 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3400 /* 0xa0-0xa4 undefined */
3401
3402 case 0xa5:
3403 case 0xa7:
3404 /* RI-format instruction */
3405 switch (ibyte[0] << 4 | inib[3])
3406 {
3407 case 0xa50: /* IIHH - insert immediate */
3408 case 0xa51: /* IIHL - insert immediate */
3409 /* high 32-bit destination */
3410 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3411 return -1;
3412 break;
3413
3414 case 0xa52: /* IILH - insert immediate */
3415 case 0xa53: /* IILL - insert immediate */
3416 case 0xa75: /* BRAS - branch relative and save */
3417 case 0xa76: /* BRCT - branch relative on count */
3418 case 0xa78: /* LHI - load halfword immediate */
3419 case 0xa7c: /* MHI - multiply halfword immediate */
3420 /* 32-bit or native destination */
3421 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3422 return -1;
3423 break;
3424
3425 case 0xa54: /* NIHH - and immediate */
3426 case 0xa55: /* NIHL - and immediate */
3427 case 0xa58: /* OIHH - or immediate */
3428 case 0xa59: /* OIHL - or immediate */
3429 /* high 32-bit destination + flags */
3430 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3431 return -1;
3432 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3433 return -1;
3434 break;
3435
3436 case 0xa56: /* NILH - and immediate */
3437 case 0xa57: /* NILL - and immediate */
3438 case 0xa5a: /* OILH - or immediate */
3439 case 0xa5b: /* OILL - or immediate */
3440 case 0xa7a: /* AHI - add halfword immediate */
3441 /* 32-bit destination + flags */
3442 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3443 return -1;
3444 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3445 return -1;
3446 break;
3447
3448 case 0xa5c: /* LLIHH - load logical immediate */
3449 case 0xa5d: /* LLIHL - load logical immediate */
3450 case 0xa5e: /* LLILH - load logical immediate */
3451 case 0xa5f: /* LLILL - load logical immediate */
3452 case 0xa77: /* BRCTG - branch relative on count */
3453 case 0xa79: /* LGHI - load halfword immediate */
3454 case 0xa7d: /* MGHI - multiply halfword immediate */
3455 /* 64-bit destination */
3456 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3457 return -1;
3458 break;
3459
3460 case 0xa70: /* TMLH - test under mask */
3461 case 0xa71: /* TMLL - test under mask */
3462 case 0xa72: /* TMHH - test under mask */
3463 case 0xa73: /* TMHL - test under mask */
3464 case 0xa7e: /* CHI - compare halfword immediate */
3465 case 0xa7f: /* CGHI - compare halfword immediate */
3466 /* flags only */
3467 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3468 return -1;
3469 break;
3470
3471 case 0xa74: /* BRC - branch relative on condition */
3472 /* no register change */
3473 break;
3474
3475 case 0xa7b: /* AGHI - add halfword immediate */
3476 /* 64-bit destination + flags */
3477 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3478 return -1;
3479 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3480 return -1;
3481 break;
3482
3483 default:
3484 goto UNKNOWN_OP;
3485 }
3486 break;
3487
3488 /* 0xa6 undefined */
3489
3490 case 0xa8: /* MVCLE - move long extended [partial] */
3491 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3492 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3493 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3494 if (record_full_arch_list_add_mem (oaddr, tmp))
3495 return -1;
3496 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3497 return -1;
3498 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3499 return -1;
3500 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3501 return -1;
3502 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3503 return -1;
3504 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3505 return -1;
3506 break;
3507
3508 /* 0xaa-0xab undefined */
3509 /* 0xac privileged: STNSM - store then and system mask */
3510 /* 0xad privileged: STOSM - store then or system mask */
3511 /* 0xae privileged: SIGP - signal processor */
3512 /* 0xaf unsupported: MC - monitor call */
3513 /* 0xb0 undefined */
3514 /* 0xb1 privileged: LRA - load real address */
3515
3516 case 0xb2:
3517 case 0xb3:
3518 case 0xb9:
3519 /* S/RRD/RRE/RRF/IE-format instruction */
3520 switch (insn[0])
3521 {
3522 /* 0xb200-0xb204 undefined or privileged */
3523
3524 case 0xb205: /* STCK - store clock */
3525 case 0xb27c: /* STCKF - store clock fast */
3526 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3527 if (record_full_arch_list_add_mem (oaddr, 8))
3528 return -1;
3529 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3530 return -1;
3531 break;
3532
3533 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3534 /* 0xb21a unsupported: CFC */
3535 /* 0xb21b-0xb221 undefined or privileged */
3536
3537 case 0xb222: /* IPM - insert program mask */
3538 case 0xb24f: /* EAR - extract access */
3539 case 0xb252: /* MSR - multiply single */
3540 case 0xb2ec: /* ETND - extract transaction nesting depth */
3541 case 0xb38c: /* EFPC - extract fpc */
3542 case 0xb91f: /* LRVR - load reversed */
3543 case 0xb926: /* LBR - load byte */
3544 case 0xb927: /* LHR - load halfword */
3545 case 0xb994: /* LLCR - load logical character */
3546 case 0xb995: /* LLHR - load logical halfword */
3547 case 0xb9f2: /* LOCR - load on condition */
3548 /* 32-bit gpr destination */
3549 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3550 return -1;
3551 break;
3552
3553 /* 0xb223-0xb22c privileged or unsupported */
3554
3555 case 0xb22d: /* DXR - divide */
3556 case 0xb325: /* LXDR - load lengthened */
3557 case 0xb326: /* LXER - load lengthened */
3558 case 0xb336: /* SQXR - square root */
3559 case 0xb365: /* LXR - load */
3560 case 0xb367: /* FIXR - load fp integer */
3561 case 0xb376: /* LZXR - load zero */
3562 case 0xb3b6: /* CXFR - convert from fixed */
3563 case 0xb3c6: /* CXGR - convert from fixed */
3564 case 0xb3fe: /* IEXTR - insert biased exponent */
3565 /* float pair destination */
3566 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3567 return -1;
3568 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3569 return -1;
3570 break;
3571
3572 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3573
3574 case 0xb241: /* CKSM - checksum [partial] */
3575 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3576 return -1;
3577 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3578 return -1;
3579 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3580 return -1;
3581 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3582 return -1;
3583 break;
3584
3585 /* 0xb242-0xb243 undefined */
3586
3587 case 0xb244: /* SQDR - square root */
3588 case 0xb245: /* SQER - square root */
3589 case 0xb324: /* LDER - load lengthened */
3590 case 0xb337: /* MEER - multiply */
3591 case 0xb366: /* LEXR - load rounded */
3592 case 0xb370: /* LPDFR - load positive */
3593 case 0xb371: /* LNDFR - load negative */
3594 case 0xb372: /* CSDFR - copy sign */
3595 case 0xb373: /* LCDFR - load complement */
3596 case 0xb374: /* LZER - load zero */
3597 case 0xb375: /* LZDR - load zero */
3598 case 0xb377: /* FIER - load fp integer */
3599 case 0xb37f: /* FIDR - load fp integer */
3600 case 0xb3b4: /* CEFR - convert from fixed */
3601 case 0xb3b5: /* CDFR - convert from fixed */
3602 case 0xb3c1: /* LDGR - load fpr from gr */
3603 case 0xb3c4: /* CEGR - convert from fixed */
3604 case 0xb3c5: /* CDGR - convert from fixed */
3605 case 0xb3f6: /* IEDTR - insert biased exponent */
3606 /* float destination */
3607 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3608 return -1;
3609 break;
3610
3611 /* 0xb246-0xb24c: privileged or unsupported */
3612
3613 case 0xb24d: /* CPYA - copy access */
3614 case 0xb24e: /* SAR - set access */
3615 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3616 return -1;
3617 break;
3618
3619 /* 0xb250-0xb251 undefined or privileged */
3620 /* 0xb253-0xb254 undefined or privileged */
3621
3622 case 0xb255: /* MVST - move string [partial] */
3623 {
3624 uint8_t end;
3625 gdb_byte cur;
3626 ULONGEST num = 0;
3627 /* Read ending byte. */
3628 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3629 end = tmp & 0xff;
3630 /* Get address of second operand. */
3631 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3632 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3633 /* Search for ending byte and compute length. */
3634 do {
3635 num++;
3636 if (target_read_memory (oaddr, &cur, 1))
3637 return -1;
3638 oaddr++;
3639 } while (cur != end);
3640 /* Get address of first operand and record it. */
3641 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3642 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3643 if (record_full_arch_list_add_mem (oaddr, num))
3644 return -1;
3645 /* Record the registers. */
3646 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3647 return -1;
3648 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3649 return -1;
3650 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3651 return -1;
3652 }
3653 break;
3654
3655 /* 0xb256 undefined */
3656
3657 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3658 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3659 return -1;
3660 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3661 return -1;
3662 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3663 return -1;
3664 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3665 return -1;
3666 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3667 return -1;
3668 break;
3669
3670 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3671
3672 case 0xb25d: /* CLST - compare logical string [partial] */
3673 case 0xb25e: /* SRST - search string [partial] */
3674 case 0xb9be: /* SRSTU - search string unicode [partial] */
3675 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3676 return -1;
3677 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3678 return -1;
3679 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3680 return -1;
3681 break;
3682
3683 /* 0xb25f-0xb262 undefined */
3684
3685 case 0xb263: /* CMPSC - compression call [interruptible] */
3686 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3687 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3688 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3689 if (record_full_arch_list_add_mem (oaddr, tmp))
3690 return -1;
3691 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3692 return -1;
3693 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3694 return -1;
3695 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3696 return -1;
3697 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3698 return -1;
3699 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3700 return -1;
3701 /* DXC may be written */
3702 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3703 return -1;
3704 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3705 return -1;
3706 break;
3707
3708 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3709
3710 case 0xb278: /* STCKE - store clock extended */
3711 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3712 if (record_full_arch_list_add_mem (oaddr, 16))
3713 return -1;
3714 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3715 return -1;
3716 break;
3717
3718 /* 0xb279-0xb27b undefined or unsupported */
3719 /* 0xb27d-0xb298 undefined or privileged */
3720
3721 case 0xb299: /* SRNM - set rounding mode */
3722 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3723 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3724 case 0xb29d: /* LFPC - load fpc */
3725 case 0xb2bd: /* LFAS - load fpc and signal */
3726 case 0xb384: /* SFPC - set fpc */
3727 case 0xb385: /* SFASR - set fpc and signal */
3728 case 0xb960: /* CGRT - compare and trap */
3729 case 0xb961: /* CLGRT - compare logical and trap */
3730 case 0xb972: /* CRT - compare and trap */
3731 case 0xb973: /* CLRT - compare logical and trap */
3732 /* fpc only - including possible DXC write for trapping insns */
3733 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3734 return -1;
3735 break;
3736
3737 /* 0xb29a-0xb29b undefined */
3738
3739 case 0xb29c: /* STFPC - store fpc */
3740 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3741 if (record_full_arch_list_add_mem (oaddr, 4))
3742 return -1;
3743 break;
3744
3745 /* 0xb29e-0xb2a4 undefined */
3746
3747 case 0xb2a5: /* TRE - translate extended [partial] */
3748 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3749 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3750 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3751 if (record_full_arch_list_add_mem (oaddr, tmp))
3752 return -1;
3753 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3754 return -1;
3755 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3756 return -1;
3757 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3758 return -1;
3759 break;
3760
3761 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3762 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3763 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3764 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3765 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3766 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3767 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3768 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3769 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3770 if (record_full_arch_list_add_mem (oaddr, tmp))
3771 return -1;
3772 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3773 return -1;
3774 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3775 return -1;
3776 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3777 return -1;
3778 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3779 return -1;
3780 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3781 return -1;
3782 break;
3783
3784 /* 0xb2a8-0xb2af undefined */
3785
3786 case 0xb2b0: /* STFLE - store facility list extended */
3787 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3788 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3789 tmp &= 0xff;
3790 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3791 return -1;
3792 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3793 return -1;
3794 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3795 return -1;
3796 break;
3797
3798 /* 0xb2b1-0xb2b7 undefined or privileged */
3799 /* 0xb2ba-0xb2bc undefined */
3800 /* 0xb2be-0xb2e7 undefined */
3801 /* 0xb2e9-0xb2eb undefined */
3802 /* 0xb2ed-0xb2f7 undefined */
3803 /* 0xb2f8 unsupported: TEND */
3804 /* 0xb2f9 undefined */
3805
3806 case 0xb2e8: /* PPA - perform processor assist */
3807 case 0xb2fa: /* NIAI - next instruction access intent */
3808 /* no visible effects */
3809 break;
3810
3811 /* 0xb2fb undefined */
3812 /* 0xb2fc unsupported: TABORT */
3813 /* 0xb2fd-0xb2fe undefined */
3814 /* 0xb2ff unsupported: TRAP */
3815
3816 case 0xb300: /* LPEBR - load positive */
3817 case 0xb301: /* LNEBR - load negative */
3818 case 0xb303: /* LCEBR - load complement */
3819 case 0xb310: /* LPDBR - load positive */
3820 case 0xb311: /* LNDBR - load negative */
3821 case 0xb313: /* LCDBR - load complement */
3822 case 0xb350: /* TBEDR - convert hfp to bfp */
3823 case 0xb351: /* TBDR - convert hfp to bfp */
3824 case 0xb358: /* THDER - convert bfp to hfp */
3825 case 0xb359: /* THDR - convert bfp to hfp */
3826 /* float destination + flags */
3827 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3828 return -1;
3829 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3830 return -1;
3831 break;
3832
3833 case 0xb304: /* LDEBR - load lengthened */
3834 case 0xb30c: /* MDEBR - multiply */
3835 case 0xb30d: /* DEBR - divide */
3836 case 0xb314: /* SQEBR - square root */
3837 case 0xb315: /* SQDBR - square root */
3838 case 0xb317: /* MEEBR - multiply */
3839 case 0xb31c: /* MDBR - multiply */
3840 case 0xb31d: /* DDBR - divide */
3841 case 0xb344: /* LEDBRA - load rounded */
3842 case 0xb345: /* LDXBRA - load rounded */
3843 case 0xb346: /* LEXBRA - load rounded */
3844 case 0xb357: /* FIEBRA - load fp integer */
3845 case 0xb35f: /* FIDBRA - load fp integer */
3846 case 0xb390: /* CELFBR - convert from logical */
3847 case 0xb391: /* CDLFBR - convert from logical */
3848 case 0xb394: /* CEFBR - convert from fixed */
3849 case 0xb395: /* CDFBR - convert from fixed */
3850 case 0xb3a0: /* CELGBR - convert from logical */
3851 case 0xb3a1: /* CDLGBR - convert from logical */
3852 case 0xb3a4: /* CEGBR - convert from fixed */
3853 case 0xb3a5: /* CDGBR - convert from fixed */
3854 case 0xb3d0: /* MDTR - multiply */
3855 case 0xb3d1: /* DDTR - divide */
3856 case 0xb3d4: /* LDETR - load lengthened */
3857 case 0xb3d5: /* LEDTR - load lengthened */
3858 case 0xb3d7: /* FIDTR - load fp integer */
3859 case 0xb3dd: /* LDXTR - load lengthened */
3860 case 0xb3f1: /* CDGTR - convert from fixed */
3861 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3862 case 0xb3f3: /* CDSTR - convert from signed packed */
3863 case 0xb3f5: /* QADTR - quantize */
3864 case 0xb3f7: /* RRDTR - reround */
3865 case 0xb951: /* CDFTR - convert from fixed */
3866 case 0xb952: /* CDLGTR - convert from logical */
3867 case 0xb953: /* CDLFTR - convert from logical */
3868 /* float destination + fpc */
3869 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3870 return -1;
3871 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3872 return -1;
3873 break;
3874
3875 case 0xb305: /* LXDBR - load lengthened */
3876 case 0xb306: /* LXEBR - load lengthened */
3877 case 0xb307: /* MXDBR - multiply */
3878 case 0xb316: /* SQXBR - square root */
3879 case 0xb34c: /* MXBR - multiply */
3880 case 0xb34d: /* DXBR - divide */
3881 case 0xb347: /* FIXBRA - load fp integer */
3882 case 0xb392: /* CXLFBR - convert from logical */
3883 case 0xb396: /* CXFBR - convert from fixed */
3884 case 0xb3a2: /* CXLGBR - convert from logical */
3885 case 0xb3a6: /* CXGBR - convert from fixed */
3886 case 0xb3d8: /* MXTR - multiply */
3887 case 0xb3d9: /* DXTR - divide */
3888 case 0xb3dc: /* LXDTR - load lengthened */
3889 case 0xb3df: /* FIXTR - load fp integer */
3890 case 0xb3f9: /* CXGTR - convert from fixed */
3891 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3892 case 0xb3fb: /* CXSTR - convert from signed packed */
3893 case 0xb3fd: /* QAXTR - quantize */
3894 case 0xb3ff: /* RRXTR - reround */
3895 case 0xb959: /* CXFTR - convert from fixed */
3896 case 0xb95a: /* CXLGTR - convert from logical */
3897 case 0xb95b: /* CXLFTR - convert from logical */
3898 /* float pair destination + fpc */
3899 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3900 return -1;
3901 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3902 return -1;
3903 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3904 return -1;
3905 break;
3906
3907 case 0xb308: /* KEBR - compare and signal */
3908 case 0xb309: /* CEBR - compare */
3909 case 0xb318: /* KDBR - compare and signal */
3910 case 0xb319: /* CDBR - compare */
3911 case 0xb348: /* KXBR - compare and signal */
3912 case 0xb349: /* CXBR - compare */
3913 case 0xb3e0: /* KDTR - compare and signal */
3914 case 0xb3e4: /* CDTR - compare */
3915 case 0xb3e8: /* KXTR - compare and signal */
3916 case 0xb3ec: /* CXTR - compare */
3917 /* flags + fpc only */
3918 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3919 return -1;
3920 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3921 return -1;
3922 break;
3923
3924 case 0xb302: /* LTEBR - load and test */
3925 case 0xb312: /* LTDBR - load and test */
3926 case 0xb30a: /* AEBR - add */
3927 case 0xb30b: /* SEBR - subtract */
3928 case 0xb31a: /* ADBR - add */
3929 case 0xb31b: /* SDBR - subtract */
3930 case 0xb3d2: /* ADTR - add */
3931 case 0xb3d3: /* SDTR - subtract */
3932 case 0xb3d6: /* LTDTR - load and test */
3933 /* float destination + flags + fpc */
3934 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3935 return -1;
3936 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3937 return -1;
3938 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3939 return -1;
3940 break;
3941
3942 case 0xb30e: /* MAEBR - multiply and add */
3943 case 0xb30f: /* MSEBR - multiply and subtract */
3944 case 0xb31e: /* MADBR - multiply and add */
3945 case 0xb31f: /* MSDBR - multiply and subtract */
3946 /* float destination [RRD] + fpc */
3947 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3948 return -1;
3949 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3950 return -1;
3951 break;
3952
3953 /* 0xb320-0xb323 undefined */
3954 /* 0xb327-0xb32d undefined */
3955
3956 case 0xb32e: /* MAER - multiply and add */
3957 case 0xb32f: /* MSER - multiply and subtract */
3958 case 0xb338: /* MAYLR - multiply and add unnormalized */
3959 case 0xb339: /* MYLR - multiply unnormalized */
3960 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3961 case 0xb33d: /* MYHR - multiply unnormalized */
3962 case 0xb33e: /* MADR - multiply and add */
3963 case 0xb33f: /* MSDR - multiply and subtract */
3964 /* float destination [RRD] */
3965 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3966 return -1;
3967 break;
3968
3969 /* 0xb330-0xb335 undefined */
3970
3971 case 0xb33a: /* MAYR - multiply and add unnormalized */
3972 case 0xb33b: /* MYR - multiply unnormalized */
3973 /* float pair destination [RRD] */
3974 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3975 return -1;
3976 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
3977 return -1;
3978 break;
3979
3980 case 0xb340: /* LPXBR - load positive */
3981 case 0xb341: /* LNXBR - load negative */
3982 case 0xb343: /* LCXBR - load complement */
3983 case 0xb360: /* LPXR - load positive */
3984 case 0xb361: /* LNXR - load negative */
3985 case 0xb362: /* LTXR - load and test */
3986 case 0xb363: /* LCXR - load complement */
3987 /* float pair destination + flags */
3988 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3989 return -1;
3990 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3991 return -1;
3992 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3993 return -1;
3994 break;
3995
3996 case 0xb342: /* LTXBR - load and test */
3997 case 0xb34a: /* AXBR - add */
3998 case 0xb34b: /* SXBR - subtract */
3999 case 0xb3da: /* AXTR - add */
4000 case 0xb3db: /* SXTR - subtract */
4001 case 0xb3de: /* LTXTR - load and test */
4002 /* float pair destination + flags + fpc */
4003 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4004 return -1;
4005 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4006 return -1;
4007 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4008 return -1;
4009 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4010 return -1;
4011 break;
4012
4013 /* 0xb34e-0xb34f undefined */
4014 /* 0xb352 undefined */
4015
4016 case 0xb353: /* DIEBR - divide to integer */
4017 case 0xb35b: /* DIDBR - divide to integer */
4018 /* two float destinations + flags + fpc */
4019 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4020 return -1;
4021 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4022 return -1;
4023 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4024 return -1;
4025 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4026 return -1;
4027 break;
4028
4029 /* 0xb354-0xb356 undefined */
4030 /* 0xb35a undefined */
4031
4032 /* 0xb35c-0xb35e undefined */
4033 /* 0xb364 undefined */
4034 /* 0xb368 undefined */
4035
4036 case 0xb369: /* CXR - compare */
4037 case 0xb3f4: /* CEDTR - compare biased exponent */
4038 case 0xb3fc: /* CEXTR - compare biased exponent */
4039 case 0xb920: /* CGR - compare */
4040 case 0xb921: /* CLGR - compare logical */
4041 case 0xb930: /* CGFR - compare */
4042 case 0xb931: /* CLGFR - compare logical */
4043 case 0xb9cd: /* CHHR - compare high */
4044 case 0xb9cf: /* CLHHR - compare logical high */
4045 case 0xb9dd: /* CHLR - compare high */
4046 case 0xb9df: /* CLHLR - compare logical high */
4047 /* flags only */
4048 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4049 return -1;
4050 break;
4051
4052 /* 0xb36a-0xb36f undefined */
4053 /* 0xb377-0xb37e undefined */
4054 /* 0xb380-0xb383 undefined */
4055 /* 0xb386-0xb38b undefined */
4056 /* 0xb38d-0xb38f undefined */
4057 /* 0xb393 undefined */
4058 /* 0xb397 undefined */
4059
4060 case 0xb398: /* CFEBR - convert to fixed */
4061 case 0xb399: /* CFDBR - convert to fixed */
4062 case 0xb39a: /* CFXBR - convert to fixed */
4063 case 0xb39c: /* CLFEBR - convert to logical */
4064 case 0xb39d: /* CLFDBR - convert to logical */
4065 case 0xb39e: /* CLFXBR - convert to logical */
4066 case 0xb941: /* CFDTR - convert to fixed */
4067 case 0xb949: /* CFXTR - convert to fixed */
4068 case 0xb943: /* CLFDTR - convert to logical */
4069 case 0xb94b: /* CLFXTR - convert to logical */
4070 /* 32-bit gpr destination + flags + fpc */
4071 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4072 return -1;
4073 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4074 return -1;
4075 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4076 return -1;
4077 break;
4078
4079 /* 0xb39b undefined */
4080 /* 0xb39f undefined */
4081
4082 /* 0xb3a3 undefined */
4083 /* 0xb3a7 undefined */
4084
4085 case 0xb3a8: /* CGEBR - convert to fixed */
4086 case 0xb3a9: /* CGDBR - convert to fixed */
4087 case 0xb3aa: /* CGXBR - convert to fixed */
4088 case 0xb3ac: /* CLGEBR - convert to logical */
4089 case 0xb3ad: /* CLGDBR - convert to logical */
4090 case 0xb3ae: /* CLGXBR - convert to logical */
4091 case 0xb3e1: /* CGDTR - convert to fixed */
4092 case 0xb3e9: /* CGXTR - convert to fixed */
4093 case 0xb942: /* CLGDTR - convert to logical */
4094 case 0xb94a: /* CLGXTR - convert to logical */
4095 /* 64-bit gpr destination + flags + fpc */
4096 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4097 return -1;
4098 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4099 return -1;
4100 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4101 return -1;
4102 break;
4103
4104 /* 0xb3ab undefined */
4105 /* 0xb3af-0xb3b3 undefined */
4106 /* 0xb3b7 undefined */
4107
4108 case 0xb3b8: /* CFER - convert to fixed */
4109 case 0xb3b9: /* CFDR - convert to fixed */
4110 case 0xb3ba: /* CFXR - convert to fixed */
4111 case 0xb998: /* ALCR - add logical with carry */
4112 case 0xb999: /* SLBR - subtract logical with borrow */
4113 case 0xb9f4: /* NRK - and */
4114 case 0xb9f6: /* ORK - or */
4115 case 0xb9f7: /* XRK - xor */
4116 case 0xb9f8: /* ARK - add */
4117 case 0xb9f9: /* SRK - subtract */
4118 case 0xb9fa: /* ALRK - add logical */
4119 case 0xb9fb: /* SLRK - subtract logical */
4120 /* 32-bit gpr destination + flags */
4121 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4122 return -1;
4123 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4124 return -1;
4125 break;
4126
4127 case 0xb3c8: /* CGER - convert to fixed */
4128 case 0xb3c9: /* CGDR - convert to fixed */
4129 case 0xb3ca: /* CGXR - convert to fixed */
4130 case 0xb900: /* LPGR - load positive */
4131 case 0xb901: /* LNGR - load negative */
4132 case 0xb902: /* LTGR - load and test */
4133 case 0xb903: /* LCGR - load complement */
4134 case 0xb908: /* AGR - add */
4135 case 0xb909: /* SGR - subtract */
4136 case 0xb90a: /* ALGR - add logical */
4137 case 0xb90b: /* SLGR - subtract logical */
4138 case 0xb910: /* LPGFR - load positive */
4139 case 0xb911: /* LNGFR - load negative */
4140 case 0xb912: /* LTGFR - load and test */
4141 case 0xb913: /* LCGFR - load complement */
4142 case 0xb918: /* AGFR - add */
4143 case 0xb919: /* SGFR - subtract */
4144 case 0xb91a: /* ALGFR - add logical */
4145 case 0xb91b: /* SLGFR - subtract logical */
4146 case 0xb980: /* NGR - and */
4147 case 0xb981: /* OGR - or */
4148 case 0xb982: /* XGR - xor */
4149 case 0xb988: /* ALCGR - add logical with carry */
4150 case 0xb989: /* SLBGR - subtract logical with borrow */
4151 case 0xb9e1: /* POPCNT - population count */
4152 case 0xb9e4: /* NGRK - and */
4153 case 0xb9e6: /* OGRK - or */
4154 case 0xb9e7: /* XGRK - xor */
4155 case 0xb9e8: /* AGRK - add */
4156 case 0xb9e9: /* SGRK - subtract */
4157 case 0xb9ea: /* ALGRK - add logical */
4158 case 0xb9eb: /* SLGRK - subtract logical */
4159 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4160 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4161 /* 64-bit gpr destination + flags */
4162 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4163 return -1;
4164 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4165 return -1;
4166 break;
4167
4168 /* 0xb3bb-0xb3c0 undefined */
4169 /* 0xb3c2-0xb3c3 undefined */
4170 /* 0xb3c7 undefined */
4171 /* 0xb3cb-0xb3cc undefined */
4172
4173 case 0xb3cd: /* LGDR - load gr from fpr */
4174 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4175 case 0xb3e3: /* CSDTR - convert to signed packed */
4176 case 0xb3e5: /* EEDTR - extract biased exponent */
4177 case 0xb3e7: /* ESDTR - extract significance */
4178 case 0xb3ed: /* EEXTR - extract biased exponent */
4179 case 0xb3ef: /* ESXTR - extract significance */
4180 case 0xb904: /* LGR - load */
4181 case 0xb906: /* LGBR - load byte */
4182 case 0xb907: /* LGHR - load halfword */
4183 case 0xb90c: /* MSGR - multiply single */
4184 case 0xb90f: /* LRVGR - load reversed */
4185 case 0xb914: /* LGFR - load */
4186 case 0xb916: /* LLGFR - load logical */
4187 case 0xb917: /* LLGTR - load logical thirty one bits */
4188 case 0xb91c: /* MSGFR - multiply single 64<32 */
4189 case 0xb946: /* BCTGR - branch on count */
4190 case 0xb984: /* LLGCR - load logical character */
4191 case 0xb985: /* LLGHR - load logical halfword */
4192 case 0xb9e2: /* LOCGR - load on condition */
4193 /* 64-bit gpr destination */
4194 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4195 return -1;
4196 break;
4197
4198 /* 0xb3ce-0xb3cf undefined */
4199 /* 0xb3e6 undefined */
4200
4201 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4202 case 0xb3eb: /* CSXTR - convert to signed packed */
4203 case 0xb90d: /* DSGR - divide single */
4204 case 0xb91d: /* DSGFR - divide single */
4205 case 0xb986: /* MLGR - multiply logical */
4206 case 0xb987: /* DLGR - divide logical */
4207 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4208 /* 64-bit gpr pair destination */
4209 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4210 return -1;
4211 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4212 return -1;
4213 break;
4214
4215 /* 0xb3ee undefined */
4216 /* 0xb3f0 undefined */
4217 /* 0xb3f8 undefined */
4218
4219 /* 0xb905 privileged */
4220
4221 /* 0xb90e unsupported: EREGG */
4222
4223 /* 0xb915 undefined */
4224
4225 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4226 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4227 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4228 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4229 tmp &= 0xff;
4230 switch (tmp)
4231 {
4232 case 0x00: /* KMAC-Query */
4233 if (record_full_arch_list_add_mem (oaddr, 16))
4234 return -1;
4235 break;
4236
4237 case 0x01: /* KMAC-DEA */
4238 case 0x02: /* KMAC-TDEA-128 */
4239 case 0x03: /* KMAC-TDEA-192 */
4240 case 0x09: /* KMAC-Encrypted-DEA */
4241 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4242 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4243 if (record_full_arch_list_add_mem (oaddr, 8))
4244 return -1;
4245 break;
4246
4247 case 0x12: /* KMAC-AES-128 */
4248 case 0x13: /* KMAC-AES-192 */
4249 case 0x14: /* KMAC-AES-256 */
4250 case 0x1a: /* KMAC-Encrypted-AES-128 */
4251 case 0x1b: /* KMAC-Encrypted-AES-192 */
4252 case 0x1c: /* KMAC-Encrypted-AES-256 */
4253 if (record_full_arch_list_add_mem (oaddr, 16))
4254 return -1;
4255 break;
4256
4257 default:
4258 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4259 (int)tmp, paddress (gdbarch, addr));
4260 return -1;
4261 }
4262 if (tmp != 0)
4263 {
4264 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4265 return -1;
4266 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4267 return -1;
4268 }
4269 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4270 return -1;
4271 break;
4272
4273 /* 0xb922-0xb924 undefined */
4274 /* 0xb925 privileged */
4275 /* 0xb928 privileged */
4276
4277 case 0xb929: /* KMA - cipher message with authentication */
4278 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4279 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4280 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4281 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4282 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4283 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4284 tmp &= 0x7f;
4285 switch (tmp)
4286 {
4287 case 0x00: /* KM*-Query */
4288 if (record_full_arch_list_add_mem (oaddr, 16))
4289 return -1;
4290 break;
4291
4292 case 0x01: /* KM*-DEA */
4293 case 0x02: /* KM*-TDEA-128 */
4294 case 0x03: /* KM*-TDEA-192 */
4295 case 0x09: /* KM*-Encrypted-DEA */
4296 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4297 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4298 if (record_full_arch_list_add_mem (oaddr, 8))
4299 return -1;
4300 break;
4301
4302 case 0x12: /* KM*-AES-128 */
4303 case 0x13: /* KM*-AES-192 */
4304 case 0x14: /* KM*-AES-256 */
4305 case 0x1a: /* KM*-Encrypted-AES-128 */
4306 case 0x1b: /* KM*-Encrypted-AES-192 */
4307 case 0x1c: /* KM*-Encrypted-AES-256 */
4308 if (record_full_arch_list_add_mem (oaddr, 16))
4309 return -1;
4310 break;
4311
4312 case 0x43: /* KMC-PRNG */
4313 /* Only valid for KMC. */
4314 if (insn[0] == 0xb92f)
4315 {
4316 if (record_full_arch_list_add_mem (oaddr, 8))
4317 return -1;
4318 break;
4319 }
86a73007
TT
4320 /* For other instructions... */
4321 /* Fall through. */
ef8914a4
PR
4322 default:
4323 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4324 (int)tmp, paddress (gdbarch, addr));
4325 return -1;
4326 }
4327 if (tmp != 0)
4328 {
4329 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4330 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4331 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4332 if (record_full_arch_list_add_mem (oaddr2, tmp))
4333 return -1;
4334 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4335 return -1;
4336 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4337 return -1;
4338 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4339 return -1;
4340 }
4341 if (tmp != 0 && insn[0] == 0xb929)
4342 {
4343 if (record_full_arch_list_add_reg (regcache,
4344 S390_R0_REGNUM + inib[4]))
4345 return -1;
4346 if (record_full_arch_list_add_reg (regcache,
4347 S390_R0_REGNUM + (inib[4] | 1)))
4348 return -1;
4349 }
4350 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4351 return -1;
4352 break;
4353
4354 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4355 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4356 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4357 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4358 tmp &= 0x7f;
4359 switch (tmp)
4360 {
4361 case 0x00: /* PCC-Query */
4362 if (record_full_arch_list_add_mem (oaddr, 16))
4363 return -1;
4364 break;
4365
4366 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4367 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4368 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4369 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4370 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4371 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4372 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4373 return -1;
4374 break;
4375
4376 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4377 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4378 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4379 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4380 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4381 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4382 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4383 return -1;
4384 break;
4385
4386 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4387 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4388 return -1;
4389 break;
4390
4391 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4392 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4393 return -1;
4394 break;
4395
4396 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4397 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4398 return -1;
4399 break;
4400
4401 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4402 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4403 return -1;
4404 break;
4405
4406 default:
4407 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4408 (int)tmp, paddress (gdbarch, addr));
4409 return -1;
4410 }
4411 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4412 return -1;
4413 break;
4414
4415 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4416 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4417 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4418 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4419 tmp &= 0x7f;
4420 switch (tmp)
4421 {
4422 case 0x00: /* KMCTR-Query */
4423 if (record_full_arch_list_add_mem (oaddr, 16))
4424 return -1;
4425 break;
4426
4427 case 0x01: /* KMCTR-DEA */
4428 case 0x02: /* KMCTR-TDEA-128 */
4429 case 0x03: /* KMCTR-TDEA-192 */
4430 case 0x09: /* KMCTR-Encrypted-DEA */
4431 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4432 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4433 case 0x12: /* KMCTR-AES-128 */
4434 case 0x13: /* KMCTR-AES-192 */
4435 case 0x14: /* KMCTR-AES-256 */
4436 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4437 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4438 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4439 break;
4440
4441 default:
4442 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4443 (int)tmp, paddress (gdbarch, addr));
4444 return -1;
4445 }
4446 if (tmp != 0)
4447 {
4448 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4449 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4450 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4451 if (record_full_arch_list_add_mem (oaddr2, tmp))
4452 return -1;
4453 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4454 return -1;
4455 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4456 return -1;
4457 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4458 return -1;
4459 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4460 return -1;
4461 }
4462 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4463 return -1;
4464 break;
4465
4466 case 0xb92e: /* KM - cipher message [partial] */
4467 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4468 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4469 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4470 tmp &= 0x7f;
4471 switch (tmp)
4472 {
4473 case 0x00: /* KM-Query */
4474 if (record_full_arch_list_add_mem (oaddr, 16))
4475 return -1;
4476 break;
4477
4478 case 0x01: /* KM-DEA */
4479 case 0x02: /* KM-TDEA-128 */
4480 case 0x03: /* KM-TDEA-192 */
4481 case 0x09: /* KM-Encrypted-DEA */
4482 case 0x0a: /* KM-Encrypted-TDEA-128 */
4483 case 0x0b: /* KM-Encrypted-TDEA-192 */
4484 case 0x12: /* KM-AES-128 */
4485 case 0x13: /* KM-AES-192 */
4486 case 0x14: /* KM-AES-256 */
4487 case 0x1a: /* KM-Encrypted-AES-128 */
4488 case 0x1b: /* KM-Encrypted-AES-192 */
4489 case 0x1c: /* KM-Encrypted-AES-256 */
4490 break;
4491
4492 case 0x32: /* KM-XTS-AES-128 */
4493 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4494 return -1;
4495 break;
4496
4497 case 0x34: /* KM-XTS-AES-256 */
4498 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4499 return -1;
4500 break;
4501
4502 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4503 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4504 return -1;
4505 break;
4506
4507 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4508 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4509 return -1;
4510 break;
4511
4512 default:
4513 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4514 (int)tmp, paddress (gdbarch, addr));
4515 return -1;
4516 }
4517 if (tmp != 0)
4518 {
4519 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4520 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4521 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4522 if (record_full_arch_list_add_mem (oaddr2, tmp))
4523 return -1;
4524 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4525 return -1;
4526 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4527 return -1;
4528 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4529 return -1;
4530 }
4531 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4532 return -1;
4533 break;
4534
4535 /* 0xb932-0xb93b undefined */
4536
4537 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4538 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4539 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4540 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4541 tmp &= 0xff;
4542 switch (tmp)
4543 {
4544 case 0x00: /* PPNO-Query */
4545 case 0x80: /* PPNO-Query */
4546 if (record_full_arch_list_add_mem (oaddr, 16))
4547 return -1;
4548 break;
4549
4550 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4551 if (record_full_arch_list_add_mem (oaddr, 240))
4552 return -1;
4553 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4554 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4555 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4556 if (record_full_arch_list_add_mem (oaddr2, tmp))
4557 return -1;
4558 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4559 return -1;
4560 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4561 return -1;
4562 break;
4563
4564 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4565 if (record_full_arch_list_add_mem (oaddr, 240))
4566 return -1;
4567 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4568 return -1;
4569 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4570 return -1;
4571 break;
4572
4573 default:
4574 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4575 (int)tmp, paddress (gdbarch, addr));
4576 return -1;
4577 }
4578 /* DXC may be written */
4579 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4580 return -1;
4581 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4582 return -1;
4583 break;
4584
4585 /* 0xb93d undefined */
4586
4587 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4588 case 0xb93f: /* KLMD - compute last message digest [partial] */
4589 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4590 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4591 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4592 tmp &= 0xff;
4593 switch (tmp)
4594 {
4595 case 0x00: /* K*MD-Query */
4596 if (record_full_arch_list_add_mem (oaddr, 16))
4597 return -1;
4598 break;
4599
4600 case 0x01: /* K*MD-SHA-1 */
4601 if (record_full_arch_list_add_mem (oaddr, 20))
4602 return -1;
4603 break;
4604
4605 case 0x02: /* K*MD-SHA-256 */
4606 if (record_full_arch_list_add_mem (oaddr, 32))
4607 return -1;
4608 break;
4609
4610 case 0x03: /* K*MD-SHA-512 */
4611 if (record_full_arch_list_add_mem (oaddr, 64))
4612 return -1;
4613 break;
4614
4615 case 0x41: /* KIMD-GHASH */
4616 /* Only valid for KIMD. */
4617 if (insn[0] == 0xb93e)
4618 {
4619 if (record_full_arch_list_add_mem (oaddr, 16))
4620 return -1;
4621 break;
4622 }
86a73007
TT
4623 /* For KLMD... */
4624 /* Fall through. */
ef8914a4
PR
4625 default:
4626 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4627 (int)tmp, paddress (gdbarch, addr));
4628 return -1;
4629 }
4630 if (tmp != 0)
4631 {
4632 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4633 return -1;
4634 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4635 return -1;
4636 }
4637 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4638 return -1;
4639 break;
4640
4641 /* 0xb940 undefined */
4642 /* 0xb944-0xb945 undefined */
4643 /* 0xb947-0xb948 undefined */
4644 /* 0xb94c-0xb950 undefined */
4645 /* 0xb954-0xb958 undefined */
4646 /* 0xb95c-0xb95f undefined */
4647 /* 0xb962-0xb971 undefined */
4648 /* 0xb974-0xb97f undefined */
4649
4650 case 0xb983: /* FLOGR - find leftmost one */
4651 /* 64-bit gpr pair destination + flags */
4652 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4653 return -1;
4654 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4655 return -1;
4656 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4657 return -1;
4658 break;
4659
4660 /* 0xb98a privileged */
4661 /* 0xb98b-0xb98c undefined */
4662
4663 case 0xb98d: /* EPSW - extract psw */
4664 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4665 return -1;
4666 if (inib[7])
4667 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4668 return -1;
4669 break;
4670
4671 /* 0xb98e-0xb98f privileged */
4672
4673 case 0xb990: /* TRTT - translate two to two [partial] */
4674 case 0xb991: /* TRTO - translate two to one [partial] */
4675 case 0xb992: /* TROT - translate one to two [partial] */
4676 case 0xb993: /* TROO - translate one to one [partial] */
4677 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4678 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4679 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4680 /* tmp is source length, we want destination length. Adjust. */
4681 if (insn[0] == 0xb991)
4682 tmp >>= 1;
4683 if (insn[0] == 0xb992)
4684 tmp <<= 1;
4685 if (record_full_arch_list_add_mem (oaddr, tmp))
4686 return -1;
4687 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4688 return -1;
4689 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4690 return -1;
4691 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4692 return -1;
4693 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4694 return -1;
4695 break;
4696
4697 case 0xb996: /* MLR - multiply logical */
4698 case 0xb997: /* DLR - divide logical */
4699 /* 32-bit gpr pair destination */
4700 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4701 return -1;
4702 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4703 return -1;
4704 break;
4705
4706 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4707 /* 0xb9b4-0xb9bc undefined */
4708
4709 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4710 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4711 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4712 return -1;
4713 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4714 return -1;
4715 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4716 return -1;
4717 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4718 return -1;
4719 break;
4720
4721 /* 0xb9c0-0xb9c7 undefined */
4722
4723 case 0xb9c8: /* AHHHR - add high */
4724 case 0xb9c9: /* SHHHR - subtract high */
4725 case 0xb9ca: /* ALHHHR - add logical high */
4726 case 0xb9cb: /* SLHHHR - subtract logical high */
4727 case 0xb9d8: /* AHHLR - add high */
4728 case 0xb9d9: /* SHHLR - subtract high */
4729 case 0xb9da: /* ALHHLR - add logical high */
4730 case 0xb9db: /* SLHHLR - subtract logical high */
4731 /* 32-bit high gpr destination + flags */
4732 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4733 return -1;
4734 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4735 return -1;
4736 break;
4737
4738 /* 0xb9cc undefined */
4739 /* 0xb9ce undefined */
4740 /* 0xb9d0-0xb9d7 undefined */
4741 /* 0xb9dc undefined */
4742 /* 0xb9de undefined */
4743
4744 case 0xb9e0: /* LOCFHR - load high on condition */
4745 /* 32-bit high gpr destination */
4746 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4747 return -1;
4748 break;
4749
4750 /* 0xb9e3 undefined */
4751 /* 0xb9e5 undefined */
4752 /* 0xb9ee-0xb9f1 undefined */
4753 /* 0xb9f3 undefined */
4754 /* 0xb9f5 undefined */
4755 /* 0xb9fc undefined */
4756 /* 0xb9fe -0xb9ff undefined */
4757
4758 default:
4759 goto UNKNOWN_OP;
4760 }
4761 break;
4762
4763 /* 0xb4-0xb5 undefined */
4764 /* 0xb6 privileged: STCTL - store control */
4765 /* 0xb7 privileged: LCTL - load control */
4766 /* 0xb8 undefined */
4767
4768 case 0xba: /* CS - compare and swap */
4769 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4770 if (record_full_arch_list_add_mem (oaddr, 4))
4771 return -1;
4772 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4773 return -1;
4774 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4775 return -1;
4776 break;
4777
4778 case 0xbb: /* CDS - compare double and swap */
4779 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4780 if (record_full_arch_list_add_mem (oaddr, 8))
4781 return -1;
4782 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4783 return -1;
4784 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4785 return -1;
4786 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4787 return -1;
4788 break;
4789
4790 /* 0xbc undefined */
4791
4792 case 0xbe: /* STCM - store characters under mask */
4793 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4794 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4795 return -1;
4796 break;
4797
4798 case 0xc0:
4799 case 0xc2:
4800 case 0xc4:
4801 case 0xc6:
4802 case 0xcc:
4803 /* RIL-format instruction */
4804 switch (ibyte[0] << 4 | inib[3])
4805 {
4806 case 0xc00: /* LARL - load address relative long */
4807 case 0xc05: /* BRASL - branch relative and save long */
4808 case 0xc09: /* IILF - insert immediate */
4809 case 0xc21: /* MSFI - multiply single immediate */
4810 case 0xc42: /* LLHRL - load logical halfword relative long */
4811 case 0xc45: /* LHRL - load halfword relative long */
4812 case 0xc4d: /* LRL - load relative long */
4813 /* 32-bit or native gpr destination */
4814 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4815 return -1;
4816 break;
4817
4818 case 0xc01: /* LGFI - load immediate */
4819 case 0xc0e: /* LLIHF - load logical immediate */
4820 case 0xc0f: /* LLILF - load logical immediate */
4821 case 0xc20: /* MSGFI - multiply single immediate */
4822 case 0xc44: /* LGHRL - load halfword relative long */
4823 case 0xc46: /* LLGHRL - load logical halfword relative long */
4824 case 0xc48: /* LGRL - load relative long */
4825 case 0xc4c: /* LGFRL - load relative long */
4826 case 0xc4e: /* LLGFRL - load logical relative long */
4827 /* 64-bit gpr destination */
4828 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4829 return -1;
4830 break;
4831
4832 /* 0xc02-0xc03 undefined */
4833
4834 case 0xc04: /* BRCL - branch relative on condition long */
4835 case 0xc62: /* PFDRL - prefetch data relative long */
4836 break;
4837
4838 case 0xc06: /* XIHF - xor immediate */
4839 case 0xc0a: /* NIHF - and immediate */
4840 case 0xc0c: /* OIHF - or immediate */
4841 case 0xcc8: /* AIH - add immediate high */
4842 case 0xcca: /* ALSIH - add logical with signed immediate high */
4843 /* 32-bit high gpr destination + flags */
4844 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4845 return -1;
4846 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4847 return -1;
4848 break;
4849
4850 case 0xc07: /* XILF - xor immediate */
4851 case 0xc0b: /* NILF - and immediate */
4852 case 0xc0d: /* OILF - or immediate */
4853 case 0xc25: /* SLFI - subtract logical immediate */
4854 case 0xc29: /* AFI - add immediate */
4855 case 0xc2b: /* ALFI - add logical immediate */
4856 /* 32-bit gpr destination + flags */
4857 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4858 return -1;
4859 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4860 return -1;
4861 break;
4862
4863 case 0xc08: /* IIHF - insert immediate */
4864 case 0xcc6: /* BRCTH - branch relative on count high */
4865 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4866 /* 32-bit high gpr destination */
4867 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4868 return -1;
4869 break;
4870
4871 /* 0xc22-0xc23 undefined */
4872
4873 case 0xc24: /* SLGFI - subtract logical immediate */
4874 case 0xc28: /* AGFI - add immediate */
4875 case 0xc2a: /* ALGFI - add logical immediate */
4876 /* 64-bit gpr destination + flags */
4877 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4878 return -1;
4879 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4880 return -1;
4881 break;
4882
4883 /* 0xc26-0xc27 undefined */
4884
4885 case 0xc2c: /* CGFI - compare immediate */
4886 case 0xc2d: /* CFI - compare immediate */
4887 case 0xc2e: /* CLGFI - compare logical immediate */
4888 case 0xc2f: /* CLFI - compare logical immediate */
4889 case 0xc64: /* CGHRL - compare halfword relative long */
4890 case 0xc65: /* CHRL - compare halfword relative long */
4891 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4892 case 0xc67: /* CLHRL - compare logical halfword relative long */
4893 case 0xc68: /* CGRL - compare relative long */
4894 case 0xc6a: /* CLGRL - compare logical relative long */
4895 case 0xc6c: /* CGFRL - compare relative long */
4896 case 0xc6d: /* CRL - compare relative long */
4897 case 0xc6e: /* CLGFRL - compare logical relative long */
4898 case 0xc6f: /* CLRL - compare logical relative long */
4899 case 0xccd: /* CIH - compare immediate high */
4900 case 0xccf: /* CLIH - compare logical immediate high */
4901 /* flags only */
4902 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4903 return -1;
4904 break;
4905
4906 /* 0xc40-0xc41 undefined */
4907 /* 0xc43 undefined */
4908
4909 case 0xc47: /* STHRL - store halfword relative long */
4910 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4911 if (record_full_arch_list_add_mem (oaddr, 2))
4912 return -1;
4913 break;
4914
4915 /* 0xc49-0xc4a undefined */
4916
4917 case 0xc4b: /* STGRL - store relative long */
4918 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4919 if (record_full_arch_list_add_mem (oaddr, 8))
4920 return -1;
4921 break;
4922
4923 case 0xc4f: /* STRL - store relative long */
4924 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4925 if (record_full_arch_list_add_mem (oaddr, 4))
4926 return -1;
4927 break;
4928
4929 case 0xc60: /* EXRL - execute relative long */
4930 if (ex != -1)
4931 {
4932 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4933 paddress (gdbarch, addr));
4934 return -1;
4935 }
4936 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4937 if (inib[2])
4938 {
4939 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4940 ex = tmp & 0xff;
4941 }
4942 else
4943 {
4944 ex = 0;
4945 }
4946 goto ex;
4947
4948 /* 0xc61 undefined */
4949 /* 0xc63 undefined */
4950 /* 0xc69 undefined */
4951 /* 0xc6b undefined */
4952 /* 0xcc0-0xcc5 undefined */
4953 /* 0xcc7 undefined */
4954 /* 0xcc9 undefined */
4955 /* 0xccc undefined */
4956 /* 0xcce undefined */
4957
4958 default:
4959 goto UNKNOWN_OP;
4960 }
4961 break;
4962
4963 /* 0xc1 undefined */
4964 /* 0xc3 undefined */
4965
4966 case 0xc5: /* BPRP - branch prediction relative preload */
4967 case 0xc7: /* BPP - branch prediction preload */
4968 /* no visible effect */
4969 break;
4970
4971 case 0xc8:
4972 /* SSF-format instruction */
4973 switch (ibyte[0] << 4 | inib[3])
4974 {
4975 /* 0xc80 unsupported */
4976
4977 case 0xc81: /* ECTG - extract cpu time */
4978 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4979 return -1;
4980 if (s390_record_gpr_g (gdbarch, regcache, 0))
4981 return -1;
4982 if (s390_record_gpr_g (gdbarch, regcache, 1))
4983 return -1;
4984 break;
4985
4986 case 0xc82: /* CSST - compare and swap and store */
4987 {
4988 uint8_t fc, sc;
4989 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4990 fc = tmp & 0xff;
4991 sc = tmp >> 8 & 0xff;
4992
4993 /* First and third operands. */
4994 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4995 switch (fc)
4996 {
4997 case 0x00: /* 32-bit */
4998 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4999 return -1;
5000 if (record_full_arch_list_add_mem (oaddr, 4))
5001 return -1;
5002 break;
5003
5004 case 0x01: /* 64-bit */
5005 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5006 return -1;
5007 if (record_full_arch_list_add_mem (oaddr, 8))
5008 return -1;
5009 break;
5010
5011 case 0x02: /* 128-bit */
5012 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5013 return -1;
5014 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5015 return -1;
5016 if (record_full_arch_list_add_mem (oaddr, 16))
5017 return -1;
5018 break;
5019
5020 default:
5021 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5022 fc, paddress (gdbarch, addr));
5023 return -1;
5024 }
5025
5026 /* Second operand. */
5027 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5028 if (sc > 4)
5029 {
5030 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5031 sc, paddress (gdbarch, addr));
5032 return -1;
5033 }
5034
5035 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5036 return -1;
5037
5038 /* Flags. */
5039 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5040 return -1;
5041 }
5042 break;
5043
5044 /* 0xc83 undefined */
5045
5046 case 0xc84: /* LPD - load pair disjoint */
5047 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5048 return -1;
5049 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5050 return -1;
5051 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5052 return -1;
5053 break;
5054
5055 case 0xc85: /* LPDG - load pair disjoint */
5056 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5057 return -1;
5058 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5059 return -1;
5060 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5061 return -1;
5062 break;
5063
5064 /* 0xc86-0xc8f undefined */
5065
5066 default:
5067 goto UNKNOWN_OP;
5068 }
5069 break;
5070
5071 /* 0xc9-0xcb undefined */
5072 /* 0xcd-0xcf undefined */
5073
5074 case 0xd0: /* TRTR - translate and test reversed */
5075 case 0xdd: /* TRT - translate and test */
5076 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5077 return -1;
5078 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5079 return -1;
5080 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5081 return -1;
5082 break;
5083
5084 case 0xd1: /* MVN - move numbers */
5085 case 0xd2: /* MVC - move */
5086 case 0xd3: /* MVZ - move zones */
5087 case 0xdc: /* TR - translate */
5088 case 0xe8: /* MVCIN - move inverse */
5089 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5090 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5091 return -1;
5092 break;
5093
5094 case 0xd4: /* NC - and */
5095 case 0xd6: /* OC - or*/
5096 case 0xd7: /* XC - xor */
5097 case 0xe2: /* UNPKU - unpack unicode */
5098 case 0xea: /* UNPKA - unpack ASCII */
5099 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5100 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5101 return -1;
5102 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5103 return -1;
5104 break;
5105
5106 case 0xde: /* ED - edit */
5107 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5108 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5109 return -1;
5110 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5111 return -1;
5112 /* DXC may be written */
5113 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5114 return -1;
5115 break;
5116
5117 case 0xdf: /* EDMK - edit and mark */
5118 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5119 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5120 return -1;
5121 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5122 return -1;
5123 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5124 return -1;
5125 /* DXC may be written */
5126 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5127 return -1;
5128 break;
5129
5130 /* 0xd8 undefined */
5131 /* 0xd9 unsupported: MVCK - move with key */
5132 /* 0xda unsupported: MVCP - move to primary */
5133 /* 0xdb unsupported: MVCS - move to secondary */
5134 /* 0xe0 undefined */
5135
5136 case 0xe1: /* PKU - pack unicode */
5137 case 0xe9: /* PKA - pack ASCII */
5138 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5139 if (record_full_arch_list_add_mem (oaddr, 16))
5140 return -1;
5141 break;
5142
5143 case 0xe3:
5144 case 0xe6:
5145 case 0xe7:
5146 case 0xeb:
5147 case 0xed:
5148 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5149 switch (ibyte[0] << 8 | ibyte[5])
5150 {
5151 /* 0xe300-0xe301 undefined */
5152
5153 case 0xe302: /* LTG - load and test */
5154 case 0xe308: /* AG - add */
5155 case 0xe309: /* SG - subtract */
5156 case 0xe30a: /* ALG - add logical */
5157 case 0xe30b: /* SLG - subtract logical */
5158 case 0xe318: /* AGF - add */
5159 case 0xe319: /* SGF - subtract */
5160 case 0xe31a: /* ALGF - add logical */
5161 case 0xe31b: /* SLGF - subtract logical */
5162 case 0xe332: /* LTGF - load and test */
5163 case 0xe380: /* NG - and */
5164 case 0xe381: /* OG - or */
5165 case 0xe382: /* XG - xor */
5166 case 0xe388: /* ALCG - add logical with carry */
5167 case 0xe389: /* SLBG - subtract logical with borrow */
5168 case 0xeb0a: /* SRAG - shift right single */
5169 case 0xeb0b: /* SLAG - shift left single */
5170 /* 64-bit gpr destination + flags */
5171 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5172 return -1;
5173 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5174 return -1;
5175 break;
5176
5177 /* 0xe303 privileged */
5178
5179 case 0xe304: /* LG - load */
5180 case 0xe30c: /* MSG - multiply single */
5181 case 0xe30f: /* LRVG - load reversed */
5182 case 0xe314: /* LGF - load */
5183 case 0xe315: /* LGH - load halfword */
5184 case 0xe316: /* LLGF - load logical */
5185 case 0xe317: /* LLGT - load logical thirty one bits */
5186 case 0xe31c: /* MSGF - multiply single */
5187 case 0xe32a: /* LZRG - load and zero rightmost byte */
5188 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5189 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5190 case 0xe346: /* BCTG - branch on count */
5191 case 0xe377: /* LGB - load byte */
5192 case 0xe390: /* LLGC - load logical character */
5193 case 0xe391: /* LLGH - load logical halfword */
5194 case 0xeb0c: /* SRLG - shift right single logical */
5195 case 0xeb0d: /* SLLG - shift left single logical */
5196 case 0xeb1c: /* RLLG - rotate left single logical */
5197 case 0xeb44: /* BXHG - branch on index high */
5198 case 0xeb45: /* BXLEG - branch on index low or equal */
5199 case 0xeb4c: /* ECAG - extract cpu attribute */
5200 case 0xebe2: /* LOCG - load on condition */
5201 /* 64-bit gpr destination */
5202 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5203 return -1;
5204 break;
5205
5206 /* 0xe305 undefined */
5207
5208 case 0xe306: /* CVBY - convert to binary */
5209 /* 32-bit or native gpr destination + FPC (DXC write) */
5210 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5211 return -1;
5212 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5213 return -1;
5214 break;
5215
5216 /* 0xe307 undefined */
5217
5218 case 0xe30d: /* DSG - divide single */
5219 case 0xe31d: /* DSGF - divide single */
5220 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5221 case 0xe386: /* MLG - multiply logical */
5222 case 0xe387: /* DLG - divide logical */
5223 case 0xe38f: /* LPQ - load pair from quadword */
5224 /* 64-bit gpr pair destination */
5225 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5226 return -1;
5227 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5228 return -1;
5229 break;
5230
5231 case 0xe30e: /* CVBG - convert to binary */
5232 /* 64-bit gpr destination + FPC (DXC write) */
5233 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5234 return -1;
5235 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5236 return -1;
5237 break;
5238
5239 /* 0xe310-0xe311 undefined */
5240
5241 case 0xe312: /* LT - load and test */
5242 case 0xe338: /* AGH - add halfword to 64 bit value */
5243 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5244 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5245 case 0xe354: /* NY - and */
5246 case 0xe356: /* OY - or */
5247 case 0xe357: /* XY - xor */
5248 case 0xe35a: /* AY - add */
5249 case 0xe35b: /* SY - subtract */
5250 case 0xe35e: /* ALY - add logical */
5251 case 0xe35f: /* SLY - subtract logical */
5252 case 0xe37a: /* AHY - add halfword */
5253 case 0xe37b: /* SHY - subtract halfword */
5254 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5255 case 0xe398: /* ALC - add logical with carry */
5256 case 0xe399: /* SLB - subtract logical with borrow */
5257 case 0xe727: /* LCBB - load count to block bounduary */
5258 case 0xeb81: /* ICMY - insert characters under mask */
5259 case 0xebdc: /* SRAK - shift left single */
5260 case 0xebdd: /* SLAK - shift left single */
5261 /* 32/64-bit gpr destination + flags */
5262 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5263 return -1;
5264 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5265 return -1;
5266 break;
5267
5268 /* 0xe313 privileged */
5269
5270 case 0xe31e: /* LRV - load reversed */
5271 case 0xe31f: /* LRVH - load reversed */
5272 case 0xe33b: /* LZRF - load and zero rightmost byte */
5273 case 0xe351: /* MSY - multiply single */
5274 case 0xe358: /* LY - load */
5275 case 0xe371: /* LAY - load address */
5276 case 0xe373: /* ICY - insert character */
5277 case 0xe376: /* LB - load byte */
5278 case 0xe378: /* LHY - load */
5279 case 0xe37c: /* MHY - multiply halfword */
5280 case 0xe394: /* LLC - load logical character */
5281 case 0xe395: /* LLH - load logical halfword */
5282 case 0xeb1d: /* RLL - rotate left single logical */
5283 case 0xebde: /* SRLK - shift left single logical */
5284 case 0xebdf: /* SLLK - shift left single logical */
5285 case 0xebf2: /* LOC - load on condition */
5286 /* 32-bit or native gpr destination */
5287 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5288 return -1;
5289 break;
5290
5291 case 0xe320: /* CG - compare */
5292 case 0xe321: /* CLG - compare logical */
5293 case 0xe330: /* CGF - compare */
5294 case 0xe331: /* CLGF - compare logical */
5295 case 0xe334: /* CGH - compare halfword */
5296 case 0xe355: /* CLY - compare logical */
5297 case 0xe359: /* CY - compare */
5298 case 0xe379: /* CHY - compare halfword */
5299 case 0xe3cd: /* CHF - compare high */
5300 case 0xe3cf: /* CLHF - compare logical high */
5301 case 0xeb20: /* CLMH - compare logical under mask high */
5302 case 0xeb21: /* CLMY - compare logical under mask */
5303 case 0xeb51: /* TMY - test under mask */
5304 case 0xeb55: /* CLIY - compare logical */
5305 case 0xebc0: /* TP - test decimal */
5306 case 0xed10: /* TCEB - test data class */
5307 case 0xed11: /* TCDB - test data class */
5308 case 0xed12: /* TCXB - test data class */
5309 case 0xed50: /* TDCET - test data class */
5310 case 0xed51: /* TDGET - test data group */
5311 case 0xed54: /* TDCDT - test data class */
5312 case 0xed55: /* TDGDT - test data group */
5313 case 0xed58: /* TDCXT - test data class */
5314 case 0xed59: /* TDGXT - test data group */
5315 /* flags only */
5316 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5317 return -1;
5318 break;
5319
5320 /* 0xe322-0xe323 undefined */
5321
5322 case 0xe324: /* STG - store */
5323 case 0xe325: /* NTSTG - nontransactional store */
5324 case 0xe326: /* CVDY - convert to decimal */
5325 case 0xe32f: /* STRVG - store reversed */
5326 case 0xebe3: /* STOCG - store on condition */
5327 case 0xed67: /* STDY - store */
5328 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5329 if (record_full_arch_list_add_mem (oaddr, 8))
5330 return -1;
5331 break;
5332
5333 /* 0xe327-0xe329 undefined */
5334 /* 0xe32b-0xe32d undefined */
5335
5336 case 0xe32e: /* CVDG - convert to decimal */
5337 case 0xe38e: /* STPQ - store pair to quadword */
5338 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5339 if (record_full_arch_list_add_mem (oaddr, 16))
5340 return -1;
5341 break;
5342
5343 /* 0xe333 undefined */
5344 /* 0xe335 undefined */
5345
5346 case 0xe336: /* PFD - prefetch data */
5347 break;
5348
5349 /* 0xe337 undefined */
5350 /* 0xe33c-0xe33d undefined */
5351
5352 case 0xe33e: /* STRV - store reversed */
5353 case 0xe350: /* STY - store */
5354 case 0xe3cb: /* STFH - store high */
5355 case 0xebe1: /* STOCFH - store high on condition */
5356 case 0xebf3: /* STOC - store on condition */
5357 case 0xed66: /* STEY - store */
5358 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5359 if (record_full_arch_list_add_mem (oaddr, 4))
5360 return -1;
5361 break;
5362
5363 case 0xe33f: /* STRVH - store reversed */
5364 case 0xe370: /* STHY - store halfword */
5365 case 0xe3c7: /* STHH - store halfword high */
5366 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5367 if (record_full_arch_list_add_mem (oaddr, 2))
5368 return -1;
5369 break;
5370
5371 /* 0xe340-0xe345 undefined */
5372
5373 case 0xe347: /* BIC - branch indirect on condition */
5374 break;
5375
5376 /* 0xe348-0xe34f undefined */
5377 /* 0xe352 undefined */
5378
5379 case 0xe35c: /* MFY - multiply */
5380 case 0xe396: /* ML - multiply logical */
5381 case 0xe397: /* DL - divide logical */
5382 /* 32-bit gpr pair destination */
5383 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5384 return -1;
5385 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5386 return -1;
5387 break;
5388
5389 /* 0xe35d undefined */
5390 /* 0xe360-0xe36f undefined */
5391
5392 case 0xe372: /* STCY - store character */
5393 case 0xe3c3: /* STCH - store character high */
5394 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5395 if (record_full_arch_list_add_mem (oaddr, 1))
5396 return -1;
5397 break;
5398
5399 /* 0xe374 undefined */
5400
5401 case 0xe375: /* LAEY - load address extended */
5402 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5403 return -1;
5404 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5405 return -1;
5406 break;
5407
5408 /* 0xe37d-0xe37f undefined */
5409
5410 case 0xe385: /* LGAT - load and trap */
5411 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5412 case 0xe39d: /* LLGFAT - load logical and trap */
5413 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5414 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5415 case 0xe721: /* VLGV - vector load gr from vr element */
5416 /* 64-bit gpr destination + fpc for possible DXC write */
5417 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5418 return -1;
5419 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5420 return -1;
5421 break;
5422
5423 /* 0xe38a-0xe38d undefined */
5424 /* 0xe392-0xe393 undefined */
5425 /* 0xe39a-0xe39b undefined */
5426 /* 0xe39e undefined */
5427
5428 case 0xe39f: /* LAT - load and trap */
5429 /* 32-bit gpr destination + fpc for possible DXC write */
5430 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5431 return -1;
5432 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5433 return -1;
5434 break;
5435
5436 /* 0xe3a0-0xe3bf undefined */
5437
5438 case 0xe3c0: /* LBH - load byte high */
5439 case 0xe3c2: /* LLCH - load logical character high */
5440 case 0xe3c4: /* LHH - load halfword high */
5441 case 0xe3c6: /* LLHH - load logical halfword high */
5442 case 0xe3ca: /* LFH - load high */
5443 case 0xebe0: /* LOCFH - load high on condition */
5444 /* 32-bit high gpr destination */
5445 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5446 return -1;
5447 break;
5448
5449 /* 0xe3c1 undefined */
5450 /* 0xe3c5 undefined */
5451
5452 case 0xe3c8: /* LFHAT - load high and trap */
5453 /* 32-bit high gpr destination + fpc for possible DXC write */
5454 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5455 return -1;
5456 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5457 return -1;
5458 break;
5459
5460 /* 0xe3c9 undefined */
5461 /* 0xe3cc undefined */
5462 /* 0xe3ce undefined */
5463 /* 0xe3d0-0xe3ff undefined */
5464
5465 case 0xe634: /* VPKZ - vector pack zoned */
5466 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5467 case 0xe637: /* VLRLR - vector load rightmost with length */
5468 case 0xe649: /* VLIP - vector load immediate decimal */
5469 case 0xe700: /* VLEB - vector load element */
5470 case 0xe701: /* VLEH - vector load element */
5471 case 0xe702: /* VLEG - vector load element */
5472 case 0xe703: /* VLEF - vector load element */
5473 case 0xe704: /* VLLEZ - vector load logical element and zero */
5474 case 0xe705: /* VLREP - vector load and replicate */
5475 case 0xe706: /* VL - vector load */
5476 case 0xe707: /* VLBB - vector load to block bounduary */
5477 case 0xe712: /* VGEG - vector gather element */
5478 case 0xe713: /* VGEF - vector gather element */
5479 case 0xe722: /* VLVG - vector load vr element from gr */
5480 case 0xe730: /* VESL - vector element shift left */
5481 case 0xe733: /* VERLL - vector element rotate left logical */
5482 case 0xe737: /* VLL - vector load with length */
5483 case 0xe738: /* VESRL - vector element shift right logical */
5484 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5485 case 0xe740: /* VLEIB - vector load element immediate */
5486 case 0xe741: /* VLEIH - vector load element immediate */
5487 case 0xe742: /* VLEIG - vector load element immediate */
5488 case 0xe743: /* VLEIF - vector load element immediate */
5489 case 0xe744: /* VGBM - vector generate byte mask */
5490 case 0xe745: /* VREPI - vector replicate immediate */
5491 case 0xe746: /* VGM - vector generate mask */
5492 case 0xe74d: /* VREP - vector replicate */
5493 case 0xe750: /* VPOPCT - vector population count */
5494 case 0xe752: /* VCTZ - vector count trailing zeros */
5495 case 0xe753: /* VCLZ - vector count leading zeros */
5496 case 0xe756: /* VLR - vector load */
5497 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5498 case 0xe760: /* VMRL - vector merge low */
5499 case 0xe761: /* VMRH - vector merge high */
5500 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5501 case 0xe764: /* VSUM - vector sum across word */
5502 case 0xe765: /* VSUMG - vector sum across doubleword */
5503 case 0xe766: /* VCKSM - vector checksum */
5504 case 0xe767: /* VSUMQ - vector sum across quadword */
5505 case 0xe768: /* VN - vector and */
5506 case 0xe769: /* VNC - vector and with complement */
5507 case 0xe76a: /* VO - vector or */
5508 case 0xe76b: /* VNO - vector nor */
5509 case 0xe76c: /* VNX - vector not exclusive or */
5510 case 0xe76d: /* VX - vector xor */
5511 case 0xe76e: /* VNN - vector nand */
5512 case 0xe76f: /* VOC - vector or with complement */
5513 case 0xe770: /* VESLV - vector element shift left */
5514 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5515 case 0xe773: /* VERLLV - vector element rotate left logical */
5516 case 0xe774: /* VSL - vector shift left */
5517 case 0xe775: /* VSLB - vector shift left by byte */
5518 case 0xe777: /* VSLDB - vector shift left double by byte */
5519 case 0xe778: /* VESRLV - vector element shift right logical */
5520 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5521 case 0xe77c: /* VSRL - vector shift right logical */
5522 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5523 case 0xe77e: /* VSRA - vector shift right arithmetic */
5524 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5525 case 0xe784: /* VPDI - vector permute doubleword immediate */
5526 case 0xe785: /* VBPERM - vector bit permute */
5527 case 0xe78c: /* VPERM - vector permute */
5528 case 0xe78d: /* VSEL - vector select */
5529 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5530 case 0xe78f: /* VFMA - vector fp multiply and add */
5531 case 0xe794: /* VPK - vector pack */
5532 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5533 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5534 case 0xe7a1: /* VMLH - vector multiply logical high */
5535 case 0xe7a2: /* VML - vector multiply low */
5536 case 0xe7a3: /* VMH - vector multiply high */
5537 case 0xe7a4: /* VMLE - vector multiply logical even */
5538 case 0xe7a5: /* VMLO - vector multiply logical odd */
5539 case 0xe7a6: /* VME - vector multiply even */
5540 case 0xe7a7: /* VMO - vector multiply odd */
5541 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5542 case 0xe7aa: /* VMAL - vector multiply and add low */
5543 case 0xe7ab: /* VMAH - vector multiply and add high */
5544 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5545 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5546 case 0xe7ae: /* VMAE - vector multiply and add even */
5547 case 0xe7af: /* VMAO - vector multiply and add odd */
5548 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5549 case 0xe7b8: /* VMSL - vector multiply sum logical */
5550 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5551 case 0xe7bb: /* VAC - vector add with carry */
5552 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5553 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5554 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5555 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5556 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5557 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5558 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5559 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5560 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5561 case 0xe7c7: /* VFI - vector load fp integer */
5562 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5563 case 0xe7ce: /* VFSQ - vector fp square root */
5564 case 0xe7d4: /* VUPLL - vector unpack logical low */
5565 case 0xe7d6: /* VUPL - vector unpack low */
5566 case 0xe7d5: /* VUPLH - vector unpack logical high */
5567 case 0xe7d7: /* VUPH - vector unpack high */
5568 case 0xe7de: /* VLC - vector load complement */
5569 case 0xe7df: /* VLP - vector load positive */
5570 case 0xe7e2: /* VFA - vector fp subtract */
5571 case 0xe7e3: /* VFA - vector fp add */
5572 case 0xe7e5: /* VFD - vector fp divide */
5573 case 0xe7e7: /* VFM - vector fp multiply */
5574 case 0xe7ee: /* VFMIN - vector fp minimum */
5575 case 0xe7ef: /* VFMAX - vector fp maximum */
5576 case 0xe7f0: /* VAVGL - vector average logical */
5577 case 0xe7f1: /* VACC - vector add and compute carry */
5578 case 0xe7f2: /* VAVG - vector average */
5579 case 0xe7f3: /* VA - vector add */
5580 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5581 case 0xe7f7: /* VS - vector subtract */
5582 case 0xe7fc: /* VMNL - vector minimum logical */
5583 case 0xe7fd: /* VMXL - vector maximum logical */
5584 case 0xe7fe: /* VMN - vector minimum */
5585 case 0xe7ff: /* VMX - vector maximum */
5586 /* vector destination + FPC */
5587 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5588 return -1;
5589 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5590 return -1;
5591 break;
5592
5593 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5594 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5595 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5596 return -1;
5597 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5598 return -1;
5599 break;
5600
5601 case 0xe708: /* VSTEB - vector store element */
5602 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5603 if (record_full_arch_list_add_mem (oaddr, 1))
5604 return -1;
5605 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5606 return -1;
5607 break;
5608
5609 case 0xe709: /* VSTEH - vector store element */
5610 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5611 if (record_full_arch_list_add_mem (oaddr, 2))
5612 return -1;
5613 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5614 return -1;
5615 break;
5616
5617 case 0xe70a: /* VSTEG - vector store element */
5618 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5619 if (record_full_arch_list_add_mem (oaddr, 8))
5620 return -1;
5621 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5622 return -1;
5623 break;
5624
5625 case 0xe70b: /* VSTEF - vector store element */
5626 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5627 if (record_full_arch_list_add_mem (oaddr, 4))
5628 return -1;
5629 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5630 return -1;
5631 break;
5632
5633 /* 0xe70c-0xe70d undefined */
5634
5635 case 0xe70e: /* VST - vector store */
5636 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5637 if (record_full_arch_list_add_mem (oaddr, 16))
5638 return -1;
5639 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5640 return -1;
5641 break;
5642
5643 /* 0xe70f-0xe711 undefined */
5644 /* 0xe714-0xe719 undefined */
5645
5646 case 0xe71a: /* VSCEG - vector scatter element */
5647 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5648 return -1;
5649 if (record_full_arch_list_add_mem (oaddr, 8))
5650 return -1;
5651 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5652 return -1;
5653 break;
5654
5655 case 0xe71b: /* VSCEF - vector scatter element */
5656 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5657 return -1;
5658 if (record_full_arch_list_add_mem (oaddr, 4))
5659 return -1;
5660 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5661 return -1;
5662 break;
5663
5664 /* 0xe71c-0xe720 undefined */
5665 /* 0xe723-0xe726 undefined */
5666 /* 0xe728-0xe72f undefined */
5667 /* 0xe731-0xe732 undefined */
5668 /* 0xe734-0xe735 undefined */
5669
5670 case 0xe736: /* VLM - vector load multiple */
5671 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5672 if (s390_record_vr (gdbarch, regcache, i))
5673 return -1;
5674 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5675 return -1;
5676 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5677 return -1;
5678 break;
5679
5680 /* 0xe739 undefined */
5681 /* 0xe73b-0xe73d undefined */
5682
5683 case 0xe73e: /* VSTM - vector store multiple */
5684 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5685 if (ivec[0] <= ivec[1])
5686 n = ivec[1] - ivec[0] + 1;
5687 else
5688 n = ivec[1] + 0x20 - ivec[0] + 1;
5689 if (record_full_arch_list_add_mem (oaddr, n * 16))
5690 return -1;
5691 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5692 return -1;
5693 break;
5694
5695 case 0xe63c: /* VUPKZ - vector unpack zoned */
5696 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5697 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5698 return -1;
5699 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5700 return -1;
5701 break;
5702
5703 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5704 case 0xe73f: /* VSTL - vector store with length */
5705 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5706 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5707 tmp &= 0xffffffffu;
5708 if (tmp > 15)
5709 tmp = 15;
5710 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5711 return -1;
5712 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5713 return -1;
5714 break;
5715
5716 /* 0xe747-0xe749 undefined */
5717
5718 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5719 case 0xe659: /* VSRP - vector shift and round decimal */
5720 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5721 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5722 case 0xe671: /* VAP - vector add decimal */
5723 case 0xe673: /* VSP - vector subtract decimal */
5724 case 0xe678: /* VMP - vector multiply decimal */
5725 case 0xe679: /* VMSP - vector multiply decimal */
5726 case 0xe67a: /* VDP - vector divide decimal */
5727 case 0xe67b: /* VRP - vector remainder decimal */
5728 case 0xe67e: /* VSDP - vector shift and divide decimal */
5729 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5730 case 0xe75c: /* VISTR - vector isolate string */
5731 case 0xe780: /* VFEE - vector find element equal */
5732 case 0xe781: /* VFENE - vector find element not equal */
5733 case 0xe782: /* VFA - vector find any element equal */
5734 case 0xe78a: /* VSTRC - vector string range compare */
5735 case 0xe795: /* VPKLS - vector pack logical saturate */
5736 case 0xe797: /* VPKS - vector pack saturate */
5737 case 0xe7e8: /* VFCE - vector fp compare equal */
5738 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5739 case 0xe7eb: /* VFCH - vector fp compare high */
5740 case 0xe7f8: /* VCEQ - vector compare equal */
5741 case 0xe7f9: /* VCHL - vector compare high logical */
5742 case 0xe7fb: /* VCH - vector compare high */
5743 /* vector destination + flags + FPC */
5744 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5745 return -1;
5746 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5747 return -1;
5748 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5749 return -1;
5750 break;
5751
5752 case 0xe65f: /* VTP - vector test decimal */
5753 /* flags + FPC */
5754 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5755 return -1;
5756 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5757 return -1;
5758 break;
5759
5760 /* 0xe74b-0xe74c undefined */
5761 /* 0xe74e-0xe74f undefined */
5762 /* 0xe751 undefined */
5763 /* 0xe754-0xe755 undefined */
5764 /* 0xe757-0xe75b undefined */
5765 /* 0xe75d-0xe75e undefined */
5766 /* 0xe763 undefined */
5767 /* 0xe771 undefined */
5768 /* 0xe776 undefined */
5769 /* 0xe779 undefined */
5770 /* 0xe77b undefined */
5771 /* 0xe783 undefined */
5772 /* 0xe786-0xe789 undefined */
5773 /* 0xe78b undefined */
5774 /* 0xe790-0xe793 undefined */
5775 /* 0xe796 undefined */
5776 /* 0xe798-0xe79d undefined */
5777 /* 0xe7a0 undefined */
5778 /* 0xe7a8 undefined */
5779 /* 0xe7b0-0xe7b3 undefined */
5780 /* 0xe7b5-0xe7b7 undefined */
5781 /* 0xe7ba undefined */
5782 /* 0xe7be undefined */
5783 /* 0xe7c6 undefined */
5784 /* 0xe7c8-0xe7c9 undefined */
5785
5786 case 0xe677: /* VCP - vector compare decimal */
5787 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5788 case 0xe7cb: /* WFC - vector fp compare scalar */
5789 case 0xe7d8: /* VTM - vector test under mask */
5790 case 0xe7d9: /* VECL - vector element compare logical */
5791 case 0xe7db: /* VEC - vector element compare */
5792 case 0xed08: /* KEB - compare and signal */
5793 case 0xed09: /* CEB - compare */
5794 case 0xed18: /* KDB - compare and signal */
5795 case 0xed19: /* CDB - compare */
5796 /* flags + fpc only */
5797 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5798 return -1;
5799 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5800 return -1;
5801 break;
5802
5803 /* 0xe7cd undefined */
5804 /* 0xe7cf-0xe7d3 undefined */
5805 /* 0xe7da undefined */
5806 /* 0xe7dc-0xe7dd undefined */
5807 /* 0xe7e0-0xe7e1 undefined */
5808 /* 0xe7e4 undefined */
5809 /* 0xe7e6 undefined */
5810 /* 0xe7e9 undefined */
5811 /* 0xe7ec-0xe7ed undefined */
5812 /* 0xe7f4 undefined */
5813 /* 0xe7f6 undefined */
5814 /* 0xe7fa undefined */
5815
5816 /* 0xeb00-0xeb03 undefined */
5817
5818 case 0xeb04: /* LMG - load multiple */
5819 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5820 if (s390_record_gpr_g (gdbarch, regcache, i))
5821 return -1;
5822 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5823 return -1;
5824 break;
5825
5826 /* 0xeb05-0xeb09 undefined */
5827 /* 0xeb0e undefined */
5828 /* 0xeb0f privileged: TRACG */
5829 /* 0xeb10-0xeb13 undefined */
5830
5831 case 0xeb14: /* CSY - compare and swap */
5832 case 0xebf4: /* LAN - load and and */
5833 case 0xebf6: /* LAO - load and or */
5834 case 0xebf7: /* LAX - load and xor */
5835 case 0xebf8: /* LAA - load and add */
5836 case 0xebfa: /* LAAL - load and add logical */
5837 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5838 if (record_full_arch_list_add_mem (oaddr, 4))
5839 return -1;
5840 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5841 return -1;
5842 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5843 return -1;
5844 break;
5845
5846 /* 0xeb15-0xeb1b undefined */
5847 /* 0xeb1e-0xeb1f undefined */
5848 /* 0xeb22 undefined */
5849
5850 case 0xeb23: /* CLT - compare logical and trap */
5851 case 0xeb2b: /* CLGT - compare logical and trap */
5852 /* fpc only - including possible DXC write for trapping insns */
5853 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5854 return -1;
5855 break;
5856
5857 case 0xeb24: /* STMG - store multiple */
5858 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5859 if (inib[2] <= inib[3])
5860 n = inib[3] - inib[2] + 1;
5861 else
5862 n = inib[3] + 0x10 - inib[2] + 1;
5863 if (record_full_arch_list_add_mem (oaddr, n * 8))
5864 return -1;
5865 break;
5866
5867 /* 0xeb25 privileged */
5868
5869 case 0xeb26: /* STMH - store multiple high */
5870 case 0xeb90: /* STMY - store multiple */
5871 case 0xeb9b: /* STAMY - store access multiple */
5872 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5873 if (inib[2] <= inib[3])
5874 n = inib[3] - inib[2] + 1;
5875 else
5876 n = inib[3] + 0x10 - inib[2] + 1;
5877 if (record_full_arch_list_add_mem (oaddr, n * 4))
5878 return -1;
5879 break;
5880
5881 /* 0xeb27-0xeb2a undefined */
5882
5883 case 0xeb2c: /* STCMH - store characters under mask */
5884 case 0xeb2d: /* STCMY - store characters under mask */
5885 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5886 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5887 return -1;
5888 break;
5889
5890 /* 0xeb2e undefined */
5891 /* 0xeb2f privileged */
5892
5893 case 0xeb30: /* CSG - compare and swap */
5894 case 0xebe4: /* LANG - load and and */
5895 case 0xebe6: /* LAOG - load and or */
5896 case 0xebe7: /* LAXG - load and xor */
5897 case 0xebe8: /* LAAG - load and add */
5898 case 0xebea: /* LAALG - load and add logical */
5899 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5900 if (record_full_arch_list_add_mem (oaddr, 8))
5901 return -1;
5902 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5903 return -1;
5904 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5905 return -1;
5906 break;
5907
5908 case 0xeb31: /* CDSY - compare double and swap */
5909 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5910 if (record_full_arch_list_add_mem (oaddr, 8))
5911 return -1;
5912 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5913 return -1;
5914 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5915 return -1;
5916 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5917 return -1;
5918 break;
5919
5920 /* 0xeb32-0xeb3d undefined */
5921
5922 case 0xeb3e: /* CDSG - compare double and swap */
5923 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5924 if (record_full_arch_list_add_mem (oaddr, 16))
5925 return -1;
5926 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5927 return -1;
5928 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5929 return -1;
5930 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5931 return -1;
5932 break;
5933
5934 /* 0xeb3f-0xeb43 undefined */
5935 /* 0xeb46-0xeb4b undefined */
5936 /* 0xeb4d-0xeb50 undefined */
5937
5938 case 0xeb52: /* MVIY - move */
5939 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5940 if (record_full_arch_list_add_mem (oaddr, 1))
5941 return -1;
5942 break;
5943
5944 case 0xeb54: /* NIY - and */
5945 case 0xeb56: /* OIY - or */
5946 case 0xeb57: /* XIY - xor */
5947 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5948 if (record_full_arch_list_add_mem (oaddr, 1))
5949 return -1;
5950 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5951 return -1;
5952 break;
5953
5954 /* 0xeb53 undefined */
5955 /* 0xeb58-0xeb69 undefined */
5956
5957 case 0xeb6a: /* ASI - add immediate */
5958 case 0xeb6e: /* ALSI - add immediate */
5959 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5960 if (record_full_arch_list_add_mem (oaddr, 4))
5961 return -1;
5962 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5963 return -1;
5964 break;
5965
5966 /* 0xeb6b-0xeb6d undefined */
5967 /* 0xeb6f-0xeb79 undefined */
5968
5969 case 0xeb7a: /* AGSI - add immediate */
5970 case 0xeb7e: /* ALGSI - add immediate */
5971 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5972 if (record_full_arch_list_add_mem (oaddr, 8))
5973 return -1;
5974 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5975 return -1;
5976 break;
5977
5978 /* 0xeb7b-0xeb7d undefined */
5979 /* 0xeb7f undefined */
5980
5981 case 0xeb80: /* ICMH - insert characters under mask */
5982 /* 32-bit high gpr destination + flags */
5983 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5984 return -1;
5985 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5986 return -1;
5987 break;
5988
5989 /* 0xeb82-0xeb8d undefined */
5990
5991 case 0xeb8e: /* MVCLU - move long unicode [partial] */
5992 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5993 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5994 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
5995 if (record_full_arch_list_add_mem (oaddr, tmp))
5996 return -1;
5997 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5998 return -1;
5999 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6000 return -1;
6001 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6002 return -1;
6003 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6004 return -1;
6005 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6006 return -1;
6007 break;
6008
6009 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6010 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6011 return -1;
6012 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6013 return -1;
6014 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6015 return -1;
6016 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6017 return -1;
6018 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6019 return -1;
6020 break;
6021
6022 /* 0xeb91-0xeb95 undefined */
6023
6024 case 0xeb96: /* LMH - load multiple high */
6025 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6026 if (s390_record_gpr_h (gdbarch, regcache, i))
6027 return -1;
6028 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6029 return -1;
6030 break;
6031
6032 /* 0xeb97 undefined */
6033
6034 case 0xeb98: /* LMY - load multiple */
6035 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6036 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6037 return -1;
6038 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6039 return -1;
6040 break;
6041
6042 /* 0xeb99 undefined */
6043
6044 case 0xeb9a: /* LAMY - load access multiple */
6045 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6046 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6047 return -1;
6048 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6049 return -1;
6050 break;
6051
6052 /* 0xeb9c-0xebbf undefined */
6053 /* 0xebc1-0xebdb undefined */
6054 /* 0xebe5 undefined */
6055 /* 0xebe9 undefined */
6056 /* 0xebeb-0xebf1 undefined */
6057 /* 0xebf5 undefined */
6058 /* 0xebf9 undefined */
6059 /* 0xebfb-0xebff undefined */
6060
6061 /* 0xed00-0xed03 undefined */
6062
6063 case 0xed04: /* LDEB - load lengthened */
6064 case 0xed0c: /* MDEB - multiply */
6065 case 0xed0d: /* DEB - divide */
6066 case 0xed14: /* SQEB - square root */
6067 case 0xed15: /* SQDB - square root */
6068 case 0xed17: /* MEEB - multiply */
6069 case 0xed1c: /* MDB - multiply */
6070 case 0xed1d: /* DDB - divide */
6071 /* float destination + fpc */
6072 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6073 return -1;
6074 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6075 return -1;
6076 break;
6077
6078 case 0xed05: /* LXDB - load lengthened */
6079 case 0xed06: /* LXEB - load lengthened */
6080 case 0xed07: /* MXDB - multiply */
6081 /* float pair destination + fpc */
6082 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6083 return -1;
6084 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6085 return -1;
6086 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6087 return -1;
6088 break;
6089
6090 case 0xed0a: /* AEB - add */
6091 case 0xed0b: /* SEB - subtract */
6092 case 0xed1a: /* ADB - add */
6093 case 0xed1b: /* SDB - subtract */
6094 /* float destination + flags + fpc */
6095 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6096 return -1;
6097 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6098 return -1;
6099 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6100 return -1;
6101 break;
6102
6103 case 0xed0e: /* MAEB - multiply and add */
6104 case 0xed0f: /* MSEB - multiply and subtract */
6105 case 0xed1e: /* MADB - multiply and add */
6106 case 0xed1f: /* MSDB - multiply and subtract */
6107 case 0xed40: /* SLDT - shift significand left */
6108 case 0xed41: /* SRDT - shift significand right */
6109 case 0xedaa: /* CDZT - convert from zoned */
6110 case 0xedae: /* CDPT - convert from packed */
6111 /* float destination [RXF] + fpc */
6112 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6113 return -1;
6114 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6115 return -1;
6116 break;
6117
6118 /* 0xed13 undefined */
6119 /* 0xed16 undefined */
6120 /* 0xed20-0xed23 undefined */
6121
6122 case 0xed24: /* LDE - load lengthened */
6123 case 0xed34: /* SQE - square root */
6124 case 0xed35: /* SQD - square root */
6125 case 0xed37: /* MEE - multiply */
6126 case 0xed64: /* LEY - load */
6127 case 0xed65: /* LDY - load */
6128 /* float destination */
6129 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6130 return -1;
6131 break;
6132
6133 case 0xed25: /* LXD - load lengthened */
6134 case 0xed26: /* LXE - load lengthened */
6135 /* float pair destination */
6136 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6137 return -1;
6138 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6139 return -1;
6140 break;
6141
6142 /* 0xed27-0xed2d undefined */
6143
6144 case 0xed2e: /* MAE - multiply and add */
6145 case 0xed2f: /* MSE - multiply and subtract */
6146 case 0xed38: /* MAYL - multiply and add unnormalized */
6147 case 0xed39: /* MYL - multiply unnormalized */
6148 case 0xed3c: /* MAYH - multiply and add unnormalized */
6149 case 0xed3d: /* MYH - multiply unnormalized */
6150 case 0xed3e: /* MAD - multiply and add */
6151 case 0xed3f: /* MSD - multiply and subtract */
6152 /* float destination [RXF] */
6153 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6154 return -1;
6155 break;
6156
6157 /* 0xed30-0xed33 undefined */
6158 /* 0xed36 undefined */
6159
6160 case 0xed3a: /* MAY - multiply and add unnormalized */
6161 case 0xed3b: /* MY - multiply unnormalized */
6162 /* float pair destination [RXF] */
6163 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6164 return -1;
6165 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6166 return -1;
6167 break;
6168
6169 /* 0xed42-0xed47 undefind */
6170
6171 case 0xed48: /* SLXT - shift significand left */
6172 case 0xed49: /* SRXT - shift significand right */
6173 case 0xedab: /* CXZT - convert from zoned */
6174 case 0xedaf: /* CXPT - convert from packed */
6175 /* float pair destination [RXF] + fpc */
6176 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6177 return -1;
6178 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6179 return -1;
6180 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6181 return -1;
6182 break;
6183
6184 /* 0xed4a-0xed4f undefind */
6185 /* 0xed52-0xed53 undefind */
6186 /* 0xed56-0xed57 undefind */
6187 /* 0xed5a-0xed63 undefind */
6188 /* 0xed68-0xeda7 undefined */
6189
6190 case 0xeda8: /* CZDT - convert to zoned */
6191 case 0xeda9: /* CZXT - convert to zoned */
6192 case 0xedac: /* CPDT - convert to packed */
6193 case 0xedad: /* CPXT - convert to packed */
6194 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6195 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6196 return -1;
6197 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6198 return -1;
6199 break;
6200
6201 /* 0xedb0-0xedff undefined */
6202
6203 default:
6204 goto UNKNOWN_OP;
6205 }
6206 break;
6207
6208 /* 0xe4 undefined */
6209
6210 case 0xe5:
6211 /* SSE/SIL-format instruction */
6212 switch (insn[0])
6213 {
6214 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6215
6216 case 0xe544: /* MVHHI - move */
6217 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6218 if (record_full_arch_list_add_mem (oaddr, 2))
6219 return -1;
6220 break;
6221
6222 /* 0xe545-0xe547 undefined */
6223
6224 case 0xe548: /* MVGHI - move */
6225 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6226 if (record_full_arch_list_add_mem (oaddr, 8))
6227 return -1;
6228 break;
6229
6230 /* 0xe549-0xe54b undefined */
6231
6232 case 0xe54c: /* MVHI - move */
6233 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6234 if (record_full_arch_list_add_mem (oaddr, 4))
6235 return -1;
6236 break;
6237
6238 /* 0xe54d-0xe553 undefined */
6239
6240 case 0xe554: /* CHHSI - compare halfword immediate */
6241 case 0xe555: /* CLHHSI - compare logical immediate */
6242 case 0xe558: /* CGHSI - compare halfword immediate */
6243 case 0xe559: /* CLGHSI - compare logical immediate */
6244 case 0xe55c: /* CHSI - compare halfword immediate */
6245 case 0xe55d: /* CLFHSI - compare logical immediate */
6246 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6247 return -1;
6248 break;
6249
6250 /* 0xe556-0xe557 undefined */
6251 /* 0xe55a-0xe55b undefined */
6252 /* 0xe55e-0xe55f undefined */
6253
6254 case 0xe560: /* TBEGIN - transaction begin */
6255 /* The transaction will be immediately aborted after this
6256 instruction, due to single-stepping. This instruction is
6257 only supported so that the program can fail a few times
6258 and go to the non-transactional fallback. */
6259 if (inib[4])
6260 {
6261 /* Transaction diagnostic block - user. */
6262 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6263 if (record_full_arch_list_add_mem (oaddr, 256))
6264 return -1;
6265 }
6266 /* Transaction diagnostic block - supervisor. */
6267 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6268 return -1;
6269 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6270 return -1;
6271 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6272 return -1;
6273 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6274 return -1;
6275 for (i = 0; i < 16; i++)
6276 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6277 return -1;
6278 /* And flags. */
6279 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6280 return -1;
6281 break;
6282
6283 /* 0xe561 unsupported: TBEGINC */
6284 /* 0xe562-0xe5ff undefined */
6285
6286 default:
6287 goto UNKNOWN_OP;
6288 }
6289 break;
6290
6291 case 0xec:
6292 /* RIE/RIS/RRS-format instruction */
6293 switch (ibyte[0] << 8 | ibyte[5])
6294 {
6295 /* 0xec00-0xec41 undefined */
6296
6297 case 0xec42: /* LOCHI - load halfword immediate on condition */
6298 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6299 /* 32-bit or native gpr destination */
6300 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6301 return -1;
6302 break;
6303
6304 /* 0xec43 undefined */
6305
6306 case 0xec44: /* BRXHG - branch relative on index high */
6307 case 0xec45: /* BRXLG - branch relative on index low or equal */
6308 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6309 case 0xec59: /* RISBGN - rotate then insert selected bits */
6310 /* 64-bit gpr destination */
6311 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6312 return -1;
6313 break;
6314
6315 /* 0xec47-0xec4d undefined */
6316
6317 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6318 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6319 /* 32-bit high gpr destination */
6320 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6321 return -1;
6322 break;
6323
6324 /* 0xec4f-0xec50 undefined */
6325 /* 0xec52-0xec53 undefined */
6326
6327 case 0xec54: /* RNSBG - rotate then and selected bits */
6328 case 0xec55: /* RISBG - rotate then insert selected bits */
6329 case 0xec56: /* ROSBG - rotate then or selected bits */
6330 case 0xec57: /* RXSBG - rotate then xor selected bits */
6331 case 0xecd9: /* AGHIK - add immediate */
6332 case 0xecdb: /* ALGHSIK - add logical immediate */
6333 /* 64-bit gpr destination + flags */
6334 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6335 return -1;
6336 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6337 return -1;
6338 break;
6339
6340 /* 0xec58 undefined */
6341 /* 0xec5a-0xec5c undefined */
6342 /* 0xec5e-0xec63 undefined */
6343
6344 case 0xec64: /* CGRJ - compare and branch relative */
6345 case 0xec65: /* CLGRJ - compare logical and branch relative */
6346 case 0xec76: /* CRJ - compare and branch relative */
6347 case 0xec77: /* CLRJ - compare logical and branch relative */
6348 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6349 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6350 case 0xec7e: /* CIJ - compare immediate and branch relative */
6351 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6352 case 0xece4: /* CGRB - compare and branch */
6353 case 0xece5: /* CLGRB - compare logical and branch */
6354 case 0xecf6: /* CRB - compare and branch */
6355 case 0xecf7: /* CLRB - compare logical and branch */
6356 case 0xecfc: /* CGIB - compare immediate and branch */
6357 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6358 case 0xecfe: /* CIB - compare immediate and branch */
6359 case 0xecff: /* CLIB - compare logical immediate and branch */
6360 break;
6361
6362 /* 0xec66-0xec6f undefined */
6363
6364 case 0xec70: /* CGIT - compare immediate and trap */
6365 case 0xec71: /* CLGIT - compare logical immediate and trap */
6366 case 0xec72: /* CIT - compare immediate and trap */
6367 case 0xec73: /* CLFIT - compare logical immediate and trap */
6368 /* fpc only - including possible DXC write for trapping insns */
6369 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6370 return -1;
6371 break;
6372
6373 /* 0xec74-0xec75 undefined */
6374 /* 0xec78-0xec7b undefined */
6375
6376 /* 0xec80-0xecd7 undefined */
6377
6378 case 0xecd8: /* AHIK - add immediate */
6379 case 0xecda: /* ALHSIK - add logical immediate */
6380 /* 32-bit gpr destination + flags */
6381 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6382 return -1;
6383 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6384 return -1;
6385 break;
6386
6387 /* 0xecdc-0xece3 undefined */
6388 /* 0xece6-0xecf5 undefined */
6389 /* 0xecf8-0xecfb undefined */
6390
6391 default:
6392 goto UNKNOWN_OP;
6393 }
6394 break;
6395
6396 case 0xee: /* PLO - perform locked operation */
6397 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6398 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6399 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6400 if (!(tmp & 0x100))
6401 {
6402 uint8_t fc = tmp & 0xff;
6403 gdb_byte buf[8];
6404 switch (fc)
6405 {
6406 case 0x00: /* CL */
6407 /* op1c */
6408 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6409 return -1;
6410 /* op3 */
6411 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6412 return -1;
6413 break;
6414
6415 case 0x01: /* CLG */
6416 /* op1c */
6417 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6418 return -1;
6419 /* op3 */
6420 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6421 return -1;
6422 break;
6423
6424 case 0x02: /* CLGR */
6425 /* op1c */
6426 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6427 return -1;
6428 /* op3 */
6429 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6430 return -1;
6431 break;
6432
6433 case 0x03: /* CLX */
6434 /* op1c */
6435 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6436 return -1;
6437 /* op3 */
6438 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6439 return -1;
6440 break;
6441
6442 case 0x08: /* DCS */
6443 /* op3c */
6444 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6445 return -1;
6446 /* fallthru */
6447 case 0x0c: /* CSST */
6448 /* op4 */
6449 if (record_full_arch_list_add_mem (oaddr2, 4))
6450 return -1;
6451 goto CS;
6452
6453 case 0x14: /* CSTST */
6454 /* op8 */
6455 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6456 return -1;
6457 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6458 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6459 if (record_full_arch_list_add_mem (oaddr3, 4))
6460 return -1;
6461 /* fallthru */
6462 case 0x10: /* CSDST */
6463 /* op6 */
6464 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6465 return -1;
6466 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6467 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6468 if (record_full_arch_list_add_mem (oaddr3, 4))
6469 return -1;
6470 /* op4 */
6471 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6472 return -1;
6473 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6474 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6475 if (record_full_arch_list_add_mem (oaddr3, 4))
6476 return -1;
6477 /* fallthru */
6478 case 0x04: /* CS */
6479CS:
6480 /* op1c */
6481 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6482 return -1;
6483 /* op2 */
6484 if (record_full_arch_list_add_mem (oaddr, 4))
6485 return -1;
6486 break;
6487
6488 case 0x09: /* DCSG */
6489 /* op3c */
6490 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6491 return -1;
6492 goto CSSTG;
6493
6494 case 0x15: /* CSTSTG */
6495 /* op8 */
6496 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6497 return -1;
6498 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6499 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6500 if (record_full_arch_list_add_mem (oaddr3, 8))
6501 return -1;
6502 /* fallthru */
6503 case 0x11: /* CSDSTG */
6504 /* op6 */
6505 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6506 return -1;
6507 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6508 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6509 if (record_full_arch_list_add_mem (oaddr3, 8))
6510 return -1;
6511 /* fallthru */
6512 case 0x0d: /* CSSTG */
6513CSSTG:
6514 /* op4 */
6515 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6516 return -1;
6517 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6518 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6519 if (record_full_arch_list_add_mem (oaddr3, 8))
6520 return -1;
6521 /* fallthru */
6522 case 0x05: /* CSG */
6523 /* op1c */
6524 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6525 return -1;
6526 /* op2 */
6527 if (record_full_arch_list_add_mem (oaddr, 8))
6528 return -1;
6529 break;
6530
6531 case 0x0a: /* DCSGR */
6532 /* op3c */
6533 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6534 return -1;
6535 /* fallthru */
6536 case 0x0e: /* CSSTGR */
6537 /* op4 */
6538 if (record_full_arch_list_add_mem (oaddr2, 8))
6539 return -1;
6540 goto CSGR;
6541
6542 case 0x16: /* CSTSTGR */
6543 /* op8 */
6544 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6545 return -1;
6546 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6547 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6548 if (record_full_arch_list_add_mem (oaddr3, 8))
6549 return -1;
6550 /* fallthru */
6551 case 0x12: /* CSDSTGR */
6552 /* op6 */
6553 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6554 return -1;
6555 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6556 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6557 if (record_full_arch_list_add_mem (oaddr3, 8))
6558 return -1;
6559 /* op4 */
6560 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6561 return -1;
6562 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6563 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6564 if (record_full_arch_list_add_mem (oaddr3, 8))
6565 return -1;
6566 /* fallthru */
6567 case 0x06: /* CSGR */
6568CSGR:
6569 /* op1c */
6570 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6571 return -1;
6572 /* op2 */
6573 if (record_full_arch_list_add_mem (oaddr, 8))
6574 return -1;
6575 break;
6576
6577 case 0x0b: /* DCSX */
6578 /* op3c */
6579 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6580 return -1;
6581 goto CSSTX;
6582
6583 case 0x17: /* CSTSTX */
6584 /* op8 */
6585 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6586 return -1;
6587 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6588 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6589 if (record_full_arch_list_add_mem (oaddr3, 16))
6590 return -1;
6591 /* fallthru */
6592 case 0x13: /* CSDSTX */
6593 /* op6 */
6594 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6595 return -1;
6596 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6597 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6598 if (record_full_arch_list_add_mem (oaddr3, 16))
6599 return -1;
6600 /* fallthru */
6601 case 0x0f: /* CSSTX */
6602CSSTX:
6603 /* op4 */
6604 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6605 return -1;
6606 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6607 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6608 if (record_full_arch_list_add_mem (oaddr3, 16))
6609 return -1;
6610 /* fallthru */
6611 case 0x07: /* CSX */
6612 /* op1c */
6613 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6614 return -1;
6615 /* op2 */
6616 if (record_full_arch_list_add_mem (oaddr, 16))
6617 return -1;
6618 break;
6619
6620 default:
6621 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6622 fc, paddress (gdbarch, addr));
6623 return -1;
6624 }
6625 }
6626 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6627 return -1;
6628 break;
6629
6630 case 0xef: /* LMD - load multiple disjoint */
6631 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6632 if (s390_record_gpr_g (gdbarch, regcache, i))
6633 return -1;
6634 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6635 return -1;
6636 break;
6637
6638 case 0xf0: /* SRP - shift and round decimal */
6639 case 0xf8: /* ZAP - zero and add */
6640 case 0xfa: /* AP - add decimal */
6641 case 0xfb: /* SP - subtract decimal */
6642 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6643 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6644 return -1;
6645 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6646 return -1;
6647 /* DXC may be written */
6648 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6649 return -1;
6650 break;
6651
6652 case 0xf1: /* MVO - move with offset */
6653 case 0xf2: /* PACK - pack */
6654 case 0xf3: /* UNPK - unpack */
6655 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6656 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6657 return -1;
6658 break;
6659
6660 /* 0xf4-0xf7 undefined */
6661
6662 case 0xf9: /* CP - compare decimal */
6663 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6664 return -1;
6665 /* DXC may be written */
6666 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6667 return -1;
6668 break;
6669
6670 case 0xfc: /* MP - multiply decimal */
6671 case 0xfd: /* DP - divide decimal */
6672 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6673 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6674 return -1;
6675 /* DXC may be written */
6676 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6677 return -1;
6678 break;
6679
6680 /* 0xfe-0xff undefined */
6681
6682 default:
6683UNKNOWN_OP:
6684 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6685 "at %s.\n", insn[0], paddress (gdbarch, addr));
6686 return -1;
6687 }
6688
6689 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6690 return -1;
6691 if (record_full_arch_list_add_end ())
6692 return -1;
6693 return 0;
6694}
6695
d6e58945
PR
6696/* Miscellaneous. */
6697
6698/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6699 "-mcmodel=large". */
6700
6701static char *
6702s390_gcc_target_options (struct gdbarch *gdbarch)
6703{
6704 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6705}
6706
6707/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6708 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6709 always "s390". Note that an s390x compiler supports "-m31" as
6710 well. */
6711
6712static const char *
6713s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6714{
6715 return "s390x?";
6716}
6717
6718/* Implementation of `gdbarch_stap_is_single_operand', as defined in
6719 gdbarch.h. */
6720
6721static int
6722s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6723{
6724 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6725 or indirection. */
6726 || *s == '%' /* Register access. */
6727 || isdigit (*s)); /* Literal number. */
6728}
6729
6730/* gdbarch init. */
6731
6732/* Validate the range of registers. NAMES must be known at compile time. */
6733
6734#define s390_validate_reg_range(feature, tdesc_data, start, names) \
6735do \
6736{ \
6737 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6738 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6739 return false; \
6740} \
6741while (0)
6742
6743/* Validate the target description. Also numbers registers contained in
6744 tdesc. */
6745
6746static bool
6747s390_tdesc_valid (struct gdbarch_tdep *tdep,
6748 struct tdesc_arch_data *tdesc_data)
6749{
6750 static const char *const psw[] = {
6751 "pswm", "pswa"
6752 };
6753 static const char *const gprs[] = {
6754 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6755 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6756 };
6757 static const char *const fprs[] = {
6758 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6759 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6760 };
6761 static const char *const acrs[] = {
6762 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6763 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6764 };
6765 static const char *const gprs_lower[] = {
6766 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6767 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6768 };
6769 static const char *const gprs_upper[] = {
6770 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6771 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6772 };
6773 static const char *const tdb_regs[] = {
6774 "tdb0", "tac", "tct", "atia",
6775 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6776 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6777 };
6778 static const char *const vxrs_low[] = {
6779 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6780 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6781 };
6782 static const char *const vxrs_high[] = {
6783 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6784 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6785 };
6786 static const char *const gs_cb[] = {
6787 "gsd", "gssm", "gsepla",
6788 };
6789 static const char *const gs_bc[] = {
6790 "bc_gsd", "bc_gssm", "bc_gsepla",
6791 };
6792
6793 const struct target_desc *tdesc = tdep->tdesc;
6794 const struct tdesc_feature *feature;
6795
c81e8879
PR
6796 if (!tdesc_has_registers (tdesc))
6797 return false;
6798
d6e58945
PR
6799 /* Core registers, i.e. general purpose and PSW. */
6800 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6801 if (feature == NULL)
6802 return false;
6803
6804 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6805
6806 if (tdesc_unnumbered_register (feature, "r0"))
6807 {
6808 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6809 }
6810 else
6811 {
6812 tdep->have_upper = true;
6813 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6814 gprs_lower);
6815 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6816 gprs_upper);
6817 }
6818
6819 /* Floating point registers. */
6820 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6821 if (feature == NULL)
6822 return false;
6823
6824 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6825 return false;
6826
6827 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6828
6829 /* Access control registers. */
6830 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6831 if (feature == NULL)
6832 return false;
6833
6834 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6835
6836 /* Optional GNU/Linux-specific "registers". */
6837 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6838 if (feature)
6839 {
6840 tdesc_numbered_register (feature, tdesc_data,
6841 S390_ORIG_R2_REGNUM, "orig_r2");
6842
6843 if (tdesc_numbered_register (feature, tdesc_data,
6844 S390_LAST_BREAK_REGNUM, "last_break"))
6845 tdep->have_linux_v1 = true;
6846
6847 if (tdesc_numbered_register (feature, tdesc_data,
6848 S390_SYSTEM_CALL_REGNUM, "system_call"))
6849 tdep->have_linux_v2 = true;
6850
6851 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6852 return false;
6853 }
6854
6855 /* Transaction diagnostic block. */
6856 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6857 if (feature)
6858 {
6859 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6860 tdb_regs);
6861 tdep->have_tdb = true;
6862 }
6863
6864 /* Vector registers. */
6865 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6866 if (feature)
6867 {
6868 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6869 vxrs_low);
6870 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6871 vxrs_high);
6872 tdep->have_vx = true;
6873 }
6874
6875 /* Guarded-storage registers. */
6876 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6877 if (feature)
6878 {
6879 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6880 tdep->have_gs = true;
6881 }
6882
6883 /* Guarded-storage broadcast control. */
6884 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6885 if (feature)
6886 {
6887 if (!tdep->have_gs)
6888 return false;
6889 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6890 gs_bc);
6891 }
6892
6893 return true;
6894}
6895
6896/* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6897 memory after use. */
6898
6899static struct gdbarch_tdep *
6900s390_gdbarch_tdep_alloc ()
6901{
6902 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6903
6904 tdep->tdesc = NULL;
6905
6906 tdep->abi = ABI_NONE;
6907 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6908
6909 tdep->gpr_full_regnum = -1;
6910 tdep->v0_full_regnum = -1;
6911 tdep->pc_regnum = -1;
6912 tdep->cc_regnum = -1;
6913
6914 tdep->have_upper = false;
6915 tdep->have_linux_v1 = false;
6916 tdep->have_linux_v2 = false;
6917 tdep->have_tdb = false;
6918 tdep->have_vx = false;
6919 tdep->have_gs = false;
6920
6921 tdep->s390_syscall_record = NULL;
6922
6923 return tdep;
6924}
6925
6926/* Set up gdbarch struct. */
6927
6928static struct gdbarch *
6929s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6930{
6931 const struct target_desc *tdesc = info.target_desc;
6932 int first_pseudo_reg, last_pseudo_reg;
6933 static const char *const stap_register_prefixes[] = { "%", NULL };
6934 static const char *const stap_register_indirection_prefixes[] = { "(",
6935 NULL };
6936 static const char *const stap_register_indirection_suffixes[] = { ")",
6937 NULL };
6938
d6e58945
PR
6939 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6940 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6941 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6942 info.tdesc_data = tdesc_data;
6943
6944 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6945 set_gdbarch_char_signed (gdbarch, 0);
6946
6947 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6948 We can safely let them default to 128-bit, since the debug info
6949 will give the size of type actually used in each case. */
6950 set_gdbarch_long_double_bit (gdbarch, 128);
6951 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6952
6953 /* Breakpoints. */
6954 /* Amount PC must be decremented by after a breakpoint. This is
6955 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6956 always. */
6957 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6958 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6959 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6960
6961 /* Displaced stepping. */
6962 set_gdbarch_displaced_step_copy_insn (gdbarch,
6963 s390_displaced_step_copy_insn);
6964 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6965 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6966 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6967 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6968 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6969
6970 /* Prologue analysis. */
6971 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6972
6973 /* Register handling. */
6974 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
6975 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
6976 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
6977 set_gdbarch_guess_tracepoint_registers (gdbarch,
6978 s390_guess_tracepoint_registers);
6979 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6980 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6981 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
6982
6983 /* Pseudo registers. */
6984 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
6985 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
6986 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
6987 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
6988 set_tdesc_pseudo_register_reggroup_p (gdbarch,
6989 s390_pseudo_register_reggroup_p);
6990 set_gdbarch_ax_pseudo_register_collect (gdbarch,
6991 s390_ax_pseudo_register_collect);
6992 set_gdbarch_ax_pseudo_register_push_stack
6993 (gdbarch, s390_ax_pseudo_register_push_stack);
6994 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
6995
6996 /* Inferior function calls. */
6997 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
6998 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
6999 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7000 set_gdbarch_return_value (gdbarch, s390_return_value);
7001
7002 /* Frame handling. */
7003 /* Stack grows downward. */
7004 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7005 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7006 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7007 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7008 dwarf2_append_unwinders (gdbarch);
7009 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7010 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7011
7012 switch (info.bfd_arch_info->mach)
7013 {
7014 case bfd_mach_s390_31:
7015 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7016 break;
7017
7018 case bfd_mach_s390_64:
7019 set_gdbarch_long_bit (gdbarch, 64);
7020 set_gdbarch_long_long_bit (gdbarch, 64);
7021 set_gdbarch_ptr_bit (gdbarch, 64);
7022 set_gdbarch_address_class_type_flags (gdbarch,
7023 s390_address_class_type_flags);
7024 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7025 s390_address_class_type_flags_to_name);
7026 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7027 s390_address_class_name_to_type_flags);
7028 break;
7029 }
7030
7031 /* SystemTap functions. */
7032 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7033 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7034 stap_register_indirection_prefixes);
7035 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7036 stap_register_indirection_suffixes);
7037
7038 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7039 set_gdbarch_valid_disassembler_options (gdbarch,
7040 disassembler_options_s390 ());
7041
ef8914a4
PR
7042 /* Process record-replay */
7043 set_gdbarch_process_record (gdbarch, s390_process_record);
7044
d6e58945
PR
7045 /* Miscellaneous. */
7046 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7047 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7048 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7049
7050 /* Initialize the OSABI. */
7051 gdbarch_init_osabi (info, gdbarch);
7052
c81e8879
PR
7053 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7054 cause GDB to crash with an internal error when the user tries to set
7055 an unsupported OSABI. */
7056 if (!tdesc_has_registers (tdesc))
7057 {
7058 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7059 tdesc = tdesc_s390_linux32;
7060 else
7061 tdesc = tdesc_s390x_linux64;
7062 }
7063 tdep->tdesc = tdesc;
7064
d6e58945 7065 /* Check any target description for validity. */
d6e58945
PR
7066 if (!s390_tdesc_valid (tdep, tdesc_data))
7067 {
7068 tdesc_data_cleanup (tdesc_data);
7069 xfree (tdep);
7070 gdbarch_free (gdbarch);
7071 return NULL;
7072 }
7073
7074 /* Determine vector ABI. */
7075#ifdef HAVE_ELF
7076 if (tdep->have_vx
7077 && info.abfd != NULL
7078 && info.abfd->format == bfd_object
7079 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7080 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7081 Tag_GNU_S390_ABI_Vector) == 2)
7082 tdep->vector_abi = S390_VECTOR_ABI_128;
7083#endif
7084
7085 /* Find a candidate among extant architectures. */
7086 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7087 arches != NULL;
7088 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7089 {
7090 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7091 if (!tmp)
7092 continue;
7093 /* A program can 'choose' not to use the vector registers when they
7094 are present. Leading to the same tdesc but different tdep and
7095 thereby a different gdbarch. */
7096 if (tmp->vector_abi != tdep->vector_abi)
7097 continue;
7098
7099 tdesc_data_cleanup (tdesc_data);
7100 xfree (tdep);
7101 gdbarch_free (gdbarch);
7102 return arches->gdbarch;
7103 }
7104
7105 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7106 set_gdbarch_register_name (gdbarch, s390_register_name);
7107
7108 /* Assign pseudo register numbers. */
7109 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7110 last_pseudo_reg = first_pseudo_reg;
7111 if (tdep->have_upper)
7112 {
7113 tdep->gpr_full_regnum = last_pseudo_reg;
7114 last_pseudo_reg += 16;
7115 }
7116 if (tdep->have_vx)
7117 {
7118 tdep->v0_full_regnum = last_pseudo_reg;
7119 last_pseudo_reg += 16;
7120 }
7121 tdep->pc_regnum = last_pseudo_reg++;
7122 tdep->cc_regnum = last_pseudo_reg++;
7123 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7124 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7125
7126 /* Frame handling. */
7127 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7128 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7129 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7130 frame_base_set_default (gdbarch, &s390_frame_base);
7131
7132 return gdbarch;
7133}
7134
7135void
7136_initialize_s390_tdep (void)
7137{
7138 /* Hook us into the gdbarch mechanism. */
7139 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
c81e8879
PR
7140
7141 initialize_tdesc_s390_linux32 ();
7142 initialize_tdesc_s390x_linux64 ();
d6e58945 7143}
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