gdb/
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
0fb0cc75 3 Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
469db033 4 Free Software Foundation, Inc.
ca557f44 5
5769d3cd
AC
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
a9762ec7 13 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
a9762ec7 22 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 23
d0f54f9d 24#include "defs.h"
5769d3cd
AC
25#include "arch-utils.h"
26#include "frame.h"
27#include "inferior.h"
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
78f8b424 42#include "gdb_assert.h"
a89aa300 43#include "dis-asm.h"
76a9d10f 44#include "solib-svr4.h"
3fc46200 45#include "prologue-value.h"
5769d3cd 46
d0f54f9d 47#include "s390-tdep.h"
5769d3cd 48
60e6cc42 49
d0f54f9d
JB
50/* The tdep structure. */
51
52struct gdbarch_tdep
5769d3cd 53{
b0cf273e
JB
54 /* ABI version. */
55 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
56
d0f54f9d
JB
57 /* Core file register sets. */
58 const struct regset *gregset;
59 int sizeof_gregset;
60
61 const struct regset *fpregset;
62 int sizeof_fpregset;
63};
64
65
d0f54f9d
JB
66/* Return the name of register REGNUM. */
67static const char *
d93859e2 68s390_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 69{
6707b003
UW
70 static const char *register_names[S390_NUM_TOTAL_REGS] =
71 {
72 /* Program Status Word. */
73 "pswm", "pswa",
74 /* General Purpose Registers. */
75 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
76 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
77 /* Access Registers. */
78 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
79 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15",
80 /* Floating Point Control Word. */
81 "fpc",
82 /* Floating Point Registers. */
83 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
84 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
85 /* Pseudo registers. */
86 "pc", "cc",
87 };
88
d0f54f9d 89 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
6707b003 90 return register_names[regnum];
d0f54f9d
JB
91}
92
93/* Return the GDB type object for the "standard" data type of data in
6707b003 94 register REGNUM. */
d0f54f9d
JB
95static struct type *
96s390_register_type (struct gdbarch *gdbarch, int regnum)
97{
6707b003 98 if (regnum == S390_PSWM_REGNUM || regnum == S390_PSWA_REGNUM)
0dfff4cb 99 return builtin_type (gdbarch)->builtin_long;
6707b003 100 if (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
0dfff4cb 101 return builtin_type (gdbarch)->builtin_long;
6707b003 102 if (regnum >= S390_A0_REGNUM && regnum <= S390_A15_REGNUM)
0dfff4cb 103 return builtin_type (gdbarch)->builtin_int;
6707b003 104 if (regnum == S390_FPC_REGNUM)
0dfff4cb 105 return builtin_type (gdbarch)->builtin_int;
6707b003 106 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
0dfff4cb 107 return builtin_type (gdbarch)->builtin_double;
6707b003 108 if (regnum == S390_PC_REGNUM)
0dfff4cb 109 return builtin_type (gdbarch)->builtin_func_ptr;
6707b003 110 if (regnum == S390_CC_REGNUM)
0dfff4cb 111 return builtin_type (gdbarch)->builtin_int;
6707b003
UW
112
113 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
114}
115
d0f54f9d
JB
116/* DWARF Register Mapping. */
117
118static int s390_dwarf_regmap[] =
119{
120 /* General Purpose Registers. */
121 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
122 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
123 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
124 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
125
126 /* Floating Point Registers. */
127 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
128 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
129 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
130 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
131
132 /* Control Registers (not mapped). */
133 -1, -1, -1, -1, -1, -1, -1, -1,
134 -1, -1, -1, -1, -1, -1, -1, -1,
135
136 /* Access Registers. */
137 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
138 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
139 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
140 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
141
142 /* Program Status Word. */
143 S390_PSWM_REGNUM,
144 S390_PSWA_REGNUM
145};
146
147/* Convert DWARF register number REG to the appropriate register
148 number used by GDB. */
a78f21af 149static int
d3f73121 150s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d
JB
151{
152 int regnum = -1;
153
16aff9a6 154 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
d0f54f9d
JB
155 regnum = s390_dwarf_regmap[reg];
156
157 if (regnum == -1)
8a3fe4f8 158 warning (_("Unmapped DWARF Register #%d encountered."), reg);
d0f54f9d
JB
159
160 return regnum;
161}
162
163/* Pseudo registers - PC and condition code. */
164
165static void
166s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
2e82d168 167 int regnum, gdb_byte *buf)
d0f54f9d
JB
168{
169 ULONGEST val;
170
171 switch (regnum)
172 {
173 case S390_PC_REGNUM:
174 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
175 store_unsigned_integer (buf, 4, val & 0x7fffffff);
176 break;
177
178 case S390_CC_REGNUM:
179 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
180 store_unsigned_integer (buf, 4, (val >> 12) & 3);
181 break;
182
183 default:
e2e0b3e5 184 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
185 }
186}
187
188static void
189s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
2e82d168 190 int regnum, const gdb_byte *buf)
5769d3cd 191{
d0f54f9d
JB
192 ULONGEST val, psw;
193
194 switch (regnum)
195 {
196 case S390_PC_REGNUM:
197 val = extract_unsigned_integer (buf, 4);
198 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
199 psw = (psw & 0x80000000) | (val & 0x7fffffff);
200 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
201 break;
202
203 case S390_CC_REGNUM:
204 val = extract_unsigned_integer (buf, 4);
205 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
206 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
207 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
208 break;
209
210 default:
e2e0b3e5 211 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d 212 }
5769d3cd
AC
213}
214
d0f54f9d
JB
215static void
216s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
2e82d168 217 int regnum, gdb_byte *buf)
d0f54f9d
JB
218{
219 ULONGEST val;
220
221 switch (regnum)
222 {
223 case S390_PC_REGNUM:
224 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
225 break;
226
227 case S390_CC_REGNUM:
228 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
229 store_unsigned_integer (buf, 4, (val >> 44) & 3);
230 break;
231
232 default:
e2e0b3e5 233 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
234 }
235}
236
237static void
238s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
2e82d168 239 int regnum, const gdb_byte *buf)
d0f54f9d
JB
240{
241 ULONGEST val, psw;
242
243 switch (regnum)
244 {
245 case S390_PC_REGNUM:
246 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
247 break;
248
249 case S390_CC_REGNUM:
250 val = extract_unsigned_integer (buf, 4);
251 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
252 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
253 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
254 break;
255
256 default:
e2e0b3e5 257 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
258 }
259}
260
261/* 'float' values are stored in the upper half of floating-point
262 registers, even though we are otherwise a big-endian platform. */
263
9acbedc0
UW
264static struct value *
265s390_value_from_register (struct type *type, int regnum,
266 struct frame_info *frame)
d0f54f9d 267{
9acbedc0
UW
268 struct value *value = default_value_from_register (type, regnum, frame);
269 int len = TYPE_LENGTH (type);
d0f54f9d 270
9acbedc0
UW
271 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8)
272 set_value_offset (value, 0);
d0f54f9d 273
9acbedc0 274 return value;
d0f54f9d
JB
275}
276
277/* Register groups. */
278
a78f21af 279static int
d0f54f9d
JB
280s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
281 struct reggroup *group)
282{
283 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
284
285 /* Registers displayed via 'info regs'. */
286 if (group == general_reggroup)
287 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
288 || regnum == S390_PC_REGNUM
289 || regnum == S390_CC_REGNUM;
290
291 /* Registers displayed via 'info float'. */
292 if (group == float_reggroup)
293 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
294 || regnum == S390_FPC_REGNUM;
295
296 /* Registers that need to be saved/restored in order to
297 push or pop frames. */
298 if (group == save_reggroup || group == restore_reggroup)
299 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
300
301 return default_register_reggroup_p (gdbarch, regnum, group);
302}
303
304
305/* Core file register sets. */
306
307int s390_regmap_gregset[S390_NUM_REGS] =
308{
309 /* Program Status Word. */
310 0x00, 0x04,
311 /* General Purpose Registers. */
312 0x08, 0x0c, 0x10, 0x14,
313 0x18, 0x1c, 0x20, 0x24,
314 0x28, 0x2c, 0x30, 0x34,
315 0x38, 0x3c, 0x40, 0x44,
316 /* Access Registers. */
317 0x48, 0x4c, 0x50, 0x54,
318 0x58, 0x5c, 0x60, 0x64,
319 0x68, 0x6c, 0x70, 0x74,
320 0x78, 0x7c, 0x80, 0x84,
321 /* Floating Point Control Word. */
322 -1,
323 /* Floating Point Registers. */
324 -1, -1, -1, -1, -1, -1, -1, -1,
325 -1, -1, -1, -1, -1, -1, -1, -1,
326};
327
328int s390x_regmap_gregset[S390_NUM_REGS] =
329{
330 0x00, 0x08,
331 /* General Purpose Registers. */
332 0x10, 0x18, 0x20, 0x28,
333 0x30, 0x38, 0x40, 0x48,
334 0x50, 0x58, 0x60, 0x68,
335 0x70, 0x78, 0x80, 0x88,
336 /* Access Registers. */
337 0x90, 0x94, 0x98, 0x9c,
338 0xa0, 0xa4, 0xa8, 0xac,
339 0xb0, 0xb4, 0xb8, 0xbc,
340 0xc0, 0xc4, 0xc8, 0xcc,
341 /* Floating Point Control Word. */
342 -1,
343 /* Floating Point Registers. */
344 -1, -1, -1, -1, -1, -1, -1, -1,
345 -1, -1, -1, -1, -1, -1, -1, -1,
346};
347
348int s390_regmap_fpregset[S390_NUM_REGS] =
349{
350 /* Program Status Word. */
351 -1, -1,
352 /* General Purpose Registers. */
353 -1, -1, -1, -1, -1, -1, -1, -1,
354 -1, -1, -1, -1, -1, -1, -1, -1,
355 /* Access Registers. */
356 -1, -1, -1, -1, -1, -1, -1, -1,
357 -1, -1, -1, -1, -1, -1, -1, -1,
358 /* Floating Point Control Word. */
359 0x00,
360 /* Floating Point Registers. */
361 0x08, 0x10, 0x18, 0x20,
362 0x28, 0x30, 0x38, 0x40,
363 0x48, 0x50, 0x58, 0x60,
364 0x68, 0x70, 0x78, 0x80,
365};
366
367/* Supply register REGNUM from the register set REGSET to register cache
368 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
369static void
370s390_supply_regset (const struct regset *regset, struct regcache *regcache,
371 int regnum, const void *regs, size_t len)
372{
373 const int *offset = regset->descr;
374 int i;
375
376 for (i = 0; i < S390_NUM_REGS; i++)
377 {
378 if ((regnum == i || regnum == -1) && offset[i] != -1)
379 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
380 }
381}
382
92f38ec2
UW
383/* Collect register REGNUM from the register cache REGCACHE and store
384 it in the buffer specified by REGS and LEN as described by the
385 general-purpose register set REGSET. If REGNUM is -1, do this for
386 all registers in REGSET. */
387static void
388s390_collect_regset (const struct regset *regset,
389 const struct regcache *regcache,
390 int regnum, void *regs, size_t len)
391{
392 const int *offset = regset->descr;
393 int i;
394
395 for (i = 0; i < S390_NUM_REGS; i++)
396 {
397 if ((regnum == i || regnum == -1) && offset[i] != -1)
398 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
399 }
400}
401
d0f54f9d
JB
402static const struct regset s390_gregset = {
403 s390_regmap_gregset,
92f38ec2
UW
404 s390_supply_regset,
405 s390_collect_regset
d0f54f9d
JB
406};
407
408static const struct regset s390x_gregset = {
409 s390x_regmap_gregset,
92f38ec2
UW
410 s390_supply_regset,
411 s390_collect_regset
d0f54f9d
JB
412};
413
414static const struct regset s390_fpregset = {
415 s390_regmap_fpregset,
92f38ec2
UW
416 s390_supply_regset,
417 s390_collect_regset
d0f54f9d
JB
418};
419
420/* Return the appropriate register set for the core section identified
421 by SECT_NAME and SECT_SIZE. */
63807e1d 422static const struct regset *
d0f54f9d
JB
423s390_regset_from_core_section (struct gdbarch *gdbarch,
424 const char *sect_name, size_t sect_size)
425{
426 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
427
e31dcd20 428 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
429 return tdep->gregset;
430
e31dcd20 431 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
432 return tdep->fpregset;
433
434 return NULL;
5769d3cd
AC
435}
436
d0f54f9d 437
4bc8c588
JB
438/* Decoding S/390 instructions. */
439
440/* Named opcode values for the S/390 instructions we recognize. Some
441 instructions have their opcode split across two fields; those are the
442 op1_* and op2_* enums. */
443enum
444 {
a8c99f38
JB
445 op1_lhi = 0xa7, op2_lhi = 0x08,
446 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 447 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 448 op_lr = 0x18,
a8c99f38
JB
449 op_lgr = 0xb904,
450 op_l = 0x58,
451 op1_ly = 0xe3, op2_ly = 0x58,
452 op1_lg = 0xe3, op2_lg = 0x04,
453 op_lm = 0x98,
454 op1_lmy = 0xeb, op2_lmy = 0x98,
455 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 456 op_st = 0x50,
a8c99f38 457 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 458 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 459 op_std = 0x60,
4bc8c588 460 op_stm = 0x90,
a8c99f38 461 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 462 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
463 op1_aghi = 0xa7, op2_aghi = 0x0b,
464 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
465 op1_agfi = 0xc2, op2_agfi = 0x08,
466 op1_afi = 0xc2, op2_afi = 0x09,
467 op1_algfi= 0xc2, op2_algfi= 0x0a,
468 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
469 op_ar = 0x1a,
470 op_agr = 0xb908,
471 op_a = 0x5a,
472 op1_ay = 0xe3, op2_ay = 0x5a,
473 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
474 op1_slgfi= 0xc2, op2_slgfi= 0x04,
475 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
476 op_sr = 0x1b,
477 op_sgr = 0xb909,
478 op_s = 0x5b,
479 op1_sy = 0xe3, op2_sy = 0x5b,
480 op1_sg = 0xe3, op2_sg = 0x09,
481 op_nr = 0x14,
482 op_ngr = 0xb980,
483 op_la = 0x41,
484 op1_lay = 0xe3, op2_lay = 0x71,
485 op1_larl = 0xc0, op2_larl = 0x00,
486 op_basr = 0x0d,
487 op_bas = 0x4d,
488 op_bcr = 0x07,
489 op_bc = 0x0d,
490 op1_bras = 0xa7, op2_bras = 0x05,
491 op1_brasl= 0xc0, op2_brasl= 0x05,
492 op1_brc = 0xa7, op2_brc = 0x04,
493 op1_brcl = 0xc0, op2_brcl = 0x04,
4bc8c588
JB
494 };
495
496
a8c99f38
JB
497/* Read a single instruction from address AT. */
498
499#define S390_MAX_INSTR_SIZE 6
500static int
501s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
502{
503 static int s390_instrlen[] = { 2, 4, 4, 6 };
504 int instrlen;
505
8defab1a 506 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
507 return -1;
508 instrlen = s390_instrlen[instr[0] >> 6];
509 if (instrlen > 2)
510 {
8defab1a 511 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
512 return -1;
513 }
514 return instrlen;
515}
516
517
4bc8c588
JB
518/* The functions below are for recognizing and decoding S/390
519 instructions of various formats. Each of them checks whether INSN
520 is an instruction of the given format, with the specified opcodes.
521 If it is, it sets the remaining arguments to the values of the
522 instruction's fields, and returns a non-zero value; otherwise, it
523 returns zero.
524
525 These functions' arguments appear in the order they appear in the
526 instruction, not in the machine-language form. So, opcodes always
527 come first, even though they're sometimes scattered around the
528 instructions. And displacements appear before base and extension
529 registers, as they do in the assembly syntax, not at the end, as
530 they do in the machine language. */
a78f21af 531static int
4bc8c588
JB
532is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
533{
534 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
535 {
536 *r1 = (insn[1] >> 4) & 0xf;
537 /* i2 is a 16-bit signed quantity. */
538 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
539 return 1;
540 }
541 else
542 return 0;
543}
8ac0e65a 544
5769d3cd 545
4bc8c588
JB
546static int
547is_ril (bfd_byte *insn, int op1, int op2,
548 unsigned int *r1, int *i2)
549{
550 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
551 {
552 *r1 = (insn[1] >> 4) & 0xf;
553 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
554 no sign extension is necessary, but we don't want to assume
555 that. */
556 *i2 = (((insn[2] << 24)
557 | (insn[3] << 16)
558 | (insn[4] << 8)
559 | (insn[5])) ^ 0x80000000) - 0x80000000;
560 return 1;
561 }
562 else
563 return 0;
564}
565
566
567static int
568is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
569{
570 if (insn[0] == op)
571 {
572 *r1 = (insn[1] >> 4) & 0xf;
573 *r2 = insn[1] & 0xf;
574 return 1;
575 }
576 else
577 return 0;
578}
579
580
581static int
582is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
583{
584 if (((insn[0] << 8) | insn[1]) == op)
585 {
586 /* Yes, insn[3]. insn[2] is unused in RRE format. */
587 *r1 = (insn[3] >> 4) & 0xf;
588 *r2 = insn[3] & 0xf;
589 return 1;
590 }
591 else
592 return 0;
593}
594
595
596static int
597is_rs (bfd_byte *insn, int op,
598 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
599{
600 if (insn[0] == op)
601 {
602 *r1 = (insn[1] >> 4) & 0xf;
603 *r3 = insn[1] & 0xf;
604 *b2 = (insn[2] >> 4) & 0xf;
605 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
606 return 1;
607 }
608 else
609 return 0;
610}
611
612
613static int
a8c99f38 614is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
615 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
616{
617 if (insn[0] == op1
4bc8c588
JB
618 && insn[5] == op2)
619 {
620 *r1 = (insn[1] >> 4) & 0xf;
621 *r3 = insn[1] & 0xf;
622 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
623 /* The 'long displacement' is a 20-bit signed integer. */
624 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
625 ^ 0x80000) - 0x80000;
4bc8c588
JB
626 return 1;
627 }
628 else
629 return 0;
630}
631
632
633static int
634is_rx (bfd_byte *insn, int op,
635 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
636{
637 if (insn[0] == op)
638 {
639 *r1 = (insn[1] >> 4) & 0xf;
640 *x2 = insn[1] & 0xf;
641 *b2 = (insn[2] >> 4) & 0xf;
642 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
643 return 1;
644 }
645 else
646 return 0;
647}
648
649
650static int
a8c99f38 651is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
652 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
653{
654 if (insn[0] == op1
4bc8c588
JB
655 && insn[5] == op2)
656 {
657 *r1 = (insn[1] >> 4) & 0xf;
658 *x2 = insn[1] & 0xf;
659 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
660 /* The 'long displacement' is a 20-bit signed integer. */
661 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
662 ^ 0x80000) - 0x80000;
4bc8c588
JB
663 return 1;
664 }
665 else
666 return 0;
667}
668
669
3fc46200 670/* Prologue analysis. */
4bc8c588 671
d0f54f9d
JB
672#define S390_NUM_GPRS 16
673#define S390_NUM_FPRS 16
4bc8c588 674
a8c99f38
JB
675struct s390_prologue_data {
676
ee1b3323
UW
677 /* The stack. */
678 struct pv_area *stack;
679
a8c99f38
JB
680 /* The size of a GPR or FPR. */
681 int gpr_size;
682 int fpr_size;
683
684 /* The general-purpose registers. */
3fc46200 685 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
686
687 /* The floating-point registers. */
3fc46200 688 pv_t fpr[S390_NUM_FPRS];
a8c99f38 689
121d8485
UW
690 /* The offset relative to the CFA where the incoming GPR N was saved
691 by the function prologue. 0 if not saved or unknown. */
692 int gpr_slot[S390_NUM_GPRS];
4bc8c588 693
121d8485
UW
694 /* Likewise for FPRs. */
695 int fpr_slot[S390_NUM_FPRS];
4bc8c588 696
121d8485
UW
697 /* Nonzero if the backchain was saved. This is assumed to be the
698 case when the incoming SP is saved at the current SP location. */
699 int back_chain_saved_p;
700};
4bc8c588 701
3fc46200
UW
702/* Return the effective address for an X-style instruction, like:
703
704 L R1, D2(X2, B2)
705
706 Here, X2 and B2 are registers, and D2 is a signed 20-bit
707 constant; the effective address is the sum of all three. If either
708 X2 or B2 are zero, then it doesn't contribute to the sum --- this
709 means that r0 can't be used as either X2 or B2. */
710static pv_t
711s390_addr (struct s390_prologue_data *data,
712 int d2, unsigned int x2, unsigned int b2)
713{
714 pv_t result;
715
716 result = pv_constant (d2);
717 if (x2)
718 result = pv_add (result, data->gpr[x2]);
719 if (b2)
720 result = pv_add (result, data->gpr[b2]);
721
722 return result;
723}
724
725/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 726static void
3fc46200
UW
727s390_store (struct s390_prologue_data *data,
728 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
729 pv_t value)
4bc8c588 730{
3fc46200 731 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 732 pv_t offset;
121d8485
UW
733
734 /* Check whether we are storing the backchain. */
3fc46200 735 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 736
3fc46200 737 if (pv_is_constant (offset) && offset.k == 0)
121d8485 738 if (size == data->gpr_size
3fc46200 739 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
740 {
741 data->back_chain_saved_p = 1;
742 return;
743 }
744
745
746 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
747 if (!pv_area_store_would_trash (data->stack, addr))
748 pv_area_store (data->stack, addr, size, value);
4bc8c588 749
a8c99f38 750
121d8485
UW
751 /* Note: If this is some store we cannot identify, you might think we
752 should forget our cached values, as any of those might have been hit.
753
754 However, we make the assumption that the register save areas are only
755 ever stored to once in any given function, and we do recognize these
756 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 757}
4bc8c588 758
3fc46200
UW
759/* Do a SIZE-byte load from D2(X2,B2). */
760static pv_t
761s390_load (struct s390_prologue_data *data,
762 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
763
4bc8c588 764{
3fc46200 765 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 766 pv_t offset;
4bc8c588 767
a8c99f38
JB
768 /* If it's a load from an in-line constant pool, then we can
769 simulate that, under the assumption that the code isn't
770 going to change between the time the processor actually
771 executed it creating the current frame, and the time when
772 we're analyzing the code to unwind past that frame. */
3fc46200 773 if (pv_is_constant (addr))
4bc8c588 774 {
0542c86d 775 struct target_section *secp;
3fc46200 776 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38
JB
777 if (secp != NULL
778 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
779 & SEC_READONLY))
3fc46200 780 return pv_constant (read_memory_integer (addr.k, size));
a8c99f38 781 }
7666f43c 782
121d8485 783 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
784 return pv_area_fetch (data->stack, addr, size);
785}
121d8485 786
ee1b3323
UW
787/* Function for finding saved registers in a 'struct pv_area'; we pass
788 this to pv_area_scan.
121d8485 789
ee1b3323
UW
790 If VALUE is a saved register, ADDR says it was saved at a constant
791 offset from the frame base, and SIZE indicates that the whole
792 register was saved, record its offset in the reg_offset table in
793 PROLOGUE_UNTYPED. */
794static void
795s390_check_for_saved (void *data_untyped, pv_t addr, CORE_ADDR size, pv_t value)
796{
797 struct s390_prologue_data *data = data_untyped;
798 int i, offset;
799
800 if (!pv_is_register (addr, S390_SP_REGNUM))
801 return;
802
803 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 804
ee1b3323
UW
805 /* If we are storing the original value of a register, we want to
806 record the CFA offset. If the same register is stored multiple
807 times, the stack slot with the highest address counts. */
808
809 for (i = 0; i < S390_NUM_GPRS; i++)
810 if (size == data->gpr_size
811 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
812 if (data->gpr_slot[i] == 0
813 || data->gpr_slot[i] > offset)
814 {
815 data->gpr_slot[i] = offset;
816 return;
817 }
818
819 for (i = 0; i < S390_NUM_FPRS; i++)
820 if (size == data->fpr_size
821 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
822 if (data->fpr_slot[i] == 0
823 || data->fpr_slot[i] > offset)
824 {
825 data->fpr_slot[i] = offset;
826 return;
827 }
a8c99f38 828}
4bc8c588 829
a8c99f38
JB
830/* Analyze the prologue of the function starting at START_PC,
831 continuing at most until CURRENT_PC. Initialize DATA to
832 hold all information we find out about the state of the registers
833 and stack slots. Return the address of the instruction after
834 the last one that changed the SP, FP, or back chain; or zero
835 on error. */
836static CORE_ADDR
837s390_analyze_prologue (struct gdbarch *gdbarch,
838 CORE_ADDR start_pc,
839 CORE_ADDR current_pc,
840 struct s390_prologue_data *data)
4bc8c588 841{
a8c99f38
JB
842 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
843
4bc8c588 844 /* Our return value:
a8c99f38
JB
845 The address of the instruction after the last one that changed
846 the SP, FP, or back chain; zero if we got an error trying to
847 read memory. */
848 CORE_ADDR result = start_pc;
4bc8c588 849
4bc8c588
JB
850 /* The current PC for our abstract interpretation. */
851 CORE_ADDR pc;
852
853 /* The address of the next instruction after that. */
854 CORE_ADDR next_pc;
855
4bc8c588
JB
856 /* Set up everything's initial value. */
857 {
858 int i;
859
55f960e1 860 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 861
a8c99f38
JB
862 /* For the purpose of prologue tracking, we consider the GPR size to
863 be equal to the ABI word size, even if it is actually larger
864 (i.e. when running a 32-bit binary under a 64-bit kernel). */
865 data->gpr_size = word_size;
866 data->fpr_size = 8;
867
4bc8c588 868 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 869 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
870
871 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 872 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 873
121d8485
UW
874 for (i = 0; i < S390_NUM_GPRS; i++)
875 data->gpr_slot[i] = 0;
876
877 for (i = 0; i < S390_NUM_FPRS; i++)
878 data->fpr_slot[i] = 0;
4bc8c588 879
121d8485 880 data->back_chain_saved_p = 0;
4bc8c588
JB
881 }
882
a8c99f38
JB
883 /* Start interpreting instructions, until we hit the frame's
884 current PC or the first branch instruction. */
885 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 886 {
4bc8c588 887 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 888 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 889
3fc46200
UW
890 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
891 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
892 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
893
4bc8c588 894 /* Fields for various kinds of instructions. */
a8c99f38
JB
895 unsigned int b2, r1, r2, x2, r3;
896 int i2, d2;
4bc8c588 897
121d8485 898 /* The values of SP and FP before this instruction,
4bc8c588 899 for detecting instructions that change them. */
3fc46200 900 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
901 /* Likewise for the flag whether the back chain was saved. */
902 int pre_insn_back_chain_saved_p;
4bc8c588
JB
903
904 /* If we got an error trying to read the instruction, report it. */
905 if (insn_len < 0)
8ac0e65a 906 {
a8c99f38 907 result = 0;
4bc8c588
JB
908 break;
909 }
910
911 next_pc = pc + insn_len;
912
a8c99f38
JB
913 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
914 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 915 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 916
4bc8c588 917
3fc46200
UW
918 /* LHI r1, i2 --- load halfword immediate. */
919 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
920 /* LGFI r1, i2 --- load fullword immediate. */
921 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
922 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
923 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
924 data->gpr[r1] = pv_constant (i2);
925
926 /* LR r1, r2 --- load from register. */
927 /* LGR r1, r2 --- load from register (64-bit version). */
928 else if (is_rr (insn32, op_lr, &r1, &r2)
929 || is_rre (insn64, op_lgr, &r1, &r2))
930 data->gpr[r1] = data->gpr[r2];
931
932 /* L r1, d2(x2, b2) --- load. */
933 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
934 /* LG r1, d2(x2, b2) --- load (64-bit version). */
935 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
936 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
937 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
938 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
939
940 /* ST r1, d2(x2, b2) --- store. */
941 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
942 /* STG r1, d2(x2, b2) --- store (64-bit version). */
943 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
944 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
945 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
946 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
947
948 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 949 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
950 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
951
952 /* STM r1, r3, d2(b2) --- store multiple. */
953 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version). */
954 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
955 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
956 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
957 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 958 {
3fc46200
UW
959 for (; r1 <= r3; r1++, d2 += data->gpr_size)
960 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
961 }
962
3fc46200
UW
963 /* AHI r1, i2 --- add halfword immediate. */
964 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
965 /* AFI r1, i2 --- add fullword immediate. */
966 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
967 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
968 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
969 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
970 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
971 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
972
973 /* ALFI r1, i2 --- add logical immediate. */
974 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
975 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
976 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
977 data->gpr[r1] = pv_add_constant (data->gpr[r1],
978 (CORE_ADDR)i2 & 0xffffffff);
979
980 /* AR r1, r2 -- add register. */
981 /* AGR r1, r2 -- add register (64-bit version). */
982 else if (is_rr (insn32, op_ar, &r1, &r2)
983 || is_rre (insn64, op_agr, &r1, &r2))
984 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
985
986 /* A r1, d2(x2, b2) -- add. */
987 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
988 /* AG r1, d2(x2, b2) -- add (64-bit version). */
989 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
990 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
991 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
992 data->gpr[r1] = pv_add (data->gpr[r1],
993 s390_load (data, d2, x2, b2, data->gpr_size));
994
995 /* SLFI r1, i2 --- subtract logical immediate. */
996 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
997 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
998 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
999 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1000 -((CORE_ADDR)i2 & 0xffffffff));
1001
1002 /* SR r1, r2 -- subtract register. */
1003 /* SGR r1, r2 -- subtract register (64-bit version). */
1004 else if (is_rr (insn32, op_sr, &r1, &r2)
1005 || is_rre (insn64, op_sgr, &r1, &r2))
1006 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1007
1008 /* S r1, d2(x2, b2) -- subtract. */
1009 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1010 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1011 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1012 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1013 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1014 data->gpr[r1] = pv_subtract (data->gpr[r1],
1015 s390_load (data, d2, x2, b2, data->gpr_size));
1016
1017 /* LA r1, d2(x2, b2) --- load address. */
1018 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1019 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1020 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1021 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1022
1023 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1024 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1025 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1026
3fc46200 1027 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1028 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1029 else if (is_rr (insn, op_basr, &r1, &r2)
1030 && r2 == 0)
3fc46200 1031 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1032
3fc46200 1033 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1034 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1035 {
3fc46200 1036 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1037 next_pc = pc + i2 * 2;
4bc8c588 1038
a8c99f38
JB
1039 /* We'd better not interpret any backward branches. We'll
1040 never terminate. */
1041 if (next_pc <= pc)
4bc8c588
JB
1042 break;
1043 }
1044
a8c99f38
JB
1045 /* Terminate search when hitting any other branch instruction. */
1046 else if (is_rr (insn, op_basr, &r1, &r2)
1047 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1048 || is_rr (insn, op_bcr, &r1, &r2)
1049 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1050 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1051 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1052 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1053 break;
1054
4bc8c588
JB
1055 else
1056 /* An instruction we don't know how to simulate. The only
1057 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1058 to 'unknown'. Instead, we'll be optimistic: we assume that
1059 we *can* interpret every instruction that the compiler uses
1060 to manipulate any of the data we're interested in here --
1061 then we can just ignore anything else. */
1062 ;
4bc8c588
JB
1063
1064 /* Record the address after the last instruction that changed
1065 the FP, SP, or backlink. Ignore instructions that changed
1066 them back to their original values --- those are probably
1067 restore instructions. (The back chain is never restored,
1068 just popped.) */
1069 {
3fc46200
UW
1070 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1071 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1072
3fc46200
UW
1073 if ((! pv_is_identical (pre_insn_sp, sp)
1074 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1075 && sp.kind != pvk_unknown)
1076 || (! pv_is_identical (pre_insn_fp, fp)
1077 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1078 && fp.kind != pvk_unknown)
121d8485 1079 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1080 result = next_pc;
4bc8c588 1081 }
5769d3cd 1082 }
4bc8c588 1083
ee1b3323
UW
1084 /* Record where all the registers were saved. */
1085 pv_area_scan (data->stack, s390_check_for_saved, data);
1086
1087 free_pv_area (data->stack);
1088 data->stack = NULL;
1089
4bc8c588 1090 return result;
5769d3cd
AC
1091}
1092
a8c99f38
JB
1093/* Advance PC across any function entry prologue instructions to reach
1094 some "real" code. */
1095static CORE_ADDR
6093d2eb 1096s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1097{
1098 struct s390_prologue_data data;
1099 CORE_ADDR skip_pc;
6093d2eb 1100 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1101 return skip_pc ? skip_pc : pc;
1102}
1103
d0f54f9d
JB
1104/* Return true if we are in the functin's epilogue, i.e. after the
1105 instruction that destroyed the function's stack frame. */
1106static int
1107s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1108{
1109 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1110
1111 /* In frameless functions, there's not frame to destroy and thus
1112 we don't care about the epilogue.
1113
1114 In functions with frame, the epilogue sequence is a pair of
1115 a LM-type instruction that restores (amongst others) the
1116 return register %r14 and the stack pointer %r15, followed
1117 by a branch 'br %r14' --or equivalent-- that effects the
1118 actual return.
1119
1120 In that situation, this function needs to return 'true' in
1121 exactly one case: when pc points to that branch instruction.
1122
1123 Thus we try to disassemble the one instructions immediately
1124 preceeding pc and check whether it is an LM-type instruction
1125 modifying the stack pointer.
1126
1127 Note that disassembling backwards is not reliable, so there
1128 is a slight chance of false positives here ... */
1129
1130 bfd_byte insn[6];
1131 unsigned int r1, r3, b2;
1132 int d2;
1133
1134 if (word_size == 4
8defab1a 1135 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1136 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1137 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1138 return 1;
1139
a8c99f38 1140 if (word_size == 4
8defab1a 1141 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1142 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1143 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1144 return 1;
1145
d0f54f9d 1146 if (word_size == 8
8defab1a 1147 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1148 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1149 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1150 return 1;
1151
1152 return 0;
1153}
5769d3cd 1154
a8c99f38
JB
1155
1156/* Normal stack frames. */
1157
1158struct s390_unwind_cache {
1159
1160 CORE_ADDR func;
1161 CORE_ADDR frame_base;
1162 CORE_ADDR local_base;
1163
1164 struct trad_frame_saved_reg *saved_regs;
1165};
1166
a78f21af 1167static int
f089c433 1168s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1169 struct s390_unwind_cache *info)
5769d3cd 1170{
f089c433 1171 struct gdbarch *gdbarch = get_frame_arch (this_frame);
121d8485 1172 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38
JB
1173 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1174 struct s390_prologue_data data;
3fc46200
UW
1175 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1176 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1177 int i;
1178 CORE_ADDR cfa;
a8c99f38
JB
1179 CORE_ADDR func;
1180 CORE_ADDR result;
1181 ULONGEST reg;
1182 CORE_ADDR prev_sp;
1183 int frame_pointer;
1184 int size;
edb3359d 1185 struct frame_info *next_frame;
a8c99f38
JB
1186
1187 /* Try to find the function start address. If we can't find it, we don't
1188 bother searching for it -- with modern compilers this would be mostly
1189 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1190 or else a valid backchain ... */
f089c433 1191 func = get_frame_func (this_frame);
a8c99f38
JB
1192 if (!func)
1193 return 0;
5769d3cd 1194
a8c99f38
JB
1195 /* Try to analyze the prologue. */
1196 result = s390_analyze_prologue (gdbarch, func,
f089c433 1197 get_frame_pc (this_frame), &data);
a8c99f38 1198 if (!result)
5769d3cd 1199 return 0;
5769d3cd 1200
a8c99f38
JB
1201 /* If this was successful, we should have found the instruction that
1202 sets the stack pointer register to the previous value of the stack
1203 pointer minus the frame size. */
3fc46200 1204 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1205 return 0;
a8c99f38
JB
1206
1207 /* A frame size of zero at this point can mean either a real
1208 frameless function, or else a failure to find the prologue.
1209 Perform some sanity checks to verify we really have a
1210 frameless function. */
1211 if (sp->k == 0)
5769d3cd 1212 {
a8c99f38
JB
1213 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1214 size zero. This is only possible if the next frame is a sentinel
1215 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1216 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1217 needed, instead the code should simpliy rely on its
1218 analysis. */
edb3359d
DJ
1219 next_frame = get_next_frame (this_frame);
1220 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1221 next_frame = get_next_frame (next_frame);
1222 if (next_frame
f089c433 1223 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1224 return 0;
5769d3cd 1225
a8c99f38
JB
1226 /* If we really have a frameless function, %r14 must be valid
1227 -- in particular, it must point to a different function. */
f089c433 1228 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1229 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1230 if (get_pc_function_start (reg) == func)
5769d3cd 1231 {
a8c99f38
JB
1232 /* However, there is one case where it *is* valid for %r14
1233 to point to the same function -- if this is a recursive
1234 call, and we have stopped in the prologue *before* the
1235 stack frame was allocated.
1236
1237 Recognize this case by looking ahead a bit ... */
5769d3cd 1238
a8c99f38 1239 struct s390_prologue_data data2;
3fc46200 1240 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1241
1242 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1243 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1244 && sp->k != 0))
1245 return 0;
5769d3cd 1246 }
5769d3cd 1247 }
5769d3cd
AC
1248
1249
a8c99f38
JB
1250 /* OK, we've found valid prologue data. */
1251 size = -sp->k;
5769d3cd 1252
a8c99f38
JB
1253 /* If the frame pointer originally also holds the same value
1254 as the stack pointer, we're probably using it. If it holds
1255 some other value -- even a constant offset -- it is most
1256 likely used as temp register. */
3fc46200 1257 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1258 frame_pointer = S390_FRAME_REGNUM;
1259 else
1260 frame_pointer = S390_SP_REGNUM;
1261
1262 /* If we've detected a function with stack frame, we'll still have to
1263 treat it as frameless if we're currently within the function epilog
1264 code at a point where the frame pointer has already been restored.
1265 This can only happen in an innermost frame. */
0e100dab
AC
1266 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1267 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1268 next_frame = get_next_frame (this_frame);
1269 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1270 next_frame = get_next_frame (next_frame);
f089c433 1271 if (size > 0
edb3359d 1272 && (next_frame == NULL
f089c433 1273 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1274 {
a8c99f38
JB
1275 /* See the comment in s390_in_function_epilogue_p on why this is
1276 not completely reliable ... */
f089c433 1277 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1278 {
a8c99f38
JB
1279 memset (&data, 0, sizeof (data));
1280 size = 0;
1281 frame_pointer = S390_SP_REGNUM;
5769d3cd 1282 }
5769d3cd 1283 }
5769d3cd 1284
a8c99f38
JB
1285 /* Once we know the frame register and the frame size, we can unwind
1286 the current value of the frame register from the next frame, and
1287 add back the frame size to arrive that the previous frame's
1288 stack pointer value. */
f089c433 1289 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1290 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1291
121d8485
UW
1292 /* Record the addresses of all register spill slots the prologue parser
1293 has recognized. Consider only registers defined as call-saved by the
1294 ABI; for call-clobbered registers the parser may have recognized
1295 spurious stores. */
5769d3cd 1296
121d8485
UW
1297 for (i = 6; i <= 15; i++)
1298 if (data.gpr_slot[i] != 0)
1299 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1300
121d8485 1301 switch (tdep->abi)
5769d3cd 1302 {
121d8485
UW
1303 case ABI_LINUX_S390:
1304 if (data.fpr_slot[4] != 0)
1305 info->saved_regs[S390_F4_REGNUM].addr = cfa - data.fpr_slot[4];
1306 if (data.fpr_slot[6] != 0)
1307 info->saved_regs[S390_F6_REGNUM].addr = cfa - data.fpr_slot[6];
1308 break;
a8c99f38 1309
121d8485
UW
1310 case ABI_LINUX_ZSERIES:
1311 for (i = 8; i <= 15; i++)
1312 if (data.fpr_slot[i] != 0)
1313 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
1314 break;
a8c99f38
JB
1315 }
1316
1317 /* Function return will set PC to %r14. */
1318 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1319
1320 /* In frameless functions, we unwind simply by moving the return
1321 address to the PC. However, if we actually stored to the
1322 save area, use that -- we might only think the function frameless
1323 because we're in the middle of the prologue ... */
1324 if (size == 0
1325 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1326 {
1327 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1328 }
a8c99f38
JB
1329
1330 /* Another sanity check: unless this is a frameless function,
1331 we should have found spill slots for SP and PC.
1332 If not, we cannot unwind further -- this happens e.g. in
1333 libc's thread_start routine. */
1334 if (size > 0)
5769d3cd 1335 {
a8c99f38
JB
1336 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1337 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1338 prev_sp = -1;
5769d3cd 1339 }
a8c99f38
JB
1340
1341 /* We use the current value of the frame register as local_base,
1342 and the top of the register save area as frame_base. */
1343 if (prev_sp != -1)
1344 {
1345 info->frame_base = prev_sp + 16*word_size + 32;
1346 info->local_base = prev_sp - size;
1347 }
1348
1349 info->func = func;
1350 return 1;
5769d3cd
AC
1351}
1352
a78f21af 1353static void
f089c433 1354s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1355 struct s390_unwind_cache *info)
5769d3cd 1356{
f089c433 1357 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1358 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1359 CORE_ADDR backchain;
1360 ULONGEST reg;
1361 LONGEST sp;
1362
1363 /* Get the backchain. */
f089c433 1364 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
1365 backchain = read_memory_unsigned_integer (reg, word_size);
1366
1367 /* A zero backchain terminates the frame chain. As additional
1368 sanity check, let's verify that the spill slot for SP in the
1369 save area pointed to by the backchain in fact links back to
1370 the save area. */
1371 if (backchain != 0
1372 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp)
1373 && (CORE_ADDR)sp == backchain)
1374 {
1375 /* We don't know which registers were saved, but it will have
1376 to be at least %r14 and %r15. This will allow us to continue
1377 unwinding, but other prev-frame registers may be incorrect ... */
1378 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1379 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1380
1381 /* Function return will set PC to %r14. */
1382 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1383
1384 /* We use the current value of the frame register as local_base,
1385 and the top of the register save area as frame_base. */
1386 info->frame_base = backchain + 16*word_size + 32;
1387 info->local_base = reg;
1388 }
1389
f089c433 1390 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1391}
1392
a8c99f38 1393static struct s390_unwind_cache *
f089c433 1394s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1395 void **this_prologue_cache)
1396{
1397 struct s390_unwind_cache *info;
1398 if (*this_prologue_cache)
1399 return *this_prologue_cache;
1400
1401 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1402 *this_prologue_cache = info;
f089c433 1403 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1404 info->func = -1;
1405 info->frame_base = -1;
1406 info->local_base = -1;
1407
1408 /* Try to use prologue analysis to fill the unwind cache.
1409 If this fails, fall back to reading the stack backchain. */
f089c433
UW
1410 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1411 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
1412
1413 return info;
1414}
5769d3cd 1415
a78f21af 1416static void
f089c433 1417s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1418 void **this_prologue_cache,
1419 struct frame_id *this_id)
5769d3cd 1420{
a8c99f38 1421 struct s390_unwind_cache *info
f089c433 1422 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 1423
a8c99f38
JB
1424 if (info->frame_base == -1)
1425 return;
5769d3cd 1426
a8c99f38 1427 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
1428}
1429
f089c433
UW
1430static struct value *
1431s390_frame_prev_register (struct frame_info *this_frame,
1432 void **this_prologue_cache, int regnum)
a8c99f38
JB
1433{
1434 struct s390_unwind_cache *info
f089c433
UW
1435 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
1436 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1437}
1438
1439static const struct frame_unwind s390_frame_unwind = {
1440 NORMAL_FRAME,
1441 s390_frame_this_id,
f089c433
UW
1442 s390_frame_prev_register,
1443 NULL,
1444 default_frame_sniffer
a8c99f38
JB
1445};
1446
5769d3cd 1447
8e645ae7
AC
1448/* Code stubs and their stack frames. For things like PLTs and NULL
1449 function calls (where there is no true frame and the return address
1450 is in the RETADDR register). */
a8c99f38 1451
8e645ae7
AC
1452struct s390_stub_unwind_cache
1453{
a8c99f38
JB
1454 CORE_ADDR frame_base;
1455 struct trad_frame_saved_reg *saved_regs;
1456};
1457
8e645ae7 1458static struct s390_stub_unwind_cache *
f089c433 1459s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 1460 void **this_prologue_cache)
5769d3cd 1461{
f089c433 1462 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1463 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 1464 struct s390_stub_unwind_cache *info;
a8c99f38 1465 ULONGEST reg;
5c3cf190 1466
a8c99f38
JB
1467 if (*this_prologue_cache)
1468 return *this_prologue_cache;
5c3cf190 1469
8e645ae7 1470 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 1471 *this_prologue_cache = info;
f089c433 1472 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1473
1474 /* The return address is in register %r14. */
1475 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
1476
1477 /* Retrieve stack pointer and determine our frame base. */
f089c433 1478 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
1479 info->frame_base = reg + 16*word_size + 32;
1480
1481 return info;
5769d3cd
AC
1482}
1483
a8c99f38 1484static void
f089c433 1485s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
1486 void **this_prologue_cache,
1487 struct frame_id *this_id)
5769d3cd 1488{
8e645ae7 1489 struct s390_stub_unwind_cache *info
f089c433
UW
1490 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1491 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 1492}
5769d3cd 1493
f089c433
UW
1494static struct value *
1495s390_stub_frame_prev_register (struct frame_info *this_frame,
1496 void **this_prologue_cache, int regnum)
8e645ae7
AC
1497{
1498 struct s390_stub_unwind_cache *info
f089c433
UW
1499 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1500 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1501}
1502
f089c433
UW
1503static int
1504s390_stub_frame_sniffer (const struct frame_unwind *self,
1505 struct frame_info *this_frame,
1506 void **this_prologue_cache)
a8c99f38 1507{
93d42b30 1508 CORE_ADDR addr_in_block;
8e645ae7
AC
1509 bfd_byte insn[S390_MAX_INSTR_SIZE];
1510
1511 /* If the current PC points to non-readable memory, we assume we
1512 have trapped due to an invalid function pointer call. We handle
1513 the non-existing current function like a PLT stub. */
f089c433 1514 addr_in_block = get_frame_address_in_block (this_frame);
93d42b30 1515 if (in_plt_section (addr_in_block, NULL)
f089c433
UW
1516 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
1517 return 1;
1518 return 0;
a8c99f38 1519}
5769d3cd 1520
f089c433
UW
1521static const struct frame_unwind s390_stub_frame_unwind = {
1522 NORMAL_FRAME,
1523 s390_stub_frame_this_id,
1524 s390_stub_frame_prev_register,
1525 NULL,
1526 s390_stub_frame_sniffer
1527};
1528
5769d3cd 1529
a8c99f38 1530/* Signal trampoline stack frames. */
5769d3cd 1531
a8c99f38
JB
1532struct s390_sigtramp_unwind_cache {
1533 CORE_ADDR frame_base;
1534 struct trad_frame_saved_reg *saved_regs;
1535};
5769d3cd 1536
a8c99f38 1537static struct s390_sigtramp_unwind_cache *
f089c433 1538s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1539 void **this_prologue_cache)
5769d3cd 1540{
f089c433 1541 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1542 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1543 struct s390_sigtramp_unwind_cache *info;
1544 ULONGEST this_sp, prev_sp;
1545 CORE_ADDR next_ra, next_cfa, sigreg_ptr;
1546 int i;
1547
1548 if (*this_prologue_cache)
1549 return *this_prologue_cache;
5769d3cd 1550
a8c99f38
JB
1551 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
1552 *this_prologue_cache = info;
f089c433 1553 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 1554
f089c433
UW
1555 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1556 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
1557 next_cfa = this_sp + 16*word_size + 32;
1558
1559 /* New-style RT frame:
1560 retcode + alignment (8 bytes)
1561 siginfo (128 bytes)
1562 ucontext (contains sigregs at offset 5 words) */
1563 if (next_ra == next_cfa)
1564 {
f0f63663 1565 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
a8c99f38
JB
1566 }
1567
1568 /* Old-style RT frame and all non-RT frames:
1569 old signal mask (8 bytes)
1570 pointer to sigregs */
5769d3cd
AC
1571 else
1572 {
a8c99f38
JB
1573 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size);
1574 }
5769d3cd 1575
a8c99f38
JB
1576 /* The sigregs structure looks like this:
1577 long psw_mask;
1578 long psw_addr;
1579 long gprs[16];
1580 int acrs[16];
1581 int fpc;
1582 int __pad;
1583 double fprs[16]; */
5769d3cd 1584
a8c99f38
JB
1585 /* Let's ignore the PSW mask, it will not be restored anyway. */
1586 sigreg_ptr += word_size;
1587
1588 /* Next comes the PSW address. */
1589 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr;
1590 sigreg_ptr += word_size;
1591
1592 /* Then the GPRs. */
1593 for (i = 0; i < 16; i++)
1594 {
1595 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
1596 sigreg_ptr += word_size;
1597 }
1598
1599 /* Then the ACRs. */
1600 for (i = 0; i < 16; i++)
1601 {
1602 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
1603 sigreg_ptr += 4;
5769d3cd 1604 }
5769d3cd 1605
a8c99f38
JB
1606 /* The floating-point control word. */
1607 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
1608 sigreg_ptr += 8;
5769d3cd 1609
a8c99f38
JB
1610 /* And finally the FPRs. */
1611 for (i = 0; i < 16; i++)
1612 {
1613 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
1614 sigreg_ptr += 8;
1615 }
1616
1617 /* Restore the previous frame's SP. */
1618 prev_sp = read_memory_unsigned_integer (
1619 info->saved_regs[S390_SP_REGNUM].addr,
1620 word_size);
5769d3cd 1621
a8c99f38
JB
1622 /* Determine our frame base. */
1623 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 1624
a8c99f38 1625 return info;
5769d3cd
AC
1626}
1627
a8c99f38 1628static void
f089c433 1629s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1630 void **this_prologue_cache,
1631 struct frame_id *this_id)
5769d3cd 1632{
a8c99f38 1633 struct s390_sigtramp_unwind_cache *info
f089c433
UW
1634 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
1635 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
1636}
1637
f089c433
UW
1638static struct value *
1639s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
1640 void **this_prologue_cache, int regnum)
a8c99f38
JB
1641{
1642 struct s390_sigtramp_unwind_cache *info
f089c433
UW
1643 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
1644 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1645}
1646
f089c433
UW
1647static int
1648s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
1649 struct frame_info *this_frame,
1650 void **this_prologue_cache)
5769d3cd 1651{
f089c433 1652 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 1653 bfd_byte sigreturn[2];
4c8287ac 1654
8defab1a 1655 if (target_read_memory (pc, sigreturn, 2))
f089c433 1656 return 0;
4c8287ac 1657
a8c99f38 1658 if (sigreturn[0] != 0x0a /* svc */)
f089c433 1659 return 0;
5769d3cd 1660
a8c99f38
JB
1661 if (sigreturn[1] != 119 /* sigreturn */
1662 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 1663 return 0;
a8c99f38 1664
f089c433 1665 return 1;
5769d3cd
AC
1666}
1667
f089c433
UW
1668static const struct frame_unwind s390_sigtramp_frame_unwind = {
1669 SIGTRAMP_FRAME,
1670 s390_sigtramp_frame_this_id,
1671 s390_sigtramp_frame_prev_register,
1672 NULL,
1673 s390_sigtramp_frame_sniffer
1674};
1675
4c8287ac 1676
a8c99f38
JB
1677/* Frame base handling. */
1678
1679static CORE_ADDR
f089c433 1680s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 1681{
a8c99f38 1682 struct s390_unwind_cache *info
f089c433 1683 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
1684 return info->frame_base;
1685}
1686
1687static CORE_ADDR
f089c433 1688s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
1689{
1690 struct s390_unwind_cache *info
f089c433 1691 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
1692 return info->local_base;
1693}
1694
1695static const struct frame_base s390_frame_base = {
1696 &s390_frame_unwind,
1697 s390_frame_base_address,
1698 s390_local_base_address,
1699 s390_local_base_address
1700};
1701
1702static CORE_ADDR
1703s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1704{
1705 ULONGEST pc;
1706 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM);
1707 return gdbarch_addr_bits_remove (gdbarch, pc);
1708}
1709
1710static CORE_ADDR
1711s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1712{
1713 ULONGEST sp;
1714 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1715 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
1716}
1717
1718
a431654a
AC
1719/* DWARF-2 frame support. */
1720
1721static void
1722s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 1723 struct dwarf2_frame_state_reg *reg,
4a4e5149 1724 struct frame_info *this_frame)
a431654a
AC
1725{
1726 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1727
1728 switch (tdep->abi)
1729 {
1730 case ABI_LINUX_S390:
1731 /* Call-saved registers. */
1732 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1733 || regnum == S390_F4_REGNUM
1734 || regnum == S390_F6_REGNUM)
1735 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
1736
1737 /* Call-clobbered registers. */
1738 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
1739 || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1740 && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM))
1741 reg->how = DWARF2_FRAME_REG_UNDEFINED;
1742
1743 /* The return address column. */
1744 else if (regnum == S390_PC_REGNUM)
1745 reg->how = DWARF2_FRAME_REG_RA;
1746 break;
1747
1748 case ABI_LINUX_ZSERIES:
1749 /* Call-saved registers. */
1750 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1751 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM))
1752 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
1753
1754 /* Call-clobbered registers. */
1755 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
1756 || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM))
1757 reg->how = DWARF2_FRAME_REG_UNDEFINED;
1758
1759 /* The return address column. */
1760 else if (regnum == S390_PC_REGNUM)
1761 reg->how = DWARF2_FRAME_REG_RA;
1762 break;
1763 }
1764}
1765
1766
b0cf273e
JB
1767/* Dummy function calls. */
1768
78f8b424
JB
1769/* Return non-zero if TYPE is an integer-like type, zero otherwise.
1770 "Integer-like" types are those that should be passed the way
1771 integers are: integers, enums, ranges, characters, and booleans. */
1772static int
1773is_integer_like (struct type *type)
1774{
1775 enum type_code code = TYPE_CODE (type);
1776
1777 return (code == TYPE_CODE_INT
1778 || code == TYPE_CODE_ENUM
1779 || code == TYPE_CODE_RANGE
1780 || code == TYPE_CODE_CHAR
1781 || code == TYPE_CODE_BOOL);
1782}
1783
78f8b424
JB
1784/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
1785 "Pointer-like" types are those that should be passed the way
1786 pointers are: pointers and references. */
1787static int
1788is_pointer_like (struct type *type)
1789{
1790 enum type_code code = TYPE_CODE (type);
1791
1792 return (code == TYPE_CODE_PTR
1793 || code == TYPE_CODE_REF);
1794}
1795
1796
20a940cc
JB
1797/* Return non-zero if TYPE is a `float singleton' or `double
1798 singleton', zero otherwise.
1799
1800 A `T singleton' is a struct type with one member, whose type is
1801 either T or a `T singleton'. So, the following are all float
1802 singletons:
1803
1804 struct { float x };
1805 struct { struct { float x; } x; };
1806 struct { struct { struct { float x; } x; } x; };
1807
1808 ... and so on.
1809
b0cf273e
JB
1810 All such structures are passed as if they were floats or doubles,
1811 as the (revised) ABI says. */
20a940cc
JB
1812static int
1813is_float_singleton (struct type *type)
1814{
b0cf273e
JB
1815 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
1816 {
1817 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
1818 CHECK_TYPEDEF (singleton_type);
1819
1820 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 1821 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
1822 || is_float_singleton (singleton_type));
1823 }
1824
1825 return 0;
20a940cc
JB
1826}
1827
1828
1829/* Return non-zero if TYPE is a struct-like type, zero otherwise.
1830 "Struct-like" types are those that should be passed as structs are:
1831 structs and unions.
1832
1833 As an odd quirk, not mentioned in the ABI, GCC passes float and
1834 double singletons as if they were a plain float, double, etc. (The
1835 corresponding union types are handled normally.) So we exclude
1836 those types here. *shrug* */
1837static int
1838is_struct_like (struct type *type)
1839{
1840 enum type_code code = TYPE_CODE (type);
1841
1842 return (code == TYPE_CODE_UNION
1843 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
1844}
1845
1846
1847/* Return non-zero if TYPE is a float-like type, zero otherwise.
1848 "Float-like" types are those that should be passed as
1849 floating-point values are.
1850
1851 You'd think this would just be floats, doubles, long doubles, etc.
1852 But as an odd quirk, not mentioned in the ABI, GCC passes float and
1853 double singletons as if they were a plain float, double, etc. (The
4d819d0e 1854 corresponding union types are handled normally.) So we include
20a940cc
JB
1855 those types here. *shrug* */
1856static int
1857is_float_like (struct type *type)
1858{
1859 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 1860 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
1861 || is_float_singleton (type));
1862}
1863
1864
78f8b424 1865static int
b0cf273e 1866is_power_of_two (unsigned int n)
78f8b424 1867{
b0cf273e 1868 return ((n & (n - 1)) == 0);
78f8b424
JB
1869}
1870
b0cf273e
JB
1871/* Return non-zero if TYPE should be passed as a pointer to a copy,
1872 zero otherwise. */
4d819d0e 1873static int
b0cf273e 1874s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
1875{
1876 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
1877 if (length > 8)
1878 return 1;
4d819d0e 1879
b0cf273e
JB
1880 /* FIXME: All complex and vector types are also returned by reference. */
1881 return is_struct_like (type) && !is_power_of_two (length);
4d819d0e
JB
1882}
1883
b0cf273e
JB
1884/* Return non-zero if TYPE should be passed in a float register
1885 if possible. */
78f8b424 1886static int
b0cf273e 1887s390_function_arg_float (struct type *type)
78f8b424 1888{
78f8b424 1889 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
1890 if (length > 8)
1891 return 0;
78f8b424 1892
b0cf273e 1893 return is_float_like (type);
4d819d0e
JB
1894}
1895
b0cf273e
JB
1896/* Return non-zero if TYPE should be passed in an integer register
1897 (or a pair of integer registers) if possible. */
78f8b424 1898static int
b0cf273e 1899s390_function_arg_integer (struct type *type)
78f8b424 1900{
78f8b424 1901 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
1902 if (length > 8)
1903 return 0;
78f8b424 1904
b0cf273e
JB
1905 return is_integer_like (type)
1906 || is_pointer_like (type)
1907 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
1908}
1909
78f8b424
JB
1910/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
1911 word as required for the ABI. */
1912static LONGEST
1913extend_simple_arg (struct value *arg)
1914{
4991999e 1915 struct type *type = value_type (arg);
78f8b424
JB
1916
1917 /* Even structs get passed in the least significant bits of the
1918 register / memory word. It's not really right to extract them as
1919 an integer, but it does take care of the extension. */
1920 if (TYPE_UNSIGNED (type))
0fd88904 1921 return extract_unsigned_integer (value_contents (arg),
78f8b424
JB
1922 TYPE_LENGTH (type));
1923 else
0fd88904 1924 return extract_signed_integer (value_contents (arg),
78f8b424
JB
1925 TYPE_LENGTH (type));
1926}
1927
1928
78f8b424
JB
1929/* Return the alignment required by TYPE. */
1930static int
1931alignment_of (struct type *type)
1932{
1933 int alignment;
1934
1935 if (is_integer_like (type)
1936 || is_pointer_like (type)
a16b8bcd
UW
1937 || TYPE_CODE (type) == TYPE_CODE_FLT
1938 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
1939 alignment = TYPE_LENGTH (type);
1940 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1941 || TYPE_CODE (type) == TYPE_CODE_UNION)
1942 {
1943 int i;
1944
1945 alignment = 1;
1946 for (i = 0; i < TYPE_NFIELDS (type); i++)
1947 {
1948 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
1949
1950 if (field_alignment > alignment)
1951 alignment = field_alignment;
1952 }
1953 }
1954 else
1955 alignment = 1;
1956
1957 /* Check that everything we ever return is a power of two. Lots of
1958 code doesn't want to deal with aligning things to arbitrary
1959 boundaries. */
1960 gdb_assert ((alignment & (alignment - 1)) == 0);
1961
1962 return alignment;
1963}
1964
1965
1966/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
1967 place to be passed to a function, as specified by the "GNU/Linux
1968 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
1969
1970 SP is the current stack pointer. We must put arguments, links,
1971 padding, etc. whereever they belong, and return the new stack
1972 pointer value.
1973
1974 If STRUCT_RETURN is non-zero, then the function we're calling is
1975 going to return a structure by value; STRUCT_ADDR is the address of
1976 a block we've allocated for it on the stack.
1977
1978 Our caller has taken care of any type promotions needed to satisfy
1979 prototypes or the old K&R argument-passing rules. */
a78f21af 1980static CORE_ADDR
7d9b040b 1981s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
1982 struct regcache *regcache, CORE_ADDR bp_addr,
1983 int nargs, struct value **args, CORE_ADDR sp,
1984 int struct_return, CORE_ADDR struct_addr)
5769d3cd 1985{
b0cf273e
JB
1986 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1987 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1988 ULONGEST orig_sp;
78f8b424 1989 int i;
5769d3cd 1990
78f8b424
JB
1991 /* If the i'th argument is passed as a reference to a copy, then
1992 copy_addr[i] is the address of the copy we made. */
1993 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 1994
78f8b424 1995 /* Build the reference-to-copy area. */
78f8b424
JB
1996 for (i = 0; i < nargs; i++)
1997 {
1998 struct value *arg = args[i];
4991999e 1999 struct type *type = value_type (arg);
78f8b424 2000 unsigned length = TYPE_LENGTH (type);
5769d3cd 2001
b0cf273e 2002 if (s390_function_arg_pass_by_reference (type))
01c464e9 2003 {
78f8b424 2004 sp -= length;
5b03f266 2005 sp = align_down (sp, alignment_of (type));
0fd88904 2006 write_memory (sp, value_contents (arg), length);
78f8b424 2007 copy_addr[i] = sp;
01c464e9 2008 }
5769d3cd 2009 }
5769d3cd 2010
78f8b424
JB
2011 /* Reserve space for the parameter area. As a conservative
2012 simplification, we assume that everything will be passed on the
b0cf273e
JB
2013 stack. Since every argument larger than 8 bytes will be
2014 passed by reference, we use this simple upper bound. */
2015 sp -= nargs * 8;
78f8b424 2016
78f8b424
JB
2017 /* After all that, make sure it's still aligned on an eight-byte
2018 boundary. */
5b03f266 2019 sp = align_down (sp, 8);
78f8b424
JB
2020
2021 /* Finally, place the actual parameters, working from SP towards
2022 higher addresses. The code above is supposed to reserve enough
2023 space for this. */
2024 {
2025 int fr = 0;
2026 int gr = 2;
2027 CORE_ADDR starg = sp;
2028
b0cf273e 2029 /* A struct is returned using general register 2. */
4d819d0e 2030 if (struct_return)
b0cf273e
JB
2031 {
2032 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2033 struct_addr);
2034 gr++;
2035 }
4d819d0e 2036
78f8b424
JB
2037 for (i = 0; i < nargs; i++)
2038 {
2039 struct value *arg = args[i];
4991999e 2040 struct type *type = value_type (arg);
b0cf273e
JB
2041 unsigned length = TYPE_LENGTH (type);
2042
2043 if (s390_function_arg_pass_by_reference (type))
2044 {
2045 if (gr <= 6)
2046 {
2047 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2048 copy_addr[i]);
2049 gr++;
2050 }
2051 else
2052 {
2053 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2054 starg += word_size;
2055 }
2056 }
2057 else if (s390_function_arg_float (type))
2058 {
2059 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2060 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2061 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2062 {
2063 /* When we store a single-precision value in an FP register,
2064 it occupies the leftmost bits. */
2065 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2066 0, length, value_contents (arg));
b0cf273e
JB
2067 fr += 2;
2068 }
2069 else
2070 {
2071 /* When we store a single-precision value in a stack slot,
2072 it occupies the rightmost bits. */
2073 starg = align_up (starg + length, word_size);
0fd88904 2074 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2075 }
2076 }
2077 else if (s390_function_arg_integer (type) && length <= word_size)
2078 {
2079 if (gr <= 6)
2080 {
2081 /* Integer arguments are always extended to word size. */
2082 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2083 extend_simple_arg (arg));
2084 gr++;
2085 }
2086 else
2087 {
2088 /* Integer arguments are always extended to word size. */
2089 write_memory_signed_integer (starg, word_size,
2090 extend_simple_arg (arg));
2091 starg += word_size;
2092 }
2093 }
2094 else if (s390_function_arg_integer (type) && length == 2*word_size)
2095 {
2096 if (gr <= 5)
2097 {
2098 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2099 value_contents (arg));
b0cf273e 2100 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2101 value_contents (arg) + word_size);
b0cf273e
JB
2102 gr += 2;
2103 }
2104 else
2105 {
2106 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2107 in it, then don't go back and use it again later. */
2108 gr = 7;
2109
0fd88904 2110 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2111 starg += length;
2112 }
2113 }
2114 else
e2e0b3e5 2115 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2116 }
2117 }
2118
2119 /* Allocate the standard frame areas: the register save area, the
2120 word reserved for the compiler (which seems kind of meaningless),
2121 and the back chain pointer. */
b0cf273e 2122 sp -= 16*word_size + 32;
78f8b424 2123
b0cf273e
JB
2124 /* Store return address. */
2125 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2126
2127 /* Store updated stack pointer. */
2128 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2129
a8c99f38 2130 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2131 which is actually the top of the register save area. */
2132 return sp + 16*word_size + 32;
5769d3cd
AC
2133}
2134
f089c433 2135/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2136 dummy frame. The frame ID's base needs to match the TOS value
2137 returned by push_dummy_call, and the PC match the dummy frame's
2138 breakpoint. */
2139static struct frame_id
f089c433 2140s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2141{
a8c99f38 2142 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2143 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2144 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2145
121d8485 2146 return frame_id_build (sp + 16*word_size + 32,
f089c433 2147 get_frame_pc (this_frame));
b0cf273e 2148}
c8f9d51c 2149
4074e13c
JB
2150static CORE_ADDR
2151s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2152{
2153 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2154 always be aligned on an eight-byte boundary. */
2155 return (addr & -8);
2156}
2157
2158
b0cf273e
JB
2159/* Function return value access. */
2160
2161static enum return_value_convention
2162s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2163{
b0cf273e
JB
2164 int length = TYPE_LENGTH (type);
2165 if (length > 8)
2166 return RETURN_VALUE_STRUCT_CONVENTION;
2167
2168 switch (TYPE_CODE (type))
2169 {
2170 case TYPE_CODE_STRUCT:
2171 case TYPE_CODE_UNION:
2172 case TYPE_CODE_ARRAY:
2173 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2174
b0cf273e
JB
2175 default:
2176 return RETURN_VALUE_REGISTER_CONVENTION;
2177 }
c8f9d51c
JB
2178}
2179
b0cf273e 2180static enum return_value_convention
c055b101
CV
2181s390_return_value (struct gdbarch *gdbarch, struct type *func_type,
2182 struct type *type, struct regcache *regcache,
2183 gdb_byte *out, const gdb_byte *in)
5769d3cd 2184{
b0cf273e
JB
2185 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2186 int length = TYPE_LENGTH (type);
2187 enum return_value_convention rvc =
2188 s390_return_value_convention (gdbarch, type);
2189 if (in)
2190 {
2191 switch (rvc)
2192 {
2193 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2194 if (TYPE_CODE (type) == TYPE_CODE_FLT
2195 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2196 {
2197 /* When we store a single-precision value in an FP register,
2198 it occupies the leftmost bits. */
2199 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2200 0, length, in);
2201 }
2202 else if (length <= word_size)
2203 {
2204 /* Integer arguments are always extended to word size. */
2205 if (TYPE_UNSIGNED (type))
2206 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2207 extract_unsigned_integer (in, length));
2208 else
2209 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2210 extract_signed_integer (in, length));
2211 }
2212 else if (length == 2*word_size)
2213 {
2214 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2215 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2216 }
2217 else
e2e0b3e5 2218 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2219 break;
2220
2221 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2222 error (_("Cannot set function return value."));
b0cf273e
JB
2223 break;
2224 }
2225 }
2226 else if (out)
2227 {
2228 switch (rvc)
2229 {
2230 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2231 if (TYPE_CODE (type) == TYPE_CODE_FLT
2232 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2233 {
2234 /* When we store a single-precision value in an FP register,
2235 it occupies the leftmost bits. */
2236 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2237 0, length, out);
2238 }
2239 else if (length <= word_size)
2240 {
2241 /* Integer arguments occupy the rightmost bits. */
2242 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2243 word_size - length, length, out);
2244 }
2245 else if (length == 2*word_size)
2246 {
2247 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2248 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2249 }
2250 else
e2e0b3e5 2251 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2252 break;
5769d3cd 2253
b0cf273e 2254 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2255 error (_("Function return value unknown."));
b0cf273e
JB
2256 break;
2257 }
2258 }
2259
2260 return rvc;
2261}
5769d3cd
AC
2262
2263
a8c99f38
JB
2264/* Breakpoints. */
2265
43af2100 2266static const gdb_byte *
67d57894 2267s390_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2268{
43af2100 2269 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2270
2271 *lenptr = sizeof (breakpoint);
2272 return breakpoint;
2273}
2274
5769d3cd 2275
a8c99f38 2276/* Address handling. */
5769d3cd
AC
2277
2278static CORE_ADDR
24568a2c 2279s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2280{
a8c99f38 2281 return addr & 0x7fffffff;
5769d3cd
AC
2282}
2283
ffc65945
KB
2284static int
2285s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2286{
2287 if (byte_size == 4)
119ac181 2288 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2289 else
2290 return 0;
2291}
2292
2293static const char *
2294s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2295{
119ac181 2296 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2297 return "mode32";
2298 else
2299 return NULL;
2300}
2301
a78f21af 2302static int
ffc65945
KB
2303s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2304 int *type_flags_ptr)
2305{
2306 if (strcmp (name, "mode32") == 0)
2307 {
119ac181 2308 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2309 return 1;
2310 }
2311 else
2312 return 0;
2313}
2314
a8c99f38
JB
2315/* Set up gdbarch struct. */
2316
a78f21af 2317static struct gdbarch *
5769d3cd
AC
2318s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2319{
5769d3cd
AC
2320 struct gdbarch *gdbarch;
2321 struct gdbarch_tdep *tdep;
5769d3cd
AC
2322
2323 /* First see if there is already a gdbarch that can satisfy the request. */
2324 arches = gdbarch_list_lookup_by_info (arches, &info);
2325 if (arches != NULL)
2326 return arches->gdbarch;
2327
2328 /* None found: is the request for a s390 architecture? */
2329 if (info.bfd_arch_info->arch != bfd_arch_s390)
2330 return NULL; /* No; then it's not for us. */
2331
2332 /* Yes: create a new gdbarch for the specified machine type. */
d0f54f9d
JB
2333 tdep = XCALLOC (1, struct gdbarch_tdep);
2334 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
2335
2336 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 2337 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 2338
1de90795
UW
2339 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
2340 We can safely let them default to 128-bit, since the debug info
2341 will give the size of type actually used in each case. */
2342 set_gdbarch_long_double_bit (gdbarch, 128);
2343 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
2344
aaab4dba 2345 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 2346 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 2347 always. */
5769d3cd 2348 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
2349 /* Stack grows downward. */
2350 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
2351 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2352 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 2353 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 2354
5769d3cd
AC
2355 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
2356 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 2357 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
5769d3cd 2358 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
d0f54f9d 2359 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
5769d3cd 2360 set_gdbarch_register_name (gdbarch, s390_register_name);
d0f54f9d
JB
2361 set_gdbarch_register_type (gdbarch, s390_register_type);
2362 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 2363 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 2364 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
2365 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
2366 set_gdbarch_regset_from_core_section (gdbarch,
2367 s390_regset_from_core_section);
5769d3cd 2368
b0cf273e
JB
2369 /* Inferior function calls. */
2370 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 2371 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 2372 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 2373 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 2374
a8c99f38 2375 /* Frame handling. */
a431654a 2376 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
f089c433 2377 dwarf2_append_unwinders (gdbarch);
a431654a 2378 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
2379 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
2380 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
2381 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
2382 frame_base_set_default (gdbarch, &s390_frame_base);
2383 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
2384 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
2385
5769d3cd
AC
2386 switch (info.bfd_arch_info->mach)
2387 {
b8b8b047 2388 case bfd_mach_s390_31:
b0cf273e
JB
2389 tdep->abi = ABI_LINUX_S390;
2390
d0f54f9d
JB
2391 tdep->gregset = &s390_gregset;
2392 tdep->sizeof_gregset = s390_sizeof_gregset;
2393 tdep->fpregset = &s390_fpregset;
2394 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2395
2396 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
d0f54f9d
JB
2397 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2398 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
76a9d10f
MK
2399 set_solib_svr4_fetch_link_map_offsets
2400 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
9cbd5950 2401
5769d3cd 2402 break;
b8b8b047 2403 case bfd_mach_s390_64:
b0cf273e
JB
2404 tdep->abi = ABI_LINUX_ZSERIES;
2405
d0f54f9d
JB
2406 tdep->gregset = &s390x_gregset;
2407 tdep->sizeof_gregset = s390x_sizeof_gregset;
2408 tdep->fpregset = &s390_fpregset;
2409 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2410
2411 set_gdbarch_long_bit (gdbarch, 64);
2412 set_gdbarch_long_long_bit (gdbarch, 64);
2413 set_gdbarch_ptr_bit (gdbarch, 64);
d0f54f9d
JB
2414 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
2415 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
76a9d10f
MK
2416 set_solib_svr4_fetch_link_map_offsets
2417 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
2418 set_gdbarch_address_class_type_flags (gdbarch,
2419 s390_address_class_type_flags);
2420 set_gdbarch_address_class_type_flags_to_name (gdbarch,
2421 s390_address_class_type_flags_to_name);
2422 set_gdbarch_address_class_name_to_type_flags (gdbarch,
2423 s390_address_class_name_to_type_flags);
5769d3cd
AC
2424 break;
2425 }
2426
36482093
AC
2427 set_gdbarch_print_insn (gdbarch, print_insn_s390);
2428
982e9687
UW
2429 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
2430
b2756930
KB
2431 /* Enable TLS support. */
2432 set_gdbarch_fetch_tls_load_module_address (gdbarch,
2433 svr4_fetch_objfile_link_map);
2434
5769d3cd
AC
2435 return gdbarch;
2436}
2437
2438
2439
a78f21af
AC
2440extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
2441
5769d3cd 2442void
5ae5f592 2443_initialize_s390_tdep (void)
5769d3cd
AC
2444{
2445
2446 /* Hook us into the gdbarch mechanism. */
2447 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
5769d3cd 2448}
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