run copyright.sh for 2011.
[deliverable/binutils-gdb.git] / gdb / score-tdep.h
CommitLineData
27fd2f50
Q
1/* Target-dependent code for the S+core architecture, for GDB,
2 the GNU Debugger.
3
7b6bb8da
JB
4 Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
27fd2f50
Q
6
7 Contributed by Qinwei (qinwei@sunnorth.com.cn)
8 Contributed by Ching-Peng Lin (cplin@sunplus.com)
9
10 This file is part of GDB.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
a9762ec7 14 the Free Software Foundation; either version 3 of the License, or
27fd2f50
Q
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
a9762ec7 23 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27fd2f50
Q
24
25#ifndef SCORE_TDEP_H
26#define SCORE_TDEP_H
27#include "math.h"
28
29enum gdb_regnum
30{
31 SCORE_SP_REGNUM = 0,
32 SCORE_FP_REGNUM = 2,
33 SCORE_RA_REGNUM = 3,
34 SCORE_A0_REGNUM = 4,
35 SCORE_AL_REGNUM = 7,
36 SCORE_PC_REGNUM = 49,
37};
38
39#define SCORE_A0_REGNUM 4
40#define SCORE_A1_REGNUM 5
41#define SCORE_REGSIZE 4
5f814c3b
DL
42#define SCORE7_NUM_REGS 56
43#define SCORE3_NUM_REGS 50
27fd2f50
Q
44#define SCORE_BEGIN_ARG_REGNUM 4
45#define SCORE_LAST_ARG_REGNUM 7
46
47#define SCORE_INSTLEN 4
48#define SCORE16_INSTLEN 2
49
5f814c3b
DL
50/* Forward declarations. */
51struct regset;
52
53/* Target-dependent structure in gdbarch */
54struct gdbarch_tdep
55{
56 /* Cached core file helpers. */
57 struct regset *gregset;
58};
59
60/* Linux Core file support (dirty hack)
61
62 S+core Linux register set definition, copy from S+core Linux */
63struct pt_regs {
64 /* Pad bytes for argument save space on the stack. */
65 unsigned long pad0[6]; /* may be 4,MIPS accept 6var,SCore accepts 4 Var--yuchen */
66
67 /* Saved main processor registers. */
68 unsigned long orig_r4;
69 unsigned long regs[32];
70
71 /* Other saved registers. */
72 unsigned long cel;
73 unsigned long ceh;
74
75 unsigned long sr0; /*cnt*/
76 unsigned long sr1; /*lcr*/
77 unsigned long sr2; /*scr*/
78
79 /* saved cp0 registers */
80 unsigned long cp0_epc;
81 unsigned long cp0_ema;
82 unsigned long cp0_psr;
83 unsigned long cp0_ecr;
84 unsigned long cp0_condition;
85};
86
87typedef struct pt_regs elf_gregset_t;
88
27fd2f50 89#endif /* SCORE_TDEP_H */
This page took 0.409269 seconds and 4 git commands to generate.