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XCOFF64 fixes. For setting arch/mach and for R_BR relocations.
[deliverable/binutils-gdb.git] / gdb / sh-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for Hitachi Super-H, for GDB.
538a76d6 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3116c80a 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM		 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM		 12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM		 17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS		 21
22/*
c5aa993b
JM		 23 Contributed by Steve Chamberlain
24 sac@cygnus.com
c906108c
SS		 25 */
26
27#include "defs.h"
28#include "frame.h"
29#include "obstack.h"
30#include "symtab.h"
31#include "symfile.h"
32#include "gdbtypes.h"
33#include "gdbcmd.h"
34#include "gdbcore.h"
35#include "value.h"
36#include "dis-asm.h"
37#include "inferior.h" /* for BEFORE_TEXT_END etc. */
38#include "gdb_string.h"
b4a20239 39#include "arch-utils.h"
fb409745 40#include "floatformat.h"
4e052eda 41#include "regcache.h"
d16aafd8 42#include "doublest.h"
c906108c 43
d658f924
JT		 44#include "elf-bfd.h"
45
1a8629c7
MS		 46#include "solib-svr4.h"
47
53116e27 48void (*sh_show_regs) (void);
3bbfbb92
EZ		 49CORE_ADDR (*skip_prologue_hard_way) (CORE_ADDR);
50void (*do_pseudo_register) (int);
cc17453a 51
88e04cc1
EZ		 52#define SH_DEFAULT_NUM_REGS 59
53
cc17453a
EZ		 54/* Define other aspects of the stack frame.
55 we keep a copy of the worked out return pc lying around, since it
56 is a useful bit of info */
57
58struct frame_extra_info
59{
60 CORE_ADDR return_pc;
61 int leaf_function;
62 int f_offset;
63978407 63};
c906108c 64
cc17453a
EZ		 65static char *
66sh_generic_register_name (int reg_nr)
c5aa993b 67{
cc17453a 68 static char *register_names[] =
c5aa993b 69 {
cc17453a
EZ		 70 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
71 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
72 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
73 "fpul", "fpscr",
74 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
75 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
76 "ssr", "spc",
77 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
78 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
79 };
80 if (reg_nr < 0)
81 return NULL;
82 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
83 return NULL;
84 return register_names[reg_nr];
85}
86
87static char *
88sh_sh_register_name (int reg_nr)
89{
90 static char *register_names[] =
63978407 91 {
cc17453a
EZ		 92 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
93 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
94 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
95 "", "",
96 "", "", "", "", "", "", "", "",
97 "", "", "", "", "", "", "", "",
98 "", "",
99 "", "", "", "", "", "", "", "",
100 "", "", "", "", "", "", "", "",
101 };
102 if (reg_nr < 0)
103 return NULL;
104 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
105 return NULL;
106 return register_names[reg_nr];
107}
108
109static char *
110sh_sh3_register_name (int reg_nr)
111{
112 static char *register_names[] =
c5aa993b 113 {
cc17453a
EZ		 114 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
115 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
116 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
117 "", "",
118 "", "", "", "", "", "", "", "",
119 "", "", "", "", "", "", "", "",
120 "ssr", "spc",
121 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
122 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
123 };
124 if (reg_nr < 0)
125 return NULL;
126 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
127 return NULL;
128 return register_names[reg_nr];
129}
130
131static char *
132sh_sh3e_register_name (int reg_nr)
133{
134 static char *register_names[] =
63978407 135 {
cc17453a
EZ		 136 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
137 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
138 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
139 "fpul", "fpscr",
140 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
141 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
142 "ssr", "spc",
143 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
144 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
145 };
146 if (reg_nr < 0)
147 return NULL;
148 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
149 return NULL;
150 return register_names[reg_nr];
151}
152
153static char *
154sh_sh_dsp_register_name (int reg_nr)
155{
156 static char *register_names[] =
c5aa993b 157 {
cc17453a
EZ		 158 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
159 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
160 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
161 "", "dsr",
162 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
163 "y0", "y1", "", "", "", "", "", "mod",
164 "", "",
165 "rs", "re", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "",
167 };
168 if (reg_nr < 0)
169 return NULL;
170 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
171 return NULL;
172 return register_names[reg_nr];
173}
174
175static char *
176sh_sh3_dsp_register_name (int reg_nr)
177{
178 static char *register_names[] =
c5aa993b 179 {
cc17453a
EZ		 180 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
181 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
182 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
183 "", "dsr",
184 "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
185 "y0", "y1", "", "", "", "", "", "mod",
186 "ssr", "spc",
187 "rs", "re", "", "", "", "", "", "",
188 "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
189 "", "", "", "", "", "", "", "",
190 };
191 if (reg_nr < 0)
192 return NULL;
193 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
194 return NULL;
195 return register_names[reg_nr];
196}
197
53116e27
EZ		 198static char *
199sh_sh4_register_name (int reg_nr)
200{
201 static char *register_names[] =
202 {
a38d2a54 203 /* general registers 0-15 */
53116e27
EZ		 204 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
205 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
a38d2a54 206 /* 16 - 22 */
53116e27 207 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
a38d2a54 208 /* 23, 24 */
53116e27 209 "fpul", "fpscr",
a38d2a54 210 /* floating point registers 25 - 40 */
53116e27
EZ		 211 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
212 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
a38d2a54 213 /* 41, 42 */
53116e27 214 "ssr", "spc",
a38d2a54 215 /* bank 0 43 - 50 */
53116e27 216 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
a38d2a54 217 /* bank 1 51 - 58 */
53116e27 218 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
a38d2a54 219 /* double precision (pseudo) 59 - 66 */
fe9f384f 220 "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
a38d2a54 221 /* vectors (pseudo) 67 - 70 */
fe9f384f 222 "fv0", "fv4", "fv8", "fv12",
a38d2a54
EZ		 223 /* FIXME: missing XF 71 - 86 */
224 /* FIXME: missing XD 87 - 94 */
53116e27
EZ		 225 };
226 if (reg_nr < 0)
227 return NULL;
228 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
229 return NULL;
230 return register_names[reg_nr];
231}
232
cc17453a 233static unsigned char *
fba45db2 234sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
cc17453a
EZ		 235{
236 /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
237 static unsigned char breakpoint[] = {0xc3, 0xc3};
238
239 *lenptr = sizeof (breakpoint);
240 return breakpoint;
241}
c906108c
SS		 242
243/* Prologue looks like
c5aa993b
JM		 244 [mov.l <regs>,@-r15]...
245 [sts.l pr,@-r15]
246 [mov.l r14,@-r15]
247 [mov r15,r14]
8db62801
EZ		 248
249 Actually it can be more complicated than this. For instance, with
250 newer gcc's:
251
252 mov.l r14,@-r15
253 add #-12,r15
254 mov r15,r14
255 mov r4,r1
256 mov r5,r2
257 mov.l r6,@(4,r14)
258 mov.l r7,@(8,r14)
259 mov.b r1,@r14
260 mov r14,r1
261 mov r14,r1
262 add #2,r1
263 mov.w r2,@r1
264
c5aa993b 265 */
c906108c 266
8db62801
EZ		 267/* STS.L PR,@-r15 0100111100100010
268 r15-4-->r15, PR-->(r15) */
c906108c 269#define IS_STS(x) ((x) == 0x4f22)
8db62801
EZ		 270
271/* MOV.L Rm,@-r15 00101111mmmm0110
272 r15-4-->r15, Rm-->(R15) */
c906108c 273#define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
8db62801 274
c906108c 275#define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
8db62801
EZ		 276
277/* MOV r15,r14 0110111011110011
278 r15-->r14 */
c906108c 279#define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
8db62801
EZ		 280
281/* ADD #imm,r15 01111111iiiiiiii
282 r15+imm-->r15 */
c906108c 283#define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
8db62801 284
c906108c
SS		 285#define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
286#define IS_SHLL_R3(x) ((x) == 0x4300)
8db62801
EZ		 287
288/* ADD r3,r15 0011111100111100
289 r15+r3-->r15 */
c906108c 290#define IS_ADD_R3SP(x) ((x) == 0x3f3c)
8db62801
EZ		 291
292/* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
8db62801 293 FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
8db62801 294 FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
c906108c 295#define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
c906108c 296
8db62801 297/* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011
8db62801 298 MOV.L Rm,@(disp,Rn) Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
8db62801
EZ		 299 MOV.L Rm,@Rn Rm-->(Rn) 0010nnnnmmmm0010
300 where Rm is one of r4,r5,r6,r7 which are the argument registers. */
301#define IS_ARG_MOV(x) \
302(((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
cc17453a
EZ		 303 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
304 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
8db62801
EZ		 305
306/* MOV.L Rm,@(disp,r14) 00011110mmmmdddd
307 Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
3bbfbb92 308#define IS_MOV_TO_R14(x) \
cc17453a 309 ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
8db62801
EZ		 310
311#define FPSCR_SZ (1 << 20)
c906108c 312
c906108c
SS		 313/* Skip any prologue before the guts of a function */
314
8db62801
EZ		 315/* Skip the prologue using the debug information. If this fails we'll
316 fall back on the 'guess' method below. */
317static CORE_ADDR
fba45db2 318after_prologue (CORE_ADDR pc)
8db62801
EZ		 319{
320 struct symtab_and_line sal;
321 CORE_ADDR func_addr, func_end;
322
323 /* If we can not find the symbol in the partial symbol table, then
324 there is no hope we can determine the function's start address
325 with this code. */
326 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
327 return 0;
328
329 /* Get the line associated with FUNC_ADDR. */
330 sal = find_pc_line (func_addr, 0);
331
332 /* There are only two cases to consider. First, the end of the source line
333 is within the function bounds. In that case we return the end of the
334 source line. Second is the end of the source line extends beyond the
335 bounds of the current function. We need to use the slow code to
336 examine instructions in that case. */
337 if (sal.end < func_end)
338 return sal.end;
339 else
340 return 0;
341}
342
343/* Here we look at each instruction in the function, and try to guess
344 where the prologue ends. Unfortunately this is not always
345 accurate. */
346static CORE_ADDR
3bbfbb92 347sh_skip_prologue_hard_way (CORE_ADDR start_pc)
c906108c 348{
2bfa91ee 349 CORE_ADDR here, end;
8db62801 350 int updated_fp = 0;
2bfa91ee
EZ		 351
352 if (!start_pc)
353 return 0;
354
355 for (here = start_pc, end = start_pc + (2 * 28); here < end;)
c906108c 356 {
2bfa91ee
EZ		 357 int w = read_memory_integer (here, 2);
358 here += 2;
359 if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
8db62801 360 || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
3bbfbb92 361 || IS_ARG_MOV (w) || IS_MOV_TO_R14 (w))
2bfa91ee
EZ		 362 {
363 start_pc = here;
2bfa91ee 364 }
8db62801
EZ		 365 else if (IS_MOV_SP_FP (w))
366 {
367 start_pc = here;
368 updated_fp = 1;
369 }
370 else
371 /* Don't bail out yet, if we are before the copy of sp. */
372 if (updated_fp)
373 break;
c906108c
SS		 374 }
375
376 return start_pc;
377}
378
cc17453a 379static CORE_ADDR
fba45db2 380sh_skip_prologue (CORE_ADDR pc)
8db62801
EZ		 381{
382 CORE_ADDR post_prologue_pc;
383
384 /* See if we can determine the end of the prologue via the symbol table.
385 If so, then return either PC, or the PC after the prologue, whichever
386 is greater. */
8db62801
EZ		 387 post_prologue_pc = after_prologue (pc);
388
389 /* If after_prologue returned a useful address, then use it. Else
390 fall back on the instruction skipping code. */
391 if (post_prologue_pc != 0)
392 return max (pc, post_prologue_pc);
393 else
394 return (skip_prologue_hard_way (pc));
395}
396
cc17453a
EZ		 397/* Immediately after a function call, return the saved pc.
398 Can't always go through the frames for this because on some machines
399 the new frame is not set up until the new function executes
400 some instructions.
401
402 The return address is the value saved in the PR register + 4 */
403static CORE_ADDR
fba45db2 404sh_saved_pc_after_call (struct frame_info *frame)
cc17453a 405{
3bbfbb92 406 return (ADDR_BITS_REMOVE (read_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM)));
cc17453a
EZ		 407}
408
409/* Should call_function allocate stack space for a struct return? */
410static int
fba45db2 411sh_use_struct_convention (int gcc_p, struct type *type)
cc17453a
EZ		 412{
413 return (TYPE_LENGTH (type) > 1);
414}
415
416/* Store the address of the place in which to copy the structure the
417 subroutine will return. This is called from call_function.
418
3bbfbb92 419 We store structs through a pointer passed in R2 */
cc17453a 420static void
fba45db2 421sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
cc17453a
EZ		 422{
423 write_register (STRUCT_RETURN_REGNUM, (addr));
424}
c906108c 425
cc17453a
EZ		 426/* Disassemble an instruction. */
427static int
fba45db2 428gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
c906108c 429{
d7449b42 430 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
c906108c
SS		 431 return print_insn_sh (memaddr, info);
432 else
433 return print_insn_shl (memaddr, info);
434}
435
436/* Given a GDB frame, determine the address of the calling function's frame.
437 This will be used to create a new GDB frame struct, and then
438 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
439
440 For us, the frame address is its stack pointer value, so we look up
441 the function prologue to determine the caller's sp value, and return it. */
cc17453a 442static CORE_ADDR
fba45db2 443sh_frame_chain (struct frame_info *frame)
c906108c
SS		 444{
445 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
446 return frame->frame; /* dummy frame same as caller's frame */
2bfa91ee 447 if (frame->pc && !inside_entry_file (frame->pc))
cc17453a 448 return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
c906108c
SS		 449 else
450 return 0;
451}
452
453/* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
454 we might want to do here is to check REGNUM against the clobber mask, and
455 somehow flag it as invalid if it isn't saved on the stack somewhere. This
456 would provide a graceful failure mode when trying to get the value of
457 caller-saves registers for an inner frame. */
cc17453a 458static CORE_ADDR
fba45db2 459sh_find_callers_reg (struct frame_info *fi, int regnum)
c906108c 460{
c906108c
SS		 461 for (; fi; fi = fi->next)
462 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
463 /* When the caller requests PR from the dummy frame, we return PC because
c5aa993b 464 that's where the previous routine appears to have done a call from. */
c906108c 465 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
c5aa993b 466 else
c906108c 467 {
cc17453a 468 FRAME_INIT_SAVED_REGS (fi);
2bfa91ee
EZ		 469 if (!fi->pc)
470 return 0;
cc17453a
EZ		 471 if (fi->saved_regs[regnum] != 0)
472 return read_memory_integer (fi->saved_regs[regnum],
c5aa993b 473 REGISTER_RAW_SIZE (regnum));
c906108c
SS		 474 }
475 return read_register (regnum);
476}
477
478/* Put here the code to store, into a struct frame_saved_regs, the
479 addresses of the saved registers of frame described by FRAME_INFO.
480 This includes special registers such as pc and fp saved in special
481 ways in the stack frame. sp is even more special: the address we
482 return for it IS the sp for the next frame. */
cc17453a 483static void
fba45db2 484sh_nofp_frame_init_saved_regs (struct frame_info *fi)
c906108c 485{
e7d717c0 486 int *where = (int *) alloca ((NUM_REGS + NUM_PSEUDO_REGS) * sizeof(int));
c906108c
SS		 487 int rn;
488 int have_fp = 0;
489 int depth;
490 int pc;
491 int opc;
492 int insn;
493 int r3_val = 0;
c5aa993b 494 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
cc17453a
EZ		 495
496 if (fi->saved_regs == NULL)
497 frame_saved_regs_zalloc (fi);
498 else
499 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
500
501 if (dummy_regs)
502 {
503 /* DANGER! This is ONLY going to work if the char buffer format of
504 the saved registers is byte-for-byte identical to the
505 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
506 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
507 return;
508 }
509
510 fi->extra_info->leaf_function = 1;
511 fi->extra_info->f_offset = 0;
512
cd4bffcf 513 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
cc17453a
EZ		 514 where[rn] = -1;
515
516 depth = 0;
517
518 /* Loop around examining the prologue insns until we find something
519 that does not appear to be part of the prologue. But give up
520 after 20 of them, since we're getting silly then. */
521
522 pc = get_pc_function_start (fi->pc);
523 if (!pc)
524 {
525 fi->pc = 0;
526 return;
527 }
528
529 for (opc = pc + (2 * 28); pc < opc; pc += 2)
530 {
531 insn = read_memory_integer (pc, 2);
532 /* See where the registers will be saved to */
533 if (IS_PUSH (insn))
534 {
535 rn = GET_PUSHED_REG (insn);
536 where[rn] = depth;
537 depth += 4;
538 }
539 else if (IS_STS (insn))
540 {
3bbfbb92 541 where[gdbarch_tdep (current_gdbarch)->PR_REGNUM] = depth;
cc17453a
EZ		 542 /* If we're storing the pr then this isn't a leaf */
543 fi->extra_info->leaf_function = 0;
544 depth += 4;
545 }
546 else if (IS_MOV_R3 (insn))
547 {
548 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
549 }
550 else if (IS_SHLL_R3 (insn))
551 {
552 r3_val <<= 1;
553 }
554 else if (IS_ADD_R3SP (insn))
555 {
556 depth += -r3_val;
557 }
558 else if (IS_ADD_SP (insn))
559 {
560 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
561 }
562 else if (IS_MOV_SP_FP (insn))
563 break;
564#if 0 /* This used to just stop when it found an instruction that
565 was not considered part of the prologue. Now, we just
566 keep going looking for likely instructions. */
567 else
568 break;
569#endif
570 }
571
572 /* Now we know how deep things are, we can work out their addresses */
573
cd4bffcf 574 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
cc17453a
EZ		 575 {
576 if (where[rn] >= 0)
577 {
578 if (rn == FP_REGNUM)
579 have_fp = 1;
c906108c 580
cc17453a
EZ		 581 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
582 }
583 else
584 {
585 fi->saved_regs[rn] = 0;
586 }
587 }
588
589 if (have_fp)
590 {
591 fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
592 }
593 else
594 {
595 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
596 }
597
598 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
599 /* Work out the return pc - either from the saved pr or the pr
600 value */
601}
602
3bbfbb92
EZ		 603/* For vectors of 4 floating point registers. */
604static int
605fv_reg_base_num (int fv_regnum)
606{
607 int fp_regnum;
608
609 fp_regnum = FP0_REGNUM +
610 (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
611 return fp_regnum;
612}
613
614/* For double precision floating point registers, i.e 2 fp regs.*/
615static int
616dr_reg_base_num (int dr_regnum)
617{
618 int fp_regnum;
619
620 fp_regnum = FP0_REGNUM +
621 (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
622 return fp_regnum;
623}
624
cc17453a 625static void
fba45db2 626sh_fp_frame_init_saved_regs (struct frame_info *fi)
cc17453a 627{
e7d717c0 628 int *where = (int *) alloca ((NUM_REGS + NUM_PSEUDO_REGS) * sizeof(int));
cc17453a
EZ		 629 int rn;
630 int have_fp = 0;
631 int depth;
632 int pc;
633 int opc;
634 int insn;
635 int r3_val = 0;
636 char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
f81353e4 637 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
cc17453a
EZ		 638
639 if (fi->saved_regs == NULL)
640 frame_saved_regs_zalloc (fi);
641 else
642 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
643
c906108c
SS		 644 if (dummy_regs)
645 {
646 /* DANGER! This is ONLY going to work if the char buffer format of
c5aa993b
JM		 647 the saved registers is byte-for-byte identical to the
648 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
cc17453a 649 memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
c906108c
SS		 650 return;
651 }
652
cc17453a
EZ		 653 fi->extra_info->leaf_function = 1;
654 fi->extra_info->f_offset = 0;
c906108c 655
cd4bffcf 656 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
c906108c
SS		 657 where[rn] = -1;
658
659 depth = 0;
660
661 /* Loop around examining the prologue insns until we find something
662 that does not appear to be part of the prologue. But give up
663 after 20 of them, since we're getting silly then. */
664
2bfa91ee
EZ		 665 pc = get_pc_function_start (fi->pc);
666 if (!pc)
c906108c 667 {
2bfa91ee
EZ		 668 fi->pc = 0;
669 return;
670 }
671
672 for (opc = pc + (2 * 28); pc < opc; pc += 2)
673 {
674 insn = read_memory_integer (pc, 2);
c906108c
SS		 675 /* See where the registers will be saved to */
676 if (IS_PUSH (insn))
677 {
c906108c
SS		 678 rn = GET_PUSHED_REG (insn);
679 where[rn] = depth;
c906108c
SS		 680 depth += 4;
681 }
682 else if (IS_STS (insn))
683 {
f81353e4 684 where[tdep->PR_REGNUM] = depth;
c906108c 685 /* If we're storing the pr then this isn't a leaf */
cc17453a 686 fi->extra_info->leaf_function = 0;
c906108c
SS		 687 depth += 4;
688 }
689 else if (IS_MOV_R3 (insn))
690 {
691 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
c906108c
SS		 692 }
693 else if (IS_SHLL_R3 (insn))
694 {
695 r3_val <<= 1;
c906108c
SS		 696 }
697 else if (IS_ADD_R3SP (insn))
698 {
699 depth += -r3_val;
c906108c
SS		 700 }
701 else if (IS_ADD_SP (insn))
702 {
c906108c 703 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
c906108c
SS		 704 }
705 else if (IS_FMOV (insn))
706 {
f81353e4 707 if (read_register (tdep->FPSCR_REGNUM) & FPSCR_SZ)
c906108c
SS		 708 {
709 depth += 8;
710 }
711 else
712 {
713 depth += 4;
714 }
715 }
2bfa91ee
EZ		 716 else if (IS_MOV_SP_FP (insn))
717 break;
718#if 0 /* This used to just stop when it found an instruction that
719 was not considered part of the prologue. Now, we just
720 keep going looking for likely instructions. */
c906108c
SS		 721 else
722 break;
2bfa91ee 723#endif
c906108c
SS		 724 }
725
726 /* Now we know how deep things are, we can work out their addresses */
727
cd4bffcf 728 for (rn = 0; rn < NUM_REGS + NUM_PSEUDO_REGS; rn++)
c906108c
SS		 729 {
730 if (where[rn] >= 0)
731 {
732 if (rn == FP_REGNUM)
733 have_fp = 1;
734
cc17453a 735 fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
c906108c
SS		 736 }
737 else
738 {
cc17453a 739 fi->saved_regs[rn] = 0;
c906108c
SS		 740 }
741 }
742
743 if (have_fp)
744 {
cd4bffcf
EZ		 745 fi->saved_regs[SP_REGNUM] =
746 read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
c906108c
SS		 747 }
748 else
749 {
cc17453a 750 fi->saved_regs[SP_REGNUM] = fi->frame - 4;
c906108c
SS		 751 }
752
cc17453a 753 fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
c906108c
SS		 754 /* Work out the return pc - either from the saved pr or the pr
755 value */
756}
757
cc17453a
EZ		 758/* Initialize the extra info saved in a FRAME */
759static void
fba45db2 760sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
c906108c 761{
cc17453a
EZ		 762
763 fi->extra_info = (struct frame_extra_info *)
764 frame_obstack_alloc (sizeof (struct frame_extra_info));
c906108c
SS		 765
766 if (fi->next)
767 fi->pc = FRAME_SAVED_PC (fi->next);
768
769 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
770 {
771 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
c5aa993b
JM		 772 by assuming it's always FP. */
773 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
774 SP_REGNUM);
cd4bffcf
EZ		 775 fi->extra_info->return_pc = generic_read_register_dummy (fi->pc,
776 fi->frame,
cc17453a
EZ		 777 PC_REGNUM);
778 fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
779 fi->extra_info->leaf_function = 0;
c906108c
SS		 780 return;
781 }
782 else
783 {
cc17453a 784 FRAME_INIT_SAVED_REGS (fi);
cd4bffcf
EZ		 785 fi->extra_info->return_pc =
786 sh_find_callers_reg (fi, gdbarch_tdep (current_gdbarch)->PR_REGNUM);
c906108c
SS		 787 }
788}
789
cc17453a
EZ		 790/* Extract from an array REGBUF containing the (raw) register state
791 the address in which a function should return its structure value,
792 as a CORE_ADDR (or an expression that can be used as one). */
b3df3fff 793static CORE_ADDR
0c8053b6 794sh_extract_struct_value_address (char *regbuf)
cc17453a
EZ		 795{
796 return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
797}
798
799static CORE_ADDR
fba45db2 800sh_frame_saved_pc (struct frame_info *frame)
cc17453a
EZ		 801{
802 return ((frame)->extra_info->return_pc);
803}
804
c906108c
SS		 805/* Discard from the stack the innermost frame,
806 restoring all saved registers. */
cc17453a 807static void
fba45db2 808sh_pop_frame (void)
c906108c
SS		 809{
810 register struct frame_info *frame = get_current_frame ();
811 register CORE_ADDR fp;
812 register int regnum;
c906108c
SS		 813
814 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
815 generic_pop_dummy_frame ();
816 else
c5aa993b
JM		 817 {
818 fp = FRAME_FP (frame);
cc17453a 819 FRAME_INIT_SAVED_REGS (frame);
c906108c 820
c5aa993b 821 /* Copy regs from where they were saved in the frame */
cd4bffcf 822 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
cc17453a 823 if (frame->saved_regs[regnum])
cd4bffcf
EZ		 824 write_register (regnum,
825 read_memory_integer (frame->saved_regs[regnum], 4));
c906108c 826
cc17453a 827 write_register (PC_REGNUM, frame->extra_info->return_pc);
c5aa993b
JM		 828 write_register (SP_REGNUM, fp + 4);
829 }
c906108c
SS		 830 flush_cached_frames ();
831}
832
833/* Function: push_arguments
834 Setup the function arguments for calling a function in the inferior.
835
836 On the Hitachi SH architecture, there are four registers (R4 to R7)
837 which are dedicated for passing function arguments. Up to the first
838 four arguments (depending on size) may go into these registers.
839 The rest go on the stack.
840
841 Arguments that are smaller than 4 bytes will still take up a whole
842 register or a whole 32-bit word on the stack, and will be
843 right-justified in the register or the stack word. This includes
844 chars, shorts, and small aggregate types.
845
846 Arguments that are larger than 4 bytes may be split between two or
847 more registers. If there are not enough registers free, an argument
848 may be passed partly in a register (or registers), and partly on the
849 stack. This includes doubles, long longs, and larger aggregates.
850 As far as I know, there is no upper limit to the size of aggregates
851 that will be passed in this way; in other words, the convention of
852 passing a pointer to a large aggregate instead of a copy is not used.
853
854 An exceptional case exists for struct arguments (and possibly other
855 aggregates such as arrays) if the size is larger than 4 bytes but
856 not a multiple of 4 bytes. In this case the argument is never split
857 between the registers and the stack, but instead is copied in its
858 entirety onto the stack, AND also copied into as many registers as
859 there is room for. In other words, space in registers permitting,
860 two copies of the same argument are passed in. As far as I can tell,
861 only the one on the stack is used, although that may be a function
862 of the level of compiler optimization. I suspect this is a compiler
863 bug. Arguments of these odd sizes are left-justified within the
864 word (as opposed to arguments smaller than 4 bytes, which are
865 right-justified).
c5aa993b 866
c906108c
SS		 867 If the function is to return an aggregate type such as a struct, it
868 is either returned in the normal return value register R0 (if its
869 size is no greater than one byte), or else the caller must allocate
870 space into which the callee will copy the return value (if the size
871 is greater than one byte). In this case, a pointer to the return
872 value location is passed into the callee in register R2, which does
873 not displace any of the other arguments passed in via registers R4
874 to R7. */
875
cc17453a 876static CORE_ADDR
34e9d9bb 877sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
3bbfbb92 878 int struct_return, CORE_ADDR struct_addr)
c906108c
SS		 879{
880 int stack_offset, stack_alloc;
881 int argreg;
882 int argnum;
883 struct type *type;
884 CORE_ADDR regval;
885 char *val;
886 char valbuf[4];
887 int len;
888 int odd_sized_struct;
f81353e4 889 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
c906108c
SS		 890
891 /* first force sp to a 4-byte alignment */
892 sp = sp & ~3;
893
894 /* The "struct return pointer" pseudo-argument has its own dedicated
895 register */
896 if (struct_return)
c5aa993b 897 write_register (STRUCT_RETURN_REGNUM, struct_addr);
c906108c
SS		 898
899 /* Now make sure there's space on the stack */
cc17453a 900 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
c5aa993b
JM		 901 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
902 sp -= stack_alloc; /* make room on stack for args */
c906108c 903
c906108c
SS		 904 /* Now load as many as possible of the first arguments into
905 registers, and push the rest onto the stack. There are 16 bytes
906 in four registers available. Loop thru args from first to last. */
907
f81353e4 908 argreg = tdep->ARG0_REGNUM;
c906108c
SS		 909 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
910 {
911 type = VALUE_TYPE (args[argnum]);
c5aa993b
JM		 912 len = TYPE_LENGTH (type);
913 memset (valbuf, 0, sizeof (valbuf));
c906108c 914 if (len < 4)
cc17453a
EZ		 915 {
916 /* value gets right-justified in the register or stack word */
c5aa993b
JM		 917 memcpy (valbuf + (4 - len),
918 (char *) VALUE_CONTENTS (args[argnum]), len);
919 val = valbuf;
920 }
c906108c 921 else
c5aa993b 922 val = (char *) VALUE_CONTENTS (args[argnum]);
c906108c
SS		 923
924 if (len > 4 && (len & 3) != 0)
c5aa993b
JM		 925 odd_sized_struct = 1; /* such structs go entirely on stack */
926 else
c906108c
SS		 927 odd_sized_struct = 0;
928 while (len > 0)
929 {
f81353e4 930 if (argreg > tdep->ARGLAST_REGNUM
3bbfbb92
EZ		 931 || odd_sized_struct)
932 {
933 /* must go on the stack */
c906108c
SS		 934 write_memory (sp + stack_offset, val, 4);
935 stack_offset += 4;
936 }
937 /* NOTE WELL!!!!! This is not an "else if" clause!!!
938 That's because some *&^%$ things get passed on the stack
939 AND in the registers! */
f81353e4 940 if (argreg <= tdep->ARGLAST_REGNUM)
3bbfbb92
EZ		 941 {
942 /* there's room in a register */
c5aa993b 943 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
c906108c
SS		 944 write_register (argreg++, regval);
945 }
946 /* Store the value 4 bytes at a time. This means that things
947 larger than 4 bytes may go partly in registers and partly
948 on the stack. */
c5aa993b
JM		 949 len -= REGISTER_RAW_SIZE (argreg);
950 val += REGISTER_RAW_SIZE (argreg);
c906108c
SS		 951 }
952 }
953 return sp;
954}
955
956/* Function: push_return_address (pc)
957 Set up the return address for the inferior function call.
958 Needed for targets where we don't actually execute a JSR/BSR instruction */
959
cc17453a 960static CORE_ADDR
fba45db2 961sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c 962{
3bbfbb92 963 write_register (gdbarch_tdep (current_gdbarch)->PR_REGNUM, CALL_DUMMY_ADDRESS ());
c906108c
SS		 964 return sp;
965}
966
967/* Function: fix_call_dummy
968 Poke the callee function's address into the destination part of
969 the CALL_DUMMY. The address is actually stored in a data word
970 following the actualy CALL_DUMMY instructions, which will load
971 it into a register using PC-relative addressing. This function
972 expects the CALL_DUMMY to look like this:
973
c5aa993b
JM		 974 mov.w @(2,PC), R8
975 jsr @R8
976 nop
977 trap
978 <destination>
979 */
c906108c
SS		 980
981#if 0
982void
fba45db2 983sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
ea7c478f 984 struct value **args, struct type *type, int gcc_p)
c906108c
SS		 985{
986 *(unsigned long *) (dummy + 8) = fun;
987}
988#endif
989
cc17453a
EZ		 990static int
991sh_coerce_float_to_double (struct type *formal, struct type *actual)
992{
993 return 1;
994}
c906108c 995
cc17453a
EZ		 996/* Find a function's return value in the appropriate registers (in
997 regbuf), and copy it into valbuf. Extract from an array REGBUF
998 containing the (raw) register state a function return value of type
999 TYPE, and copy that, in virtual format, into VALBUF. */
1000static void
fba45db2 1001sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 1002{
cc17453a 1003 int len = TYPE_LENGTH (type);
3116c80a
EZ		 1004 int return_register = R0_REGNUM;
1005 int offset;
1006
cc17453a 1007 if (len <= 4)
3116c80a 1008 {
d7449b42 1009 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
3116c80a
EZ		 1010 offset = REGISTER_BYTE (return_register) + 4 - len;
1011 else
1012 offset = REGISTER_BYTE (return_register);
1013 memcpy (valbuf, regbuf + offset, len);
1014 }
cc17453a 1015 else if (len <= 8)
3116c80a 1016 {
d7449b42 1017 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
3116c80a
EZ		 1018 offset = REGISTER_BYTE (return_register) + 8 - len;
1019 else
1020 offset = REGISTER_BYTE (return_register);
1021 memcpy (valbuf, regbuf + offset, len);
1022 }
1023 else
1024 error ("bad size for return value");
1025}
1026
1027static void
1028sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1029{
1030 int return_register;
1031 int offset;
1032 int len = TYPE_LENGTH (type);
1033
1034 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1035 return_register = FP0_REGNUM;
1036 else
1037 return_register = R0_REGNUM;
1038
1039 if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1040 {
1041 DOUBLEST val;
778eb05e 1042 if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
3116c80a
EZ		 1043 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1044 (char *) regbuf + REGISTER_BYTE (return_register),
1045 &val);
1046 else
1047 floatformat_to_doublest (&floatformat_ieee_double_big,
1048 (char *) regbuf + REGISTER_BYTE (return_register),
1049 &val);
1050 store_floating (valbuf, len, val);
1051 }
1052 else if (len <= 4)
1053 {
d7449b42 1054 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
3116c80a
EZ		 1055 offset = REGISTER_BYTE (return_register) + 4 - len;
1056 else
1057 offset = REGISTER_BYTE (return_register);
1058 memcpy (valbuf, regbuf + offset, len);
1059 }
1060 else if (len <= 8)
1061 {
d7449b42 1062 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
3116c80a
EZ		 1063 offset = REGISTER_BYTE (return_register) + 8 - len;
1064 else
1065 offset = REGISTER_BYTE (return_register);
1066 memcpy (valbuf, regbuf + offset, len);
1067 }
cc17453a
EZ		 1068 else
1069 error ("bad size for return value");
1070}
c906108c 1071
cc17453a
EZ		 1072/* Write into appropriate registers a function return value
1073 of type TYPE, given in virtual format.
1074 If the architecture is sh4 or sh3e, store a function's return value
1075 in the R0 general register or in the FP0 floating point register,
1076 depending on the type of the return value. In all the other cases
3bbfbb92 1077 the result is stored in r0, left-justified. */
cc17453a
EZ		 1078static void
1079sh_default_store_return_value (struct type *type, char *valbuf)
1080{
d19b71be
MS		 1081 char buf[32]; /* more than enough... */
1082
1083 if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1084 {
1085 /* Add leading zeros to the value. */
1086 memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1087 memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1088 valbuf, TYPE_LENGTH (type));
1089 write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1090 REGISTER_RAW_SIZE (R0_REGNUM));
1091 }
1092 else
1093 write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1094 TYPE_LENGTH (type));
cc17453a 1095}
c906108c 1096
cc17453a
EZ		 1097static void
1098sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1099{
1100 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1101 write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1102 valbuf, TYPE_LENGTH (type));
1103 else
d19b71be 1104 sh_default_store_return_value (type, valbuf);
c906108c
SS		 1105}
1106
1107/* Print the registers in a form similar to the E7000 */
1108
1109static void
fba45db2 1110sh_generic_show_regs (void)
c906108c 1111{
f81353e4
EZ		 1112 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1113
cc17453a
EZ		 1114 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1115 paddr (read_register (PC_REGNUM)),
f81353e4
EZ		 1116 (long) read_register (tdep->SR_REGNUM),
1117 (long) read_register (tdep->PR_REGNUM),
cc17453a
EZ		 1118 (long) read_register (MACH_REGNUM),
1119 (long) read_register (MACL_REGNUM));
1120
1121 printf_filtered ("GBR=%08lx VBR=%08lx",
1122 (long) read_register (GBR_REGNUM),
1123 (long) read_register (VBR_REGNUM));
1124
1125 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1126 (long) read_register (0),
1127 (long) read_register (1),
1128 (long) read_register (2),
1129 (long) read_register (3),
1130 (long) read_register (4),
1131 (long) read_register (5),
1132 (long) read_register (6),
1133 (long) read_register (7));
1134 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1135 (long) read_register (8),
1136 (long) read_register (9),
1137 (long) read_register (10),
1138 (long) read_register (11),
1139 (long) read_register (12),
1140 (long) read_register (13),
1141 (long) read_register (14),
1142 (long) read_register (15));
1143}
c906108c 1144
cc17453a 1145static void
fba45db2 1146sh3_show_regs (void)
cc17453a 1147{
f81353e4
EZ		 1148 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1149
d4f3574e
SS		 1150 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1151 paddr (read_register (PC_REGNUM)),
f81353e4
EZ		 1152 (long) read_register (tdep->SR_REGNUM),
1153 (long) read_register (tdep->PR_REGNUM),
d4f3574e
SS		 1154 (long) read_register (MACH_REGNUM),
1155 (long) read_register (MACL_REGNUM));
1156
1157 printf_filtered ("GBR=%08lx VBR=%08lx",
1158 (long) read_register (GBR_REGNUM),
1159 (long) read_register (VBR_REGNUM));
cc17453a 1160 printf_filtered (" SSR=%08lx SPC=%08lx",
f81353e4
EZ		 1161 (long) read_register (tdep->SSR_REGNUM),
1162 (long) read_register (tdep->SPC_REGNUM));
c906108c 1163
d4f3574e
SS		 1164 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1165 (long) read_register (0),
1166 (long) read_register (1),
1167 (long) read_register (2),
1168 (long) read_register (3),
1169 (long) read_register (4),
1170 (long) read_register (5),
1171 (long) read_register (6),
1172 (long) read_register (7));
1173 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1174 (long) read_register (8),
1175 (long) read_register (9),
1176 (long) read_register (10),
1177 (long) read_register (11),
1178 (long) read_register (12),
1179 (long) read_register (13),
1180 (long) read_register (14),
1181 (long) read_register (15));
c906108c
SS		 1182}
1183
53116e27 1184
cc17453a 1185static void
fba45db2 1186sh3e_show_regs (void)
cc17453a 1187{
f81353e4
EZ		 1188 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1189
cc17453a
EZ		 1190 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1191 paddr (read_register (PC_REGNUM)),
f81353e4
EZ		 1192 (long) read_register (tdep->SR_REGNUM),
1193 (long) read_register (tdep->PR_REGNUM),
cc17453a
EZ		 1194 (long) read_register (MACH_REGNUM),
1195 (long) read_register (MACL_REGNUM));
1196
1197 printf_filtered ("GBR=%08lx VBR=%08lx",
1198 (long) read_register (GBR_REGNUM),
1199 (long) read_register (VBR_REGNUM));
1200 printf_filtered (" SSR=%08lx SPC=%08lx",
f81353e4
EZ		 1201 (long) read_register (tdep->SSR_REGNUM),
1202 (long) read_register (tdep->SPC_REGNUM));
cc17453a 1203 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
f81353e4
EZ		 1204 (long) read_register (tdep->FPUL_REGNUM),
1205 (long) read_register (tdep->FPSCR_REGNUM));
c906108c 1206
cc17453a
EZ		 1207 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1208 (long) read_register (0),
1209 (long) read_register (1),
1210 (long) read_register (2),
1211 (long) read_register (3),
1212 (long) read_register (4),
1213 (long) read_register (5),
1214 (long) read_register (6),
1215 (long) read_register (7));
1216 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1217 (long) read_register (8),
1218 (long) read_register (9),
1219 (long) read_register (10),
1220 (long) read_register (11),
1221 (long) read_register (12),
1222 (long) read_register (13),
1223 (long) read_register (14),
1224 (long) read_register (15));
1225
1226 printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1227 (long) read_register (FP0_REGNUM + 0),
1228 (long) read_register (FP0_REGNUM + 1),
1229 (long) read_register (FP0_REGNUM + 2),
1230 (long) read_register (FP0_REGNUM + 3),
1231 (long) read_register (FP0_REGNUM + 4),
1232 (long) read_register (FP0_REGNUM + 5),
1233 (long) read_register (FP0_REGNUM + 6),
1234 (long) read_register (FP0_REGNUM + 7));
1235 printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1236 (long) read_register (FP0_REGNUM + 8),
1237 (long) read_register (FP0_REGNUM + 9),
1238 (long) read_register (FP0_REGNUM + 10),
1239 (long) read_register (FP0_REGNUM + 11),
1240 (long) read_register (FP0_REGNUM + 12),
1241 (long) read_register (FP0_REGNUM + 13),
1242 (long) read_register (FP0_REGNUM + 14),
1243 (long) read_register (FP0_REGNUM + 15));
1244}
1245
1246static void
fba45db2 1247sh3_dsp_show_regs (void)
c906108c 1248{
f81353e4
EZ		 1249 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1250
cc17453a
EZ		 1251 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1252 paddr (read_register (PC_REGNUM)),
f81353e4
EZ		 1253 (long) read_register (tdep->SR_REGNUM),
1254 (long) read_register (tdep->PR_REGNUM),
cc17453a
EZ		 1255 (long) read_register (MACH_REGNUM),
1256 (long) read_register (MACL_REGNUM));
c906108c 1257
cc17453a
EZ		 1258 printf_filtered ("GBR=%08lx VBR=%08lx",
1259 (long) read_register (GBR_REGNUM),
1260 (long) read_register (VBR_REGNUM));
1261
1262 printf_filtered (" SSR=%08lx SPC=%08lx",
f81353e4
EZ		 1263 (long) read_register (tdep->SSR_REGNUM),
1264 (long) read_register (tdep->SPC_REGNUM));
cc17453a
EZ		 1265
1266 printf_filtered (" DSR=%08lx",
f81353e4 1267 (long) read_register (tdep->DSR_REGNUM));
cc17453a
EZ		 1268
1269 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1270 (long) read_register (0),
1271 (long) read_register (1),
1272 (long) read_register (2),
1273 (long) read_register (3),
1274 (long) read_register (4),
1275 (long) read_register (5),
1276 (long) read_register (6),
1277 (long) read_register (7));
1278 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1279 (long) read_register (8),
1280 (long) read_register (9),
1281 (long) read_register (10),
1282 (long) read_register (11),
1283 (long) read_register (12),
1284 (long) read_register (13),
1285 (long) read_register (14),
1286 (long) read_register (15));
1287
1288 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
f81353e4
EZ		 1289 (long) read_register (tdep->A0G_REGNUM) & 0xff,
1290 (long) read_register (tdep->A0_REGNUM),
1291 (long) read_register (tdep->M0_REGNUM),
1292 (long) read_register (tdep->X0_REGNUM),
1293 (long) read_register (tdep->Y0_REGNUM),
1294 (long) read_register (tdep->RS_REGNUM),
1295 (long) read_register (tdep->MOD_REGNUM));
cc17453a 1296 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
f81353e4
EZ		 1297 (long) read_register (tdep->A1G_REGNUM) & 0xff,
1298 (long) read_register (tdep->A1_REGNUM),
1299 (long) read_register (tdep->M1_REGNUM),
1300 (long) read_register (tdep->X1_REGNUM),
1301 (long) read_register (tdep->Y1_REGNUM),
1302 (long) read_register (tdep->RE_REGNUM));
c906108c
SS		 1303}
1304
cc17453a 1305static void
fba45db2 1306sh4_show_regs (void)
cc17453a 1307{
f81353e4
EZ		 1308 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1309
1310 int pr = read_register (tdep->FPSCR_REGNUM) & 0x80000;
cc17453a
EZ		 1311 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1312 paddr (read_register (PC_REGNUM)),
f81353e4
EZ		 1313 (long) read_register (tdep->SR_REGNUM),
1314 (long) read_register (tdep->PR_REGNUM),
cc17453a
EZ		 1315 (long) read_register (MACH_REGNUM),
1316 (long) read_register (MACL_REGNUM));
1317
1318 printf_filtered ("GBR=%08lx VBR=%08lx",
1319 (long) read_register (GBR_REGNUM),
1320 (long) read_register (VBR_REGNUM));
1321 printf_filtered (" SSR=%08lx SPC=%08lx",
f81353e4
EZ		 1322 (long) read_register (tdep->SSR_REGNUM),
1323 (long) read_register (tdep->SPC_REGNUM));
cc17453a 1324 printf_filtered (" FPUL=%08lx FPSCR=%08lx",
f81353e4
EZ		 1325 (long) read_register (tdep->FPUL_REGNUM),
1326 (long) read_register (tdep->FPSCR_REGNUM));
cc17453a
EZ		 1327
1328 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1329 (long) read_register (0),
1330 (long) read_register (1),
1331 (long) read_register (2),
1332 (long) read_register (3),
1333 (long) read_register (4),
1334 (long) read_register (5),
1335 (long) read_register (6),
1336 (long) read_register (7));
1337 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1338 (long) read_register (8),
1339 (long) read_register (9),
1340 (long) read_register (10),
1341 (long) read_register (11),
1342 (long) read_register (12),
1343 (long) read_register (13),
1344 (long) read_register (14),
1345 (long) read_register (15));
1346
1347 printf_filtered ((pr
1348 ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1349 : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1350 (long) read_register (FP0_REGNUM + 0),
1351 (long) read_register (FP0_REGNUM + 1),
1352 (long) read_register (FP0_REGNUM + 2),
1353 (long) read_register (FP0_REGNUM + 3),
1354 (long) read_register (FP0_REGNUM + 4),
1355 (long) read_register (FP0_REGNUM + 5),
1356 (long) read_register (FP0_REGNUM + 6),
1357 (long) read_register (FP0_REGNUM + 7));
1358 printf_filtered ((pr
1359 ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1360 : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1361 (long) read_register (FP0_REGNUM + 8),
1362 (long) read_register (FP0_REGNUM + 9),
1363 (long) read_register (FP0_REGNUM + 10),
1364 (long) read_register (FP0_REGNUM + 11),
1365 (long) read_register (FP0_REGNUM + 12),
1366 (long) read_register (FP0_REGNUM + 13),
1367 (long) read_register (FP0_REGNUM + 14),
1368 (long) read_register (FP0_REGNUM + 15));
1369}
1370
1371static void
fba45db2 1372sh_dsp_show_regs (void)
cc17453a 1373{
f81353e4
EZ		 1374 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1375
cc17453a
EZ		 1376 printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1377 paddr (read_register (PC_REGNUM)),
f81353e4
EZ		 1378 (long) read_register (tdep->SR_REGNUM),
1379 (long) read_register (tdep->PR_REGNUM),
cc17453a
EZ		 1380 (long) read_register (MACH_REGNUM),
1381 (long) read_register (MACL_REGNUM));
1382
1383 printf_filtered ("GBR=%08lx VBR=%08lx",
1384 (long) read_register (GBR_REGNUM),
1385 (long) read_register (VBR_REGNUM));
1386
1387 printf_filtered (" DSR=%08lx",
f81353e4 1388 (long) read_register (tdep->DSR_REGNUM));
cc17453a
EZ		 1389
1390 printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1391 (long) read_register (0),
1392 (long) read_register (1),
1393 (long) read_register (2),
1394 (long) read_register (3),
1395 (long) read_register (4),
1396 (long) read_register (5),
1397 (long) read_register (6),
1398 (long) read_register (7));
1399 printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1400 (long) read_register (8),
1401 (long) read_register (9),
1402 (long) read_register (10),
1403 (long) read_register (11),
1404 (long) read_register (12),
1405 (long) read_register (13),
1406 (long) read_register (14),
1407 (long) read_register (15));
1408
1409 printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
f81353e4
EZ		 1410 (long) read_register (tdep->A0G_REGNUM) & 0xff,
1411 (long) read_register (tdep->A0_REGNUM),
1412 (long) read_register (tdep->M0_REGNUM),
1413 (long) read_register (tdep->X0_REGNUM),
1414 (long) read_register (tdep->Y0_REGNUM),
1415 (long) read_register (tdep->RS_REGNUM),
1416 (long) read_register (tdep->MOD_REGNUM));
cc17453a 1417 printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
f81353e4
EZ		 1418 (long) read_register (tdep->A1G_REGNUM) & 0xff,
1419 (long) read_register (tdep->A1_REGNUM),
1420 (long) read_register (tdep->M1_REGNUM),
1421 (long) read_register (tdep->X1_REGNUM),
1422 (long) read_register (tdep->Y1_REGNUM),
1423 (long) read_register (tdep->RE_REGNUM));
cc17453a
EZ		 1424}
1425
53116e27
EZ		 1426void sh_show_regs_command (char *args, int from_tty)
1427{
1428 if (sh_show_regs)
1429 (*sh_show_regs)();
1430}
1431
cc17453a
EZ		 1432/* Index within `registers' of the first byte of the space for
1433 register N. */
1434static int
fba45db2 1435sh_default_register_byte (int reg_nr)
8db62801 1436{
cc17453a
EZ		 1437 return (reg_nr * 4);
1438}
1439
53116e27 1440static int
fba45db2 1441sh_sh4_register_byte (int reg_nr)
53116e27 1442{
f81353e4
EZ		 1443 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1444
1445 if (reg_nr >= tdep->DR0_REGNUM
1446 && reg_nr <= tdep->DR_LAST_REGNUM)
53116e27 1447 return (dr_reg_base_num (reg_nr) * 4);
f81353e4
EZ		 1448 else if (reg_nr >= tdep->FV0_REGNUM
1449 && reg_nr <= tdep->FV_LAST_REGNUM)
53116e27
EZ		 1450 return (fv_reg_base_num (reg_nr) * 4);
1451 else
1452 return (reg_nr * 4);
1453}
1454
cc17453a
EZ		 1455/* Number of bytes of storage in the actual machine representation for
1456 register REG_NR. */
1457static int
fba45db2 1458sh_default_register_raw_size (int reg_nr)
cc17453a
EZ		 1459{
1460 return 4;
1461}
1462
53116e27 1463static int
fba45db2 1464sh_sh4_register_raw_size (int reg_nr)
53116e27 1465{
f81353e4
EZ		 1466 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1467
1468 if (reg_nr >= tdep->DR0_REGNUM
1469 && reg_nr <= tdep->DR_LAST_REGNUM)
53116e27 1470 return 8;
f81353e4
EZ		 1471 else if (reg_nr >= tdep->FV0_REGNUM
1472 && reg_nr <= tdep->FV_LAST_REGNUM)
53116e27
EZ		 1473 return 16;
1474 else
1475 return 4;
1476}
1477
cc17453a
EZ		 1478/* Number of bytes of storage in the program's representation
1479 for register N. */
1480static int
fba45db2 1481sh_register_virtual_size (int reg_nr)
cc17453a
EZ		 1482{
1483 return 4;
1484}
1485
1486/* Return the GDB type object for the "standard" data type
1487 of data in register N. */
cc17453a 1488static struct type *
fba45db2 1489sh_sh3e_register_virtual_type (int reg_nr)
cc17453a 1490{
f81353e4
EZ		 1491 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1492
cc17453a 1493 if ((reg_nr >= FP0_REGNUM
f81353e4
EZ		 1494 && (reg_nr <= tdep->FP_LAST_REGNUM))
1495 || (reg_nr == tdep->FPUL_REGNUM))
cc17453a 1496 return builtin_type_float;
8db62801 1497 else
cc17453a
EZ		 1498 return builtin_type_int;
1499}
1500
7f4dbe94
EZ		 1501static struct type *
1502sh_sh4_build_float_register_type (int high)
1503{
1504 struct type *temp;
1505
1506 temp = create_range_type (NULL, builtin_type_int, 0, high);
1507 return create_array_type (NULL, builtin_type_float, temp);
1508}
1509
53116e27 1510static struct type *
fba45db2 1511sh_sh4_register_virtual_type (int reg_nr)
53116e27 1512{
f81353e4
EZ		 1513 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1514
53116e27 1515 if ((reg_nr >= FP0_REGNUM
f81353e4
EZ		 1516 && (reg_nr <= tdep->FP_LAST_REGNUM))
1517 || (reg_nr == tdep->FPUL_REGNUM))
53116e27 1518 return builtin_type_float;
f81353e4
EZ		 1519 else if (reg_nr >= tdep->DR0_REGNUM
1520 && reg_nr <= tdep->DR_LAST_REGNUM)
53116e27 1521 return builtin_type_double;
f81353e4
EZ		 1522 else if (reg_nr >= tdep->FV0_REGNUM
1523 && reg_nr <= tdep->FV_LAST_REGNUM)
53116e27
EZ		 1524 return sh_sh4_build_float_register_type (3);
1525 else
1526 return builtin_type_int;
1527}
1528
cc17453a 1529static struct type *
fba45db2 1530sh_default_register_virtual_type (int reg_nr)
cc17453a
EZ		 1531{
1532 return builtin_type_int;
1533}
1534
fb409745
EZ		 1535/* On the sh4, the DRi pseudo registers are problematic if the target
1536 is little endian. When the user writes one of those registers, for
1537 instance with 'ser var $dr0=1', we want the double to be stored
1538 like this:
1539 fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1540 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1541
1542 This corresponds to little endian byte order & big endian word
1543 order. However if we let gdb write the register w/o conversion, it
1544 will write fr0 and fr1 this way:
1545 fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1546 fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1547 because it will consider fr0 and fr1 as a single LE stretch of memory.
1548
1549 To achieve what we want we must force gdb to store things in
1550 floatformat_ieee_double_littlebyte_bigword (which is defined in
1551 include/floatformat.h and libiberty/floatformat.c.
1552
1553 In case the target is big endian, there is no problem, the
1554 raw bytes will look like:
1555 fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1556 fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1557
1558 The other pseudo registers (the FVs) also don't pose a problem
1559 because they are stored as 4 individual FP elements. */
1560
7bd872fe 1561static void
fb409745
EZ		 1562sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1563 char *from, char *to)
1564{
f81353e4
EZ		 1565 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1566
1567 if (regnum >= tdep->DR0_REGNUM
1568 && regnum <= tdep->DR_LAST_REGNUM)
fb409745
EZ		 1569 {
1570 DOUBLEST val;
1571 floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
3bbfbb92 1572 store_floating (to, TYPE_LENGTH (type), val);
fb409745
EZ		 1573 }
1574 else
3bbfbb92 1575 error ("sh_register_convert_to_virtual called with non DR register number");
fb409745
EZ		 1576}
1577
7bd872fe 1578static void
fb409745 1579sh_sh4_register_convert_to_raw (struct type *type, int regnum,
7bd872fe 1580 char *from, char *to)
fb409745 1581{
f81353e4
EZ		 1582 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1583
1584 if (regnum >= tdep->DR0_REGNUM
1585 && regnum <= tdep->DR_LAST_REGNUM)
fb409745
EZ		 1586 {
1587 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1588 floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1589 }
1590 else
1591 error("sh_register_convert_to_raw called with non DR register number");
1592}
1593
53116e27 1594void
7bd872fe 1595sh_pseudo_register_read (int reg_nr, char *buffer)
53116e27
EZ		 1596{
1597 int base_regnum, portion;
7bd872fe 1598 char *temp_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
f81353e4 1599 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
53116e27 1600
7bd872fe
EZ		 1601 if (reg_nr >= tdep->DR0_REGNUM
1602 && reg_nr <= tdep->DR_LAST_REGNUM)
1603 {
1604 base_regnum = dr_reg_base_num (reg_nr);
1605
1606 /* Build the value in the provided buffer. */
1607 /* Read the real regs for which this one is an alias. */
1608 for (portion = 0; portion < 2; portion++)
1609 regcache_read (base_regnum + portion,
1610 temp_buffer
1611 + REGISTER_RAW_SIZE (base_regnum) * portion);
1612 /* We must pay attention to the endiannes. */
1613 sh_sh4_register_convert_to_virtual (reg_nr,
1614 REGISTER_VIRTUAL_TYPE (reg_nr),
1615 temp_buffer, buffer);
1616 }
1617 else if (reg_nr >= tdep->FV0_REGNUM
1618 && reg_nr <= tdep->FV_LAST_REGNUM)
53116e27 1619 {
7bd872fe
EZ		 1620 base_regnum = fv_reg_base_num (reg_nr);
1621
1622 /* Read the real regs for which this one is an alias. */
1623 for (portion = 0; portion < 4; portion++)
1624 regcache_read (base_regnum + portion,
1625 buffer + REGISTER_RAW_SIZE (base_regnum) * portion);
53116e27
EZ		 1626 }
1627}
1628
7bd872fe
EZ		 1629static void
1630sh4_register_read (struct gdbarch *gdbarch, int reg_nr, char *buffer)
1631{
1632 if (reg_nr >= 0 && reg_nr < gdbarch_tdep (current_gdbarch)->DR0_REGNUM)
1633 /* It is a regular register. */
1634 regcache_read (reg_nr, buffer);
1635 else
1636 /* It is a pseudo register and we need to construct its value */
1637 sh_pseudo_register_read (reg_nr, buffer);
1638}
1639
53116e27 1640void
7bd872fe 1641sh_pseudo_register_write (int reg_nr, char *buffer)
53116e27
EZ		 1642{
1643 int base_regnum, portion;
7bd872fe 1644 char *temp_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
f81353e4 1645 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
53116e27 1646
f81353e4
EZ		 1647 if (reg_nr >= tdep->DR0_REGNUM
1648 && reg_nr <= tdep->DR_LAST_REGNUM)
53116e27
EZ		 1649 {
1650 base_regnum = dr_reg_base_num (reg_nr);
1651
7bd872fe
EZ		 1652 /* We must pay attention to the endiannes. */
1653 sh_sh4_register_convert_to_raw (REGISTER_VIRTUAL_TYPE (reg_nr), reg_nr,
1654 buffer, temp_buffer);
1655
53116e27
EZ		 1656 /* Write the real regs for which this one is an alias. */
1657 for (portion = 0; portion < 2; portion++)
7bd872fe
EZ		 1658 regcache_write (base_regnum + portion,
1659 temp_buffer + REGISTER_RAW_SIZE (base_regnum) * portion);
53116e27 1660 }
f81353e4
EZ		 1661 else if (reg_nr >= tdep->FV0_REGNUM
1662 && reg_nr <= tdep->FV_LAST_REGNUM)
53116e27
EZ		 1663 {
1664 base_regnum = fv_reg_base_num (reg_nr);
1665
1666 /* Write the real regs for which this one is an alias. */
1667 for (portion = 0; portion < 4; portion++)
7bd872fe
EZ		 1668 regcache_write (base_regnum + portion,
1669 buffer + REGISTER_RAW_SIZE (base_regnum) * portion);
53116e27
EZ		 1670 }
1671}
1672
7bd872fe
EZ		 1673static void
1674sh4_register_write (struct gdbarch *gdbarch, int reg_nr, char *buffer)
1675{
1676 if (reg_nr >= 0 && reg_nr < gdbarch_tdep (current_gdbarch)->DR0_REGNUM)
1677 /* It is a regular register. */
1678 regcache_write (reg_nr, buffer);
1679 else
1680 /* It is a pseudo register and we need to construct its value */
1681 sh_pseudo_register_write (reg_nr, buffer);
1682}
1683
3bbfbb92 1684/* Floating point vector of 4 float registers. */
53116e27
EZ		 1685static void
1686do_fv_register_info (int fv_regnum)
1687{
1688 int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1689 printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1690 fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1691 (int) read_register (first_fp_reg_num),
1692 (int) read_register (first_fp_reg_num + 1),
1693 (int) read_register (first_fp_reg_num + 2),
1694 (int) read_register (first_fp_reg_num + 3));
1695}
1696
3bbfbb92 1697/* Double precision registers. */
53116e27
EZ		 1698static void
1699do_dr_register_info (int dr_regnum)
1700{
1701 int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1702
1703 printf_filtered ("dr%d\t0x%08x%08x\n",
1704 dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1705 (int) read_register (first_fp_reg_num),
1706 (int) read_register (first_fp_reg_num + 1));
1707}
1708
1709static void
1710sh_do_pseudo_register (int regnum)
1711{
f81353e4
EZ		 1712 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
1713
53116e27 1714 if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
8e65ff28
AC		 1715 internal_error (__FILE__, __LINE__,
1716 "Invalid pseudo register number %d\n", regnum);
f81353e4
EZ		 1717 else if (regnum >= tdep->DR0_REGNUM
1718 && regnum < tdep->DR_LAST_REGNUM)
53116e27 1719 do_dr_register_info (regnum);
f81353e4
EZ		 1720 else if (regnum >= tdep->FV0_REGNUM
1721 && regnum <= tdep->FV_LAST_REGNUM)
53116e27
EZ		 1722 do_fv_register_info (regnum);
1723}
1724
53116e27
EZ		 1725static void
1726sh_do_fp_register (int regnum)
1727{ /* do values for FP (float) regs */
1728 char *raw_buffer;
1729 double flt; /* double extracted from raw hex data */
1730 int inv;
1731 int j;
1732
1733 /* Allocate space for the float. */
1734 raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1735
1736 /* Get the data in raw format. */
cda5a58a 1737 if (!frame_register_read (selected_frame, regnum, raw_buffer))
53116e27
EZ		 1738 error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1739
1740 /* Get the register as a number */
1741 flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1742
1743 /* Print the name and some spaces. */
1744 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1745 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1746
1747 /* Print the value. */
93d56215
AC		 1748 if (inv)
1749 printf_filtered ("<invalid float>");
1750 else
1751 printf_filtered ("%-10.9g", flt);
53116e27
EZ		 1752
1753 /* Print the fp register as hex. */
1754 printf_filtered ("\t(raw 0x");
1755 for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1756 {
d7449b42 1757 register int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
53116e27
EZ		 1758 : REGISTER_RAW_SIZE (regnum) - 1 - j;
1759 printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1760 }
1761 printf_filtered (")");
1762 printf_filtered ("\n");
1763}
1764
1765static void
1766sh_do_register (int regnum)
1767{
1768 char raw_buffer[MAX_REGISTER_RAW_SIZE];
1769
1770 fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1771 print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1772
1773 /* Get the data in raw format. */
cda5a58a 1774 if (!frame_register_read (selected_frame, regnum, raw_buffer))
53116e27
EZ		 1775 printf_filtered ("*value not available*\n");
1776
1777 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1778 gdb_stdout, 'x', 1, 0, Val_pretty_default);
1779 printf_filtered ("\t");
1780 val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1781 gdb_stdout, 0, 1, 0, Val_pretty_default);
1782 printf_filtered ("\n");
1783}
1784
1785static void
1786sh_print_register (int regnum)
1787{
1788 if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
8e65ff28
AC		 1789 internal_error (__FILE__, __LINE__,
1790 "Invalid register number %d\n", regnum);
53116e27 1791
e30839fe 1792 else if (regnum >= 0 && regnum < NUM_REGS)
53116e27
EZ		 1793 {
1794 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1795 sh_do_fp_register (regnum); /* FP regs */
1796 else
1797 sh_do_register (regnum); /* All other regs */
1798 }
1799
1800 else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
3bbfbb92 1801 do_pseudo_register (regnum);
53116e27
EZ		 1802}
1803
1804void
1805sh_do_registers_info (int regnum, int fpregs)
1806{
1807 if (regnum != -1) /* do one specified register */
1808 {
1809 if (*(REGISTER_NAME (regnum)) == '\0')
1810 error ("Not a valid register for the current processor type");
1811
1812 sh_print_register (regnum);
1813 }
1814 else
1815 /* do all (or most) registers */
1816 {
1817 regnum = 0;
1818 while (regnum < NUM_REGS)
1819 {
1820 /* If the register name is empty, it is undefined for this
1821 processor, so don't display anything. */
1822 if (REGISTER_NAME (regnum) == NULL
1823 || *(REGISTER_NAME (regnum)) == '\0')
1824 {
1825 regnum++;
1826 continue;
1827 }
1828
1829 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1830 {
1831 if (fpregs)
1832 {
1833 /* true for "INFO ALL-REGISTERS" command */
1834 sh_do_fp_register (regnum); /* FP regs */
1835 regnum ++;
1836 }
1837 else
e6c42fda 1838 regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM); /* skip FP regs */
53116e27
EZ		 1839 }
1840 else
1841 {
1842 sh_do_register (regnum); /* All other regs */
1843 regnum++;
1844 }
1845 }
1846
1847 if (fpregs)
1848 while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1849 {
3bbfbb92 1850 do_pseudo_register (regnum);
53116e27
EZ		 1851 regnum++;
1852 }
1853 }
1854}
1855
1a8629c7
MS		 1856#ifdef SVR4_SHARED_LIBS
1857
1858/* Fetch (and possibly build) an appropriate link_map_offsets structure
1859 for native i386 linux targets using the struct offsets defined in
1860 link.h (but without actual reference to that file).
1861
1862 This makes it possible to access i386-linux shared libraries from
1863 a gdb that was not built on an i386-linux host (for cross debugging).
1864 */
1865
1866struct link_map_offsets *
1867sh_linux_svr4_fetch_link_map_offsets (void)
1868{
1869 static struct link_map_offsets lmo;
1870 static struct link_map_offsets *lmp = 0;
1871
1872 if (lmp == 0)
1873 {
1874 lmp = &lmo;
1875
1876 lmo.r_debug_size = 8; /* 20 not actual size but all we need */
1877
1878 lmo.r_map_offset = 4;
1879 lmo.r_map_size = 4;
1880
1881 lmo.link_map_size = 20; /* 552 not actual size but all we need */
1882
1883 lmo.l_addr_offset = 0;
1884 lmo.l_addr_size = 4;
1885
1886 lmo.l_name_offset = 4;
1887 lmo.l_name_size = 4;
1888
1889 lmo.l_next_offset = 12;
1890 lmo.l_next_size = 4;
1891
1892 lmo.l_prev_offset = 16;
1893 lmo.l_prev_size = 4;
1894 }
1895
1896 return lmp;
1897}
1898#endif /* SVR4_SHARED_LIBS */
1899
d658f924
JT		 1900\f
1901/* This table matches the indices assigned to enum sh_osabi. Keep
1902 them in sync. */
1903static const char * const sh_osabi_names[] =
1904{
1905 "<unknown>",
1906 "GNU/Linux",
1907 "NetBSD ELF",
1908 NULL
1909};
1910
1911static void
1912process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1913{
1914 enum sh_osabi *os_ident_ptr = obj;
1915 const char *name;
1916 unsigned int sectsize;
1917
1918 name = bfd_get_section_name (abfd, sect);
1919 sectsize = bfd_section_size (abfd, sect);
1920
1921 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1922 {
1923 unsigned int name_length, data_length, note_type;
1924 char *note;
1925
1926 /* If the section is larger than this, it's probably not what we are
1927 looking for. */
1928 if (sectsize > 128)
1929 sectsize = 128;
1930
1931 note = alloca (sectsize);
1932
1933 bfd_get_section_contents (abfd, sect, note,
1934 (file_ptr) 0, (bfd_size_type) sectsize);
1935
1936 name_length = bfd_h_get_32 (abfd, note);
1937 data_length = bfd_h_get_32 (abfd, note + 4);
1938 note_type = bfd_h_get_32 (abfd, note + 8);
1939
1940 if (name_length == 4 && data_length == 16 && note_type == NT_GNU_ABI_TAG
1941 && strcmp (note + 12, "GNU") == 0)
1942 {
1943 int os_number = bfd_h_get_32 (abfd, note + 16);
1944
1945 /* The case numbers are from abi-tags in glibc. */
1946 switch (os_number)
1947 {
1948 case GNU_ABI_TAG_LINUX:
1949 *os_ident_ptr = SH_OSABI_LINUX;
1950 break;
1951
1952 case GNU_ABI_TAG_HURD:
1953 internal_error
1954 (__FILE__, __LINE__,
1955 "process_note_abi_sections: Hurd objects not supported");
1956 break;
1957
1958 case GNU_ABI_TAG_SOLARIS:
1959 internal_error
1960 (__FILE__, __LINE__,
1961 "process_note_abi_sections: Solaris objects not supported");
1962 break;
1963
1964 default:
1965 internal_error
1966 (__FILE__, __LINE__,
1967 "process_note_abi_sections: unknown OS number %d",
1968 os_number);
1969 }
1970 }
1971 }
1972 /* NetBSD uses a similar trick. */
1973 else if (strcmp (name, ".note.netbsd.ident") == 0 && sectsize > 0)
1974 {
1975 unsigned int name_length, desc_length, note_type;
1976 char *note;
1977
1978 /* If the section is larger than this, it's probably not what we are
1979 looking for. */
1980 if (sectsize > 128)
1981 sectsize = 128;
1982
1983 note = alloca (sectsize);
1984
1985 bfd_get_section_contents (abfd, sect, note,
1986 (file_ptr) 0, (bfd_size_type) sectsize);
1987
1988 name_length = bfd_h_get_32 (abfd, note);
1989 desc_length = bfd_h_get_32 (abfd, note + 4);
1990 note_type = bfd_h_get_32 (abfd, note + 8);
1991
1992 if (name_length == 7 && desc_length == 4 && note_type == NT_NETBSD_IDENT
1993 && strcmp (note + 12, "NetBSD") == 0)
1994 /* XXX Should we check the version here?
1995 Probably not necessary yet. */
1996 *os_ident_ptr = SH_OSABI_NETBSD_ELF;
1997 }
1998}
1999
2000static int
2001get_elfosabi (bfd *abfd)
2002{
2003 int elfosabi;
2004 enum sh_osabi sh_osabi = SH_OSABI_UNKNOWN;
2005
2006 elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
2007
2008 switch (elfosabi)
2009 {
2010 case ELFOSABI_NONE:
2011 /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
2012 that we're on a SYSV system. However, some systems use note sections
2013 to record OS/ABI info, but leave e_ident[EI_OSABI] zero. So we
2014 have to check the note sections too. */
2015 bfd_map_over_sections (abfd,
2016 process_note_abi_tag_sections,
2017 &sh_osabi);
2018 break;
2019
2020 case ELFOSABI_NETBSD:
2021 sh_osabi = SH_OSABI_NETBSD_ELF;
2022 break;
2023
2024 case ELFOSABI_LINUX:
2025 sh_osabi = SH_OSABI_LINUX;
2026 break;
2027 }
2028
2029 return (sh_osabi);
2030}
2031
2032struct sh_osabi_handler
2033{
2034 struct sh_osabi_handler *next;
2035 enum sh_osabi abi;
2036 void (*init_osabi)(struct gdbarch_info, struct gdbarch *);
2037};
2038
2039struct sh_osabi_handler *sh_osabi_handler_list = NULL;
2040
2041void
2042sh_gdbarch_register_os_abi (enum sh_osabi abi,
2043 void (*init_osabi)(struct gdbarch_info,
2044 struct gdbarch *))
2045{
2046 struct sh_osabi_handler **handler_p;
2047
2048 for (handler_p = &sh_osabi_handler_list; *handler_p != NULL;
2049 handler_p = &(*handler_p)->next)
2050 {
2051 if ((*handler_p)->abi == abi)
2052 {
2053 internal_error
2054 (__FILE__, __LINE__,
2055 "sh_gdbarch_register_os_abi: A handler for this ABI variant "
2056 "(%d) has already been registered", (int) abi);
2057 /* If user wants to continue, override previous definition. */
2058 (*handler_p)->init_osabi = init_osabi;
2059 return;
2060 }
2061 }
2062
2063 (*handler_p)
2064 = (struct sh_osabi_handler *) xmalloc (sizeof (struct sh_osabi_handler));
2065 (*handler_p)->next = NULL;
2066 (*handler_p)->abi = abi;
2067 (*handler_p)->init_osabi = init_osabi;
2068}
2069
cc17453a
EZ		 2070static gdbarch_init_ftype sh_gdbarch_init;
2071
2072static struct gdbarch *
fba45db2 2073sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
cc17453a
EZ		 2074{
2075 static LONGEST sh_call_dummy_words[] = {0};
2076 struct gdbarch *gdbarch;
2077 struct gdbarch_tdep *tdep;
2078 gdbarch_register_name_ftype *sh_register_name;
2079 gdbarch_store_return_value_ftype *sh_store_return_value;
2080 gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
d658f924
JT		 2081 enum sh_osabi sh_osabi = SH_OSABI_UNKNOWN;
2082 struct sh_osabi_handler *osabi_handler;
2083
2084 /* Try to determine the ABI of the object we are loading. */
2085
2086 if (info.abfd != NULL)
2087 {
2088 switch (bfd_get_flavour (info.abfd))
2089 {
2090 case bfd_target_elf_flavour:
2091 sh_osabi = get_elfosabi (info.abfd);
2092 break;
2093
2094 default:
2095 /* Just leave it as "unkown". */
2096 break;
2097 }
2098 }
cc17453a
EZ		 2099
2100 /* Find a candidate among the list of pre-declared architectures. */
d658f924
JT		 2101 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2102 arches != NULL;
2103 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2104 {
2105 /* Make sure the ABI selection matches. */
2106 tdep = gdbarch_tdep (arches->gdbarch);
2107 if (tdep && tdep->sh_osabi == sh_osabi)
2108 return arches->gdbarch;
2109 }
cc17453a
EZ		 2110
2111 /* None found, create a new architecture from the information
2112 provided. */
2113 tdep = XMALLOC (struct gdbarch_tdep);
2114 gdbarch = gdbarch_alloc (&info, tdep);
2115
d658f924
JT		 2116 tdep->sh_osabi = sh_osabi;
2117 if (sh_osabi < SH_OSABI_INVALID)
2118 tdep->osabi_name = sh_osabi_names[sh_osabi];
2119 else
2120 {
2121 internal_error (__FILE__, __LINE__, "Invalid setting of sh_osabi %d",
2122 (int) sh_osabi);
2123 tdep->osabi_name = "<invalid>";
2124 }
2125
cc17453a
EZ		 2126 /* Initialize the register numbers that are not common to all the
2127 variants to -1, if necessary thse will be overwritten in the case
2128 statement below. */
2129 tdep->FPUL_REGNUM = -1;
2130 tdep->FPSCR_REGNUM = -1;
3bbfbb92 2131 tdep->PR_REGNUM = 17;
c62a7c7b 2132 tdep->SR_REGNUM = 22;
cc17453a 2133 tdep->DSR_REGNUM = -1;
e6c42fda 2134 tdep->FP_LAST_REGNUM = -1;
cc17453a
EZ		 2135 tdep->A0G_REGNUM = -1;
2136 tdep->A0_REGNUM = -1;
2137 tdep->A1G_REGNUM = -1;
2138 tdep->A1_REGNUM = -1;
2139 tdep->M0_REGNUM = -1;
2140 tdep->M1_REGNUM = -1;
2141 tdep->X0_REGNUM = -1;
2142 tdep->X1_REGNUM = -1;
2143 tdep->Y0_REGNUM = -1;
2144 tdep->Y1_REGNUM = -1;
2145 tdep->MOD_REGNUM = -1;
2146 tdep->RS_REGNUM = -1;
2147 tdep->RE_REGNUM = -1;
2148 tdep->SSR_REGNUM = -1;
2149 tdep->SPC_REGNUM = -1;
53116e27 2150 tdep->DR0_REGNUM = -1;
e6c42fda 2151 tdep->DR_LAST_REGNUM = -1;
53116e27 2152 tdep->FV0_REGNUM = -1;
e6c42fda 2153 tdep->FV_LAST_REGNUM = -1;
3bbfbb92
EZ		 2154 tdep->ARG0_REGNUM = 4;
2155 tdep->ARGLAST_REGNUM = 7;
2156 tdep->RETURN_REGNUM = 0;
2157 tdep->FLOAT_ARGLAST_REGNUM = -1;
a38d2a54 2158
cc17453a 2159 set_gdbarch_fp0_regnum (gdbarch, -1);
53116e27
EZ		 2160 set_gdbarch_num_pseudo_regs (gdbarch, 0);
2161 set_gdbarch_max_register_raw_size (gdbarch, 4);
2162 set_gdbarch_max_register_virtual_size (gdbarch, 4);
ec920329 2163 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
a38d2a54 2164 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
88e04cc1 2165 set_gdbarch_num_regs (gdbarch, SH_DEFAULT_NUM_REGS);
a38d2a54
EZ		 2166 set_gdbarch_sp_regnum (gdbarch, 15);
2167 set_gdbarch_fp_regnum (gdbarch, 14);
2168 set_gdbarch_pc_regnum (gdbarch, 16);
2169 set_gdbarch_register_size (gdbarch, 4);
88e04cc1 2170 set_gdbarch_register_bytes (gdbarch, SH_DEFAULT_NUM_REGS * 4);
c5f7d19c 2171 set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
eaf90c5d 2172 set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
3bbfbb92
EZ		 2173 set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2174 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2175 set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
3116c80a 2176 set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
3bbfbb92
EZ		 2177 set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2178 set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2179 set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2180 set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2181 set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2bf0cb65 2182 set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
3bbfbb92
EZ		 2183 skip_prologue_hard_way = sh_skip_prologue_hard_way;
2184 do_pseudo_register = sh_do_pseudo_register;
cc17453a
EZ		 2185
2186 switch (info.bfd_arch_info->mach)
8db62801 2187 {
cc17453a
EZ		 2188 case bfd_mach_sh:
2189 sh_register_name = sh_sh_register_name;
2190 sh_show_regs = sh_generic_show_regs;
2191 sh_store_return_value = sh_default_store_return_value;
2192 sh_register_virtual_type = sh_default_register_virtual_type;
2193 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
53116e27
EZ		 2194 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2195 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2196 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
cc17453a
EZ		 2197 break;
2198 case bfd_mach_sh2:
2199 sh_register_name = sh_sh_register_name;
2200 sh_show_regs = sh_generic_show_regs;
2201 sh_store_return_value = sh_default_store_return_value;
2202 sh_register_virtual_type = sh_default_register_virtual_type;
2203 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
53116e27
EZ		 2204 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2205 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2206 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
cc17453a
EZ		 2207 break;
2208 case bfd_mach_sh_dsp:
2209 sh_register_name = sh_sh_dsp_register_name;
2210 sh_show_regs = sh_dsp_show_regs;
2211 sh_store_return_value = sh_default_store_return_value;
2212 sh_register_virtual_type = sh_default_register_virtual_type;
2213 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
53116e27
EZ		 2214 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2215 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2216 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
cc17453a
EZ		 2217 tdep->DSR_REGNUM = 24;
2218 tdep->A0G_REGNUM = 25;
2219 tdep->A0_REGNUM = 26;
2220 tdep->A1G_REGNUM = 27;
2221 tdep->A1_REGNUM = 28;
2222 tdep->M0_REGNUM = 29;
2223 tdep->M1_REGNUM = 30;
2224 tdep->X0_REGNUM = 31;
2225 tdep->X1_REGNUM = 32;
2226 tdep->Y0_REGNUM = 33;
2227 tdep->Y1_REGNUM = 34;
2228 tdep->MOD_REGNUM = 40;
2229 tdep->RS_REGNUM = 43;
2230 tdep->RE_REGNUM = 44;
2231 break;
2232 case bfd_mach_sh3:
2233 sh_register_name = sh_sh3_register_name;
2234 sh_show_regs = sh3_show_regs;
2235 sh_store_return_value = sh_default_store_return_value;
2236 sh_register_virtual_type = sh_default_register_virtual_type;
2237 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
53116e27
EZ		 2238 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2239 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2240 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
cc17453a
EZ		 2241 tdep->SSR_REGNUM = 41;
2242 tdep->SPC_REGNUM = 42;
2243 break;
2244 case bfd_mach_sh3e:
2245 sh_register_name = sh_sh3e_register_name;
2246 sh_show_regs = sh3e_show_regs;
2247 sh_store_return_value = sh3e_sh4_store_return_value;
2248 sh_register_virtual_type = sh_sh3e_register_virtual_type;
2249 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
53116e27
EZ		 2250 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2251 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2252 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
3bbfbb92 2253 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
cc17453a
EZ		 2254 set_gdbarch_fp0_regnum (gdbarch, 25);
2255 tdep->FPUL_REGNUM = 23;
2256 tdep->FPSCR_REGNUM = 24;
e6c42fda 2257 tdep->FP_LAST_REGNUM = 40;
cc17453a
EZ		 2258 tdep->SSR_REGNUM = 41;
2259 tdep->SPC_REGNUM = 42;
2260 break;
2261 case bfd_mach_sh3_dsp:
2262 sh_register_name = sh_sh3_dsp_register_name;
2263 sh_show_regs = sh3_dsp_show_regs;
2264 sh_store_return_value = sh_default_store_return_value;
2265 sh_register_virtual_type = sh_default_register_virtual_type;
2266 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
53116e27
EZ		 2267 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2268 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2269 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
cc17453a
EZ		 2270 tdep->DSR_REGNUM = 24;
2271 tdep->A0G_REGNUM = 25;
2272 tdep->A0_REGNUM = 26;
2273 tdep->A1G_REGNUM = 27;
2274 tdep->A1_REGNUM = 28;
2275 tdep->M0_REGNUM = 29;
2276 tdep->M1_REGNUM = 30;
2277 tdep->X0_REGNUM = 31;
2278 tdep->X1_REGNUM = 32;
2279 tdep->Y0_REGNUM = 33;
2280 tdep->Y1_REGNUM = 34;
2281 tdep->MOD_REGNUM = 40;
2282 tdep->RS_REGNUM = 43;
2283 tdep->RE_REGNUM = 44;
2284 tdep->SSR_REGNUM = 41;
2285 tdep->SPC_REGNUM = 42;
2286 break;
2287 case bfd_mach_sh4:
53116e27
EZ		 2288 sh_register_name = sh_sh4_register_name;
2289 sh_show_regs = sh4_show_regs;
cc17453a 2290 sh_store_return_value = sh3e_sh4_store_return_value;
53116e27 2291 sh_register_virtual_type = sh_sh4_register_virtual_type;
cc17453a 2292 set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
3bbfbb92 2293 set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
cc17453a 2294 set_gdbarch_fp0_regnum (gdbarch, 25);
53116e27
EZ		 2295 set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2296 set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2297 set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2298 set_gdbarch_num_pseudo_regs (gdbarch, 12);
2299 set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2300 set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
7bd872fe
EZ		 2301 set_gdbarch_register_read (gdbarch, sh4_register_read);
2302 set_gdbarch_register_write (gdbarch, sh4_register_write);
cc17453a
EZ		 2303 tdep->FPUL_REGNUM = 23;
2304 tdep->FPSCR_REGNUM = 24;
e6c42fda 2305 tdep->FP_LAST_REGNUM = 40;
cc17453a
EZ		 2306 tdep->SSR_REGNUM = 41;
2307 tdep->SPC_REGNUM = 42;
53116e27 2308 tdep->DR0_REGNUM = 59;
e6c42fda 2309 tdep->DR_LAST_REGNUM = 66;
53116e27 2310 tdep->FV0_REGNUM = 67;
e6c42fda 2311 tdep->FV_LAST_REGNUM = 70;
cc17453a
EZ		 2312 break;
2313 default:
2314 sh_register_name = sh_generic_register_name;
2315 sh_show_regs = sh_generic_show_regs;
2316 sh_store_return_value = sh_default_store_return_value;
2317 sh_register_virtual_type = sh_default_register_virtual_type;
2318 set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
53116e27
EZ		 2319 set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2320 set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2321 set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
cc17453a 2322 break;
8db62801 2323 }
cc17453a
EZ		 2324
2325 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2326 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2327 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
cc17453a
EZ		 2328 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2329 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2330
cc17453a 2331 set_gdbarch_register_name (gdbarch, sh_register_name);
cc17453a
EZ		 2332 set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2333
cc17453a
EZ		 2334 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2335 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
cc17453a
EZ		 2336 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2337 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2338 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
a38d2a54 2339 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
cc17453a
EZ		 2340
2341 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2342 set_gdbarch_call_dummy_length (gdbarch, 0);
2343 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2344 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2345 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2346 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2347 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2348 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2349 set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2350 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2351 set_gdbarch_call_dummy_p (gdbarch, 1);
2352 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
cc17453a
EZ		 2353 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2354 set_gdbarch_coerce_float_to_double (gdbarch,
2355 sh_coerce_float_to_double);
2356
cc17453a
EZ		 2357 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2358 set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2359
cc17453a 2360 set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
cc17453a
EZ		 2361 set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2362 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2363 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2364 set_gdbarch_function_start_offset (gdbarch, 0);
cc17453a
EZ		 2365
2366 set_gdbarch_frame_args_skip (gdbarch, 0);
2367 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
cc17453a
EZ		 2368 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2369 set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
c347ee3e
MS		 2370 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2371 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
cc17453a
EZ		 2372 set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2373 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2374 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc17453a 2375
d658f924
JT		 2376 /* Hook in ABI-specific overrides, if they have been registered. If
2377 the ABI is unknown, this is probably an embedded target, so we
2378 should not warn about this situation. */
2379 if (sh_osabi != SH_OSABI_UNKNOWN)
2380 {
2381 for (osabi_handler = sh_osabi_handler_list; osabi_handler != NULL;
2382 osabi_handler = osabi_handler->next)
2383 if (osabi_handler->abi == sh_osabi)
2384 break;
2385
2386 if (osabi_handler)
2387 osabi_handler->init_osabi (info, gdbarch);
2388 else
2389 {
2390 /* We assume that if GDB_MULTI_ARCH is less than
2391 GDB_MULTI_ARCH_TM that an ABI variant can be supported by
2392 overriding definitions in this file. */
2393 if (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
2394 fprintf_filtered
2395 (gdb_stderr,
2396 "A handler for the ABI variant \"%s\" is not built into this "
2397 "configuration of GDB. "
2398 "Attempting to continue with the default SuperH settings",
2399 sh_osabi_names[sh_osabi]);
2400 }
2401 }
2402
cc17453a 2403 return gdbarch;
8db62801
EZ		 2404}
2405
d658f924
JT		 2406static void
2407sh_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2408{
2409 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
2410
2411 if (tdep == NULL)
2412 return;
2413
2414 if (tdep->osabi_name != NULL)
2415 fprintf_unfiltered (file, "sh_dump_tdep: OS ABI = %s\n", tdep->osabi_name);
2416 else
2417 internal_error (__FILE__, __LINE__,
2418 "sh_dump_tdep: illegal setting of tdep->sh_osabi (%d)",
2419 (int) tdep->sh_osabi);
2420}
2421
c906108c 2422void
fba45db2 2423_initialize_sh_tdep (void)
c906108c
SS		 2424{
2425 struct cmd_list_element *c;
cc17453a 2426
d658f924 2427 gdbarch_register (bfd_arch_sh, sh_gdbarch_init, sh_dump_tdep);
c906108c 2428
53116e27 2429 add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
c906108c 2430}
GDB Binutils - Deliverables
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