[deliverable/binutils-gdb.git] / gdb / sparc-nat.c

/* Functions specific to running gdb native on a SPARC running SunOS4.
   Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "inferior.h"
#include "target.h"
#include "gdbcore.h"

#include <signal.h>
#include <sys/ptrace.h>
#include <sys/wait.h>
#include <machine/reg.h>
#include <sys/user.h>

/* We don't store all registers immediately when requested, since they
   get sent over in large chunks anyway.  Instead, we accumulate most
   of the changes and send them over once.  "deferred_stores" keeps
   track of which sets of registers we have locally-changed copies of,
   so we only need send the groups that have changed.  */

#define	INT_REGS	1
#define	STACK_REGS	2
#define	FP_REGS		4

/* Fetch one or more registers from the inferior.  REGNO == -1 to get
   them all.  We actually fetch more than requested, when convenient,
   marking them as valid so we won't fetch them again.  */

void
fetch_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int i;

  /* We should never be called with deferred stores, because a prerequisite
     for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh.  */
  if (deferred_stores) abort();

  DO_DEFERRED_STORES;

  /* Global and Out regs are fetched directly, as well as the control
     registers.  If we're getting one of the in or local regs,
     and the stack pointer has not yet been fetched,
     we have to do that first, since they're found in memory relative
     to the stack pointer.  */
  if (regno < O7_REGNUM  /* including -1 */
      || regno >= Y_REGNUM
      || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
    {
      if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_getregs");
      
      registers[REGISTER_BYTE (0)] = 0;
      memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	      15 * REGISTER_RAW_SIZE (G0_REGNUM));
      *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; 
      *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
      *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
      *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;

      for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	register_valid[i] = 1;
      register_valid[Y_REGNUM] = 1;
      register_valid[PS_REGNUM] = 1;
      register_valid[PC_REGNUM] = 1;
      register_valid[NPC_REGNUM] = 1;
      /* If we don't set these valid, read_register_bytes() rereads
	 all the regs every time it is called!  FIXME.  */
      register_valid[WIM_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[TBR_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[CPS_REGNUM] = 1;	/* Not true yet, FIXME */
    }

  /* Floating point registers */
  if (regno == -1 ||
      regno == FPS_REGNUM ||
      (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
    {
      if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_fp_registers,
		       0))
	    perror("ptrace_getfpregs");
      memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	      sizeof inferior_fp_registers.fpu_fr);
      memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
	     &inferior_fp_registers.Fpu_fsr,
	     sizeof (FPU_FSR_TYPE));
      for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	register_valid[i] = 1;
      register_valid[FPS_REGNUM] = 1;
    }

  /* These regs are saved on the stack by the kernel.  Only read them
     all (16 ptrace calls!) if we really need them.  */
  if (regno == -1)
    {
      target_xfer_memory (*(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)],
		          &registers[REGISTER_BYTE (L0_REGNUM)],
			  16*REGISTER_RAW_SIZE (L0_REGNUM), 0);
      for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	register_valid[i] = 1;
    }
  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
    {
      CORE_ADDR sp = *(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)];
      i = REGISTER_BYTE (regno);
      if (register_valid[regno])
	printf_unfiltered("register %d valid and read\n", regno);
      target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
			  &registers[i], REGISTER_RAW_SIZE (regno), 0);
      register_valid[regno] = 1;
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
store_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int wanna_store = INT_REGS + STACK_REGS + FP_REGS;

  /* First decide which pieces of machine-state we need to modify.  
     Default for regno == -1 case is all pieces.  */
  if (regno >= 0)
    if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
      {
	wanna_store = FP_REGS;
      }
    else 
      {
	if (regno == SP_REGNUM)
	  wanna_store = INT_REGS + STACK_REGS;
	else if (regno < L0_REGNUM || regno > I7_REGNUM)
	  wanna_store = INT_REGS;
	else if (regno == FPS_REGNUM)
	  wanna_store = FP_REGS;
	else
	  wanna_store = STACK_REGS;
      }

  /* See if we're forcing the stores to happen now, or deferring. */
  if (regno == -2)
    {
      wanna_store = deferred_stores;
      deferred_stores = 0;
    }
  else
    {
      if (wanna_store == STACK_REGS)
	{
	  /* Fall through and just store one stack reg.  If we deferred
	     it, we'd have to store them all, or remember more info.  */
	}
      else
	{
	  deferred_stores |= wanna_store;
	  return;
	}
    }

  if (wanna_store & STACK_REGS)
    {
      CORE_ADDR sp = *(CORE_ADDR *)&registers[REGISTER_BYTE (SP_REGNUM)];

      if (regno < 0 || regno == SP_REGNUM)
	{
	  if (!register_valid[L0_REGNUM+5]) abort();
	  target_xfer_memory (sp, 
			      &registers[REGISTER_BYTE (L0_REGNUM)],
			      16*REGISTER_RAW_SIZE (L0_REGNUM), 1);
	}
      else
	{
	  if (!register_valid[regno]) abort();
	  target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
			      &registers[REGISTER_BYTE (regno)],
			      REGISTER_RAW_SIZE (regno), 1);
	}
	
    }

  if (wanna_store & INT_REGS)
    {
      if (!register_valid[G1_REGNUM]) abort();

      memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	      15 * REGISTER_RAW_SIZE (G1_REGNUM));

      inferior_registers.r_ps =
	*(int *)&registers[REGISTER_BYTE (PS_REGNUM)];
      inferior_registers.r_pc =
	*(int *)&registers[REGISTER_BYTE (PC_REGNUM)];
      inferior_registers.r_npc =
	*(int *)&registers[REGISTER_BYTE (NPC_REGNUM)];
      inferior_registers.r_y =
	*(int *)&registers[REGISTER_BYTE (Y_REGNUM)];

      if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_setregs");
    }

  if (wanna_store & FP_REGS)
    {
      if (!register_valid[FP0_REGNUM+9]) abort();
      memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
	      sizeof inferior_fp_registers.fpu_fr);
      memcpy (&inferior_fp_registers.Fpu_fsr, 
	      &registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
      if (0 !=
	 ptrace (PTRACE_SETFPREGS, inferior_pid,
		 (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	 perror("ptrace_setfpregs");
    }
}


static void
fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
  char *core_reg_sect;
  unsigned core_reg_size;
  int which;
  unsigned int ignore;	/* reg addr, unused in this version */
{

  if (which == 0) {

    /* Integer registers */

#define gregs ((struct regs *)core_reg_sect)
    /* G0 *always* holds 0.  */
    *(int *)&registers[REGISTER_BYTE (0)] = 0;

    /* The globals and output registers.  */
    memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, 
	    15 * REGISTER_RAW_SIZE (G1_REGNUM));
    *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
    *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
    *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
    *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;

    /* My best guess at where to get the locals and input
       registers is exactly where they usually are, right above
       the stack pointer.  If the core dump was caused by a bus error
       from blowing away the stack pointer (as is possible) then this
       won't work, but it's worth the try. */
    {
      int sp;

      sp = *(int *)&registers[REGISTER_BYTE (SP_REGNUM)];
      if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)], 
			  16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	{
	  /* fprintf_unfiltered so user can still use gdb */
	  fprintf_unfiltered (gdb_stderr,
		   "Couldn't read input and local registers from core file\n");
	}
    }
  } else if (which == 2) {

    /* Floating point registers */

#define fpuregs  ((struct fpu *) core_reg_sect)
    if (core_reg_size >= sizeof (struct fpu))
      {
	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
		sizeof (fpuregs->fpu_regs));
	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
		sizeof (FPU_FSR_TYPE));
      }
    else
      fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
  }
}

int
kernel_u_size ()
{
  return (sizeof (struct user));
}

\f
/* Register that we are able to handle sparc core file formats.
   FIXME: is this really bfd_target_unknown_flavour? */

static struct core_fns sparc_core_fns =
{
  bfd_target_unknown_flavour,
  fetch_core_registers,
  NULL
};

void
_initialize_core_sparc ()
{
  add_core_fns (&sparc_core_fns);
}
Commit	Line	Data
2ba6182b	1	/* Functions specific to running gdb native on a SPARC running SunOS4.
7531f36e	2	Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
dfc82617 RP	3
	4	This file is part of GDB.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
6c9638b4	18	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
dfc82617 RP	19
	20	#include "defs.h"
	21	#include "inferior.h"
	22	#include "target.h"
3730a0ed	23	#include "gdbcore.h"
dfc82617 RP	24
	25	#include <signal.h>
	26	#include <sys/ptrace.h>
	27	#include <sys/wait.h>
	28	#include <machine/reg.h>
7531f36e	29	#include <sys/user.h>
dfc82617 RP	30
	31	/* We don't store all registers immediately when requested, since they
	32	get sent over in large chunks anyway. Instead, we accumulate most
	33	of the changes and send them over once. "deferred_stores" keeps
	34	track of which sets of registers we have locally-changed copies of,
	35	so we only need send the groups that have changed. */
	36
	37	#define INT_REGS 1
	38	#define STACK_REGS 2
	39	#define FP_REGS 4
	40
	41	/* Fetch one or more registers from the inferior. REGNO == -1 to get
	42	them all. We actually fetch more than requested, when convenient,
	43	marking them as valid so we won't fetch them again. */
	44
	45	void
	46	fetch_inferior_registers (regno)
	47	int regno;
	48	{
	49	struct regs inferior_registers;
	50	struct fp_status inferior_fp_registers;
	51	int i;
	52
	53	/* We should never be called with deferred stores, because a prerequisite
	54	for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */
	55	if (deferred_stores) abort();
	56
	57	DO_DEFERRED_STORES;
	58
	59	/* Global and Out regs are fetched directly, as well as the control
	60	registers. If we're getting one of the in or local regs,
	61	and the stack pointer has not yet been fetched,
	62	we have to do that first, since they're found in memory relative
	63	to the stack pointer. */
	64	if (regno < O7_REGNUM /* including -1 */
	65	\|\| regno >= Y_REGNUM
	66	\|\| (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
	67	{
	68	if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
	69	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	70	perror("ptrace_getregs");
	71
	72	registers[REGISTER_BYTE (0)] = 0;
	73	memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	74	15 * REGISTER_RAW_SIZE (G0_REGNUM));
	75	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
	76	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
	77	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
	78	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
	79
	80	for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	81	register_valid[i] = 1;
	82	register_valid[Y_REGNUM] = 1;
	83	register_valid[PS_REGNUM] = 1;
	84	register_valid[PC_REGNUM] = 1;
	85	register_valid[NPC_REGNUM] = 1;
	86	/* If we don't set these valid, read_register_bytes() rereads
	87	all the regs every time it is called! FIXME. */
	88	register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */
	89	register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */
dfc82617 RP	90	register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */
	91	}
	92
	93	/* Floating point registers */
2ba6182b JG	94	if (regno == -1 \|\|
	95	regno == FPS_REGNUM \|\|
	96	(regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
dfc82617 RP	97	{
	98	if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
	99	(PTRACE_ARG3_TYPE) &inferior_fp_registers,
	100	0))
	101	perror("ptrace_getfpregs");
	102	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	103	sizeof inferior_fp_registers.fpu_fr);
c369b6a3	104	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
ade40d31	105	&inferior_fp_registers.Fpu_fsr,
c369b6a3	106	sizeof (FPU_FSR_TYPE));
dfc82617 RP	107	for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	108	register_valid[i] = 1;
	109	register_valid[FPS_REGNUM] = 1;
	110	}
	111
	112	/* These regs are saved on the stack by the kernel. Only read them
	113	all (16 ptrace calls!) if we really need them. */
	114	if (regno == -1)
	115	{
	116	target_xfer_memory ((CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)],
	117	&registers[REGISTER_BYTE (L0_REGNUM)],
	118	16*REGISTER_RAW_SIZE (L0_REGNUM), 0);
	119	for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	120	register_valid[i] = 1;
	121	}
	122	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	123	{
	124	CORE_ADDR sp = (CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)];
	125	i = REGISTER_BYTE (regno);
	126	if (register_valid[regno])
199b2450	127	printf_unfiltered("register %d valid and read\n", regno);
dfc82617 RP	128	target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
	129	&registers[i], REGISTER_RAW_SIZE (regno), 0);
	130	register_valid[regno] = 1;
	131	}
	132	}
	133
	134	/* Store our register values back into the inferior.
	135	If REGNO is -1, do this for all registers.
	136	Otherwise, REGNO specifies which register (so we can save time). */
	137
	138	void
	139	store_inferior_registers (regno)
	140	int regno;
	141	{
	142	struct regs inferior_registers;
	143	struct fp_status inferior_fp_registers;
	144	int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
	145
	146	/* First decide which pieces of machine-state we need to modify.
	147	Default for regno == -1 case is all pieces. */
	148	if (regno >= 0)
	149	if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
	150	{
	151	wanna_store = FP_REGS;
	152	}
	153	else
	154	{
	155	if (regno == SP_REGNUM)
	156	wanna_store = INT_REGS + STACK_REGS;
	157	else if (regno < L0_REGNUM \|\| regno > I7_REGNUM)
	158	wanna_store = INT_REGS;
2ba6182b JG	159	else if (regno == FPS_REGNUM)
2ba6182b JG	160	wanna_store = FP_REGS;
dfc82617 RP	161	else
	162	wanna_store = STACK_REGS;
	163	}
	164
	165	/* See if we're forcing the stores to happen now, or deferring. */
	166	if (regno == -2)
	167	{
	168	wanna_store = deferred_stores;
	169	deferred_stores = 0;
	170	}
	171	else
	172	{
	173	if (wanna_store == STACK_REGS)
	174	{
	175	/* Fall through and just store one stack reg. If we deferred
	176	it, we'd have to store them all, or remember more info. */
	177	}
	178	else
	179	{
	180	deferred_stores \|= wanna_store;
	181	return;
	182	}
	183	}
	184
	185	if (wanna_store & STACK_REGS)
	186	{
	187	CORE_ADDR sp = (CORE_ADDR )&registers[REGISTER_BYTE (SP_REGNUM)];
	188
	189	if (regno < 0 \|\| regno == SP_REGNUM)
	190	{
	191	if (!register_valid[L0_REGNUM+5]) abort();
	192	target_xfer_memory (sp,
	193	&registers[REGISTER_BYTE (L0_REGNUM)],
	194	16*REGISTER_RAW_SIZE (L0_REGNUM), 1);
	195	}
	196	else
	197	{
	198	if (!register_valid[regno]) abort();
	199	target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
	200	&registers[REGISTER_BYTE (regno)],
	201	REGISTER_RAW_SIZE (regno), 1);
	202	}
	203
	204	}
	205
	206	if (wanna_store & INT_REGS)
	207	{
	208	if (!register_valid[G1_REGNUM]) abort();
	209
	210	memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	211	15 * REGISTER_RAW_SIZE (G1_REGNUM));
	212
	213	inferior_registers.r_ps =
	214	(int )&registers[REGISTER_BYTE (PS_REGNUM)];
	215	inferior_registers.r_pc =
	216	(int )&registers[REGISTER_BYTE (PC_REGNUM)];
	217	inferior_registers.r_npc =
	218	(int )&registers[REGISTER_BYTE (NPC_REGNUM)];
	219	inferior_registers.r_y =
	220	(int )&registers[REGISTER_BYTE (Y_REGNUM)];
	221
	222	if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
	223	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	224	perror("ptrace_setregs");
225	}
226
227	if (wanna_store & FP_REGS)
228	{
229	if (!register_valid[FP0_REGNUM+9]) abort();
230	memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
231	sizeof inferior_fp_registers.fpu_fr);
c369b6a3	232	memcpy (&inferior_fp_registers.Fpu_fsr,
dfc82617	233	&registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
dfc82617 RP	234	if (0 !=
	235	ptrace (PTRACE_SETFPREGS, inferior_pid,
	236	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	237	perror("ptrace_setfpregs");
	238	}
	239	}
	240
	241
a1df8e78	242	static void
dfc82617 RP	243	fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
	244	char *core_reg_sect;
	245	unsigned core_reg_size;
	246	int which;
	247	unsigned int ignore; /* reg addr, unused in this version */
	248	{
	249
	250	if (which == 0) {
	251
	252	/* Integer registers */
	253
	254	#define gregs ((struct regs *)core_reg_sect)
	255	/* G0 always holds 0. */
	256	(int )&registers[REGISTER_BYTE (0)] = 0;
	257
	258	/* The globals and output registers. */
	259	memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
	260	15 * REGISTER_RAW_SIZE (G1_REGNUM));
	261	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
	262	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
	263	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
	264	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
	265
	266	/* My best guess at where to get the locals and input
	267	registers is exactly where they usually are, right above
	268	the stack pointer. If the core dump was caused by a bus error
	269	from blowing away the stack pointer (as is possible) then this
	270	won't work, but it's worth the try. */
	271	{
	272	int sp;
	273
	274	sp = (int )&registers[REGISTER_BYTE (SP_REGNUM)];
	275	if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
	276	16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	277	{
199b2450 TL	278	/* fprintf_unfiltered so user can still use gdb */
199b2450 TL	279	fprintf_unfiltered (gdb_stderr,
dfc82617 RP	280	"Couldn't read input and local registers from core file\n");
	281	}
	282	}
	283	} else if (which == 2) {
	284
	285	/* Floating point registers */
	286
	287	#define fpuregs ((struct fpu *) core_reg_sect)
	288	if (core_reg_size >= sizeof (struct fpu))
	289	{
	290	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
	291	sizeof (fpuregs->fpu_regs));
	292	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
	293	sizeof (FPU_FSR_TYPE));
	294	}
	295	else
199b2450	296	fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
dfc82617 RP	297	}
	298	}
	299
7531f36e FF	300	int
	301	kernel_u_size ()
	302	{
	303	return (sizeof (struct user));
	304	}
a1df8e78 FF	305
	306	\f
	307	/* Register that we are able to handle sparc core file formats.
	308	FIXME: is this really bfd_target_unknown_flavour? */
	309
	310	static struct core_fns sparc_core_fns =
	311	{
	312	bfd_target_unknown_flavour,
	313	fetch_core_registers,
	314	NULL
	315	};
	316
	317	void
	318	_initialize_core_sparc ()
	319	{
	320	add_core_fns (&sparc_core_fns);
	321	}