[deliverable/binutils-gdb.git] / gdb / sparc-nat.c

/* Functions specific to running gdb native on a SPARC running SunOS4.
   Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "inferior.h"
#include "target.h"
#include "gdbcore.h"

#include <signal.h>
#include <sys/ptrace.h>
#include <sys/wait.h>
#include <machine/reg.h>
#include <sys/user.h>

/* We don't store all registers immediately when requested, since they
   get sent over in large chunks anyway.  Instead, we accumulate most
   of the changes and send them over once.  "deferred_stores" keeps
   track of which sets of registers we have locally-changed copies of,
   so we only need send the groups that have changed.  */

#define	INT_REGS	1
#define	STACK_REGS	2
#define	FP_REGS		4

static void
fetch_core_registers PARAMS ((char *, unsigned int, int, CORE_ADDR));

/* Fetch one or more registers from the inferior.  REGNO == -1 to get
   them all.  We actually fetch more than requested, when convenient,
   marking them as valid so we won't fetch them again.  */

void
fetch_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int i;

  /* We should never be called with deferred stores, because a prerequisite
     for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh.  */
  if (deferred_stores) abort();

  DO_DEFERRED_STORES;

  /* Global and Out regs are fetched directly, as well as the control
     registers.  If we're getting one of the in or local regs,
     and the stack pointer has not yet been fetched,
     we have to do that first, since they're found in memory relative
     to the stack pointer.  */
  if (regno < O7_REGNUM  /* including -1 */
      || regno >= Y_REGNUM
      || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
    {
      if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_getregs");
      
      registers[REGISTER_BYTE (0)] = 0;
      memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	      15 * REGISTER_RAW_SIZE (G0_REGNUM));
      *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; 
      *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
      *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
      *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;

      for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	register_valid[i] = 1;
      register_valid[Y_REGNUM] = 1;
      register_valid[PS_REGNUM] = 1;
      register_valid[PC_REGNUM] = 1;
      register_valid[NPC_REGNUM] = 1;
      /* If we don't set these valid, read_register_bytes() rereads
	 all the regs every time it is called!  FIXME.  */
      register_valid[WIM_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[TBR_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[CPS_REGNUM] = 1;	/* Not true yet, FIXME */
    }

  /* Floating point registers */
  if (regno == -1 ||
      regno == FPS_REGNUM ||
      (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
    {
      if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_fp_registers,
		       0))
	    perror("ptrace_getfpregs");
      memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	      sizeof inferior_fp_registers.fpu_fr);
      memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
	     &inferior_fp_registers.Fpu_fsr,
	     sizeof (FPU_FSR_TYPE));
      for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	register_valid[i] = 1;
      register_valid[FPS_REGNUM] = 1;
    }

  /* These regs are saved on the stack by the kernel.  Only read them
     all (16 ptrace calls!) if we really need them.  */
  if (regno == -1)
    {
      target_read_memory (*(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)],
		          &registers[REGISTER_BYTE (L0_REGNUM)],
			  16*REGISTER_RAW_SIZE (L0_REGNUM));
      for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	register_valid[i] = 1;
    }
  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
    {
      CORE_ADDR sp = *(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)];
      i = REGISTER_BYTE (regno);
      if (register_valid[regno])
	printf_unfiltered("register %d valid and read\n", regno);
      target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
			  &registers[i], REGISTER_RAW_SIZE (regno));
      register_valid[regno] = 1;
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
store_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int wanna_store = INT_REGS + STACK_REGS + FP_REGS;

  /* First decide which pieces of machine-state we need to modify.  
     Default for regno == -1 case is all pieces.  */
  if (regno >= 0)
    if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
      {
	wanna_store = FP_REGS;
      }
    else 
      {
	if (regno == SP_REGNUM)
	  wanna_store = INT_REGS + STACK_REGS;
	else if (regno < L0_REGNUM || regno > I7_REGNUM)
	  wanna_store = INT_REGS;
	else if (regno == FPS_REGNUM)
	  wanna_store = FP_REGS;
	else
	  wanna_store = STACK_REGS;
      }

  /* See if we're forcing the stores to happen now, or deferring. */
  if (regno == -2)
    {
      wanna_store = deferred_stores;
      deferred_stores = 0;
    }
  else
    {
      if (wanna_store == STACK_REGS)
	{
	  /* Fall through and just store one stack reg.  If we deferred
	     it, we'd have to store them all, or remember more info.  */
	}
      else
	{
	  deferred_stores |= wanna_store;
	  return;
	}
    }

  if (wanna_store & STACK_REGS)
    {
      CORE_ADDR sp = *(CORE_ADDR *)&registers[REGISTER_BYTE (SP_REGNUM)];

      if (regno < 0 || regno == SP_REGNUM)
	{
	  if (!register_valid[L0_REGNUM+5]) abort();
	  target_write_memory (sp, 
			       &registers[REGISTER_BYTE (L0_REGNUM)],
			       16*REGISTER_RAW_SIZE (L0_REGNUM));
	}
      else
	{
	  if (!register_valid[regno]) abort();
	  target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
			       &registers[REGISTER_BYTE (regno)],
			       REGISTER_RAW_SIZE (regno));
	}
	
    }

  if (wanna_store & INT_REGS)
    {
      if (!register_valid[G1_REGNUM]) abort();

      memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	      15 * REGISTER_RAW_SIZE (G1_REGNUM));

      inferior_registers.r_ps =
	*(int *)&registers[REGISTER_BYTE (PS_REGNUM)];
      inferior_registers.r_pc =
	*(int *)&registers[REGISTER_BYTE (PC_REGNUM)];
      inferior_registers.r_npc =
	*(int *)&registers[REGISTER_BYTE (NPC_REGNUM)];
      inferior_registers.r_y =
	*(int *)&registers[REGISTER_BYTE (Y_REGNUM)];

      if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_setregs");
    }

  if (wanna_store & FP_REGS)
    {
      if (!register_valid[FP0_REGNUM+9]) abort();
      memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
	      sizeof inferior_fp_registers.fpu_fr);
      memcpy (&inferior_fp_registers.Fpu_fsr, 
	      &registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
      if (0 !=
	 ptrace (PTRACE_SETFPREGS, inferior_pid,
		 (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	 perror("ptrace_setfpregs");
    }
}


static void
fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
  char *core_reg_sect;
  unsigned core_reg_size;
  int which;
  CORE_ADDR ignore;	/* reg addr, unused in this version */
{

  if (which == 0) {

    /* Integer registers */

#define gregs ((struct regs *)core_reg_sect)
    /* G0 *always* holds 0.  */
    *(int *)&registers[REGISTER_BYTE (0)] = 0;

    /* The globals and output registers.  */
    memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, 
	    15 * REGISTER_RAW_SIZE (G1_REGNUM));
    *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
    *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
    *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
    *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;

    /* My best guess at where to get the locals and input
       registers is exactly where they usually are, right above
       the stack pointer.  If the core dump was caused by a bus error
       from blowing away the stack pointer (as is possible) then this
       won't work, but it's worth the try. */
    {
      int sp;

      sp = *(int *)&registers[REGISTER_BYTE (SP_REGNUM)];
      if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)], 
			  16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	{
	  /* fprintf_unfiltered so user can still use gdb */
	  fprintf_unfiltered (gdb_stderr,
		   "Couldn't read input and local registers from core file\n");
	}
    }
  } else if (which == 2) {

    /* Floating point registers */

#define fpuregs  ((struct fpu *) core_reg_sect)
    if (core_reg_size >= sizeof (struct fpu))
      {
	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
		sizeof (fpuregs->fpu_regs));
	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
		sizeof (FPU_FSR_TYPE));
      }
    else
      fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
  }
}

int
kernel_u_size ()
{
  return (sizeof (struct user));
}

\f
/* Register that we are able to handle sparc core file formats.
   FIXME: is this really bfd_target_unknown_flavour? */

static struct core_fns sparc_core_fns =
{
  bfd_target_unknown_flavour,
  fetch_core_registers,
  NULL
};

void
_initialize_core_sparc ()
{
  add_core_fns (&sparc_core_fns);
}
Commit	Line	Data
2ba6182b	1	/* Functions specific to running gdb native on a SPARC running SunOS4.
7531f36e	2	Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
dfc82617 RP	3
	4	This file is part of GDB.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
6c9638b4	18	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
dfc82617 RP	19
	20	#include "defs.h"
	21	#include "inferior.h"
	22	#include "target.h"
3730a0ed	23	#include "gdbcore.h"
dfc82617 RP	24
	25	#include <signal.h>
	26	#include <sys/ptrace.h>
	27	#include <sys/wait.h>
	28	#include <machine/reg.h>
7531f36e	29	#include <sys/user.h>
dfc82617 RP	30
	31	/* We don't store all registers immediately when requested, since they
	32	get sent over in large chunks anyway. Instead, we accumulate most
	33	of the changes and send them over once. "deferred_stores" keeps
	34	track of which sets of registers we have locally-changed copies of,
	35	so we only need send the groups that have changed. */
	36
	37	#define INT_REGS 1
	38	#define STACK_REGS 2
	39	#define FP_REGS 4
	40
b607efe7	41	static void
948a9d92	42	fetch_core_registers PARAMS ((char *, unsigned int, int, CORE_ADDR));
b607efe7	43
dfc82617 RP	44	/* Fetch one or more registers from the inferior. REGNO == -1 to get
	45	them all. We actually fetch more than requested, when convenient,
	46	marking them as valid so we won't fetch them again. */
	47
	48	void
	49	fetch_inferior_registers (regno)
	50	int regno;
	51	{
	52	struct regs inferior_registers;
	53	struct fp_status inferior_fp_registers;
	54	int i;
	55
	56	/* We should never be called with deferred stores, because a prerequisite
	57	for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */
	58	if (deferred_stores) abort();
	59
	60	DO_DEFERRED_STORES;
	61
	62	/* Global and Out regs are fetched directly, as well as the control
	63	registers. If we're getting one of the in or local regs,
	64	and the stack pointer has not yet been fetched,
	65	we have to do that first, since they're found in memory relative
	66	to the stack pointer. */
	67	if (regno < O7_REGNUM /* including -1 */
	68	\|\| regno >= Y_REGNUM
	69	\|\| (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
	70	{
	71	if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
	72	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	73	perror("ptrace_getregs");
	74
	75	registers[REGISTER_BYTE (0)] = 0;
	76	memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	77	15 * REGISTER_RAW_SIZE (G0_REGNUM));
	78	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
	79	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
	80	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
	81	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
	82
	83	for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	84	register_valid[i] = 1;
	85	register_valid[Y_REGNUM] = 1;
	86	register_valid[PS_REGNUM] = 1;
	87	register_valid[PC_REGNUM] = 1;
	88	register_valid[NPC_REGNUM] = 1;
	89	/* If we don't set these valid, read_register_bytes() rereads
	90	all the regs every time it is called! FIXME. */
	91	register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */
	92	register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */
dfc82617 RP	93	register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */
	94	}
	95
	96	/* Floating point registers */
2ba6182b JG	97	if (regno == -1 \|\|
	98	regno == FPS_REGNUM \|\|
	99	(regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
dfc82617 RP	100	{
	101	if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
	102	(PTRACE_ARG3_TYPE) &inferior_fp_registers,
	103	0))
	104	perror("ptrace_getfpregs");
	105	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	106	sizeof inferior_fp_registers.fpu_fr);
c369b6a3	107	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
ade40d31	108	&inferior_fp_registers.Fpu_fsr,
c369b6a3	109	sizeof (FPU_FSR_TYPE));
dfc82617 RP	110	for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	111	register_valid[i] = 1;
	112	register_valid[FPS_REGNUM] = 1;
	113	}
	114
	115	/* These regs are saved on the stack by the kernel. Only read them
	116	all (16 ptrace calls!) if we really need them. */
	117	if (regno == -1)
	118	{
4c681116	119	target_read_memory ((CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)],
dfc82617	120	&registers[REGISTER_BYTE (L0_REGNUM)],
4c681116	121	16*REGISTER_RAW_SIZE (L0_REGNUM));
dfc82617 RP	122	for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	123	register_valid[i] = 1;
	124	}
	125	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	126	{
	127	CORE_ADDR sp = (CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)];
	128	i = REGISTER_BYTE (regno);
	129	if (register_valid[regno])
199b2450	130	printf_unfiltered("register %d valid and read\n", regno);
4c681116 SG	131	target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
4c681116 SG	132	&registers[i], REGISTER_RAW_SIZE (regno));
dfc82617 RP	133	register_valid[regno] = 1;
	134	}
	135	}
	136
	137	/* Store our register values back into the inferior.
	138	If REGNO is -1, do this for all registers.
	139	Otherwise, REGNO specifies which register (so we can save time). */
	140
	141	void
	142	store_inferior_registers (regno)
	143	int regno;
	144	{
	145	struct regs inferior_registers;
	146	struct fp_status inferior_fp_registers;
	147	int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
	148
	149	/* First decide which pieces of machine-state we need to modify.
	150	Default for regno == -1 case is all pieces. */
	151	if (regno >= 0)
	152	if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
	153	{
	154	wanna_store = FP_REGS;
	155	}
	156	else
	157	{
	158	if (regno == SP_REGNUM)
	159	wanna_store = INT_REGS + STACK_REGS;
	160	else if (regno < L0_REGNUM \|\| regno > I7_REGNUM)
	161	wanna_store = INT_REGS;
2ba6182b JG	162	else if (regno == FPS_REGNUM)
2ba6182b JG	163	wanna_store = FP_REGS;
dfc82617 RP	164	else
	165	wanna_store = STACK_REGS;
	166	}
	167
	168	/* See if we're forcing the stores to happen now, or deferring. */
	169	if (regno == -2)
	170	{
	171	wanna_store = deferred_stores;
	172	deferred_stores = 0;
	173	}
	174	else
	175	{
	176	if (wanna_store == STACK_REGS)
	177	{
	178	/* Fall through and just store one stack reg. If we deferred
	179	it, we'd have to store them all, or remember more info. */
	180	}
	181	else
	182	{
	183	deferred_stores \|= wanna_store;
	184	return;
	185	}
	186	}
	187
	188	if (wanna_store & STACK_REGS)
	189	{
	190	CORE_ADDR sp = (CORE_ADDR )&registers[REGISTER_BYTE (SP_REGNUM)];
	191
	192	if (regno < 0 \|\| regno == SP_REGNUM)
	193	{
	194	if (!register_valid[L0_REGNUM+5]) abort();
4c681116 SG	195	target_write_memory (sp,
	196	&registers[REGISTER_BYTE (L0_REGNUM)],
	197	16*REGISTER_RAW_SIZE (L0_REGNUM));
dfc82617 RP	198	}
	199	else
	200	{
	201	if (!register_valid[regno]) abort();
4c681116 SG	202	target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
	203	&registers[REGISTER_BYTE (regno)],
	204	REGISTER_RAW_SIZE (regno));
dfc82617 RP	205	}
	206
	207	}
	208
	209	if (wanna_store & INT_REGS)
	210	{
	211	if (!register_valid[G1_REGNUM]) abort();
	212
	213	memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	214	15 * REGISTER_RAW_SIZE (G1_REGNUM));
	215
	216	inferior_registers.r_ps =
	217	(int )&registers[REGISTER_BYTE (PS_REGNUM)];
	218	inferior_registers.r_pc =
	219	(int )&registers[REGISTER_BYTE (PC_REGNUM)];
	220	inferior_registers.r_npc =
	221	(int )&registers[REGISTER_BYTE (NPC_REGNUM)];
	222	inferior_registers.r_y =
	223	(int )&registers[REGISTER_BYTE (Y_REGNUM)];
	224
	225	if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
	226	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	227	perror("ptrace_setregs");
	228	}
	229
	230	if (wanna_store & FP_REGS)
	231	{
	232	if (!register_valid[FP0_REGNUM+9]) abort();
	233	memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
	234	sizeof inferior_fp_registers.fpu_fr);
c369b6a3	235	memcpy (&inferior_fp_registers.Fpu_fsr,
dfc82617	236	&registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
dfc82617 RP	237	if (0 !=
	238	ptrace (PTRACE_SETFPREGS, inferior_pid,
	239	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	240	perror("ptrace_setfpregs");
	241	}
	242	}
	243
	244
a1df8e78	245	static void
dfc82617 RP	246	fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
	247	char *core_reg_sect;
	248	unsigned core_reg_size;
	249	int which;
948a9d92	250	CORE_ADDR ignore; /* reg addr, unused in this version */
dfc82617 RP	251	{
	252
	253	if (which == 0) {
	254
	255	/* Integer registers */
	256
	257	#define gregs ((struct regs *)core_reg_sect)
	258	/* G0 always holds 0. */
	259	(int )&registers[REGISTER_BYTE (0)] = 0;
	260
	261	/* The globals and output registers. */
	262	memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
	263	15 * REGISTER_RAW_SIZE (G1_REGNUM));
	264	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
	265	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
	266	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
	267	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
	268
	269	/* My best guess at where to get the locals and input
	270	registers is exactly where they usually are, right above
	271	the stack pointer. If the core dump was caused by a bus error
	272	from blowing away the stack pointer (as is possible) then this
	273	won't work, but it's worth the try. */
	274	{
	275	int sp;
	276
	277	sp = (int )&registers[REGISTER_BYTE (SP_REGNUM)];
	278	if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
	279	16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	280	{
199b2450 TL	281	/* fprintf_unfiltered so user can still use gdb */
199b2450 TL	282	fprintf_unfiltered (gdb_stderr,
dfc82617 RP	283	"Couldn't read input and local registers from core file\n");
	284	}
	285	}
	286	} else if (which == 2) {
	287
	288	/* Floating point registers */
	289
	290	#define fpuregs ((struct fpu *) core_reg_sect)
	291	if (core_reg_size >= sizeof (struct fpu))
	292	{
	293	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
	294	sizeof (fpuregs->fpu_regs));
	295	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
	296	sizeof (FPU_FSR_TYPE));
	297	}
	298	else
199b2450	299	fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
dfc82617 RP	300	}
	301	}
	302
7531f36e FF	303	int
	304	kernel_u_size ()
	305	{
	306	return (sizeof (struct user));
	307	}
a1df8e78 FF	308
	309	\f
	310	/* Register that we are able to handle sparc core file formats.
	311	FIXME: is this really bfd_target_unknown_flavour? */
	312
	313	static struct core_fns sparc_core_fns =
	314	{
	315	bfd_target_unknown_flavour,
	316	fetch_core_registers,
	317	NULL
	318	};
	319
	320	void
	321	_initialize_core_sparc ()
	322	{
	323	add_core_fns (&sparc_core_fns);
	324	}