[deliverable/binutils-gdb.git] / gdb / sparc-tdep.h

/* Target-dependent code for SPARC.

   Copyright (C) 2003, 2004, 2006, 2007, 2008, 2009, 2010, 2011
   Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef SPARC_TDEP_H
#define SPARC_TDEP_H 1

struct frame_info;
struct gdbarch;
struct regcache;
struct regset;
struct trad_frame_saved_reg;

/* Register offsets for the general-purpose register set.  */

struct sparc_gregset
{
  int r_psr_offset;
  int r_pc_offset;
  int r_npc_offset;
  int r_y_offset;
  int r_wim_offset;
  int r_tbr_offset;
  int r_g1_offset;
  int r_l0_offset;
  int r_y_size;
};

/* SPARC architecture-specific information.  */

struct gdbarch_tdep
{
  /* Register numbers for the PN and nPC registers.  The definitions
     for (64-bit) UltraSPARC differ from the (32-bit) SPARC
     definitions.  */
  int pc_regnum;
  int npc_regnum;

  /* Register sets.  */
  struct regset *gregset;
  size_t sizeof_gregset;
  struct regset *fpregset;
  size_t sizeof_fpregset;

  /* Offset of saved PC in jmp_buf.  */
  int jb_pc_offset;

  /* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
     treat the PLT special when doing prologue analysis.  */
  size_t plt_entry_size;

  /* Alternative location for trap return.  Used for single-stepping.  */
  CORE_ADDR (*step_trap) (struct frame_info *frame, unsigned long insn);

  /* ISA-specific data types.  */
  struct type *sparc_psr_type;
  struct type *sparc_fsr_type;
  struct type *sparc64_pstate_type;
  struct type *sparc64_fsr_type;
  struct type *sparc64_fprs_type;
};

/* Register numbers of various important registers.  */

enum sparc_regnum
{
  SPARC_G0_REGNUM,		/* %g0 */
  SPARC_G1_REGNUM,
  SPARC_G2_REGNUM,
  SPARC_G3_REGNUM,
  SPARC_G4_REGNUM,
  SPARC_G5_REGNUM,
  SPARC_G6_REGNUM,
  SPARC_G7_REGNUM,		/* %g7 */
  SPARC_O0_REGNUM,		/* %o0 */
  SPARC_O1_REGNUM,
  SPARC_O2_REGNUM,
  SPARC_O3_REGNUM,
  SPARC_O4_REGNUM,
  SPARC_O5_REGNUM,
  SPARC_SP_REGNUM,		/* %sp (%o6) */
  SPARC_O7_REGNUM,		/* %o7 */
  SPARC_L0_REGNUM,		/* %l0 */
  SPARC_L1_REGNUM,
  SPARC_L2_REGNUM,
  SPARC_L3_REGNUM,
  SPARC_L4_REGNUM,
  SPARC_L5_REGNUM,
  SPARC_L6_REGNUM,
  SPARC_L7_REGNUM,		/* %l7 */
  SPARC_I0_REGNUM,		/* %i0 */
  SPARC_I1_REGNUM,
  SPARC_I2_REGNUM,
  SPARC_I3_REGNUM,
  SPARC_I4_REGNUM,
  SPARC_I5_REGNUM,
  SPARC_FP_REGNUM,		/* %fp (%i6) */
  SPARC_I7_REGNUM,		/* %i7 */
  SPARC_F0_REGNUM,		/* %f0 */
  SPARC_F1_REGNUM,
  SPARC_F2_REGNUM,
  SPARC_F3_REGNUM,
  SPARC_F4_REGNUM,
  SPARC_F5_REGNUM,
  SPARC_F6_REGNUM,
  SPARC_F7_REGNUM,
  SPARC_F31_REGNUM		/* %f31 */
  = SPARC_F0_REGNUM + 31
};

enum sparc32_regnum
{
  SPARC32_Y_REGNUM		/* %y */
  = SPARC_F31_REGNUM + 1,
  SPARC32_PSR_REGNUM,		/* %psr */
  SPARC32_WIM_REGNUM,		/* %wim */
  SPARC32_TBR_REGNUM,		/* %tbr */
  SPARC32_PC_REGNUM,		/* %pc */
  SPARC32_NPC_REGNUM,		/* %npc */
  SPARC32_FSR_REGNUM,		/* %fsr */
  SPARC32_CSR_REGNUM,		/* %csr */

  /* Pseudo registers.  */
  SPARC32_D0_REGNUM,		/* %d0 */
  SPARC32_D30_REGNUM		/* %d30 */
  = SPARC32_D0_REGNUM + 15
};
\f

struct sparc_frame_cache
{
  /* Base address.  */
  CORE_ADDR base;
  CORE_ADDR pc;

  /* Do we have a frame?  */
  int frameless_p;

  /* The offset from the base register to the CFA.  */
  int frame_offset;

  /* Mask of `local' and `in' registers saved in the register save area.  */
  unsigned short int saved_regs_mask;

  /* Mask of `out' registers copied or renamed to their `in' sibling.  */
  unsigned char copied_regs_mask;

  /* Do we have a Structure, Union or Quad-Precision return value?  */
  int struct_return_p;

  /* Table of saved registers.  */
  struct trad_frame_saved_reg *saved_regs;
};

/* Fetch the instruction at PC.  */
extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);

/* Fetch StackGhost Per-Process XOR cookie.  */
extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch);

/* Record the effect of a SAVE instruction on CACHE.  */
extern void sparc_record_save_insn (struct sparc_frame_cache *cache);

/* Do a full analysis of the prologue at PC and update CACHE accordingly.  */
extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch,
					 CORE_ADDR pc, CORE_ADDR current_pc,
					 struct sparc_frame_cache *cache);

extern struct sparc_frame_cache *
  sparc_frame_cache (struct frame_info *this_frame, void **this_cache);

extern struct sparc_frame_cache *
  sparc32_frame_cache (struct frame_info *this_frame, void **this_cache);

\f

extern int sparc_software_single_step (struct frame_info *frame);

extern void sparc_supply_rwindow (struct regcache *regcache,
				  CORE_ADDR sp, int regnum);
extern void sparc_collect_rwindow (const struct regcache *regcache,
				   CORE_ADDR sp, int regnum);

/* Register offsets for SunOS 4.  */
extern const struct sparc_gregset sparc32_sunos4_gregset;

extern void sparc32_supply_gregset (const struct sparc_gregset *gregset,
				    struct regcache *regcache,
				    int regnum, const void *gregs);
extern void sparc32_collect_gregset (const struct sparc_gregset *gregset,
				     const struct regcache *regcache,
				     int regnum, void *gregs);
extern void sparc32_supply_fpregset (struct regcache *regcache,
				     int regnum, const void *fpregs);
extern void sparc32_collect_fpregset (const struct regcache *regcache,
				      int regnum, void *fpregs);

/* Functions and variables exported from sparc-sol2-tdep.c.  */

/* Register offsets for Solaris 2.  */
extern const struct sparc_gregset sparc32_sol2_gregset;

extern int sparc_sol2_pc_in_sigtramp (CORE_ADDR pc, char *name);

extern char *sparc_sol2_static_transform_name (char *name);

extern void sparc32_sol2_init_abi (struct gdbarch_info info,
				   struct gdbarch *gdbarch);

/* Functions and variables exported from sparcnbsd-tdep.c.  */

/* Register offsets for NetBSD.  */
extern const struct sparc_gregset sparc32nbsd_gregset;

/* Return the address of a system call's alternative return
   address.  */
extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
				      unsigned long insn);

extern void sparc32nbsd_elf_init_abi (struct gdbarch_info info,
				      struct gdbarch *gdbarch);

extern struct trad_frame_saved_reg *
  sparc32nbsd_sigcontext_saved_regs (struct frame_info *next_frame);

#endif /* sparc-tdep.h */
Commit	Line	Data
386c036b	1	/* Target-dependent code for SPARC.
c139e7d9	2
7b6bb8da	3	Copyright (C) 2003, 2004, 2006, 2007, 2008, 2009, 2010, 2011
0fb0cc75	4	Free Software Foundation, Inc.
c139e7d9 DJ	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
a9762ec7	10	the Free Software Foundation; either version 3 of the License, or
c139e7d9 DJ	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
a9762ec7	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
c139e7d9	20
386c036b MK	21	#ifndef SPARC_TDEP_H
	22	#define SPARC_TDEP_H 1
	23
566626fa	24	struct frame_info;
386c036b MK	25	struct gdbarch;
386c036b MK	26	struct regcache;
a54124c5	27	struct regset;
386c036b MK	28	struct trad_frame_saved_reg;
	29
	30	/* Register offsets for the general-purpose register set. */
	31
	32	struct sparc_gregset
	33	{
	34	int r_psr_offset;
	35	int r_pc_offset;
	36	int r_npc_offset;
	37	int r_y_offset;
	38	int r_wim_offset;
	39	int r_tbr_offset;
	40	int r_g1_offset;
	41	int r_l0_offset;
	42	int r_y_size;
	43	};
	44
	45	/* SPARC architecture-specific information. */
	46
	47	struct gdbarch_tdep
	48	{
	49	/* Register numbers for the PN and nPC registers. The definitions
	50	for (64-bit) UltraSPARC differ from the (32-bit) SPARC
	51	definitions. */
	52	int pc_regnum;
	53	int npc_regnum;
	54
a54124c5 MK	55	/* Register sets. */
	56	struct regset *gregset;
	57	size_t sizeof_gregset;
	58	struct regset *fpregset;
	59	size_t sizeof_fpregset;
	60
386c036b MK	61	/* Offset of saved PC in jmp_buf. */
	62	int jb_pc_offset;
	63
	64	/* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
	65	treat the PLT special when doing prologue analysis. */
	66	size_t plt_entry_size;
c893be75 MK	67
c893be75 MK	68	/* Alternative location for trap return. Used for single-stepping. */
0b1b3e42	69	CORE_ADDR (step_trap) (struct frame_info frame, unsigned long insn);
209bd28e UW	70
	71	/* ISA-specific data types. */
	72	struct type *sparc_psr_type;
	73	struct type *sparc_fsr_type;
	74	struct type *sparc64_pstate_type;
	75	struct type *sparc64_fsr_type;
	76	struct type *sparc64_fprs_type;
386c036b MK	77	};
	78
	79	/* Register numbers of various important registers. */
	80
	81	enum sparc_regnum
	82	{
	83	SPARC_G0_REGNUM, /* %g0 */
	84	SPARC_G1_REGNUM,
	85	SPARC_G2_REGNUM,
	86	SPARC_G3_REGNUM,
	87	SPARC_G4_REGNUM,
	88	SPARC_G5_REGNUM,
	89	SPARC_G6_REGNUM,
	90	SPARC_G7_REGNUM, /* %g7 */
	91	SPARC_O0_REGNUM, /* %o0 */
	92	SPARC_O1_REGNUM,
	93	SPARC_O2_REGNUM,
	94	SPARC_O3_REGNUM,
	95	SPARC_O4_REGNUM,
	96	SPARC_O5_REGNUM,
	97	SPARC_SP_REGNUM, /* %sp (%o6) */
	98	SPARC_O7_REGNUM, /* %o7 */
	99	SPARC_L0_REGNUM, /* %l0 */
	100	SPARC_L1_REGNUM,
	101	SPARC_L2_REGNUM,
	102	SPARC_L3_REGNUM,
	103	SPARC_L4_REGNUM,
	104	SPARC_L5_REGNUM,
	105	SPARC_L6_REGNUM,
	106	SPARC_L7_REGNUM, /* %l7 */
	107	SPARC_I0_REGNUM, /* %i0 */
	108	SPARC_I1_REGNUM,
	109	SPARC_I2_REGNUM,
	110	SPARC_I3_REGNUM,
	111	SPARC_I4_REGNUM,
	112	SPARC_I5_REGNUM,
	113	SPARC_FP_REGNUM, /* %fp (%i6) */
	114	SPARC_I7_REGNUM, /* %i7 */
	115	SPARC_F0_REGNUM, /* %f0 */
	116	SPARC_F1_REGNUM,
fe10a582 DM	117	SPARC_F2_REGNUM,
	118	SPARC_F3_REGNUM,
	119	SPARC_F4_REGNUM,
	120	SPARC_F5_REGNUM,
	121	SPARC_F6_REGNUM,
	122	SPARC_F7_REGNUM,
386c036b MK	123	SPARC_F31_REGNUM /* %f31 */
	124	= SPARC_F0_REGNUM + 31
	125	};
	126
	127	enum sparc32_regnum
	128	{
	129	SPARC32_Y_REGNUM /* %y */
	130	= SPARC_F31_REGNUM + 1,
	131	SPARC32_PSR_REGNUM, /* %psr */
	132	SPARC32_WIM_REGNUM, /* %wim */
	133	SPARC32_TBR_REGNUM, /* %tbr */
	134	SPARC32_PC_REGNUM, /* %pc */
	135	SPARC32_NPC_REGNUM, /* %npc */
	136	SPARC32_FSR_REGNUM, /* %fsr */
	137	SPARC32_CSR_REGNUM, /* %csr */
	138
	139	/* Pseudo registers. */
	140	SPARC32_D0_REGNUM, /* %d0 */
	141	SPARC32_D30_REGNUM /* %d30 */
	142	= SPARC32_D0_REGNUM + 15
	143	};
	144	\f
	145
	146	struct sparc_frame_cache
	147	{
	148	/* Base address. */
	149	CORE_ADDR base;
	150	CORE_ADDR pc;
	151
	152	/* Do we have a frame? */
	153	int frameless_p;
	154
369c397b JB	155	/* The offset from the base register to the CFA. */
	156	int frame_offset;
	157
	158	/* Mask of `local' and `in' registers saved in the register save area. */
	159	unsigned short int saved_regs_mask;
	160
	161	/* Mask of `out' registers copied or renamed to their `in' sibling. */
	162	unsigned char copied_regs_mask;
	163
c378eb4e	164	/* Do we have a Structure, Union or Quad-Precision return value? */
386c036b MK	165	int struct_return_p;
	166
	167	/* Table of saved registers. */
	168	struct trad_frame_saved_reg *saved_regs;
	169	};
	170
	171	/* Fetch the instruction at PC. */
	172	extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);
	173
1c800673	174	/* Fetch StackGhost Per-Process XOR cookie. */
e17a4113	175	extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch);
1c800673	176
369c397b JB	177	/* Record the effect of a SAVE instruction on CACHE. */
	178	extern void sparc_record_save_insn (struct sparc_frame_cache *cache);
	179
	180	/* Do a full analysis of the prologue at PC and update CACHE accordingly. */
be8626e0 MD	181	extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch,
be8626e0 MD	182	CORE_ADDR pc, CORE_ADDR current_pc,
386c036b MK	183	struct sparc_frame_cache *cache);
	184
	185	extern struct sparc_frame_cache *
236369e7	186	sparc_frame_cache (struct frame_info this_frame, void *this_cache);
386c036b MK	187
386c036b MK	188	extern struct sparc_frame_cache *
236369e7	189	sparc32_frame_cache (struct frame_info this_frame, void *this_cache);
386c036b MK	190
	191	\f
	192
0b1b3e42	193	extern int sparc_software_single_step (struct frame_info *frame);
386c036b MK	194
	195	extern void sparc_supply_rwindow (struct regcache *regcache,
	196	CORE_ADDR sp, int regnum);
	197	extern void sparc_collect_rwindow (const struct regcache *regcache,
	198	CORE_ADDR sp, int regnum);
	199
	200	/* Register offsets for SunOS 4. */
	201	extern const struct sparc_gregset sparc32_sunos4_gregset;
	202
	203	extern void sparc32_supply_gregset (const struct sparc_gregset *gregset,
	204	struct regcache *regcache,
	205	int regnum, const void *gregs);
	206	extern void sparc32_collect_gregset (const struct sparc_gregset *gregset,
	207	const struct regcache *regcache,
	208	int regnum, void *gregs);
	209	extern void sparc32_supply_fpregset (struct regcache *regcache,
	210	int regnum, const void *fpregs);
	211	extern void sparc32_collect_fpregset (const struct regcache *regcache,
	212	int regnum, void *fpregs);
	213
	214	/* Functions and variables exported from sparc-sol2-tdep.c. */
	215
	216	/* Register offsets for Solaris 2. */
	217	extern const struct sparc_gregset sparc32_sol2_gregset;
	218
	219	extern int sparc_sol2_pc_in_sigtramp (CORE_ADDR pc, char *name);
	220
149ad273 UW	221	extern char sparc_sol2_static_transform_name (char name);
149ad273 UW	222
386c036b MK	223	extern void sparc32_sol2_init_abi (struct gdbarch_info info,
	224	struct gdbarch *gdbarch);
	225
	226	/* Functions and variables exported from sparcnbsd-tdep.c. */
	227
	228	/* Register offsets for NetBSD. */
	229	extern const struct sparc_gregset sparc32nbsd_gregset;
	230
c893be75 MK	231	/* Return the address of a system call's alternative return
c893be75 MK	232	address. */
0b1b3e42 UW	233	extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
0b1b3e42 UW	234	unsigned long insn);
c893be75	235
19671c2b MK	236	extern void sparc32nbsd_elf_init_abi (struct gdbarch_info info,
	237	struct gdbarch *gdbarch);
	238
566626fa MK	239	extern struct trad_frame_saved_reg *
	240	sparc32nbsd_sigcontext_saved_regs (struct frame_info *next_frame);
	241
386c036b	242	#endif /* sparc-tdep.h */