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7d9884b9 | 1 | /* Host-dependent code for SPARC host systems, for GDB, the GNU debugger. |
7ed0f002 | 2 | Copyright 1986, 1987, 1989, 1990, 1991, 1992 Free Software Foundation, Inc. |
dd3b648e RP |
3 | |
4 | This file is part of GDB. | |
5 | ||
99a7de40 | 6 | This program is free software; you can redistribute it and/or modify |
dd3b648e | 7 | it under the terms of the GNU General Public License as published by |
99a7de40 JG |
8 | the Free Software Foundation; either version 2 of the License, or |
9 | (at your option) any later version. | |
dd3b648e | 10 | |
99a7de40 | 11 | This program is distributed in the hope that it will be useful, |
dd3b648e RP |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
99a7de40 JG |
17 | along with this program; if not, write to the Free Software |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
dd3b648e | 19 | |
2e00f40a JG |
20 | /* This code only compiles when we have the definitions in tm-sparc.h. */ |
21 | ||
22 | #define TM_FILE_OVERRIDE | |
dd3b648e | 23 | #include "defs.h" |
2e00f40a JG |
24 | #include "tm-sparc.h" |
25 | ||
dd3b648e RP |
26 | #include "inferior.h" |
27 | #include "target.h" | |
28 | ||
29 | #include <sys/param.h> | |
dd3b648e RP |
30 | #include <sys/ptrace.h> |
31 | #include <machine/reg.h> | |
32 | ||
33 | #include "gdbcore.h" | |
34 | #include <sys/core.h> | |
35 | ||
36 | extern char register_valid[]; | |
37 | ||
69f29a86 JG |
38 | /* We don't store all registers immediately when requested, since they |
39 | get sent over in large chunks anyway. Instead, we accumulate most | |
40 | of the changes and send them over once. "deferred_stores" keeps | |
41 | track of which sets of registers we have locally-changed copies of, | |
42 | so we only need send the groups that have changed. */ | |
43 | ||
44 | #define INT_REGS 1 | |
45 | #define STACK_REGS 2 | |
46 | #define FP_REGS 4 | |
47 | ||
beff312e RP |
48 | int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ |
49 | ||
dd3b648e RP |
50 | /* Fetch one or more registers from the inferior. REGNO == -1 to get |
51 | them all. We actually fetch more than requested, when convenient, | |
52 | marking them as valid so we won't fetch them again. */ | |
53 | void | |
54 | fetch_inferior_registers (regno) | |
55 | int regno; | |
56 | { | |
57 | struct regs inferior_registers; | |
58 | struct fp_status inferior_fp_registers; | |
59 | int i; | |
60 | ||
61 | /* We should never be called with deferred stores, because a prerequisite | |
62 | for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ | |
63 | if (deferred_stores) abort(); | |
64 | ||
65 | DO_DEFERRED_STORES; | |
66 | ||
67 | /* Global and Out regs are fetched directly, as well as the control | |
68 | registers. If we're getting one of the in or local regs, | |
69 | and the stack pointer has not yet been fetched, | |
70 | we have to do that first, since they're found in memory relative | |
71 | to the stack pointer. */ | |
72 | if (regno < O7_REGNUM /* including -1 */ | |
73 | || regno >= Y_REGNUM | |
74 | || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) | |
75 | { | |
76 | if (0 != ptrace (PTRACE_GETREGS, inferior_pid, &inferior_registers)) | |
77 | perror("ptrace_getregs"); | |
78 | ||
79 | registers[REGISTER_BYTE (0)] = 0; | |
80 | bcopy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (1)], 15 * REGISTER_RAW_SIZE (G0_REGNUM)); | |
81 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; | |
82 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; | |
83 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; | |
84 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; | |
85 | ||
86 | for (i = G0_REGNUM; i <= O7_REGNUM; i++) | |
87 | register_valid[i] = 1; | |
88 | register_valid[Y_REGNUM] = 1; | |
89 | register_valid[PS_REGNUM] = 1; | |
90 | register_valid[PC_REGNUM] = 1; | |
91 | register_valid[NPC_REGNUM] = 1; | |
92 | /* If we don't set these valid, read_register_bytes() rereads | |
93 | all the regs every time it is called! FIXME. */ | |
94 | register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ | |
95 | register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ | |
96 | register_valid[FPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
97 | register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
98 | } | |
99 | ||
100 | /* Floating point registers */ | |
101 | if (regno == -1 || (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) | |
102 | { | |
103 | if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid, &inferior_fp_registers)) | |
104 | perror("ptrace_getfpregs"); | |
105 | bcopy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], | |
106 | sizeof inferior_fp_registers.fpu_fr); | |
107 | /* bcopy (&inferior_fp_registers.Fpu_fsr, | |
108 | ®isters[REGISTER_BYTE (FPS_REGNUM)], | |
109 | sizeof (FPU_FSR_TYPE)); FIXME??? -- gnu@cyg */ | |
110 | for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++) | |
111 | register_valid[i] = 1; | |
112 | register_valid[FPS_REGNUM] = 1; | |
113 | } | |
114 | ||
115 | /* These regs are saved on the stack by the kernel. Only read them | |
116 | all (16 ptrace calls!) if we really need them. */ | |
117 | if (regno == -1) | |
118 | { | |
119 | target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)], | |
120 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
121 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 0); | |
122 | for (i = L0_REGNUM; i <= I7_REGNUM; i++) | |
123 | register_valid[i] = 1; | |
124 | } | |
125 | else if (regno >= L0_REGNUM && regno <= I7_REGNUM) | |
126 | { | |
127 | CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
128 | i = REGISTER_BYTE (regno); | |
129 | if (register_valid[regno]) | |
130 | printf("register %d valid and read\n", regno); | |
131 | target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM), | |
132 | ®isters[i], REGISTER_RAW_SIZE (regno), 0); | |
133 | register_valid[regno] = 1; | |
134 | } | |
135 | } | |
136 | ||
137 | /* Store our register values back into the inferior. | |
138 | If REGNO is -1, do this for all registers. | |
139 | Otherwise, REGNO specifies which register (so we can save time). */ | |
140 | ||
7ed0f002 | 141 | void |
dd3b648e RP |
142 | store_inferior_registers (regno) |
143 | int regno; | |
144 | { | |
145 | struct regs inferior_registers; | |
146 | struct fp_status inferior_fp_registers; | |
147 | int wanna_store = INT_REGS + STACK_REGS + FP_REGS; | |
148 | ||
149 | /* First decide which pieces of machine-state we need to modify. | |
150 | Default for regno == -1 case is all pieces. */ | |
151 | if (regno >= 0) | |
152 | if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) | |
153 | { | |
154 | wanna_store = FP_REGS; | |
155 | } | |
156 | else | |
157 | { | |
158 | if (regno == SP_REGNUM) | |
159 | wanna_store = INT_REGS + STACK_REGS; | |
160 | else if (regno < L0_REGNUM || regno > I7_REGNUM) | |
161 | wanna_store = INT_REGS; | |
162 | else | |
163 | wanna_store = STACK_REGS; | |
164 | } | |
165 | ||
166 | /* See if we're forcing the stores to happen now, or deferring. */ | |
167 | if (regno == -2) | |
168 | { | |
169 | wanna_store = deferred_stores; | |
170 | deferred_stores = 0; | |
171 | } | |
172 | else | |
173 | { | |
174 | if (wanna_store == STACK_REGS) | |
175 | { | |
176 | /* Fall through and just store one stack reg. If we deferred | |
177 | it, we'd have to store them all, or remember more info. */ | |
178 | } | |
179 | else | |
180 | { | |
181 | deferred_stores |= wanna_store; | |
7ed0f002 | 182 | return; |
dd3b648e RP |
183 | } |
184 | } | |
185 | ||
186 | if (wanna_store & STACK_REGS) | |
187 | { | |
188 | CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
189 | ||
190 | if (regno < 0 || regno == SP_REGNUM) | |
191 | { | |
192 | if (!register_valid[L0_REGNUM+5]) abort(); | |
193 | target_xfer_memory (sp, | |
194 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
195 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 1); | |
196 | } | |
197 | else | |
198 | { | |
199 | if (!register_valid[regno]) abort(); | |
200 | target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), | |
201 | ®isters[REGISTER_BYTE (regno)], | |
202 | REGISTER_RAW_SIZE (regno), 1); | |
203 | } | |
204 | ||
205 | } | |
206 | ||
207 | if (wanna_store & INT_REGS) | |
208 | { | |
209 | if (!register_valid[G1_REGNUM]) abort(); | |
210 | ||
211 | bcopy (®isters[REGISTER_BYTE (G1_REGNUM)], | |
212 | &inferior_registers.r_g1, 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
213 | ||
214 | inferior_registers.r_ps = | |
215 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)]; | |
216 | inferior_registers.r_pc = | |
217 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)]; | |
218 | inferior_registers.r_npc = | |
219 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)]; | |
220 | inferior_registers.r_y = | |
221 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)]; | |
222 | ||
223 | if (0 != ptrace (PTRACE_SETREGS, inferior_pid, &inferior_registers)) | |
224 | perror("ptrace_setregs"); | |
225 | } | |
226 | ||
227 | if (wanna_store & FP_REGS) | |
228 | { | |
229 | if (!register_valid[FP0_REGNUM+9]) abort(); | |
230 | bcopy (®isters[REGISTER_BYTE (FP0_REGNUM)], | |
231 | &inferior_fp_registers, | |
232 | sizeof inferior_fp_registers.fpu_fr); | |
233 | ||
234 | /* bcopy (®isters[REGISTER_BYTE (FPS_REGNUM)], | |
235 | &inferior_fp_registers.Fpu_fsr, | |
236 | sizeof (FPU_FSR_TYPE)); | |
237 | ****/ | |
238 | if (0 != | |
239 | ptrace (PTRACE_SETFPREGS, inferior_pid, &inferior_fp_registers)) | |
240 | perror("ptrace_setfpregs"); | |
241 | } | |
dd3b648e RP |
242 | } |
243 | \f | |
244 | void | |
be772100 | 245 | fetch_core_registers (core_reg_sect, core_reg_size, which, ignore) |
dd3b648e RP |
246 | char *core_reg_sect; |
247 | unsigned core_reg_size; | |
248 | int which; | |
be772100 | 249 | unsigned int ignore; /* reg addr, unused in this version */ |
dd3b648e RP |
250 | { |
251 | ||
252 | if (which == 0) { | |
253 | ||
254 | /* Integer registers */ | |
255 | ||
256 | #define gregs ((struct regs *)core_reg_sect) | |
257 | /* G0 *always* holds 0. */ | |
258 | *(int *)®isters[REGISTER_BYTE (0)] = 0; | |
259 | ||
260 | /* The globals and output registers. */ | |
261 | bcopy (&gregs->r_g1, | |
262 | ®isters[REGISTER_BYTE (G1_REGNUM)], | |
263 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
264 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; | |
265 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; | |
266 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; | |
267 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; | |
268 | ||
269 | /* My best guess at where to get the locals and input | |
270 | registers is exactly where they usually are, right above | |
271 | the stack pointer. If the core dump was caused by a bus error | |
272 | from blowing away the stack pointer (as is possible) then this | |
273 | won't work, but it's worth the try. */ | |
274 | { | |
275 | int sp; | |
276 | ||
277 | sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
278 | if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], | |
279 | 16 * REGISTER_RAW_SIZE (L0_REGNUM))) | |
280 | { | |
281 | /* fprintf so user can still use gdb */ | |
282 | fprintf (stderr, | |
283 | "Couldn't read input and local registers from core file\n"); | |
284 | } | |
285 | } | |
286 | } else if (which == 2) { | |
287 | ||
288 | /* Floating point registers */ | |
289 | ||
290 | #define fpuregs ((struct fpu *) core_reg_sect) | |
291 | if (core_reg_size >= sizeof (struct fpu)) | |
292 | { | |
293 | bcopy (fpuregs->fpu_regs, | |
294 | ®isters[REGISTER_BYTE (FP0_REGNUM)], | |
295 | sizeof (fpuregs->fpu_regs)); | |
296 | bcopy (&fpuregs->fpu_fsr, | |
297 | ®isters[REGISTER_BYTE (FPS_REGNUM)], | |
298 | sizeof (FPU_FSR_TYPE)); | |
299 | } | |
300 | else | |
301 | fprintf (stderr, "Couldn't read float regs from core file\n"); | |
302 | } | |
303 | } |