[deliverable/binutils-gdb.git] / gdb / sparc-xdep.c

/* Host-dependent code for SPARC host systems, for GDB, the GNU debugger.
   Copyright 1986, 1987, 1989, 1990, 1991, 1992 Free Software Foundation, Inc.

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */

/* This code only compiles when we have the definitions in tm-sparc.h.  */

#define	TM_FILE_OVERRIDE
#include "defs.h"
#include "tm-sparc.h"

#include "inferior.h"
#include "target.h"

#include <sys/param.h>
#include <sys/ptrace.h>
#include <machine/reg.h>

#include "gdbcore.h"
#include <sys/core.h>

/* We don't store all registers immediately when requested, since they
   get sent over in large chunks anyway.  Instead, we accumulate most
   of the changes and send them over once.  "deferred_stores" keeps
   track of which sets of registers we have locally-changed copies of,
   so we only need send the groups that have changed.  */

#define	INT_REGS	1
#define	STACK_REGS	2
#define	FP_REGS		4

int deferred_stores = 0;	/* Cumulates stores we want to do eventually. */

/* Fetch one or more registers from the inferior.  REGNO == -1 to get
   them all.  We actually fetch more than requested, when convenient,
   marking them as valid so we won't fetch them again.  */
void
fetch_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int i;

  /* We should never be called with deferred stores, because a prerequisite
     for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh.  */
  if (deferred_stores) abort();

  DO_DEFERRED_STORES;

  /* Global and Out regs are fetched directly, as well as the control
     registers.  If we're getting one of the in or local regs,
     and the stack pointer has not yet been fetched,
     we have to do that first, since they're found in memory relative
     to the stack pointer.  */
  if (regno < O7_REGNUM  /* including -1 */
      || regno >= Y_REGNUM
      || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
    {
      if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_getregs");
      
      registers[REGISTER_BYTE (0)] = 0;
      memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	      15 * REGISTER_RAW_SIZE (G0_REGNUM));
      *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; 
      *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
      *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
      *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;

      for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	register_valid[i] = 1;
      register_valid[Y_REGNUM] = 1;
      register_valid[PS_REGNUM] = 1;
      register_valid[PC_REGNUM] = 1;
      register_valid[NPC_REGNUM] = 1;
      /* If we don't set these valid, read_register_bytes() rereads
	 all the regs every time it is called!  FIXME.  */
      register_valid[WIM_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[TBR_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[FPS_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[CPS_REGNUM] = 1;	/* Not true yet, FIXME */
    }

  /* Floating point registers */
  if (regno == -1 || (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
    {
      if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_fp_registers,
		       0))
	    perror("ptrace_getfpregs");
      memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	      sizeof inferior_fp_registers.fpu_fr);
      /* bcopy (&inferior_fp_registers.Fpu_fsr,
	     &registers[REGISTER_BYTE (FPS_REGNUM)],
	     sizeof (FPU_FSR_TYPE));  FIXME???  -- gnu@cyg */
      for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	register_valid[i] = 1;
      register_valid[FPS_REGNUM] = 1;
    }

  /* These regs are saved on the stack by the kernel.  Only read them
     all (16 ptrace calls!) if we really need them.  */
  if (regno == -1)
    {
      target_xfer_memory (*(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)],
		          &registers[REGISTER_BYTE (L0_REGNUM)],
			  16*REGISTER_RAW_SIZE (L0_REGNUM), 0);
      for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	register_valid[i] = 1;
    }
  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
    {
      CORE_ADDR sp = *(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)];
      i = REGISTER_BYTE (regno);
      if (register_valid[regno])
	printf("register %d valid and read\n", regno);
      target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
			  &registers[i], REGISTER_RAW_SIZE (regno), 0);
      register_valid[regno] = 1;
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
store_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int wanna_store = INT_REGS + STACK_REGS + FP_REGS;

  /* First decide which pieces of machine-state we need to modify.  
     Default for regno == -1 case is all pieces.  */
  if (regno >= 0)
    if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
      {
	wanna_store = FP_REGS;
      }
    else 
      {
	if (regno == SP_REGNUM)
	  wanna_store = INT_REGS + STACK_REGS;
	else if (regno < L0_REGNUM || regno > I7_REGNUM)
	  wanna_store = INT_REGS;
	else
	  wanna_store = STACK_REGS;
      }

  /* See if we're forcing the stores to happen now, or deferring. */
  if (regno == -2)
    {
      wanna_store = deferred_stores;
      deferred_stores = 0;
    }
  else
    {
      if (wanna_store == STACK_REGS)
	{
	  /* Fall through and just store one stack reg.  If we deferred
	     it, we'd have to store them all, or remember more info.  */
	}
      else
	{
	  deferred_stores |= wanna_store;
	  return;
	}
    }

  if (wanna_store & STACK_REGS)
    {
      CORE_ADDR sp = *(CORE_ADDR *)&registers[REGISTER_BYTE (SP_REGNUM)];

      if (regno < 0 || regno == SP_REGNUM)
	{
	  if (!register_valid[L0_REGNUM+5]) abort();
	  target_xfer_memory (sp, 
			      &registers[REGISTER_BYTE (L0_REGNUM)],
			      16*REGISTER_RAW_SIZE (L0_REGNUM), 1);
	}
      else
	{
	  if (!register_valid[regno]) abort();
	  target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
			      &registers[REGISTER_BYTE (regno)],
			      REGISTER_RAW_SIZE (regno), 1);
	}
	
    }

  if (wanna_store & INT_REGS)
    {
      if (!register_valid[G1_REGNUM]) abort();

      memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	      15 * REGISTER_RAW_SIZE (G1_REGNUM));

      inferior_registers.r_ps =
	*(int *)&registers[REGISTER_BYTE (PS_REGNUM)];
      inferior_registers.r_pc =
	*(int *)&registers[REGISTER_BYTE (PC_REGNUM)];
      inferior_registers.r_npc =
	*(int *)&registers[REGISTER_BYTE (NPC_REGNUM)];
      inferior_registers.r_y =
	*(int *)&registers[REGISTER_BYTE (Y_REGNUM)];

      if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_setregs");
    }

  if (wanna_store & FP_REGS)
    {
      if (!register_valid[FP0_REGNUM+9]) abort();
      memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
	      sizeof inferior_fp_registers.fpu_fr);

/*    memcpy (&inferior_fp_registers.Fpu_fsr, 
	      &registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
****/
      if (0 !=
	 ptrace (PTRACE_SETFPREGS, inferior_pid,
		 (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	 perror("ptrace_setfpregs");
    }
}
\f
void
fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
  char *core_reg_sect;
  unsigned core_reg_size;
  int which;
  unsigned int ignore;	/* reg addr, unused in this version */
{

  if (which == 0) {

    /* Integer registers */

#define gregs ((struct regs *)core_reg_sect)
    /* G0 *always* holds 0.  */
    *(int *)&registers[REGISTER_BYTE (0)] = 0;

    /* The globals and output registers.  */
    memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, 
	    15 * REGISTER_RAW_SIZE (G1_REGNUM));
    *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
    *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
    *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
    *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;

    /* My best guess at where to get the locals and input
       registers is exactly where they usually are, right above
       the stack pointer.  If the core dump was caused by a bus error
       from blowing away the stack pointer (as is possible) then this
       won't work, but it's worth the try. */
    {
      int sp;

      sp = *(int *)&registers[REGISTER_BYTE (SP_REGNUM)];
      if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)], 
			  16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	{
	  /* fprintf so user can still use gdb */
	  fprintf (stderr,
		   "Couldn't read input and local registers from core file\n");
	}
    }
  } else if (which == 2) {

    /* Floating point registers */

#define fpuregs  ((struct fpu *) core_reg_sect)
    if (core_reg_size >= sizeof (struct fpu))
      {
	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
		sizeof (fpuregs->fpu_regs));
	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
		sizeof (FPU_FSR_TYPE));
      }
    else
      fprintf (stderr, "Couldn't read float regs from core file\n");
  }
}
Commit	Line	Data
7d9884b9	1	/* Host-dependent code for SPARC host systems, for GDB, the GNU debugger.
7ed0f002	2	Copyright 1986, 1987, 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
dd3b648e RP	3
	4	This file is part of GDB.
	5
99a7de40	6	This program is free software; you can redistribute it and/or modify
dd3b648e	7	it under the terms of the GNU General Public License as published by
99a7de40 JG	8	the Free Software Foundation; either version 2 of the License, or
99a7de40 JG	9	(at your option) any later version.
dd3b648e	10
99a7de40	11	This program is distributed in the hope that it will be useful,
dd3b648e RP	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
99a7de40 JG	17	along with this program; if not, write to the Free Software
99a7de40 JG	18	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
dd3b648e	19
2e00f40a JG	20	/* This code only compiles when we have the definitions in tm-sparc.h. */
	21
	22	#define TM_FILE_OVERRIDE
dd3b648e	23	#include "defs.h"
2e00f40a JG	24	#include "tm-sparc.h"
2e00f40a JG	25
dd3b648e RP	26	#include "inferior.h"
	27	#include "target.h"
	28
	29	#include <sys/param.h>
dd3b648e RP	30	#include <sys/ptrace.h>
	31	#include <machine/reg.h>
	32
	33	#include "gdbcore.h"
	34	#include <sys/core.h>
	35
69f29a86 JG	36	/* We don't store all registers immediately when requested, since they
	37	get sent over in large chunks anyway. Instead, we accumulate most
	38	of the changes and send them over once. "deferred_stores" keeps
	39	track of which sets of registers we have locally-changed copies of,
	40	so we only need send the groups that have changed. */
	41
	42	#define INT_REGS 1
	43	#define STACK_REGS 2
	44	#define FP_REGS 4
	45
beff312e RP	46	int deferred_stores = 0; /* Cumulates stores we want to do eventually. */
beff312e RP	47
dd3b648e RP	48	/* Fetch one or more registers from the inferior. REGNO == -1 to get
	49	them all. We actually fetch more than requested, when convenient,
	50	marking them as valid so we won't fetch them again. */
	51	void
	52	fetch_inferior_registers (regno)
	53	int regno;
	54	{
	55	struct regs inferior_registers;
	56	struct fp_status inferior_fp_registers;
	57	int i;
	58
	59	/* We should never be called with deferred stores, because a prerequisite
	60	for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */
	61	if (deferred_stores) abort();
	62
	63	DO_DEFERRED_STORES;
	64
	65	/* Global and Out regs are fetched directly, as well as the control
	66	registers. If we're getting one of the in or local regs,
	67	and the stack pointer has not yet been fetched,
	68	we have to do that first, since they're found in memory relative
	69	to the stack pointer. */
	70	if (regno < O7_REGNUM /* including -1 */
	71	\|\| regno >= Y_REGNUM
	72	\|\| (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
	73	{
e676a15f FF	74	if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
	75	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	76	perror("ptrace_getregs");
dd3b648e RP	77
dd3b648e RP	78	registers[REGISTER_BYTE (0)] = 0;
4ed3a9ea FF	79	memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
4ed3a9ea FF	80	15 * REGISTER_RAW_SIZE (G0_REGNUM));
dd3b648e RP	81	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
	82	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
	83	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
	84	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
	85
	86	for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	87	register_valid[i] = 1;
	88	register_valid[Y_REGNUM] = 1;
	89	register_valid[PS_REGNUM] = 1;
	90	register_valid[PC_REGNUM] = 1;
	91	register_valid[NPC_REGNUM] = 1;
	92	/* If we don't set these valid, read_register_bytes() rereads
	93	all the regs every time it is called! FIXME. */
	94	register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */
	95	register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */
	96	register_valid[FPS_REGNUM] = 1; /* Not true yet, FIXME */
	97	register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */
	98	}
	99
	100	/* Floating point registers */
	101	if (regno == -1 \|\| (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
	102	{
e676a15f FF	103	if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
	104	(PTRACE_ARG3_TYPE) &inferior_fp_registers,
	105	0))
dd3b648e	106	perror("ptrace_getfpregs");
4ed3a9ea FF	107	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
4ed3a9ea FF	108	sizeof inferior_fp_registers.fpu_fr);
dd3b648e RP	109	/* bcopy (&inferior_fp_registers.Fpu_fsr,
	110	&registers[REGISTER_BYTE (FPS_REGNUM)],
	111	sizeof (FPU_FSR_TYPE)); FIXME??? -- gnu@cyg */
	112	for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	113	register_valid[i] = 1;
	114	register_valid[FPS_REGNUM] = 1;
	115	}
	116
	117	/* These regs are saved on the stack by the kernel. Only read them
	118	all (16 ptrace calls!) if we really need them. */
	119	if (regno == -1)
	120	{
	121	target_xfer_memory ((CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)],
	122	&registers[REGISTER_BYTE (L0_REGNUM)],
	123	16*REGISTER_RAW_SIZE (L0_REGNUM), 0);
	124	for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	125	register_valid[i] = 1;
	126	}
	127	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	128	{
	129	CORE_ADDR sp = (CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)];
	130	i = REGISTER_BYTE (regno);
	131	if (register_valid[regno])
	132	printf("register %d valid and read\n", regno);
	133	target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
	134	&registers[i], REGISTER_RAW_SIZE (regno), 0);
	135	register_valid[regno] = 1;
	136	}
	137	}
	138
	139	/* Store our register values back into the inferior.
	140	If REGNO is -1, do this for all registers.
	141	Otherwise, REGNO specifies which register (so we can save time). */
	142
7ed0f002	143	void
dd3b648e RP	144	store_inferior_registers (regno)
	145	int regno;
	146	{
	147	struct regs inferior_registers;
	148	struct fp_status inferior_fp_registers;
	149	int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
	150
	151	/* First decide which pieces of machine-state we need to modify.
	152	Default for regno == -1 case is all pieces. */
	153	if (regno >= 0)
	154	if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
	155	{
	156	wanna_store = FP_REGS;
	157	}
	158	else
	159	{
	160	if (regno == SP_REGNUM)
	161	wanna_store = INT_REGS + STACK_REGS;
	162	else if (regno < L0_REGNUM \|\| regno > I7_REGNUM)
	163	wanna_store = INT_REGS;
	164	else
	165	wanna_store = STACK_REGS;
	166	}
	167
	168	/* See if we're forcing the stores to happen now, or deferring. */
	169	if (regno == -2)
	170	{
	171	wanna_store = deferred_stores;
	172	deferred_stores = 0;
	173	}
	174	else
	175	{
	176	if (wanna_store == STACK_REGS)
	177	{
	178	/* Fall through and just store one stack reg. If we deferred
	179	it, we'd have to store them all, or remember more info. */
	180	}
	181	else
	182	{
	183	deferred_stores \|= wanna_store;
7ed0f002	184	return;
dd3b648e RP	185	}
	186	}
	187
	188	if (wanna_store & STACK_REGS)
	189	{
	190	CORE_ADDR sp = (CORE_ADDR )&registers[REGISTER_BYTE (SP_REGNUM)];
	191
	192	if (regno < 0 \|\| regno == SP_REGNUM)
	193	{
	194	if (!register_valid[L0_REGNUM+5]) abort();
	195	target_xfer_memory (sp,
	196	&registers[REGISTER_BYTE (L0_REGNUM)],
	197	16*REGISTER_RAW_SIZE (L0_REGNUM), 1);
	198	}
	199	else
	200	{
	201	if (!register_valid[regno]) abort();
	202	target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
	203	&registers[REGISTER_BYTE (regno)],
	204	REGISTER_RAW_SIZE (regno), 1);
	205	}
	206
	207	}
	208
	209	if (wanna_store & INT_REGS)
	210	{
	211	if (!register_valid[G1_REGNUM]) abort();
	212
4ed3a9ea FF	213	memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
4ed3a9ea FF	214	15 * REGISTER_RAW_SIZE (G1_REGNUM));
dd3b648e RP	215
	216	inferior_registers.r_ps =
	217	(int )&registers[REGISTER_BYTE (PS_REGNUM)];
	218	inferior_registers.r_pc =
	219	(int )&registers[REGISTER_BYTE (PC_REGNUM)];
	220	inferior_registers.r_npc =
	221	(int )&registers[REGISTER_BYTE (NPC_REGNUM)];
	222	inferior_registers.r_y =
	223	(int )&registers[REGISTER_BYTE (Y_REGNUM)];
	224
e676a15f FF	225	if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
e676a15f FF	226	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
dd3b648e RP	227	perror("ptrace_setregs");
	228	}
	229
	230	if (wanna_store & FP_REGS)
	231	{
	232	if (!register_valid[FP0_REGNUM+9]) abort();
4ed3a9ea FF	233	memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
4ed3a9ea FF	234	sizeof inferior_fp_registers.fpu_fr);
dd3b648e	235
4ed3a9ea FF	236	/* memcpy (&inferior_fp_registers.Fpu_fsr,
4ed3a9ea FF	237	&registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
dd3b648e RP	238	****/
dd3b648e RP	239	if (0 !=
e676a15f FF	240	ptrace (PTRACE_SETFPREGS, inferior_pid,
e676a15f FF	241	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
dd3b648e RP	242	perror("ptrace_setfpregs");
dd3b648e RP	243	}
dd3b648e RP	244	}
	245	\f
	246	void
be772100	247	fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
dd3b648e RP	248	char *core_reg_sect;
	249	unsigned core_reg_size;
	250	int which;
be772100	251	unsigned int ignore; /* reg addr, unused in this version */
dd3b648e RP	252	{
	253
	254	if (which == 0) {
	255
	256	/* Integer registers */
	257
	258	#define gregs ((struct regs *)core_reg_sect)
	259	/* G0 always holds 0. */
	260	(int )&registers[REGISTER_BYTE (0)] = 0;
	261
	262	/* The globals and output registers. */
4ed3a9ea FF	263	memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
4ed3a9ea FF	264	15 * REGISTER_RAW_SIZE (G1_REGNUM));
dd3b648e RP	265	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
	266	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
	267	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
	268	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
	269
	270	/* My best guess at where to get the locals and input
	271	registers is exactly where they usually are, right above
	272	the stack pointer. If the core dump was caused by a bus error
	273	from blowing away the stack pointer (as is possible) then this
	274	won't work, but it's worth the try. */
	275	{
	276	int sp;
	277
	278	sp = (int )&registers[REGISTER_BYTE (SP_REGNUM)];
	279	if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
	280	16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	281	{
	282	/* fprintf so user can still use gdb */
	283	fprintf (stderr,
	284	"Couldn't read input and local registers from core file\n");
	285	}
	286	}
	287	} else if (which == 2) {
	288
	289	/* Floating point registers */
	290
	291	#define fpuregs ((struct fpu *) core_reg_sect)
	292	if (core_reg_size >= sizeof (struct fpu))
	293	{
4ed3a9ea FF	294	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
	295	sizeof (fpuregs->fpu_regs));
	296	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
	297	sizeof (FPU_FSR_TYPE));
dd3b648e RP	298	}
	299	else
	300	fprintf (stderr, "Couldn't read float regs from core file\n");
	301	}
	302	}