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dd3b648e RP |
1 | /* Machine-dependent code which would otherwise be in inflow.c and core.c, |
2 | for GDB, the GNU debugger, for SPARC host systems. | |
3 | ||
4 | Copyright (C) 1986, 1987, 1989, 1990 Free Software Foundation, Inc. | |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | GDB is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 1, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GDB is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GDB; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
21 | ||
22 | #include <stdio.h> | |
23 | #include "defs.h" | |
24 | #include "tm-sparc.h" | |
25 | #include "param-no-tm.h" | |
26 | #include "inferior.h" | |
27 | #include "target.h" | |
28 | ||
29 | #include <sys/param.h> | |
30 | #include <sys/file.h> /* For L_SET */ | |
31 | ||
32 | #include <sys/ptrace.h> | |
33 | #include <machine/reg.h> | |
34 | ||
35 | #include "gdbcore.h" | |
36 | #include <sys/core.h> | |
37 | ||
38 | extern char register_valid[]; | |
39 | ||
40 | /* Fetch one or more registers from the inferior. REGNO == -1 to get | |
41 | them all. We actually fetch more than requested, when convenient, | |
42 | marking them as valid so we won't fetch them again. */ | |
43 | void | |
44 | fetch_inferior_registers (regno) | |
45 | int regno; | |
46 | { | |
47 | struct regs inferior_registers; | |
48 | struct fp_status inferior_fp_registers; | |
49 | int i; | |
50 | ||
51 | /* We should never be called with deferred stores, because a prerequisite | |
52 | for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ | |
53 | if (deferred_stores) abort(); | |
54 | ||
55 | DO_DEFERRED_STORES; | |
56 | ||
57 | /* Global and Out regs are fetched directly, as well as the control | |
58 | registers. If we're getting one of the in or local regs, | |
59 | and the stack pointer has not yet been fetched, | |
60 | we have to do that first, since they're found in memory relative | |
61 | to the stack pointer. */ | |
62 | if (regno < O7_REGNUM /* including -1 */ | |
63 | || regno >= Y_REGNUM | |
64 | || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) | |
65 | { | |
66 | if (0 != ptrace (PTRACE_GETREGS, inferior_pid, &inferior_registers)) | |
67 | perror("ptrace_getregs"); | |
68 | ||
69 | registers[REGISTER_BYTE (0)] = 0; | |
70 | bcopy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (1)], 15 * REGISTER_RAW_SIZE (G0_REGNUM)); | |
71 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; | |
72 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; | |
73 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; | |
74 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; | |
75 | ||
76 | for (i = G0_REGNUM; i <= O7_REGNUM; i++) | |
77 | register_valid[i] = 1; | |
78 | register_valid[Y_REGNUM] = 1; | |
79 | register_valid[PS_REGNUM] = 1; | |
80 | register_valid[PC_REGNUM] = 1; | |
81 | register_valid[NPC_REGNUM] = 1; | |
82 | /* If we don't set these valid, read_register_bytes() rereads | |
83 | all the regs every time it is called! FIXME. */ | |
84 | register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ | |
85 | register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ | |
86 | register_valid[FPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
87 | register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
88 | } | |
89 | ||
90 | /* Floating point registers */ | |
91 | if (regno == -1 || (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) | |
92 | { | |
93 | if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid, &inferior_fp_registers)) | |
94 | perror("ptrace_getfpregs"); | |
95 | bcopy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], | |
96 | sizeof inferior_fp_registers.fpu_fr); | |
97 | /* bcopy (&inferior_fp_registers.Fpu_fsr, | |
98 | ®isters[REGISTER_BYTE (FPS_REGNUM)], | |
99 | sizeof (FPU_FSR_TYPE)); FIXME??? -- gnu@cyg */ | |
100 | for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++) | |
101 | register_valid[i] = 1; | |
102 | register_valid[FPS_REGNUM] = 1; | |
103 | } | |
104 | ||
105 | /* These regs are saved on the stack by the kernel. Only read them | |
106 | all (16 ptrace calls!) if we really need them. */ | |
107 | if (regno == -1) | |
108 | { | |
109 | target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)], | |
110 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
111 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 0); | |
112 | for (i = L0_REGNUM; i <= I7_REGNUM; i++) | |
113 | register_valid[i] = 1; | |
114 | } | |
115 | else if (regno >= L0_REGNUM && regno <= I7_REGNUM) | |
116 | { | |
117 | CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
118 | i = REGISTER_BYTE (regno); | |
119 | if (register_valid[regno]) | |
120 | printf("register %d valid and read\n", regno); | |
121 | target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM), | |
122 | ®isters[i], REGISTER_RAW_SIZE (regno), 0); | |
123 | register_valid[regno] = 1; | |
124 | } | |
125 | } | |
126 | ||
127 | /* Store our register values back into the inferior. | |
128 | If REGNO is -1, do this for all registers. | |
129 | Otherwise, REGNO specifies which register (so we can save time). */ | |
130 | ||
131 | #define INT_REGS 1 | |
132 | #define STACK_REGS 2 | |
133 | #define FP_REGS 4 | |
134 | int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ | |
135 | ||
136 | int | |
137 | store_inferior_registers (regno) | |
138 | int regno; | |
139 | { | |
140 | struct regs inferior_registers; | |
141 | struct fp_status inferior_fp_registers; | |
142 | int wanna_store = INT_REGS + STACK_REGS + FP_REGS; | |
143 | ||
144 | /* First decide which pieces of machine-state we need to modify. | |
145 | Default for regno == -1 case is all pieces. */ | |
146 | if (regno >= 0) | |
147 | if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) | |
148 | { | |
149 | wanna_store = FP_REGS; | |
150 | } | |
151 | else | |
152 | { | |
153 | if (regno == SP_REGNUM) | |
154 | wanna_store = INT_REGS + STACK_REGS; | |
155 | else if (regno < L0_REGNUM || regno > I7_REGNUM) | |
156 | wanna_store = INT_REGS; | |
157 | else | |
158 | wanna_store = STACK_REGS; | |
159 | } | |
160 | ||
161 | /* See if we're forcing the stores to happen now, or deferring. */ | |
162 | if (regno == -2) | |
163 | { | |
164 | wanna_store = deferred_stores; | |
165 | deferred_stores = 0; | |
166 | } | |
167 | else | |
168 | { | |
169 | if (wanna_store == STACK_REGS) | |
170 | { | |
171 | /* Fall through and just store one stack reg. If we deferred | |
172 | it, we'd have to store them all, or remember more info. */ | |
173 | } | |
174 | else | |
175 | { | |
176 | deferred_stores |= wanna_store; | |
177 | return 0; | |
178 | } | |
179 | } | |
180 | ||
181 | if (wanna_store & STACK_REGS) | |
182 | { | |
183 | CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
184 | ||
185 | if (regno < 0 || regno == SP_REGNUM) | |
186 | { | |
187 | if (!register_valid[L0_REGNUM+5]) abort(); | |
188 | target_xfer_memory (sp, | |
189 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
190 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 1); | |
191 | } | |
192 | else | |
193 | { | |
194 | if (!register_valid[regno]) abort(); | |
195 | target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), | |
196 | ®isters[REGISTER_BYTE (regno)], | |
197 | REGISTER_RAW_SIZE (regno), 1); | |
198 | } | |
199 | ||
200 | } | |
201 | ||
202 | if (wanna_store & INT_REGS) | |
203 | { | |
204 | if (!register_valid[G1_REGNUM]) abort(); | |
205 | ||
206 | bcopy (®isters[REGISTER_BYTE (G1_REGNUM)], | |
207 | &inferior_registers.r_g1, 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
208 | ||
209 | inferior_registers.r_ps = | |
210 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)]; | |
211 | inferior_registers.r_pc = | |
212 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)]; | |
213 | inferior_registers.r_npc = | |
214 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)]; | |
215 | inferior_registers.r_y = | |
216 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)]; | |
217 | ||
218 | if (0 != ptrace (PTRACE_SETREGS, inferior_pid, &inferior_registers)) | |
219 | perror("ptrace_setregs"); | |
220 | } | |
221 | ||
222 | if (wanna_store & FP_REGS) | |
223 | { | |
224 | if (!register_valid[FP0_REGNUM+9]) abort(); | |
225 | bcopy (®isters[REGISTER_BYTE (FP0_REGNUM)], | |
226 | &inferior_fp_registers, | |
227 | sizeof inferior_fp_registers.fpu_fr); | |
228 | ||
229 | /* bcopy (®isters[REGISTER_BYTE (FPS_REGNUM)], | |
230 | &inferior_fp_registers.Fpu_fsr, | |
231 | sizeof (FPU_FSR_TYPE)); | |
232 | ****/ | |
233 | if (0 != | |
234 | ptrace (PTRACE_SETFPREGS, inferior_pid, &inferior_fp_registers)) | |
235 | perror("ptrace_setfpregs"); | |
236 | } | |
237 | return 0; | |
238 | } | |
239 | \f | |
240 | void | |
241 | fetch_core_registers (core_reg_sect, core_reg_size, which) | |
242 | char *core_reg_sect; | |
243 | unsigned core_reg_size; | |
244 | int which; | |
245 | { | |
246 | ||
247 | if (which == 0) { | |
248 | ||
249 | /* Integer registers */ | |
250 | ||
251 | #define gregs ((struct regs *)core_reg_sect) | |
252 | /* G0 *always* holds 0. */ | |
253 | *(int *)®isters[REGISTER_BYTE (0)] = 0; | |
254 | ||
255 | /* The globals and output registers. */ | |
256 | bcopy (&gregs->r_g1, | |
257 | ®isters[REGISTER_BYTE (G1_REGNUM)], | |
258 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
259 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; | |
260 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; | |
261 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; | |
262 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; | |
263 | ||
264 | /* My best guess at where to get the locals and input | |
265 | registers is exactly where they usually are, right above | |
266 | the stack pointer. If the core dump was caused by a bus error | |
267 | from blowing away the stack pointer (as is possible) then this | |
268 | won't work, but it's worth the try. */ | |
269 | { | |
270 | int sp; | |
271 | ||
272 | sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
273 | if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], | |
274 | 16 * REGISTER_RAW_SIZE (L0_REGNUM))) | |
275 | { | |
276 | /* fprintf so user can still use gdb */ | |
277 | fprintf (stderr, | |
278 | "Couldn't read input and local registers from core file\n"); | |
279 | } | |
280 | } | |
281 | } else if (which == 2) { | |
282 | ||
283 | /* Floating point registers */ | |
284 | ||
285 | #define fpuregs ((struct fpu *) core_reg_sect) | |
286 | if (core_reg_size >= sizeof (struct fpu)) | |
287 | { | |
288 | bcopy (fpuregs->fpu_regs, | |
289 | ®isters[REGISTER_BYTE (FP0_REGNUM)], | |
290 | sizeof (fpuregs->fpu_regs)); | |
291 | bcopy (&fpuregs->fpu_fsr, | |
292 | ®isters[REGISTER_BYTE (FPS_REGNUM)], | |
293 | sizeof (FPU_FSR_TYPE)); | |
294 | } | |
295 | else | |
296 | fprintf (stderr, "Couldn't read float regs from core file\n"); | |
297 | } | |
298 | } |