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[deliverable/binutils-gdb.git] / gdb / sparc64-tdep.c
CommitLineData
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1/* Target-dependent code for UltraSPARC.
2
fd936806 3 Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
197e01b6
EZ
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
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21
22#include "defs.h"
23#include "arch-utils.h"
02a71ae8 24#include "dwarf2-frame.h"
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25#include "floatformat.h"
26#include "frame.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbcore.h"
30#include "gdbtypes.h"
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31#include "inferior.h"
32#include "symtab.h"
33#include "objfiles.h"
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34#include "osabi.h"
35#include "regcache.h"
36#include "target.h"
37#include "value.h"
38
39#include "gdb_assert.h"
40#include "gdb_string.h"
41
42#include "sparc64-tdep.h"
43
44/* This file implements the The SPARC 64-bit ABI as defined by the
45 section "Low-Level System Information" of the SPARC Compliance
46 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
47 SPARC. */
48
49/* Please use the sparc32_-prefix for 32-bit specific code, the
50 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
51 code can handle both. */
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52\f
53/* The functions on this page are intended to be used to classify
54 function arguments. */
55
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56/* Check whether TYPE is "Integral or Pointer". */
57
58static int
59sparc64_integral_or_pointer_p (const struct type *type)
60{
61 switch (TYPE_CODE (type))
62 {
63 case TYPE_CODE_INT:
64 case TYPE_CODE_BOOL:
65 case TYPE_CODE_CHAR:
66 case TYPE_CODE_ENUM:
67 case TYPE_CODE_RANGE:
68 {
69 int len = TYPE_LENGTH (type);
70 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
71 }
72 return 1;
73 case TYPE_CODE_PTR:
74 case TYPE_CODE_REF:
75 {
76 int len = TYPE_LENGTH (type);
77 gdb_assert (len == 8);
78 }
79 return 1;
80 default:
81 break;
82 }
83
84 return 0;
85}
86
87/* Check whether TYPE is "Floating". */
88
89static int
90sparc64_floating_p (const struct type *type)
91{
92 switch (TYPE_CODE (type))
93 {
94 case TYPE_CODE_FLT:
95 {
96 int len = TYPE_LENGTH (type);
97 gdb_assert (len == 4 || len == 8 || len == 16);
98 }
99 return 1;
100 default:
101 break;
102 }
103
104 return 0;
105}
106
107/* Check whether TYPE is "Structure or Union". */
108
109static int
110sparc64_structure_or_union_p (const struct type *type)
111{
112 switch (TYPE_CODE (type))
113 {
114 case TYPE_CODE_STRUCT:
115 case TYPE_CODE_UNION:
116 return 1;
117 default:
118 break;
119 }
120
121 return 0;
122}
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123\f
124
125/* Type for %pstate. */
126struct type *sparc64_pstate_type;
127
128/* Type for %fsr. */
129struct type *sparc64_fsr_type;
130
131/* Type for %fprs. */
132struct type *sparc64_fprs_type;
133
134/* Construct types for ISA-specific registers. */
135
136static void
137sparc64_init_types (void)
138{
139 struct type *type;
140
141 type = init_flags_type ("builtin_type_sparc64_pstate", 8);
142 append_flags_type_flag (type, 0, "AG");
143 append_flags_type_flag (type, 1, "IE");
144 append_flags_type_flag (type, 2, "PRIV");
145 append_flags_type_flag (type, 3, "AM");
146 append_flags_type_flag (type, 4, "PEF");
147 append_flags_type_flag (type, 5, "RED");
148 append_flags_type_flag (type, 8, "TLE");
149 append_flags_type_flag (type, 9, "CLE");
150 append_flags_type_flag (type, 10, "PID0");
151 append_flags_type_flag (type, 11, "PID1");
152 sparc64_pstate_type = type;
153
154 type = init_flags_type ("builtin_type_sparc64_fsr", 8);
155 append_flags_type_flag (type, 0, "NXA");
156 append_flags_type_flag (type, 1, "DZA");
157 append_flags_type_flag (type, 2, "UFA");
158 append_flags_type_flag (type, 3, "OFA");
159 append_flags_type_flag (type, 4, "NVA");
160 append_flags_type_flag (type, 5, "NXC");
161 append_flags_type_flag (type, 6, "DZC");
162 append_flags_type_flag (type, 7, "UFC");
163 append_flags_type_flag (type, 8, "OFC");
164 append_flags_type_flag (type, 9, "NVC");
165 append_flags_type_flag (type, 22, "NS");
166 append_flags_type_flag (type, 23, "NXM");
167 append_flags_type_flag (type, 24, "DZM");
168 append_flags_type_flag (type, 25, "UFM");
169 append_flags_type_flag (type, 26, "OFM");
170 append_flags_type_flag (type, 27, "NVM");
171 sparc64_fsr_type = type;
172
173 type = init_flags_type ("builtin_type_sparc64_fprs", 8);
174 append_flags_type_flag (type, 0, "DL");
175 append_flags_type_flag (type, 1, "DU");
176 append_flags_type_flag (type, 2, "FEF");
177 sparc64_fprs_type = type;
178}
8b39fe56 179
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180/* Register information. */
181
182struct sparc64_register_info
183{
184 char *name;
185 struct type **type;
186};
187
188static struct sparc64_register_info sparc64_register_info[] =
189{
190 { "g0", &builtin_type_int64 },
191 { "g1", &builtin_type_int64 },
192 { "g2", &builtin_type_int64 },
193 { "g3", &builtin_type_int64 },
194 { "g4", &builtin_type_int64 },
195 { "g5", &builtin_type_int64 },
196 { "g6", &builtin_type_int64 },
197 { "g7", &builtin_type_int64 },
198
199 { "o0", &builtin_type_int64 },
200 { "o1", &builtin_type_int64 },
201 { "o2", &builtin_type_int64 },
202 { "o3", &builtin_type_int64 },
203 { "o4", &builtin_type_int64 },
204 { "o5", &builtin_type_int64 },
205 { "sp", &builtin_type_void_data_ptr },
206 { "o7", &builtin_type_int64 },
207
208 { "l0", &builtin_type_int64 },
209 { "l1", &builtin_type_int64 },
210 { "l2", &builtin_type_int64 },
211 { "l3", &builtin_type_int64 },
212 { "l4", &builtin_type_int64 },
213 { "l5", &builtin_type_int64 },
214 { "l6", &builtin_type_int64 },
215 { "l7", &builtin_type_int64 },
216
217 { "i0", &builtin_type_int64 },
218 { "i1", &builtin_type_int64 },
219 { "i2", &builtin_type_int64 },
220 { "i3", &builtin_type_int64 },
221 { "i4", &builtin_type_int64 },
222 { "i5", &builtin_type_int64 },
223 { "fp", &builtin_type_void_data_ptr },
224 { "i7", &builtin_type_int64 },
225
226 { "f0", &builtin_type_float },
227 { "f1", &builtin_type_float },
228 { "f2", &builtin_type_float },
229 { "f3", &builtin_type_float },
230 { "f4", &builtin_type_float },
231 { "f5", &builtin_type_float },
232 { "f6", &builtin_type_float },
233 { "f7", &builtin_type_float },
234 { "f8", &builtin_type_float },
235 { "f9", &builtin_type_float },
236 { "f10", &builtin_type_float },
237 { "f11", &builtin_type_float },
238 { "f12", &builtin_type_float },
239 { "f13", &builtin_type_float },
240 { "f14", &builtin_type_float },
241 { "f15", &builtin_type_float },
242 { "f16", &builtin_type_float },
243 { "f17", &builtin_type_float },
244 { "f18", &builtin_type_float },
245 { "f19", &builtin_type_float },
246 { "f20", &builtin_type_float },
247 { "f21", &builtin_type_float },
248 { "f22", &builtin_type_float },
249 { "f23", &builtin_type_float },
250 { "f24", &builtin_type_float },
251 { "f25", &builtin_type_float },
252 { "f26", &builtin_type_float },
253 { "f27", &builtin_type_float },
254 { "f28", &builtin_type_float },
255 { "f29", &builtin_type_float },
256 { "f30", &builtin_type_float },
257 { "f31", &builtin_type_float },
258 { "f32", &builtin_type_double },
259 { "f34", &builtin_type_double },
260 { "f36", &builtin_type_double },
261 { "f38", &builtin_type_double },
262 { "f40", &builtin_type_double },
263 { "f42", &builtin_type_double },
264 { "f44", &builtin_type_double },
265 { "f46", &builtin_type_double },
266 { "f48", &builtin_type_double },
267 { "f50", &builtin_type_double },
268 { "f52", &builtin_type_double },
269 { "f54", &builtin_type_double },
270 { "f56", &builtin_type_double },
271 { "f58", &builtin_type_double },
272 { "f60", &builtin_type_double },
273 { "f62", &builtin_type_double },
274
275 { "pc", &builtin_type_void_func_ptr },
276 { "npc", &builtin_type_void_func_ptr },
277
278 /* This raw register contains the contents of %cwp, %pstate, %asi
279 and %ccr as laid out in a %tstate register. */
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280 /* FIXME: Give it a name until we start using register groups. */
281 { "state", &builtin_type_int64 },
8b39fe56 282
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283 { "fsr", &sparc64_fsr_type },
284 { "fprs", &sparc64_fprs_type },
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285
286 /* "Although Y is a 64-bit register, its high-order 32 bits are
287 reserved and always read as 0." */
288 { "y", &builtin_type_int64 }
289};
290
291/* Total number of registers. */
386c036b 292#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
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293
294/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
295 registers as "psuedo" registers. */
296
297static struct sparc64_register_info sparc64_pseudo_register_info[] =
298{
299 { "cwp", &builtin_type_int64 },
fd936806 300 { "pstate", &sparc64_pstate_type },
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301 { "asi", &builtin_type_int64 },
302 { "ccr", &builtin_type_int64 },
303
304 { "d0", &builtin_type_double },
305 { "d2", &builtin_type_double },
306 { "d4", &builtin_type_double },
307 { "d6", &builtin_type_double },
308 { "d8", &builtin_type_double },
309 { "d10", &builtin_type_double },
310 { "d12", &builtin_type_double },
311 { "d14", &builtin_type_double },
312 { "d16", &builtin_type_double },
313 { "d18", &builtin_type_double },
314 { "d20", &builtin_type_double },
315 { "d22", &builtin_type_double },
316 { "d24", &builtin_type_double },
317 { "d26", &builtin_type_double },
318 { "d28", &builtin_type_double },
319 { "d30", &builtin_type_double },
320 { "d32", &builtin_type_double },
321 { "d34", &builtin_type_double },
322 { "d36", &builtin_type_double },
323 { "d38", &builtin_type_double },
324 { "d40", &builtin_type_double },
325 { "d42", &builtin_type_double },
326 { "d44", &builtin_type_double },
327 { "d46", &builtin_type_double },
328 { "d48", &builtin_type_double },
329 { "d50", &builtin_type_double },
330 { "d52", &builtin_type_double },
331 { "d54", &builtin_type_double },
332 { "d56", &builtin_type_double },
333 { "d58", &builtin_type_double },
334 { "d60", &builtin_type_double },
335 { "d62", &builtin_type_double },
336
337 { "q0", &builtin_type_long_double },
338 { "q4", &builtin_type_long_double },
339 { "q8", &builtin_type_long_double },
340 { "q12", &builtin_type_long_double },
341 { "q16", &builtin_type_long_double },
342 { "q20", &builtin_type_long_double },
343 { "q24", &builtin_type_long_double },
344 { "q28", &builtin_type_long_double },
345 { "q32", &builtin_type_long_double },
346 { "q36", &builtin_type_long_double },
347 { "q40", &builtin_type_long_double },
348 { "q44", &builtin_type_long_double },
349 { "q48", &builtin_type_long_double },
350 { "q52", &builtin_type_long_double },
351 { "q56", &builtin_type_long_double },
352 { "q60", &builtin_type_long_double }
353};
354
355/* Total number of pseudo registers. */
386c036b 356#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
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357
358/* Return the name of register REGNUM. */
359
360static const char *
361sparc64_register_name (int regnum)
362{
363 if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
364 return sparc64_register_info[regnum].name;
365
366 if (regnum >= SPARC64_NUM_REGS
367 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
368 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
369
370 return NULL;
371}
372
373/* Return the GDB type object for the "standard" data type of data in
374 register REGNUM. */
375
376static struct type *
377sparc64_register_type (struct gdbarch *gdbarch, int regnum)
378{
379 if (regnum >= SPARC64_NUM_REGS
380 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
381 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
382
383 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
384 return *sparc64_register_info[regnum].type;
385}
386
387static void
388sparc64_pseudo_register_read (struct gdbarch *gdbarch,
389 struct regcache *regcache,
e1613aba 390 int regnum, gdb_byte *buf)
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391{
392 gdb_assert (regnum >= SPARC64_NUM_REGS);
393
394 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
395 {
396 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
397 regcache_raw_read (regcache, regnum, buf);
e1613aba 398 regcache_raw_read (regcache, regnum + 1, buf + 4);
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399 }
400 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
401 {
402 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
403 regcache_raw_read (regcache, regnum, buf);
404 }
405 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
406 {
407 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
408 regcache_raw_read (regcache, regnum, buf);
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409 regcache_raw_read (regcache, regnum + 1, buf + 4);
410 regcache_raw_read (regcache, regnum + 2, buf + 8);
411 regcache_raw_read (regcache, regnum + 3, buf + 12);
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412 }
413 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
414 {
415 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
416 regcache_raw_read (regcache, regnum, buf);
e1613aba 417 regcache_raw_read (regcache, regnum + 1, buf + 8);
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418 }
419 else if (regnum == SPARC64_CWP_REGNUM
420 || regnum == SPARC64_PSTATE_REGNUM
421 || regnum == SPARC64_ASI_REGNUM
422 || regnum == SPARC64_CCR_REGNUM)
423 {
424 ULONGEST state;
425
426 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
427 switch (regnum)
428 {
3567a8ea 429 case SPARC64_CWP_REGNUM:
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430 state = (state >> 0) & ((1 << 5) - 1);
431 break;
3567a8ea 432 case SPARC64_PSTATE_REGNUM:
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433 state = (state >> 8) & ((1 << 12) - 1);
434 break;
3567a8ea 435 case SPARC64_ASI_REGNUM:
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436 state = (state >> 24) & ((1 << 8) - 1);
437 break;
3567a8ea 438 case SPARC64_CCR_REGNUM:
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439 state = (state >> 32) & ((1 << 8) - 1);
440 break;
441 }
442 store_unsigned_integer (buf, 8, state);
443 }
444}
445
446static void
447sparc64_pseudo_register_write (struct gdbarch *gdbarch,
448 struct regcache *regcache,
e1613aba 449 int regnum, const gdb_byte *buf)
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450{
451 gdb_assert (regnum >= SPARC64_NUM_REGS);
452
453 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
454 {
455 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
456 regcache_raw_write (regcache, regnum, buf);
e1613aba 457 regcache_raw_write (regcache, regnum + 1, buf + 4);
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458 }
459 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
460 {
461 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
462 regcache_raw_write (regcache, regnum, buf);
463 }
464 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
465 {
466 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
467 regcache_raw_write (regcache, regnum, buf);
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468 regcache_raw_write (regcache, regnum + 1, buf + 4);
469 regcache_raw_write (regcache, regnum + 2, buf + 8);
470 regcache_raw_write (regcache, regnum + 3, buf + 12);
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471 }
472 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
473 {
474 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
475 regcache_raw_write (regcache, regnum, buf);
e1613aba 476 regcache_raw_write (regcache, regnum + 1, buf + 8);
8b39fe56 477 }
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478 else if (regnum == SPARC64_CWP_REGNUM
479 || regnum == SPARC64_PSTATE_REGNUM
480 || regnum == SPARC64_ASI_REGNUM
481 || regnum == SPARC64_CCR_REGNUM)
482 {
483 ULONGEST state, bits;
484
485 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
486 bits = extract_unsigned_integer (buf, 8);
487 switch (regnum)
488 {
489 case SPARC64_CWP_REGNUM:
490 state |= ((bits & ((1 << 5) - 1)) << 0);
491 break;
492 case SPARC64_PSTATE_REGNUM:
493 state |= ((bits & ((1 << 12) - 1)) << 8);
494 break;
495 case SPARC64_ASI_REGNUM:
496 state |= ((bits & ((1 << 8) - 1)) << 24);
497 break;
498 case SPARC64_CCR_REGNUM:
499 state |= ((bits & ((1 << 8) - 1)) << 32);
500 break;
501 }
502 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
503 }
8b39fe56 504}
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505\f
506
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507/* Return PC of first real instruction of the function starting at
508 START_PC. */
509
510static CORE_ADDR
511sparc64_skip_prologue (CORE_ADDR start_pc)
512{
513 struct symtab_and_line sal;
514 CORE_ADDR func_start, func_end;
386c036b 515 struct sparc_frame_cache cache;
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516
517 /* This is the preferred method, find the end of the prologue by
518 using the debugging information. */
519 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
520 {
521 sal = find_pc_line (func_start, 0);
522
523 if (sal.end < func_end
524 && start_pc <= sal.end)
525 return sal.end;
526 }
527
386c036b 528 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
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529}
530
531/* Normal frames. */
532
386c036b 533static struct sparc_frame_cache *
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534sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
535{
386c036b 536 return sparc_frame_cache (next_frame, this_cache);
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537}
538
539static void
540sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
541 struct frame_id *this_id)
542{
386c036b 543 struct sparc_frame_cache *cache =
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544 sparc64_frame_cache (next_frame, this_cache);
545
546 /* This marks the outermost frame. */
547 if (cache->base == 0)
548 return;
549
550 (*this_id) = frame_id_build (cache->base, cache->pc);
551}
552
553static void
554sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
555 int regnum, int *optimizedp,
556 enum lval_type *lvalp, CORE_ADDR *addrp,
47ef841b 557 int *realnump, gdb_byte *valuep)
8b39fe56 558{
386c036b 559 struct sparc_frame_cache *cache =
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560 sparc64_frame_cache (next_frame, this_cache);
561
562 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
563 {
564 *optimizedp = 0;
565 *lvalp = not_lval;
566 *addrp = 0;
567 *realnump = -1;
568 if (valuep)
569 {
570 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
571
572 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
573 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
574 store_unsigned_integer (valuep, 8, pc);
575 }
576 return;
577 }
578
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579 /* Handle StackGhost. */
580 {
581 ULONGEST wcookie = sparc_fetch_wcookie ();
582
583 if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM)
584 {
585 *optimizedp = 0;
586 *lvalp = not_lval;
587 *addrp = 0;
588 *realnump = -1;
589 if (valuep)
590 {
591 CORE_ADDR addr = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
592 ULONGEST i7;
593
594 /* Read the value in from memory. */
595 i7 = get_frame_memory_unsigned (next_frame, addr, 8);
596 store_unsigned_integer (valuep, 8, i7 ^ wcookie);
597 }
598 return;
599 }
600 }
601
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602 /* The previous frame's `local' and `in' registers have been saved
603 in the register save area. */
604 if (!cache->frameless_p
605 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
606 {
607 *optimizedp = 0;
608 *lvalp = lval_memory;
5b2d44a0 609 *addrp = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
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610 *realnump = -1;
611 if (valuep)
612 {
613 struct gdbarch *gdbarch = get_frame_arch (next_frame);
614
615 /* Read the value in from memory. */
616 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
617 }
618 return;
619 }
620
621 /* The previous frame's `out' registers are accessable as the
622 current frame's `in' registers. */
623 if (!cache->frameless_p
624 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
625 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
626
00b25ff3
AC
627 *optimizedp = 0;
628 *lvalp = lval_register;
629 *addrp = 0;
630 *realnump = regnum;
631 if (valuep)
632 frame_unwind_register (next_frame, regnum, valuep);
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633}
634
635static const struct frame_unwind sparc64_frame_unwind =
636{
637 NORMAL_FRAME,
638 sparc64_frame_this_id,
639 sparc64_frame_prev_register
640};
641
642static const struct frame_unwind *
643sparc64_frame_sniffer (struct frame_info *next_frame)
644{
645 return &sparc64_frame_unwind;
646}
647\f
648
649static CORE_ADDR
650sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
651{
386c036b 652 struct sparc_frame_cache *cache =
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653 sparc64_frame_cache (next_frame, this_cache);
654
5b2d44a0 655 return cache->base;
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656}
657
658static const struct frame_base sparc64_frame_base =
659{
660 &sparc64_frame_unwind,
661 sparc64_frame_base_address,
662 sparc64_frame_base_address,
663 sparc64_frame_base_address
664};
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665\f
666/* Check whether TYPE must be 16-byte aligned. */
667
668static int
669sparc64_16_byte_align_p (struct type *type)
670{
671 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
672 return 1;
673
674 if (sparc64_structure_or_union_p (type))
675 {
676 int i;
677
678 for (i = 0; i < TYPE_NFIELDS (type); i++)
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679 {
680 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
681
682 if (sparc64_16_byte_align_p (subtype))
683 return 1;
684 }
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685 }
686
687 return 0;
688}
689
690/* Store floating fields of element ELEMENT of an "parameter array"
691 that has type TYPE and is stored at BITPOS in VALBUF in the
692 apropriate registers of REGCACHE. This function can be called
693 recursively and therefore handles floating types in addition to
694 structures. */
695
696static void
697sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
e1613aba 698 const gdb_byte *valbuf, int element, int bitpos)
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699{
700 gdb_assert (element < 16);
701
702 if (sparc64_floating_p (type))
703 {
704 int len = TYPE_LENGTH (type);
705 int regnum;
706
707 if (len == 16)
708 {
709 gdb_assert (bitpos == 0);
710 gdb_assert ((element % 2) == 0);
711
712 regnum = SPARC64_Q0_REGNUM + element / 2;
713 regcache_cooked_write (regcache, regnum, valbuf);
714 }
715 else if (len == 8)
716 {
717 gdb_assert (bitpos == 0 || bitpos == 64);
718
719 regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
720 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
721 }
722 else
723 {
724 gdb_assert (len == 4);
725 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
726
727 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
728 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
729 }
730 }
731 else if (sparc64_structure_or_union_p (type))
732 {
733 int i;
734
735 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
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736 {
737 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
738 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
739
740 sparc64_store_floating_fields (regcache, subtype, valbuf,
741 element, subpos);
742 }
200cc553
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743
744 /* GCC has an interesting bug. If TYPE is a structure that has
745 a single `float' member, GCC doesn't treat it as a structure
746 at all, but rather as an ordinary `float' argument. This
747 argument will be stored in %f1, as required by the psABI.
748 However, as a member of a structure the psABI requires it to
5154b0cd
MK
749 be stored in %f0. This bug is present in GCC 3.3.2, but
750 probably in older releases to. To appease GCC, if a
751 structure has only a single `float' member, we store its
752 value in %f1 too (we already have stored in %f0). */
200cc553
MK
753 if (TYPE_NFIELDS (type) == 1)
754 {
755 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
756
757 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
758 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
759 }
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760 }
761}
762
763/* Fetch floating fields from a variable of type TYPE from the
764 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
765 in VALBUF. This function can be called recursively and therefore
766 handles floating types in addition to structures. */
767
768static void
769sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
e1613aba 770 gdb_byte *valbuf, int bitpos)
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771{
772 if (sparc64_floating_p (type))
773 {
774 int len = TYPE_LENGTH (type);
775 int regnum;
776
777 if (len == 16)
778 {
779 gdb_assert (bitpos == 0 || bitpos == 128);
780
781 regnum = SPARC64_Q0_REGNUM + bitpos / 128;
782 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
783 }
784 else if (len == 8)
785 {
786 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
787
788 regnum = SPARC64_D0_REGNUM + bitpos / 64;
789 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
790 }
791 else
792 {
793 gdb_assert (len == 4);
794 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
795
796 regnum = SPARC_F0_REGNUM + bitpos / 32;
797 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
798 }
799 }
800 else if (sparc64_structure_or_union_p (type))
801 {
802 int i;
803
804 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
805 {
806 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
807 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
808
809 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
810 }
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811 }
812}
813
814/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
815 non-zero) in REGCACHE and on the stack (starting from address SP). */
816
817static CORE_ADDR
818sparc64_store_arguments (struct regcache *regcache, int nargs,
819 struct value **args, CORE_ADDR sp,
820 int struct_return, CORE_ADDR struct_addr)
821{
822 /* Number of extended words in the "parameter array". */
823 int num_elements = 0;
824 int element = 0;
825 int i;
826
827 /* Take BIAS into account. */
828 sp += BIAS;
829
830 /* First we calculate the number of extended words in the "parameter
831 array". While doing so we also convert some of the arguments. */
832
833 if (struct_return)
834 num_elements++;
835
836 for (i = 0; i < nargs; i++)
837 {
4991999e 838 struct type *type = value_type (args[i]);
8b39fe56
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839 int len = TYPE_LENGTH (type);
840
841 if (sparc64_structure_or_union_p (type))
842 {
843 /* Structure or Union arguments. */
844 if (len <= 16)
845 {
846 if (num_elements % 2 && sparc64_16_byte_align_p (type))
847 num_elements++;
848 num_elements += ((len + 7) / 8);
849 }
850 else
851 {
852 /* The psABI says that "Structures or unions larger than
853 sixteen bytes are copied by the caller and passed
854 indirectly; the caller will pass the address of a
855 correctly aligned structure value. This sixty-four
856 bit address will occupy one word in the parameter
857 array, and may be promoted to an %o register like any
858 other pointer value." Allocate memory for these
859 values on the stack. */
860 sp -= len;
861
862 /* Use 16-byte alignment for these values. That's
863 always correct, and wasting a few bytes shouldn't be
864 a problem. */
865 sp &= ~0xf;
866
0fd88904 867 write_memory (sp, value_contents (args[i]), len);
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MK
868 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
869 num_elements++;
870 }
871 }
872 else if (sparc64_floating_p (type))
873 {
874 /* Floating arguments. */
875
876 if (len == 16)
877 {
878 /* The psABI says that "Each quad-precision parameter
879 value will be assigned to two extended words in the
880 parameter array. */
881 num_elements += 2;
882
883 /* The psABI says that "Long doubles must be
884 quad-aligned, and thus a hole might be introduced
885 into the parameter array to force alignment." Skip
886 an element if necessary. */
887 if (num_elements % 2)
888 num_elements++;
889 }
890 else
891 num_elements++;
892 }
893 else
894 {
895 /* Integral and pointer arguments. */
896 gdb_assert (sparc64_integral_or_pointer_p (type));
897
898 /* The psABI says that "Each argument value of integral type
899 smaller than an extended word will be widened by the
900 caller to an extended word according to the signed-ness
901 of the argument type." */
902 if (len < 8)
903 args[i] = value_cast (builtin_type_int64, args[i]);
904 num_elements++;
905 }
906 }
907
908 /* Allocate the "parameter array". */
909 sp -= num_elements * 8;
910
911 /* The psABI says that "Every stack frame must be 16-byte aligned." */
912 sp &= ~0xf;
913
914 /* Now we store the arguments in to the "paramater array". Some
915 Integer or Pointer arguments and Structure or Union arguments
916 will be passed in %o registers. Some Floating arguments and
917 floating members of structures are passed in floating-point
918 registers. However, for functions with variable arguments,
919 floating arguments are stored in an %0 register, and for
920 functions without a prototype floating arguments are stored in
921 both a floating-point and an %o registers, or a floating-point
922 register and memory. To simplify the logic here we always pass
923 arguments in memory, an %o register, and a floating-point
924 register if appropriate. This should be no problem since the
925 contents of any unused memory or registers in the "parameter
926 array" are undefined. */
927
928 if (struct_return)
929 {
930 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
931 element++;
932 }
933
934 for (i = 0; i < nargs; i++)
935 {
e1613aba 936 const gdb_byte *valbuf = value_contents (args[i]);
4991999e 937 struct type *type = value_type (args[i]);
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938 int len = TYPE_LENGTH (type);
939 int regnum = -1;
e1613aba 940 gdb_byte buf[16];
8b39fe56
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941
942 if (sparc64_structure_or_union_p (type))
943 {
944 /* Structure or Union arguments. */
945 gdb_assert (len <= 16);
946 memset (buf, 0, sizeof (buf));
947 valbuf = memcpy (buf, valbuf, len);
948
949 if (element % 2 && sparc64_16_byte_align_p (type))
950 element++;
951
952 if (element < 6)
953 {
954 regnum = SPARC_O0_REGNUM + element;
955 if (len > 8 && element < 5)
956 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
957 }
958
959 if (element < 16)
960 sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
961 }
962 else if (sparc64_floating_p (type))
963 {
964 /* Floating arguments. */
965 if (len == 16)
966 {
967 if (element % 2)
968 element++;
969 if (element < 16)
970 regnum = SPARC64_Q0_REGNUM + element / 2;
971 }
972 else if (len == 8)
973 {
974 if (element < 16)
975 regnum = SPARC64_D0_REGNUM + element;
976 }
977 else
978 {
979 /* The psABI says "Each single-precision parameter value
980 will be assigned to one extended word in the
981 parameter array, and right-justified within that
982 word; the left half (even floatregister) is
983 undefined." Even though the psABI says that "the
984 left half is undefined", set it to zero here. */
985 memset (buf, 0, 4);
8ada74e3
MK
986 memcpy (buf + 4, valbuf, 4);
987 valbuf = buf;
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988 len = 8;
989 if (element < 16)
8ada74e3 990 regnum = SPARC64_D0_REGNUM + element;
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991 }
992 }
993 else
994 {
995 /* Integral and pointer arguments. */
996 gdb_assert (len == 8);
997 if (element < 6)
998 regnum = SPARC_O0_REGNUM + element;
999 }
1000
1001 if (regnum != -1)
1002 {
1003 regcache_cooked_write (regcache, regnum, valbuf);
1004
1005 /* If we're storing the value in a floating-point register,
1006 also store it in the corresponding %0 register(s). */
1007 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
1008 {
1009 gdb_assert (element < 6);
1010 regnum = SPARC_O0_REGNUM + element;
1011 regcache_cooked_write (regcache, regnum, valbuf);
1012 }
1013 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
1014 {
1015 gdb_assert (element < 6);
1016 regnum = SPARC_O0_REGNUM + element;
1017 regcache_cooked_write (regcache, regnum, valbuf);
d47079be 1018 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
8b39fe56
MK
1019 }
1020 }
1021
c4f2d4d7 1022 /* Always store the argument in memory. */
8b39fe56
MK
1023 write_memory (sp + element * 8, valbuf, len);
1024 element += ((len + 7) / 8);
1025 }
1026
1027 gdb_assert (element == num_elements);
1028
1029 /* Take BIAS into account. */
1030 sp -= BIAS;
1031 return sp;
1032}
1033
1034static CORE_ADDR
7d9b040b 1035sparc64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8b39fe56
MK
1036 struct regcache *regcache, CORE_ADDR bp_addr,
1037 int nargs, struct value **args, CORE_ADDR sp,
1038 int struct_return, CORE_ADDR struct_addr)
1039{
1040 /* Set return address. */
1041 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
1042
1043 /* Set up function arguments. */
1044 sp = sparc64_store_arguments (regcache, nargs, args, sp,
1045 struct_return, struct_addr);
1046
1047 /* Allocate the register save area. */
1048 sp -= 16 * 8;
1049
1050 /* Stack should be 16-byte aligned at this point. */
3567a8ea 1051 gdb_assert ((sp + BIAS) % 16 == 0);
8b39fe56
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1052
1053 /* Finally, update the stack pointer. */
1054 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
1055
5b2d44a0 1056 return sp + BIAS;
8b39fe56
MK
1057}
1058\f
1059
1060/* Extract from an array REGBUF containing the (raw) register state, a
1061 function return value of TYPE, and copy that into VALBUF. */
1062
1063static void
1064sparc64_extract_return_value (struct type *type, struct regcache *regcache,
e1613aba 1065 gdb_byte *valbuf)
8b39fe56
MK
1066{
1067 int len = TYPE_LENGTH (type);
e1613aba 1068 gdb_byte buf[32];
8b39fe56
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1069 int i;
1070
1071 if (sparc64_structure_or_union_p (type))
1072 {
1073 /* Structure or Union return values. */
1074 gdb_assert (len <= 32);
1075
1076 for (i = 0; i < ((len + 7) / 8); i++)
1077 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1078 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1079 sparc64_extract_floating_fields (regcache, type, buf, 0);
1080 memcpy (valbuf, buf, len);
1081 }
1082 else if (sparc64_floating_p (type))
1083 {
1084 /* Floating return values. */
1085 for (i = 0; i < len / 4; i++)
1086 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1087 memcpy (valbuf, buf, len);
1088 }
1089 else
1090 {
1091 /* Integral and pointer return values. */
1092 gdb_assert (sparc64_integral_or_pointer_p (type));
1093
1094 /* Just stripping off any unused bytes should preserve the
1095 signed-ness just fine. */
1096 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1097 memcpy (valbuf, buf + 8 - len, len);
1098 }
1099}
1100
1101/* Write into the appropriate registers a function return value stored
1102 in VALBUF of type TYPE. */
1103
1104static void
1105sparc64_store_return_value (struct type *type, struct regcache *regcache,
e1613aba 1106 const gdb_byte *valbuf)
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1107{
1108 int len = TYPE_LENGTH (type);
e1613aba 1109 gdb_byte buf[16];
8b39fe56
MK
1110 int i;
1111
1112 if (sparc64_structure_or_union_p (type))
1113 {
1114 /* Structure or Union return values. */
1115 gdb_assert (len <= 32);
1116
1117 /* Simplify matters by storing the complete value (including
1118 floating members) into %o0 and %o1. Floating members are
1119 also store in the appropriate floating-point registers. */
1120 memset (buf, 0, sizeof (buf));
1121 memcpy (buf, valbuf, len);
1122 for (i = 0; i < ((len + 7) / 8); i++)
60af1db2 1123 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
8b39fe56
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1124 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1125 sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1126 }
1127 else if (sparc64_floating_p (type))
1128 {
1129 /* Floating return values. */
1130 memcpy (buf, valbuf, len);
1131 for (i = 0; i < len / 4; i++)
1132 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1133 }
1134 else
1135 {
1136 /* Integral and pointer return values. */
1137 gdb_assert (sparc64_integral_or_pointer_p (type));
1138
1139 /* ??? Do we need to do any sign-extension here? */
1140 memset (buf, 0, 8);
1141 memcpy (buf + 8 - len, valbuf, len);
1142 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1143 }
1144}
1145
60af1db2
MK
1146static enum return_value_convention
1147sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
e1613aba
MK
1148 struct regcache *regcache, gdb_byte *readbuf,
1149 const gdb_byte *writebuf)
8b39fe56 1150{
60af1db2
MK
1151 if (TYPE_LENGTH (type) > 32)
1152 return RETURN_VALUE_STRUCT_CONVENTION;
1153
1154 if (readbuf)
1155 sparc64_extract_return_value (type, regcache, readbuf);
1156 if (writebuf)
1157 sparc64_store_return_value (type, regcache, writebuf);
1158
1159 return RETURN_VALUE_REGISTER_CONVENTION;
8b39fe56 1160}
8b39fe56 1161\f
8b39fe56 1162
02a71ae8
MK
1163static void
1164sparc64_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1
DM
1165 struct dwarf2_frame_state_reg *reg,
1166 struct frame_info *next_frame)
02a71ae8
MK
1167{
1168 switch (regnum)
1169 {
1170 case SPARC_G0_REGNUM:
1171 /* Since %g0 is always zero, there is no point in saving it, and
1172 people will be inclined omit it from the CFI. Make sure we
1173 don't warn about that. */
1174 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
1175 break;
1176 case SPARC_SP_REGNUM:
1177 reg->how = DWARF2_FRAME_REG_CFA;
1178 break;
1179 case SPARC64_PC_REGNUM:
1180 reg->how = DWARF2_FRAME_REG_RA_OFFSET;
1181 reg->loc.offset = 8;
1182 break;
1183 case SPARC64_NPC_REGNUM:
1184 reg->how = DWARF2_FRAME_REG_RA_OFFSET;
1185 reg->loc.offset = 12;
1186 break;
1187 }
1188}
1189
8b39fe56 1190void
386c036b 1191sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
8b39fe56 1192{
386c036b 1193 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8b39fe56 1194
386c036b
MK
1195 tdep->pc_regnum = SPARC64_PC_REGNUM;
1196 tdep->npc_regnum = SPARC64_NPC_REGNUM;
8b39fe56 1197
386c036b 1198 /* This is what all the fuss is about. */
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MK
1199 set_gdbarch_long_bit (gdbarch, 64);
1200 set_gdbarch_long_long_bit (gdbarch, 64);
1201 set_gdbarch_ptr_bit (gdbarch, 64);
8b39fe56
MK
1202
1203 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1204 set_gdbarch_register_name (gdbarch, sparc64_register_name);
1205 set_gdbarch_register_type (gdbarch, sparc64_register_type);
1206 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1207 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1208 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1209
1210 /* Register numbers of various important registers. */
8b39fe56 1211 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
8b39fe56
MK
1212
1213 /* Call dummy code. */
386c036b
MK
1214 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1215 set_gdbarch_push_dummy_code (gdbarch, NULL);
8b39fe56
MK
1216 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1217
60af1db2 1218 set_gdbarch_return_value (gdbarch, sparc64_return_value);
386c036b
MK
1219 set_gdbarch_stabs_argument_has_addr
1220 (gdbarch, default_stabs_argument_has_addr);
8b39fe56
MK
1221
1222 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1223
02a71ae8
MK
1224 /* Hook in the DWARF CFI frame unwinder. */
1225 dwarf2_frame_set_init_reg (gdbarch, sparc64_dwarf2_frame_init_reg);
1226 /* FIXME: kettenis/20050423: Don't enable the unwinder until the
1227 StackGhost issues have been resolved. */
1228
386c036b 1229 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
8b39fe56 1230 frame_base_set_default (gdbarch, &sparc64_frame_base);
386c036b
MK
1231}
1232\f
8b39fe56 1233
386c036b 1234/* Helper functions for dealing with register sets. */
8b39fe56 1235
386c036b
MK
1236#define TSTATE_CWP 0x000000000000001fULL
1237#define TSTATE_ICC 0x0000000f00000000ULL
1238#define TSTATE_XCC 0x000000f000000000ULL
8b39fe56 1239
386c036b
MK
1240#define PSR_S 0x00000080
1241#define PSR_ICC 0x00f00000
1242#define PSR_VERS 0x0f000000
1243#define PSR_IMPL 0xf0000000
1244#define PSR_V8PLUS 0xff000000
1245#define PSR_XCC 0x000f0000
8b39fe56 1246
3567a8ea 1247void
386c036b
MK
1248sparc64_supply_gregset (const struct sparc_gregset *gregset,
1249 struct regcache *regcache,
1250 int regnum, const void *gregs)
8b39fe56 1251{
386c036b 1252 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1253 const gdb_byte *regs = gregs;
8b39fe56
MK
1254 int i;
1255
386c036b 1256 if (sparc32)
8b39fe56 1257 {
386c036b
MK
1258 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1259 {
1260 int offset = gregset->r_tstate_offset;
1261 ULONGEST tstate, psr;
e1613aba 1262 gdb_byte buf[4];
386c036b
MK
1263
1264 tstate = extract_unsigned_integer (regs + offset, 8);
1265 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1266 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1267 store_unsigned_integer (buf, 4, psr);
1268 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1269 }
1270
1271 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1272 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1273 regs + gregset->r_pc_offset + 4);
1274
1275 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1276 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1277 regs + gregset->r_npc_offset + 4);
8b39fe56 1278
386c036b 1279 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1280 {
386c036b
MK
1281 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1282 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK
1283 }
1284 }
1285 else
1286 {
386c036b
MK
1287 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1288 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1289 regs + gregset->r_tstate_offset);
8b39fe56 1290
386c036b
MK
1291 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1292 regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1293 regs + gregset->r_pc_offset);
1294
1295 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1296 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1297 regs + gregset->r_npc_offset);
1298
1299 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1300 {
e1613aba 1301 gdb_byte buf[8];
386c036b
MK
1302
1303 memset (buf, 0, 8);
1304 memcpy (buf + 8 - gregset->r_y_size,
1305 regs + gregset->r_y_offset, gregset->r_y_size);
1306 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
3567a8ea 1307 }
8b39fe56 1308
386c036b
MK
1309 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1310 && gregset->r_fprs_offset != -1)
1311 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1312 regs + gregset->r_fprs_offset);
1313 }
1314
1315 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1316 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1317
1318 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1319 {
1320 int offset = gregset->r_g1_offset;
1321
1322 if (sparc32)
1323 offset += 4;
1324
1325 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
8b39fe56 1326 {
3567a8ea 1327 if (regnum == i || regnum == -1)
386c036b
MK
1328 regcache_raw_supply (regcache, i, regs + offset);
1329 offset += 8;
1330 }
1331 }
1332
1333 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1334 {
1335 /* Not all of the register set variants include Locals and
1336 Inputs. For those that don't, we read them off the stack. */
1337 if (gregset->r_l0_offset == -1)
1338 {
1339 ULONGEST sp;
1340
1341 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1342 sparc_supply_rwindow (regcache, sp, regnum);
1343 }
1344 else
1345 {
1346 int offset = gregset->r_l0_offset;
1347
1348 if (sparc32)
1349 offset += 4;
1350
1351 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1352 {
386c036b
MK
1353 if (regnum == i || regnum == -1)
1354 regcache_raw_supply (regcache, i, regs + offset);
1355 offset += 8;
3567a8ea 1356 }
8b39fe56
MK
1357 }
1358 }
1359}
1360
1361void
386c036b
MK
1362sparc64_collect_gregset (const struct sparc_gregset *gregset,
1363 const struct regcache *regcache,
1364 int regnum, void *gregs)
8b39fe56 1365{
386c036b 1366 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1367 gdb_byte *regs = gregs;
3567a8ea
MK
1368 int i;
1369
386c036b 1370 if (sparc32)
8b39fe56 1371 {
386c036b
MK
1372 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1373 {
1374 int offset = gregset->r_tstate_offset;
1375 ULONGEST tstate, psr;
e1613aba 1376 gdb_byte buf[8];
386c036b
MK
1377
1378 tstate = extract_unsigned_integer (regs + offset, 8);
1379 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1380 psr = extract_unsigned_integer (buf, 4);
1381 tstate |= (psr & PSR_ICC) << 12;
1382 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1383 tstate |= (psr & PSR_XCC) << 20;
1384 store_unsigned_integer (buf, 8, tstate);
1385 memcpy (regs + offset, buf, 8);
1386 }
8b39fe56 1387
386c036b
MK
1388 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1389 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1390 regs + gregset->r_pc_offset + 4);
1391
1392 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1393 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1394 regs + gregset->r_npc_offset + 4);
1395
1396 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1397 {
386c036b
MK
1398 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1399 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK
1400 }
1401 }
1402 else
1403 {
386c036b
MK
1404 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1405 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1406 regs + gregset->r_tstate_offset);
1407
1408 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1409 regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1410 regs + gregset->r_pc_offset);
3567a8ea 1411
386c036b
MK
1412 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1413 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1414 regs + gregset->r_npc_offset);
3567a8ea 1415
386c036b 1416 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1417 {
e1613aba 1418 gdb_byte buf[8];
386c036b
MK
1419
1420 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1421 memcpy (regs + gregset->r_y_offset,
1422 buf + 8 - gregset->r_y_size, gregset->r_y_size);
1423 }
1424
1425 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1426 && gregset->r_fprs_offset != -1)
1427 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1428 regs + gregset->r_fprs_offset);
1429
1430 }
1431
1432 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1433 {
1434 int offset = gregset->r_g1_offset;
1435
1436 if (sparc32)
1437 offset += 4;
1438
1439 /* %g0 is always zero. */
1440 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1441 {
1442 if (regnum == i || regnum == -1)
1443 regcache_raw_collect (regcache, i, regs + offset);
1444 offset += 8;
1445 }
1446 }
1447
1448 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1449 {
1450 /* Not all of the register set variants include Locals and
1451 Inputs. For those that don't, we read them off the stack. */
1452 if (gregset->r_l0_offset != -1)
1453 {
1454 int offset = gregset->r_l0_offset;
1455
1456 if (sparc32)
1457 offset += 4;
1458
1459 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1460 {
386c036b
MK
1461 if (regnum == i || regnum == -1)
1462 regcache_raw_collect (regcache, i, regs + offset);
1463 offset += 8;
3567a8ea
MK
1464 }
1465 }
8b39fe56
MK
1466 }
1467}
8b39fe56 1468
386c036b
MK
1469void
1470sparc64_supply_fpregset (struct regcache *regcache,
1471 int regnum, const void *fpregs)
1472{
1473 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1474 const gdb_byte *regs = fpregs;
386c036b
MK
1475 int i;
1476
1477 for (i = 0; i < 32; i++)
1478 {
1479 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1480 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1481 }
1482
1483 if (sparc32)
1484 {
1485 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1486 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1487 regs + (32 * 4) + (16 * 8) + 4);
1488 }
1489 else
1490 {
1491 for (i = 0; i < 16; i++)
1492 {
1493 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1494 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1495 regs + (32 * 4) + (i * 8));
1496 }
1497
1498 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1499 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1500 regs + (32 * 4) + (16 * 8));
1501 }
1502}
8b39fe56
MK
1503
1504void
386c036b
MK
1505sparc64_collect_fpregset (const struct regcache *regcache,
1506 int regnum, void *fpregs)
8b39fe56 1507{
386c036b 1508 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1509 gdb_byte *regs = fpregs;
386c036b
MK
1510 int i;
1511
1512 for (i = 0; i < 32; i++)
1513 {
1514 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1515 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1516 }
1517
1518 if (sparc32)
1519 {
1520 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1521 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1522 regs + (32 * 4) + (16 * 8) + 4);
1523 }
1524 else
1525 {
1526 for (i = 0; i < 16; i++)
1527 {
1528 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1529 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1530 regs + (32 * 4) + (i * 8));
1531 }
1532
1533 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1534 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1535 regs + (32 * 4) + (16 * 8));
1536 }
8b39fe56 1537}
fd936806
MK
1538
1539
1540/* Provide a prototype to silence -Wmissing-prototypes. */
1541void _initialize_sparc64_tdep (void);
1542
1543void
1544_initialize_sparc64_tdep (void)
1545{
1546 /* Initialize the UltraSPARC-specific register types. */
1547 sparc64_init_types();
1548}
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