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2004-03-17 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / gdb / sparc64-tdep.c
CommitLineData
8b39fe56
MK		 1/* Target-dependent code for UltraSPARC.
2
386c036b 3 Copyright 2003, 2004 Free Software Foundation, Inc.
8b39fe56
MK		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "floatformat.h"
25#include "frame.h"
26#include "frame-base.h"
27#include "frame-unwind.h"
28#include "gdbcore.h"
29#include "gdbtypes.h"
386c036b
MK		 30#include "inferior.h"
31#include "symtab.h"
32#include "objfiles.h"
8b39fe56
MK		 33#include "osabi.h"
34#include "regcache.h"
35#include "target.h"
36#include "value.h"
37
38#include "gdb_assert.h"
39#include "gdb_string.h"
40
41#include "sparc64-tdep.h"
42
43/* This file implements the The SPARC 64-bit ABI as defined by the
44 section "Low-Level System Information" of the SPARC Compliance
45 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
46 SPARC. */
47
48/* Please use the sparc32_-prefix for 32-bit specific code, the
49 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50 code can handle both. */
8b39fe56
MK		 51\f
52/* The functions on this page are intended to be used to classify
53 function arguments. */
54
55/* Return the contents if register REGNUM as an address. */
56
57static CORE_ADDR
58sparc_address_from_register (int regnum)
59{
60 ULONGEST addr;
61
62 regcache_cooked_read_unsigned (current_regcache, regnum, &addr);
63 return addr;
64}
65
66/* Check whether TYPE is "Integral or Pointer". */
67
68static int
69sparc64_integral_or_pointer_p (const struct type *type)
70{
71 switch (TYPE_CODE (type))
72 {
73 case TYPE_CODE_INT:
74 case TYPE_CODE_BOOL:
75 case TYPE_CODE_CHAR:
76 case TYPE_CODE_ENUM:
77 case TYPE_CODE_RANGE:
78 {
79 int len = TYPE_LENGTH (type);
80 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
81 }
82 return 1;
83 case TYPE_CODE_PTR:
84 case TYPE_CODE_REF:
85 {
86 int len = TYPE_LENGTH (type);
87 gdb_assert (len == 8);
88 }
89 return 1;
90 default:
91 break;
92 }
93
94 return 0;
95}
96
97/* Check whether TYPE is "Floating". */
98
99static int
100sparc64_floating_p (const struct type *type)
101{
102 switch (TYPE_CODE (type))
103 {
104 case TYPE_CODE_FLT:
105 {
106 int len = TYPE_LENGTH (type);
107 gdb_assert (len == 4 || len == 8 || len == 16);
108 }
109 return 1;
110 default:
111 break;
112 }
113
114 return 0;
115}
116
117/* Check whether TYPE is "Structure or Union". */
118
119static int
120sparc64_structure_or_union_p (const struct type *type)
121{
122 switch (TYPE_CODE (type))
123 {
124 case TYPE_CODE_STRUCT:
125 case TYPE_CODE_UNION:
126 return 1;
127 default:
128 break;
129 }
130
131 return 0;
132}
133
8b39fe56
MK		 134/* Register information. */
135
136struct sparc64_register_info
137{
138 char *name;
139 struct type **type;
140};
141
142static struct sparc64_register_info sparc64_register_info[] =
143{
144 { "g0", &builtin_type_int64 },
145 { "g1", &builtin_type_int64 },
146 { "g2", &builtin_type_int64 },
147 { "g3", &builtin_type_int64 },
148 { "g4", &builtin_type_int64 },
149 { "g5", &builtin_type_int64 },
150 { "g6", &builtin_type_int64 },
151 { "g7", &builtin_type_int64 },
152
153 { "o0", &builtin_type_int64 },
154 { "o1", &builtin_type_int64 },
155 { "o2", &builtin_type_int64 },
156 { "o3", &builtin_type_int64 },
157 { "o4", &builtin_type_int64 },
158 { "o5", &builtin_type_int64 },
159 { "sp", &builtin_type_void_data_ptr },
160 { "o7", &builtin_type_int64 },
161
162 { "l0", &builtin_type_int64 },
163 { "l1", &builtin_type_int64 },
164 { "l2", &builtin_type_int64 },
165 { "l3", &builtin_type_int64 },
166 { "l4", &builtin_type_int64 },
167 { "l5", &builtin_type_int64 },
168 { "l6", &builtin_type_int64 },
169 { "l7", &builtin_type_int64 },
170
171 { "i0", &builtin_type_int64 },
172 { "i1", &builtin_type_int64 },
173 { "i2", &builtin_type_int64 },
174 { "i3", &builtin_type_int64 },
175 { "i4", &builtin_type_int64 },
176 { "i5", &builtin_type_int64 },
177 { "fp", &builtin_type_void_data_ptr },
178 { "i7", &builtin_type_int64 },
179
180 { "f0", &builtin_type_float },
181 { "f1", &builtin_type_float },
182 { "f2", &builtin_type_float },
183 { "f3", &builtin_type_float },
184 { "f4", &builtin_type_float },
185 { "f5", &builtin_type_float },
186 { "f6", &builtin_type_float },
187 { "f7", &builtin_type_float },
188 { "f8", &builtin_type_float },
189 { "f9", &builtin_type_float },
190 { "f10", &builtin_type_float },
191 { "f11", &builtin_type_float },
192 { "f12", &builtin_type_float },
193 { "f13", &builtin_type_float },
194 { "f14", &builtin_type_float },
195 { "f15", &builtin_type_float },
196 { "f16", &builtin_type_float },
197 { "f17", &builtin_type_float },
198 { "f18", &builtin_type_float },
199 { "f19", &builtin_type_float },
200 { "f20", &builtin_type_float },
201 { "f21", &builtin_type_float },
202 { "f22", &builtin_type_float },
203 { "f23", &builtin_type_float },
204 { "f24", &builtin_type_float },
205 { "f25", &builtin_type_float },
206 { "f26", &builtin_type_float },
207 { "f27", &builtin_type_float },
208 { "f28", &builtin_type_float },
209 { "f29", &builtin_type_float },
210 { "f30", &builtin_type_float },
211 { "f31", &builtin_type_float },
212 { "f32", &builtin_type_double },
213 { "f34", &builtin_type_double },
214 { "f36", &builtin_type_double },
215 { "f38", &builtin_type_double },
216 { "f40", &builtin_type_double },
217 { "f42", &builtin_type_double },
218 { "f44", &builtin_type_double },
219 { "f46", &builtin_type_double },
220 { "f48", &builtin_type_double },
221 { "f50", &builtin_type_double },
222 { "f52", &builtin_type_double },
223 { "f54", &builtin_type_double },
224 { "f56", &builtin_type_double },
225 { "f58", &builtin_type_double },
226 { "f60", &builtin_type_double },
227 { "f62", &builtin_type_double },
228
229 { "pc", &builtin_type_void_func_ptr },
230 { "npc", &builtin_type_void_func_ptr },
231
232 /* This raw register contains the contents of %cwp, %pstate, %asi
233 and %ccr as laid out in a %tstate register. */
3567a8ea
MK		 234 /* FIXME: Give it a name until we start using register groups. */
235 { "state", &builtin_type_int64 },
8b39fe56
MK		 236
237 { "fsr", &builtin_type_int64 },
238 { "fprs", &builtin_type_int64 },
239
240 /* "Although Y is a 64-bit register, its high-order 32 bits are
241 reserved and always read as 0." */
242 { "y", &builtin_type_int64 }
243};
244
245/* Total number of registers. */
386c036b 246#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
8b39fe56
MK		 247
248/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
249 registers as "psuedo" registers. */
250
251static struct sparc64_register_info sparc64_pseudo_register_info[] =
252{
253 { "cwp", &builtin_type_int64 },
254 { "pstate", &builtin_type_int64 },
255 { "asi", &builtin_type_int64 },
256 { "ccr", &builtin_type_int64 },
257
258 { "d0", &builtin_type_double },
259 { "d2", &builtin_type_double },
260 { "d4", &builtin_type_double },
261 { "d6", &builtin_type_double },
262 { "d8", &builtin_type_double },
263 { "d10", &builtin_type_double },
264 { "d12", &builtin_type_double },
265 { "d14", &builtin_type_double },
266 { "d16", &builtin_type_double },
267 { "d18", &builtin_type_double },
268 { "d20", &builtin_type_double },
269 { "d22", &builtin_type_double },
270 { "d24", &builtin_type_double },
271 { "d26", &builtin_type_double },
272 { "d28", &builtin_type_double },
273 { "d30", &builtin_type_double },
274 { "d32", &builtin_type_double },
275 { "d34", &builtin_type_double },
276 { "d36", &builtin_type_double },
277 { "d38", &builtin_type_double },
278 { "d40", &builtin_type_double },
279 { "d42", &builtin_type_double },
280 { "d44", &builtin_type_double },
281 { "d46", &builtin_type_double },
282 { "d48", &builtin_type_double },
283 { "d50", &builtin_type_double },
284 { "d52", &builtin_type_double },
285 { "d54", &builtin_type_double },
286 { "d56", &builtin_type_double },
287 { "d58", &builtin_type_double },
288 { "d60", &builtin_type_double },
289 { "d62", &builtin_type_double },
290
291 { "q0", &builtin_type_long_double },
292 { "q4", &builtin_type_long_double },
293 { "q8", &builtin_type_long_double },
294 { "q12", &builtin_type_long_double },
295 { "q16", &builtin_type_long_double },
296 { "q20", &builtin_type_long_double },
297 { "q24", &builtin_type_long_double },
298 { "q28", &builtin_type_long_double },
299 { "q32", &builtin_type_long_double },
300 { "q36", &builtin_type_long_double },
301 { "q40", &builtin_type_long_double },
302 { "q44", &builtin_type_long_double },
303 { "q48", &builtin_type_long_double },
304 { "q52", &builtin_type_long_double },
305 { "q56", &builtin_type_long_double },
306 { "q60", &builtin_type_long_double }
307};
308
309/* Total number of pseudo registers. */
386c036b 310#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
8b39fe56
MK		 311
312/* Return the name of register REGNUM. */
313
314static const char *
315sparc64_register_name (int regnum)
316{
317 if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
318 return sparc64_register_info[regnum].name;
319
320 if (regnum >= SPARC64_NUM_REGS
321 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
322 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
323
324 return NULL;
325}
326
327/* Return the GDB type object for the "standard" data type of data in
328 register REGNUM. */
329
330static struct type *
331sparc64_register_type (struct gdbarch *gdbarch, int regnum)
332{
333 if (regnum >= SPARC64_NUM_REGS
334 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
335 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
336
337 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
338 return *sparc64_register_info[regnum].type;
339}
340
341static void
342sparc64_pseudo_register_read (struct gdbarch *gdbarch,
343 struct regcache *regcache,
344 int regnum, void *buf)
345{
346 gdb_assert (regnum >= SPARC64_NUM_REGS);
347
348 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
349 {
350 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
351 regcache_raw_read (regcache, regnum, buf);
352 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
353 }
354 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
355 {
356 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
357 regcache_raw_read (regcache, regnum, buf);
358 }
359 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
360 {
361 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
362 regcache_raw_read (regcache, regnum, buf);
363 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
364 regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8);
365 regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12);
366 }
367 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
368 {
369 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
370 regcache_raw_read (regcache, regnum, buf);
371 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8);
372 }
373 else if (regnum == SPARC64_CWP_REGNUM
374 || regnum == SPARC64_PSTATE_REGNUM
375 || regnum == SPARC64_ASI_REGNUM
376 || regnum == SPARC64_CCR_REGNUM)
377 {
378 ULONGEST state;
379
380 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
381 switch (regnum)
382 {
3567a8ea 383 case SPARC64_CWP_REGNUM:
8b39fe56
MK		 384 state = (state >> 0) & ((1 << 5) - 1);
385 break;
3567a8ea 386 case SPARC64_PSTATE_REGNUM:
8b39fe56
MK		 387 state = (state >> 8) & ((1 << 12) - 1);
388 break;
3567a8ea 389 case SPARC64_ASI_REGNUM:
8b39fe56
MK		 390 state = (state >> 24) & ((1 << 8) - 1);
391 break;
3567a8ea 392 case SPARC64_CCR_REGNUM:
8b39fe56
MK		 393 state = (state >> 32) & ((1 << 8) - 1);
394 break;
395 }
396 store_unsigned_integer (buf, 8, state);
397 }
398}
399
400static void
401sparc64_pseudo_register_write (struct gdbarch *gdbarch,
402 struct regcache *regcache,
403 int regnum, const void *buf)
404{
405 gdb_assert (regnum >= SPARC64_NUM_REGS);
406
407 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
408 {
409 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
410 regcache_raw_write (regcache, regnum, buf);
411 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
412 }
413 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
414 {
415 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
416 regcache_raw_write (regcache, regnum, buf);
417 }
418 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
419 {
420 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
421 regcache_raw_write (regcache, regnum, buf);
422 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
423 regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8);
424 regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12);
425 }
426 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
427 {
428 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
429 regcache_raw_write (regcache, regnum, buf);
430 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8);
431 }
3567a8ea
MK		 432 else if (regnum == SPARC64_CWP_REGNUM
433 || regnum == SPARC64_PSTATE_REGNUM
434 || regnum == SPARC64_ASI_REGNUM
435 || regnum == SPARC64_CCR_REGNUM)
436 {
437 ULONGEST state, bits;
438
439 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
440 bits = extract_unsigned_integer (buf, 8);
441 switch (regnum)
442 {
443 case SPARC64_CWP_REGNUM:
444 state |= ((bits & ((1 << 5) - 1)) << 0);
445 break;
446 case SPARC64_PSTATE_REGNUM:
447 state |= ((bits & ((1 << 12) - 1)) << 8);
448 break;
449 case SPARC64_ASI_REGNUM:
450 state |= ((bits & ((1 << 8) - 1)) << 24);
451 break;
452 case SPARC64_CCR_REGNUM:
453 state |= ((bits & ((1 << 8) - 1)) << 32);
454 break;
455 }
456 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
457 }
8b39fe56 458}
8b39fe56
MK		 459\f
460
8b39fe56
MK		 461/* Return PC of first real instruction of the function starting at
462 START_PC. */
463
464static CORE_ADDR
465sparc64_skip_prologue (CORE_ADDR start_pc)
466{
467 struct symtab_and_line sal;
468 CORE_ADDR func_start, func_end;
386c036b 469 struct sparc_frame_cache cache;
8b39fe56
MK		 470
471 /* This is the preferred method, find the end of the prologue by
472 using the debugging information. */
473 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
474 {
475 sal = find_pc_line (func_start, 0);
476
477 if (sal.end < func_end
478 && start_pc <= sal.end)
479 return sal.end;
480 }
481
386c036b 482 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
8b39fe56
MK		 483}
484
485/* Normal frames. */
486
386c036b 487static struct sparc_frame_cache *
8b39fe56
MK		 488sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
489{
386c036b 490 return sparc_frame_cache (next_frame, this_cache);
8b39fe56
MK		 491}
492
493static void
494sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
495 struct frame_id *this_id)
496{
386c036b 497 struct sparc_frame_cache *cache =
8b39fe56
MK		 498 sparc64_frame_cache (next_frame, this_cache);
499
500 /* This marks the outermost frame. */
501 if (cache->base == 0)
502 return;
503
504 (*this_id) = frame_id_build (cache->base, cache->pc);
505}
506
507static void
508sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
509 int regnum, int *optimizedp,
510 enum lval_type *lvalp, CORE_ADDR *addrp,
511 int *realnump, void *valuep)
512{
386c036b 513 struct sparc_frame_cache *cache =
8b39fe56
MK		 514 sparc64_frame_cache (next_frame, this_cache);
515
516 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
517 {
518 *optimizedp = 0;
519 *lvalp = not_lval;
520 *addrp = 0;
521 *realnump = -1;
522 if (valuep)
523 {
524 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
525
526 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
527 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
528 store_unsigned_integer (valuep, 8, pc);
529 }
530 return;
531 }
532
533 /* The previous frame's `local' and `in' registers have been saved
534 in the register save area. */
535 if (!cache->frameless_p
536 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
537 {
538 *optimizedp = 0;
539 *lvalp = lval_memory;
540 *addrp = cache->base + BIAS + (regnum - SPARC_L0_REGNUM) * 8;
541 *realnump = -1;
542 if (valuep)
543 {
544 struct gdbarch *gdbarch = get_frame_arch (next_frame);
545
546 /* Read the value in from memory. */
547 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
548 }
549 return;
550 }
551
552 /* The previous frame's `out' registers are accessable as the
553 current frame's `in' registers. */
554 if (!cache->frameless_p
555 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
556 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
557
558 frame_register_unwind (next_frame, regnum,
559 optimizedp, lvalp, addrp, realnump, valuep);
560}
561
562static const struct frame_unwind sparc64_frame_unwind =
563{
564 NORMAL_FRAME,
565 sparc64_frame_this_id,
566 sparc64_frame_prev_register
567};
568
569static const struct frame_unwind *
570sparc64_frame_sniffer (struct frame_info *next_frame)
571{
572 return &sparc64_frame_unwind;
573}
574\f
575
576static CORE_ADDR
577sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
578{
386c036b 579 struct sparc_frame_cache *cache =
8b39fe56
MK		 580 sparc64_frame_cache (next_frame, this_cache);
581
582 /* ??? Should we take BIAS into account here? */
583 return cache->base;
584}
585
586static const struct frame_base sparc64_frame_base =
587{
588 &sparc64_frame_unwind,
589 sparc64_frame_base_address,
590 sparc64_frame_base_address,
591 sparc64_frame_base_address
592};
8b39fe56
MK		 593\f
594/* Check whether TYPE must be 16-byte aligned. */
595
596static int
597sparc64_16_byte_align_p (struct type *type)
598{
599 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
600 return 1;
601
602 if (sparc64_structure_or_union_p (type))
603 {
604 int i;
605
606 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK		 607 {
608 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
609
610 if (sparc64_16_byte_align_p (subtype))
611 return 1;
612 }
8b39fe56
MK		 613 }
614
615 return 0;
616}
617
618/* Store floating fields of element ELEMENT of an "parameter array"
619 that has type TYPE and is stored at BITPOS in VALBUF in the
620 apropriate registers of REGCACHE. This function can be called
621 recursively and therefore handles floating types in addition to
622 structures. */
623
624static void
625sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
626 char *valbuf, int element, int bitpos)
627{
628 gdb_assert (element < 16);
629
630 if (sparc64_floating_p (type))
631 {
632 int len = TYPE_LENGTH (type);
633 int regnum;
634
635 if (len == 16)
636 {
637 gdb_assert (bitpos == 0);
638 gdb_assert ((element % 2) == 0);
639
640 regnum = SPARC64_Q0_REGNUM + element / 2;
641 regcache_cooked_write (regcache, regnum, valbuf);
642 }
643 else if (len == 8)
644 {
645 gdb_assert (bitpos == 0 || bitpos == 64);
646
647 regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
648 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
649 }
650 else
651 {
652 gdb_assert (len == 4);
653 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
654
655 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
656 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
657 }
658 }
659 else if (sparc64_structure_or_union_p (type))
660 {
661 int i;
662
663 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK		 664 {
665 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
666 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
667
668 sparc64_store_floating_fields (regcache, subtype, valbuf,
669 element, subpos);
670 }
200cc553
MK		 671
672 /* GCC has an interesting bug. If TYPE is a structure that has
673 a single `float' member, GCC doesn't treat it as a structure
674 at all, but rather as an ordinary `float' argument. This
675 argument will be stored in %f1, as required by the psABI.
676 However, as a member of a structure the psABI requires it to
5154b0cd
MK		 677 be stored in %f0. This bug is present in GCC 3.3.2, but
678 probably in older releases to. To appease GCC, if a
679 structure has only a single `float' member, we store its
680 value in %f1 too (we already have stored in %f0). */
200cc553
MK		 681 if (TYPE_NFIELDS (type) == 1)
682 {
683 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
684
685 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
686 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
687 }
8b39fe56
MK		 688 }
689}
690
691/* Fetch floating fields from a variable of type TYPE from the
692 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
693 in VALBUF. This function can be called recursively and therefore
694 handles floating types in addition to structures. */
695
696static void
697sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
698 char *valbuf, int bitpos)
699{
700 if (sparc64_floating_p (type))
701 {
702 int len = TYPE_LENGTH (type);
703 int regnum;
704
705 if (len == 16)
706 {
707 gdb_assert (bitpos == 0 || bitpos == 128);
708
709 regnum = SPARC64_Q0_REGNUM + bitpos / 128;
710 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
711 }
712 else if (len == 8)
713 {
714 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
715
716 regnum = SPARC64_D0_REGNUM + bitpos / 64;
717 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
718 }
719 else
720 {
721 gdb_assert (len == 4);
722 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
723
724 regnum = SPARC_F0_REGNUM + bitpos / 32;
725 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
726 }
727 }
728 else if (sparc64_structure_or_union_p (type))
729 {
730 int i;
731
732 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK		 733 {
734 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
735 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
736
737 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
738 }
8b39fe56
MK		 739 }
740}
741
742/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
743 non-zero) in REGCACHE and on the stack (starting from address SP). */
744
745static CORE_ADDR
746sparc64_store_arguments (struct regcache *regcache, int nargs,
747 struct value **args, CORE_ADDR sp,
748 int struct_return, CORE_ADDR struct_addr)
749{
750 /* Number of extended words in the "parameter array". */
751 int num_elements = 0;
752 int element = 0;
753 int i;
754
755 /* Take BIAS into account. */
756 sp += BIAS;
757
758 /* First we calculate the number of extended words in the "parameter
759 array". While doing so we also convert some of the arguments. */
760
761 if (struct_return)
762 num_elements++;
763
764 for (i = 0; i < nargs; i++)
765 {
766 struct type *type = VALUE_TYPE (args[i]);
767 int len = TYPE_LENGTH (type);
768
769 if (sparc64_structure_or_union_p (type))
770 {
771 /* Structure or Union arguments. */
772 if (len <= 16)
773 {
774 if (num_elements % 2 && sparc64_16_byte_align_p (type))
775 num_elements++;
776 num_elements += ((len + 7) / 8);
777 }
778 else
779 {
780 /* The psABI says that "Structures or unions larger than
781 sixteen bytes are copied by the caller and passed
782 indirectly; the caller will pass the address of a
783 correctly aligned structure value. This sixty-four
784 bit address will occupy one word in the parameter
785 array, and may be promoted to an %o register like any
786 other pointer value." Allocate memory for these
787 values on the stack. */
788 sp -= len;
789
790 /* Use 16-byte alignment for these values. That's
791 always correct, and wasting a few bytes shouldn't be
792 a problem. */
793 sp &= ~0xf;
794
795 write_memory (sp, VALUE_CONTENTS (args[i]), len);
796 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
797 num_elements++;
798 }
799 }
800 else if (sparc64_floating_p (type))
801 {
802 /* Floating arguments. */
803
804 if (len == 16)
805 {
806 /* The psABI says that "Each quad-precision parameter
807 value will be assigned to two extended words in the
808 parameter array. */
809 num_elements += 2;
810
811 /* The psABI says that "Long doubles must be
812 quad-aligned, and thus a hole might be introduced
813 into the parameter array to force alignment." Skip
814 an element if necessary. */
815 if (num_elements % 2)
816 num_elements++;
817 }
818 else
819 num_elements++;
820 }
821 else
822 {
823 /* Integral and pointer arguments. */
824 gdb_assert (sparc64_integral_or_pointer_p (type));
825
826 /* The psABI says that "Each argument value of integral type
827 smaller than an extended word will be widened by the
828 caller to an extended word according to the signed-ness
829 of the argument type." */
830 if (len < 8)
831 args[i] = value_cast (builtin_type_int64, args[i]);
832 num_elements++;
833 }
834 }
835
836 /* Allocate the "parameter array". */
837 sp -= num_elements * 8;
838
839 /* The psABI says that "Every stack frame must be 16-byte aligned." */
840 sp &= ~0xf;
841
842 /* Now we store the arguments in to the "paramater array". Some
843 Integer or Pointer arguments and Structure or Union arguments
844 will be passed in %o registers. Some Floating arguments and
845 floating members of structures are passed in floating-point
846 registers. However, for functions with variable arguments,
847 floating arguments are stored in an %0 register, and for
848 functions without a prototype floating arguments are stored in
849 both a floating-point and an %o registers, or a floating-point
850 register and memory. To simplify the logic here we always pass
851 arguments in memory, an %o register, and a floating-point
852 register if appropriate. This should be no problem since the
853 contents of any unused memory or registers in the "parameter
854 array" are undefined. */
855
856 if (struct_return)
857 {
858 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
859 element++;
860 }
861
862 for (i = 0; i < nargs; i++)
863 {
864 char *valbuf = VALUE_CONTENTS (args[i]);
865 struct type *type = VALUE_TYPE (args[i]);
866 int len = TYPE_LENGTH (type);
867 int regnum = -1;
868 char buf[16];
869
870 if (sparc64_structure_or_union_p (type))
871 {
872 /* Structure or Union arguments. */
873 gdb_assert (len <= 16);
874 memset (buf, 0, sizeof (buf));
875 valbuf = memcpy (buf, valbuf, len);
876
877 if (element % 2 && sparc64_16_byte_align_p (type))
878 element++;
879
880 if (element < 6)
881 {
882 regnum = SPARC_O0_REGNUM + element;
883 if (len > 8 && element < 5)
884 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
885 }
886
887 if (element < 16)
888 sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
889 }
890 else if (sparc64_floating_p (type))
891 {
892 /* Floating arguments. */
893 if (len == 16)
894 {
895 if (element % 2)
896 element++;
897 if (element < 16)
898 regnum = SPARC64_Q0_REGNUM + element / 2;
899 }
900 else if (len == 8)
901 {
902 if (element < 16)
903 regnum = SPARC64_D0_REGNUM + element;
904 }
905 else
906 {
907 /* The psABI says "Each single-precision parameter value
908 will be assigned to one extended word in the
909 parameter array, and right-justified within that
910 word; the left half (even floatregister) is
911 undefined." Even though the psABI says that "the
912 left half is undefined", set it to zero here. */
913 memset (buf, 0, 4);
8ada74e3
MK		 914 memcpy (buf + 4, valbuf, 4);
915 valbuf = buf;
8b39fe56
MK		 916 len = 8;
917 if (element < 16)
8ada74e3 918 regnum = SPARC64_D0_REGNUM + element;
8b39fe56
MK		 919 }
920 }
921 else
922 {
923 /* Integral and pointer arguments. */
924 gdb_assert (len == 8);
925 if (element < 6)
926 regnum = SPARC_O0_REGNUM + element;
927 }
928
929 if (regnum != -1)
930 {
931 regcache_cooked_write (regcache, regnum, valbuf);
932
933 /* If we're storing the value in a floating-point register,
934 also store it in the corresponding %0 register(s). */
935 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
936 {
937 gdb_assert (element < 6);
938 regnum = SPARC_O0_REGNUM + element;
939 regcache_cooked_write (regcache, regnum, valbuf);
940 }
941 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
942 {
943 gdb_assert (element < 6);
944 regnum = SPARC_O0_REGNUM + element;
945 regcache_cooked_write (regcache, regnum, valbuf);
946 regcache_cooked_write (regcache, regnum + 1, valbuf);
947 }
948 }
949
950 /* Always store the argument in memeory. */
951 write_memory (sp + element * 8, valbuf, len);
952 element += ((len + 7) / 8);
953 }
954
955 gdb_assert (element == num_elements);
956
957 /* Take BIAS into account. */
958 sp -= BIAS;
959 return sp;
960}
961
962static CORE_ADDR
963sparc64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
964 struct regcache *regcache, CORE_ADDR bp_addr,
965 int nargs, struct value **args, CORE_ADDR sp,
966 int struct_return, CORE_ADDR struct_addr)
967{
968 /* Set return address. */
969 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
970
971 /* Set up function arguments. */
972 sp = sparc64_store_arguments (regcache, nargs, args, sp,
973 struct_return, struct_addr);
974
975 /* Allocate the register save area. */
976 sp -= 16 * 8;
977
978 /* Stack should be 16-byte aligned at this point. */
3567a8ea 979 gdb_assert ((sp + BIAS) % 16 == 0);
8b39fe56
MK		 980
981 /* Finally, update the stack pointer. */
982 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
983
984 return sp;
985}
986\f
987
988/* Extract from an array REGBUF containing the (raw) register state, a
989 function return value of TYPE, and copy that into VALBUF. */
990
991static void
992sparc64_extract_return_value (struct type *type, struct regcache *regcache,
993 void *valbuf)
994{
995 int len = TYPE_LENGTH (type);
996 char buf[32];
997 int i;
998
999 if (sparc64_structure_or_union_p (type))
1000 {
1001 /* Structure or Union return values. */
1002 gdb_assert (len <= 32);
1003
1004 for (i = 0; i < ((len + 7) / 8); i++)
1005 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1006 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1007 sparc64_extract_floating_fields (regcache, type, buf, 0);
1008 memcpy (valbuf, buf, len);
1009 }
1010 else if (sparc64_floating_p (type))
1011 {
1012 /* Floating return values. */
1013 for (i = 0; i < len / 4; i++)
1014 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1015 memcpy (valbuf, buf, len);
1016 }
1017 else
1018 {
1019 /* Integral and pointer return values. */
1020 gdb_assert (sparc64_integral_or_pointer_p (type));
1021
1022 /* Just stripping off any unused bytes should preserve the
1023 signed-ness just fine. */
1024 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1025 memcpy (valbuf, buf + 8 - len, len);
1026 }
1027}
1028
1029/* Write into the appropriate registers a function return value stored
1030 in VALBUF of type TYPE. */
1031
1032static void
1033sparc64_store_return_value (struct type *type, struct regcache *regcache,
1034 const void *valbuf)
1035{
1036 int len = TYPE_LENGTH (type);
1037 char buf[16];
1038 int i;
1039
1040 if (sparc64_structure_or_union_p (type))
1041 {
1042 /* Structure or Union return values. */
1043 gdb_assert (len <= 32);
1044
1045 /* Simplify matters by storing the complete value (including
1046 floating members) into %o0 and %o1. Floating members are
1047 also store in the appropriate floating-point registers. */
1048 memset (buf, 0, sizeof (buf));
1049 memcpy (buf, valbuf, len);
1050 for (i = 0; i < ((len + 7) / 8); i++)
60af1db2 1051 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
8b39fe56
MK		 1052 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1053 sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1054 }
1055 else if (sparc64_floating_p (type))
1056 {
1057 /* Floating return values. */
1058 memcpy (buf, valbuf, len);
1059 for (i = 0; i < len / 4; i++)
1060 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1061 }
1062 else
1063 {
1064 /* Integral and pointer return values. */
1065 gdb_assert (sparc64_integral_or_pointer_p (type));
1066
1067 /* ??? Do we need to do any sign-extension here? */
1068 memset (buf, 0, 8);
1069 memcpy (buf + 8 - len, valbuf, len);
1070 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1071 }
1072}
1073
60af1db2
MK		 1074static enum return_value_convention
1075sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
1076 struct regcache *regcache, void *readbuf,
1077 const void *writebuf)
8b39fe56 1078{
60af1db2
MK		 1079 if (TYPE_LENGTH (type) > 32)
1080 return RETURN_VALUE_STRUCT_CONVENTION;
1081
1082 if (readbuf)
1083 sparc64_extract_return_value (type, regcache, readbuf);
1084 if (writebuf)
1085 sparc64_store_return_value (type, regcache, writebuf);
1086
1087 return RETURN_VALUE_REGISTER_CONVENTION;
8b39fe56 1088}
8b39fe56 1089\f
8b39fe56
MK		 1090
1091void
386c036b 1092sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
8b39fe56 1093{
386c036b 1094 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8b39fe56 1095
386c036b
MK		 1096 tdep->pc_regnum = SPARC64_PC_REGNUM;
1097 tdep->npc_regnum = SPARC64_NPC_REGNUM;
8b39fe56 1098
386c036b 1099 /* This is what all the fuss is about. */
8b39fe56
MK		 1100 set_gdbarch_long_bit (gdbarch, 64);
1101 set_gdbarch_long_long_bit (gdbarch, 64);
1102 set_gdbarch_ptr_bit (gdbarch, 64);
8b39fe56
MK		 1103
1104 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1105 set_gdbarch_register_name (gdbarch, sparc64_register_name);
1106 set_gdbarch_register_type (gdbarch, sparc64_register_type);
1107 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1108 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1109 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1110
1111 /* Register numbers of various important registers. */
8b39fe56 1112 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
8b39fe56
MK		 1113
1114 /* Call dummy code. */
386c036b
MK		 1115 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1116 set_gdbarch_push_dummy_code (gdbarch, NULL);
8b39fe56
MK		 1117 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1118
60af1db2 1119 set_gdbarch_return_value (gdbarch, sparc64_return_value);
386c036b
MK		 1120 set_gdbarch_stabs_argument_has_addr
1121 (gdbarch, default_stabs_argument_has_addr);
8b39fe56
MK		 1122
1123 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1124
386c036b 1125 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
8b39fe56 1126 frame_base_set_default (gdbarch, &sparc64_frame_base);
386c036b
MK		 1127}
1128\f
8b39fe56 1129
386c036b 1130/* Helper functions for dealing with register sets. */
8b39fe56 1131
386c036b
MK		 1132#define TSTATE_CWP 0x000000000000001fULL
1133#define TSTATE_ICC 0x0000000f00000000ULL
1134#define TSTATE_XCC 0x000000f000000000ULL
8b39fe56 1135
386c036b
MK		 1136#define PSR_S 0x00000080
1137#define PSR_ICC 0x00f00000
1138#define PSR_VERS 0x0f000000
1139#define PSR_IMPL 0xf0000000
1140#define PSR_V8PLUS 0xff000000
1141#define PSR_XCC 0x000f0000
8b39fe56 1142
3567a8ea 1143void
386c036b
MK		 1144sparc64_supply_gregset (const struct sparc_gregset *gregset,
1145 struct regcache *regcache,
1146 int regnum, const void *gregs)
8b39fe56 1147{
386c036b
MK		 1148 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1149 const char *regs = gregs;
8b39fe56
MK		 1150 int i;
1151
386c036b 1152 if (sparc32)
8b39fe56 1153 {
386c036b
MK		 1154 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1155 {
1156 int offset = gregset->r_tstate_offset;
1157 ULONGEST tstate, psr;
1158 char buf[4];
1159
1160 tstate = extract_unsigned_integer (regs + offset, 8);
1161 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1162 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1163 store_unsigned_integer (buf, 4, psr);
1164 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1165 }
1166
1167 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1168 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1169 regs + gregset->r_pc_offset + 4);
1170
1171 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1172 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1173 regs + gregset->r_npc_offset + 4);
8b39fe56 1174
386c036b 1175 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1176 {
386c036b
MK		 1177 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1178 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK		 1179 }
1180 }
1181 else
1182 {
386c036b
MK		 1183 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1184 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1185 regs + gregset->r_tstate_offset);
8b39fe56 1186
386c036b
MK		 1187 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1188 regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1189 regs + gregset->r_pc_offset);
1190
1191 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1192 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1193 regs + gregset->r_npc_offset);
1194
1195 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1196 {
386c036b
MK		 1197 char buf[8];
1198
1199 memset (buf, 0, 8);
1200 memcpy (buf + 8 - gregset->r_y_size,
1201 regs + gregset->r_y_offset, gregset->r_y_size);
1202 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
3567a8ea 1203 }
8b39fe56 1204
386c036b
MK		 1205 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1206 && gregset->r_fprs_offset != -1)
1207 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1208 regs + gregset->r_fprs_offset);
1209 }
1210
1211 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1212 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1213
1214 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1215 {
1216 int offset = gregset->r_g1_offset;
1217
1218 if (sparc32)
1219 offset += 4;
1220
1221 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
8b39fe56 1222 {
3567a8ea 1223 if (regnum == i || regnum == -1)
386c036b
MK		 1224 regcache_raw_supply (regcache, i, regs + offset);
1225 offset += 8;
1226 }
1227 }
1228
1229 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1230 {
1231 /* Not all of the register set variants include Locals and
1232 Inputs. For those that don't, we read them off the stack. */
1233 if (gregset->r_l0_offset == -1)
1234 {
1235 ULONGEST sp;
1236
1237 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1238 sparc_supply_rwindow (regcache, sp, regnum);
1239 }
1240 else
1241 {
1242 int offset = gregset->r_l0_offset;
1243
1244 if (sparc32)
1245 offset += 4;
1246
1247 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1248 {
386c036b
MK		 1249 if (regnum == i || regnum == -1)
1250 regcache_raw_supply (regcache, i, regs + offset);
1251 offset += 8;
3567a8ea 1252 }
8b39fe56
MK		 1253 }
1254 }
1255}
1256
1257void
386c036b
MK		 1258sparc64_collect_gregset (const struct sparc_gregset *gregset,
1259 const struct regcache *regcache,
1260 int regnum, void *gregs)
8b39fe56 1261{
386c036b
MK		 1262 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1263 char *regs = gregs;
3567a8ea
MK		 1264 int i;
1265
386c036b 1266 if (sparc32)
8b39fe56 1267 {
386c036b
MK		 1268 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1269 {
1270 int offset = gregset->r_tstate_offset;
1271 ULONGEST tstate, psr;
1272 char buf[8];
1273
1274 tstate = extract_unsigned_integer (regs + offset, 8);
1275 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1276 psr = extract_unsigned_integer (buf, 4);
1277 tstate |= (psr & PSR_ICC) << 12;
1278 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1279 tstate |= (psr & PSR_XCC) << 20;
1280 store_unsigned_integer (buf, 8, tstate);
1281 memcpy (regs + offset, buf, 8);
1282 }
8b39fe56 1283
386c036b
MK		 1284 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1285 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1286 regs + gregset->r_pc_offset + 4);
1287
1288 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1289 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1290 regs + gregset->r_npc_offset + 4);
1291
1292 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1293 {
386c036b
MK		 1294 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1295 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK		 1296 }
1297 }
1298 else
1299 {
386c036b
MK		 1300 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1301 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1302 regs + gregset->r_tstate_offset);
1303
1304 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1305 regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1306 regs + gregset->r_pc_offset);
3567a8ea 1307
386c036b
MK		 1308 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1309 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1310 regs + gregset->r_npc_offset);
3567a8ea 1311
386c036b 1312 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1313 {
386c036b
MK		 1314 char buf[8];
1315
1316 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1317 memcpy (regs + gregset->r_y_offset,
1318 buf + 8 - gregset->r_y_size, gregset->r_y_size);
1319 }
1320
1321 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1322 && gregset->r_fprs_offset != -1)
1323 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1324 regs + gregset->r_fprs_offset);
1325
1326 }
1327
1328 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1329 {
1330 int offset = gregset->r_g1_offset;
1331
1332 if (sparc32)
1333 offset += 4;
1334
1335 /* %g0 is always zero. */
1336 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1337 {
1338 if (regnum == i || regnum == -1)
1339 regcache_raw_collect (regcache, i, regs + offset);
1340 offset += 8;
1341 }
1342 }
1343
1344 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1345 {
1346 /* Not all of the register set variants include Locals and
1347 Inputs. For those that don't, we read them off the stack. */
1348 if (gregset->r_l0_offset != -1)
1349 {
1350 int offset = gregset->r_l0_offset;
1351
1352 if (sparc32)
1353 offset += 4;
1354
1355 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1356 {
386c036b
MK		 1357 if (regnum == i || regnum == -1)
1358 regcache_raw_collect (regcache, i, regs + offset);
1359 offset += 8;
3567a8ea
MK		 1360 }
1361 }
8b39fe56
MK		 1362 }
1363}
8b39fe56 1364
386c036b
MK		 1365void
1366sparc64_supply_fpregset (struct regcache *regcache,
1367 int regnum, const void *fpregs)
1368{
1369 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1370 const char *regs = fpregs;
1371 int i;
1372
1373 for (i = 0; i < 32; i++)
1374 {
1375 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1376 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1377 }
1378
1379 if (sparc32)
1380 {
1381 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1382 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1383 regs + (32 * 4) + (16 * 8) + 4);
1384 }
1385 else
1386 {
1387 for (i = 0; i < 16; i++)
1388 {
1389 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1390 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1391 regs + (32 * 4) + (i * 8));
1392 }
1393
1394 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1395 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1396 regs + (32 * 4) + (16 * 8));
1397 }
1398}
8b39fe56
MK		 1399
1400void
386c036b
MK		 1401sparc64_collect_fpregset (const struct regcache *regcache,
1402 int regnum, void *fpregs)
8b39fe56 1403{
386c036b
MK		 1404 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1405 char *regs = fpregs;
1406 int i;
1407
1408 for (i = 0; i < 32; i++)
1409 {
1410 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1411 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1412 }
1413
1414 if (sparc32)
1415 {
1416 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1417 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1418 regs + (32 * 4) + (16 * 8) + 4);
1419 }
1420 else
1421 {
1422 for (i = 0; i < 16; i++)
1423 {
1424 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1425 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1426 regs + (32 * 4) + (i * 8));
1427 }
1428
1429 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1430 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1431 regs + (32 * 4) + (16 * 8));
1432 }
8b39fe56 1433}
GDB Binutils - Deliverables
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