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[deliverable/binutils-gdb.git] / gdb / sparc64-tdep.c
CommitLineData
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1/* Target-dependent code for UltraSPARC.
2
0fd88904 3 Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "arch-utils.h"
02a71ae8 24#include "dwarf2-frame.h"
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25#include "floatformat.h"
26#include "frame.h"
27#include "frame-base.h"
28#include "frame-unwind.h"
29#include "gdbcore.h"
30#include "gdbtypes.h"
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31#include "inferior.h"
32#include "symtab.h"
33#include "objfiles.h"
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34#include "osabi.h"
35#include "regcache.h"
36#include "target.h"
37#include "value.h"
38
39#include "gdb_assert.h"
40#include "gdb_string.h"
41
42#include "sparc64-tdep.h"
43
44/* This file implements the The SPARC 64-bit ABI as defined by the
45 section "Low-Level System Information" of the SPARC Compliance
46 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
47 SPARC. */
48
49/* Please use the sparc32_-prefix for 32-bit specific code, the
50 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
51 code can handle both. */
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52\f
53/* The functions on this page are intended to be used to classify
54 function arguments. */
55
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56/* Check whether TYPE is "Integral or Pointer". */
57
58static int
59sparc64_integral_or_pointer_p (const struct type *type)
60{
61 switch (TYPE_CODE (type))
62 {
63 case TYPE_CODE_INT:
64 case TYPE_CODE_BOOL:
65 case TYPE_CODE_CHAR:
66 case TYPE_CODE_ENUM:
67 case TYPE_CODE_RANGE:
68 {
69 int len = TYPE_LENGTH (type);
70 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
71 }
72 return 1;
73 case TYPE_CODE_PTR:
74 case TYPE_CODE_REF:
75 {
76 int len = TYPE_LENGTH (type);
77 gdb_assert (len == 8);
78 }
79 return 1;
80 default:
81 break;
82 }
83
84 return 0;
85}
86
87/* Check whether TYPE is "Floating". */
88
89static int
90sparc64_floating_p (const struct type *type)
91{
92 switch (TYPE_CODE (type))
93 {
94 case TYPE_CODE_FLT:
95 {
96 int len = TYPE_LENGTH (type);
97 gdb_assert (len == 4 || len == 8 || len == 16);
98 }
99 return 1;
100 default:
101 break;
102 }
103
104 return 0;
105}
106
107/* Check whether TYPE is "Structure or Union". */
108
109static int
110sparc64_structure_or_union_p (const struct type *type)
111{
112 switch (TYPE_CODE (type))
113 {
114 case TYPE_CODE_STRUCT:
115 case TYPE_CODE_UNION:
116 return 1;
117 default:
118 break;
119 }
120
121 return 0;
122}
123
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124/* Register information. */
125
126struct sparc64_register_info
127{
128 char *name;
129 struct type **type;
130};
131
132static struct sparc64_register_info sparc64_register_info[] =
133{
134 { "g0", &builtin_type_int64 },
135 { "g1", &builtin_type_int64 },
136 { "g2", &builtin_type_int64 },
137 { "g3", &builtin_type_int64 },
138 { "g4", &builtin_type_int64 },
139 { "g5", &builtin_type_int64 },
140 { "g6", &builtin_type_int64 },
141 { "g7", &builtin_type_int64 },
142
143 { "o0", &builtin_type_int64 },
144 { "o1", &builtin_type_int64 },
145 { "o2", &builtin_type_int64 },
146 { "o3", &builtin_type_int64 },
147 { "o4", &builtin_type_int64 },
148 { "o5", &builtin_type_int64 },
149 { "sp", &builtin_type_void_data_ptr },
150 { "o7", &builtin_type_int64 },
151
152 { "l0", &builtin_type_int64 },
153 { "l1", &builtin_type_int64 },
154 { "l2", &builtin_type_int64 },
155 { "l3", &builtin_type_int64 },
156 { "l4", &builtin_type_int64 },
157 { "l5", &builtin_type_int64 },
158 { "l6", &builtin_type_int64 },
159 { "l7", &builtin_type_int64 },
160
161 { "i0", &builtin_type_int64 },
162 { "i1", &builtin_type_int64 },
163 { "i2", &builtin_type_int64 },
164 { "i3", &builtin_type_int64 },
165 { "i4", &builtin_type_int64 },
166 { "i5", &builtin_type_int64 },
167 { "fp", &builtin_type_void_data_ptr },
168 { "i7", &builtin_type_int64 },
169
170 { "f0", &builtin_type_float },
171 { "f1", &builtin_type_float },
172 { "f2", &builtin_type_float },
173 { "f3", &builtin_type_float },
174 { "f4", &builtin_type_float },
175 { "f5", &builtin_type_float },
176 { "f6", &builtin_type_float },
177 { "f7", &builtin_type_float },
178 { "f8", &builtin_type_float },
179 { "f9", &builtin_type_float },
180 { "f10", &builtin_type_float },
181 { "f11", &builtin_type_float },
182 { "f12", &builtin_type_float },
183 { "f13", &builtin_type_float },
184 { "f14", &builtin_type_float },
185 { "f15", &builtin_type_float },
186 { "f16", &builtin_type_float },
187 { "f17", &builtin_type_float },
188 { "f18", &builtin_type_float },
189 { "f19", &builtin_type_float },
190 { "f20", &builtin_type_float },
191 { "f21", &builtin_type_float },
192 { "f22", &builtin_type_float },
193 { "f23", &builtin_type_float },
194 { "f24", &builtin_type_float },
195 { "f25", &builtin_type_float },
196 { "f26", &builtin_type_float },
197 { "f27", &builtin_type_float },
198 { "f28", &builtin_type_float },
199 { "f29", &builtin_type_float },
200 { "f30", &builtin_type_float },
201 { "f31", &builtin_type_float },
202 { "f32", &builtin_type_double },
203 { "f34", &builtin_type_double },
204 { "f36", &builtin_type_double },
205 { "f38", &builtin_type_double },
206 { "f40", &builtin_type_double },
207 { "f42", &builtin_type_double },
208 { "f44", &builtin_type_double },
209 { "f46", &builtin_type_double },
210 { "f48", &builtin_type_double },
211 { "f50", &builtin_type_double },
212 { "f52", &builtin_type_double },
213 { "f54", &builtin_type_double },
214 { "f56", &builtin_type_double },
215 { "f58", &builtin_type_double },
216 { "f60", &builtin_type_double },
217 { "f62", &builtin_type_double },
218
219 { "pc", &builtin_type_void_func_ptr },
220 { "npc", &builtin_type_void_func_ptr },
221
222 /* This raw register contains the contents of %cwp, %pstate, %asi
223 and %ccr as laid out in a %tstate register. */
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224 /* FIXME: Give it a name until we start using register groups. */
225 { "state", &builtin_type_int64 },
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226
227 { "fsr", &builtin_type_int64 },
228 { "fprs", &builtin_type_int64 },
229
230 /* "Although Y is a 64-bit register, its high-order 32 bits are
231 reserved and always read as 0." */
232 { "y", &builtin_type_int64 }
233};
234
235/* Total number of registers. */
386c036b 236#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
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237
238/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
239 registers as "psuedo" registers. */
240
241static struct sparc64_register_info sparc64_pseudo_register_info[] =
242{
243 { "cwp", &builtin_type_int64 },
244 { "pstate", &builtin_type_int64 },
245 { "asi", &builtin_type_int64 },
246 { "ccr", &builtin_type_int64 },
247
248 { "d0", &builtin_type_double },
249 { "d2", &builtin_type_double },
250 { "d4", &builtin_type_double },
251 { "d6", &builtin_type_double },
252 { "d8", &builtin_type_double },
253 { "d10", &builtin_type_double },
254 { "d12", &builtin_type_double },
255 { "d14", &builtin_type_double },
256 { "d16", &builtin_type_double },
257 { "d18", &builtin_type_double },
258 { "d20", &builtin_type_double },
259 { "d22", &builtin_type_double },
260 { "d24", &builtin_type_double },
261 { "d26", &builtin_type_double },
262 { "d28", &builtin_type_double },
263 { "d30", &builtin_type_double },
264 { "d32", &builtin_type_double },
265 { "d34", &builtin_type_double },
266 { "d36", &builtin_type_double },
267 { "d38", &builtin_type_double },
268 { "d40", &builtin_type_double },
269 { "d42", &builtin_type_double },
270 { "d44", &builtin_type_double },
271 { "d46", &builtin_type_double },
272 { "d48", &builtin_type_double },
273 { "d50", &builtin_type_double },
274 { "d52", &builtin_type_double },
275 { "d54", &builtin_type_double },
276 { "d56", &builtin_type_double },
277 { "d58", &builtin_type_double },
278 { "d60", &builtin_type_double },
279 { "d62", &builtin_type_double },
280
281 { "q0", &builtin_type_long_double },
282 { "q4", &builtin_type_long_double },
283 { "q8", &builtin_type_long_double },
284 { "q12", &builtin_type_long_double },
285 { "q16", &builtin_type_long_double },
286 { "q20", &builtin_type_long_double },
287 { "q24", &builtin_type_long_double },
288 { "q28", &builtin_type_long_double },
289 { "q32", &builtin_type_long_double },
290 { "q36", &builtin_type_long_double },
291 { "q40", &builtin_type_long_double },
292 { "q44", &builtin_type_long_double },
293 { "q48", &builtin_type_long_double },
294 { "q52", &builtin_type_long_double },
295 { "q56", &builtin_type_long_double },
296 { "q60", &builtin_type_long_double }
297};
298
299/* Total number of pseudo registers. */
386c036b 300#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
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301
302/* Return the name of register REGNUM. */
303
304static const char *
305sparc64_register_name (int regnum)
306{
307 if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
308 return sparc64_register_info[regnum].name;
309
310 if (regnum >= SPARC64_NUM_REGS
311 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
312 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
313
314 return NULL;
315}
316
317/* Return the GDB type object for the "standard" data type of data in
318 register REGNUM. */
319
320static struct type *
321sparc64_register_type (struct gdbarch *gdbarch, int regnum)
322{
323 if (regnum >= SPARC64_NUM_REGS
324 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
325 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
326
327 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
328 return *sparc64_register_info[regnum].type;
329}
330
331static void
332sparc64_pseudo_register_read (struct gdbarch *gdbarch,
333 struct regcache *regcache,
e1613aba 334 int regnum, gdb_byte *buf)
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335{
336 gdb_assert (regnum >= SPARC64_NUM_REGS);
337
338 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
339 {
340 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
341 regcache_raw_read (regcache, regnum, buf);
e1613aba 342 regcache_raw_read (regcache, regnum + 1, buf + 4);
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343 }
344 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
345 {
346 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
347 regcache_raw_read (regcache, regnum, buf);
348 }
349 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
350 {
351 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
352 regcache_raw_read (regcache, regnum, buf);
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353 regcache_raw_read (regcache, regnum + 1, buf + 4);
354 regcache_raw_read (regcache, regnum + 2, buf + 8);
355 regcache_raw_read (regcache, regnum + 3, buf + 12);
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356 }
357 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
358 {
359 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
360 regcache_raw_read (regcache, regnum, buf);
e1613aba 361 regcache_raw_read (regcache, regnum + 1, buf + 8);
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362 }
363 else if (regnum == SPARC64_CWP_REGNUM
364 || regnum == SPARC64_PSTATE_REGNUM
365 || regnum == SPARC64_ASI_REGNUM
366 || regnum == SPARC64_CCR_REGNUM)
367 {
368 ULONGEST state;
369
370 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
371 switch (regnum)
372 {
3567a8ea 373 case SPARC64_CWP_REGNUM:
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374 state = (state >> 0) & ((1 << 5) - 1);
375 break;
3567a8ea 376 case SPARC64_PSTATE_REGNUM:
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377 state = (state >> 8) & ((1 << 12) - 1);
378 break;
3567a8ea 379 case SPARC64_ASI_REGNUM:
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380 state = (state >> 24) & ((1 << 8) - 1);
381 break;
3567a8ea 382 case SPARC64_CCR_REGNUM:
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383 state = (state >> 32) & ((1 << 8) - 1);
384 break;
385 }
386 store_unsigned_integer (buf, 8, state);
387 }
388}
389
390static void
391sparc64_pseudo_register_write (struct gdbarch *gdbarch,
392 struct regcache *regcache,
e1613aba 393 int regnum, const gdb_byte *buf)
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394{
395 gdb_assert (regnum >= SPARC64_NUM_REGS);
396
397 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
398 {
399 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
400 regcache_raw_write (regcache, regnum, buf);
e1613aba 401 regcache_raw_write (regcache, regnum + 1, buf + 4);
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402 }
403 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
404 {
405 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
406 regcache_raw_write (regcache, regnum, buf);
407 }
408 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
409 {
410 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
411 regcache_raw_write (regcache, regnum, buf);
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412 regcache_raw_write (regcache, regnum + 1, buf + 4);
413 regcache_raw_write (regcache, regnum + 2, buf + 8);
414 regcache_raw_write (regcache, regnum + 3, buf + 12);
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415 }
416 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
417 {
418 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
419 regcache_raw_write (regcache, regnum, buf);
e1613aba 420 regcache_raw_write (regcache, regnum + 1, buf + 8);
8b39fe56 421 }
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422 else if (regnum == SPARC64_CWP_REGNUM
423 || regnum == SPARC64_PSTATE_REGNUM
424 || regnum == SPARC64_ASI_REGNUM
425 || regnum == SPARC64_CCR_REGNUM)
426 {
427 ULONGEST state, bits;
428
429 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
430 bits = extract_unsigned_integer (buf, 8);
431 switch (regnum)
432 {
433 case SPARC64_CWP_REGNUM:
434 state |= ((bits & ((1 << 5) - 1)) << 0);
435 break;
436 case SPARC64_PSTATE_REGNUM:
437 state |= ((bits & ((1 << 12) - 1)) << 8);
438 break;
439 case SPARC64_ASI_REGNUM:
440 state |= ((bits & ((1 << 8) - 1)) << 24);
441 break;
442 case SPARC64_CCR_REGNUM:
443 state |= ((bits & ((1 << 8) - 1)) << 32);
444 break;
445 }
446 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
447 }
8b39fe56 448}
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449\f
450
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451/* Return PC of first real instruction of the function starting at
452 START_PC. */
453
454static CORE_ADDR
455sparc64_skip_prologue (CORE_ADDR start_pc)
456{
457 struct symtab_and_line sal;
458 CORE_ADDR func_start, func_end;
386c036b 459 struct sparc_frame_cache cache;
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460
461 /* This is the preferred method, find the end of the prologue by
462 using the debugging information. */
463 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
464 {
465 sal = find_pc_line (func_start, 0);
466
467 if (sal.end < func_end
468 && start_pc <= sal.end)
469 return sal.end;
470 }
471
386c036b 472 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
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473}
474
475/* Normal frames. */
476
386c036b 477static struct sparc_frame_cache *
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478sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
479{
386c036b 480 return sparc_frame_cache (next_frame, this_cache);
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481}
482
483static void
484sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
485 struct frame_id *this_id)
486{
386c036b 487 struct sparc_frame_cache *cache =
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488 sparc64_frame_cache (next_frame, this_cache);
489
490 /* This marks the outermost frame. */
491 if (cache->base == 0)
492 return;
493
494 (*this_id) = frame_id_build (cache->base, cache->pc);
495}
496
497static void
498sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
499 int regnum, int *optimizedp,
500 enum lval_type *lvalp, CORE_ADDR *addrp,
47ef841b 501 int *realnump, gdb_byte *valuep)
8b39fe56 502{
386c036b 503 struct sparc_frame_cache *cache =
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504 sparc64_frame_cache (next_frame, this_cache);
505
506 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
507 {
508 *optimizedp = 0;
509 *lvalp = not_lval;
510 *addrp = 0;
511 *realnump = -1;
512 if (valuep)
513 {
514 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
515
516 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
517 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
518 store_unsigned_integer (valuep, 8, pc);
519 }
520 return;
521 }
522
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523 /* Handle StackGhost. */
524 {
525 ULONGEST wcookie = sparc_fetch_wcookie ();
526
527 if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM)
528 {
529 *optimizedp = 0;
530 *lvalp = not_lval;
531 *addrp = 0;
532 *realnump = -1;
533 if (valuep)
534 {
535 CORE_ADDR addr = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
536 ULONGEST i7;
537
538 /* Read the value in from memory. */
539 i7 = get_frame_memory_unsigned (next_frame, addr, 8);
540 store_unsigned_integer (valuep, 8, i7 ^ wcookie);
541 }
542 return;
543 }
544 }
545
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546 /* The previous frame's `local' and `in' registers have been saved
547 in the register save area. */
548 if (!cache->frameless_p
549 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
550 {
551 *optimizedp = 0;
552 *lvalp = lval_memory;
5b2d44a0 553 *addrp = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
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554 *realnump = -1;
555 if (valuep)
556 {
557 struct gdbarch *gdbarch = get_frame_arch (next_frame);
558
559 /* Read the value in from memory. */
560 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
561 }
562 return;
563 }
564
565 /* The previous frame's `out' registers are accessable as the
566 current frame's `in' registers. */
567 if (!cache->frameless_p
568 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
569 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
570
00b25ff3
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571 *optimizedp = 0;
572 *lvalp = lval_register;
573 *addrp = 0;
574 *realnump = regnum;
575 if (valuep)
576 frame_unwind_register (next_frame, regnum, valuep);
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577}
578
579static const struct frame_unwind sparc64_frame_unwind =
580{
581 NORMAL_FRAME,
582 sparc64_frame_this_id,
583 sparc64_frame_prev_register
584};
585
586static const struct frame_unwind *
587sparc64_frame_sniffer (struct frame_info *next_frame)
588{
589 return &sparc64_frame_unwind;
590}
591\f
592
593static CORE_ADDR
594sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
595{
386c036b 596 struct sparc_frame_cache *cache =
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597 sparc64_frame_cache (next_frame, this_cache);
598
5b2d44a0 599 return cache->base;
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600}
601
602static const struct frame_base sparc64_frame_base =
603{
604 &sparc64_frame_unwind,
605 sparc64_frame_base_address,
606 sparc64_frame_base_address,
607 sparc64_frame_base_address
608};
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609\f
610/* Check whether TYPE must be 16-byte aligned. */
611
612static int
613sparc64_16_byte_align_p (struct type *type)
614{
615 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
616 return 1;
617
618 if (sparc64_structure_or_union_p (type))
619 {
620 int i;
621
622 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
623 {
624 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
625
626 if (sparc64_16_byte_align_p (subtype))
627 return 1;
628 }
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629 }
630
631 return 0;
632}
633
634/* Store floating fields of element ELEMENT of an "parameter array"
635 that has type TYPE and is stored at BITPOS in VALBUF in the
636 apropriate registers of REGCACHE. This function can be called
637 recursively and therefore handles floating types in addition to
638 structures. */
639
640static void
641sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
e1613aba 642 const gdb_byte *valbuf, int element, int bitpos)
8b39fe56
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643{
644 gdb_assert (element < 16);
645
646 if (sparc64_floating_p (type))
647 {
648 int len = TYPE_LENGTH (type);
649 int regnum;
650
651 if (len == 16)
652 {
653 gdb_assert (bitpos == 0);
654 gdb_assert ((element % 2) == 0);
655
656 regnum = SPARC64_Q0_REGNUM + element / 2;
657 regcache_cooked_write (regcache, regnum, valbuf);
658 }
659 else if (len == 8)
660 {
661 gdb_assert (bitpos == 0 || bitpos == 64);
662
663 regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
664 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
665 }
666 else
667 {
668 gdb_assert (len == 4);
669 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
670
671 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
672 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
673 }
674 }
675 else if (sparc64_structure_or_union_p (type))
676 {
677 int i;
678
679 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
680 {
681 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
682 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
683
684 sparc64_store_floating_fields (regcache, subtype, valbuf,
685 element, subpos);
686 }
200cc553
MK
687
688 /* GCC has an interesting bug. If TYPE is a structure that has
689 a single `float' member, GCC doesn't treat it as a structure
690 at all, but rather as an ordinary `float' argument. This
691 argument will be stored in %f1, as required by the psABI.
692 However, as a member of a structure the psABI requires it to
5154b0cd
MK
693 be stored in %f0. This bug is present in GCC 3.3.2, but
694 probably in older releases to. To appease GCC, if a
695 structure has only a single `float' member, we store its
696 value in %f1 too (we already have stored in %f0). */
200cc553
MK
697 if (TYPE_NFIELDS (type) == 1)
698 {
699 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
700
701 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
702 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
703 }
8b39fe56
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704 }
705}
706
707/* Fetch floating fields from a variable of type TYPE from the
708 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
709 in VALBUF. This function can be called recursively and therefore
710 handles floating types in addition to structures. */
711
712static void
713sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
e1613aba 714 gdb_byte *valbuf, int bitpos)
8b39fe56
MK
715{
716 if (sparc64_floating_p (type))
717 {
718 int len = TYPE_LENGTH (type);
719 int regnum;
720
721 if (len == 16)
722 {
723 gdb_assert (bitpos == 0 || bitpos == 128);
724
725 regnum = SPARC64_Q0_REGNUM + bitpos / 128;
726 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
727 }
728 else if (len == 8)
729 {
730 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
731
732 regnum = SPARC64_D0_REGNUM + bitpos / 64;
733 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
734 }
735 else
736 {
737 gdb_assert (len == 4);
738 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
739
740 regnum = SPARC_F0_REGNUM + bitpos / 32;
741 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
742 }
743 }
744 else if (sparc64_structure_or_union_p (type))
745 {
746 int i;
747
748 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
749 {
750 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
751 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
752
753 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
754 }
8b39fe56
MK
755 }
756}
757
758/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
759 non-zero) in REGCACHE and on the stack (starting from address SP). */
760
761static CORE_ADDR
762sparc64_store_arguments (struct regcache *regcache, int nargs,
763 struct value **args, CORE_ADDR sp,
764 int struct_return, CORE_ADDR struct_addr)
765{
766 /* Number of extended words in the "parameter array". */
767 int num_elements = 0;
768 int element = 0;
769 int i;
770
771 /* Take BIAS into account. */
772 sp += BIAS;
773
774 /* First we calculate the number of extended words in the "parameter
775 array". While doing so we also convert some of the arguments. */
776
777 if (struct_return)
778 num_elements++;
779
780 for (i = 0; i < nargs; i++)
781 {
4991999e 782 struct type *type = value_type (args[i]);
8b39fe56
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783 int len = TYPE_LENGTH (type);
784
785 if (sparc64_structure_or_union_p (type))
786 {
787 /* Structure or Union arguments. */
788 if (len <= 16)
789 {
790 if (num_elements % 2 && sparc64_16_byte_align_p (type))
791 num_elements++;
792 num_elements += ((len + 7) / 8);
793 }
794 else
795 {
796 /* The psABI says that "Structures or unions larger than
797 sixteen bytes are copied by the caller and passed
798 indirectly; the caller will pass the address of a
799 correctly aligned structure value. This sixty-four
800 bit address will occupy one word in the parameter
801 array, and may be promoted to an %o register like any
802 other pointer value." Allocate memory for these
803 values on the stack. */
804 sp -= len;
805
806 /* Use 16-byte alignment for these values. That's
807 always correct, and wasting a few bytes shouldn't be
808 a problem. */
809 sp &= ~0xf;
810
0fd88904 811 write_memory (sp, value_contents (args[i]), len);
8b39fe56
MK
812 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
813 num_elements++;
814 }
815 }
816 else if (sparc64_floating_p (type))
817 {
818 /* Floating arguments. */
819
820 if (len == 16)
821 {
822 /* The psABI says that "Each quad-precision parameter
823 value will be assigned to two extended words in the
824 parameter array. */
825 num_elements += 2;
826
827 /* The psABI says that "Long doubles must be
828 quad-aligned, and thus a hole might be introduced
829 into the parameter array to force alignment." Skip
830 an element if necessary. */
831 if (num_elements % 2)
832 num_elements++;
833 }
834 else
835 num_elements++;
836 }
837 else
838 {
839 /* Integral and pointer arguments. */
840 gdb_assert (sparc64_integral_or_pointer_p (type));
841
842 /* The psABI says that "Each argument value of integral type
843 smaller than an extended word will be widened by the
844 caller to an extended word according to the signed-ness
845 of the argument type." */
846 if (len < 8)
847 args[i] = value_cast (builtin_type_int64, args[i]);
848 num_elements++;
849 }
850 }
851
852 /* Allocate the "parameter array". */
853 sp -= num_elements * 8;
854
855 /* The psABI says that "Every stack frame must be 16-byte aligned." */
856 sp &= ~0xf;
857
858 /* Now we store the arguments in to the "paramater array". Some
859 Integer or Pointer arguments and Structure or Union arguments
860 will be passed in %o registers. Some Floating arguments and
861 floating members of structures are passed in floating-point
862 registers. However, for functions with variable arguments,
863 floating arguments are stored in an %0 register, and for
864 functions without a prototype floating arguments are stored in
865 both a floating-point and an %o registers, or a floating-point
866 register and memory. To simplify the logic here we always pass
867 arguments in memory, an %o register, and a floating-point
868 register if appropriate. This should be no problem since the
869 contents of any unused memory or registers in the "parameter
870 array" are undefined. */
871
872 if (struct_return)
873 {
874 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
875 element++;
876 }
877
878 for (i = 0; i < nargs; i++)
879 {
e1613aba 880 const gdb_byte *valbuf = value_contents (args[i]);
4991999e 881 struct type *type = value_type (args[i]);
8b39fe56
MK
882 int len = TYPE_LENGTH (type);
883 int regnum = -1;
e1613aba 884 gdb_byte buf[16];
8b39fe56
MK
885
886 if (sparc64_structure_or_union_p (type))
887 {
888 /* Structure or Union arguments. */
889 gdb_assert (len <= 16);
890 memset (buf, 0, sizeof (buf));
891 valbuf = memcpy (buf, valbuf, len);
892
893 if (element % 2 && sparc64_16_byte_align_p (type))
894 element++;
895
896 if (element < 6)
897 {
898 regnum = SPARC_O0_REGNUM + element;
899 if (len > 8 && element < 5)
900 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
901 }
902
903 if (element < 16)
904 sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
905 }
906 else if (sparc64_floating_p (type))
907 {
908 /* Floating arguments. */
909 if (len == 16)
910 {
911 if (element % 2)
912 element++;
913 if (element < 16)
914 regnum = SPARC64_Q0_REGNUM + element / 2;
915 }
916 else if (len == 8)
917 {
918 if (element < 16)
919 regnum = SPARC64_D0_REGNUM + element;
920 }
921 else
922 {
923 /* The psABI says "Each single-precision parameter value
924 will be assigned to one extended word in the
925 parameter array, and right-justified within that
926 word; the left half (even floatregister) is
927 undefined." Even though the psABI says that "the
928 left half is undefined", set it to zero here. */
929 memset (buf, 0, 4);
8ada74e3
MK
930 memcpy (buf + 4, valbuf, 4);
931 valbuf = buf;
8b39fe56
MK
932 len = 8;
933 if (element < 16)
8ada74e3 934 regnum = SPARC64_D0_REGNUM + element;
8b39fe56
MK
935 }
936 }
937 else
938 {
939 /* Integral and pointer arguments. */
940 gdb_assert (len == 8);
941 if (element < 6)
942 regnum = SPARC_O0_REGNUM + element;
943 }
944
945 if (regnum != -1)
946 {
947 regcache_cooked_write (regcache, regnum, valbuf);
948
949 /* If we're storing the value in a floating-point register,
950 also store it in the corresponding %0 register(s). */
951 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
952 {
953 gdb_assert (element < 6);
954 regnum = SPARC_O0_REGNUM + element;
955 regcache_cooked_write (regcache, regnum, valbuf);
956 }
957 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
958 {
959 gdb_assert (element < 6);
960 regnum = SPARC_O0_REGNUM + element;
961 regcache_cooked_write (regcache, regnum, valbuf);
d47079be 962 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
8b39fe56
MK
963 }
964 }
965
c4f2d4d7 966 /* Always store the argument in memory. */
8b39fe56
MK
967 write_memory (sp + element * 8, valbuf, len);
968 element += ((len + 7) / 8);
969 }
970
971 gdb_assert (element == num_elements);
972
973 /* Take BIAS into account. */
974 sp -= BIAS;
975 return sp;
976}
977
978static CORE_ADDR
7d9b040b 979sparc64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8b39fe56
MK
980 struct regcache *regcache, CORE_ADDR bp_addr,
981 int nargs, struct value **args, CORE_ADDR sp,
982 int struct_return, CORE_ADDR struct_addr)
983{
984 /* Set return address. */
985 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
986
987 /* Set up function arguments. */
988 sp = sparc64_store_arguments (regcache, nargs, args, sp,
989 struct_return, struct_addr);
990
991 /* Allocate the register save area. */
992 sp -= 16 * 8;
993
994 /* Stack should be 16-byte aligned at this point. */
3567a8ea 995 gdb_assert ((sp + BIAS) % 16 == 0);
8b39fe56
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996
997 /* Finally, update the stack pointer. */
998 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
999
5b2d44a0 1000 return sp + BIAS;
8b39fe56
MK
1001}
1002\f
1003
1004/* Extract from an array REGBUF containing the (raw) register state, a
1005 function return value of TYPE, and copy that into VALBUF. */
1006
1007static void
1008sparc64_extract_return_value (struct type *type, struct regcache *regcache,
e1613aba 1009 gdb_byte *valbuf)
8b39fe56
MK
1010{
1011 int len = TYPE_LENGTH (type);
e1613aba 1012 gdb_byte buf[32];
8b39fe56
MK
1013 int i;
1014
1015 if (sparc64_structure_or_union_p (type))
1016 {
1017 /* Structure or Union return values. */
1018 gdb_assert (len <= 32);
1019
1020 for (i = 0; i < ((len + 7) / 8); i++)
1021 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1022 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1023 sparc64_extract_floating_fields (regcache, type, buf, 0);
1024 memcpy (valbuf, buf, len);
1025 }
1026 else if (sparc64_floating_p (type))
1027 {
1028 /* Floating return values. */
1029 for (i = 0; i < len / 4; i++)
1030 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1031 memcpy (valbuf, buf, len);
1032 }
1033 else
1034 {
1035 /* Integral and pointer return values. */
1036 gdb_assert (sparc64_integral_or_pointer_p (type));
1037
1038 /* Just stripping off any unused bytes should preserve the
1039 signed-ness just fine. */
1040 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1041 memcpy (valbuf, buf + 8 - len, len);
1042 }
1043}
1044
1045/* Write into the appropriate registers a function return value stored
1046 in VALBUF of type TYPE. */
1047
1048static void
1049sparc64_store_return_value (struct type *type, struct regcache *regcache,
e1613aba 1050 const gdb_byte *valbuf)
8b39fe56
MK
1051{
1052 int len = TYPE_LENGTH (type);
e1613aba 1053 gdb_byte buf[16];
8b39fe56
MK
1054 int i;
1055
1056 if (sparc64_structure_or_union_p (type))
1057 {
1058 /* Structure or Union return values. */
1059 gdb_assert (len <= 32);
1060
1061 /* Simplify matters by storing the complete value (including
1062 floating members) into %o0 and %o1. Floating members are
1063 also store in the appropriate floating-point registers. */
1064 memset (buf, 0, sizeof (buf));
1065 memcpy (buf, valbuf, len);
1066 for (i = 0; i < ((len + 7) / 8); i++)
60af1db2 1067 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
8b39fe56
MK
1068 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1069 sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1070 }
1071 else if (sparc64_floating_p (type))
1072 {
1073 /* Floating return values. */
1074 memcpy (buf, valbuf, len);
1075 for (i = 0; i < len / 4; i++)
1076 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1077 }
1078 else
1079 {
1080 /* Integral and pointer return values. */
1081 gdb_assert (sparc64_integral_or_pointer_p (type));
1082
1083 /* ??? Do we need to do any sign-extension here? */
1084 memset (buf, 0, 8);
1085 memcpy (buf + 8 - len, valbuf, len);
1086 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1087 }
1088}
1089
60af1db2
MK
1090static enum return_value_convention
1091sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
e1613aba
MK
1092 struct regcache *regcache, gdb_byte *readbuf,
1093 const gdb_byte *writebuf)
8b39fe56 1094{
60af1db2
MK
1095 if (TYPE_LENGTH (type) > 32)
1096 return RETURN_VALUE_STRUCT_CONVENTION;
1097
1098 if (readbuf)
1099 sparc64_extract_return_value (type, regcache, readbuf);
1100 if (writebuf)
1101 sparc64_store_return_value (type, regcache, writebuf);
1102
1103 return RETURN_VALUE_REGISTER_CONVENTION;
8b39fe56 1104}
8b39fe56 1105\f
8b39fe56 1106
02a71ae8
MK
1107static void
1108sparc64_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
1109 struct dwarf2_frame_state_reg *reg)
1110{
1111 switch (regnum)
1112 {
1113 case SPARC_G0_REGNUM:
1114 /* Since %g0 is always zero, there is no point in saving it, and
1115 people will be inclined omit it from the CFI. Make sure we
1116 don't warn about that. */
1117 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
1118 break;
1119 case SPARC_SP_REGNUM:
1120 reg->how = DWARF2_FRAME_REG_CFA;
1121 break;
1122 case SPARC64_PC_REGNUM:
1123 reg->how = DWARF2_FRAME_REG_RA_OFFSET;
1124 reg->loc.offset = 8;
1125 break;
1126 case SPARC64_NPC_REGNUM:
1127 reg->how = DWARF2_FRAME_REG_RA_OFFSET;
1128 reg->loc.offset = 12;
1129 break;
1130 }
1131}
1132
8b39fe56 1133void
386c036b 1134sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
8b39fe56 1135{
386c036b 1136 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8b39fe56 1137
386c036b
MK
1138 tdep->pc_regnum = SPARC64_PC_REGNUM;
1139 tdep->npc_regnum = SPARC64_NPC_REGNUM;
8b39fe56 1140
386c036b 1141 /* This is what all the fuss is about. */
8b39fe56
MK
1142 set_gdbarch_long_bit (gdbarch, 64);
1143 set_gdbarch_long_long_bit (gdbarch, 64);
1144 set_gdbarch_ptr_bit (gdbarch, 64);
8b39fe56
MK
1145
1146 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1147 set_gdbarch_register_name (gdbarch, sparc64_register_name);
1148 set_gdbarch_register_type (gdbarch, sparc64_register_type);
1149 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1150 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1151 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1152
1153 /* Register numbers of various important registers. */
8b39fe56 1154 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
8b39fe56
MK
1155
1156 /* Call dummy code. */
386c036b
MK
1157 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1158 set_gdbarch_push_dummy_code (gdbarch, NULL);
8b39fe56
MK
1159 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1160
60af1db2 1161 set_gdbarch_return_value (gdbarch, sparc64_return_value);
386c036b
MK
1162 set_gdbarch_stabs_argument_has_addr
1163 (gdbarch, default_stabs_argument_has_addr);
8b39fe56
MK
1164
1165 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1166
02a71ae8
MK
1167 /* Hook in the DWARF CFI frame unwinder. */
1168 dwarf2_frame_set_init_reg (gdbarch, sparc64_dwarf2_frame_init_reg);
1169 /* FIXME: kettenis/20050423: Don't enable the unwinder until the
1170 StackGhost issues have been resolved. */
1171
386c036b 1172 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
8b39fe56 1173 frame_base_set_default (gdbarch, &sparc64_frame_base);
386c036b
MK
1174}
1175\f
8b39fe56 1176
386c036b 1177/* Helper functions for dealing with register sets. */
8b39fe56 1178
386c036b
MK
1179#define TSTATE_CWP 0x000000000000001fULL
1180#define TSTATE_ICC 0x0000000f00000000ULL
1181#define TSTATE_XCC 0x000000f000000000ULL
8b39fe56 1182
386c036b
MK
1183#define PSR_S 0x00000080
1184#define PSR_ICC 0x00f00000
1185#define PSR_VERS 0x0f000000
1186#define PSR_IMPL 0xf0000000
1187#define PSR_V8PLUS 0xff000000
1188#define PSR_XCC 0x000f0000
8b39fe56 1189
3567a8ea 1190void
386c036b
MK
1191sparc64_supply_gregset (const struct sparc_gregset *gregset,
1192 struct regcache *regcache,
1193 int regnum, const void *gregs)
8b39fe56 1194{
386c036b 1195 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1196 const gdb_byte *regs = gregs;
8b39fe56
MK
1197 int i;
1198
386c036b 1199 if (sparc32)
8b39fe56 1200 {
386c036b
MK
1201 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1202 {
1203 int offset = gregset->r_tstate_offset;
1204 ULONGEST tstate, psr;
e1613aba 1205 gdb_byte buf[4];
386c036b
MK
1206
1207 tstate = extract_unsigned_integer (regs + offset, 8);
1208 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1209 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1210 store_unsigned_integer (buf, 4, psr);
1211 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1212 }
1213
1214 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1215 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1216 regs + gregset->r_pc_offset + 4);
1217
1218 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1219 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1220 regs + gregset->r_npc_offset + 4);
8b39fe56 1221
386c036b 1222 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1223 {
386c036b
MK
1224 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1225 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK
1226 }
1227 }
1228 else
1229 {
386c036b
MK
1230 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1231 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1232 regs + gregset->r_tstate_offset);
8b39fe56 1233
386c036b
MK
1234 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1235 regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1236 regs + gregset->r_pc_offset);
1237
1238 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1239 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1240 regs + gregset->r_npc_offset);
1241
1242 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1243 {
e1613aba 1244 gdb_byte buf[8];
386c036b
MK
1245
1246 memset (buf, 0, 8);
1247 memcpy (buf + 8 - gregset->r_y_size,
1248 regs + gregset->r_y_offset, gregset->r_y_size);
1249 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
3567a8ea 1250 }
8b39fe56 1251
386c036b
MK
1252 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1253 && gregset->r_fprs_offset != -1)
1254 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1255 regs + gregset->r_fprs_offset);
1256 }
1257
1258 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1259 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1260
1261 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1262 {
1263 int offset = gregset->r_g1_offset;
1264
1265 if (sparc32)
1266 offset += 4;
1267
1268 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
8b39fe56 1269 {
3567a8ea 1270 if (regnum == i || regnum == -1)
386c036b
MK
1271 regcache_raw_supply (regcache, i, regs + offset);
1272 offset += 8;
1273 }
1274 }
1275
1276 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1277 {
1278 /* Not all of the register set variants include Locals and
1279 Inputs. For those that don't, we read them off the stack. */
1280 if (gregset->r_l0_offset == -1)
1281 {
1282 ULONGEST sp;
1283
1284 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1285 sparc_supply_rwindow (regcache, sp, regnum);
1286 }
1287 else
1288 {
1289 int offset = gregset->r_l0_offset;
1290
1291 if (sparc32)
1292 offset += 4;
1293
1294 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1295 {
386c036b
MK
1296 if (regnum == i || regnum == -1)
1297 regcache_raw_supply (regcache, i, regs + offset);
1298 offset += 8;
3567a8ea 1299 }
8b39fe56
MK
1300 }
1301 }
1302}
1303
1304void
386c036b
MK
1305sparc64_collect_gregset (const struct sparc_gregset *gregset,
1306 const struct regcache *regcache,
1307 int regnum, void *gregs)
8b39fe56 1308{
386c036b 1309 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1310 gdb_byte *regs = gregs;
3567a8ea
MK
1311 int i;
1312
386c036b 1313 if (sparc32)
8b39fe56 1314 {
386c036b
MK
1315 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1316 {
1317 int offset = gregset->r_tstate_offset;
1318 ULONGEST tstate, psr;
e1613aba 1319 gdb_byte buf[8];
386c036b
MK
1320
1321 tstate = extract_unsigned_integer (regs + offset, 8);
1322 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1323 psr = extract_unsigned_integer (buf, 4);
1324 tstate |= (psr & PSR_ICC) << 12;
1325 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1326 tstate |= (psr & PSR_XCC) << 20;
1327 store_unsigned_integer (buf, 8, tstate);
1328 memcpy (regs + offset, buf, 8);
1329 }
8b39fe56 1330
386c036b
MK
1331 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1332 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1333 regs + gregset->r_pc_offset + 4);
1334
1335 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1336 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1337 regs + gregset->r_npc_offset + 4);
1338
1339 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1340 {
386c036b
MK
1341 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1342 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK
1343 }
1344 }
1345 else
1346 {
386c036b
MK
1347 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1348 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1349 regs + gregset->r_tstate_offset);
1350
1351 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1352 regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1353 regs + gregset->r_pc_offset);
3567a8ea 1354
386c036b
MK
1355 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1356 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1357 regs + gregset->r_npc_offset);
3567a8ea 1358
386c036b 1359 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1360 {
e1613aba 1361 gdb_byte buf[8];
386c036b
MK
1362
1363 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1364 memcpy (regs + gregset->r_y_offset,
1365 buf + 8 - gregset->r_y_size, gregset->r_y_size);
1366 }
1367
1368 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1369 && gregset->r_fprs_offset != -1)
1370 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1371 regs + gregset->r_fprs_offset);
1372
1373 }
1374
1375 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1376 {
1377 int offset = gregset->r_g1_offset;
1378
1379 if (sparc32)
1380 offset += 4;
1381
1382 /* %g0 is always zero. */
1383 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1384 {
1385 if (regnum == i || regnum == -1)
1386 regcache_raw_collect (regcache, i, regs + offset);
1387 offset += 8;
1388 }
1389 }
1390
1391 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1392 {
1393 /* Not all of the register set variants include Locals and
1394 Inputs. For those that don't, we read them off the stack. */
1395 if (gregset->r_l0_offset != -1)
1396 {
1397 int offset = gregset->r_l0_offset;
1398
1399 if (sparc32)
1400 offset += 4;
1401
1402 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1403 {
386c036b
MK
1404 if (regnum == i || regnum == -1)
1405 regcache_raw_collect (regcache, i, regs + offset);
1406 offset += 8;
3567a8ea
MK
1407 }
1408 }
8b39fe56
MK
1409 }
1410}
8b39fe56 1411
386c036b
MK
1412void
1413sparc64_supply_fpregset (struct regcache *regcache,
1414 int regnum, const void *fpregs)
1415{
1416 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1417 const gdb_byte *regs = fpregs;
386c036b
MK
1418 int i;
1419
1420 for (i = 0; i < 32; i++)
1421 {
1422 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1423 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1424 }
1425
1426 if (sparc32)
1427 {
1428 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1429 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1430 regs + (32 * 4) + (16 * 8) + 4);
1431 }
1432 else
1433 {
1434 for (i = 0; i < 16; i++)
1435 {
1436 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1437 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1438 regs + (32 * 4) + (i * 8));
1439 }
1440
1441 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1442 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1443 regs + (32 * 4) + (16 * 8));
1444 }
1445}
8b39fe56
MK
1446
1447void
386c036b
MK
1448sparc64_collect_fpregset (const struct regcache *regcache,
1449 int regnum, void *fpregs)
8b39fe56 1450{
386c036b 1451 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
e1613aba 1452 gdb_byte *regs = fpregs;
386c036b
MK
1453 int i;
1454
1455 for (i = 0; i < 32; i++)
1456 {
1457 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1458 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1459 }
1460
1461 if (sparc32)
1462 {
1463 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1464 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1465 regs + (32 * 4) + (16 * 8) + 4);
1466 }
1467 else
1468 {
1469 for (i = 0; i < 16; i++)
1470 {
1471 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1472 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1473 regs + (32 * 4) + (i * 8));
1474 }
1475
1476 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1477 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1478 regs + (32 * 4) + (16 * 8));
1479 }
8b39fe56 1480}
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