[deliverable/binutils-gdb.git] / gdb / spu-multiarch.c

/* Cell SPU GNU/Linux multi-architecture debugging support.
   Copyright (C) 2009-2018 Free Software Foundation, Inc.

   Contributed by Ulrich Weigand <uweigand@de.ibm.com>.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "gdbcore.h"
#include "gdbcmd.h"
#include "arch-utils.h"
#include "observable.h"
#include "inferior.h"
#include "regcache.h"
#include "symfile.h"
#include "objfiles.h"
#include "solib.h"
#include "solist.h"

#include "ppc-tdep.h"
#include "ppc-linux-tdep.h"
#include "spu-tdep.h"

/* This module's target vector.  */
static struct target_ops spu_ops;

/* Number of SPE objects loaded into the current inferior.  */
static int spu_nr_solib;

/* Stand-alone SPE executable?  */
#define spu_standalone_p() \
  (symfile_objfile && symfile_objfile->obfd \
   && bfd_get_arch (symfile_objfile->obfd) == bfd_arch_spu)

/* PPU side system calls.  */
#define INSTR_SC	0x44000002
#define NR_spu_run	0x0116

/* If the PPU thread is currently stopped on a spu_run system call,
   return to FD and ADDR the file handle and NPC parameter address
   used with the system call.  Return non-zero if successful.  */
static int
parse_spufs_run (ptid_t ptid, int *fd, CORE_ADDR *addr)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  struct gdbarch_tdep *tdep;
  struct regcache *regcache;
  gdb_byte buf[4];
  ULONGEST regval;

  /* If we're not on PPU, there's nothing to detect.  */
  if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_powerpc)
    return 0;

  /* If we're called too early (e.g. after fork), we cannot
     access the inferior yet.  */
  if (find_inferior_ptid (ptid) == NULL)
    return 0;

  /* Get PPU-side registers.  */
  regcache = get_thread_arch_regcache (ptid, target_gdbarch ());
  tdep = gdbarch_tdep (target_gdbarch ());

  /* Fetch instruction preceding current NIP.  */
  {
    scoped_restore save_inferior_ptid = make_scoped_restore (&inferior_ptid);
    inferior_ptid = ptid;
    regval = target_read_memory (regcache_read_pc (regcache) - 4, buf, 4);
  }
  if (regval != 0)
    return 0;
  /* It should be a "sc" instruction.  */
  if (extract_unsigned_integer (buf, 4, byte_order) != INSTR_SC)
    return 0;
  /* System call number should be NR_spu_run.  */
  regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum, &regval);
  if (regval != NR_spu_run)
    return 0;

  /* Register 3 contains fd, register 4 the NPC param pointer.  */
  regcache_cooked_read_unsigned (regcache, PPC_ORIG_R3_REGNUM, &regval);
  *fd = (int) regval;
  regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 4, &regval);
  *addr = (CORE_ADDR) regval;
  return 1;
}

/* Find gdbarch for SPU context SPUFS_FD.  */
static struct gdbarch *
spu_gdbarch (int spufs_fd)
{
  struct gdbarch_info info;
  gdbarch_info_init (&info);
  info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
  info.byte_order = BFD_ENDIAN_BIG;
  info.osabi = GDB_OSABI_LINUX;
  info.id = &spufs_fd;
  return gdbarch_find_by_info (info);
}

/* Override the to_thread_architecture routine.  */
static struct gdbarch *
spu_thread_architecture (struct target_ops *ops, ptid_t ptid)
{
  int spufs_fd;
  CORE_ADDR spufs_addr;

  if (parse_spufs_run (ptid, &spufs_fd, &spufs_addr))
    return spu_gdbarch (spufs_fd);

  target_ops *beneath = find_target_beneath (ops);
  return beneath->to_thread_architecture (beneath, ptid);
}

/* Override the to_region_ok_for_hw_watchpoint routine.  */
static int
spu_region_ok_for_hw_watchpoint (struct target_ops *self,
				 CORE_ADDR addr, int len)
{
  struct target_ops *ops_beneath = find_target_beneath (self);

  /* We cannot watch SPU local store.  */
  if (SPUADDR_SPU (addr) != -1)
    return 0;

  return ops_beneath->to_region_ok_for_hw_watchpoint (ops_beneath, addr, len);
}

/* Override the to_fetch_registers routine.  */
static void
spu_fetch_registers (struct target_ops *ops,
		     struct regcache *regcache, int regno)
{
  struct gdbarch *gdbarch = regcache->arch ();
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  struct target_ops *ops_beneath = find_target_beneath (ops);
  int spufs_fd;
  CORE_ADDR spufs_addr;

  /* Since we use functions that rely on inferior_ptid, we need to set and
     restore it.  */
  scoped_restore save_ptid
    = make_scoped_restore (&inferior_ptid, regcache_get_ptid (regcache));

  /* This version applies only if we're currently in spu_run.  */
  if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
    {
      ops_beneath->to_fetch_registers (ops_beneath, regcache, regno);
      return;
    }

  /* We must be stopped on a spu_run system call.  */
  if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
    return;

  /* The ID register holds the spufs file handle.  */
  if (regno == -1 || regno == SPU_ID_REGNUM)
    {
      gdb_byte buf[4];
      store_unsigned_integer (buf, 4, byte_order, spufs_fd);
      regcache_raw_supply (regcache, SPU_ID_REGNUM, buf);
    }

  /* The NPC register is found in PPC memory at SPUFS_ADDR.  */
  if (regno == -1 || regno == SPU_PC_REGNUM)
    {
      gdb_byte buf[4];

      if (target_read (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
		       buf, spufs_addr, sizeof buf) == sizeof buf)
	regcache_raw_supply (regcache, SPU_PC_REGNUM, buf);
    }

  /* The GPRs are found in the "regs" spufs file.  */
  if (regno == -1 || (regno >= 0 && regno < SPU_NUM_GPRS))
    {
      gdb_byte buf[16 * SPU_NUM_GPRS];
      char annex[32];
      int i;

      xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
      if (target_read (ops_beneath, TARGET_OBJECT_SPU, annex,
		       buf, 0, sizeof buf) == sizeof buf)
	for (i = 0; i < SPU_NUM_GPRS; i++)
	  regcache_raw_supply (regcache, i, buf + i*16);
    }
}

/* Override the to_store_registers routine.  */
static void
spu_store_registers (struct target_ops *ops,
		     struct regcache *regcache, int regno)
{
  struct gdbarch *gdbarch = regcache->arch ();
  struct target_ops *ops_beneath = find_target_beneath (ops);
  int spufs_fd;
  CORE_ADDR spufs_addr;

  /* Since we use functions that rely on inferior_ptid, we need to set and
     restore it.  */
  scoped_restore save_ptid
    = make_scoped_restore (&inferior_ptid, regcache_get_ptid (regcache));

  /* This version applies only if we're currently in spu_run.  */
  if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
    {
      ops_beneath->to_store_registers (ops_beneath, regcache, regno);
      return;
    }

  /* We must be stopped on a spu_run system call.  */
  if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
    return;

  /* The NPC register is found in PPC memory at SPUFS_ADDR.  */
  if (regno == -1 || regno == SPU_PC_REGNUM)
    {
      gdb_byte buf[4];
      regcache_raw_collect (regcache, SPU_PC_REGNUM, buf);

      target_write (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
		    buf, spufs_addr, sizeof buf);
    }

  /* The GPRs are found in the "regs" spufs file.  */
  if (regno == -1 || (regno >= 0 && regno < SPU_NUM_GPRS))
    {
      gdb_byte buf[16 * SPU_NUM_GPRS];
      char annex[32];
      int i;

      for (i = 0; i < SPU_NUM_GPRS; i++)
	regcache_raw_collect (regcache, i, buf + i*16);

      xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
      target_write (ops_beneath, TARGET_OBJECT_SPU, annex,
		    buf, 0, sizeof buf);
    }
}

/* Override the to_xfer_partial routine.  */
static enum target_xfer_status
spu_xfer_partial (struct target_ops *ops, enum target_object object,
		  const char *annex, gdb_byte *readbuf,
		  const gdb_byte *writebuf, ULONGEST offset, ULONGEST len,
		  ULONGEST *xfered_len)
{
  struct target_ops *ops_beneath = find_target_beneath (ops);

  /* Use the "mem" spufs file to access SPU local store.  */
  if (object == TARGET_OBJECT_MEMORY)
    {
      int fd = SPUADDR_SPU (offset);
      CORE_ADDR addr = SPUADDR_ADDR (offset);
      char mem_annex[32], lslr_annex[32];
      gdb_byte buf[32];
      ULONGEST lslr;
      enum target_xfer_status ret;

      if (fd >= 0)
	{
	  xsnprintf (mem_annex, sizeof mem_annex, "%d/mem", fd);
	  ret = ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
					      mem_annex, readbuf, writebuf,
					      addr, len, xfered_len);
	  if (ret == TARGET_XFER_OK)
	    return ret;

	  /* SPU local store access wraps the address around at the
	     local store limit.  We emulate this here.  To avoid needing
	     an extra access to retrieve the LSLR, we only do that after
	     trying the original address first, and getting end-of-file.  */
	  xsnprintf (lslr_annex, sizeof lslr_annex, "%d/lslr", fd);
	  memset (buf, 0, sizeof buf);
	  if (ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
					    lslr_annex, buf, NULL,
					    0, sizeof buf, xfered_len)
	      != TARGET_XFER_OK)
	    return ret;

	  lslr = strtoulst ((char *) buf, NULL, 16);
	  return ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
					       mem_annex, readbuf, writebuf,
					       addr & lslr, len, xfered_len);
	}
    }

  return ops_beneath->to_xfer_partial (ops_beneath, object, annex,
				       readbuf, writebuf, offset, len, xfered_len);
}

/* Override the to_search_memory routine.  */
static int
spu_search_memory (struct target_ops* ops,
		   CORE_ADDR start_addr, ULONGEST search_space_len,
		   const gdb_byte *pattern, ULONGEST pattern_len,
		   CORE_ADDR *found_addrp)
{
  struct target_ops *ops_beneath = find_target_beneath (ops);

  /* For SPU local store, always fall back to the simple method.  */
  if (SPUADDR_SPU (start_addr) >= 0)
    return simple_search_memory (ops,
				 start_addr, search_space_len,
				 pattern, pattern_len, found_addrp);

  return ops_beneath->to_search_memory (ops_beneath,
					start_addr, search_space_len,
					pattern, pattern_len, found_addrp);
}


/* Push and pop the SPU multi-architecture support target.  */

static void
spu_multiarch_activate (void)
{
  /* If GDB was configured without SPU architecture support,
     we cannot install SPU multi-architecture support either.  */
  if (spu_gdbarch (-1) == NULL)
    return;

  push_target (&spu_ops);

  /* Make sure the thread architecture is re-evaluated.  */
  registers_changed ();
}

static void
spu_multiarch_deactivate (void)
{
  unpush_target (&spu_ops);

  /* Make sure the thread architecture is re-evaluated.  */
  registers_changed ();
}

static void
spu_multiarch_inferior_created (struct target_ops *ops, int from_tty)
{
  if (spu_standalone_p ())
    spu_multiarch_activate ();
}

static void
spu_multiarch_solib_loaded (struct so_list *so)
{
  if (!spu_standalone_p ())
    if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
      if (spu_nr_solib++ == 0)
	spu_multiarch_activate ();
}

static void
spu_multiarch_solib_unloaded (struct so_list *so)
{
  if (!spu_standalone_p ())
    if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
      if (--spu_nr_solib == 0)
	spu_multiarch_deactivate ();
}

static void
spu_mourn_inferior (struct target_ops *ops)
{
  struct target_ops *ops_beneath = find_target_beneath (ops);

  ops_beneath->to_mourn_inferior (ops_beneath);
  spu_multiarch_deactivate ();
}


/* Initialize the SPU multi-architecture support target.  */

static void
init_spu_ops (void)
{
  spu_ops.to_shortname = "spu";
  spu_ops.to_longname = "SPU multi-architecture support.";
  spu_ops.to_doc = "SPU multi-architecture support.";
  spu_ops.to_mourn_inferior = spu_mourn_inferior;
  spu_ops.to_fetch_registers = spu_fetch_registers;
  spu_ops.to_store_registers = spu_store_registers;
  spu_ops.to_xfer_partial = spu_xfer_partial;
  spu_ops.to_search_memory = spu_search_memory;
  spu_ops.to_region_ok_for_hw_watchpoint = spu_region_ok_for_hw_watchpoint;
  spu_ops.to_thread_architecture = spu_thread_architecture;
  spu_ops.to_stratum = arch_stratum;
  spu_ops.to_magic = OPS_MAGIC;
}

void
_initialize_spu_multiarch (void)
{
  /* Install ourselves on the target stack.  */
  init_spu_ops ();
  complete_target_initialization (&spu_ops);

  /* Install observers to watch for SPU objects.  */
  gdb::observers::inferior_created.attach (spu_multiarch_inferior_created);
  gdb::observers::solib_loaded.attach (spu_multiarch_solib_loaded);
  gdb::observers::solib_unloaded.attach (spu_multiarch_solib_unloaded);
}
Commit	Line	Data
85e747d2	1	/* Cell SPU GNU/Linux multi-architecture debugging support.
e2882c85	2	Copyright (C) 2009-2018 Free Software Foundation, Inc.
85e747d2 UW	3
	4	Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
dcf7800b	10	the Free Software Foundation; either version 3 of the License, or
85e747d2 UW	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
dcf7800b	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
85e747d2 UW	20
	21	#include "defs.h"
	22	#include "gdbcore.h"
	23	#include "gdbcmd.h"
85e747d2	24	#include "arch-utils.h"
76727919	25	#include "observable.h"
85e747d2 UW	26	#include "inferior.h"
	27	#include "regcache.h"
	28	#include "symfile.h"
	29	#include "objfiles.h"
	30	#include "solib.h"
	31	#include "solist.h"
	32
	33	#include "ppc-tdep.h"
	34	#include "ppc-linux-tdep.h"
	35	#include "spu-tdep.h"
	36
	37	/* This module's target vector. */
	38	static struct target_ops spu_ops;
	39
	40	/* Number of SPE objects loaded into the current inferior. */
	41	static int spu_nr_solib;
	42
	43	/* Stand-alone SPE executable? */
	44	#define spu_standalone_p() \
	45	(symfile_objfile && symfile_objfile->obfd \
	46	&& bfd_get_arch (symfile_objfile->obfd) == bfd_arch_spu)
	47
	48	/* PPU side system calls. */
	49	#define INSTR_SC 0x44000002
	50	#define NR_spu_run 0x0116
	51
	52	/* If the PPU thread is currently stopped on a spu_run system call,
	53	return to FD and ADDR the file handle and NPC parameter address
	54	used with the system call. Return non-zero if successful. */
	55	static int
	56	parse_spufs_run (ptid_t ptid, int fd, CORE_ADDR addr)
	57	{
f5656ead	58	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
85e747d2 UW	59	struct gdbarch_tdep *tdep;
85e747d2 UW	60	struct regcache *regcache;
e362b510	61	gdb_byte buf[4];
85e747d2 UW	62	ULONGEST regval;
	63
	64	/* If we're not on PPU, there's nothing to detect. */
f5656ead	65	if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_powerpc)
85e747d2 UW	66	return 0;
85e747d2 UW	67
791bb1f4 UW	68	/* If we're called too early (e.g. after fork), we cannot
	69	access the inferior yet. */
	70	if (find_inferior_ptid (ptid) == NULL)
	71	return 0;
	72
85e747d2	73	/* Get PPU-side registers. */
f5656ead TT	74	regcache = get_thread_arch_regcache (ptid, target_gdbarch ());
f5656ead TT	75	tdep = gdbarch_tdep (target_gdbarch ());
85e747d2 UW	76
85e747d2 UW	77	/* Fetch instruction preceding current NIP. */
2989a365 TT	78	{
	79	scoped_restore save_inferior_ptid = make_scoped_restore (&inferior_ptid);
	80	inferior_ptid = ptid;
	81	regval = target_read_memory (regcache_read_pc (regcache) - 4, buf, 4);
	82	}
791bb1f4	83	if (regval != 0)
85e747d2 UW	84	return 0;
	85	/* It should be a "sc" instruction. */
	86	if (extract_unsigned_integer (buf, 4, byte_order) != INSTR_SC)
	87	return 0;
	88	/* System call number should be NR_spu_run. */
	89	regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum, &regval);
	90	if (regval != NR_spu_run)
	91	return 0;
	92
	93	/* Register 3 contains fd, register 4 the NPC param pointer. */
	94	regcache_cooked_read_unsigned (regcache, PPC_ORIG_R3_REGNUM, &regval);
	95	*fd = (int) regval;
	96	regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 4, &regval);
	97	*addr = (CORE_ADDR) regval;
	98	return 1;
	99	}
	100
	101	/* Find gdbarch for SPU context SPUFS_FD. */
	102	static struct gdbarch *
	103	spu_gdbarch (int spufs_fd)
	104	{
	105	struct gdbarch_info info;
	106	gdbarch_info_init (&info);
	107	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
	108	info.byte_order = BFD_ENDIAN_BIG;
	109	info.osabi = GDB_OSABI_LINUX;
0dba2a6c	110	info.id = &spufs_fd;
85e747d2 UW	111	return gdbarch_find_by_info (info);
	112	}
	113
	114	/* Override the to_thread_architecture routine. */
	115	static struct gdbarch *
	116	spu_thread_architecture (struct target_ops *ops, ptid_t ptid)
	117	{
	118	int spufs_fd;
	119	CORE_ADDR spufs_addr;
	120
	121	if (parse_spufs_run (ptid, &spufs_fd, &spufs_addr))
	122	return spu_gdbarch (spufs_fd);
	123
5cd63fda PA	124	target_ops *beneath = find_target_beneath (ops);
5cd63fda PA	125	return beneath->to_thread_architecture (beneath, ptid);
85e747d2 UW	126	}
	127
	128	/* Override the to_region_ok_for_hw_watchpoint routine. */
	129	static int
31568a15 TT	130	spu_region_ok_for_hw_watchpoint (struct target_ops *self,
31568a15 TT	131	CORE_ADDR addr, int len)
85e747d2	132	{
44e89118	133	struct target_ops *ops_beneath = find_target_beneath (self);
85e747d2 UW	134
	135	/* We cannot watch SPU local store. */
	136	if (SPUADDR_SPU (addr) != -1)
	137	return 0;
	138
e75fdfca	139	return ops_beneath->to_region_ok_for_hw_watchpoint (ops_beneath, addr, len);
85e747d2 UW	140	}
	141
	142	/* Override the to_fetch_registers routine. */
	143	static void
	144	spu_fetch_registers (struct target_ops *ops,
	145	struct regcache *regcache, int regno)
	146	{
ac7936df	147	struct gdbarch *gdbarch = regcache->arch ();
85e747d2 UW	148	enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
	149	struct target_ops *ops_beneath = find_target_beneath (ops);
	150	int spufs_fd;
	151	CORE_ADDR spufs_addr;
	152
639a9038 SM	153	/* Since we use functions that rely on inferior_ptid, we need to set and
	154	restore it. */
	155	scoped_restore save_ptid
	156	= make_scoped_restore (&inferior_ptid, regcache_get_ptid (regcache));
	157
85e747d2 UW	158	/* This version applies only if we're currently in spu_run. */
	159	if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
	160	{
85e747d2 UW	161	ops_beneath->to_fetch_registers (ops_beneath, regcache, regno);
	162	return;
	163	}
	164
	165	/* We must be stopped on a spu_run system call. */
	166	if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
	167	return;
	168
	169	/* The ID register holds the spufs file handle. */
	170	if (regno == -1 \|\| regno == SPU_ID_REGNUM)
	171	{
e362b510	172	gdb_byte buf[4];
85e747d2 UW	173	store_unsigned_integer (buf, 4, byte_order, spufs_fd);
	174	regcache_raw_supply (regcache, SPU_ID_REGNUM, buf);
	175	}
	176
	177	/* The NPC register is found in PPC memory at SPUFS_ADDR. */
	178	if (regno == -1 \|\| regno == SPU_PC_REGNUM)
	179	{
e362b510	180	gdb_byte buf[4];
85e747d2 UW	181
	182	if (target_read (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
	183	buf, spufs_addr, sizeof buf) == sizeof buf)
	184	regcache_raw_supply (regcache, SPU_PC_REGNUM, buf);
	185	}
	186
	187	/* The GPRs are found in the "regs" spufs file. */
	188	if (regno == -1 \|\| (regno >= 0 && regno < SPU_NUM_GPRS))
	189	{
e362b510 PA	190	gdb_byte buf[16 * SPU_NUM_GPRS];
e362b510 PA	191	char annex[32];
85e747d2 UW	192	int i;
	193
	194	xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
	195	if (target_read (ops_beneath, TARGET_OBJECT_SPU, annex,
	196	buf, 0, sizeof buf) == sizeof buf)
	197	for (i = 0; i < SPU_NUM_GPRS; i++)
	198	regcache_raw_supply (regcache, i, buf + i*16);
	199	}
	200	}
	201
	202	/* Override the to_store_registers routine. */
	203	static void
	204	spu_store_registers (struct target_ops *ops,
	205	struct regcache *regcache, int regno)
	206	{
ac7936df	207	struct gdbarch *gdbarch = regcache->arch ();
85e747d2 UW	208	struct target_ops *ops_beneath = find_target_beneath (ops);
	209	int spufs_fd;
	210	CORE_ADDR spufs_addr;
	211
639a9038 SM	212	/* Since we use functions that rely on inferior_ptid, we need to set and
	213	restore it. */
	214	scoped_restore save_ptid
	215	= make_scoped_restore (&inferior_ptid, regcache_get_ptid (regcache));
	216
85e747d2 UW	217	/* This version applies only if we're currently in spu_run. */
	218	if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
	219	{
85e747d2 UW	220	ops_beneath->to_store_registers (ops_beneath, regcache, regno);
	221	return;
	222	}
	223
	224	/* We must be stopped on a spu_run system call. */
	225	if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
	226	return;
	227
	228	/* The NPC register is found in PPC memory at SPUFS_ADDR. */
	229	if (regno == -1 \|\| regno == SPU_PC_REGNUM)
	230	{
e362b510	231	gdb_byte buf[4];
85e747d2 UW	232	regcache_raw_collect (regcache, SPU_PC_REGNUM, buf);
	233
	234	target_write (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
	235	buf, spufs_addr, sizeof buf);
	236	}
	237
	238	/* The GPRs are found in the "regs" spufs file. */
	239	if (regno == -1 \|\| (regno >= 0 && regno < SPU_NUM_GPRS))
	240	{
e362b510 PA	241	gdb_byte buf[16 * SPU_NUM_GPRS];
e362b510 PA	242	char annex[32];
85e747d2 UW	243	int i;
	244
	245	for (i = 0; i < SPU_NUM_GPRS; i++)
	246	regcache_raw_collect (regcache, i, buf + i*16);
	247
	248	xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
	249	target_write (ops_beneath, TARGET_OBJECT_SPU, annex,
	250	buf, 0, sizeof buf);
	251	}
	252	}
	253
	254	/* Override the to_xfer_partial routine. */
9b409511	255	static enum target_xfer_status
85e747d2 UW	256	spu_xfer_partial (struct target_ops *ops, enum target_object object,
85e747d2 UW	257	const char annex, gdb_byte readbuf,
9b409511 YQ	258	const gdb_byte *writebuf, ULONGEST offset, ULONGEST len,
9b409511 YQ	259	ULONGEST *xfered_len)
85e747d2 UW	260	{
85e747d2 UW	261	struct target_ops *ops_beneath = find_target_beneath (ops);
85e747d2 UW	262
	263	/* Use the "mem" spufs file to access SPU local store. */
	264	if (object == TARGET_OBJECT_MEMORY)
	265	{
	266	int fd = SPUADDR_SPU (offset);
	267	CORE_ADDR addr = SPUADDR_ADDR (offset);
d2ed6730 UW	268	char mem_annex[32], lslr_annex[32];
	269	gdb_byte buf[32];
	270	ULONGEST lslr;
9b409511	271	enum target_xfer_status ret;
85e747d2	272
d2ed6730	273	if (fd >= 0)
85e747d2 UW	274	{
85e747d2 UW	275	xsnprintf (mem_annex, sizeof mem_annex, "%d/mem", fd);
d2ed6730 UW	276	ret = ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
d2ed6730 UW	277	mem_annex, readbuf, writebuf,
9b409511 YQ	278	addr, len, xfered_len);
9b409511 YQ	279	if (ret == TARGET_XFER_OK)
d2ed6730 UW	280	return ret;
	281
	282	/* SPU local store access wraps the address around at the
	283	local store limit. We emulate this here. To avoid needing
	284	an extra access to retrieve the LSLR, we only do that after
	285	trying the original address first, and getting end-of-file. */
	286	xsnprintf (lslr_annex, sizeof lslr_annex, "%d/lslr", fd);
	287	memset (buf, 0, sizeof buf);
	288	if (ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
	289	lslr_annex, buf, NULL,
9b409511 YQ	290	0, sizeof buf, xfered_len)
9b409511 YQ	291	!= TARGET_XFER_OK)
d2ed6730 UW	292	return ret;
d2ed6730 UW	293
001f13d8	294	lslr = strtoulst ((char *) buf, NULL, 16);
85e747d2 UW	295	return ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
85e747d2 UW	296	mem_annex, readbuf, writebuf,
9b409511	297	addr & lslr, len, xfered_len);
85e747d2 UW	298	}
	299	}
	300
	301	return ops_beneath->to_xfer_partial (ops_beneath, object, annex,
9b409511	302	readbuf, writebuf, offset, len, xfered_len);
85e747d2 UW	303	}
	304
	305	/* Override the to_search_memory routine. */
	306	static int
	307	spu_search_memory (struct target_ops* ops,
	308	CORE_ADDR start_addr, ULONGEST search_space_len,
	309	const gdb_byte *pattern, ULONGEST pattern_len,
	310	CORE_ADDR *found_addrp)
	311	{
	312	struct target_ops *ops_beneath = find_target_beneath (ops);
85e747d2	313
e75fdfca TT	314	/* For SPU local store, always fall back to the simple method. */
e75fdfca TT	315	if (SPUADDR_SPU (start_addr) >= 0)
85e747d2 UW	316	return simple_search_memory (ops,
	317	start_addr, search_space_len,
	318	pattern, pattern_len, found_addrp);
	319
	320	return ops_beneath->to_search_memory (ops_beneath,
	321	start_addr, search_space_len,
	322	pattern, pattern_len, found_addrp);
	323	}
	324
	325
	326	/* Push and pop the SPU multi-architecture support target. */
	327
	328	static void
	329	spu_multiarch_activate (void)
	330	{
	331	/* If GDB was configured without SPU architecture support,
	332	we cannot install SPU multi-architecture support either. */
	333	if (spu_gdbarch (-1) == NULL)
	334	return;
	335
	336	push_target (&spu_ops);
	337
	338	/* Make sure the thread architecture is re-evaluated. */
	339	registers_changed ();
	340	}
	341
	342	static void
	343	spu_multiarch_deactivate (void)
	344	{
	345	unpush_target (&spu_ops);
	346
	347	/* Make sure the thread architecture is re-evaluated. */
	348	registers_changed ();
	349	}
	350
	351	static void
	352	spu_multiarch_inferior_created (struct target_ops *ops, int from_tty)
	353	{
	354	if (spu_standalone_p ())
	355	spu_multiarch_activate ();
	356	}
	357
	358	static void
	359	spu_multiarch_solib_loaded (struct so_list *so)
	360	{
	361	if (!spu_standalone_p ())
	362	if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
	363	if (spu_nr_solib++ == 0)
	364	spu_multiarch_activate ();
	365	}
	366
	367	static void
	368	spu_multiarch_solib_unloaded (struct so_list *so)
	369	{
	370	if (!spu_standalone_p ())
	371	if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
	372	if (--spu_nr_solib == 0)
	373	spu_multiarch_deactivate ();
	374	}
	375
	376	static void
	377	spu_mourn_inferior (struct target_ops *ops)
	378	{
	379	struct target_ops *ops_beneath = find_target_beneath (ops);
85e747d2	380
85e747d2 UW	381	ops_beneath->to_mourn_inferior (ops_beneath);
	382	spu_multiarch_deactivate ();
	383	}
	384
	385
	386	/* Initialize the SPU multi-architecture support target. */
	387
	388	static void
	389	init_spu_ops (void)
	390	{
	391	spu_ops.to_shortname = "spu";
	392	spu_ops.to_longname = "SPU multi-architecture support.";
	393	spu_ops.to_doc = "SPU multi-architecture support.";
	394	spu_ops.to_mourn_inferior = spu_mourn_inferior;
	395	spu_ops.to_fetch_registers = spu_fetch_registers;
	396	spu_ops.to_store_registers = spu_store_registers;
	397	spu_ops.to_xfer_partial = spu_xfer_partial;
	398	spu_ops.to_search_memory = spu_search_memory;
	399	spu_ops.to_region_ok_for_hw_watchpoint = spu_region_ok_for_hw_watchpoint;
	400	spu_ops.to_thread_architecture = spu_thread_architecture;
	401	spu_ops.to_stratum = arch_stratum;
	402	spu_ops.to_magic = OPS_MAGIC;
	403	}
	404
	405	void
	406	_initialize_spu_multiarch (void)
	407	{
	408	/* Install ourselves on the target stack. */
	409	init_spu_ops ();
12070676	410	complete_target_initialization (&spu_ops);
85e747d2 UW	411
85e747d2 UW	412	/* Install observers to watch for SPU objects. */
76727919 TT	413	gdb::observers::inferior_created.attach (spu_multiarch_inferior_created);
	414	gdb::observers::solib_loaded.attach (spu_multiarch_solib_loaded);
	415	gdb::observers::solib_unloaded.attach (spu_multiarch_solib_unloaded);
85e747d2 UW	416	}
85e747d2 UW	417