[deliverable/binutils-gdb.git] / gdb / spu-multiarch.c

/* Cell SPU GNU/Linux multi-architecture debugging support.
   Copyright (C) 2009-2014 Free Software Foundation, Inc.

   Contributed by Ulrich Weigand <uweigand@de.ibm.com>.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "defs.h"
#include "gdbcore.h"
#include "gdbcmd.h"
#include <string.h>
#include "gdb_assert.h"
#include "arch-utils.h"
#include "observer.h"
#include "inferior.h"
#include "regcache.h"
#include "symfile.h"
#include "objfiles.h"
#include "solib.h"
#include "solist.h"

#include "ppc-tdep.h"
#include "ppc-linux-tdep.h"
#include "spu-tdep.h"

/* This module's target vector.  */
static struct target_ops spu_ops;

/* Number of SPE objects loaded into the current inferior.  */
static int spu_nr_solib;

/* Stand-alone SPE executable?  */
#define spu_standalone_p() \
  (symfile_objfile && symfile_objfile->obfd \
   && bfd_get_arch (symfile_objfile->obfd) == bfd_arch_spu)

/* PPU side system calls.  */
#define INSTR_SC	0x44000002
#define NR_spu_run	0x0116

/* If the PPU thread is currently stopped on a spu_run system call,
   return to FD and ADDR the file handle and NPC parameter address
   used with the system call.  Return non-zero if successful.  */
static int
parse_spufs_run (ptid_t ptid, int *fd, CORE_ADDR *addr)
{
  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
  struct gdbarch_tdep *tdep;
  struct regcache *regcache;
  gdb_byte buf[4];
  ULONGEST regval;

  /* If we're not on PPU, there's nothing to detect.  */
  if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_powerpc)
    return 0;

  /* Get PPU-side registers.  */
  regcache = get_thread_arch_regcache (ptid, target_gdbarch ());
  tdep = gdbarch_tdep (target_gdbarch ());

  /* Fetch instruction preceding current NIP.  */
  if (target_read_memory (regcache_read_pc (regcache) - 4, buf, 4) != 0)
    return 0;
  /* It should be a "sc" instruction.  */
  if (extract_unsigned_integer (buf, 4, byte_order) != INSTR_SC)
    return 0;
  /* System call number should be NR_spu_run.  */
  regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum, &regval);
  if (regval != NR_spu_run)
    return 0;

  /* Register 3 contains fd, register 4 the NPC param pointer.  */
  regcache_cooked_read_unsigned (regcache, PPC_ORIG_R3_REGNUM, &regval);
  *fd = (int) regval;
  regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 4, &regval);
  *addr = (CORE_ADDR) regval;
  return 1;
}

/* Find gdbarch for SPU context SPUFS_FD.  */
static struct gdbarch *
spu_gdbarch (int spufs_fd)
{
  struct gdbarch_info info;
  gdbarch_info_init (&info);
  info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
  info.byte_order = BFD_ENDIAN_BIG;
  info.osabi = GDB_OSABI_LINUX;
  info.tdep_info = (void *) &spufs_fd;
  return gdbarch_find_by_info (info);
}

/* Override the to_thread_architecture routine.  */
static struct gdbarch *
spu_thread_architecture (struct target_ops *ops, ptid_t ptid)
{
  int spufs_fd;
  CORE_ADDR spufs_addr;

  if (parse_spufs_run (ptid, &spufs_fd, &spufs_addr))
    return spu_gdbarch (spufs_fd);

  return target_gdbarch ();
}

/* Override the to_region_ok_for_hw_watchpoint routine.  */
static int
spu_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
{
  struct target_ops *ops_beneath = find_target_beneath (&spu_ops);
  while (ops_beneath && !ops_beneath->to_region_ok_for_hw_watchpoint)
    ops_beneath = find_target_beneath (ops_beneath);

  /* We cannot watch SPU local store.  */
  if (SPUADDR_SPU (addr) != -1)
    return 0;

  if (ops_beneath)
    return ops_beneath->to_region_ok_for_hw_watchpoint (addr, len);

  return 0;
}

/* Override the to_fetch_registers routine.  */
static void
spu_fetch_registers (struct target_ops *ops,
		     struct regcache *regcache, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
  struct target_ops *ops_beneath = find_target_beneath (ops);
  int spufs_fd;
  CORE_ADDR spufs_addr;

  /* This version applies only if we're currently in spu_run.  */
  if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
    {
      while (ops_beneath && !ops_beneath->to_fetch_registers)
	ops_beneath = find_target_beneath (ops_beneath);

      gdb_assert (ops_beneath);
      ops_beneath->to_fetch_registers (ops_beneath, regcache, regno);
      return;
    }

  /* We must be stopped on a spu_run system call.  */
  if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
    return;

  /* The ID register holds the spufs file handle.  */
  if (regno == -1 || regno == SPU_ID_REGNUM)
    {
      gdb_byte buf[4];
      store_unsigned_integer (buf, 4, byte_order, spufs_fd);
      regcache_raw_supply (regcache, SPU_ID_REGNUM, buf);
    }

  /* The NPC register is found in PPC memory at SPUFS_ADDR.  */
  if (regno == -1 || regno == SPU_PC_REGNUM)
    {
      gdb_byte buf[4];

      if (target_read (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
		       buf, spufs_addr, sizeof buf) == sizeof buf)
	regcache_raw_supply (regcache, SPU_PC_REGNUM, buf);
    }

  /* The GPRs are found in the "regs" spufs file.  */
  if (regno == -1 || (regno >= 0 && regno < SPU_NUM_GPRS))
    {
      gdb_byte buf[16 * SPU_NUM_GPRS];
      char annex[32];
      int i;

      xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
      if (target_read (ops_beneath, TARGET_OBJECT_SPU, annex,
		       buf, 0, sizeof buf) == sizeof buf)
	for (i = 0; i < SPU_NUM_GPRS; i++)
	  regcache_raw_supply (regcache, i, buf + i*16);
    }
}

/* Override the to_store_registers routine.  */
static void
spu_store_registers (struct target_ops *ops,
		     struct regcache *regcache, int regno)
{
  struct gdbarch *gdbarch = get_regcache_arch (regcache);
  struct target_ops *ops_beneath = find_target_beneath (ops);
  int spufs_fd;
  CORE_ADDR spufs_addr;

  /* This version applies only if we're currently in spu_run.  */
  if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
    {
      while (ops_beneath && !ops_beneath->to_fetch_registers)
	ops_beneath = find_target_beneath (ops_beneath);

      gdb_assert (ops_beneath);
      ops_beneath->to_store_registers (ops_beneath, regcache, regno);
      return;
    }

  /* We must be stopped on a spu_run system call.  */
  if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
    return;

  /* The NPC register is found in PPC memory at SPUFS_ADDR.  */
  if (regno == -1 || regno == SPU_PC_REGNUM)
    {
      gdb_byte buf[4];
      regcache_raw_collect (regcache, SPU_PC_REGNUM, buf);

      target_write (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
		    buf, spufs_addr, sizeof buf);
    }

  /* The GPRs are found in the "regs" spufs file.  */
  if (regno == -1 || (regno >= 0 && regno < SPU_NUM_GPRS))
    {
      gdb_byte buf[16 * SPU_NUM_GPRS];
      char annex[32];
      int i;

      for (i = 0; i < SPU_NUM_GPRS; i++)
	regcache_raw_collect (regcache, i, buf + i*16);

      xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
      target_write (ops_beneath, TARGET_OBJECT_SPU, annex,
		    buf, 0, sizeof buf);
    }
}

/* Override the to_xfer_partial routine.  */
static enum target_xfer_status
spu_xfer_partial (struct target_ops *ops, enum target_object object,
		  const char *annex, gdb_byte *readbuf,
		  const gdb_byte *writebuf, ULONGEST offset, ULONGEST len,
		  ULONGEST *xfered_len)
{
  struct target_ops *ops_beneath = find_target_beneath (ops);
  while (ops_beneath && !ops_beneath->to_xfer_partial)
    ops_beneath = find_target_beneath (ops_beneath);
  gdb_assert (ops_beneath);

  /* Use the "mem" spufs file to access SPU local store.  */
  if (object == TARGET_OBJECT_MEMORY)
    {
      int fd = SPUADDR_SPU (offset);
      CORE_ADDR addr = SPUADDR_ADDR (offset);
      char mem_annex[32], lslr_annex[32];
      gdb_byte buf[32];
      ULONGEST lslr;
      enum target_xfer_status ret;

      if (fd >= 0)
	{
	  xsnprintf (mem_annex, sizeof mem_annex, "%d/mem", fd);
	  ret = ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
					      mem_annex, readbuf, writebuf,
					      addr, len, xfered_len);
	  if (ret == TARGET_XFER_OK)
	    return ret;

	  /* SPU local store access wraps the address around at the
	     local store limit.  We emulate this here.  To avoid needing
	     an extra access to retrieve the LSLR, we only do that after
	     trying the original address first, and getting end-of-file.  */
	  xsnprintf (lslr_annex, sizeof lslr_annex, "%d/lslr", fd);
	  memset (buf, 0, sizeof buf);
	  if (ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
					    lslr_annex, buf, NULL,
					    0, sizeof buf, xfered_len)
	      != TARGET_XFER_OK)
	    return ret;

	  lslr = strtoulst ((char *) buf, NULL, 16);
	  return ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
					       mem_annex, readbuf, writebuf,
					       addr & lslr, len, xfered_len);
	}
    }

  return ops_beneath->to_xfer_partial (ops_beneath, object, annex,
				       readbuf, writebuf, offset, len, xfered_len);
}

/* Override the to_search_memory routine.  */
static int
spu_search_memory (struct target_ops* ops,
		   CORE_ADDR start_addr, ULONGEST search_space_len,
		   const gdb_byte *pattern, ULONGEST pattern_len,
		   CORE_ADDR *found_addrp)
{
  struct target_ops *ops_beneath = find_target_beneath (ops);
  while (ops_beneath && !ops_beneath->to_search_memory)
    ops_beneath = find_target_beneath (ops_beneath);

  /* For SPU local store, always fall back to the simple method.  Likewise
     if we do not have any target-specific special implementation.  */
  if (!ops_beneath || SPUADDR_SPU (start_addr) >= 0)
    return simple_search_memory (ops,
				 start_addr, search_space_len,
				 pattern, pattern_len, found_addrp);

  return ops_beneath->to_search_memory (ops_beneath,
					start_addr, search_space_len,
					pattern, pattern_len, found_addrp);
}


/* Push and pop the SPU multi-architecture support target.  */

static void
spu_multiarch_activate (void)
{
  /* If GDB was configured without SPU architecture support,
     we cannot install SPU multi-architecture support either.  */
  if (spu_gdbarch (-1) == NULL)
    return;

  push_target (&spu_ops);

  /* Make sure the thread architecture is re-evaluated.  */
  registers_changed ();
}

static void
spu_multiarch_deactivate (void)
{
  unpush_target (&spu_ops);

  /* Make sure the thread architecture is re-evaluated.  */
  registers_changed ();
}

static void
spu_multiarch_inferior_created (struct target_ops *ops, int from_tty)
{
  if (spu_standalone_p ())
    spu_multiarch_activate ();
}

static void
spu_multiarch_solib_loaded (struct so_list *so)
{
  if (!spu_standalone_p ())
    if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
      if (spu_nr_solib++ == 0)
	spu_multiarch_activate ();
}

static void
spu_multiarch_solib_unloaded (struct so_list *so)
{
  if (!spu_standalone_p ())
    if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
      if (--spu_nr_solib == 0)
	spu_multiarch_deactivate ();
}

static void
spu_mourn_inferior (struct target_ops *ops)
{
  struct target_ops *ops_beneath = find_target_beneath (ops);
  while (ops_beneath && !ops_beneath->to_mourn_inferior)
    ops_beneath = find_target_beneath (ops_beneath);

  gdb_assert (ops_beneath);
  ops_beneath->to_mourn_inferior (ops_beneath);
  spu_multiarch_deactivate ();
}


/* Initialize the SPU multi-architecture support target.  */

static void
init_spu_ops (void)
{
  spu_ops.to_shortname = "spu";
  spu_ops.to_longname = "SPU multi-architecture support.";
  spu_ops.to_doc = "SPU multi-architecture support.";
  spu_ops.to_mourn_inferior = spu_mourn_inferior;
  spu_ops.to_fetch_registers = spu_fetch_registers;
  spu_ops.to_store_registers = spu_store_registers;
  spu_ops.to_xfer_partial = spu_xfer_partial;
  spu_ops.to_search_memory = spu_search_memory;
  spu_ops.to_region_ok_for_hw_watchpoint = spu_region_ok_for_hw_watchpoint;
  spu_ops.to_thread_architecture = spu_thread_architecture;
  spu_ops.to_stratum = arch_stratum;
  spu_ops.to_magic = OPS_MAGIC;
}

/* -Wmissing-prototypes */
extern initialize_file_ftype _initialize_spu_multiarch;

void
_initialize_spu_multiarch (void)
{
  /* Install ourselves on the target stack.  */
  init_spu_ops ();
  complete_target_initialization (&spu_ops);

  /* Install observers to watch for SPU objects.  */
  observer_attach_inferior_created (spu_multiarch_inferior_created);
  observer_attach_solib_loaded (spu_multiarch_solib_loaded);
  observer_attach_solib_unloaded (spu_multiarch_solib_unloaded);
}
Commit	Line	Data
85e747d2	1	/* Cell SPU GNU/Linux multi-architecture debugging support.
ecd75fc8	2	Copyright (C) 2009-2014 Free Software Foundation, Inc.
85e747d2 UW	3
	4	Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
	5
	6	This file is part of GDB.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
dcf7800b	10	the Free Software Foundation; either version 3 of the License, or
85e747d2 UW	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
dcf7800b	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
85e747d2 UW	20
	21	#include "defs.h"
	22	#include "gdbcore.h"
	23	#include "gdbcmd.h"
0e9f083f	24	#include <string.h>
85e747d2 UW	25	#include "gdb_assert.h"
	26	#include "arch-utils.h"
	27	#include "observer.h"
	28	#include "inferior.h"
	29	#include "regcache.h"
	30	#include "symfile.h"
	31	#include "objfiles.h"
	32	#include "solib.h"
	33	#include "solist.h"
	34
	35	#include "ppc-tdep.h"
	36	#include "ppc-linux-tdep.h"
	37	#include "spu-tdep.h"
	38
	39	/* This module's target vector. */
	40	static struct target_ops spu_ops;
	41
	42	/* Number of SPE objects loaded into the current inferior. */
	43	static int spu_nr_solib;
	44
	45	/* Stand-alone SPE executable? */
	46	#define spu_standalone_p() \
	47	(symfile_objfile && symfile_objfile->obfd \
	48	&& bfd_get_arch (symfile_objfile->obfd) == bfd_arch_spu)
	49
	50	/* PPU side system calls. */
	51	#define INSTR_SC 0x44000002
	52	#define NR_spu_run 0x0116
	53
	54	/* If the PPU thread is currently stopped on a spu_run system call,
	55	return to FD and ADDR the file handle and NPC parameter address
	56	used with the system call. Return non-zero if successful. */
	57	static int
	58	parse_spufs_run (ptid_t ptid, int fd, CORE_ADDR addr)
	59	{
f5656ead	60	enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
85e747d2 UW	61	struct gdbarch_tdep *tdep;
85e747d2 UW	62	struct regcache *regcache;
e362b510	63	gdb_byte buf[4];
85e747d2 UW	64	ULONGEST regval;
	65
	66	/* If we're not on PPU, there's nothing to detect. */
f5656ead	67	if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_powerpc)
85e747d2 UW	68	return 0;
	69
	70	/* Get PPU-side registers. */
f5656ead TT	71	regcache = get_thread_arch_regcache (ptid, target_gdbarch ());
f5656ead TT	72	tdep = gdbarch_tdep (target_gdbarch ());
85e747d2 UW	73
	74	/* Fetch instruction preceding current NIP. */
	75	if (target_read_memory (regcache_read_pc (regcache) - 4, buf, 4) != 0)
	76	return 0;
	77	/* It should be a "sc" instruction. */
	78	if (extract_unsigned_integer (buf, 4, byte_order) != INSTR_SC)
	79	return 0;
	80	/* System call number should be NR_spu_run. */
	81	regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum, &regval);
	82	if (regval != NR_spu_run)
	83	return 0;
	84
	85	/* Register 3 contains fd, register 4 the NPC param pointer. */
	86	regcache_cooked_read_unsigned (regcache, PPC_ORIG_R3_REGNUM, &regval);
	87	*fd = (int) regval;
	88	regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 4, &regval);
	89	*addr = (CORE_ADDR) regval;
	90	return 1;
	91	}
	92
	93	/* Find gdbarch for SPU context SPUFS_FD. */
	94	static struct gdbarch *
	95	spu_gdbarch (int spufs_fd)
	96	{
	97	struct gdbarch_info info;
	98	gdbarch_info_init (&info);
	99	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
	100	info.byte_order = BFD_ENDIAN_BIG;
	101	info.osabi = GDB_OSABI_LINUX;
	102	info.tdep_info = (void *) &spufs_fd;
	103	return gdbarch_find_by_info (info);
	104	}
	105
	106	/* Override the to_thread_architecture routine. */
	107	static struct gdbarch *
	108	spu_thread_architecture (struct target_ops *ops, ptid_t ptid)
	109	{
	110	int spufs_fd;
	111	CORE_ADDR spufs_addr;
	112
	113	if (parse_spufs_run (ptid, &spufs_fd, &spufs_addr))
	114	return spu_gdbarch (spufs_fd);
	115
f5656ead	116	return target_gdbarch ();
85e747d2 UW	117	}
	118
	119	/* Override the to_region_ok_for_hw_watchpoint routine. */
	120	static int
	121	spu_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
	122	{
	123	struct target_ops *ops_beneath = find_target_beneath (&spu_ops);
	124	while (ops_beneath && !ops_beneath->to_region_ok_for_hw_watchpoint)
	125	ops_beneath = find_target_beneath (ops_beneath);
	126
	127	/* We cannot watch SPU local store. */
	128	if (SPUADDR_SPU (addr) != -1)
	129	return 0;
	130
	131	if (ops_beneath)
	132	return ops_beneath->to_region_ok_for_hw_watchpoint (addr, len);
	133
	134	return 0;
	135	}
	136
	137	/* Override the to_fetch_registers routine. */
	138	static void
	139	spu_fetch_registers (struct target_ops *ops,
	140	struct regcache *regcache, int regno)
	141	{
	142	struct gdbarch *gdbarch = get_regcache_arch (regcache);
	143	enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
	144	struct target_ops *ops_beneath = find_target_beneath (ops);
	145	int spufs_fd;
	146	CORE_ADDR spufs_addr;
	147
	148	/* This version applies only if we're currently in spu_run. */
	149	if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
	150	{
	151	while (ops_beneath && !ops_beneath->to_fetch_registers)
	152	ops_beneath = find_target_beneath (ops_beneath);
	153
	154	gdb_assert (ops_beneath);
	155	ops_beneath->to_fetch_registers (ops_beneath, regcache, regno);
	156	return;
	157	}
	158
	159	/* We must be stopped on a spu_run system call. */
	160	if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
	161	return;
	162
	163	/* The ID register holds the spufs file handle. */
	164	if (regno == -1 \|\| regno == SPU_ID_REGNUM)
	165	{
e362b510	166	gdb_byte buf[4];
85e747d2 UW	167	store_unsigned_integer (buf, 4, byte_order, spufs_fd);
	168	regcache_raw_supply (regcache, SPU_ID_REGNUM, buf);
	169	}
	170
	171	/* The NPC register is found in PPC memory at SPUFS_ADDR. */
	172	if (regno == -1 \|\| regno == SPU_PC_REGNUM)
	173	{
e362b510	174	gdb_byte buf[4];
85e747d2 UW	175
	176	if (target_read (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
	177	buf, spufs_addr, sizeof buf) == sizeof buf)
	178	regcache_raw_supply (regcache, SPU_PC_REGNUM, buf);
	179	}
	180
	181	/* The GPRs are found in the "regs" spufs file. */
	182	if (regno == -1 \|\| (regno >= 0 && regno < SPU_NUM_GPRS))
	183	{
e362b510 PA	184	gdb_byte buf[16 * SPU_NUM_GPRS];
e362b510 PA	185	char annex[32];
85e747d2 UW	186	int i;
	187
	188	xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
	189	if (target_read (ops_beneath, TARGET_OBJECT_SPU, annex,
	190	buf, 0, sizeof buf) == sizeof buf)
	191	for (i = 0; i < SPU_NUM_GPRS; i++)
	192	regcache_raw_supply (regcache, i, buf + i*16);
	193	}
	194	}
	195
	196	/* Override the to_store_registers routine. */
	197	static void
	198	spu_store_registers (struct target_ops *ops,
	199	struct regcache *regcache, int regno)
	200	{
	201	struct gdbarch *gdbarch = get_regcache_arch (regcache);
	202	struct target_ops *ops_beneath = find_target_beneath (ops);
	203	int spufs_fd;
	204	CORE_ADDR spufs_addr;
	205
	206	/* This version applies only if we're currently in spu_run. */
	207	if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu)
	208	{
	209	while (ops_beneath && !ops_beneath->to_fetch_registers)
	210	ops_beneath = find_target_beneath (ops_beneath);
	211
	212	gdb_assert (ops_beneath);
	213	ops_beneath->to_store_registers (ops_beneath, regcache, regno);
	214	return;
	215	}
	216
	217	/* We must be stopped on a spu_run system call. */
	218	if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr))
	219	return;
	220
	221	/* The NPC register is found in PPC memory at SPUFS_ADDR. */
	222	if (regno == -1 \|\| regno == SPU_PC_REGNUM)
	223	{
e362b510	224	gdb_byte buf[4];
85e747d2 UW	225	regcache_raw_collect (regcache, SPU_PC_REGNUM, buf);
	226
	227	target_write (ops_beneath, TARGET_OBJECT_MEMORY, NULL,
	228	buf, spufs_addr, sizeof buf);
	229	}
	230
	231	/* The GPRs are found in the "regs" spufs file. */
	232	if (regno == -1 \|\| (regno >= 0 && regno < SPU_NUM_GPRS))
	233	{
e362b510 PA	234	gdb_byte buf[16 * SPU_NUM_GPRS];
e362b510 PA	235	char annex[32];
85e747d2 UW	236	int i;
	237
	238	for (i = 0; i < SPU_NUM_GPRS; i++)
	239	regcache_raw_collect (regcache, i, buf + i*16);
	240
	241	xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd);
	242	target_write (ops_beneath, TARGET_OBJECT_SPU, annex,
	243	buf, 0, sizeof buf);
	244	}
	245	}
	246
	247	/* Override the to_xfer_partial routine. */
9b409511	248	static enum target_xfer_status
85e747d2 UW	249	spu_xfer_partial (struct target_ops *ops, enum target_object object,
85e747d2 UW	250	const char annex, gdb_byte readbuf,
9b409511 YQ	251	const gdb_byte *writebuf, ULONGEST offset, ULONGEST len,
9b409511 YQ	252	ULONGEST *xfered_len)
85e747d2 UW	253	{
	254	struct target_ops *ops_beneath = find_target_beneath (ops);
	255	while (ops_beneath && !ops_beneath->to_xfer_partial)
	256	ops_beneath = find_target_beneath (ops_beneath);
	257	gdb_assert (ops_beneath);
	258
	259	/* Use the "mem" spufs file to access SPU local store. */
	260	if (object == TARGET_OBJECT_MEMORY)
	261	{
	262	int fd = SPUADDR_SPU (offset);
	263	CORE_ADDR addr = SPUADDR_ADDR (offset);
d2ed6730 UW	264	char mem_annex[32], lslr_annex[32];
	265	gdb_byte buf[32];
	266	ULONGEST lslr;
9b409511	267	enum target_xfer_status ret;
85e747d2	268
d2ed6730	269	if (fd >= 0)
85e747d2 UW	270	{
85e747d2 UW	271	xsnprintf (mem_annex, sizeof mem_annex, "%d/mem", fd);
d2ed6730 UW	272	ret = ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
d2ed6730 UW	273	mem_annex, readbuf, writebuf,
9b409511 YQ	274	addr, len, xfered_len);
9b409511 YQ	275	if (ret == TARGET_XFER_OK)
d2ed6730 UW	276	return ret;
	277
	278	/* SPU local store access wraps the address around at the
	279	local store limit. We emulate this here. To avoid needing
	280	an extra access to retrieve the LSLR, we only do that after
	281	trying the original address first, and getting end-of-file. */
	282	xsnprintf (lslr_annex, sizeof lslr_annex, "%d/lslr", fd);
	283	memset (buf, 0, sizeof buf);
	284	if (ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
	285	lslr_annex, buf, NULL,
9b409511 YQ	286	0, sizeof buf, xfered_len)
9b409511 YQ	287	!= TARGET_XFER_OK)
d2ed6730 UW	288	return ret;
d2ed6730 UW	289
001f13d8	290	lslr = strtoulst ((char *) buf, NULL, 16);
85e747d2 UW	291	return ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU,
85e747d2 UW	292	mem_annex, readbuf, writebuf,
9b409511	293	addr & lslr, len, xfered_len);
85e747d2 UW	294	}
	295	}
	296
	297	return ops_beneath->to_xfer_partial (ops_beneath, object, annex,
9b409511	298	readbuf, writebuf, offset, len, xfered_len);
85e747d2 UW	299	}
	300
	301	/* Override the to_search_memory routine. */
	302	static int
	303	spu_search_memory (struct target_ops* ops,
	304	CORE_ADDR start_addr, ULONGEST search_space_len,
	305	const gdb_byte *pattern, ULONGEST pattern_len,
	306	CORE_ADDR *found_addrp)
	307	{
	308	struct target_ops *ops_beneath = find_target_beneath (ops);
	309	while (ops_beneath && !ops_beneath->to_search_memory)
	310	ops_beneath = find_target_beneath (ops_beneath);
	311
	312	/* For SPU local store, always fall back to the simple method. Likewise
	313	if we do not have any target-specific special implementation. */
	314	if (!ops_beneath \|\| SPUADDR_SPU (start_addr) >= 0)
	315	return simple_search_memory (ops,
	316	start_addr, search_space_len,
	317	pattern, pattern_len, found_addrp);
	318
	319	return ops_beneath->to_search_memory (ops_beneath,
	320	start_addr, search_space_len,
	321	pattern, pattern_len, found_addrp);
	322	}
	323
	324
	325	/* Push and pop the SPU multi-architecture support target. */
	326
	327	static void
	328	spu_multiarch_activate (void)
	329	{
	330	/* If GDB was configured without SPU architecture support,
	331	we cannot install SPU multi-architecture support either. */
	332	if (spu_gdbarch (-1) == NULL)
	333	return;
	334
	335	push_target (&spu_ops);
	336
	337	/* Make sure the thread architecture is re-evaluated. */
	338	registers_changed ();
	339	}
	340
	341	static void
	342	spu_multiarch_deactivate (void)
	343	{
	344	unpush_target (&spu_ops);
	345
	346	/* Make sure the thread architecture is re-evaluated. */
	347	registers_changed ();
	348	}
	349
	350	static void
	351	spu_multiarch_inferior_created (struct target_ops *ops, int from_tty)
	352	{
	353	if (spu_standalone_p ())
	354	spu_multiarch_activate ();
	355	}
	356
	357	static void
	358	spu_multiarch_solib_loaded (struct so_list *so)
	359	{
	360	if (!spu_standalone_p ())
	361	if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
	362	if (spu_nr_solib++ == 0)
363	spu_multiarch_activate ();
364	}
365
366	static void
367	spu_multiarch_solib_unloaded (struct so_list *so)
368	{
369	if (!spu_standalone_p ())
370	if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu)
371	if (--spu_nr_solib == 0)
372	spu_multiarch_deactivate ();
373	}
374
375	static void
376	spu_mourn_inferior (struct target_ops *ops)
377	{
378	struct target_ops *ops_beneath = find_target_beneath (ops);
379	while (ops_beneath && !ops_beneath->to_mourn_inferior)
380	ops_beneath = find_target_beneath (ops_beneath);
381
382	gdb_assert (ops_beneath);
383	ops_beneath->to_mourn_inferior (ops_beneath);
384	spu_multiarch_deactivate ();
385	}
386
387
388	/* Initialize the SPU multi-architecture support target. */
389
390	static void
391	init_spu_ops (void)
392	{
393	spu_ops.to_shortname = "spu";
394	spu_ops.to_longname = "SPU multi-architecture support.";
395	spu_ops.to_doc = "SPU multi-architecture support.";
396	spu_ops.to_mourn_inferior = spu_mourn_inferior;
397	spu_ops.to_fetch_registers = spu_fetch_registers;
398	spu_ops.to_store_registers = spu_store_registers;
399	spu_ops.to_xfer_partial = spu_xfer_partial;
400	spu_ops.to_search_memory = spu_search_memory;
401	spu_ops.to_region_ok_for_hw_watchpoint = spu_region_ok_for_hw_watchpoint;
402	spu_ops.to_thread_architecture = spu_thread_architecture;
403	spu_ops.to_stratum = arch_stratum;
404	spu_ops.to_magic = OPS_MAGIC;
405	}
406
693be288 JK	407	/* -Wmissing-prototypes */
	408	extern initialize_file_ftype _initialize_spu_multiarch;
	409
85e747d2 UW	410	void
	411	_initialize_spu_multiarch (void)
	412	{
	413	/* Install ourselves on the target stack. */
	414	init_spu_ops ();
12070676	415	complete_target_initialization (&spu_ops);
85e747d2 UW	416
	417	/* Install observers to watch for SPU objects. */
	418	observer_attach_inferior_created (spu_multiarch_inferior_created);
	419	observer_attach_solib_loaded (spu_multiarch_solib_loaded);
	420	observer_attach_solib_unloaded (spu_multiarch_solib_unloaded);
	421	}
	422