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771b4502 | 1 | /* SPU target-dependent code for GDB, the GNU debugger. |
9b254dd1 | 2 | Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc. |
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3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 8 | the Free Software Foundation; either version 3 of the License, or |
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9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
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18 | |
19 | #ifndef SPU_TDEP_H | |
20 | #define SPU_TDEP_H | |
21 | ||
22 | /* Number of registers. */ | |
23 | #define SPU_NUM_REGS 130 | |
23d964e7 | 24 | #define SPU_NUM_PSEUDO_REGS 6 |
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25 | #define SPU_NUM_GPRS 128 |
26 | ||
27 | /* Register numbers of various important registers. */ | |
28 | enum spu_regnum | |
29 | { | |
30 | /* SPU calling convention. */ | |
31 | SPU_LR_REGNUM = 0, /* Link register. */ | |
32 | SPU_RAW_SP_REGNUM = 1, /* Stack pointer (full register). */ | |
33 | SPU_ARG1_REGNUM = 3, /* First argument register. */ | |
34 | SPU_ARGN_REGNUM = 74, /* Last argument register. */ | |
35 | SPU_SAVED1_REGNUM = 80, /* First call-saved register. */ | |
36 | SPU_SAVEDN_REGNUM = 127, /* Last call-saved register. */ | |
37 | SPU_FP_REGNUM = 127, /* Frame pointer. */ | |
38 | ||
39 | /* Special registers. */ | |
40 | SPU_ID_REGNUM = 128, /* SPU ID register. */ | |
41 | SPU_PC_REGNUM = 129, /* Next program counter. */ | |
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42 | SPU_SP_REGNUM = 130, /* Stack pointer (preferred slot). */ |
43 | SPU_FPSCR_REGNUM = 131, /* Floating point status/control register. */ | |
44 | SPU_SRR0_REGNUM = 132, /* SRR0 register. */ | |
45 | SPU_LSLR_REGNUM = 133, /* Local store limit register. */ | |
46 | SPU_DECR_REGNUM = 134, /* Decrementer value. */ | |
47 | SPU_DECR_STATUS_REGNUM = 135 /* Decrementer status. */ | |
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48 | }; |
49 | ||
50 | /* Local store. */ | |
51 | #define SPU_LS_SIZE 0x40000 | |
52 | ||
53 | #endif |