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Add support for the __flash qualifier on AVR
[deliverable/binutils-gdb.git] / gdb / testsuite / gdb.arch / arm-disp-step.S
CommitLineData
ecd75fc8 1/* Copyright 2010-2014 Free Software Foundation, Inc.
2a20745c
YQ		 2
3 This file is part of GDB.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <http://www.gnu.org/licenses/>. */
17
18 .syntax unified
19 .text
20 .type main,%function
3eb2ef34 21#if defined (__thumb__)
2a20745c
YQ		 22 .code 16
23 .thumb_func
24#endif
25 .globl main
26main:
27 push {r7, lr}
28 add sp, sp, #4
29 mov r7, sp
30
31
32 /* Test call and return */
33 .global test_call
34test_call:
35 bl test_call_subr
36 .global test_ret_end
37test_ret_end:
38 nop @ Location test_ret_end
39
40 /* Test branch */
41 bl test_branch
42
43 /* Test ldr from pc */
44 bl test_ldr_pc
45
46 /* Test ldm/stm only in ARM mode */
3eb2ef34 47#if !defined (__thumb__)
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YQ		 48 bl test_ldm_stm_pc
49#endif
50
34518530
YQ		 51 /* Test ldrX literal in ARM and Thumb-2 */
52#if !defined (__thumb__) || defined(__thumb2__)
0c51be18
YQ		 53 bl test_ldr_literal
54#endif
55
34518530
YQ		 56 /* Test ldr literal in Thumb */
57#if defined(__thumb__)
58 bl test_ldr_literal_16
0c51be18
YQ		 59#endif
60
34518530
YQ		 61 /* Test cbnz/cbz in Thumb-2 */
62#if defined(__thumb2__)
63 bl test_cbz_cbnz
0c51be18
YQ		 64#endif
65
34518530
YQ		 66 /* Test adr in Thumb and Thumb-2 */
67#if defined(__thumb__)
68 bl test_adr
69#endif
70 /* Test 32-bit adr in ARM and Thumb-2 */
71#if defined(__thumb2__) || !defined(__thumb__)
72 bl test_adr_32bit
73#endif
74
75 bl test_pop_pc
76
494e194e
YQ		 77 /* Test str in ARM mode and Thumb-2 */
78#if !defined(__thumb__)
79 bl test_str_pc
80#endif
2a20745c
YQ		 81 /* Return */
82 mov sp, r7
83 sub sp, sp, #4
84 movs r0, #0
85 pop {r7, pc}
86 .size main, .-main
87
88 .global test_call_subr
3eb2ef34 89#if defined (__thumb__)
2a20745c
YQ		 90 .code 16
91 .thumb_func
92#endif
93 .type test_call_subr, %function
94test_call_subr:
95 nop
96 .global test_call_end
97test_call_end:
98 nop @ Location test_call_end
99 .global test_ret
100test_ret:
101 bx lr
102 .size test_call_subr, .-test_call_subr
103
104
105 .global test_branch
3eb2ef34 106#if defined (__thumb__)
2a20745c
YQ		 107 .code 16
108 .thumb_func
109#endif
110 .type test_branch, %function
111test_branch:
112 b L_branch
944a9061 113 .global L_branch
2a20745c
YQ		 114L_branch:
115 bx lr
116 .size test_branch, .-test_branch
117
118 .global test_ldr_pc
3eb2ef34 119#if defined (__thumb__)
2a20745c
YQ		 120 .code 16
121 .thumb_func
122#endif
123 .type test_ldr_pc, %function
124test_ldr_pc:
125 ldr r1, [pc, #0]
126
944a9061 127 .global test_ldr_pc_ret
2a20745c
YQ		 128test_ldr_pc_ret:
129 bx lr
130 .size test_ldr_pc, .-test_ldr_pc
131
3eb2ef34 132#if !defined (__thumb__)
2a20745c
YQ		 133 .global test_ldm_stm_pc
134 .type test_ldm_stm_pc, %function
135test_ldm_stm_pc:
136 stmdb sp!, {lr, pc}
137 ldmia sp!, {r0, r1}
138 ldr r0, .L1
139 stmdb sp!, {r0}
944a9061 140 .global test_ldm_pc
2a20745c
YQ		 141test_ldm_pc:
142 ldmia sp!, {pc}
944a9061 143 .global test_ldm_stm_pc_ret
2a20745c
YQ		 144test_ldm_stm_pc_ret:
145 bx lr
146 .align 2
147.L1:
148 .word test_ldm_stm_pc_ret
149 .size test_ldm_stm_pc, .-test_ldm_stm_pc
150#endif
34518530
YQ		 151
152#if !defined (__thumb__) || defined(__thumb2__)
0c51be18
YQ		 153 .global test_ldr_literal
154 .type test_ldr_literal, %function
155test_ldr_literal:
156 ldrh r0, [pc]
157 .global test_ldrsb_literal
158test_ldrsb_literal:
159 ldrsb r0, [pc]
160 .global test_ldrsh_literal
161test_ldrsh_literal:
162 ldrsh r0, [pc]
163 .global test_ldr_literal_end
164test_ldr_literal_end:
165 bx lr
166 .size test_ldr_literal, .-test_ldr_literal
167#endif
168
34518530
YQ		 169#if defined(__thumb__)
170 .global test_ldr_literal_16
171 .code 16
172 .thumb_func
173test_ldr_literal_16:
174 ldr r0, .L2
175 .global test_ldr_literal_16_end
176test_ldr_literal_16_end:
177 bx lr
178 .align 2
179.L2:
180 .word test_ldr_literal_16
181 .size test_ldr_literal_16, .-test_ldr_literal_16
182#endif
0c51be18 183
34518530
YQ		 184#if defined(__thumb2__)
185 .global test_cbz_cbnz
186 .code 16
187 .thumb_func
188test_cbz_cbnz:
189 movs r0, #0
190 .global test_zero_cbnz
191test_zero_cbnz:
192 cbnz r0, .L3
193 .global test_zero_cbz
194test_zero_cbz:
195 cbz r0, .L3
196.L3:
197 movs r0, #1
198 .global test_non_zero_cbz
199test_non_zero_cbz:
200 cbz r0, .L4
201 .global test_non_zero_cbnz
202test_non_zero_cbnz:
203 cbnz r0, .L4
204 nop
205.L4:
206 .global test_cbz_cbnz_end
207test_cbz_cbnz_end:
208 bx lr
209 .size test_cbz_cbnz, .-test_cbz_cbnz
210#endif
211
212#if defined(__thumb__)
213 .global test_adr
214 .code 16
215 .thumb_func
216test_adr:
217 adr r0, .L8
218 nop
219 nop
220 nop
221.L8:
222 .global test_adr_end
223test_adr_end:
224 bx lr
225 .size test_adr, .-test_adr
226#endif
227
228#if defined(__thumb2__) || !defined(__thumb__)
0c51be18
YQ		 229 .global test_adr_32bit
230#if defined(__thumb2__)
231 .code 16
232 .thumb_func
233#endif
234test_adr_32bit:
235 adr r0, .L6
236 nop
237.L6:
238 nop
239 .global test_adr_32bit_after
240test_adr_32bit_after:
241 adr r0, .L6
242
243 .global test_adr_32bit_end
244test_adr_32bit_end:
245 bx lr
246 .size test_adr_32bit, .-test_adr_32bit
247#endif
248
249 .global test_pop_pc
250 .type test_pop_pc, %function
251#if defined(__thumb__)
252 .code 16
253 .thumb_func
254#endif
255
256test_pop_pc:
34518530
YQ		 257 ldr r1, .L1_right
258 ldr r2, .L1_wrong
0c51be18
YQ		 259#if defined(__thumb__)
260 movs r0, #1
261 orrs r1, r0
34518530 262 orrs r2, r0
0c51be18
YQ		 263#endif
264 push {r1}
34518530 265 push {r2}
0c51be18
YQ		 266 .global test_pop_pc_1
267test_pop_pc_1:
268 pop {r1, pc}
34518530
YQ		 269
270test_pop_pc_2_start:
271 ldr r1, .L2_right
272#if defined(__thumb__)
273 movs r0, #1
274 orrs r1, r0
275#endif
276 push {r1}
277 .global test_pop_pc_2
278test_pop_pc_2:
279 pop {pc}
280
281 /* Test pop instruction with full register list. */
282test_pop_pc_3_start:
283 ldr r1, .L3_right
284 ldr r2, .L3_wrong
285#if defined(__thumb__)
286 movs r0, #1
287 orrs r1, r0
288 orrs r2, r0
289#endif
290 push {r7}
291 push {r1} /* Push the right address so that PC will get it. */
292 /* Push the wrong address so r0-r7 will get the wrong a ddress. If PC
293 is set from any of them, we can get a FAIL. */
294 push {r2}
295 push {r2}
296 push {r2}
297 push {r2}
298 push {r2}
299 push {r2}
300 push {r2}
301 push {r2}
302test_pop_pc_3:
303 pop {r0,r1,r2,r3,r4,r5,r6,r7,pc}
0c51be18
YQ		 304 .global test_pop_pc_ret
305test_pop_pc_ret:
34518530 306 pop {r7}
0c51be18 307 bx lr
34518530
YQ		 308
309 .global test_pop_pc_1_right
310test_pop_pc_1_right:
311 b test_pop_pc_2_start /* right */
312 .global test_pop_pc_1_wrong
313test_pop_pc_1_wrong:
314 b test_pop_pc_2_start /* wrong */
315 .global test_pop_pc_2_right
316test_pop_pc_2_right:
317 b test_pop_pc_3_start /* right */
318 .global test_pop_pc_2_wrong
319test_pop_pc_2_wrong:
320 b test_pop_pc_3_start /* wrong */
321 .global test_pop_pc_3_right
322test_pop_pc_3_right:
323 b test_pop_pc_ret /* right */
324 .global test_pop_pc_3_wrong
325test_pop_pc_3_wrong:
326 b test_pop_pc_ret /* wrong */
327
0c51be18 328 .align 2
34518530
YQ		 329.L1_right:
330 .word test_pop_pc_1_right
331.L1_wrong:
332 .word test_pop_pc_1_wrong
333.L2_right:
334 .word test_pop_pc_2_right
335.L2_wrong:
336 .word test_pop_pc_2_wrong
337.L3_right:
338 .word test_pop_pc_3_right
339.L3_wrong:
340 .word test_pop_pc_3_wrong
0c51be18
YQ		 341 .size test_pop_pc, .-test_pop_pc
342
494e194e
YQ		 343#if !defined(__thumb__)
344#if defined (__thumb2__)
345 .code 16
346 .thumb_func
347#endif
348 .global test_str_pc
349 .type test_str_pc, %function
350test_str_pc:
351 str pc, [sp, #-4]
352 ldr r0, [sp, #-4]
353 sub r0, r0, pc
354 /* compute offset again without displaced stepping. */
355 str pc, [sp, #-4]
356 ldr r1, [sp, #-4]
357 sub r1, r1, pc
358
359 /* r0 should be equal to r1. */
360 cmp r0, r1
361 bne pc_offset_wrong
362
363 .global pc_offset_right
364pc_offset_right:
365 b test_str_pc_end
366
367 .global pc_offset_wrong
368pc_offset_wrong:
369 nop
370
371 .global test_str_pc_end
372test_str_pc_end:
373 bx lr
374#endif
GDB Binutils - Deliverables
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