nuke no-op STAB_REG_TO_REGNUM
[deliverable/binutils-gdb.git] / gdb / tm-mips.h
CommitLineData
dd3b648e 1/* Definitions to make GDB run on a mips box under 4.3bsd.
07c2fa3e 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
fbcb5095 3 Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
07c2fa3e 4 and by Alessandro Forin (af@cs.cmu.edu) at CMU..
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5
6This file is part of GDB.
7
99a7de40 8This program is free software; you can redistribute it and/or modify
dd3b648e 9it under the terms of the GNU General Public License as published by
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10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
dd3b648e 12
99a7de40 13This program is distributed in the hope that it will be useful,
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14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
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19along with this program; if not, write to the Free Software
20Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
dd3b648e 21
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22#include "coff/sym.h" /* Needed for PDR below. */
23#include "coff/symconst.h"
d1bb1d41 24
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25#if !defined (TARGET_BYTE_ORDER)
26#define TARGET_BYTE_ORDER LITTLE_ENDIAN
27#endif
28
29/* Floating point is IEEE compliant */
30#define IEEE_FLOAT
31
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32/* Some MIPS boards are provided both with and without a floating
33 point coprocessor; we provide a user settable variable to tell gdb
34 whether there is one or not. */
35extern int mips_fpu;
36
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37/* Offset from address of function to start of its code.
38 Zero on most machines. */
39
40#define FUNCTION_START_OFFSET 0
41
42/* Advance PC across any function entry prologue instructions
43 to reach some "real" code. */
44
45#define SKIP_PROLOGUE(pc) pc = mips_skip_prologue(pc)
46
47/* Immediately after a function call, return the saved pc.
48 Can't always go through the frames for this because on some machines
49 the new frame is not set up until the new function executes
50 some instructions. */
51
52#define SAVED_PC_AFTER_CALL(frame) read_register(RA_REGNUM)
53
54/* Are we currently handling a signal */
55
56#define IN_SIGTRAMP(pc, name) in_sigtramp(pc, name)
57
58/* Address of end of stack space. */
59
60#define STACK_END_ADDR (0x7ffff000)
61
62/* Stack grows downward. */
63
64#define INNER_THAN <
65
66#define BIG_ENDIAN 4321
67#if TARGET_BYTE_ORDER == BIG_ENDIAN
68#define BREAKPOINT {0, 0x5, 0, 0xd}
69#else
70#define BREAKPOINT {0xd, 0, 0x5, 0}
71#endif
72
73/* Amount PC must be decremented by after a breakpoint.
74 This is often the number of bytes in BREAKPOINT
75 but not always. */
76
77#define DECR_PC_AFTER_BREAK 0
78
79/* Nonzero if instruction at PC is a return instruction. "j ra" on mips. */
80
81#define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 4) == 0x3e00008)
82
83/* Return 1 if P points to an invalid floating point value. */
84
85#define INVALID_FLOAT(p,l) isa_NAN(p,l)
86
87/* Say how long (all) registers are. */
88
89#define REGISTER_TYPE long
90
91/* Number of machine registers */
92
b543979c 93#define NUM_REGS 80
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94
95/* Initializer for an array of names of registers.
96 There should be NUM_REGS strings in this initializer. */
97
98#define REGISTER_NAMES \
99 { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
100 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
101 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
102 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
103 "sr", "lo", "hi", "bad", "cause","pc", \
104 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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105 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
106 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
107 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
108 "fsr", "fir", "fp", "inx", "rand", "tlblo","ctxt", "tlbhi",\
109 "epc", "prid"\
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110 }
111
112/* Register numbers of various important registers.
113 Note that some of these values are "real" register numbers,
114 and correspond to the general registers of the machine,
115 and some are "phony" register numbers which are too large
116 to be actual register numbers as far as the user is concerned
117 but do serve to get the desired values when passed to read_register. */
118
abefb1f1 119#define ZERO_REGNUM 0 /* read-only register, always 0 */
407a8389 120#define A0_REGNUM 4 /* Loc of first arg during a subr call */
dd3b648e 121#define SP_REGNUM 29 /* Contains address of top of stack */
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122#define RA_REGNUM 31 /* Contains return address value */
123#define PS_REGNUM 32 /* Contains processor status */
124#define HI_REGNUM 34 /* Multiple/divide temp */
125#define LO_REGNUM 33 /* ... */
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126#define BADVADDR_REGNUM 35 /* bad vaddr for addressing exception */
127#define CAUSE_REGNUM 36 /* describes last exception */
128#define PC_REGNUM 37 /* Contains program counter */
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129#define FP0_REGNUM 38 /* Floating point register 0 (single float) */
130#define FCRCS_REGNUM 70 /* FP control/status */
131#define FCRIR_REGNUM 71 /* FP implementation/revision */
132#define FP_REGNUM 72 /* Pseudo register that contains true address of executing stack frame */
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133#define FIRST_EMBED_REGNUM 73 /* First supervisor register for embedded use */
134#define LAST_EMBED_REGNUM 79 /* Last one */
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135
136/* Define DO_REGISTERS_INFO() to do machine-specific formatting
137 of register dumps. */
138
361bf6ee 139#define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp)
dd3b648e 140
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141/* Total amount of space needed to store our copies of the machine's
142 register state, the array `registers'. */
143#define REGISTER_BYTES (NUM_REGS*4)
144
145/* Index within `registers' of the first byte of the space for
146 register N. */
147
148#define REGISTER_BYTE(N) ((N) * 4)
149
150/* Number of bytes of storage in the actual machine representation
151 for register N. On mips, all regs are 4 bytes. */
152
153#define REGISTER_RAW_SIZE(N) 4
154
155/* Number of bytes of storage in the program's representation
156 for register N. On mips, all regs are 4 bytes. */
157
158#define REGISTER_VIRTUAL_SIZE(N) 4
159
160/* Largest value REGISTER_RAW_SIZE can have. */
161
162#define MAX_REGISTER_RAW_SIZE 4
163
164/* Largest value REGISTER_VIRTUAL_SIZE can have. */
165
166#define MAX_REGISTER_VIRTUAL_SIZE 4
167
168/* Nonzero if register N requires conversion
169 from raw format to virtual format. */
170
171#define REGISTER_CONVERTIBLE(N) 0
172
173/* Convert data from raw format for register REGNUM
174 to virtual format for register REGNUM. */
175
176#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,FROM,TO) \
177 bcopy ((FROM), (TO), 4);
178
179/* Convert data from virtual format for register REGNUM
180 to raw format for register REGNUM. */
181
182#define REGISTER_CONVERT_TO_RAW(REGNUM,FROM,TO) \
183 bcopy ((FROM), (TO), 4);
184
185/* Return the GDB type object for the "standard" data type
186 of data in register N. */
187
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188#define REGISTER_VIRTUAL_TYPE(N) \
189 (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) \
190 ? builtin_type_float : builtin_type_int) \
191
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192/* Store the address of the place in which to copy the structure the
193 subroutine will return. This is called from call_function. */
194
195#define STORE_STRUCT_RETURN(addr, sp) \
196 { sp = push_word(sp, addr);}
197
198/* Extract from an array REGBUF containing the (raw) register state
199 a function return value of type TYPE, and copy that, in virtual format,
200 into VALBUF. XXX floats */
201
202#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
c2a0f1cb 203 bcopy (REGBUF + REGISTER_BYTE ((TYPE_CODE (TYPE) == TYPE_CODE_FLT && mips_fpu) ? FP0_REGNUM : 2), VALBUF, TYPE_LENGTH (TYPE))
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204
205/* Write into appropriate registers a function return value
206 of type TYPE, given in virtual format. */
207
208#define STORE_RETURN_VALUE(TYPE,VALBUF) \
c2a0f1cb 209 write_register_bytes (REGISTER_BYTE ((TYPE_CODE (TYPE) == TYPE_CODE_FLT && mips_fpu) ? FP0_REGNUM : 2), VALBUF, TYPE_LENGTH (TYPE))
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210
211/* Extract from an array REGBUF containing the (raw) register state
212 the address in which a function should return its structure value,
213 as a CORE_ADDR (or an expression that can be used as one). */
214
215#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF+16))
216
217/* Structures are returned by ref in extra arg0 */
218#define USE_STRUCT_CONVENTION(gcc_p, type) 1
219
220\f
221/* Describe the pointer in each stack frame to the previous stack frame
222 (its caller). */
223
224/* FRAME_CHAIN takes a frame's nominal address
5e2e79f8 225 and produces the frame's chain-pointer. */
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226
227#define FRAME_CHAIN(thisframe) (FRAME_ADDR)mips_frame_chain(thisframe)
228
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229/* Define other aspects of the stack frame. */
230
231
232/* A macro that tells us whether the function invocation represented
233 by FI does not have a frame on the stack associated with it. If it
234 does not, FRAMELESS is set to 1, else 0. */
235/* We handle this differently for mips, and maybe we should not */
236
237#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) {(FRAMELESS) = 0;}
238
239/* Saved Pc. */
240
241#define FRAME_SAVED_PC(FRAME) (mips_frame_saved_pc(FRAME))
242
243#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
244
245#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
246
247/* Return number of args passed to a frame.
248 Can return -1, meaning no way to tell. */
249
250#define FRAME_NUM_ARGS(num, fi) (num = mips_frame_num_args(fi))
251
252/* Return number of bytes at start of arglist that are not really args. */
253
254#define FRAME_ARGS_SKIP 0
255
256/* Put here the code to store, into a struct frame_saved_regs,
257 the addresses of the saved registers of frame described by FRAME_INFO.
258 This includes special registers such as pc and fp saved in special
259 ways in the stack frame. sp is even more special:
260 the address we return for it IS the sp for the next frame. */
261
262#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) ( \
263 (frame_saved_regs) = *(frame_info)->saved_regs, \
264 (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame)
265
266\f
267/* Things needed for making the inferior call functions. */
268
269/* Stack has strict alignment. However, use PUSH_ARGUMENTS
270 to take care of it. */
271/*#define STACK_ALIGN(addr) (((addr)+3)&~3)*/
272
273#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
274 sp = mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
275
276/* Push an empty stack frame, to record the current PC, etc. */
277
278#define PUSH_DUMMY_FRAME mips_push_dummy_frame()
279
280/* Discard from the stack the innermost frame, restoring all registers. */
281
282#define POP_FRAME mips_pop_frame()
283
284#define MK_OP(op,rs,rt,offset) (((op)<<26)|((rs)<<21)|((rt)<<16)|(offset))
285#define CALL_DUMMY_SIZE (16*4)
286#define Dest_Reg 2
287#define CALL_DUMMY {\
288 MK_OP(0,RA_REGNUM,0,8), /* jr $ra # Fake ABOUT_TO_RETURN ...*/\
289 0, /* nop # ... to stop raw backtrace*/\
290 0x27bd0000, /* addu sp,?0 # Pseudo prologue */\
291/* Start here: */\
c2a0f1cb 292 MK_OP(061,SP_REGNUM,12,0), /* lwc1 $f12,0(sp) # Reload FP regs*/\
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293 MK_OP(061,SP_REGNUM,13,4), /* lwc1 $f13,4(sp) */\
294 MK_OP(061,SP_REGNUM,14,8), /* lwc1 $f14,8(sp) */\
295 MK_OP(061,SP_REGNUM,15,12), /* lwc1 $f15,12(sp) */\
c2a0f1cb 296 MK_OP(043,SP_REGNUM,4,0), /* lw $r4,0(sp) # Reload first 4 args*/\
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297 MK_OP(043,SP_REGNUM,5,4), /* lw $r5,4(sp) */\
298 MK_OP(043,SP_REGNUM,6,8), /* lw $r6,8(sp) */\
299 MK_OP(043,SP_REGNUM,7,12), /* lw $r7,12(sp) */\
300 (017<<26)| (Dest_Reg << 16), /* lui $r31,<target upper 16 bits>*/\
301 MK_OP(13,Dest_Reg,Dest_Reg,0), /* ori $r31,$r31,<lower 16 bits>*/ \
302 (Dest_Reg<<21) | (31<<11) | 9, /* jalr $r31 */\
303 MK_OP(043,SP_REGNUM,7,12), /* lw $r7,12(sp) */\
304 0x5000d, /* bpt */\
305}
306
307#define CALL_DUMMY_START_OFFSET 12
308
309/* Insert the specified number of args and function address
310 into a call sequence of the above form stored at DUMMYNAME. */
311
312#define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p)\
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313 do \
314 { \
315 ((int*)(dummyname))[11] |= ((unsigned long)(fun)) >> 16; \
316 ((int*)(dummyname))[12] |= (unsigned short)(fun); \
317 if (! mips_fpu) \
318 { \
319 ((int *) (dummyname))[3] = 0; \
320 ((int *) (dummyname))[4] = 0; \
321 ((int *) (dummyname))[5] = 0; \
322 ((int *) (dummyname))[6] = 0; \
323 } \
324 } \
325 while (0)
dd3b648e 326
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327/* There's a mess in stack frame creation. See comments in blockframe.c
328 near reference to INIT_FRAME_PC_FIRST. */
329
330#define INIT_FRAME_PC(fromleaf, prev) /* nada */
331
332#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
333 (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \
334 (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ());
335
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336/* Special symbol found in blocks associated with routines. We can hang
337 mips_extra_func_info_t's off of this. */
338
339#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
340
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341/* Specific information about a procedure.
342 This overlays the MIPS's PDR records,
343 mipsread.c (ab)uses this to save memory */
344
345typedef struct mips_extra_func_info {
dd3b648e 346 long numargs; /* number of args to procedure (was iopt) */
d1bb1d41 347 PDR pdr; /* Procedure descriptor record */
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348} *mips_extra_func_info_t;
349
350#define EXTRA_FRAME_INFO \
4ad1963e 351 mips_extra_func_info_t proc_desc; \
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352 int num_args;\
353 struct frame_saved_regs *saved_regs;
354
a23075bc 355#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
bd49ef36 356
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357#define PRINT_EXTRA_FRAME_INFO(fi) \
358 { \
359 if (fi && fi->proc_desc && fi->proc_desc->pdr.framereg < NUM_REGS) \
360 printf_filtered (" frame pointer is at %s+%d\n", \
361 reg_names[fi->proc_desc->pdr.framereg], \
362 fi->proc_desc->pdr.frameoffset); \
363 }
364
07c2fa3e 365/* It takes two values to specify a frame on the MIPS. Sigh.
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366
367 In fact, at the moment, the *PC* is the primary value that sets up
368 a frame. The PC is looked up to see what function it's in; symbol
369 information from that function tells us which register is the frame
370 pointer base, and what offset from there is the "virtual frame pointer".
371 (This is usually an offset from SP.) FIXME -- this should be cleaned
372 up so that the primary value is the SP, and the PC is used to disambiguate
373 multiple functions with the same SP that are at different stack levels. */
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374
375#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
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376/* FIXME: Depends on equivalence between FRAME and "struct frame_info *",
377 and equivalence between CORE_ADDR and FRAME_ADDR. */
378extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
2886f8b2 379
bd49ef36 380#define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
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