Add __FILE__ and __LINE__ parameter to internal_error() /
[deliverable/binutils-gdb.git] / gdb / v850-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
8e65ff28 2 Copyright 1996, 2000, 2001 Free Software Foundation, Inc.
c906108c 3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "obstack.h"
25#include "target.h"
26#include "value.h"
27#include "bfd.h"
28#include "gdb_string.h"
29#include "gdbcore.h"
30#include "symfile.h"
b4a20239 31#include "arch-utils.h"
c906108c
SS
32
33
34static char *v850_generic_reg_names[] = REGISTER_NAMES;
35
36static char *v850e_reg_names[] =
37{
38 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
39 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
40 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
41 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
42 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
43 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
44 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
45 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
46 "pc", "fp"
47};
48
49char **v850_register_names = v850_generic_reg_names;
50
51struct
c5aa993b
JM
52 {
53 char **regnames;
54 int mach;
55 }
56v850_processor_type_table[] =
c906108c 57{
c5aa993b
JM
58 {
59 v850_generic_reg_names, bfd_mach_v850
60 }
61 ,
62 {
63 v850e_reg_names, bfd_mach_v850e
64 }
65 ,
66 {
67 v850e_reg_names, bfd_mach_v850ea
68 }
69 ,
70 {
71 NULL, 0
72 }
c906108c
SS
73};
74
75/* Info gleaned from scanning a function's prologue. */
76
77struct pifsr /* Info about one saved reg */
c5aa993b
JM
78 {
79 int framereg; /* Frame reg (SP or FP) */
80 int offset; /* Offset from framereg */
81 int cur_frameoffset; /* Current frameoffset */
82 int reg; /* Saved register number */
83 };
c906108c
SS
84
85struct prologue_info
c5aa993b
JM
86 {
87 int framereg;
88 int frameoffset;
89 int start_function;
90 struct pifsr *pifsrs;
91 };
c906108c 92
a14ed312 93static CORE_ADDR v850_scan_prologue (CORE_ADDR pc, struct prologue_info *fs);
c906108c
SS
94
95
96/* Should call_function allocate stack space for a struct return? */
97int
fba45db2 98v850_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
99{
100 return (TYPE_NFIELDS (type) > 1 || TYPE_LENGTH (type) > 4);
101}
c906108c
SS
102\f
103
c5aa993b 104
c906108c 105/* Structure for mapping bits in register lists to register numbers. */
c5aa993b 106struct reg_list
c906108c
SS
107{
108 long mask;
109 int regno;
110};
111
112/* Helper function for v850_scan_prologue to handle prepare instruction. */
113
114static void
c5aa993b 115handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr,
c906108c 116 struct prologue_info *pi, struct pifsr **pifsr_ptr)
c906108c
SS
117{
118 CORE_ADDR current_pc = *current_pc_ptr;
119 struct pifsr *pifsr = *pifsr_ptr;
120 long next = insn2 & 0xffff;
121 long list12 = ((insn & 1) << 16) + (next & 0xffe0);
122 long offset = (insn & 0x3e) << 1;
c5aa993b 123 static struct reg_list reg_table[] =
c906108c 124 {
c5aa993b
JM
125 {0x00800, 20}, /* r20 */
126 {0x00400, 21}, /* r21 */
127 {0x00200, 22}, /* r22 */
128 {0x00100, 23}, /* r23 */
129 {0x08000, 24}, /* r24 */
130 {0x04000, 25}, /* r25 */
131 {0x02000, 26}, /* r26 */
132 {0x01000, 27}, /* r27 */
133 {0x00080, 28}, /* r28 */
134 {0x00040, 29}, /* r29 */
135 {0x10000, 30}, /* ep */
136 {0x00020, 31}, /* lp */
137 {0, 0} /* end of table */
c906108c
SS
138 };
139 int i;
140
c5aa993b 141 if ((next & 0x1f) == 0x0b) /* skip imm16 argument */
c906108c
SS
142 current_pc += 2;
143 else if ((next & 0x1f) == 0x13) /* skip imm16 argument */
144 current_pc += 2;
145 else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */
146 current_pc += 4;
147
148 /* Calculate the total size of the saved registers, and add it
149 it to the immediate value used to adjust SP. */
150 for (i = 0; reg_table[i].mask != 0; i++)
151 if (list12 & reg_table[i].mask)
152 offset += REGISTER_RAW_SIZE (regtable[i].regno);
153 pi->frameoffset -= offset;
154
155 /* Calculate the offsets of the registers relative to the value
156 the SP will have after the registers have been pushed and the
157 imm5 value has been subtracted from it. */
158 if (pifsr)
159 {
160 for (i = 0; reg_table[i].mask != 0; i++)
161 {
162 if (list12 & reg_table[i].mask)
163 {
164 int reg = reg_table[i].regno;
165 offset -= REGISTER_RAW_SIZE (reg);
166 pifsr->reg = reg;
167 pifsr->offset = offset;
168 pifsr->cur_frameoffset = pi->frameoffset;
c5aa993b 169#ifdef DEBUG
c906108c 170 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
c5aa993b 171#endif
c906108c
SS
172 pifsr++;
173 }
174 }
175 }
176#ifdef DEBUG
177 printf_filtered ("\tfound ctret after regsave func");
178#endif
179
180 /* Set result parameters. */
181 *current_pc_ptr = current_pc;
182 *pifsr_ptr = pifsr;
183}
184
185
186/* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
187 FIXME: the SR bit of the register list is not supported; must check
188 that the compiler does not ever generate this bit. */
189
190static void
191handle_pushm (int insn, int insn2, struct prologue_info *pi,
c5aa993b 192 struct pifsr **pifsr_ptr)
c906108c
SS
193{
194 struct pifsr *pifsr = *pifsr_ptr;
195 long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
196 long offset = 0;
c5aa993b 197 static struct reg_list pushml_reg_table[] =
c906108c 198 {
c5aa993b
JM
199 {0x80000, PS_REGNUM}, /* PSW */
200 {0x40000, 1}, /* r1 */
201 {0x20000, 2}, /* r2 */
202 {0x10000, 3}, /* r3 */
203 {0x00800, 4}, /* r4 */
204 {0x00400, 5}, /* r5 */
205 {0x00200, 6}, /* r6 */
206 {0x00100, 7}, /* r7 */
207 {0x08000, 8}, /* r8 */
208 {0x04000, 9}, /* r9 */
209 {0x02000, 10}, /* r10 */
210 {0x01000, 11}, /* r11 */
211 {0x00080, 12}, /* r12 */
212 {0x00040, 13}, /* r13 */
213 {0x00020, 14}, /* r14 */
214 {0x00010, 15}, /* r15 */
215 {0, 0} /* end of table */
c906108c 216 };
c5aa993b 217 static struct reg_list pushmh_reg_table[] =
c906108c 218 {
c5aa993b
JM
219 {0x80000, 16}, /* r16 */
220 {0x40000, 17}, /* r17 */
221 {0x20000, 18}, /* r18 */
222 {0x10000, 19}, /* r19 */
223 {0x00800, 20}, /* r20 */
224 {0x00400, 21}, /* r21 */
225 {0x00200, 22}, /* r22 */
226 {0x00100, 23}, /* r23 */
227 {0x08000, 24}, /* r24 */
228 {0x04000, 25}, /* r25 */
229 {0x02000, 26}, /* r26 */
230 {0x01000, 27}, /* r27 */
231 {0x00080, 28}, /* r28 */
232 {0x00040, 29}, /* r29 */
233 {0x00010, 30}, /* r30 */
234 {0x00020, 31}, /* r31 */
235 {0, 0} /* end of table */
c906108c
SS
236 };
237 struct reg_list *reg_table;
238 int i;
239
240 /* Is this a pushml or a pushmh? */
241 if ((insn2 & 7) == 1)
242 reg_table = pushml_reg_table;
243 else
244 reg_table = pushmh_reg_table;
245
246 /* Calculate the total size of the saved registers, and add it
247 it to the immediate value used to adjust SP. */
248 for (i = 0; reg_table[i].mask != 0; i++)
249 if (list12 & reg_table[i].mask)
250 offset += REGISTER_RAW_SIZE (regtable[i].regno);
251 pi->frameoffset -= offset;
252
253 /* Calculate the offsets of the registers relative to the value
254 the SP will have after the registers have been pushed and the
255 imm5 value is subtracted from it. */
256 if (pifsr)
257 {
258 for (i = 0; reg_table[i].mask != 0; i++)
259 {
260 if (list12 & reg_table[i].mask)
261 {
262 int reg = reg_table[i].regno;
263 offset -= REGISTER_RAW_SIZE (reg);
264 pifsr->reg = reg;
265 pifsr->offset = offset;
266 pifsr->cur_frameoffset = pi->frameoffset;
c5aa993b 267#ifdef DEBUG
c906108c 268 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
c5aa993b 269#endif
c906108c
SS
270 pifsr++;
271 }
272 }
273 }
274#ifdef DEBUG
275 printf_filtered ("\tfound ctret after regsave func");
276#endif
277
278 /* Set result parameters. */
279 *pifsr_ptr = pifsr;
280}
c5aa993b 281\f
c906108c
SS
282
283
284
c906108c
SS
285/* Function: scan_prologue
286 Scan the prologue of the function that contains PC, and record what
287 we find in PI. PI->fsr must be zeroed by the called. Returns the
288 pc after the prologue. Note that the addresses saved in pi->fsr
289 are actually just frame relative (negative offsets from the frame
290 pointer). This is because we don't know the actual value of the
291 frame pointer yet. In some circumstances, the frame pointer can't
292 be determined till after we have scanned the prologue. */
293
294static CORE_ADDR
fba45db2 295v850_scan_prologue (CORE_ADDR pc, struct prologue_info *pi)
c906108c
SS
296{
297 CORE_ADDR func_addr, prologue_end, current_pc;
298 struct pifsr *pifsr, *pifsr_tmp;
299 int fp_used;
300 int ep_used;
301 int reg;
302 CORE_ADDR save_pc, save_end;
303 int regsave_func_p;
304 int r12_tmp;
305
306 /* First, figure out the bounds of the prologue so that we can limit the
307 search to something reasonable. */
308
309 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
310 {
311 struct symtab_and_line sal;
312
313 sal = find_pc_line (func_addr, 0);
314
315 if (func_addr == entry_point_address ())
316 pi->start_function = 1;
317 else
318 pi->start_function = 0;
319
320#if 0
321 if (sal.line == 0)
322 prologue_end = pc;
323 else
324 prologue_end = sal.end;
325#else
326 prologue_end = pc;
327#endif
328 }
329 else
330 { /* We're in the boondocks */
331 func_addr = pc - 100;
332 prologue_end = pc;
333 }
334
335 prologue_end = min (prologue_end, pc);
336
337 /* Now, search the prologue looking for instructions that setup fp, save
338 rp, adjust sp and such. We also record the frame offset of any saved
c5aa993b 339 registers. */
c906108c
SS
340
341 pi->frameoffset = 0;
342 pi->framereg = SP_REGNUM;
343 fp_used = 0;
344 ep_used = 0;
345 pifsr = pi->pifsrs;
346 regsave_func_p = 0;
347 save_pc = 0;
348 save_end = 0;
349 r12_tmp = 0;
350
351#ifdef DEBUG
352 printf_filtered ("Current_pc = 0x%.8lx, prologue_end = 0x%.8lx\n",
c5aa993b 353 (long) func_addr, (long) prologue_end);
c906108c
SS
354#endif
355
c5aa993b 356 for (current_pc = func_addr; current_pc < prologue_end;)
c906108c
SS
357 {
358 int insn, insn2;
359
360#ifdef DEBUG
c5aa993b 361 printf_filtered ("0x%.8lx ", (long) current_pc);
c906108c
SS
362 (*tm_print_insn) (current_pc, &tm_print_insn_info);
363#endif
364
365 insn = read_memory_unsigned_integer (current_pc, 2);
366 current_pc += 2;
c5aa993b 367 if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
c906108c
SS
368 {
369 insn2 = read_memory_unsigned_integer (current_pc, 2);
370 current_pc += 2;
371 }
372
373 if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
374 { /* jarl <func>,10 */
c5aa993b 375 long low_disp = insn2 & ~(long) 1;
c906108c 376 long disp = (((((insn & 0x3f) << 16) + low_disp)
c5aa993b 377 & ~(long) 1) ^ 0x00200000) - 0x00200000;
c906108c
SS
378
379 save_pc = current_pc;
380 save_end = prologue_end;
381 regsave_func_p = 1;
382 current_pc += disp - 4;
383 prologue_end = (current_pc
384 + (2 * 3) /* moves to/from ep */
c5aa993b
JM
385 + 4 /* addi <const>,sp,sp */
386 + 2 /* jmp [r10] */
c906108c
SS
387 + (2 * 12) /* sst.w to save r2, r20-r29, r31 */
388 + 20); /* slop area */
389
390#ifdef DEBUG
391 printf_filtered ("\tfound jarl <func>,r10, disp = %ld, low_disp = %ld, new pc = 0x%.8lx\n",
c5aa993b 392 disp, low_disp, (long) current_pc + 2);
c906108c
SS
393#endif
394 continue;
395 }
396 else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
397 { /* callt <imm6> */
398 long ctbp = read_register (CTBP_REGNUM);
399 long adr = ctbp + ((insn & 0x3f) << 1);
400
401 save_pc = current_pc;
402 save_end = prologue_end;
403 regsave_func_p = 1;
404 current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
405 prologue_end = (current_pc
406 + (2 * 3) /* prepare list2,imm5,sp/imm */
c5aa993b 407 + 4 /* ctret */
c906108c
SS
408 + 20); /* slop area */
409
410#ifdef DEBUG
411 printf_filtered ("\tfound callt, ctbp = 0x%.8lx, adr = %.8lx, new pc = 0x%.8lx\n",
c5aa993b 412 ctbp, adr, (long) current_pc);
c906108c
SS
413#endif
414 continue;
415 }
416 else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */
417 {
418 handle_prepare (insn, insn2, &current_pc, pi, &pifsr);
419 continue;
420 }
421 else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
422 { /* ctret after processing register save function */
423 current_pc = save_pc;
424 prologue_end = save_end;
425 regsave_func_p = 0;
426#ifdef DEBUG
427 printf_filtered ("\tfound ctret after regsave func");
428#endif
429 continue;
430 }
431 else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
432 { /* pushml, pushmh */
433 handle_pushm (insn, insn2, pi, &pifsr);
434 continue;
435 }
436 else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
437 { /* jmp after processing register save function */
438 current_pc = save_pc;
439 prologue_end = save_end;
440 regsave_func_p = 0;
441#ifdef DEBUG
442 printf_filtered ("\tfound jmp after regsave func");
443#endif
444 continue;
445 }
446 else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */
447 || (insn & 0xffe0) == 0x0060 /* jmp */
448 || (insn & 0x0780) == 0x0580) /* branch */
449 {
450#ifdef DEBUG
451 printf_filtered ("\n");
452#endif
c5aa993b 453 break; /* Ran into end of prologue */
c906108c
SS
454 }
455
456 else if ((insn & 0xffe0) == ((SP_REGNUM << 11) | 0x0240)) /* add <imm>,sp */
457 pi->frameoffset += ((insn & 0x1f) ^ 0x10) - 0x10;
458 else if (insn == ((SP_REGNUM << 11) | 0x0600 | SP_REGNUM)) /* addi <imm>,sp,sp */
459 pi->frameoffset += insn2;
460 else if (insn == ((FP_RAW_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,fp */
461 {
462 fp_used = 1;
463 pi->framereg = FP_RAW_REGNUM;
464 }
465
466 else if (insn == ((R12_REGNUM << 11) | 0x0640 | R0_REGNUM)) /* movhi hi(const),r0,r12 */
467 r12_tmp = insn2 << 16;
468 else if (insn == ((R12_REGNUM << 11) | 0x0620 | R12_REGNUM)) /* movea lo(const),r12,r12 */
469 r12_tmp += insn2;
c5aa993b 470 else if (insn == ((SP_REGNUM << 11) | 0x01c0 | R12_REGNUM) && r12_tmp) /* add r12,sp */
c906108c
SS
471 pi->frameoffset = r12_tmp;
472 else if (insn == ((EP_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,ep */
473 ep_used = 1;
474 else if (insn == ((EP_REGNUM << 11) | 0x0000 | R1_REGNUM)) /* mov r1,ep */
475 ep_used = 0;
c5aa993b 476 else if (((insn & 0x07ff) == (0x0760 | SP_REGNUM) /* st.w <reg>,<offset>[sp] */
c906108c
SS
477 || (fp_used
478 && (insn & 0x07ff) == (0x0760 | FP_RAW_REGNUM))) /* st.w <reg>,<offset>[fp] */
479 && pifsr
480 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
481 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
c5aa993b 482 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
c906108c
SS
483 {
484 pifsr->reg = reg;
485 pifsr->offset = insn2 & ~1;
486 pifsr->cur_frameoffset = pi->frameoffset;
487#ifdef DEBUG
488 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
489#endif
490 pifsr++;
491 }
492
c5aa993b 493 else if (ep_used /* sst.w <reg>,<offset>[ep] */
c906108c
SS
494 && ((insn & 0x0781) == 0x0501)
495 && pifsr
496 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
497 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
c5aa993b 498 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
c906108c
SS
499 {
500 pifsr->reg = reg;
501 pifsr->offset = (insn & 0x007e) << 1;
502 pifsr->cur_frameoffset = pi->frameoffset;
503#ifdef DEBUG
504 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
505#endif
506 pifsr++;
507 }
508
509#ifdef DEBUG
510 printf_filtered ("\n");
511#endif
512 }
513
514 if (pifsr)
515 pifsr->framereg = 0; /* Tie off last entry */
516
517 /* Fix up any offsets to the final offset. If a frame pointer was created, use it
518 instead of the stack pointer. */
519 for (pifsr_tmp = pi->pifsrs; pifsr_tmp && pifsr_tmp != pifsr; pifsr_tmp++)
520 {
521 pifsr_tmp->offset -= pi->frameoffset - pifsr_tmp->cur_frameoffset;
522 pifsr_tmp->framereg = pi->framereg;
523
524#ifdef DEBUG
525 printf_filtered ("Saved register r%d, offset = %d, framereg = r%d\n",
c5aa993b 526 pifsr_tmp->reg, pifsr_tmp->offset, pifsr_tmp->framereg);
c906108c
SS
527#endif
528 }
529
530#ifdef DEBUG
531 printf_filtered ("Framereg = r%d, frameoffset = %d\n", pi->framereg, pi->frameoffset);
532#endif
533
534 return current_pc;
535}
536
537/* Function: init_extra_frame_info
538 Setup the frame's frame pointer, pc, and frame addresses for saved
539 registers. Most of the work is done in scan_prologue().
540
541 Note that when we are called for the last frame (currently active frame),
542 that fi->pc and fi->frame will already be setup. However, fi->frame will
543 be valid only if this routine uses FP. For previous frames, fi-frame will
544 always be correct (since that is derived from v850_frame_chain ()).
545
546 We can be called with the PC in the call dummy under two circumstances.
547 First, during normal backtracing, second, while figuring out the frame
548 pointer just prior to calling the target function (see run_stack_dummy). */
549
550void
fba45db2 551v850_init_extra_frame_info (struct frame_info *fi)
c906108c
SS
552{
553 struct prologue_info pi;
554 struct pifsr pifsrs[NUM_REGS + 1], *pifsr;
555
556 if (fi->next)
557 fi->pc = FRAME_SAVED_PC (fi->next);
558
559 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
560
561 /* The call dummy doesn't save any registers on the stack, so we can return
562 now. */
563 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c5aa993b 564 return;
c906108c
SS
565
566 pi.pifsrs = pifsrs;
567
568 v850_scan_prologue (fi->pc, &pi);
569
570 if (!fi->next && pi.framereg == SP_REGNUM)
571 fi->frame = read_register (pi.framereg) - pi.frameoffset;
572
573 for (pifsr = pifsrs; pifsr->framereg; pifsr++)
574 {
575 fi->fsr.regs[pifsr->reg] = pifsr->offset + fi->frame;
576
577 if (pifsr->framereg == SP_REGNUM)
578 fi->fsr.regs[pifsr->reg] += pi.frameoffset;
579 }
580}
581
582/* Function: frame_chain
583 Figure out the frame prior to FI. Unfortunately, this involves
584 scanning the prologue of the caller, which will also be done
585 shortly by v850_init_extra_frame_info. For the dummy frame, we
586 just return the stack pointer that was in use at the time the
587 function call was made. */
588
589CORE_ADDR
fba45db2 590v850_frame_chain (struct frame_info *fi)
c906108c
SS
591{
592 struct prologue_info pi;
593 CORE_ADDR callers_pc, fp;
594
595 /* First, find out who called us */
596 callers_pc = FRAME_SAVED_PC (fi);
597 /* If caller is a call-dummy, then our FP bears no relation to his FP! */
598 fp = v850_find_callers_reg (fi, FP_RAW_REGNUM);
c5aa993b
JM
599 if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
600 return fp; /* caller is call-dummy: return oldest value of FP */
c906108c
SS
601
602 /* Caller is NOT a call-dummy, so everything else should just work.
603 Even if THIS frame is a call-dummy! */
604 pi.pifsrs = NULL;
605
606 v850_scan_prologue (callers_pc, &pi);
607
608 if (pi.start_function)
609 return 0; /* Don't chain beyond the start function */
610
611 if (pi.framereg == FP_RAW_REGNUM)
612 return v850_find_callers_reg (fi, pi.framereg);
613
614 return fi->frame - pi.frameoffset;
615}
616
617/* Function: find_callers_reg
618 Find REGNUM on the stack. Otherwise, it's in an active register.
619 One thing we might want to do here is to check REGNUM against the
620 clobber mask, and somehow flag it as invalid if it isn't saved on
621 the stack somewhere. This would provide a graceful failure mode
622 when trying to get the value of caller-saves registers for an inner
623 frame. */
624
625CORE_ADDR
fba45db2 626v850_find_callers_reg (struct frame_info *fi, int regnum)
c906108c
SS
627{
628 for (; fi; fi = fi->next)
629 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
630 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
631 else if (fi->fsr.regs[regnum] != 0)
c5aa993b
JM
632 return read_memory_unsigned_integer (fi->fsr.regs[regnum],
633 REGISTER_RAW_SIZE (regnum));
c906108c
SS
634
635 return read_register (regnum);
636}
637
638/* Function: skip_prologue
639 Return the address of the first code past the prologue of the function. */
640
641CORE_ADDR
fba45db2 642v850_skip_prologue (CORE_ADDR pc)
c906108c
SS
643{
644 CORE_ADDR func_addr, func_end;
645
646 /* See what the symbol table says */
647
648 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
649 {
650 struct symtab_and_line sal;
651
652 sal = find_pc_line (func_addr, 0);
653
654 if (sal.line != 0 && sal.end < func_end)
655 return sal.end;
656 else
657 /* Either there's no line info, or the line after the prologue is after
658 the end of the function. In this case, there probably isn't a
659 prologue. */
660 return pc;
661 }
662
663/* We can't find the start of this function, so there's nothing we can do. */
664 return pc;
665}
666
667/* Function: pop_frame
668 This routine gets called when either the user uses the `return'
669 command, or the call dummy breakpoint gets hit. */
670
671void
fba45db2 672v850_pop_frame (struct frame_info *frame)
c906108c
SS
673{
674 int regnum;
675
c5aa993b 676 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
c906108c
SS
677 generic_pop_dummy_frame ();
678 else
679 {
680 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
681
682 for (regnum = 0; regnum < NUM_REGS; regnum++)
683 if (frame->fsr.regs[regnum] != 0)
684 write_register (regnum,
c5aa993b
JM
685 read_memory_unsigned_integer (frame->fsr.regs[regnum],
686 REGISTER_RAW_SIZE (regnum)));
c906108c
SS
687
688 write_register (SP_REGNUM, FRAME_FP (frame));
689 }
690
691 flush_cached_frames ();
692}
693
694/* Function: push_arguments
695 Setup arguments and RP for a call to the target. First four args
696 go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs
697 are passed by reference. 64 bit quantities (doubles and long
698 longs) may be split between the regs and the stack. When calling a
699 function that returns a struct, a pointer to the struct is passed
700 in as a secret first argument (always in R6).
701
702 Stack space for the args has NOT been allocated: that job is up to us.
c5aa993b 703 */
c906108c
SS
704
705CORE_ADDR
fba45db2
KB
706v850_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
707 unsigned char struct_return, CORE_ADDR struct_addr)
c906108c
SS
708{
709 int argreg;
710 int argnum;
711 int len = 0;
712 int stack_offset;
713
714 /* First, just for safety, make sure stack is aligned */
715 sp &= ~3;
716
717 /* Now make space on the stack for the args. */
718 for (argnum = 0; argnum < nargs; argnum++)
c5aa993b
JM
719 len += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
720 sp -= len; /* possibly over-allocating, but it works... */
721 /* (you might think we could allocate 16 bytes */
722 /* less, but the ABI seems to use it all! ) */
c906108c
SS
723 argreg = ARG0_REGNUM;
724
725 /* the struct_return pointer occupies the first parameter-passing reg */
726 if (struct_return)
c5aa993b 727 write_register (argreg++, struct_addr);
c906108c
SS
728
729 stack_offset = 16;
730 /* The offset onto the stack at which we will start copying parameters
731 (after the registers are used up) begins at 16 rather than at zero.
732 I don't really know why, that's just the way it seems to work. */
733
734 /* Now load as many as possible of the first arguments into
735 registers, and push the rest onto the stack. There are 16 bytes
736 in four registers available. Loop thru args from first to last. */
737 for (argnum = 0; argnum < nargs; argnum++)
738 {
739 int len;
740 char *val;
c5aa993b 741 char valbuf[REGISTER_RAW_SIZE (ARG0_REGNUM)];
c906108c
SS
742
743 if (TYPE_CODE (VALUE_TYPE (*args)) == TYPE_CODE_STRUCT
744 && TYPE_LENGTH (VALUE_TYPE (*args)) > 8)
745 {
746 store_address (valbuf, 4, VALUE_ADDRESS (*args));
747 len = 4;
748 val = valbuf;
749 }
750 else
751 {
752 len = TYPE_LENGTH (VALUE_TYPE (*args));
c5aa993b 753 val = (char *) VALUE_CONTENTS (*args);
c906108c
SS
754 }
755
756 while (len > 0)
c5aa993b 757 if (argreg <= ARGLAST_REGNUM)
c906108c
SS
758 {
759 CORE_ADDR regval;
760
761 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
762 write_register (argreg, regval);
763
764 len -= REGISTER_RAW_SIZE (argreg);
765 val += REGISTER_RAW_SIZE (argreg);
766 argreg++;
767 }
768 else
769 {
770 write_memory (sp + stack_offset, val, 4);
771
772 len -= 4;
773 val += 4;
774 stack_offset += 4;
775 }
776 args++;
777 }
778 return sp;
779}
780
781/* Function: push_return_address (pc)
782 Set up the return address for the inferior function call.
783 Needed for targets where we don't actually execute a JSR/BSR instruction */
c5aa993b 784
c906108c 785CORE_ADDR
fba45db2 786v850_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c
SS
787{
788 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
789 return sp;
790}
c5aa993b 791
c906108c
SS
792/* Function: frame_saved_pc
793 Find the caller of this frame. We do this by seeing if RP_REGNUM
794 is saved in the stack anywhere, otherwise we get it from the
795 registers. If the inner frame is a dummy frame, return its PC
796 instead of RP, because that's where "caller" of the dummy-frame
797 will be found. */
798
799CORE_ADDR
fba45db2 800v850_frame_saved_pc (struct frame_info *fi)
c906108c 801{
c5aa993b
JM
802 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
803 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
804 else
805 return v850_find_callers_reg (fi, RP_REGNUM);
806}
807
c906108c
SS
808
809/* Function: fix_call_dummy
810 Pokes the callee function's address into the CALL_DUMMY assembly stub.
811 Assumes that the CALL_DUMMY looks like this:
c5aa993b
JM
812 jarl <offset24>, r31
813 trap
814 */
c906108c
SS
815
816int
fba45db2
KB
817v850_fix_call_dummy (char *dummy, CORE_ADDR sp, CORE_ADDR fun, int nargs,
818 value_ptr *args, struct type *type, int gcc_p)
c906108c
SS
819{
820 long offset24;
821
822 offset24 = (long) fun - (long) entry_point_address ();
823 offset24 &= 0x3fffff;
824 offset24 |= 0xff800000; /* jarl <offset24>, r31 */
825
c5aa993b
JM
826 store_unsigned_integer ((unsigned int *) &dummy[2], 2, offset24 & 0xffff);
827 store_unsigned_integer ((unsigned int *) &dummy[0], 2, offset24 >> 16);
c906108c
SS
828 return 0;
829}
830
831/* Change the register names based on the current machine type. */
832
833static int
fba45db2 834v850_target_architecture_hook (const bfd_arch_info_type *ap)
c906108c
SS
835{
836 int i, j;
837
838 if (ap->arch != bfd_arch_v850)
839 return 0;
840
841 for (i = 0; v850_processor_type_table[i].regnames != NULL; i++)
842 {
843 if (v850_processor_type_table[i].mach == ap->mach)
844 {
845 v850_register_names = v850_processor_type_table[i].regnames;
c5394b80 846 tm_print_insn_info.mach = ap->mach;
c906108c
SS
847 return 1;
848 }
849 }
850
8e65ff28
AC
851 internal_error (__FILE__, __LINE__,
852 "Architecture `%s' unrecognized", ap->printable_name);
c906108c
SS
853}
854
855void
fba45db2 856_initialize_v850_tdep (void)
c906108c
SS
857{
858 tm_print_insn = print_insn_v850;
859 target_architecture_hook = v850_target_architecture_hook;
860}
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