Protoization.
[deliverable/binutils-gdb.git] / gdb / v850-tdep.c
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c906108c 1/* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
b4a20239 2 Copyright 1996, 2000 Free Software Foundation, Inc.
c906108c 3
c5aa993b 4 This file is part of GDB.
c906108c 5
c5aa993b
JM
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
c5aa993b
JM
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
c5aa993b
JM
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
c906108c
SS
20
21#include "defs.h"
22#include "frame.h"
23#include "inferior.h"
24#include "obstack.h"
25#include "target.h"
26#include "value.h"
27#include "bfd.h"
28#include "gdb_string.h"
29#include "gdbcore.h"
30#include "symfile.h"
b4a20239 31#include "arch-utils.h"
c906108c
SS
32
33
34static char *v850_generic_reg_names[] = REGISTER_NAMES;
35
36static char *v850e_reg_names[] =
37{
38 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
39 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
40 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
41 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
42 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
43 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
44 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
45 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
46 "pc", "fp"
47};
48
49char **v850_register_names = v850_generic_reg_names;
50
51struct
c5aa993b
JM
52 {
53 char **regnames;
54 int mach;
55 }
56v850_processor_type_table[] =
c906108c 57{
c5aa993b
JM
58 {
59 v850_generic_reg_names, bfd_mach_v850
60 }
61 ,
62 {
63 v850e_reg_names, bfd_mach_v850e
64 }
65 ,
66 {
67 v850e_reg_names, bfd_mach_v850ea
68 }
69 ,
70 {
71 NULL, 0
72 }
c906108c
SS
73};
74
75/* Info gleaned from scanning a function's prologue. */
76
77struct pifsr /* Info about one saved reg */
c5aa993b
JM
78 {
79 int framereg; /* Frame reg (SP or FP) */
80 int offset; /* Offset from framereg */
81 int cur_frameoffset; /* Current frameoffset */
82 int reg; /* Saved register number */
83 };
c906108c
SS
84
85struct prologue_info
c5aa993b
JM
86 {
87 int framereg;
88 int frameoffset;
89 int start_function;
90 struct pifsr *pifsrs;
91 };
c906108c 92
a14ed312 93static CORE_ADDR v850_scan_prologue (CORE_ADDR pc, struct prologue_info *fs);
c906108c
SS
94
95
96/* Should call_function allocate stack space for a struct return? */
97int
fba45db2 98v850_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
99{
100 return (TYPE_NFIELDS (type) > 1 || TYPE_LENGTH (type) > 4);
101}
c906108c
SS
102\f
103
c5aa993b 104
c906108c 105/* Structure for mapping bits in register lists to register numbers. */
c5aa993b 106struct reg_list
c906108c
SS
107{
108 long mask;
109 int regno;
110};
111
112/* Helper function for v850_scan_prologue to handle prepare instruction. */
113
114static void
c5aa993b 115handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr,
c906108c
SS
116 struct prologue_info *pi, struct pifsr **pifsr_ptr)
117
118{
119 CORE_ADDR current_pc = *current_pc_ptr;
120 struct pifsr *pifsr = *pifsr_ptr;
121 long next = insn2 & 0xffff;
122 long list12 = ((insn & 1) << 16) + (next & 0xffe0);
123 long offset = (insn & 0x3e) << 1;
c5aa993b 124 static struct reg_list reg_table[] =
c906108c 125 {
c5aa993b
JM
126 {0x00800, 20}, /* r20 */
127 {0x00400, 21}, /* r21 */
128 {0x00200, 22}, /* r22 */
129 {0x00100, 23}, /* r23 */
130 {0x08000, 24}, /* r24 */
131 {0x04000, 25}, /* r25 */
132 {0x02000, 26}, /* r26 */
133 {0x01000, 27}, /* r27 */
134 {0x00080, 28}, /* r28 */
135 {0x00040, 29}, /* r29 */
136 {0x10000, 30}, /* ep */
137 {0x00020, 31}, /* lp */
138 {0, 0} /* end of table */
c906108c
SS
139 };
140 int i;
141
c5aa993b 142 if ((next & 0x1f) == 0x0b) /* skip imm16 argument */
c906108c
SS
143 current_pc += 2;
144 else if ((next & 0x1f) == 0x13) /* skip imm16 argument */
145 current_pc += 2;
146 else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */
147 current_pc += 4;
148
149 /* Calculate the total size of the saved registers, and add it
150 it to the immediate value used to adjust SP. */
151 for (i = 0; reg_table[i].mask != 0; i++)
152 if (list12 & reg_table[i].mask)
153 offset += REGISTER_RAW_SIZE (regtable[i].regno);
154 pi->frameoffset -= offset;
155
156 /* Calculate the offsets of the registers relative to the value
157 the SP will have after the registers have been pushed and the
158 imm5 value has been subtracted from it. */
159 if (pifsr)
160 {
161 for (i = 0; reg_table[i].mask != 0; i++)
162 {
163 if (list12 & reg_table[i].mask)
164 {
165 int reg = reg_table[i].regno;
166 offset -= REGISTER_RAW_SIZE (reg);
167 pifsr->reg = reg;
168 pifsr->offset = offset;
169 pifsr->cur_frameoffset = pi->frameoffset;
c5aa993b 170#ifdef DEBUG
c906108c 171 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
c5aa993b 172#endif
c906108c
SS
173 pifsr++;
174 }
175 }
176 }
177#ifdef DEBUG
178 printf_filtered ("\tfound ctret after regsave func");
179#endif
180
181 /* Set result parameters. */
182 *current_pc_ptr = current_pc;
183 *pifsr_ptr = pifsr;
184}
185
186
187/* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
188 FIXME: the SR bit of the register list is not supported; must check
189 that the compiler does not ever generate this bit. */
190
191static void
192handle_pushm (int insn, int insn2, struct prologue_info *pi,
c5aa993b 193 struct pifsr **pifsr_ptr)
c906108c
SS
194
195{
196 struct pifsr *pifsr = *pifsr_ptr;
197 long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
198 long offset = 0;
c5aa993b 199 static struct reg_list pushml_reg_table[] =
c906108c 200 {
c5aa993b
JM
201 {0x80000, PS_REGNUM}, /* PSW */
202 {0x40000, 1}, /* r1 */
203 {0x20000, 2}, /* r2 */
204 {0x10000, 3}, /* r3 */
205 {0x00800, 4}, /* r4 */
206 {0x00400, 5}, /* r5 */
207 {0x00200, 6}, /* r6 */
208 {0x00100, 7}, /* r7 */
209 {0x08000, 8}, /* r8 */
210 {0x04000, 9}, /* r9 */
211 {0x02000, 10}, /* r10 */
212 {0x01000, 11}, /* r11 */
213 {0x00080, 12}, /* r12 */
214 {0x00040, 13}, /* r13 */
215 {0x00020, 14}, /* r14 */
216 {0x00010, 15}, /* r15 */
217 {0, 0} /* end of table */
c906108c 218 };
c5aa993b 219 static struct reg_list pushmh_reg_table[] =
c906108c 220 {
c5aa993b
JM
221 {0x80000, 16}, /* r16 */
222 {0x40000, 17}, /* r17 */
223 {0x20000, 18}, /* r18 */
224 {0x10000, 19}, /* r19 */
225 {0x00800, 20}, /* r20 */
226 {0x00400, 21}, /* r21 */
227 {0x00200, 22}, /* r22 */
228 {0x00100, 23}, /* r23 */
229 {0x08000, 24}, /* r24 */
230 {0x04000, 25}, /* r25 */
231 {0x02000, 26}, /* r26 */
232 {0x01000, 27}, /* r27 */
233 {0x00080, 28}, /* r28 */
234 {0x00040, 29}, /* r29 */
235 {0x00010, 30}, /* r30 */
236 {0x00020, 31}, /* r31 */
237 {0, 0} /* end of table */
c906108c
SS
238 };
239 struct reg_list *reg_table;
240 int i;
241
242 /* Is this a pushml or a pushmh? */
243 if ((insn2 & 7) == 1)
244 reg_table = pushml_reg_table;
245 else
246 reg_table = pushmh_reg_table;
247
248 /* Calculate the total size of the saved registers, and add it
249 it to the immediate value used to adjust SP. */
250 for (i = 0; reg_table[i].mask != 0; i++)
251 if (list12 & reg_table[i].mask)
252 offset += REGISTER_RAW_SIZE (regtable[i].regno);
253 pi->frameoffset -= offset;
254
255 /* Calculate the offsets of the registers relative to the value
256 the SP will have after the registers have been pushed and the
257 imm5 value is subtracted from it. */
258 if (pifsr)
259 {
260 for (i = 0; reg_table[i].mask != 0; i++)
261 {
262 if (list12 & reg_table[i].mask)
263 {
264 int reg = reg_table[i].regno;
265 offset -= REGISTER_RAW_SIZE (reg);
266 pifsr->reg = reg;
267 pifsr->offset = offset;
268 pifsr->cur_frameoffset = pi->frameoffset;
c5aa993b 269#ifdef DEBUG
c906108c 270 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
c5aa993b 271#endif
c906108c
SS
272 pifsr++;
273 }
274 }
275 }
276#ifdef DEBUG
277 printf_filtered ("\tfound ctret after regsave func");
278#endif
279
280 /* Set result parameters. */
281 *pifsr_ptr = pifsr;
282}
c5aa993b 283\f
c906108c
SS
284
285
286
c906108c
SS
287/* Function: scan_prologue
288 Scan the prologue of the function that contains PC, and record what
289 we find in PI. PI->fsr must be zeroed by the called. Returns the
290 pc after the prologue. Note that the addresses saved in pi->fsr
291 are actually just frame relative (negative offsets from the frame
292 pointer). This is because we don't know the actual value of the
293 frame pointer yet. In some circumstances, the frame pointer can't
294 be determined till after we have scanned the prologue. */
295
296static CORE_ADDR
fba45db2 297v850_scan_prologue (CORE_ADDR pc, struct prologue_info *pi)
c906108c
SS
298{
299 CORE_ADDR func_addr, prologue_end, current_pc;
300 struct pifsr *pifsr, *pifsr_tmp;
301 int fp_used;
302 int ep_used;
303 int reg;
304 CORE_ADDR save_pc, save_end;
305 int regsave_func_p;
306 int r12_tmp;
307
308 /* First, figure out the bounds of the prologue so that we can limit the
309 search to something reasonable. */
310
311 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
312 {
313 struct symtab_and_line sal;
314
315 sal = find_pc_line (func_addr, 0);
316
317 if (func_addr == entry_point_address ())
318 pi->start_function = 1;
319 else
320 pi->start_function = 0;
321
322#if 0
323 if (sal.line == 0)
324 prologue_end = pc;
325 else
326 prologue_end = sal.end;
327#else
328 prologue_end = pc;
329#endif
330 }
331 else
332 { /* We're in the boondocks */
333 func_addr = pc - 100;
334 prologue_end = pc;
335 }
336
337 prologue_end = min (prologue_end, pc);
338
339 /* Now, search the prologue looking for instructions that setup fp, save
340 rp, adjust sp and such. We also record the frame offset of any saved
c5aa993b 341 registers. */
c906108c
SS
342
343 pi->frameoffset = 0;
344 pi->framereg = SP_REGNUM;
345 fp_used = 0;
346 ep_used = 0;
347 pifsr = pi->pifsrs;
348 regsave_func_p = 0;
349 save_pc = 0;
350 save_end = 0;
351 r12_tmp = 0;
352
353#ifdef DEBUG
354 printf_filtered ("Current_pc = 0x%.8lx, prologue_end = 0x%.8lx\n",
c5aa993b 355 (long) func_addr, (long) prologue_end);
c906108c
SS
356#endif
357
c5aa993b 358 for (current_pc = func_addr; current_pc < prologue_end;)
c906108c
SS
359 {
360 int insn, insn2;
361
362#ifdef DEBUG
c5aa993b 363 printf_filtered ("0x%.8lx ", (long) current_pc);
c906108c
SS
364 (*tm_print_insn) (current_pc, &tm_print_insn_info);
365#endif
366
367 insn = read_memory_unsigned_integer (current_pc, 2);
368 current_pc += 2;
c5aa993b 369 if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
c906108c
SS
370 {
371 insn2 = read_memory_unsigned_integer (current_pc, 2);
372 current_pc += 2;
373 }
374
375 if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
376 { /* jarl <func>,10 */
c5aa993b 377 long low_disp = insn2 & ~(long) 1;
c906108c 378 long disp = (((((insn & 0x3f) << 16) + low_disp)
c5aa993b 379 & ~(long) 1) ^ 0x00200000) - 0x00200000;
c906108c
SS
380
381 save_pc = current_pc;
382 save_end = prologue_end;
383 regsave_func_p = 1;
384 current_pc += disp - 4;
385 prologue_end = (current_pc
386 + (2 * 3) /* moves to/from ep */
c5aa993b
JM
387 + 4 /* addi <const>,sp,sp */
388 + 2 /* jmp [r10] */
c906108c
SS
389 + (2 * 12) /* sst.w to save r2, r20-r29, r31 */
390 + 20); /* slop area */
391
392#ifdef DEBUG
393 printf_filtered ("\tfound jarl <func>,r10, disp = %ld, low_disp = %ld, new pc = 0x%.8lx\n",
c5aa993b 394 disp, low_disp, (long) current_pc + 2);
c906108c
SS
395#endif
396 continue;
397 }
398 else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
399 { /* callt <imm6> */
400 long ctbp = read_register (CTBP_REGNUM);
401 long adr = ctbp + ((insn & 0x3f) << 1);
402
403 save_pc = current_pc;
404 save_end = prologue_end;
405 regsave_func_p = 1;
406 current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
407 prologue_end = (current_pc
408 + (2 * 3) /* prepare list2,imm5,sp/imm */
c5aa993b 409 + 4 /* ctret */
c906108c
SS
410 + 20); /* slop area */
411
412#ifdef DEBUG
413 printf_filtered ("\tfound callt, ctbp = 0x%.8lx, adr = %.8lx, new pc = 0x%.8lx\n",
c5aa993b 414 ctbp, adr, (long) current_pc);
c906108c
SS
415#endif
416 continue;
417 }
418 else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */
419 {
420 handle_prepare (insn, insn2, &current_pc, pi, &pifsr);
421 continue;
422 }
423 else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
424 { /* ctret after processing register save function */
425 current_pc = save_pc;
426 prologue_end = save_end;
427 regsave_func_p = 0;
428#ifdef DEBUG
429 printf_filtered ("\tfound ctret after regsave func");
430#endif
431 continue;
432 }
433 else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
434 { /* pushml, pushmh */
435 handle_pushm (insn, insn2, pi, &pifsr);
436 continue;
437 }
438 else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
439 { /* jmp after processing register save function */
440 current_pc = save_pc;
441 prologue_end = save_end;
442 regsave_func_p = 0;
443#ifdef DEBUG
444 printf_filtered ("\tfound jmp after regsave func");
445#endif
446 continue;
447 }
448 else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */
449 || (insn & 0xffe0) == 0x0060 /* jmp */
450 || (insn & 0x0780) == 0x0580) /* branch */
451 {
452#ifdef DEBUG
453 printf_filtered ("\n");
454#endif
c5aa993b 455 break; /* Ran into end of prologue */
c906108c
SS
456 }
457
458 else if ((insn & 0xffe0) == ((SP_REGNUM << 11) | 0x0240)) /* add <imm>,sp */
459 pi->frameoffset += ((insn & 0x1f) ^ 0x10) - 0x10;
460 else if (insn == ((SP_REGNUM << 11) | 0x0600 | SP_REGNUM)) /* addi <imm>,sp,sp */
461 pi->frameoffset += insn2;
462 else if (insn == ((FP_RAW_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,fp */
463 {
464 fp_used = 1;
465 pi->framereg = FP_RAW_REGNUM;
466 }
467
468 else if (insn == ((R12_REGNUM << 11) | 0x0640 | R0_REGNUM)) /* movhi hi(const),r0,r12 */
469 r12_tmp = insn2 << 16;
470 else if (insn == ((R12_REGNUM << 11) | 0x0620 | R12_REGNUM)) /* movea lo(const),r12,r12 */
471 r12_tmp += insn2;
c5aa993b 472 else if (insn == ((SP_REGNUM << 11) | 0x01c0 | R12_REGNUM) && r12_tmp) /* add r12,sp */
c906108c
SS
473 pi->frameoffset = r12_tmp;
474 else if (insn == ((EP_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,ep */
475 ep_used = 1;
476 else if (insn == ((EP_REGNUM << 11) | 0x0000 | R1_REGNUM)) /* mov r1,ep */
477 ep_used = 0;
c5aa993b 478 else if (((insn & 0x07ff) == (0x0760 | SP_REGNUM) /* st.w <reg>,<offset>[sp] */
c906108c
SS
479 || (fp_used
480 && (insn & 0x07ff) == (0x0760 | FP_RAW_REGNUM))) /* st.w <reg>,<offset>[fp] */
481 && pifsr
482 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
483 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
c5aa993b 484 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
c906108c
SS
485 {
486 pifsr->reg = reg;
487 pifsr->offset = insn2 & ~1;
488 pifsr->cur_frameoffset = pi->frameoffset;
489#ifdef DEBUG
490 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
491#endif
492 pifsr++;
493 }
494
c5aa993b 495 else if (ep_used /* sst.w <reg>,<offset>[ep] */
c906108c
SS
496 && ((insn & 0x0781) == 0x0501)
497 && pifsr
498 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
499 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
c5aa993b 500 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
c906108c
SS
501 {
502 pifsr->reg = reg;
503 pifsr->offset = (insn & 0x007e) << 1;
504 pifsr->cur_frameoffset = pi->frameoffset;
505#ifdef DEBUG
506 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
507#endif
508 pifsr++;
509 }
510
511#ifdef DEBUG
512 printf_filtered ("\n");
513#endif
514 }
515
516 if (pifsr)
517 pifsr->framereg = 0; /* Tie off last entry */
518
519 /* Fix up any offsets to the final offset. If a frame pointer was created, use it
520 instead of the stack pointer. */
521 for (pifsr_tmp = pi->pifsrs; pifsr_tmp && pifsr_tmp != pifsr; pifsr_tmp++)
522 {
523 pifsr_tmp->offset -= pi->frameoffset - pifsr_tmp->cur_frameoffset;
524 pifsr_tmp->framereg = pi->framereg;
525
526#ifdef DEBUG
527 printf_filtered ("Saved register r%d, offset = %d, framereg = r%d\n",
c5aa993b 528 pifsr_tmp->reg, pifsr_tmp->offset, pifsr_tmp->framereg);
c906108c
SS
529#endif
530 }
531
532#ifdef DEBUG
533 printf_filtered ("Framereg = r%d, frameoffset = %d\n", pi->framereg, pi->frameoffset);
534#endif
535
536 return current_pc;
537}
538
539/* Function: init_extra_frame_info
540 Setup the frame's frame pointer, pc, and frame addresses for saved
541 registers. Most of the work is done in scan_prologue().
542
543 Note that when we are called for the last frame (currently active frame),
544 that fi->pc and fi->frame will already be setup. However, fi->frame will
545 be valid only if this routine uses FP. For previous frames, fi-frame will
546 always be correct (since that is derived from v850_frame_chain ()).
547
548 We can be called with the PC in the call dummy under two circumstances.
549 First, during normal backtracing, second, while figuring out the frame
550 pointer just prior to calling the target function (see run_stack_dummy). */
551
552void
fba45db2 553v850_init_extra_frame_info (struct frame_info *fi)
c906108c
SS
554{
555 struct prologue_info pi;
556 struct pifsr pifsrs[NUM_REGS + 1], *pifsr;
557
558 if (fi->next)
559 fi->pc = FRAME_SAVED_PC (fi->next);
560
561 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
562
563 /* The call dummy doesn't save any registers on the stack, so we can return
564 now. */
565 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
c5aa993b 566 return;
c906108c
SS
567
568 pi.pifsrs = pifsrs;
569
570 v850_scan_prologue (fi->pc, &pi);
571
572 if (!fi->next && pi.framereg == SP_REGNUM)
573 fi->frame = read_register (pi.framereg) - pi.frameoffset;
574
575 for (pifsr = pifsrs; pifsr->framereg; pifsr++)
576 {
577 fi->fsr.regs[pifsr->reg] = pifsr->offset + fi->frame;
578
579 if (pifsr->framereg == SP_REGNUM)
580 fi->fsr.regs[pifsr->reg] += pi.frameoffset;
581 }
582}
583
584/* Function: frame_chain
585 Figure out the frame prior to FI. Unfortunately, this involves
586 scanning the prologue of the caller, which will also be done
587 shortly by v850_init_extra_frame_info. For the dummy frame, we
588 just return the stack pointer that was in use at the time the
589 function call was made. */
590
591CORE_ADDR
fba45db2 592v850_frame_chain (struct frame_info *fi)
c906108c
SS
593{
594 struct prologue_info pi;
595 CORE_ADDR callers_pc, fp;
596
597 /* First, find out who called us */
598 callers_pc = FRAME_SAVED_PC (fi);
599 /* If caller is a call-dummy, then our FP bears no relation to his FP! */
600 fp = v850_find_callers_reg (fi, FP_RAW_REGNUM);
c5aa993b
JM
601 if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
602 return fp; /* caller is call-dummy: return oldest value of FP */
c906108c
SS
603
604 /* Caller is NOT a call-dummy, so everything else should just work.
605 Even if THIS frame is a call-dummy! */
606 pi.pifsrs = NULL;
607
608 v850_scan_prologue (callers_pc, &pi);
609
610 if (pi.start_function)
611 return 0; /* Don't chain beyond the start function */
612
613 if (pi.framereg == FP_RAW_REGNUM)
614 return v850_find_callers_reg (fi, pi.framereg);
615
616 return fi->frame - pi.frameoffset;
617}
618
619/* Function: find_callers_reg
620 Find REGNUM on the stack. Otherwise, it's in an active register.
621 One thing we might want to do here is to check REGNUM against the
622 clobber mask, and somehow flag it as invalid if it isn't saved on
623 the stack somewhere. This would provide a graceful failure mode
624 when trying to get the value of caller-saves registers for an inner
625 frame. */
626
627CORE_ADDR
fba45db2 628v850_find_callers_reg (struct frame_info *fi, int regnum)
c906108c
SS
629{
630 for (; fi; fi = fi->next)
631 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
632 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
633 else if (fi->fsr.regs[regnum] != 0)
c5aa993b
JM
634 return read_memory_unsigned_integer (fi->fsr.regs[regnum],
635 REGISTER_RAW_SIZE (regnum));
c906108c
SS
636
637 return read_register (regnum);
638}
639
640/* Function: skip_prologue
641 Return the address of the first code past the prologue of the function. */
642
643CORE_ADDR
fba45db2 644v850_skip_prologue (CORE_ADDR pc)
c906108c
SS
645{
646 CORE_ADDR func_addr, func_end;
647
648 /* See what the symbol table says */
649
650 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
651 {
652 struct symtab_and_line sal;
653
654 sal = find_pc_line (func_addr, 0);
655
656 if (sal.line != 0 && sal.end < func_end)
657 return sal.end;
658 else
659 /* Either there's no line info, or the line after the prologue is after
660 the end of the function. In this case, there probably isn't a
661 prologue. */
662 return pc;
663 }
664
665/* We can't find the start of this function, so there's nothing we can do. */
666 return pc;
667}
668
669/* Function: pop_frame
670 This routine gets called when either the user uses the `return'
671 command, or the call dummy breakpoint gets hit. */
672
673void
fba45db2 674v850_pop_frame (struct frame_info *frame)
c906108c
SS
675{
676 int regnum;
677
c5aa993b 678 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
c906108c
SS
679 generic_pop_dummy_frame ();
680 else
681 {
682 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
683
684 for (regnum = 0; regnum < NUM_REGS; regnum++)
685 if (frame->fsr.regs[regnum] != 0)
686 write_register (regnum,
c5aa993b
JM
687 read_memory_unsigned_integer (frame->fsr.regs[regnum],
688 REGISTER_RAW_SIZE (regnum)));
c906108c
SS
689
690 write_register (SP_REGNUM, FRAME_FP (frame));
691 }
692
693 flush_cached_frames ();
694}
695
696/* Function: push_arguments
697 Setup arguments and RP for a call to the target. First four args
698 go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs
699 are passed by reference. 64 bit quantities (doubles and long
700 longs) may be split between the regs and the stack. When calling a
701 function that returns a struct, a pointer to the struct is passed
702 in as a secret first argument (always in R6).
703
704 Stack space for the args has NOT been allocated: that job is up to us.
c5aa993b 705 */
c906108c
SS
706
707CORE_ADDR
fba45db2
KB
708v850_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
709 unsigned char struct_return, CORE_ADDR struct_addr)
c906108c
SS
710{
711 int argreg;
712 int argnum;
713 int len = 0;
714 int stack_offset;
715
716 /* First, just for safety, make sure stack is aligned */
717 sp &= ~3;
718
719 /* Now make space on the stack for the args. */
720 for (argnum = 0; argnum < nargs; argnum++)
c5aa993b
JM
721 len += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
722 sp -= len; /* possibly over-allocating, but it works... */
723 /* (you might think we could allocate 16 bytes */
724 /* less, but the ABI seems to use it all! ) */
c906108c
SS
725 argreg = ARG0_REGNUM;
726
727 /* the struct_return pointer occupies the first parameter-passing reg */
728 if (struct_return)
c5aa993b 729 write_register (argreg++, struct_addr);
c906108c
SS
730
731 stack_offset = 16;
732 /* The offset onto the stack at which we will start copying parameters
733 (after the registers are used up) begins at 16 rather than at zero.
734 I don't really know why, that's just the way it seems to work. */
735
736 /* Now load as many as possible of the first arguments into
737 registers, and push the rest onto the stack. There are 16 bytes
738 in four registers available. Loop thru args from first to last. */
739 for (argnum = 0; argnum < nargs; argnum++)
740 {
741 int len;
742 char *val;
c5aa993b 743 char valbuf[REGISTER_RAW_SIZE (ARG0_REGNUM)];
c906108c
SS
744
745 if (TYPE_CODE (VALUE_TYPE (*args)) == TYPE_CODE_STRUCT
746 && TYPE_LENGTH (VALUE_TYPE (*args)) > 8)
747 {
748 store_address (valbuf, 4, VALUE_ADDRESS (*args));
749 len = 4;
750 val = valbuf;
751 }
752 else
753 {
754 len = TYPE_LENGTH (VALUE_TYPE (*args));
c5aa993b 755 val = (char *) VALUE_CONTENTS (*args);
c906108c
SS
756 }
757
758 while (len > 0)
c5aa993b 759 if (argreg <= ARGLAST_REGNUM)
c906108c
SS
760 {
761 CORE_ADDR regval;
762
763 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
764 write_register (argreg, regval);
765
766 len -= REGISTER_RAW_SIZE (argreg);
767 val += REGISTER_RAW_SIZE (argreg);
768 argreg++;
769 }
770 else
771 {
772 write_memory (sp + stack_offset, val, 4);
773
774 len -= 4;
775 val += 4;
776 stack_offset += 4;
777 }
778 args++;
779 }
780 return sp;
781}
782
783/* Function: push_return_address (pc)
784 Set up the return address for the inferior function call.
785 Needed for targets where we don't actually execute a JSR/BSR instruction */
c5aa993b 786
c906108c 787CORE_ADDR
fba45db2 788v850_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c
SS
789{
790 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
791 return sp;
792}
c5aa993b 793
c906108c
SS
794/* Function: frame_saved_pc
795 Find the caller of this frame. We do this by seeing if RP_REGNUM
796 is saved in the stack anywhere, otherwise we get it from the
797 registers. If the inner frame is a dummy frame, return its PC
798 instead of RP, because that's where "caller" of the dummy-frame
799 will be found. */
800
801CORE_ADDR
fba45db2 802v850_frame_saved_pc (struct frame_info *fi)
c906108c 803{
c5aa993b
JM
804 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
805 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
806 else
807 return v850_find_callers_reg (fi, RP_REGNUM);
808}
809
c906108c
SS
810
811/* Function: fix_call_dummy
812 Pokes the callee function's address into the CALL_DUMMY assembly stub.
813 Assumes that the CALL_DUMMY looks like this:
c5aa993b
JM
814 jarl <offset24>, r31
815 trap
816 */
c906108c
SS
817
818int
fba45db2
KB
819v850_fix_call_dummy (char *dummy, CORE_ADDR sp, CORE_ADDR fun, int nargs,
820 value_ptr *args, struct type *type, int gcc_p)
c906108c
SS
821{
822 long offset24;
823
824 offset24 = (long) fun - (long) entry_point_address ();
825 offset24 &= 0x3fffff;
826 offset24 |= 0xff800000; /* jarl <offset24>, r31 */
827
c5aa993b
JM
828 store_unsigned_integer ((unsigned int *) &dummy[2], 2, offset24 & 0xffff);
829 store_unsigned_integer ((unsigned int *) &dummy[0], 2, offset24 >> 16);
c906108c
SS
830 return 0;
831}
832
833/* Change the register names based on the current machine type. */
834
835static int
fba45db2 836v850_target_architecture_hook (const bfd_arch_info_type *ap)
c906108c
SS
837{
838 int i, j;
839
840 if (ap->arch != bfd_arch_v850)
841 return 0;
842
843 for (i = 0; v850_processor_type_table[i].regnames != NULL; i++)
844 {
845 if (v850_processor_type_table[i].mach == ap->mach)
846 {
847 v850_register_names = v850_processor_type_table[i].regnames;
c5394b80 848 tm_print_insn_info.mach = ap->mach;
c906108c
SS
849 return 1;
850 }
851 }
852
96baa820 853 internal_error ("Architecture `%s' unreconized", ap->printable_name);
c906108c
SS
854}
855
856void
fba45db2 857_initialize_v850_tdep (void)
c906108c
SS
858{
859 tm_print_insn = print_insn_v850;
860 target_architecture_hook = v850_target_architecture_hook;
861}
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