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dd3b648e RP |
1 | /* @(#)reg.h 1.1 86/07/07 SMI */ |
2 | ||
3 | /* | |
4 | * Copyright (c) 1986 by Sun Microsystems, Inc. | |
5 | */ | |
6 | ||
7 | /* | |
8 | modification history | |
9 | -------------------- | |
10 | 01a,05jun90,llk borrowed. | |
11 | */ | |
12 | ||
13 | #ifndef _REG_ | |
14 | #define _REG_ | |
15 | ||
16 | #ifdef I80960 | |
17 | ||
18 | /* Intel 960 register values passed over the wire by RPC: */ | |
19 | ||
20 | struct regs | |
21 | { | |
22 | int r_lreg[16]; /* local registers */ | |
23 | int r_greg[16]; /* global registers */ | |
24 | int r_pcw; /* process control word */ | |
25 | int r_acw; /* arithmetic control word */ | |
26 | int r_tcw; /* trace control word */ | |
27 | }; | |
28 | ||
29 | #define FP_REG_SIZE 12 | |
30 | ||
31 | struct fp_status { | |
32 | char fps_regs[4][FP_REG_SIZE]; /* floating point regs */ | |
33 | }; | |
34 | ||
35 | #else /* For now, just 68000 */ | |
36 | ||
37 | /* | |
38 | * Location of the users' stored | |
39 | * registers relative to R0. | |
40 | * Usage is u.u_ar0[XX]. | |
41 | */ | |
42 | #define R0 (0) | |
43 | #define R1 (1) | |
44 | #define R2 (2) | |
45 | #define R3 (3) | |
46 | #define R4 (4) | |
47 | #define R5 (5) | |
48 | #define R6 (6) | |
49 | #define R7 (7) | |
50 | #define AR0 (8) | |
51 | #define AR1 (9) | |
52 | #define AR2 (10) | |
53 | #define AR3 (11) | |
54 | #define AR4 (12) | |
55 | #define AR5 (13) | |
56 | #define AR6 (14) | |
57 | #define AR7 (15) | |
58 | #define SP (15) | |
59 | #define PS (16) | |
60 | #define PC (17) | |
61 | ||
62 | /* | |
63 | * And now for something completely the same... | |
64 | */ | |
65 | #ifndef LOCORE | |
66 | struct regs { | |
67 | int r_dreg[8]; /* data registers */ | |
68 | #define r_r0 r_dreg[0] /* r0 for portability */ | |
69 | int r_areg[8]; /* address registers */ | |
70 | #define r_sp r_areg[7] /* user stack pointer */ | |
71 | int r_sr; /* status register (actually a short) */ | |
72 | #define r_ps r_sr | |
73 | int r_pc; /* program counter */ | |
74 | }; | |
75 | ||
76 | struct stkfmt { | |
77 | int f_stkfmt : 4; /* stack format */ | |
78 | int : 2; | |
79 | int f_vector : 10; /* vector offset */ | |
80 | short f_beibase; /* start of bus error info (if any) */ | |
81 | }; | |
82 | ||
83 | ||
84 | /* | |
85 | * Struct for floating point registers and general state | |
86 | * for the MC68881 (the sky fpp has no user visible state). | |
87 | * If fps_flags == FPS_UNUSED, the other 68881 fields have no meaning. | |
88 | * fps_code and fps_flags are software implemented fields. | |
89 | * fps_flags is not used when set by user level programs, | |
90 | * but changing fps_code has the side effect of changing u.u_code. | |
91 | */ | |
92 | ||
93 | typedef struct ext_fp { | |
94 | int fp[3]; | |
95 | } ext_fp; /* extended 96-bit 68881 fp registers */ | |
96 | ||
97 | struct fp_status { | |
98 | ext_fp fps_regs[8]; /* 68881 floating point regs */ | |
99 | int fps_control; /* 68881 control reg */ | |
100 | int fps_status; /* 68881 status reg */ | |
101 | int fps_iaddr; /* 68881 instruction address reg */ | |
102 | int fps_code; /* additional word for signals */ | |
103 | int fps_flags; /* r/o - unused, idle or busy */ | |
104 | }; | |
105 | #endif !LOCORE | |
106 | ||
107 | /* | |
108 | * Values defined for `fps_flags'. | |
109 | */ | |
110 | #define FPS_UNUSED 0 /* 68881 never used yet */ | |
111 | #define FPS_IDLE 1 /* 68881 instruction completed */ | |
112 | #define FPS_BUSY 2 /* 68881 instruction interrupted */ | |
113 | ||
114 | /* | |
115 | * The EXT_FPS_FLAGS() macro is used to convert a pointer to an | |
116 | * fp_istate into a value to be used for the user visible state | |
117 | * found in fps_flags. As a speed optimization, this convertion | |
118 | * is only done is required (e.g. the PTRACE_GETFPREGS ptrace | |
119 | * call or when dumping core) instead of on each context switch. | |
120 | * The tests that we base the state on are that a fpis_vers of | |
121 | * FPIS_VERSNULL means NULL state, else a fpis_bufsiz of FPIS_IDLESZ | |
122 | * means IDLE state, else we assume BUSY state. | |
123 | */ | |
124 | #define FPIS_VERSNULL 0x0 | |
125 | #define FPIS_IDLESIZE 0x18 | |
126 | ||
127 | #define EXT_FPS_FLAGS(istatep) \ | |
128 | ((istatep)->fpis_vers == FPIS_VERSNULL ? FPS_UNUSED : \ | |
129 | (istatep)->fpis_bufsiz == FPIS_IDLESIZE ? FPS_IDLE : FPS_BUSY) | |
130 | ||
131 | #ifndef LOCORE | |
132 | /* | |
133 | * Struct for the internal state of the MC68881 | |
134 | * Although the MC68881 can have a smaller maximum for | |
135 | * internal state, we allow for more to allow for expansion. | |
136 | */ | |
137 | #define FPIS_BUFSIZ 0xc0 | |
138 | ||
139 | struct fp_istate { | |
140 | unsigned char fpis_vers; /* version number */ | |
141 | unsigned char fpis_bufsiz; /* size of info in fpis_buf */ | |
142 | unsigned short fpis_reserved; /* reserved word */ | |
143 | unsigned char fpis_buf[FPIS_BUFSIZ]; /* fpp internal state buffer */ | |
144 | }; | |
145 | ||
146 | /* | |
147 | * Structures for the status and data registers are defined here. | |
148 | * Struct fpa_status are included in the u area. | |
149 | * Struct fpa_regs is included in struct core. | |
150 | */ | |
151 | ||
152 | /* struct fpa_status is saved/restored during context switch */ | |
153 | struct fpa_status { | |
154 | unsigned int fpas_state; /* STATE, supervisor privileged reg */ | |
155 | unsigned int fpas_imask; /* IMASK */ | |
156 | unsigned int fpas_load_ptr; /* LOAD_PTR */ | |
157 | unsigned int fpas_ierr; /* IERR */ | |
158 | unsigned int fpas_act_instr; /* pipe active instruction halves */ | |
159 | unsigned int fpas_nxt_instr; /* pipe next instruction halves */ | |
160 | unsigned int fpas_act_d1half;/* pipe active data first half */ | |
161 | unsigned int fpas_act_d2half;/* pipe active data second half */ | |
162 | unsigned int fpas_nxt_d1half;/* pipe next data first half */ | |
163 | unsigned int fpas_nxt_d2half;/* pipe next data second half */ | |
164 | unsigned int fpas_mode3_0; /* FPA MODE3_0 register */ | |
165 | unsigned int fpas_wstatus; /* FPA WSTATUS register */ | |
166 | }; | |
167 | ||
168 | /* | |
169 | * Since there are 32 contexts supported by the FPA hardware, | |
170 | * when we do context switch on the FPA, we don't save/restore | |
171 | * the data registers between the FPA and the u area. | |
172 | * If there are already 32 processes using the fpa concurrently, | |
173 | * we give an error message to the 33rd process trying to use the fpa. | |
174 | * (Hopefully there will not be this many processes using FPA concurrently.) | |
175 | */ | |
176 | ||
177 | #define FPA_NCONTEXTS 32 | |
178 | #define FPA_NDATA_REGS 32 | |
179 | ||
180 | typedef struct fpa_long { | |
181 | int fpl_data[2]; | |
182 | } fpa_long; /* 64 bit double precision registers */ | |
183 | ||
184 | /* Struct fpa_regs is included in struct core. */ | |
185 | struct fpa_regs { | |
186 | unsigned int fpar_flags; /* if zero, other fields are meaningless */ | |
187 | struct fpa_status fpar_status; | |
188 | fpa_long fpar_data[FPA_NDATA_REGS]; | |
189 | }; | |
190 | ||
191 | /* | |
192 | * The size of struct fpa_regs is changed from 141 ints in 3.0 to | |
193 | * 77 ints in 3.x. A pad of this size difference is added to struct core. | |
194 | */ | |
195 | #define CORE_PADLEN 64 | |
196 | ||
197 | /* | |
198 | * If there is going to be external FPU state then we must define the FPU | |
199 | * variable | |
200 | */ | |
201 | struct fpu { | |
202 | struct fp_status f_fpstatus; /* External FPP state, if any */ | |
203 | struct fpa_regs f_fparegs; /* FPA registers, if any */ | |
204 | int f_pad[CORE_PADLEN]; /* see comment above */ | |
205 | }; | |
206 | ||
207 | #endif !LOCORE | |
208 | #endif /* !I80960 */ | |
209 | #endif !_REG_ |