Add initX, finiX, ctors, dtors sections to respect C++ constructor/destructor.
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
CommitLineData
53e95fcf 1/* Target-dependent code for the x86-64 for GDB, the GNU debugger.
ce0eebec 2
51603483 3 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
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4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include "defs.h"
24#include "inferior.h"
25#include "gdbcore.h"
26#include "gdbcmd.h"
27#include "arch-utils.h"
28#include "regcache.h"
29#include "symfile.h"
8a8ab2b9 30#include "objfiles.h"
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31#include "x86-64-tdep.h"
32#include "dwarf2cfi.h"
82dbc5f7 33#include "gdb_assert.h"
fe898f56 34#include "block.h"
53e95fcf 35
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36/* Register numbers of various important registers. */
37#define RAX_REGNUM 0
de220d0f 38#define RDX_REGNUM 3
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39#define RDI_REGNUM 5
40#define EFLAGS_REGNUM 17
0e04a514 41#define ST0_REGNUM 22
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42#define XMM1_REGNUM 39
43
44struct register_info
45{
46 int size;
47 char *name;
48 struct type **type;
49};
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50
51/* x86_64_register_raw_size_table[i] is the number of bytes of storage in
52 GDB's register array occupied by register i. */
de220d0f 53static struct register_info x86_64_register_info_table[] = {
91fd20f7
ML
54 /* 0 */ {8, "rax", &builtin_type_int64},
55 /* 1 */ {8, "rbx", &builtin_type_int64},
56 /* 2 */ {8, "rcx", &builtin_type_int64},
57 /* 3 */ {8, "rdx", &builtin_type_int64},
58 /* 4 */ {8, "rsi", &builtin_type_int64},
59 /* 5 */ {8, "rdi", &builtin_type_int64},
60 /* 6 */ {8, "rbp", &builtin_type_void_func_ptr},
61 /* 7 */ {8, "rsp", &builtin_type_void_func_ptr},
62 /* 8 */ {8, "r8", &builtin_type_int64},
63 /* 9 */ {8, "r9", &builtin_type_int64},
64 /* 10 */ {8, "r10", &builtin_type_int64},
65 /* 11 */ {8, "r11", &builtin_type_int64},
66 /* 12 */ {8, "r12", &builtin_type_int64},
67 /* 13 */ {8, "r13", &builtin_type_int64},
68 /* 14 */ {8, "r14", &builtin_type_int64},
69 /* 15 */ {8, "r15", &builtin_type_int64},
70 /* 16 */ {8, "rip", &builtin_type_void_func_ptr},
71 /* 17 */ {4, "eflags", &builtin_type_int32},
72 /* 18 */ {4, "ds", &builtin_type_int32},
73 /* 19 */ {4, "es", &builtin_type_int32},
74 /* 20 */ {4, "fs", &builtin_type_int32},
75 /* 21 */ {4, "gs", &builtin_type_int32},
76 /* 22 */ {10, "st0", &builtin_type_i387_ext},
77 /* 23 */ {10, "st1", &builtin_type_i387_ext},
78 /* 24 */ {10, "st2", &builtin_type_i387_ext},
79 /* 25 */ {10, "st3", &builtin_type_i387_ext},
80 /* 26 */ {10, "st4", &builtin_type_i387_ext},
81 /* 27 */ {10, "st5", &builtin_type_i387_ext},
82 /* 28 */ {10, "st6", &builtin_type_i387_ext},
83 /* 29 */ {10, "st7", &builtin_type_i387_ext},
84 /* 30 */ {4, "fctrl", &builtin_type_int32},
85 /* 31 */ {4, "fstat", &builtin_type_int32},
86 /* 32 */ {4, "ftag", &builtin_type_int32},
87 /* 33 */ {4, "fiseg", &builtin_type_int32},
88 /* 34 */ {4, "fioff", &builtin_type_int32},
89 /* 35 */ {4, "foseg", &builtin_type_int32},
90 /* 36 */ {4, "fooff", &builtin_type_int32},
91 /* 37 */ {4, "fop", &builtin_type_int32},
92 /* 38 */ {16, "xmm0", &builtin_type_v4sf},
93 /* 39 */ {16, "xmm1", &builtin_type_v4sf},
94 /* 40 */ {16, "xmm2", &builtin_type_v4sf},
95 /* 41 */ {16, "xmm3", &builtin_type_v4sf},
96 /* 42 */ {16, "xmm4", &builtin_type_v4sf},
97 /* 43 */ {16, "xmm5", &builtin_type_v4sf},
98 /* 44 */ {16, "xmm6", &builtin_type_v4sf},
99 /* 45 */ {16, "xmm7", &builtin_type_v4sf},
100 /* 46 */ {16, "xmm8", &builtin_type_v4sf},
101 /* 47 */ {16, "xmm9", &builtin_type_v4sf},
102 /* 48 */ {16, "xmm10", &builtin_type_v4sf},
103 /* 49 */ {16, "xmm11", &builtin_type_v4sf},
104 /* 50 */ {16, "xmm12", &builtin_type_v4sf},
105 /* 51 */ {16, "xmm13", &builtin_type_v4sf},
106 /* 52 */ {16, "xmm14", &builtin_type_v4sf},
107 /* 53 */ {16, "xmm15", &builtin_type_v4sf},
108 /* 54 */ {4, "mxcsr", &builtin_type_int32}
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109};
110
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111/* This array is a mapping from Dwarf-2 register
112 numbering to GDB's one. Dwarf-2 numbering is
113 defined in x86-64 ABI, section 3.6. */
114static int x86_64_dwarf2gdb_regno_map[] = {
115 0, 1, 2, 3, /* RAX - RDX */
116 4, 5, 6, 7, /* RSI, RDI, RBP, RSP */
117 8, 9, 10, 11, /* R8 - R11 */
118 12, 13, 14, 15, /* R12 - R15 */
119 -1, /* RA - not mapped */
120 XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */
121 XMM1_REGNUM + 1, XMM1_REGNUM + 2,
122 XMM1_REGNUM + 3, XMM1_REGNUM + 4,
123 XMM1_REGNUM + 5, XMM1_REGNUM + 6,
124 XMM1_REGNUM + 7, XMM1_REGNUM + 8,
125 XMM1_REGNUM + 9, XMM1_REGNUM + 10,
126 XMM1_REGNUM + 11, XMM1_REGNUM + 12,
127 XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */
128 ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */
129 ST0_REGNUM + 2, ST0_REGNUM + 3,
130 ST0_REGNUM + 4, ST0_REGNUM + 5,
131 ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */
132};
133
134static int x86_64_dwarf2gdb_regno_map_length =
135 sizeof (x86_64_dwarf2gdb_regno_map) /
136 sizeof (x86_64_dwarf2gdb_regno_map[0]);
137
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138/* Number of all registers */
139#define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
140 sizeof (x86_64_register_info_table[0]))
141
142/* Number of general registers. */
143#define X86_64_NUM_GREGS (22)
144
145int x86_64_num_regs = X86_64_NUM_REGS;
146int x86_64_num_gregs = X86_64_NUM_GREGS;
147
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148/* Did we already print a note about frame pointer? */
149int omit_fp_note_printed = 0;
150
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151/* Number of bytes of storage in the actual machine representation for
152 register REGNO. */
153int
154x86_64_register_raw_size (int regno)
155{
de220d0f 156 return x86_64_register_info_table[regno].size;
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157}
158
159/* x86_64_register_byte_table[i] is the offset into the register file of the
160 start of register number i. We initialize this from
de220d0f 161 x86_64_register_info_table. */
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162int x86_64_register_byte_table[X86_64_NUM_REGS];
163
164/* Index within `registers' of the first byte of the space for register REGNO. */
165int
166x86_64_register_byte (int regno)
167{
168 return x86_64_register_byte_table[regno];
169}
170
171/* Return the GDB type object for the "standard" data type of data in
172 register N. */
173static struct type *
174x86_64_register_virtual_type (int regno)
175{
de220d0f 176 return *x86_64_register_info_table[regno].type;
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177}
178
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179/* x86_64_register_convertible is true if register N's virtual format is
180 different from its raw format. Note that this definition assumes
181 that the host supports IEEE 32-bit floats, since it doesn't say
182 that SSE registers need conversion. Even if we can't find a
183 counterexample, this is still sloppy. */
184int
185x86_64_register_convertible (int regno)
186{
187 return IS_FP_REGNUM (regno);
188}
189
190/* Convert data from raw format for register REGNUM in buffer FROM to
191 virtual format with type TYPE in buffer TO. In principle both
192 formats are identical except that the virtual format has two extra
193 bytes appended that aren't used. We set these to zero. */
194void
195x86_64_register_convert_to_virtual (int regnum, struct type *type,
196 char *from, char *to)
197{
82dbc5f7 198 char buf[12];
4657573b 199
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AC
200 /* We only support floating-point values. */
201 if (TYPE_CODE (type) != TYPE_CODE_FLT)
202 {
203 warning ("Cannot convert floating-point register value "
204 "to non-floating-point type.");
205 memset (to, 0, TYPE_LENGTH (type));
206 return;
207 }
208 /* First add the necessary padding. */
209 memcpy (buf, from, FPU_REG_RAW_SIZE);
210 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
211 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
212 to the extended floating-point format used by the FPU. */
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AC
213 convert_typed_floating (to, type, buf,
214 x86_64_register_virtual_type (regnum));
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215}
216
217/* Convert data from virtual format with type TYPE in buffer FROM to
218 raw format for register REGNUM in buffer TO. Simply omit the two
219 unused bytes. */
220
221void
222x86_64_register_convert_to_raw (struct type *type, int regnum,
223 char *from, char *to)
224{
ce0eebec 225 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
82dbc5f7 226 /* Simply omit the two unused bytes. */
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227 memcpy (to, from, FPU_REG_RAW_SIZE);
228}
53e95fcf 229
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230/* Dwarf-2 <-> GDB register numbers mapping. */
231int
232x86_64_dwarf2_reg_to_regnum (int dw_reg)
233{
234 if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length)
235 {
236 warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg);
237 return dw_reg;
238 }
239
240 return x86_64_dwarf2gdb_regno_map[dw_reg];
241}
242
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243/* This is the variable that is set with "set disassembly-flavour", and
244 its legitimate values. */
245static const char att_flavour[] = "att";
246static const char intel_flavour[] = "intel";
247static const char *valid_flavours[] = {
248 att_flavour,
249 intel_flavour,
250 NULL
251};
252static const char *disassembly_flavour = att_flavour;
253
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254/* Push the return address (pointing to the call dummy) onto the stack
255 and return the new value for the stack pointer. */
256
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257static CORE_ADDR
258x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
259{
260 char buf[8];
261
262 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
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263 write_memory (sp - 8, buf, 8);
264 return sp - 8;
265}
266
26abbdc4 267static void
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268x86_64_pop_frame (void)
269{
270 generic_pop_current_frame (cfi_pop_frame);
271}
272\f
273
274/* The returning of values is done according to the special algorithm.
275 Some types are returned in registers an some (big structures) in memory.
276 See ABI for details.
277 */
278
279#define MAX_CLASSES 4
280
281enum x86_64_reg_class
282{
283 X86_64_NO_CLASS,
284 X86_64_INTEGER_CLASS,
285 X86_64_INTEGERSI_CLASS,
286 X86_64_SSE_CLASS,
287 X86_64_SSESF_CLASS,
288 X86_64_SSEDF_CLASS,
289 X86_64_SSEUP_CLASS,
290 X86_64_X87_CLASS,
291 X86_64_X87UP_CLASS,
292 X86_64_MEMORY_CLASS
293};
294
295/* Return the union class of CLASS1 and CLASS2.
296 See the x86-64 ABI for details. */
297
298static enum x86_64_reg_class
299merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
300{
301 /* Rule #1: If both classes are equal, this is the resulting class. */
302 if (class1 == class2)
303 return class1;
304
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305 /* Rule #2: If one of the classes is NO_CLASS, the resulting class
306 is the other class. */
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307 if (class1 == X86_64_NO_CLASS)
308 return class2;
309 if (class2 == X86_64_NO_CLASS)
310 return class1;
311
312 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
313 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
314 return X86_64_MEMORY_CLASS;
315
316 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
317 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
318 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
319 return X86_64_INTEGERSI_CLASS;
320 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
321 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
322 return X86_64_INTEGER_CLASS;
323
324 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
325 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
326 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
327 return X86_64_MEMORY_CLASS;
328
329 /* Rule #6: Otherwise class SSE is used. */
330 return X86_64_SSE_CLASS;
331}
332
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MK
333/* Classify the argument type. CLASSES will be filled by the register
334 class used to pass each word of the operand. The number of words
335 is returned. In case the parameter should be passed in memory, 0
336 is returned. As a special case for zero sized containers,
337 classes[0] will be NO_CLASS and 1 is returned.
53e95fcf 338
26abbdc4 339 See the x86-64 psABI for details. */
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340
341static int
342classify_argument (struct type *type,
343 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
344{
345 int bytes = TYPE_LENGTH (type);
346 int words = (bytes + 8 - 1) / 8;
347
348 switch (TYPE_CODE (type))
349 {
350 case TYPE_CODE_ARRAY:
351 case TYPE_CODE_STRUCT:
352 case TYPE_CODE_UNION:
353 {
354 int i;
355 enum x86_64_reg_class subclasses[MAX_CLASSES];
356
357 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
358 if (bytes > 16)
359 return 0;
360
361 for (i = 0; i < words; i++)
362 classes[i] = X86_64_NO_CLASS;
363
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364 /* Zero sized arrays or structures are NO_CLASS. We return 0
365 to signalize memory class, so handle it as special case. */
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366 if (!words)
367 {
368 classes[0] = X86_64_NO_CLASS;
369 return 1;
370 }
371 switch (TYPE_CODE (type))
372 {
373 case TYPE_CODE_STRUCT:
374 {
375 int j;
0004e5a2 376 for (j = 0; j < TYPE_NFIELDS (type); ++j)
53e95fcf 377 {
0004e5a2 378 int num = classify_argument (TYPE_FIELDS (type)[j].type,
53e95fcf 379 subclasses,
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380 (TYPE_FIELDS (type)[j].loc.
381 bitpos + bit_offset) % 256);
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382 if (!num)
383 return 0;
384 for (i = 0; i < num; i++)
385 {
386 int pos =
8dda9770
ML
387 (TYPE_FIELDS (type)[j].loc.bitpos +
388 bit_offset) / 8 / 8;
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389 classes[i + pos] =
390 merge_classes (subclasses[i], classes[i + pos]);
391 }
392 }
393 }
394 break;
395 case TYPE_CODE_ARRAY:
396 {
397 int num;
398
0004e5a2 399 num = classify_argument (TYPE_TARGET_TYPE (type),
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JS
400 subclasses, bit_offset);
401 if (!num)
402 return 0;
403
404 /* The partial classes are now full classes. */
405 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
406 subclasses[0] = X86_64_SSE_CLASS;
407 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
408 subclasses[0] = X86_64_INTEGER_CLASS;
409
410 for (i = 0; i < words; i++)
411 classes[i] = subclasses[i % num];
412 }
413 break;
414 case TYPE_CODE_UNION:
415 {
416 int j;
417 {
0004e5a2 418 for (j = 0; j < TYPE_NFIELDS (type); ++j)
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419 {
420 int num;
0004e5a2 421 num = classify_argument (TYPE_FIELDS (type)[j].type,
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422 subclasses, bit_offset);
423 if (!num)
424 return 0;
425 for (i = 0; i < num; i++)
426 classes[i] = merge_classes (subclasses[i], classes[i]);
427 }
428 }
429 }
430 break;
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ML
431 default:
432 break;
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433 }
434 /* Final merger cleanup. */
435 for (i = 0; i < words; i++)
436 {
437 /* If one class is MEMORY, everything should be passed in
438 memory. */
439 if (classes[i] == X86_64_MEMORY_CLASS)
440 return 0;
441
442 /* The X86_64_SSEUP_CLASS should be always preceeded by
443 X86_64_SSE_CLASS. */
444 if (classes[i] == X86_64_SSEUP_CLASS
445 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
446 classes[i] = X86_64_SSE_CLASS;
447
26abbdc4 448 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
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449 if (classes[i] == X86_64_X87UP_CLASS
450 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
451 classes[i] = X86_64_SSE_CLASS;
452 }
453 return words;
454 }
455 break;
456 case TYPE_CODE_FLT:
457 switch (bytes)
458 {
459 case 4:
460 if (!(bit_offset % 64))
461 classes[0] = X86_64_SSESF_CLASS;
462 else
463 classes[0] = X86_64_SSE_CLASS;
464 return 1;
465 case 8:
466 classes[0] = X86_64_SSEDF_CLASS;
467 return 1;
468 case 16:
469 classes[0] = X86_64_X87_CLASS;
470 classes[1] = X86_64_X87UP_CLASS;
471 return 2;
472 }
473 break;
50c46a0d
EZ
474 case TYPE_CODE_ENUM:
475 case TYPE_CODE_REF:
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476 case TYPE_CODE_INT:
477 case TYPE_CODE_PTR:
478 switch (bytes)
479 {
480 case 1:
481 case 2:
482 case 4:
483 case 8:
484 if (bytes * 8 + bit_offset <= 32)
485 classes[0] = X86_64_INTEGERSI_CLASS;
486 else
487 classes[0] = X86_64_INTEGER_CLASS;
488 return 1;
489 case 16:
490 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
491 return 2;
492 default:
493 break;
494 }
495 case TYPE_CODE_VOID:
496 return 0;
8dda9770 497 default: /* Avoid warning. */
4657573b 498 break;
53e95fcf 499 }
ce0eebec
AC
500 internal_error (__FILE__, __LINE__,
501 "classify_argument: unknown argument type");
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502}
503
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504/* Examine the argument and set *INT_NREGS and *SSE_NREGS to the
505 number of registers required based on the information passed in
506 CLASSES. Return 0 if parameter should be passed in memory. */
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507
508static int
509examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
510 int n, int *int_nregs, int *sse_nregs)
511{
512 *int_nregs = 0;
513 *sse_nregs = 0;
514 if (!n)
515 return 0;
516 for (n--; n >= 0; n--)
517 switch (classes[n])
518 {
519 case X86_64_INTEGER_CLASS:
520 case X86_64_INTEGERSI_CLASS:
521 (*int_nregs)++;
522 break;
523 case X86_64_SSE_CLASS:
524 case X86_64_SSESF_CLASS:
525 case X86_64_SSEDF_CLASS:
526 (*sse_nregs)++;
527 break;
528 case X86_64_NO_CLASS:
529 case X86_64_SSEUP_CLASS:
530 case X86_64_X87_CLASS:
531 case X86_64_X87UP_CLASS:
532 break;
533 case X86_64_MEMORY_CLASS:
ce0eebec
AC
534 internal_error (__FILE__, __LINE__,
535 "examine_argument: unexpected memory class");
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536 }
537 return 1;
538}
539
540#define RET_INT_REGS 2
541#define RET_SSE_REGS 2
542
543/* Check if the structure in value_type is returned in registers or in
26abbdc4
MK
544 memory. If this function returns 1, GDB will call
545 STORE_STRUCT_RETURN and EXTRACT_STRUCT_VALUE_ADDRESS else
546 STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE will be used. */
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JS
547int
548x86_64_use_struct_convention (int gcc_p, struct type *value_type)
549{
550 enum x86_64_reg_class class[MAX_CLASSES];
551 int n = classify_argument (value_type, class, 0);
552 int needed_intregs;
553 int needed_sseregs;
554
555 return (!n ||
556 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
557 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
558}
559
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560/* Extract from an array REGBUF containing the (raw) register state, a
561 function return value of TYPE, and copy that, in virtual format,
562 into VALBUF. */
563
564void
48037ead
ML
565x86_64_extract_return_value (struct type *type, struct regcache *regcache,
566 void *valbuf)
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567{
568 enum x86_64_reg_class class[MAX_CLASSES];
569 int n = classify_argument (type, class, 0);
570 int needed_intregs;
571 int needed_sseregs;
572 int intreg = 0;
573 int ssereg = 0;
574 int offset = 0;
575 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
576 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
577
578 if (!n ||
579 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
580 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
581 { /* memory class */
582 CORE_ADDR addr;
48037ead 583 regcache_cooked_read (regcache, RAX_REGNUM, &addr);
53e95fcf
JS
584 read_memory (addr, valbuf, TYPE_LENGTH (type));
585 return;
586 }
587 else
588 {
589 int i;
590 for (i = 0; i < n; i++)
591 {
592 switch (class[i])
593 {
594 case X86_64_NO_CLASS:
595 break;
596 case X86_64_INTEGER_CLASS:
48037ead
ML
597 regcache_cooked_read (regcache, ret_int_r[(intreg + 1) / 2],
598 (char *) valbuf + offset);
53e95fcf
JS
599 offset += 8;
600 intreg += 2;
601 break;
602 case X86_64_INTEGERSI_CLASS:
48037ead
ML
603 regcache_cooked_read_part (regcache, ret_int_r[intreg / 2],
604 0, 4, (char *) valbuf + offset);
53e95fcf
JS
605 offset += 8;
606 intreg++;
607 break;
608 case X86_64_SSEDF_CLASS:
609 case X86_64_SSESF_CLASS:
610 case X86_64_SSE_CLASS:
48037ead
ML
611 regcache_cooked_read_part (regcache,
612 ret_sse_r[(ssereg + 1) / 2], 0, 8,
613 (char *) valbuf + offset);
53e95fcf
JS
614 offset += 8;
615 ssereg += 2;
616 break;
617 case X86_64_SSEUP_CLASS:
48037ead
ML
618 regcache_cooked_read_part (regcache, ret_sse_r[ssereg / 2],
619 0, 8, (char *) valbuf + offset);
53e95fcf
JS
620 offset += 8;
621 ssereg++;
622 break;
623 case X86_64_X87_CLASS:
48037ead
ML
624 regcache_cooked_read_part (regcache, FP0_REGNUM,
625 0, 8, (char *) valbuf + offset);
53e95fcf
JS
626 offset += 8;
627 break;
628 case X86_64_X87UP_CLASS:
48037ead
ML
629 regcache_cooked_read_part (regcache, FP0_REGNUM,
630 8, 2, (char *) valbuf + offset);
53e95fcf
JS
631 offset += 8;
632 break;
633 case X86_64_MEMORY_CLASS:
634 default:
635 internal_error (__FILE__, __LINE__,
636 "Unexpected argument class");
637 }
638 }
639 }
640}
641
53e95fcf
JS
642static void
643x86_64_frame_init_saved_regs (struct frame_info *fi)
644{
26abbdc4 645 /* Do nothing. Everything is handled by the stack unwinding code. */
53e95fcf
JS
646}
647
648#define INT_REGS 6
649#define SSE_REGS 16
650
53e95fcf 651CORE_ADDR
d45fc520 652x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
53e95fcf
JS
653 int struct_return, CORE_ADDR struct_addr)
654{
655 int intreg = 0;
656 int ssereg = 0;
657 int i;
ce0eebec 658 static int int_parameter_registers[INT_REGS] = {
de220d0f
ML
659 5 /* RDI */ , 4 /* RSI */ ,
660 3 /* RDX */ , 2 /* RCX */ ,
91fd20f7 661 8 /* R8 */ , 9 /* R9 */
ce0eebec 662 };
53e95fcf 663 /* XMM0 - XMM15 */
ce0eebec 664 static int sse_parameter_registers[SSE_REGS] = {
de220d0f
ML
665 XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
666 XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
667 XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
668 XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
ce0eebec
AC
669 };
670 int stack_values_count = 0;
82dbc5f7 671 int *stack_values;
e9f30c21 672 stack_values = alloca (nargs * sizeof (int));
53e95fcf
JS
673 for (i = 0; i < nargs; i++)
674 {
675 enum x86_64_reg_class class[MAX_CLASSES];
676 int n = classify_argument (args[i]->type, class, 0);
677 int needed_intregs;
678 int needed_sseregs;
679
680 if (!n ||
681 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
82dbc5f7
AC
682 || intreg / 2 + needed_intregs > INT_REGS
683 || ssereg / 2 + needed_sseregs > SSE_REGS)
ce0eebec
AC
684 { /* memory class */
685 stack_values[stack_values_count++] = i;
53e95fcf
JS
686 }
687 else
688 {
689 int j;
690 for (j = 0; j < n; j++)
691 {
692 int offset = 0;
693 switch (class[j])
694 {
695 case X86_64_NO_CLASS:
696 break;
697 case X86_64_INTEGER_CLASS:
4caf0990
AC
698 deprecated_write_register_gen (int_parameter_registers
699 [(intreg + 1) / 2],
700 VALUE_CONTENTS_ALL (args[i]) + offset);
53e95fcf
JS
701 offset += 8;
702 intreg += 2;
703 break;
704 case X86_64_INTEGERSI_CLASS:
50c46a0d
EZ
705 {
706 LONGEST num
707 = extract_signed_integer (VALUE_CONTENTS_ALL (args[i])
708 + offset, 4);
709 regcache_raw_write_signed (current_regcache,
710 int_parameter_registers[intreg / 2], num);
711
712 offset += 8;
713 intreg++;
714 break;
715 }
53e95fcf
JS
716 case X86_64_SSEDF_CLASS:
717 case X86_64_SSESF_CLASS:
718 case X86_64_SSE_CLASS:
4caf0990
AC
719 deprecated_write_register_gen (sse_parameter_registers
720 [(ssereg + 1) / 2],
721 VALUE_CONTENTS_ALL (args[i]) + offset);
53e95fcf
JS
722 offset += 8;
723 ssereg += 2;
724 break;
725 case X86_64_SSEUP_CLASS:
4caf0990
AC
726 deprecated_write_register_gen (sse_parameter_registers[ssereg / 2],
727 VALUE_CONTENTS_ALL (args[i]) + offset);
53e95fcf
JS
728 offset += 8;
729 ssereg++;
730 break;
731 case X86_64_X87_CLASS:
53e95fcf 732 case X86_64_MEMORY_CLASS:
ce0eebec 733 stack_values[stack_values_count++] = i;
82dbc5f7
AC
734 break;
735 case X86_64_X87UP_CLASS:
53e95fcf
JS
736 break;
737 default:
738 internal_error (__FILE__, __LINE__,
739 "Unexpected argument class");
740 }
741 intreg += intreg % 2;
742 ssereg += ssereg % 2;
743 }
744 }
745 }
82dbc5f7
AC
746 while (--stack_values_count >= 0)
747 {
e9f30c21 748 struct value *arg = args[stack_values[stack_values_count]];
82dbc5f7
AC
749 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
750 len += 7;
751 len -= len % 8;
752 sp -= len;
753 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
754 }
53e95fcf
JS
755 return sp;
756}
757
758/* Write into the appropriate registers a function return value stored
759 in VALBUF of type TYPE, given in virtual format. */
760void
48037ead
ML
761x86_64_store_return_value (struct type *type, struct regcache *regcache,
762 const void *valbuf)
53e95fcf
JS
763{
764 int len = TYPE_LENGTH (type);
765
766 if (TYPE_CODE_FLT == TYPE_CODE (type))
767 {
768 /* Floating-point return values can be found in %st(0). */
769 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
770 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
771 {
772 /* Copy straight over. */
48037ead 773 regcache_cooked_write (regcache, FP0_REGNUM, valbuf);
53e95fcf
JS
774 }
775 else
776 {
777 char buf[FPU_REG_RAW_SIZE];
778 DOUBLEST val;
779
780 /* Convert the value found in VALBUF to the extended
781 floating point format used by the FPU. This is probably
782 not exactly how it would happen on the target itself, but
783 it is the best we can do. */
784 val = extract_floating (valbuf, TYPE_LENGTH (type));
785 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
48037ead
ML
786 regcache_cooked_write_part (regcache, FP0_REGNUM,
787 0, FPU_REG_RAW_SIZE, buf);
53e95fcf
JS
788 }
789 }
790 else
791 {
792 int low_size = REGISTER_RAW_SIZE (0);
793 int high_size = REGISTER_RAW_SIZE (1);
794
795 if (len <= low_size)
48037ead 796 regcache_cooked_write_part (regcache, 0, 0, len, valbuf);
53e95fcf
JS
797 else if (len <= (low_size + high_size))
798 {
48037ead
ML
799 regcache_cooked_write_part (regcache, 0, 0, low_size, valbuf);
800 regcache_cooked_write_part (regcache, 1, 0,
801 len - low_size,
802 (const char *) valbuf + low_size);
53e95fcf
JS
803 }
804 else
805 internal_error (__FILE__, __LINE__,
806 "Cannot store return value of %d bytes long.", len);
807 }
808}
809\f
810
1cf877ad
ML
811const char *
812x86_64_register_name (int reg_nr)
53e95fcf 813{
de220d0f 814 if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
53e95fcf 815 return NULL;
de220d0f 816 return x86_64_register_info_table[reg_nr].name;
53e95fcf 817}
8dda9770
ML
818
819int
1cf877ad 820x86_64_register_number (const char *name)
8dda9770
ML
821{
822 int reg_nr;
823
824 for (reg_nr = 0; reg_nr < X86_64_NUM_REGS; reg_nr++)
825 if (strcmp (name, x86_64_register_info_table[reg_nr].name) == 0)
826 return reg_nr;
827 return -1;
828}
53e95fcf
JS
829\f
830
831
832/* We have two flavours of disassembly. The machinery on this page
833 deals with switching between those. */
834
835static int
836gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
837{
838 if (disassembly_flavour == att_flavour)
839 return print_insn_i386_att (memaddr, info);
840 else if (disassembly_flavour == intel_flavour)
841 return print_insn_i386_intel (memaddr, info);
842 /* Never reached -- disassembly_flavour is always either att_flavour
843 or intel_flavour. */
844 internal_error (__FILE__, __LINE__, "failed internal consistency check");
845}
846\f
847
848/* Store the address of the place in which to copy the structure the
849 subroutine will return. This is called from call_function. */
850void
851x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
852{
853 write_register (RDI_REGNUM, addr);
854}
855
856int
857x86_64_frameless_function_invocation (struct frame_info *frame)
858{
859 return 0;
860}
861
6d686a84
ML
862/* We will handle only functions beginning with:
863 55 pushq %rbp
864 48 89 e5 movq %rsp,%rbp
865 Any function that doesn't start with this sequence
866 will be assumed to have no prologue and thus no valid
867 frame pointer in %rbp. */
868#define PROLOG_BUFSIZE 4
869int
870x86_64_function_has_prologue (CORE_ADDR pc)
871{
872 int i;
873 unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
874 prolog_buf[PROLOG_BUFSIZE];
875
876 read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
877
878 /* First check, whether pc points to pushq %rbp, movq %rsp,%rbp. */
879 for (i = 0; i < PROLOG_BUFSIZE; i++)
880 if (prolog_expect[i] != prolog_buf[i])
881 return 0; /* ... no, it doesn't. Nothing to skip. */
882
883 return 1;
884}
885
e76e1718
ML
886/* If a function with debugging information and known beginning
887 is detected, we will return pc of the next line in the source
888 code. With this approach we effectively skip the prolog. */
889
53e95fcf
JS
890CORE_ADDR
891x86_64_skip_prologue (CORE_ADDR pc)
892{
482a4d06 893 int i;
e76e1718
ML
894 struct symtab_and_line v_sal;
895 struct symbol *v_function;
482a4d06 896 CORE_ADDR endaddr;
e76e1718 897
6d686a84
ML
898 if (! x86_64_function_has_prologue (pc))
899 return pc;
b1ab997b 900
26abbdc4 901 /* OK, we have found the prologue and want PC of the first
b1ab997b
ML
902 non-prologue instruction. */
903 pc += PROLOG_BUFSIZE;
e76e1718
ML
904
905 v_function = find_pc_function (pc);
906 v_sal = find_pc_line (pc, 0);
907
26abbdc4
MK
908 /* If pc doesn't point to a function with debuginfo, some of the
909 following may be NULL. */
e76e1718
ML
910 if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
911 return pc;
912
8da065d5 913 endaddr = BLOCK_END (SYMBOL_BLOCK_VALUE (v_function));
e76e1718
ML
914
915 for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
482a4d06 916 if (v_sal.symtab->linetable->item[i].pc >= pc
e76e1718
ML
917 && v_sal.symtab->linetable->item[i].pc < endaddr)
918 {
919 pc = v_sal.symtab->linetable->item[i].pc;
e76e1718
ML
920 break;
921 }
922
53e95fcf
JS
923 return pc;
924}
925
926/* Sequence of bytes for breakpoint instruction. */
ab91194c 927static const unsigned char *
b64bbf8c 928x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr)
53e95fcf
JS
929{
930 static unsigned char breakpoint[] = { 0xcc };
931 *lenptr = 1;
932 return breakpoint;
933}
934
166f4c7b
ML
935static void
936x86_64_save_dummy_frame_tos (CORE_ADDR sp)
937{
938 /* We must add the size of the return address that is already
939 put on the stack. */
940 generic_save_dummy_frame_tos (sp +
941 TYPE_LENGTH (builtin_type_void_func_ptr));
942}
943
944static struct frame_id
945x86_64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *frame)
946{
11889732
AC
947 CORE_ADDR base;
948 frame_unwind_unsigned_register (frame, SP_REGNUM, &base);
949 return frame_id_build (base, frame_pc_unwind (frame));
166f4c7b
ML
950}
951
2213a65d 952void
0c1a73d6 953x86_64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
53e95fcf 954{
0c1a73d6 955 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
de220d0f 956 int i, sum;
53e95fcf 957
b83b026c 958 /* The x86-64 has 16 SSE registers. */
0c1a73d6 959 tdep->num_xmm_regs = 16;
53e95fcf 960
0c1a73d6 961 /* This is what all the fuss is about. */
53e95fcf
JS
962 set_gdbarch_long_bit (gdbarch, 64);
963 set_gdbarch_long_long_bit (gdbarch, 64);
964 set_gdbarch_ptr_bit (gdbarch, 64);
965
b83b026c
MK
966 /* In contrast to the i386, on the x86-64 a `long double' actually
967 takes up 128 bits, even though it's still based on the i387
968 extended floating-point format which has only 80 significant bits. */
969 set_gdbarch_long_double_bit (gdbarch, 128);
970
53e95fcf 971 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
b83b026c
MK
972
973 /* Register numbers of various important registers. */
974 set_gdbarch_sp_regnum (gdbarch, 7); /* %rsp */
975 set_gdbarch_fp_regnum (gdbarch, 6); /* %rbp */
976 set_gdbarch_pc_regnum (gdbarch, 16); /* %rip */
977 set_gdbarch_ps_regnum (gdbarch, 17); /* %eflags */
978 set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* %st(0) */
979
980 /* The "default" register numbering scheme for the x86-64 is
981 referred to as the "DWARF register number mapping" in the psABI.
982 The preferred debugging format for all known x86-64 targets is
983 actually DWARF2, and GCC doesn't seem to support DWARF (that is
984 DWARF-1), but we provide the same mapping just in case. This
985 mapping is also used for stabs, which GCC does support. */
986 set_gdbarch_stab_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
987 set_gdbarch_dwarf_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
988 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
989
990 /* We don't override SDB_REG_RO_REGNUM, sice COFF doesn't seem to be
991 in use on any of the supported x86-64 targets. */
992
1cf877ad 993 set_gdbarch_register_name (gdbarch, x86_64_register_name);
53e95fcf 994 set_gdbarch_register_size (gdbarch, 8);
de220d0f 995
0c1a73d6
MK
996 /* Total amount of space needed to store our copies of the machine's
997 register (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS +
998 SIZEOF_SSE_REGS) */
de220d0f
ML
999 for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
1000 sum += x86_64_register_info_table[i].size;
1001 set_gdbarch_register_bytes (gdbarch, sum);
53e95fcf 1002
b83b026c
MK
1003 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
1004 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
53e95fcf
JS
1005 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
1006
1007 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
1008 set_gdbarch_register_convert_to_virtual (gdbarch,
1009 x86_64_register_convert_to_virtual);
1010 set_gdbarch_register_convert_to_raw (gdbarch,
1011 x86_64_register_convert_to_raw);
1012
b83b026c 1013 /* Getting saved registers is handled by unwind information. */
129c1cd6 1014 set_gdbarch_deprecated_get_saved_register (gdbarch, cfi_get_saved_register);
53e95fcf 1015
b83b026c 1016 /* FIXME: kettenis/20021026: Should we set parm_boundary to 64 here? */
53e95fcf 1017 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
53e95fcf 1018
48037ead
ML
1019 set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
1020
b81774d8 1021 set_gdbarch_deprecated_push_arguments (gdbarch, x86_64_push_arguments);
28f617b3 1022 set_gdbarch_deprecated_push_return_address (gdbarch, x86_64_push_return_address);
749b82f6 1023 set_gdbarch_deprecated_pop_frame (gdbarch, x86_64_pop_frame);
4183d812 1024 set_gdbarch_deprecated_store_struct_return (gdbarch, x86_64_store_struct_return);
48037ead 1025 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
b83b026c
MK
1026 /* Override, since this is handled by x86_64_extract_return_value. */
1027 set_gdbarch_extract_struct_value_address (gdbarch, NULL);
1028 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
53e95fcf 1029
f30ee0bc 1030 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
b83b026c 1031 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
53e95fcf 1032
618ce49f 1033 set_gdbarch_deprecated_frame_chain (gdbarch, x86_64_linux_frame_chain);
b83b026c
MK
1034 set_gdbarch_frameless_function_invocation (gdbarch,
1035 x86_64_frameless_function_invocation);
b83b026c
MK
1036 /* FIXME: kettenis/20021026: These two are GNU/Linux-specific and
1037 should be moved elsewhere. */
8bedc050 1038 set_gdbarch_deprecated_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
b83b026c 1039 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
53e95fcf 1040 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
b83b026c
MK
1041 /* FIXME: kettenis/20021026: This one is GNU/Linux-specific too. */
1042 set_gdbarch_pc_in_sigtramp (gdbarch, x86_64_linux_in_sigtramp);
53e95fcf 1043
2213a65d
MK
1044 set_gdbarch_num_pseudo_regs (gdbarch, 0);
1045
b83b026c
MK
1046 /* Build call frame information (CFI) from DWARF2 frame debug info. */
1047 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
53e95fcf 1048
b83b026c 1049 /* Initialization of per-frame CFI. */
e9582e71 1050 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
53e95fcf 1051
b83b026c 1052 /* Frame PC initialization is handled by using CFI. */
a5afb99f 1053 set_gdbarch_deprecated_init_frame_pc (gdbarch, x86_64_init_frame_pc);
53e95fcf 1054
b83b026c
MK
1055 /* Cons up virtual frame pointer for trace. */
1056 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
53e95fcf 1057
b83b026c
MK
1058 /* FIXME: kettenis/20021026: This is ELF-specific. Fine for now,
1059 since all supported x86-64 targets are ELF, but that might change
1060 in the future. */
8a8ab2b9 1061 set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
166f4c7b
ML
1062
1063 /* Dummy frame helper functions. */
1064 set_gdbarch_save_dummy_frame_tos (gdbarch, x86_64_save_dummy_frame_tos);
1065 set_gdbarch_unwind_dummy_id (gdbarch, x86_64_unwind_dummy_id);
0c1a73d6
MK
1066}
1067
53e95fcf
JS
1068void
1069_initialize_x86_64_tdep (void)
1070{
53e95fcf
JS
1071 /* Initialize the table saying where each register starts in the
1072 register file. */
1073 {
1074 int i, offset;
1075
1076 offset = 0;
1077 for (i = 0; i < X86_64_NUM_REGS; i++)
1078 {
1079 x86_64_register_byte_table[i] = offset;
de220d0f 1080 offset += x86_64_register_info_table[i].size;
53e95fcf
JS
1081 }
1082 }
53e95fcf 1083}
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