gdbserver/linux-low: turn 'breakpoint_at' into a method
[deliverable/binutils-gdb.git] / gdbserver / linux-arm-low.cc
CommitLineData
0a30fbc4 1/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
b811d2c2 2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
0a30fbc4
DJ
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
a9762ec7 8 the Free Software Foundation; either version 3 of the License, or
0a30fbc4
DJ
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
a9762ec7 17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
0a30fbc4
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18
19#include "server.h"
58caa3dc 20#include "linux-low.h"
deca266c 21#include "arch/arm.h"
d9311bfa
AT
22#include "arch/arm-linux.h"
23#include "arch/arm-get-next-pcs.h"
bd9e6534 24#include "linux-aarch32-low.h"
7cc17433
AH
25#include "linux-aarch32-tdesc.h"
26#include "linux-arm-tdesc.h"
0a30fbc4 27
bd9e6534 28#include <sys/uio.h>
3743bb4f
DE
29/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
30 On Bionic elf.h and linux/elf.h have conflicting definitions. */
31#ifndef ELFMAG0
58d6951d 32#include <elf.h>
3743bb4f 33#endif
5826e159 34#include "nat/gdb_ptrace.h"
09b4ad9f 35#include <signal.h>
d9311bfa 36#include <sys/syscall.h>
9308fc88 37
9308fc88
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38#ifndef PTRACE_GET_THREAD_AREA
39#define PTRACE_GET_THREAD_AREA 22
40#endif
41
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42#ifndef PTRACE_GETWMMXREGS
43# define PTRACE_GETWMMXREGS 18
44# define PTRACE_SETWMMXREGS 19
45#endif
46
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47#ifndef PTRACE_GETVFPREGS
48# define PTRACE_GETVFPREGS 27
49# define PTRACE_SETVFPREGS 28
50#endif
51
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UW
52#ifndef PTRACE_GETHBPREGS
53#define PTRACE_GETHBPREGS 29
54#define PTRACE_SETHBPREGS 30
55#endif
56
ef0478f6
TBA
57/* Linux target op definitions for the ARM architecture. */
58
59class arm_target : public linux_process_target
60{
61public:
62
aa8d21c9
TBA
63 const regs_info *get_regs_info () override;
64
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TBA
65 int breakpoint_kind_from_pc (CORE_ADDR *pcptr) override;
66
67 int breakpoint_kind_from_current_state (CORE_ADDR *pcptr) override;
68
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TBA
69 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
70
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TBA
71 bool supports_software_single_step () override;
72
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73protected:
74
75 void low_arch_setup () override;
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TBA
76
77 bool low_cannot_fetch_register (int regno) override;
78
79 bool low_cannot_store_register (int regno) override;
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TBA
80
81 bool low_supports_breakpoints () override;
82
83 CORE_ADDR low_get_pc (regcache *regcache) override;
84
85 void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
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TBA
86
87 std::vector<CORE_ADDR> low_get_next_pcs (regcache *regcache) override;
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TBA
88
89 bool low_breakpoint_at (CORE_ADDR pc) override;
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TBA
90};
91
92/* The singleton target ops object. */
93
94static arm_target the_arm_target;
95
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TBA
96bool
97arm_target::low_supports_breakpoints ()
98{
99 return true;
100}
101
102CORE_ADDR
103arm_target::low_get_pc (regcache *regcache)
104{
105 return linux_get_pc_32bit (regcache);
106}
107
108void
109arm_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
110{
111 linux_set_pc_32bit (regcache, pc);
112}
113
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TBA
114int
115arm_target::breakpoint_kind_from_pc (CORE_ADDR *pcptr)
116{
117 return arm_breakpoint_kind_from_pc (pcptr);
118}
119
120int
121arm_target::breakpoint_kind_from_current_state (CORE_ADDR *pcptr)
122{
123 return arm_breakpoint_kind_from_current_state (pcptr);
124}
125
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TBA
126const gdb_byte *
127arm_target::sw_breakpoint_from_kind (int kind, int *size)
128{
129 return arm_sw_breakpoint_from_kind (kind, size);
130}
131
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TBA
132bool
133arm_target::low_breakpoint_at (CORE_ADDR pc)
134{
135 return arm_breakpoint_at (pc);
136}
137
09b4ad9f 138/* Information describing the hardware breakpoint capabilities. */
71487fd7 139static struct
09b4ad9f
UW
140{
141 unsigned char arch;
142 unsigned char max_wp_length;
143 unsigned char wp_count;
144 unsigned char bp_count;
71487fd7 145} arm_linux_hwbp_cap;
09b4ad9f
UW
146
147/* Enum describing the different types of ARM hardware break-/watch-points. */
148typedef enum
149{
150 arm_hwbp_break = 0,
151 arm_hwbp_load = 1,
152 arm_hwbp_store = 2,
153 arm_hwbp_access = 3
154} arm_hwbp_type;
155
156/* Type describing an ARM Hardware Breakpoint Control register value. */
157typedef unsigned int arm_hwbp_control_t;
158
159/* Structure used to keep track of hardware break-/watch-points. */
160struct arm_linux_hw_breakpoint
161{
162 /* Address to break on, or being watched. */
163 unsigned int address;
164 /* Control register for break-/watch- point. */
165 arm_hwbp_control_t control;
166};
167
168/* Since we cannot dynamically allocate subfields of arch_process_info,
169 assume a maximum number of supported break-/watchpoints. */
170#define MAX_BPTS 32
171#define MAX_WPTS 32
172
173/* Per-process arch-specific data we want to keep. */
174struct arch_process_info
175{
176 /* Hardware breakpoints for this process. */
177 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
178 /* Hardware watchpoints for this process. */
179 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
180};
181
182/* Per-thread arch-specific data we want to keep. */
183struct arch_lwp_info
184{
185 /* Non-zero if our copy differs from what's recorded in the thread. */
186 char bpts_changed[MAX_BPTS];
187 char wpts_changed[MAX_WPTS];
188 /* Cached stopped data address. */
189 CORE_ADDR stopped_data_address;
190};
191
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DJ
192/* These are in <asm/elf.h> in current kernels. */
193#define HWCAP_VFP 64
194#define HWCAP_IWMMXT 512
195#define HWCAP_NEON 4096
196#define HWCAP_VFPv3 8192
197#define HWCAP_VFPv3D16 16384
198
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DJ
199#ifdef HAVE_SYS_REG_H
200#include <sys/reg.h>
201#endif
202
23ce3b1c 203#define arm_num_regs 26
0a30fbc4 204
2ec06d2e 205static int arm_regmap[] = {
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206 0, 4, 8, 12, 16, 20, 24, 28,
207 32, 36, 40, 44, 48, 52, 56, 60,
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208 -1, -1, -1, -1, -1, -1, -1, -1, -1,
209 64
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210};
211
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AT
212/* Forward declarations needed for get_next_pcs ops. */
213static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
214 int len,
215 int byte_order);
216
217static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
218 CORE_ADDR val);
219
553cb527 220static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
d9311bfa
AT
221
222static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
223
224/* get_next_pcs operations. */
225static struct arm_get_next_pcs_ops get_next_pcs_ops = {
226 get_next_pcs_read_memory_unsigned_integer,
227 get_next_pcs_syscall_next_pc,
228 get_next_pcs_addr_bits_remove,
ed443b61
YQ
229 get_next_pcs_is_thumb,
230 arm_linux_get_next_pcs_fixup,
d9311bfa
AT
231};
232
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TBA
233bool
234arm_target::low_cannot_store_register (int regno)
0a30fbc4 235{
2ec06d2e 236 return (regno >= arm_num_regs);
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237}
238
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TBA
239bool
240arm_target::low_cannot_fetch_register (int regno)
0a30fbc4 241{
2ec06d2e 242 return (regno >= arm_num_regs);
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DJ
243}
244
fb1e4ffc 245static void
442ea881 246arm_fill_wmmxregset (struct regcache *regcache, void *buf)
fb1e4ffc 247{
7cc17433 248 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
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DJ
249 return;
250
166a82be 251 for (int i = 0; i < 16; i++)
442ea881 252 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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DJ
253
254 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
166a82be 255 for (int i = 0; i < 6; i++)
442ea881
PA
256 collect_register (regcache, arm_num_regs + i + 16,
257 (char *) buf + 16 * 8 + i * 4);
fb1e4ffc
DJ
258}
259
260static void
442ea881 261arm_store_wmmxregset (struct regcache *regcache, const void *buf)
fb1e4ffc 262{
7cc17433 263 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
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DJ
264 return;
265
166a82be 266 for (int i = 0; i < 16; i++)
442ea881 267 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
fb1e4ffc
DJ
268
269 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
166a82be 270 for (int i = 0; i < 6; i++)
442ea881
PA
271 supply_register (regcache, arm_num_regs + i + 16,
272 (char *) buf + 16 * 8 + i * 4);
fb1e4ffc
DJ
273}
274
58d6951d 275static void
442ea881 276arm_fill_vfpregset (struct regcache *regcache, void *buf)
58d6951d 277{
bd9e6534 278 int num;
58d6951d 279
7cc17433 280 if (is_aarch32_linux_description (regcache->tdesc))
58d6951d 281 num = 32;
89abb039 282 else
7cc17433
AH
283 {
284 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
285
286 if (fp_type == ARM_FP_TYPE_VFPV3)
287 num = 32;
288 else if (fp_type == ARM_FP_TYPE_VFPV2)
289 num = 16;
290 else
291 return;
292 }
58d6951d 293
bd9e6534 294 arm_fill_vfpregset_num (regcache, buf, num);
58d6951d
DJ
295}
296
d9311bfa
AT
297/* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs. */
298static CORE_ADDR
299get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
300{
301 return UNMAKE_THUMB_ADDR (val);
302}
303
58d6951d 304static void
442ea881 305arm_store_vfpregset (struct regcache *regcache, const void *buf)
58d6951d 306{
bd9e6534 307 int num;
58d6951d 308
7cc17433 309 if (is_aarch32_linux_description (regcache->tdesc))
58d6951d 310 num = 32;
89abb039 311 else
7cc17433
AH
312 {
313 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
314
315 if (fp_type == ARM_FP_TYPE_VFPV3)
316 num = 32;
317 else if (fp_type == ARM_FP_TYPE_VFPV2)
318 num = 16;
319 else
320 return;
321 }
58d6951d 322
bd9e6534 323 arm_store_vfpregset_num (regcache, buf, num);
58d6951d 324}
fb1e4ffc 325
d9311bfa
AT
326/* Wrapper of arm_is_thumb_mode for get_next_pcs. */
327static int
328get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
329{
330 return arm_is_thumb_mode ();
331}
332
30baf67b 333/* Read memory from the inferior.
d9311bfa
AT
334 BYTE_ORDER is ignored and there to keep compatiblity with GDB's
335 read_memory_unsigned_integer. */
336static ULONGEST
337get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
338 int len,
339 int byte_order)
340{
341 ULONGEST res;
342
9e784964 343 res = 0;
694b382c
AT
344 target_read_memory (memaddr, (unsigned char *) &res, len);
345
d9311bfa
AT
346 return res;
347}
348
9308fc88
DJ
349/* Fetch the thread-local storage pointer for libthread_db. */
350
351ps_err_e
754653a7 352ps_get_thread_area (struct ps_prochandle *ph,
1b3f6016 353 lwpid_t lwpid, int idx, void **base)
9308fc88
DJ
354{
355 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
356 return PS_ERR;
357
358 /* IDX is the bias from the thread pointer to the beginning of the
359 thread descriptor. It has to be subtracted due to implementation
360 quirks in libthread_db. */
361 *base = (void *) ((char *)*base - idx);
362
363 return PS_OK;
364}
365
09b4ad9f 366
71487fd7
UW
367/* Query Hardware Breakpoint information for the target we are attached to
368 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
369static void
370arm_linux_init_hwbp_cap (int pid)
09b4ad9f 371{
71487fd7 372 unsigned int val;
09b4ad9f 373
71487fd7
UW
374 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
375 return;
09b4ad9f 376
71487fd7
UW
377 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
378 if (arm_linux_hwbp_cap.arch == 0)
379 return;
09b4ad9f 380
71487fd7
UW
381 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
382 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
383 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
09b4ad9f 384
71487fd7
UW
385 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
386 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
387 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
388 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
09b4ad9f
UW
389}
390
391/* How many hardware breakpoints are available? */
392static int
393arm_linux_get_hw_breakpoint_count (void)
394{
71487fd7 395 return arm_linux_hwbp_cap.bp_count;
09b4ad9f
UW
396}
397
398/* How many hardware watchpoints are available? */
399static int
400arm_linux_get_hw_watchpoint_count (void)
401{
71487fd7 402 return arm_linux_hwbp_cap.wp_count;
09b4ad9f
UW
403}
404
405/* Maximum length of area watched by hardware watchpoint. */
406static int
407arm_linux_get_hw_watchpoint_max_length (void)
408{
71487fd7 409 return arm_linux_hwbp_cap.max_wp_length;
09b4ad9f
UW
410}
411
412/* Initialize an ARM hardware break-/watch-point control register value.
413 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
414 type of break-/watch-point; ENABLE indicates whether the point is enabled.
415 */
416static arm_hwbp_control_t
417arm_hwbp_control_initialize (unsigned byte_address_select,
418 arm_hwbp_type hwbp_type,
419 int enable)
420{
421 gdb_assert ((byte_address_select & ~0xffU) == 0);
422 gdb_assert (hwbp_type != arm_hwbp_break
423 || ((byte_address_select & 0xfU) != 0));
424
425 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
426}
427
428/* Does the breakpoint control value CONTROL have the enable bit set? */
429static int
430arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
431{
432 return control & 0x1;
433}
434
435/* Is the breakpoint control value CONTROL initialized? */
436static int
437arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
438{
439 return control != 0;
440}
441
442/* Change a breakpoint control word so that it is in the disabled state. */
443static arm_hwbp_control_t
444arm_hwbp_control_disable (arm_hwbp_control_t control)
445{
446 return control & ~0x1;
447}
448
449/* Are two break-/watch-points equal? */
450static int
451arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
452 const struct arm_linux_hw_breakpoint *p2)
453{
454 return p1->address == p2->address && p1->control == p2->control;
455}
456
802e8e6d
PA
457/* Convert a raw breakpoint type to an enum arm_hwbp_type. */
458
171de4b8 459static arm_hwbp_type
802e8e6d
PA
460raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
461{
462 switch (raw_type)
463 {
464 case raw_bkpt_type_hw:
465 return arm_hwbp_break;
466 case raw_bkpt_type_write_wp:
467 return arm_hwbp_store;
468 case raw_bkpt_type_read_wp:
469 return arm_hwbp_load;
470 case raw_bkpt_type_access_wp:
471 return arm_hwbp_access;
472 default:
473 gdb_assert_not_reached ("unhandled raw type");
474 }
475}
476
09b4ad9f
UW
477/* Initialize the hardware breakpoint structure P for a breakpoint or
478 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
b62e2b27
UW
479 Returns -1 if TYPE is unsupported, or -2 if the particular combination
480 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
481 represents a breakpoint and 1 if type represents a watchpoint. */
09b4ad9f 482static int
802e8e6d
PA
483arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
484 int len, struct arm_linux_hw_breakpoint *p)
09b4ad9f
UW
485{
486 arm_hwbp_type hwbp_type;
487 unsigned mask;
488
802e8e6d 489 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
09b4ad9f
UW
490
491 if (hwbp_type == arm_hwbp_break)
492 {
493 /* For breakpoints, the length field encodes the mode. */
494 switch (len)
495 {
496 case 2: /* 16-bit Thumb mode breakpoint */
497 case 3: /* 32-bit Thumb mode breakpoint */
fcf303ab
UW
498 mask = 0x3;
499 addr &= ~1;
09b4ad9f
UW
500 break;
501 case 4: /* 32-bit ARM mode breakpoint */
502 mask = 0xf;
fcf303ab 503 addr &= ~3;
09b4ad9f
UW
504 break;
505 default:
506 /* Unsupported. */
b62e2b27 507 return -2;
09b4ad9f 508 }
09b4ad9f
UW
509 }
510 else
511 {
512 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
513 CORE_ADDR aligned_addr;
514
515 /* Can not set watchpoints for zero or negative lengths. */
516 if (len <= 0)
b62e2b27 517 return -2;
09b4ad9f
UW
518 /* The current ptrace interface can only handle watchpoints that are a
519 power of 2. */
520 if ((len & (len - 1)) != 0)
b62e2b27 521 return -2;
09b4ad9f
UW
522
523 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
524 range covered by a watchpoint. */
525 aligned_addr = addr & ~(max_wp_length - 1);
526 if (aligned_addr + max_wp_length < addr + len)
b62e2b27 527 return -2;
09b4ad9f
UW
528
529 mask = (1 << len) - 1;
530 }
531
532 p->address = (unsigned int) addr;
533 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
534
535 return hwbp_type != arm_hwbp_break;
536}
537
538/* Callback to mark a watch-/breakpoint to be updated in all threads of
539 the current process. */
540
00192f77
SM
541static void
542update_registers_callback (thread_info *thread, int watch, int i)
09b4ad9f 543{
d86d4aaf 544 struct lwp_info *lwp = get_thread_lwp (thread);
09b4ad9f 545
00192f77
SM
546 /* The actual update is done later just before resuming the lwp,
547 we just mark that the registers need updating. */
548 if (watch)
549 lwp->arch_private->wpts_changed[i] = 1;
550 else
551 lwp->arch_private->bpts_changed[i] = 1;
09b4ad9f 552
00192f77
SM
553 /* If the lwp isn't stopped, force it to momentarily pause, so
554 we can update its breakpoint registers. */
555 if (!lwp->stopped)
556 linux_stop_lwp (lwp);
09b4ad9f
UW
557}
558
802e8e6d
PA
559static int
560arm_supports_z_point_type (char z_type)
561{
562 switch (z_type)
563 {
abeead09 564 case Z_PACKET_SW_BP:
802e8e6d
PA
565 case Z_PACKET_HW_BP:
566 case Z_PACKET_WRITE_WP:
567 case Z_PACKET_READ_WP:
568 case Z_PACKET_ACCESS_WP:
569 return 1;
570 default:
571 /* Leave the handling of sw breakpoints with the gdb client. */
572 return 0;
573 }
574}
575
09b4ad9f
UW
576/* Insert hardware break-/watchpoint. */
577static int
802e8e6d
PA
578arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
579 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
580{
581 struct process_info *proc = current_process ();
582 struct arm_linux_hw_breakpoint p, *pts;
583 int watch, i, count;
584
585 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
586 if (watch < 0)
587 {
588 /* Unsupported. */
b62e2b27 589 return watch == -1 ? 1 : -1;
09b4ad9f
UW
590 }
591
592 if (watch)
593 {
594 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 595 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
596 }
597 else
598 {
599 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 600 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
601 }
602
603 for (i = 0; i < count; i++)
604 if (!arm_hwbp_control_is_enabled (pts[i].control))
605 {
09b4ad9f 606 pts[i] = p;
00192f77
SM
607
608 /* Only update the threads of the current process. */
609 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
610 {
611 update_registers_callback (thread, watch, i);
612 });
613
09b4ad9f
UW
614 return 0;
615 }
616
617 /* We're out of watchpoints. */
618 return -1;
619}
620
621/* Remove hardware break-/watchpoint. */
622static int
802e8e6d
PA
623arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
624 int len, struct raw_breakpoint *bp)
09b4ad9f
UW
625{
626 struct process_info *proc = current_process ();
627 struct arm_linux_hw_breakpoint p, *pts;
628 int watch, i, count;
629
630 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
631 if (watch < 0)
632 {
633 /* Unsupported. */
634 return -1;
635 }
636
637 if (watch)
638 {
639 count = arm_linux_get_hw_watchpoint_count ();
fe978cb0 640 pts = proc->priv->arch_private->wpts;
09b4ad9f
UW
641 }
642 else
643 {
644 count = arm_linux_get_hw_breakpoint_count ();
fe978cb0 645 pts = proc->priv->arch_private->bpts;
09b4ad9f
UW
646 }
647
648 for (i = 0; i < count; i++)
649 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
650 {
09b4ad9f 651 pts[i].control = arm_hwbp_control_disable (pts[i].control);
00192f77
SM
652
653 /* Only update the threads of the current process. */
654 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
655 {
656 update_registers_callback (thread, watch, i);
657 });
658
09b4ad9f
UW
659 return 0;
660 }
661
662 /* No watchpoint matched. */
663 return -1;
664}
665
666/* Return whether current thread is stopped due to a watchpoint. */
667static int
668arm_stopped_by_watchpoint (void)
669{
0bfdf32f 670 struct lwp_info *lwp = get_thread_lwp (current_thread);
a5362b9a 671 siginfo_t siginfo;
09b4ad9f
UW
672
673 /* We must be able to set hardware watchpoints. */
674 if (arm_linux_get_hw_watchpoint_count () == 0)
675 return 0;
676
677 /* Retrieve siginfo. */
678 errno = 0;
0bfdf32f 679 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
09b4ad9f
UW
680 if (errno != 0)
681 return 0;
682
683 /* This must be a hardware breakpoint. */
684 if (siginfo.si_signo != SIGTRAP
685 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
686 return 0;
687
688 /* If we are in a positive slot then we're looking at a breakpoint and not
689 a watchpoint. */
690 if (siginfo.si_errno >= 0)
691 return 0;
692
693 /* Cache stopped data address for use by arm_stopped_data_address. */
694 lwp->arch_private->stopped_data_address
695 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
696
697 return 1;
698}
699
700/* Return data address that triggered watchpoint. Called only if
701 arm_stopped_by_watchpoint returned true. */
702static CORE_ADDR
703arm_stopped_data_address (void)
704{
0bfdf32f 705 struct lwp_info *lwp = get_thread_lwp (current_thread);
09b4ad9f
UW
706 return lwp->arch_private->stopped_data_address;
707}
708
709/* Called when a new process is created. */
710static struct arch_process_info *
711arm_new_process (void)
712{
8d749320 713 struct arch_process_info *info = XCNEW (struct arch_process_info);
09b4ad9f
UW
714 return info;
715}
716
04ec7890
SM
717/* Called when a process is being deleted. */
718
719static void
720arm_delete_process (struct arch_process_info *info)
721{
722 xfree (info);
723}
724
09b4ad9f 725/* Called when a new thread is detected. */
34c703da
GB
726static void
727arm_new_thread (struct lwp_info *lwp)
09b4ad9f 728{
8d749320 729 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
09b4ad9f
UW
730 int i;
731
732 for (i = 0; i < MAX_BPTS; i++)
733 info->bpts_changed[i] = 1;
734 for (i = 0; i < MAX_WPTS; i++)
735 info->wpts_changed[i] = 1;
736
34c703da 737 lwp->arch_private = info;
09b4ad9f
UW
738}
739
466eecee
SM
740/* Function to call when a thread is being deleted. */
741
742static void
743arm_delete_thread (struct arch_lwp_info *arch_lwp)
744{
745 xfree (arch_lwp);
746}
747
3a8a0396
DB
748static void
749arm_new_fork (struct process_info *parent, struct process_info *child)
750{
69291610
HW
751 struct arch_process_info *parent_proc_info;
752 struct arch_process_info *child_proc_info;
3a8a0396
DB
753 struct lwp_info *child_lwp;
754 struct arch_lwp_info *child_lwp_info;
755 int i;
756
757 /* These are allocated by linux_add_process. */
61a7418c
DB
758 gdb_assert (parent->priv != NULL
759 && parent->priv->arch_private != NULL);
760 gdb_assert (child->priv != NULL
761 && child->priv->arch_private != NULL);
3a8a0396 762
69291610
HW
763 parent_proc_info = parent->priv->arch_private;
764 child_proc_info = child->priv->arch_private;
765
3a8a0396
DB
766 /* Linux kernel before 2.6.33 commit
767 72f674d203cd230426437cdcf7dd6f681dad8b0d
768 will inherit hardware debug registers from parent
769 on fork/vfork/clone. Newer Linux kernels create such tasks with
770 zeroed debug registers.
771
772 GDB core assumes the child inherits the watchpoints/hw
773 breakpoints of the parent, and will remove them all from the
774 forked off process. Copy the debug registers mirrors into the
775 new process so that all breakpoints and watchpoints can be
776 removed together. The debug registers mirror will become zeroed
777 in the end before detaching the forked off process, thus making
778 this compatible with older Linux kernels too. */
779
780 *child_proc_info = *parent_proc_info;
781
782 /* Mark all the hardware breakpoints and watchpoints as changed to
783 make sure that the registers will be updated. */
9179355e 784 child_lwp = find_lwp_pid (ptid_t (child->pid));
3a8a0396
DB
785 child_lwp_info = child_lwp->arch_private;
786 for (i = 0; i < MAX_BPTS; i++)
787 child_lwp_info->bpts_changed[i] = 1;
788 for (i = 0; i < MAX_WPTS; i++)
789 child_lwp_info->wpts_changed[i] = 1;
790}
791
09b4ad9f
UW
792/* Called when resuming a thread.
793 If the debug regs have changed, update the thread's copies. */
794static void
795arm_prepare_to_resume (struct lwp_info *lwp)
796{
d86d4aaf
DE
797 struct thread_info *thread = get_lwp_thread (lwp);
798 int pid = lwpid_of (thread);
799 struct process_info *proc = find_process_pid (pid_of (thread));
fe978cb0 800 struct arch_process_info *proc_info = proc->priv->arch_private;
09b4ad9f
UW
801 struct arch_lwp_info *lwp_info = lwp->arch_private;
802 int i;
803
804 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
805 if (lwp_info->bpts_changed[i])
806 {
807 errno = 0;
808
809 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
f15f9948 810 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 811 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
f15f9948 812 &proc_info->bpts[i].address) < 0)
71487fd7 813 perror_with_name ("Unexpected error setting breakpoint address");
09b4ad9f
UW
814
815 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
f15f9948 816 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 817 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
f15f9948 818 &proc_info->bpts[i].control) < 0)
71487fd7 819 perror_with_name ("Unexpected error setting breakpoint");
09b4ad9f
UW
820
821 lwp_info->bpts_changed[i] = 0;
822 }
823
824 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
825 if (lwp_info->wpts_changed[i])
826 {
827 errno = 0;
828
829 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
f15f9948 830 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 831 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
f15f9948 832 &proc_info->wpts[i].address) < 0)
71487fd7 833 perror_with_name ("Unexpected error setting watchpoint address");
09b4ad9f
UW
834
835 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
f15f9948 836 if (ptrace (PTRACE_SETHBPREGS, pid,
b8e1b30e 837 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
f15f9948 838 &proc_info->wpts[i].control) < 0)
71487fd7 839 perror_with_name ("Unexpected error setting watchpoint");
09b4ad9f
UW
840
841 lwp_info->wpts_changed[i] = 0;
842 }
843}
844
f7a6a40d
YQ
845/* Find the next pc for a sigreturn or rt_sigreturn syscall. In
846 addition, set IS_THUMB depending on whether we will return to ARM
847 or Thumb code.
d9311bfa
AT
848 See arm-linux.h for stack layout details. */
849static CORE_ADDR
f7a6a40d
YQ
850arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
851 int *is_thumb)
d9311bfa
AT
852{
853 unsigned long sp;
854 unsigned long sp_data;
855 /* Offset of PC register. */
856 int pc_offset = 0;
857 CORE_ADDR next_pc = 0;
cf2ebb6e 858 uint32_t cpsr;
d9311bfa
AT
859
860 gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
861
862 collect_register_by_name (regcache, "sp", &sp);
52405d85 863 the_target->read_memory (sp, (unsigned char *) &sp_data, 4);
d9311bfa
AT
864
865 pc_offset = arm_linux_sigreturn_next_pc_offset
866 (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
867
52405d85 868 the_target->read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4);
d9311bfa 869
f7a6a40d 870 /* Set IS_THUMB according the CPSR saved on the stack. */
52405d85 871 the_target->read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
f7a6a40d
YQ
872 *is_thumb = ((cpsr & CPSR_T) != 0);
873
d9311bfa
AT
874 return next_pc;
875}
876
877/* When PC is at a syscall instruction, return the PC of the next
878 instruction to be executed. */
879static CORE_ADDR
553cb527 880get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
d9311bfa
AT
881{
882 CORE_ADDR next_pc = 0;
553cb527 883 CORE_ADDR pc = regcache_read_pc (self->regcache);
d9311bfa
AT
884 int is_thumb = arm_is_thumb_mode ();
885 ULONGEST svc_number = 0;
886 struct regcache *regcache = self->regcache;
887
888 if (is_thumb)
889 {
890 collect_register (regcache, 7, &svc_number);
891 next_pc = pc + 2;
892 }
893 else
894 {
895 unsigned long this_instr;
896 unsigned long svc_operand;
897
694b382c 898 target_read_memory (pc, (unsigned char *) &this_instr, 4);
d9311bfa
AT
899 svc_operand = (0x00ffffff & this_instr);
900
901 if (svc_operand) /* OABI. */
902 {
903 svc_number = svc_operand - 0x900000;
904 }
905 else /* EABI. */
906 {
907 collect_register (regcache, 7, &svc_number);
908 }
909
910 next_pc = pc + 4;
911 }
912
913 /* This is a sigreturn or sigreturn_rt syscall. */
914 if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
915 {
f7a6a40d
YQ
916 /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
917 update IS_THUMB. */
918 next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
d9311bfa
AT
919 }
920
921 /* Addresses for calling Thumb functions have the bit 0 set. */
922 if (is_thumb)
923 next_pc = MAKE_THUMB_ADDR (next_pc);
924
925 return next_pc;
926}
09b4ad9f 927
3aee8918
PA
928static const struct target_desc *
929arm_read_description (void)
58d6951d 930{
974c89e0 931 unsigned long arm_hwcap = linux_get_hwcap (4);
71487fd7 932
58d6951d 933 if (arm_hwcap & HWCAP_IWMMXT)
7cc17433 934 return arm_linux_read_description (ARM_FP_TYPE_IWMMXT);
58d6951d
DJ
935
936 if (arm_hwcap & HWCAP_VFP)
937 {
166a82be
AH
938 /* Make sure that the kernel supports reading VFP registers. Support was
939 added in 2.6.30. */
940 int pid = lwpid_of (current_thread);
941 errno = 0;
942 char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
943 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
7cc17433 944 return arm_linux_read_description (ARM_FP_TYPE_NONE);
58d6951d
DJ
945
946 /* NEON implies either no VFP, or VFPv3-D32. We only support
947 it with VFP. */
948 if (arm_hwcap & HWCAP_NEON)
7cc17433 949 return aarch32_linux_read_description ();
58d6951d 950 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
7cc17433 951 return arm_linux_read_description (ARM_FP_TYPE_VFPV3);
58d6951d 952 else
7cc17433 953 return arm_linux_read_description (ARM_FP_TYPE_VFPV2);
58d6951d
DJ
954 }
955
956 /* The default configuration uses legacy FPA registers, probably
957 simulated. */
7cc17433 958 return arm_linux_read_description (ARM_FP_TYPE_NONE);
58d6951d
DJ
959}
960
797bcff5
TBA
961void
962arm_target::low_arch_setup ()
3aee8918 963{
bd9e6534
YQ
964 int tid = lwpid_of (current_thread);
965 int gpregs[18];
966 struct iovec iov;
967
166a82be
AH
968 /* Query hardware watchpoint/breakpoint capabilities. */
969 arm_linux_init_hwbp_cap (tid);
970
3aee8918 971 current_process ()->tdesc = arm_read_description ();
bd9e6534
YQ
972
973 iov.iov_base = gpregs;
974 iov.iov_len = sizeof (gpregs);
975
976 /* Check if PTRACE_GETREGSET works. */
977 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
978 have_ptrace_getregset = 1;
979 else
980 have_ptrace_getregset = 0;
3aee8918
PA
981}
982
7582c77c
TBA
983bool
984arm_target::supports_software_single_step ()
985{
986 return true;
987}
988
d9311bfa
AT
989/* Fetch the next possible PCs after the current instruction executes. */
990
7582c77c
TBA
991std::vector<CORE_ADDR>
992arm_target::low_get_next_pcs (regcache *regcache)
d9311bfa
AT
993{
994 struct arm_get_next_pcs next_pcs_ctx;
d9311bfa
AT
995
996 arm_get_next_pcs_ctor (&next_pcs_ctx,
997 &get_next_pcs_ops,
998 /* Byte order is ignored assumed as host. */
999 0,
1000 0,
1b451dda 1001 1,
d9311bfa
AT
1002 regcache);
1003
a0ff9e1a 1004 return arm_get_next_pcs (&next_pcs_ctx);
d9311bfa
AT
1005}
1006
7d00775e
AT
1007/* Support for hardware single step. */
1008
1009static int
1010arm_supports_hardware_single_step (void)
1011{
1012 return 0;
1013}
1014
79e7fd4f
YQ
1015/* Implementation of linux_target_ops method "get_syscall_trapinfo". */
1016
1017static void
1018arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
1019{
1020 if (arm_is_thumb_mode ())
1021 collect_register_by_name (regcache, "r7", sysno);
1022 else
1023 {
1024 unsigned long pc;
1025 unsigned long insn;
1026
1027 collect_register_by_name (regcache, "pc", &pc);
1028
52405d85 1029 if (the_target->read_memory (pc - 4, (unsigned char *) &insn, 4))
79e7fd4f
YQ
1030 *sysno = UNKNOWN_SYSCALL;
1031 else
1032 {
1033 unsigned long svc_operand = (0x00ffffff & insn);
1034
1035 if (svc_operand)
1036 {
1037 /* OABI */
1038 *sysno = svc_operand - 0x900000;
1039 }
1040 else
1041 {
1042 /* EABI */
1043 collect_register_by_name (regcache, "r7", sysno);
1044 }
1045 }
1046 }
1047}
1048
bd9e6534
YQ
1049/* Register sets without using PTRACE_GETREGSET. */
1050
3aee8918 1051static struct regset_info arm_regsets[] = {
350fab54
AH
1052 { PTRACE_GETREGS, PTRACE_SETREGS, 0,
1053 ARM_CORE_REGS_SIZE + ARM_INT_REGISTER_SIZE, GENERAL_REGS,
fb1e4ffc 1054 arm_fill_gregset, arm_store_gregset },
350fab54 1055 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, IWMMXT_REGS_SIZE, EXTENDED_REGS,
fb1e4ffc 1056 arm_fill_wmmxregset, arm_store_wmmxregset },
350fab54 1057 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, ARM_VFP3_REGS_SIZE, EXTENDED_REGS,
58d6951d 1058 arm_fill_vfpregset, arm_store_vfpregset },
50bc912a 1059 NULL_REGSET
fb1e4ffc
DJ
1060};
1061
3aee8918
PA
1062static struct regsets_info arm_regsets_info =
1063 {
1064 arm_regsets, /* regsets */
1065 0, /* num_regsets */
1066 NULL, /* disabled_regsets */
1067 };
1068
1069static struct usrregs_info arm_usrregs_info =
1070 {
1071 arm_num_regs,
1072 arm_regmap,
1073 };
1074
bd9e6534 1075static struct regs_info regs_info_arm =
3aee8918
PA
1076 {
1077 NULL, /* regset_bitmap */
1078 &arm_usrregs_info,
1079 &arm_regsets_info
1080 };
1081
aa8d21c9
TBA
1082const regs_info *
1083arm_target::get_regs_info ()
3aee8918 1084{
bd9e6534
YQ
1085 const struct target_desc *tdesc = current_process ()->tdesc;
1086
1087 if (have_ptrace_getregset == 1
7cc17433
AH
1088 && (is_aarch32_linux_description (tdesc)
1089 || arm_linux_get_tdesc_fp_type (tdesc) == ARM_FP_TYPE_VFPV3))
bd9e6534 1090 return &regs_info_aarch32;
7cc17433
AH
1091
1092 return &regs_info_arm;
3aee8918
PA
1093}
1094
dd373349 1095struct linux_target_ops the_low_target = {
802e8e6d 1096 arm_supports_z_point_type,
09b4ad9f
UW
1097 arm_insert_point,
1098 arm_remove_point,
1099 arm_stopped_by_watchpoint,
1100 arm_stopped_data_address,
1101 NULL, /* collect_ptrace_register */
1102 NULL, /* supply_ptrace_register */
1103 NULL, /* siginfo_fixup */
1104 arm_new_process,
04ec7890 1105 arm_delete_process,
09b4ad9f 1106 arm_new_thread,
466eecee 1107 arm_delete_thread,
3a8a0396 1108 arm_new_fork,
09b4ad9f 1109 arm_prepare_to_resume,
769ef81f
AT
1110 NULL, /* process_qsupported */
1111 NULL, /* supports_tracepoints */
1112 NULL, /* get_thread_area */
1113 NULL, /* install_fast_tracepoint_jump_pad */
1114 NULL, /* emit_ops */
1115 NULL, /* get_min_fast_tracepoint_insn_len */
1116 NULL, /* supports_range_stepping */
79e7fd4f
YQ
1117 arm_supports_hardware_single_step,
1118 arm_get_syscall_trapinfo,
2ec06d2e 1119};
3aee8918 1120
ef0478f6
TBA
1121/* The linux target ops object. */
1122
1123linux_process_target *the_linux_target = &the_arm_target;
1124
3aee8918
PA
1125void
1126initialize_low_arch (void)
1127{
bd9e6534 1128 initialize_low_arch_aarch32 ();
3aee8918
PA
1129 initialize_regsets_info (&arm_regsets_info);
1130}
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