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0a30fbc4 | 1 | /* GNU/Linux/IA64 specific low level interface, for the remote server for GDB. |
b811d2c2 | 2 | Copyright (C) 1995-2020 Free Software Foundation, Inc. |
0a30fbc4 DJ |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 8 | the Free Software Foundation; either version 3 of the License, or |
0a30fbc4 DJ |
9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
0a30fbc4 DJ |
18 | |
19 | #include "server.h" | |
58caa3dc | 20 | #include "linux-low.h" |
0a30fbc4 DJ |
21 | |
22 | #ifdef HAVE_SYS_REG_H | |
23 | #include <sys/reg.h> | |
24 | #endif | |
25 | ||
ef0478f6 TBA |
26 | /* Linux target op definitions for the IA64 architecture. */ |
27 | ||
28 | class ia64_target : public linux_process_target | |
29 | { | |
30 | public: | |
31 | ||
aa8d21c9 TBA |
32 | const regs_info *get_regs_info () override; |
33 | ||
3ca4edb6 TBA |
34 | const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override; |
35 | ||
797bcff5 TBA |
36 | protected: |
37 | ||
38 | void low_arch_setup () override; | |
daca57a7 TBA |
39 | |
40 | bool low_cannot_fetch_register (int regno) override; | |
41 | ||
42 | bool low_cannot_store_register (int regno) override; | |
bd70b1f2 TBA |
43 | |
44 | bool low_fetch_register (regcache *regcache, int regno) override; | |
d7146cda TBA |
45 | |
46 | bool low_breakpoint_at (CORE_ADDR pc) override; | |
ef0478f6 TBA |
47 | }; |
48 | ||
49 | /* The singleton target ops object. */ | |
50 | ||
51 | static ia64_target the_ia64_target; | |
52 | ||
3ca4edb6 TBA |
53 | const gdb_byte * |
54 | ia64_target::sw_breakpoint_from_kind (int kind, int *size) | |
55 | { | |
56 | gdb_assert_no_reached ("target op sw_breakpoint_from_kind is not " | |
57 | "implemented by this target"); | |
58 | } | |
59 | ||
d7146cda TBA |
60 | bool |
61 | ia64_target::low_breakpoint_at (CORE_ADDR pc) | |
62 | { | |
63 | gdb_assert_no_reached ("linux target op low_breakpoint_at is not " | |
64 | "implemented by this target"); | |
65 | } | |
66 | ||
d05b4ac3 UW |
67 | /* Defined in auto-generated file reg-ia64.c. */ |
68 | void init_registers_ia64 (void); | |
3aee8918 | 69 | extern const struct target_desc *tdesc_ia64; |
d05b4ac3 | 70 | |
7fb85e41 | 71 | #define ia64_num_regs 462 |
0a30fbc4 DJ |
72 | |
73 | #include <asm/ptrace_offsets.h> | |
74 | ||
2ec06d2e | 75 | static int ia64_regmap[] = |
0a30fbc4 DJ |
76 | { |
77 | /* general registers */ | |
78 | -1, /* gr0 not available; i.e, it's always zero */ | |
79 | PT_R1, | |
80 | PT_R2, | |
81 | PT_R3, | |
82 | PT_R4, | |
83 | PT_R5, | |
84 | PT_R6, | |
85 | PT_R7, | |
86 | PT_R8, | |
87 | PT_R9, | |
88 | PT_R10, | |
89 | PT_R11, | |
90 | PT_R12, | |
91 | PT_R13, | |
92 | PT_R14, | |
93 | PT_R15, | |
94 | PT_R16, | |
95 | PT_R17, | |
96 | PT_R18, | |
97 | PT_R19, | |
98 | PT_R20, | |
99 | PT_R21, | |
100 | PT_R22, | |
101 | PT_R23, | |
102 | PT_R24, | |
103 | PT_R25, | |
104 | PT_R26, | |
105 | PT_R27, | |
106 | PT_R28, | |
107 | PT_R29, | |
108 | PT_R30, | |
109 | PT_R31, | |
110 | /* gr32 through gr127 not directly available via the ptrace interface */ | |
111 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
112 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
113 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
114 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
115 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
116 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
117 | /* Floating point registers */ | |
118 | -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */ | |
119 | PT_F2, | |
120 | PT_F3, | |
121 | PT_F4, | |
122 | PT_F5, | |
123 | PT_F6, | |
124 | PT_F7, | |
125 | PT_F8, | |
126 | PT_F9, | |
127 | PT_F10, | |
128 | PT_F11, | |
129 | PT_F12, | |
130 | PT_F13, | |
131 | PT_F14, | |
132 | PT_F15, | |
133 | PT_F16, | |
134 | PT_F17, | |
135 | PT_F18, | |
136 | PT_F19, | |
137 | PT_F20, | |
138 | PT_F21, | |
139 | PT_F22, | |
140 | PT_F23, | |
141 | PT_F24, | |
142 | PT_F25, | |
143 | PT_F26, | |
144 | PT_F27, | |
145 | PT_F28, | |
146 | PT_F29, | |
147 | PT_F30, | |
148 | PT_F31, | |
149 | PT_F32, | |
150 | PT_F33, | |
151 | PT_F34, | |
152 | PT_F35, | |
153 | PT_F36, | |
154 | PT_F37, | |
155 | PT_F38, | |
156 | PT_F39, | |
157 | PT_F40, | |
158 | PT_F41, | |
159 | PT_F42, | |
160 | PT_F43, | |
161 | PT_F44, | |
162 | PT_F45, | |
163 | PT_F46, | |
164 | PT_F47, | |
165 | PT_F48, | |
166 | PT_F49, | |
167 | PT_F50, | |
168 | PT_F51, | |
169 | PT_F52, | |
170 | PT_F53, | |
171 | PT_F54, | |
172 | PT_F55, | |
173 | PT_F56, | |
174 | PT_F57, | |
175 | PT_F58, | |
176 | PT_F59, | |
177 | PT_F60, | |
178 | PT_F61, | |
179 | PT_F62, | |
180 | PT_F63, | |
181 | PT_F64, | |
182 | PT_F65, | |
183 | PT_F66, | |
184 | PT_F67, | |
185 | PT_F68, | |
186 | PT_F69, | |
187 | PT_F70, | |
188 | PT_F71, | |
189 | PT_F72, | |
190 | PT_F73, | |
191 | PT_F74, | |
192 | PT_F75, | |
193 | PT_F76, | |
194 | PT_F77, | |
195 | PT_F78, | |
196 | PT_F79, | |
197 | PT_F80, | |
198 | PT_F81, | |
199 | PT_F82, | |
200 | PT_F83, | |
201 | PT_F84, | |
202 | PT_F85, | |
203 | PT_F86, | |
204 | PT_F87, | |
205 | PT_F88, | |
206 | PT_F89, | |
207 | PT_F90, | |
208 | PT_F91, | |
209 | PT_F92, | |
210 | PT_F93, | |
211 | PT_F94, | |
212 | PT_F95, | |
213 | PT_F96, | |
214 | PT_F97, | |
215 | PT_F98, | |
216 | PT_F99, | |
217 | PT_F100, | |
218 | PT_F101, | |
219 | PT_F102, | |
220 | PT_F103, | |
221 | PT_F104, | |
222 | PT_F105, | |
223 | PT_F106, | |
224 | PT_F107, | |
225 | PT_F108, | |
226 | PT_F109, | |
227 | PT_F110, | |
228 | PT_F111, | |
229 | PT_F112, | |
230 | PT_F113, | |
231 | PT_F114, | |
232 | PT_F115, | |
233 | PT_F116, | |
234 | PT_F117, | |
235 | PT_F118, | |
236 | PT_F119, | |
237 | PT_F120, | |
238 | PT_F121, | |
239 | PT_F122, | |
240 | PT_F123, | |
241 | PT_F124, | |
242 | PT_F125, | |
243 | PT_F126, | |
244 | PT_F127, | |
245 | /* predicate registers - we don't fetch these individually */ | |
246 | -1, -1, -1, -1, -1, -1, -1, -1, | |
247 | -1, -1, -1, -1, -1, -1, -1, -1, | |
248 | -1, -1, -1, -1, -1, -1, -1, -1, | |
249 | -1, -1, -1, -1, -1, -1, -1, -1, | |
250 | -1, -1, -1, -1, -1, -1, -1, -1, | |
251 | -1, -1, -1, -1, -1, -1, -1, -1, | |
252 | -1, -1, -1, -1, -1, -1, -1, -1, | |
253 | -1, -1, -1, -1, -1, -1, -1, -1, | |
254 | /* branch registers */ | |
255 | PT_B0, | |
256 | PT_B1, | |
257 | PT_B2, | |
258 | PT_B3, | |
259 | PT_B4, | |
260 | PT_B5, | |
261 | PT_B6, | |
262 | PT_B7, | |
263 | /* virtual frame pointer and virtual return address pointer */ | |
264 | -1, -1, | |
265 | /* other registers */ | |
266 | PT_PR, | |
267 | PT_CR_IIP, /* ip */ | |
268 | PT_CR_IPSR, /* psr */ | |
269 | PT_CFM, /* cfm */ | |
270 | /* kernel registers not visible via ptrace interface (?) */ | |
271 | -1, -1, -1, -1, -1, -1, -1, -1, | |
272 | /* hole */ | |
273 | -1, -1, -1, -1, -1, -1, -1, -1, | |
274 | PT_AR_RSC, | |
275 | PT_AR_BSP, | |
276 | PT_AR_BSPSTORE, | |
277 | PT_AR_RNAT, | |
278 | -1, | |
279 | -1, /* Not available: FCR, IA32 floating control register */ | |
280 | -1, -1, | |
281 | -1, /* Not available: EFLAG */ | |
282 | -1, /* Not available: CSD */ | |
283 | -1, /* Not available: SSD */ | |
284 | -1, /* Not available: CFLG */ | |
285 | -1, /* Not available: FSR */ | |
286 | -1, /* Not available: FIR */ | |
287 | -1, /* Not available: FDR */ | |
288 | -1, | |
289 | PT_AR_CCV, | |
290 | -1, -1, -1, | |
291 | PT_AR_UNAT, | |
292 | -1, -1, -1, | |
293 | PT_AR_FPSR, | |
294 | -1, -1, -1, | |
295 | -1, /* Not available: ITC */ | |
296 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
297 | -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
298 | PT_AR_PFS, | |
299 | PT_AR_LC, | |
c14dfd32 | 300 | PT_AR_EC, |
0a30fbc4 DJ |
301 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
302 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
303 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
304 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
305 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
306 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | |
307 | -1, | |
0a30fbc4 DJ |
308 | }; |
309 | ||
daca57a7 TBA |
310 | bool |
311 | ia64_target::low_cannot_store_register (int regno) | |
0a30fbc4 | 312 | { |
daca57a7 | 313 | return false; |
0a30fbc4 DJ |
314 | } |
315 | ||
daca57a7 TBA |
316 | bool |
317 | ia64_target::low_cannot_fetch_register (int regno) | |
0a30fbc4 | 318 | { |
daca57a7 | 319 | return false; |
0a30fbc4 DJ |
320 | } |
321 | ||
c14dfd32 PA |
322 | /* GDB register numbers. */ |
323 | #define IA64_GR0_REGNUM 0 | |
324 | #define IA64_FR0_REGNUM 128 | |
325 | #define IA64_FR1_REGNUM 129 | |
326 | ||
bd70b1f2 TBA |
327 | bool |
328 | ia64_target::low_fetch_register (regcache *regcache, int regnum) | |
c14dfd32 PA |
329 | { |
330 | /* r0 cannot be fetched but is always zero. */ | |
331 | if (regnum == IA64_GR0_REGNUM) | |
332 | { | |
333 | const gdb_byte zero[8] = { 0 }; | |
334 | ||
3aee8918 | 335 | gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum)); |
c14dfd32 | 336 | supply_register (regcache, regnum, zero); |
bd70b1f2 | 337 | return true; |
c14dfd32 PA |
338 | } |
339 | ||
340 | /* fr0 cannot be fetched but is always zero. */ | |
341 | if (regnum == IA64_FR0_REGNUM) | |
342 | { | |
343 | const gdb_byte f_zero[16] = { 0 }; | |
344 | ||
3aee8918 | 345 | gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum)); |
c14dfd32 | 346 | supply_register (regcache, regnum, f_zero); |
bd70b1f2 | 347 | return true; |
c14dfd32 PA |
348 | } |
349 | ||
350 | /* fr1 cannot be fetched but is always one (1.0). */ | |
351 | if (regnum == IA64_FR1_REGNUM) | |
352 | { | |
353 | const gdb_byte f_one[16] = | |
354 | { 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 }; | |
355 | ||
3aee8918 | 356 | gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum)); |
c14dfd32 | 357 | supply_register (regcache, regnum, f_one); |
bd70b1f2 | 358 | return true; |
c14dfd32 PA |
359 | } |
360 | ||
bd70b1f2 | 361 | return false; |
c14dfd32 PA |
362 | } |
363 | ||
3aee8918 PA |
364 | static struct usrregs_info ia64_usrregs_info = |
365 | { | |
366 | ia64_num_regs, | |
367 | ia64_regmap, | |
368 | }; | |
369 | ||
aa8d21c9 | 370 | static struct regs_info myregs_info = |
3aee8918 PA |
371 | { |
372 | NULL, /* regset_bitmap */ | |
373 | &ia64_usrregs_info | |
374 | }; | |
375 | ||
aa8d21c9 TBA |
376 | const regs_info * |
377 | ia64_target::get_regs_info () | |
3aee8918 | 378 | { |
aa8d21c9 | 379 | return &myregs_info; |
3aee8918 PA |
380 | } |
381 | ||
797bcff5 TBA |
382 | void |
383 | ia64_target::low_arch_setup () | |
3aee8918 PA |
384 | { |
385 | current_process ()->tdesc = tdesc_ia64; | |
386 | } | |
387 | ||
ef0478f6 TBA |
388 | /* The linux target ops object. */ |
389 | ||
390 | linux_process_target *the_linux_target = &the_ia64_target; | |
391 | ||
3aee8918 PA |
392 | void |
393 | initialize_low_arch (void) | |
394 | { | |
395 | init_registers_ia64 (); | |
396 | } |