Commit | Line | Data |
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7cfbc4a0 | 1 | /* GNU/Linux/m32r specific low level interface, for the remote server for GDB. |
b811d2c2 | 2 | Copyright (C) 2005-2020 Free Software Foundation, Inc. |
7cfbc4a0 KI |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 8 | the Free Software Foundation; either version 3 of the License, or |
7cfbc4a0 KI |
9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
7cfbc4a0 KI |
18 | |
19 | #include "server.h" | |
20 | #include "linux-low.h" | |
21 | ||
22 | #ifdef HAVE_SYS_REG_H | |
23 | #include <sys/reg.h> | |
24 | #endif | |
25 | ||
ef0478f6 TBA |
26 | /* Linux target op definitions for the m32r architecture. */ |
27 | ||
28 | class m32r_target : public linux_process_target | |
29 | { | |
30 | public: | |
31 | ||
797bcff5 TBA |
32 | protected: |
33 | ||
34 | void low_arch_setup () override; | |
ef0478f6 TBA |
35 | }; |
36 | ||
37 | /* The singleton target ops object. */ | |
38 | ||
39 | static m32r_target the_m32r_target; | |
40 | ||
d05b4ac3 UW |
41 | /* Defined in auto-generated file reg-m32r.c. */ |
42 | void init_registers_m32r (void); | |
3aee8918 | 43 | extern const struct target_desc *tdesc_m32r; |
d05b4ac3 | 44 | |
7cfbc4a0 KI |
45 | #define m32r_num_regs 25 |
46 | ||
47 | static int m32r_regmap[] = { | |
48 | #ifdef PT_R0 | |
49 | PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7, | |
50 | PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU, | |
51 | PT_PSW, PT_CBR, PT_SPI, PT_SPU, PT_BPC, PT_PC, PT_ACCL, PT_ACCH, PT_EVB | |
52 | #else | |
53 | 4 * 4, 4 * 5, 4 * 6, 4 * 7, 4 * 0, 4 * 1, 4 * 2, 4 * 8, | |
54 | 4 * 9, 4 * 10, 4 * 11, 4 * 12, 4 * 13, 4 * 24, 4 * 25, 4 * 23, | |
55 | 4 * 19, 4 * 31, 4 * 26, 4 * 23, 4 * 20, 4 * 30, 4 * 16, 4 * 15, 4 * 32 | |
56 | #endif | |
57 | }; | |
58 | ||
59 | static int | |
60 | m32r_cannot_store_register (int regno) | |
61 | { | |
62 | return (regno >= m32r_num_regs); | |
63 | } | |
64 | ||
65 | static int | |
66 | m32r_cannot_fetch_register (int regno) | |
67 | { | |
68 | return (regno >= m32r_num_regs); | |
69 | } | |
70 | ||
7cfbc4a0 KI |
71 | static const unsigned short m32r_breakpoint = 0x10f1; |
72 | #define m32r_breakpoint_len 2 | |
73 | ||
dd373349 AT |
74 | /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ |
75 | ||
76 | static const gdb_byte * | |
77 | m32r_sw_breakpoint_from_kind (int kind, int *size) | |
78 | { | |
79 | *size = m32r_breakpoint_len; | |
80 | return (const gdb_byte *) &m32r_breakpoint; | |
81 | } | |
82 | ||
7cfbc4a0 KI |
83 | static int |
84 | m32r_breakpoint_at (CORE_ADDR where) | |
85 | { | |
86 | unsigned short insn; | |
87 | ||
52405d85 TBA |
88 | the_target->read_memory (where, (unsigned char *) &insn, |
89 | m32r_breakpoint_len); | |
7cfbc4a0 KI |
90 | if (insn == m32r_breakpoint) |
91 | return 1; | |
92 | ||
93 | /* If necessary, recognize more trap instructions here. GDB only uses the | |
94 | one. */ | |
95 | return 0; | |
96 | } | |
97 | ||
797bcff5 TBA |
98 | void |
99 | m32r_target::low_arch_setup () | |
3aee8918 PA |
100 | { |
101 | current_process ()->tdesc = tdesc_m32r; | |
102 | } | |
103 | ||
7d00775e AT |
104 | /* Support for hardware single step. */ |
105 | ||
106 | static int | |
107 | m32r_supports_hardware_single_step (void) | |
108 | { | |
109 | return 1; | |
110 | } | |
111 | ||
3aee8918 PA |
112 | static struct usrregs_info m32r_usrregs_info = |
113 | { | |
114 | m32r_num_regs, | |
115 | m32r_regmap, | |
116 | }; | |
117 | ||
118 | static struct regs_info regs_info = | |
119 | { | |
120 | NULL, /* regset_bitmap */ | |
121 | &m32r_usrregs_info, | |
122 | }; | |
123 | ||
124 | static const struct regs_info * | |
125 | m32r_regs_info (void) | |
126 | { | |
127 | return ®s_info; | |
128 | } | |
129 | ||
7cfbc4a0 | 130 | struct linux_target_ops the_low_target = { |
3aee8918 | 131 | m32r_regs_info, |
7cfbc4a0 KI |
132 | m32r_cannot_fetch_register, |
133 | m32r_cannot_store_register, | |
c14dfd32 | 134 | NULL, /* fetch_register */ |
276d4552 YQ |
135 | linux_get_pc_32bit, |
136 | linux_set_pc_32bit, | |
dd373349 AT |
137 | NULL, /* breakpoint_from_pc */ |
138 | m32r_sw_breakpoint_from_kind, | |
7cfbc4a0 KI |
139 | NULL, |
140 | 0, | |
141 | m32r_breakpoint_at, | |
7d00775e AT |
142 | NULL, /* supports_z_point_type */ |
143 | NULL, /* insert_point */ | |
144 | NULL, /* remove_point */ | |
145 | NULL, /* stopped_by_watchpoint */ | |
146 | NULL, /* stopped_data_address */ | |
147 | NULL, /* collect_ptrace_register */ | |
148 | NULL, /* supply_ptrace_register */ | |
149 | NULL, /* siginfo_fixup */ | |
150 | NULL, /* new_process */ | |
04ec7890 | 151 | NULL, /* delete_process */ |
7d00775e | 152 | NULL, /* new_thread */ |
466eecee | 153 | NULL, /* delete_thread */ |
7d00775e AT |
154 | NULL, /* new_fork */ |
155 | NULL, /* prepare_to_resume */ | |
156 | NULL, /* process_qsupported */ | |
157 | NULL, /* supports_tracepoints */ | |
158 | NULL, /* get_thread_area */ | |
159 | NULL, /* install_fast_tracepoint_jump_pad */ | |
160 | NULL, /* emit_ops */ | |
161 | NULL, /* get_min_fast_tracepoint_insn_len */ | |
162 | NULL, /* supports_range_stepping */ | |
163 | NULL, /* breakpoint_kind_from_current_state */ | |
164 | m32r_supports_hardware_single_step, | |
7cfbc4a0 | 165 | }; |
3aee8918 | 166 | |
ef0478f6 TBA |
167 | /* The linux target ops object. */ |
168 | ||
169 | linux_process_target *the_linux_target = &the_m32r_target; | |
170 | ||
3aee8918 PA |
171 | void |
172 | initialize_low_arch (void) | |
173 | { | |
174 | init_registers_m32r (); | |
175 | } |