[deliverable/binutils-gdb.git] / gdbserver / linux-riscv-low.cc

/* GNU/Linux/RISC-V specific low level interface, for the remote server
   for GDB.
   Copyright (C) 2020 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#include "server.h"

#include "linux-low.h"
#include "tdesc.h"
#include "elf/common.h"
#include "nat/riscv-linux-tdesc.h"
#include "opcode/riscv.h"

/* Work around glibc header breakage causing ELF_NFPREG not to be usable.  */
#ifndef NFPREG
# define NFPREG 33
#endif

/* Linux target op definitions for the RISC-V architecture.  */

class riscv_target : public linux_process_target
{
public:

  const regs_info *get_regs_info () override;

protected:

  void low_arch_setup () override;
};

/* The singleton target ops object.  */

static riscv_target the_riscv_target;

/* Implementation of linux target ops method "low_arch_setup".  */

void
riscv_target::low_arch_setup ()
{
  static const char *expedite_regs[] = { "sp", "pc", NULL };

  const riscv_gdbarch_features features
    = riscv_linux_read_features (lwpid_of (current_thread));
  target_desc *tdesc = riscv_create_target_description (features);

  if (!tdesc->expedite_regs)
    init_target_desc (tdesc, expedite_regs);
  current_process ()->tdesc = tdesc;
}

/* Collect GPRs from REGCACHE into BUF.  */

static void
riscv_fill_gregset (struct regcache *regcache, void *buf)
{
  const struct target_desc *tdesc = regcache->tdesc;
  elf_gregset_t *regset = (elf_gregset_t *) buf;
  int regno = find_regno (tdesc, "zero");
  int i;

  collect_register_by_name (regcache, "pc", *regset);
  for (i = 1; i < ARRAY_SIZE (*regset); i++)
    collect_register (regcache, regno + i, *regset + i);
}

/* Supply GPRs from BUF into REGCACHE.  */

static void
riscv_store_gregset (struct regcache *regcache, const void *buf)
{
  const elf_gregset_t *regset = (const elf_gregset_t *) buf;
  const struct target_desc *tdesc = regcache->tdesc;
  int regno = find_regno (tdesc, "zero");
  int i;

  supply_register_by_name (regcache, "pc", *regset);
  supply_register_zeroed (regcache, regno);
  for (i = 1; i < ARRAY_SIZE (*regset); i++)
    supply_register (regcache, regno + i, *regset + i);
}

/* Collect FPRs from REGCACHE into BUF.  */

static void
riscv_fill_fpregset (struct regcache *regcache, void *buf)
{
  const struct target_desc *tdesc = regcache->tdesc;
  int regno = find_regno (tdesc, "ft0");
  int flen = register_size (regcache->tdesc, regno);
  gdb_byte *regbuf = (gdb_byte *) buf;
  int i;

  for (i = 0; i < ELF_NFPREG - 1; i++, regbuf += flen)
    collect_register (regcache, regno + i, regbuf);
  collect_register_by_name (regcache, "fcsr", regbuf);
}

/* Supply FPRs from BUF into REGCACHE.  */

static void
riscv_store_fpregset (struct regcache *regcache, const void *buf)
{
  const struct target_desc *tdesc = regcache->tdesc;
  int regno = find_regno (tdesc, "ft0");
  int flen = register_size (regcache->tdesc, regno);
  const gdb_byte *regbuf = (const gdb_byte *) buf;
  int i;

  for (i = 0; i < ELF_NFPREG - 1; i++, regbuf += flen)
    supply_register (regcache, regno + i, regbuf);
  supply_register_by_name (regcache, "fcsr", regbuf);
}

/* RISC-V/Linux regsets.  FPRs are optional and come in different sizes,
   so define multiple regsets for them marking them all as OPTIONAL_REGS
   rather than FP_REGS, so that "regsets_fetch_inferior_registers" picks
   the right one according to size.  */
static struct regset_info riscv_regsets[] = {
  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
    sizeof (elf_gregset_t), GENERAL_REGS,
    riscv_fill_gregset, riscv_store_gregset },
  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
    sizeof (struct __riscv_mc_q_ext_state), OPTIONAL_REGS,
    riscv_fill_fpregset, riscv_store_fpregset },
  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
    sizeof (struct __riscv_mc_d_ext_state), OPTIONAL_REGS,
    riscv_fill_fpregset, riscv_store_fpregset },
  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
    sizeof (struct __riscv_mc_f_ext_state), OPTIONAL_REGS,
    riscv_fill_fpregset, riscv_store_fpregset },
  NULL_REGSET
};

/* RISC-V/Linux regset information.  */
static struct regsets_info riscv_regsets_info =
  {
    riscv_regsets, /* regsets */
    0, /* num_regsets */
    NULL, /* disabled_regsets */
  };

/* Definition of linux_target_ops data member "regs_info".  */
static struct regs_info riscv_regs =
  {
    NULL, /* regset_bitmap */
    NULL, /* usrregs */
    &riscv_regsets_info,
  };

/* Implementation of linux target ops method "get_regs_info".  */

const regs_info *
riscv_target::get_regs_info ()
{
  return &riscv_regs;
}

/* Implementation of linux_target_ops method "fetch_register".  */

static int
riscv_fetch_register (struct regcache *regcache, int regno)
{
  const struct target_desc *tdesc = regcache->tdesc;

  if (regno != find_regno (tdesc, "zero"))
    return 0;
  supply_register_zeroed (regcache, regno);
  return 1;
}

/* Implementation of linux_target_ops method "get_pc".  */

static CORE_ADDR
riscv_get_pc (struct regcache *regcache)
{
  elf_gregset_t regset;

  if (sizeof (regset[0]) == 8)
    return linux_get_pc_64bit (regcache);
  else
    return linux_get_pc_32bit (regcache);
}

/* Implementation of linux_target_ops method "set_pc".  */

static void
riscv_set_pc (struct regcache *regcache, CORE_ADDR newpc)
{
  elf_gregset_t regset;

  if (sizeof (regset[0]) == 8)
    linux_set_pc_64bit (regcache, newpc);
  else
    linux_set_pc_32bit (regcache, newpc);
}

/* Correct in either endianness.  */
static const uint16_t riscv_ibreakpoint[] = { 0x0073, 0x0010 };
static const uint16_t riscv_cbreakpoint = 0x9002;

/* Implementation of linux_target_ops method "breakpoint_kind_from_pc".  */

static int
riscv_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
{
  union
    {
      gdb_byte bytes[2];
      uint16_t insn;
    }
  buf;

  if (target_read_memory (*pcptr, buf.bytes, sizeof (buf.insn)) == 0
      && riscv_insn_length (buf.insn == sizeof (riscv_ibreakpoint)))
    return sizeof (riscv_ibreakpoint);
  else
    return sizeof (riscv_cbreakpoint);
}

/* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */

static const gdb_byte *
riscv_sw_breakpoint_from_kind (int kind, int *size)
{
  *size = kind;
  switch (kind)
    {
      case sizeof (riscv_ibreakpoint):
	return (const gdb_byte *) &riscv_ibreakpoint;
      default:
	return (const gdb_byte *) &riscv_cbreakpoint;
    }
}

/* Implementation of linux_target_ops method "breakpoint_at".  */

static int
riscv_breakpoint_at (CORE_ADDR pc)
{
  union
    {
      gdb_byte bytes[2];
      uint16_t insn;
    }
  buf;

  if (target_read_memory (pc, buf.bytes, sizeof (buf.insn)) == 0
      && (buf.insn == riscv_cbreakpoint
	  || (buf.insn == riscv_ibreakpoint[0]
	      && target_read_memory (pc + sizeof (buf.insn), buf.bytes,
				     sizeof (buf.insn)) == 0
	      && buf.insn == riscv_ibreakpoint[1])))
    return 1;
  else
    return 0;
}

/* RISC-V/Linux target operations.  */
struct linux_target_ops the_low_target =
{
  NULL, /* cannot_fetch_register */
  NULL, /* cannot_store_register */
  riscv_fetch_register,
  riscv_get_pc,
  riscv_set_pc,
  riscv_breakpoint_kind_from_pc,
  riscv_sw_breakpoint_from_kind,
  NULL, /* get_next_pcs */
  0,    /* decr_pc_after_break */
  riscv_breakpoint_at,
};

/* The linux target ops object.  */

linux_process_target *the_linux_target = &the_riscv_target;

/* Initialize the RISC-V/Linux target.  */

void
initialize_low_arch ()
{
  initialize_regsets_info (&riscv_regsets_info);
}
Commit	Line	Data
bf84f706 MR	1	/* GNU/Linux/RISC-V specific low level interface, for the remote server
	2	for GDB.
	3	Copyright (C) 2020 Free Software Foundation, Inc.
	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 3 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	19
	20	#include "server.h"
	21
	22	#include "linux-low.h"
	23	#include "tdesc.h"
	24	#include "elf/common.h"
	25	#include "nat/riscv-linux-tdesc.h"
	26	#include "opcode/riscv.h"
	27
	28	/* Work around glibc header breakage causing ELF_NFPREG not to be usable. */
	29	#ifndef NFPREG
	30	# define NFPREG 33
	31	#endif
	32
ef0478f6 TBA	33	/* Linux target op definitions for the RISC-V architecture. */
	34
	35	class riscv_target : public linux_process_target
	36	{
	37	public:
	38
aa8d21c9 TBA	39	const regs_info *get_regs_info () override;
aa8d21c9 TBA	40
797bcff5 TBA	41	protected:
	42
	43	void low_arch_setup () override;
ef0478f6 TBA	44	};
	45
	46	/* The singleton target ops object. */
	47
	48	static riscv_target the_riscv_target;
	49
797bcff5	50	/* Implementation of linux target ops method "low_arch_setup". */
bf84f706	51
797bcff5 TBA	52	void
797bcff5 TBA	53	riscv_target::low_arch_setup ()
bf84f706 MR	54	{
	55	static const char *expedite_regs[] = { "sp", "pc", NULL };
	56
	57	const riscv_gdbarch_features features
	58	= riscv_linux_read_features (lwpid_of (current_thread));
	59	target_desc *tdesc = riscv_create_target_description (features);
	60
	61	if (!tdesc->expedite_regs)
	62	init_target_desc (tdesc, expedite_regs);
	63	current_process ()->tdesc = tdesc;
	64	}
	65
	66	/* Collect GPRs from REGCACHE into BUF. */
	67
	68	static void
	69	riscv_fill_gregset (struct regcache regcache, void buf)
	70	{
	71	const struct target_desc *tdesc = regcache->tdesc;
	72	elf_gregset_t regset = (elf_gregset_t ) buf;
	73	int regno = find_regno (tdesc, "zero");
	74	int i;
	75
	76	collect_register_by_name (regcache, "pc", *regset);
	77	for (i = 1; i < ARRAY_SIZE (*regset); i++)
	78	collect_register (regcache, regno + i, *regset + i);
	79	}
	80
	81	/* Supply GPRs from BUF into REGCACHE. */
	82
	83	static void
	84	riscv_store_gregset (struct regcache regcache, const void buf)
	85	{
	86	const elf_gregset_t regset = (const elf_gregset_t ) buf;
	87	const struct target_desc *tdesc = regcache->tdesc;
	88	int regno = find_regno (tdesc, "zero");
	89	int i;
	90
	91	supply_register_by_name (regcache, "pc", *regset);
	92	supply_register_zeroed (regcache, regno);
	93	for (i = 1; i < ARRAY_SIZE (*regset); i++)
	94	supply_register (regcache, regno + i, *regset + i);
	95	}
	96
	97	/* Collect FPRs from REGCACHE into BUF. */
	98
	99	static void
	100	riscv_fill_fpregset (struct regcache regcache, void buf)
	101	{
	102	const struct target_desc *tdesc = regcache->tdesc;
	103	int regno = find_regno (tdesc, "ft0");
	104	int flen = register_size (regcache->tdesc, regno);
	105	gdb_byte regbuf = (gdb_byte ) buf;
	106	int i;
	107
	108	for (i = 0; i < ELF_NFPREG - 1; i++, regbuf += flen)
	109	collect_register (regcache, regno + i, regbuf);
	110	collect_register_by_name (regcache, "fcsr", regbuf);
	111	}
	112
	113	/* Supply FPRs from BUF into REGCACHE. */
	114
	115	static void
	116	riscv_store_fpregset (struct regcache regcache, const void buf)
	117	{
118	const struct target_desc *tdesc = regcache->tdesc;
119	int regno = find_regno (tdesc, "ft0");
120	int flen = register_size (regcache->tdesc, regno);
121	const gdb_byte regbuf = (const gdb_byte ) buf;
122	int i;
123
124	for (i = 0; i < ELF_NFPREG - 1; i++, regbuf += flen)
125	supply_register (regcache, regno + i, regbuf);
126	supply_register_by_name (regcache, "fcsr", regbuf);
127	}
128
129	/* RISC-V/Linux regsets. FPRs are optional and come in different sizes,
130	so define multiple regsets for them marking them all as OPTIONAL_REGS
131	rather than FP_REGS, so that "regsets_fetch_inferior_registers" picks
132	the right one according to size. */
133	static struct regset_info riscv_regsets[] = {
134	{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
135	sizeof (elf_gregset_t), GENERAL_REGS,
136	riscv_fill_gregset, riscv_store_gregset },
137	{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
138	sizeof (struct __riscv_mc_q_ext_state), OPTIONAL_REGS,
139	riscv_fill_fpregset, riscv_store_fpregset },
140	{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
141	sizeof (struct __riscv_mc_d_ext_state), OPTIONAL_REGS,
142	riscv_fill_fpregset, riscv_store_fpregset },
143	{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
144	sizeof (struct __riscv_mc_f_ext_state), OPTIONAL_REGS,
145	riscv_fill_fpregset, riscv_store_fpregset },
146	NULL_REGSET
147	};
148
149	/* RISC-V/Linux regset information. */
150	static struct regsets_info riscv_regsets_info =
151	{
152	riscv_regsets, /* regsets */
153	0, /* num_regsets */
154	NULL, /* disabled_regsets */
155	};
156
157	/* Definition of linux_target_ops data member "regs_info". */
158	static struct regs_info riscv_regs =
159	{
160	NULL, /* regset_bitmap */
161	NULL, /* usrregs */
162	&riscv_regsets_info,
163	};
164
aa8d21c9	165	/* Implementation of linux target ops method "get_regs_info". */
bf84f706	166
aa8d21c9 TBA	167	const regs_info *
aa8d21c9 TBA	168	riscv_target::get_regs_info ()
bf84f706 MR	169	{
	170	return &riscv_regs;
	171	}
	172
	173	/* Implementation of linux_target_ops method "fetch_register". */
	174
	175	static int
	176	riscv_fetch_register (struct regcache *regcache, int regno)
	177	{
	178	const struct target_desc *tdesc = regcache->tdesc;
	179
	180	if (regno != find_regno (tdesc, "zero"))
	181	return 0;
	182	supply_register_zeroed (regcache, regno);
	183	return 1;
	184	}
	185
	186	/* Implementation of linux_target_ops method "get_pc". */
	187
	188	static CORE_ADDR
	189	riscv_get_pc (struct regcache *regcache)
	190	{
	191	elf_gregset_t regset;
	192
	193	if (sizeof (regset[0]) == 8)
	194	return linux_get_pc_64bit (regcache);
	195	else
	196	return linux_get_pc_32bit (regcache);
	197	}
	198
	199	/* Implementation of linux_target_ops method "set_pc". */
	200
	201	static void
	202	riscv_set_pc (struct regcache *regcache, CORE_ADDR newpc)
	203	{
	204	elf_gregset_t regset;
	205
	206	if (sizeof (regset[0]) == 8)
	207	linux_set_pc_64bit (regcache, newpc);
	208	else
	209	linux_set_pc_32bit (regcache, newpc);
	210	}
	211
	212	/* Correct in either endianness. */
	213	static const uint16_t riscv_ibreakpoint[] = { 0x0073, 0x0010 };
	214	static const uint16_t riscv_cbreakpoint = 0x9002;
	215
	216	/* Implementation of linux_target_ops method "breakpoint_kind_from_pc". */
	217
	218	static int
	219	riscv_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
	220	{
	221	union
	222	{
	223	gdb_byte bytes[2];
	224	uint16_t insn;
	225	}
	226	buf;
	227
	228	if (target_read_memory (*pcptr, buf.bytes, sizeof (buf.insn)) == 0
	229	&& riscv_insn_length (buf.insn == sizeof (riscv_ibreakpoint)))
	230	return sizeof (riscv_ibreakpoint);
	231	else
	232	return sizeof (riscv_cbreakpoint);
233	}
234
235	/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
236
237	static const gdb_byte *
238	riscv_sw_breakpoint_from_kind (int kind, int *size)
239	{
240	*size = kind;
241	switch (kind)
242	{
243	case sizeof (riscv_ibreakpoint):
244	return (const gdb_byte *) &riscv_ibreakpoint;
245	default:
246	return (const gdb_byte *) &riscv_cbreakpoint;
247	}
248	}
249
250	/* Implementation of linux_target_ops method "breakpoint_at". */
251
252	static int
253	riscv_breakpoint_at (CORE_ADDR pc)
254	{
255	union
256	{
257	gdb_byte bytes[2];
258	uint16_t insn;
259	}
260	buf;
261
262	if (target_read_memory (pc, buf.bytes, sizeof (buf.insn)) == 0
263	&& (buf.insn == riscv_cbreakpoint
264	\|\| (buf.insn == riscv_ibreakpoint[0]
265	&& target_read_memory (pc + sizeof (buf.insn), buf.bytes,
266	sizeof (buf.insn)) == 0
267	&& buf.insn == riscv_ibreakpoint[1])))
268	return 1;
269	else
270	return 0;
271	}
272
273	/* RISC-V/Linux target operations. */
274	struct linux_target_ops the_low_target =
275	{
bf84f706 MR	276	NULL, /* cannot_fetch_register */
	277	NULL, /* cannot_store_register */
	278	riscv_fetch_register,
	279	riscv_get_pc,
	280	riscv_set_pc,
	281	riscv_breakpoint_kind_from_pc,
	282	riscv_sw_breakpoint_from_kind,
	283	NULL, /* get_next_pcs */
	284	0, /* decr_pc_after_break */
	285	riscv_breakpoint_at,
	286	};
	287
ef0478f6 TBA	288	/* The linux target ops object. */
	289
	290	linux_process_target *the_linux_target = &the_riscv_target;
	291
bf84f706 MR	292	/* Initialize the RISC-V/Linux target. */
	293
	294	void
	295	initialize_low_arch ()
	296	{
	297	initialize_regsets_info (&riscv_regsets_info);
	298	}