Commit | Line | Data |
---|---|---|
58dbd541 YQ |
1 | /* Target dependent code for GDB on TI C6x systems. |
2 | ||
b811d2c2 | 3 | Copyright (C) 2010-2020 Free Software Foundation, Inc. |
58dbd541 YQ |
4 | Contributed by Andrew Jenner <andrew@codesourcery.com> |
5 | Contributed by Yao Qi <yao@codesourcery.com> | |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | #include "server.h" | |
23 | #include "linux-low.h" | |
506fe5f4 YQ |
24 | #include "arch/tic6x.h" |
25 | #include "tdesc.h" | |
58dbd541 | 26 | |
5826e159 | 27 | #include "nat/gdb_ptrace.h" |
58dbd541 YQ |
28 | #include <endian.h> |
29 | ||
30 | #include "gdb_proc_service.h" | |
31 | ||
32 | #ifndef PTRACE_GET_THREAD_AREA | |
33 | #define PTRACE_GET_THREAD_AREA 25 | |
34 | #endif | |
35 | ||
36 | /* There are at most 69 registers accessible in ptrace. */ | |
37 | #define TIC6X_NUM_REGS 69 | |
38 | ||
39 | #include <asm/ptrace.h> | |
40 | ||
ef0478f6 TBA |
41 | /* Linux target op definitions for the TI C6x architecture. */ |
42 | ||
43 | class tic6x_target : public linux_process_target | |
44 | { | |
45 | public: | |
46 | ||
aa8d21c9 TBA |
47 | const regs_info *get_regs_info () override; |
48 | ||
797bcff5 TBA |
49 | protected: |
50 | ||
51 | void low_arch_setup () override; | |
daca57a7 TBA |
52 | |
53 | bool low_cannot_fetch_register (int regno) override; | |
54 | ||
55 | bool low_cannot_store_register (int regno) override; | |
bf9ae9d8 TBA |
56 | |
57 | bool low_supports_breakpoints () override; | |
58 | ||
59 | CORE_ADDR low_get_pc (regcache *regcache) override; | |
60 | ||
61 | void low_set_pc (regcache *regcache, CORE_ADDR newpc) override; | |
ef0478f6 TBA |
62 | }; |
63 | ||
64 | /* The singleton target ops object. */ | |
65 | ||
66 | static tic6x_target the_tic6x_target; | |
67 | ||
58dbd541 YQ |
68 | /* Defined in auto-generated file tic6x-c64xp-linux.c. */ |
69 | void init_registers_tic6x_c64xp_linux (void); | |
3aee8918 PA |
70 | extern const struct target_desc *tdesc_tic6x_c64xp_linux; |
71 | ||
58dbd541 YQ |
72 | /* Defined in auto-generated file tic6x-c64x-linux.c. */ |
73 | void init_registers_tic6x_c64x_linux (void); | |
3aee8918 PA |
74 | extern const struct target_desc *tdesc_tic6x_c64x_linux; |
75 | ||
58dbd541 YQ |
76 | /* Defined in auto-generated file tic62x-c6xp-linux.c. */ |
77 | void init_registers_tic6x_c62x_linux (void); | |
3aee8918 | 78 | extern const struct target_desc *tdesc_tic6x_c62x_linux; |
58dbd541 YQ |
79 | |
80 | union tic6x_register | |
81 | { | |
82 | unsigned char buf[4]; | |
83 | ||
84 | int reg32; | |
85 | }; | |
86 | ||
87 | /* Return the ptrace ``address'' of register REGNO. */ | |
88 | ||
89 | #if __BYTE_ORDER == __BIG_ENDIAN | |
90 | static int tic6x_regmap_c64xp[] = { | |
91 | /* A0 - A15 */ | |
92 | 53, 52, 55, 54, 57, 56, 59, 58, | |
93 | 61, 60, 63, 62, 65, 64, 67, 66, | |
94 | /* B0 - B15 */ | |
95 | 23, 22, 25, 24, 27, 26, 29, 28, | |
96 | 31, 30, 33, 32, 35, 34, 69, 68, | |
97 | /* CSR PC */ | |
98 | 5, 4, | |
99 | /* A16 - A31 */ | |
100 | 37, 36, 39, 38, 41, 40, 43, 42, | |
101 | 45, 44, 47, 46, 49, 48, 51, 50, | |
102 | /* B16 - B31 */ | |
103 | 7, 6, 9, 8, 11, 10, 13, 12, | |
104 | 15, 14, 17, 16, 19, 18, 21, 20, | |
105 | /* TSR, ILC, RILC */ | |
106 | 1, 2, 3 | |
107 | }; | |
108 | ||
109 | static int tic6x_regmap_c64x[] = { | |
110 | /* A0 - A15 */ | |
111 | 51, 50, 53, 52, 55, 54, 57, 56, | |
112 | 59, 58, 61, 60, 63, 62, 65, 64, | |
113 | /* B0 - B15 */ | |
114 | 21, 20, 23, 22, 25, 24, 27, 26, | |
115 | 29, 28, 31, 30, 33, 32, 67, 66, | |
116 | /* CSR PC */ | |
117 | 3, 2, | |
118 | /* A16 - A31 */ | |
119 | 35, 34, 37, 36, 39, 38, 41, 40, | |
120 | 43, 42, 45, 44, 47, 46, 49, 48, | |
121 | /* B16 - B31 */ | |
122 | 5, 4, 7, 6, 9, 8, 11, 10, | |
123 | 13, 12, 15, 14, 17, 16, 19, 18, | |
124 | -1, -1, -1 | |
125 | }; | |
126 | ||
127 | static int tic6x_regmap_c62x[] = { | |
128 | /* A0 - A15 */ | |
129 | 19, 18, 21, 20, 23, 22, 25, 24, | |
130 | 27, 26, 29, 28, 31, 30, 33, 32, | |
131 | /* B0 - B15 */ | |
132 | 5, 4, 7, 6, 9, 8, 11, 10, | |
133 | 13, 12, 15, 14, 17, 16, 35, 34, | |
134 | /* CSR, PC */ | |
135 | 3, 2, | |
136 | -1, -1, -1, -1, -1, -1, -1, -1, | |
137 | -1, -1, -1, -1, -1, -1, -1, -1, | |
138 | -1, -1, -1, -1, -1, -1, -1, -1, | |
139 | -1, -1, -1, -1, -1, -1, -1, -1, | |
140 | -1, -1, -1 | |
141 | }; | |
142 | ||
143 | #else | |
144 | static int tic6x_regmap_c64xp[] = { | |
145 | /* A0 - A15 */ | |
146 | 52, 53, 54, 55, 56, 57, 58, 59, | |
147 | 60, 61, 62, 63, 64, 65, 66, 67, | |
148 | /* B0 - B15 */ | |
149 | 22, 23, 24, 25, 26, 27, 28, 29, | |
150 | 30, 31, 32, 33, 34, 35, 68, 69, | |
151 | /* CSR PC */ | |
152 | 4, 5, | |
153 | /* A16 - A31 */ | |
154 | 36, 37, 38, 39, 40, 41, 42, 43, | |
155 | 44, 45, 46, 47, 48, 49, 50, 51, | |
156 | /* B16 -B31 */ | |
157 | 6, 7, 8, 9, 10, 11, 12, 13, | |
158 | 14, 15, 16, 17, 18, 19, 20, 31, | |
159 | /* TSR, ILC, RILC */ | |
160 | 0, 3, 2 | |
161 | }; | |
162 | ||
163 | static int tic6x_regmap_c64x[] = { | |
164 | /* A0 - A15 */ | |
165 | 50, 51, 52, 53, 54, 55, 56, 57, | |
166 | 58, 59, 60, 61, 62, 63, 64, 65, | |
167 | /* B0 - B15 */ | |
168 | 20, 21, 22, 23, 24, 25, 26, 27, | |
169 | 28, 29, 30, 31, 32, 33, 66, 67, | |
170 | /* CSR PC */ | |
171 | 2, 3, | |
172 | /* A16 - A31 */ | |
173 | 34, 35, 36, 37, 38, 39, 40, 41, | |
174 | 42, 43, 44, 45, 46, 47, 48, 49, | |
175 | /* B16 - B31 */ | |
176 | 4, 5, 6, 7, 8, 9, 10, 11, | |
177 | 12, 13, 14, 15, 16, 17, 18, 19, | |
178 | -1, -1, -1 | |
179 | }; | |
180 | ||
181 | static int tic6x_regmap_c62x[] = { | |
182 | /* A0 - A15 */ | |
183 | 18, 19, 20, 21, 22, 23, 24, 25, | |
184 | 26, 27, 28, 29, 30, 31, 32, 33, | |
185 | /* B0 - B15 */ | |
186 | 4, 5, 6, 7, 8, 9, 10, 11, | |
187 | 12, 13, 14, 15, 16, 17, 34, 35, | |
188 | /* CSR PC */ | |
189 | 2, 3, | |
190 | -1, -1, -1, -1, -1, -1, -1, -1, | |
191 | -1, -1, -1, -1, -1, -1, -1, -1, | |
192 | -1, -1, -1, -1, -1, -1, -1, -1, | |
193 | -1, -1, -1, -1, -1, -1, -1, -1, | |
194 | -1, -1, -1 | |
195 | }; | |
196 | ||
197 | #endif | |
198 | ||
199 | extern struct linux_target_ops the_low_target; | |
200 | ||
201 | static int *tic6x_regmap; | |
202 | static unsigned int tic6x_breakpoint; | |
dd373349 AT |
203 | #define tic6x_breakpoint_len 4 |
204 | ||
205 | /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ | |
206 | ||
207 | static const gdb_byte * | |
208 | tic6x_sw_breakpoint_from_kind (int kind, int *size) | |
209 | { | |
210 | *size = tic6x_breakpoint_len; | |
211 | return (const gdb_byte *) &tic6x_breakpoint; | |
212 | } | |
58dbd541 | 213 | |
3491a34c YQ |
214 | static struct usrregs_info tic6x_usrregs_info = |
215 | { | |
216 | TIC6X_NUM_REGS, | |
217 | NULL, /* Set in tic6x_read_description. */ | |
218 | }; | |
3aee8918 PA |
219 | |
220 | static const struct target_desc * | |
506fe5f4 | 221 | tic6x_read_description (enum c6x_feature feature) |
58dbd541 | 222 | { |
506fe5f4 YQ |
223 | static target_desc *tdescs[C6X_LAST] = { }; |
224 | struct target_desc **tdesc = &tdescs[feature]; | |
58dbd541 | 225 | |
506fe5f4 | 226 | if (*tdesc == NULL) |
58dbd541 | 227 | { |
506fe5f4 | 228 | *tdesc = tic6x_create_target_description (feature); |
506fe5f4 | 229 | static const char *expedite_regs[] = { "A15", "PC", NULL }; |
190852c8 | 230 | init_target_desc (*tdesc, expedite_regs); |
58dbd541 | 231 | } |
506fe5f4 YQ |
232 | |
233 | return *tdesc; | |
58dbd541 YQ |
234 | } |
235 | ||
daca57a7 TBA |
236 | bool |
237 | tic6x_target::low_cannot_fetch_register (int regno) | |
58dbd541 YQ |
238 | { |
239 | return (tic6x_regmap[regno] == -1); | |
240 | } | |
241 | ||
daca57a7 TBA |
242 | bool |
243 | tic6x_target::low_cannot_store_register (int regno) | |
58dbd541 YQ |
244 | { |
245 | return (tic6x_regmap[regno] == -1); | |
246 | } | |
247 | ||
bf9ae9d8 TBA |
248 | bool |
249 | tic6x_target::low_supports_breakpoints () | |
250 | { | |
251 | return true; | |
252 | } | |
253 | ||
254 | CORE_ADDR | |
255 | tic6x_target::low_get_pc (regcache *regcache) | |
58dbd541 YQ |
256 | { |
257 | union tic6x_register pc; | |
258 | ||
259 | collect_register_by_name (regcache, "PC", pc.buf); | |
260 | return pc.reg32; | |
261 | } | |
262 | ||
bf9ae9d8 TBA |
263 | void |
264 | tic6x_target::low_set_pc (regcache *regcache, CORE_ADDR pc) | |
58dbd541 YQ |
265 | { |
266 | union tic6x_register newpc; | |
267 | ||
268 | newpc.reg32 = pc; | |
269 | supply_register_by_name (regcache, "PC", newpc.buf); | |
270 | } | |
271 | ||
58dbd541 YQ |
272 | static int |
273 | tic6x_breakpoint_at (CORE_ADDR where) | |
274 | { | |
275 | unsigned int insn; | |
276 | ||
52405d85 | 277 | the_target->read_memory (where, (unsigned char *) &insn, 4); |
58dbd541 YQ |
278 | if (insn == tic6x_breakpoint) |
279 | return 1; | |
280 | ||
281 | /* If necessary, recognize more trap instructions here. GDB only uses the | |
282 | one. */ | |
283 | return 0; | |
284 | } | |
285 | ||
286 | /* Fetch the thread-local storage pointer for libthread_db. */ | |
287 | ||
288 | ps_err_e | |
754653a7 | 289 | ps_get_thread_area (struct ps_prochandle *ph, |
58dbd541 YQ |
290 | lwpid_t lwpid, int idx, void **base) |
291 | { | |
292 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) | |
293 | return PS_ERR; | |
294 | ||
295 | /* IDX is the bias from the thread pointer to the beginning of the | |
296 | thread descriptor. It has to be subtracted due to implementation | |
297 | quirks in libthread_db. */ | |
298 | *base = (void *) ((char *) *base - idx); | |
299 | ||
300 | return PS_OK; | |
301 | } | |
302 | ||
303 | static void | |
304 | tic6x_collect_register (struct regcache *regcache, int regno, | |
305 | union tic6x_register *reg) | |
306 | { | |
307 | union tic6x_register tmp_reg; | |
308 | ||
309 | collect_register (regcache, regno, &tmp_reg.reg32); | |
310 | reg->reg32 = tmp_reg.reg32; | |
311 | } | |
312 | ||
313 | static void | |
314 | tic6x_supply_register (struct regcache *regcache, int regno, | |
315 | const union tic6x_register *reg) | |
316 | { | |
317 | int offset = 0; | |
318 | ||
319 | supply_register (regcache, regno, reg->buf + offset); | |
320 | } | |
321 | ||
322 | static void | |
323 | tic6x_fill_gregset (struct regcache *regcache, void *buf) | |
324 | { | |
3491a34c | 325 | auto regset = static_cast<union tic6x_register *> (buf); |
58dbd541 YQ |
326 | int i; |
327 | ||
328 | for (i = 0; i < TIC6X_NUM_REGS; i++) | |
329 | if (tic6x_regmap[i] != -1) | |
330 | tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]); | |
331 | } | |
332 | ||
333 | static void | |
334 | tic6x_store_gregset (struct regcache *regcache, const void *buf) | |
335 | { | |
3491a34c | 336 | const auto regset = static_cast<const union tic6x_register *> (buf); |
58dbd541 YQ |
337 | int i; |
338 | ||
339 | for (i = 0; i < TIC6X_NUM_REGS; i++) | |
340 | if (tic6x_regmap[i] != -1) | |
341 | tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]); | |
342 | } | |
343 | ||
3aee8918 | 344 | static struct regset_info tic6x_regsets[] = { |
58dbd541 YQ |
345 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS, |
346 | tic6x_fill_gregset, tic6x_store_gregset }, | |
50bc912a | 347 | NULL_REGSET |
58dbd541 YQ |
348 | }; |
349 | ||
797bcff5 TBA |
350 | void |
351 | tic6x_target::low_arch_setup () | |
3aee8918 | 352 | { |
506fe5f4 YQ |
353 | register unsigned int csr asm ("B2"); |
354 | unsigned int cpuid; | |
355 | enum c6x_feature feature = C6X_CORE; | |
356 | ||
357 | /* Determine the CPU we're running on to find the register order. */ | |
358 | __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :); | |
359 | cpuid = csr >> 24; | |
360 | switch (cpuid) | |
361 | { | |
362 | case 0x00: /* C62x */ | |
363 | case 0x02: /* C67x */ | |
364 | tic6x_regmap = tic6x_regmap_c62x; | |
365 | tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ | |
366 | feature = C6X_CORE; | |
367 | break; | |
368 | case 0x03: /* C67x+ */ | |
369 | tic6x_regmap = tic6x_regmap_c64x; | |
370 | tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ | |
371 | feature = C6X_GP; | |
372 | break; | |
373 | case 0x0c: /* C64x */ | |
374 | tic6x_regmap = tic6x_regmap_c64x; | |
375 | tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ | |
376 | feature = C6X_GP; | |
377 | break; | |
378 | case 0x10: /* C64x+ */ | |
379 | case 0x14: /* C674x */ | |
380 | case 0x15: /* C66x */ | |
381 | tic6x_regmap = tic6x_regmap_c64xp; | |
382 | tic6x_breakpoint = 0x56454314; /* illegal opcode */ | |
383 | feature = C6X_C6XP; | |
384 | break; | |
385 | default: | |
386 | error ("Unknown CPU ID 0x%02x", cpuid); | |
387 | } | |
388 | tic6x_usrregs_info.regmap = tic6x_regmap; | |
389 | ||
390 | current_process ()->tdesc = tic6x_read_description (feature); | |
3aee8918 PA |
391 | } |
392 | ||
7d00775e AT |
393 | /* Support for hardware single step. */ |
394 | ||
395 | static int | |
396 | tic6x_supports_hardware_single_step (void) | |
397 | { | |
398 | return 1; | |
399 | } | |
400 | ||
3aee8918 PA |
401 | static struct regsets_info tic6x_regsets_info = |
402 | { | |
403 | tic6x_regsets, /* regsets */ | |
404 | 0, /* num_regsets */ | |
405 | NULL, /* disabled_regsets */ | |
406 | }; | |
407 | ||
aa8d21c9 | 408 | static struct regs_info myregs_info = |
3aee8918 PA |
409 | { |
410 | NULL, /* regset_bitmap */ | |
411 | &tic6x_usrregs_info, | |
412 | &tic6x_regsets_info | |
413 | }; | |
414 | ||
aa8d21c9 TBA |
415 | const regs_info * |
416 | tic6x_target::get_regs_info () | |
3aee8918 | 417 | { |
aa8d21c9 | 418 | return &myregs_info; |
3aee8918 PA |
419 | } |
420 | ||
58dbd541 | 421 | struct linux_target_ops the_low_target = { |
dd373349 AT |
422 | NULL, /* breakpoint_kind_from_pc */ |
423 | tic6x_sw_breakpoint_from_kind, | |
58dbd541 YQ |
424 | NULL, |
425 | 0, | |
426 | tic6x_breakpoint_at, | |
7d00775e AT |
427 | NULL, /* supports_z_point_type */ |
428 | NULL, /* insert_point */ | |
429 | NULL, /* remove_point */ | |
430 | NULL, /* stopped_by_watchpoint */ | |
431 | NULL, /* stopped_data_address */ | |
432 | NULL, /* collect_ptrace_register */ | |
433 | NULL, /* supply_ptrace_register */ | |
434 | NULL, /* siginfo_fixup */ | |
435 | NULL, /* new_process */ | |
04ec7890 | 436 | NULL, /* delete_process */ |
7d00775e | 437 | NULL, /* new_thread */ |
466eecee | 438 | NULL, /* delete_thread */ |
7d00775e AT |
439 | NULL, /* new_fork */ |
440 | NULL, /* prepare_to_resume */ | |
441 | NULL, /* process_qsupported */ | |
442 | NULL, /* supports_tracepoints */ | |
443 | NULL, /* get_thread_area */ | |
444 | NULL, /* install_fast_tracepoint_jump_pad */ | |
445 | NULL, /* emit_ops */ | |
446 | NULL, /* get_min_fast_tracepoint_insn_len */ | |
447 | NULL, /* supports_range_stepping */ | |
448 | NULL, /* breakpoint_kind_from_current_state */ | |
449 | tic6x_supports_hardware_single_step, | |
58dbd541 | 450 | }; |
3aee8918 | 451 | |
506fe5f4 | 452 | #if GDB_SELF_TEST |
268a13a5 | 453 | #include "gdbsupport/selftest.h" |
506fe5f4 YQ |
454 | |
455 | namespace selftests { | |
456 | namespace tdesc { | |
457 | static void | |
458 | tic6x_tdesc_test () | |
459 | { | |
460 | SELF_CHECK (*tdesc_tic6x_c62x_linux == *tic6x_read_description (C6X_CORE)); | |
461 | SELF_CHECK (*tdesc_tic6x_c64x_linux == *tic6x_read_description (C6X_GP)); | |
462 | SELF_CHECK (*tdesc_tic6x_c64xp_linux == *tic6x_read_description (C6X_C6XP)); | |
463 | } | |
464 | } | |
465 | } | |
466 | #endif | |
467 | ||
ef0478f6 TBA |
468 | /* The linux target ops object. */ |
469 | ||
470 | linux_process_target *the_linux_target = &the_tic6x_target; | |
471 | ||
3aee8918 PA |
472 | void |
473 | initialize_low_arch (void) | |
474 | { | |
506fe5f4 | 475 | #if GDB_SELF_TEST |
3aee8918 PA |
476 | /* Initialize the Linux target descriptions. */ |
477 | init_registers_tic6x_c64xp_linux (); | |
478 | init_registers_tic6x_c64x_linux (); | |
479 | init_registers_tic6x_c62x_linux (); | |
480 | ||
506fe5f4 YQ |
481 | selftests::register_test ("tic6x-tdesc", selftests::tdesc::tic6x_tdesc_test); |
482 | #endif | |
483 | ||
3aee8918 PA |
484 | initialize_regsets_info (&tic6x_regsets_info); |
485 | } |